Partially support CSRRW where source and destination register is zero

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Description

Kona's binary contains CSRRW (C0001073) instruction. This instruction can be mapped as

Field	Bits	Value (Binary)	Value (Hex)	Description
opcode	0–6	1110011	0x73	Indicates a SYSTEM instruction
rd	7–11	00000	0x0	Destination register (none specified)
funct3	12–14	001	0x1	Defines the type of SYSTEM instruction
rs1	15–19	00000	0x0	Source register 1 (none specified)
rs2	20–24	00000	0x0	Source register 2 (not used for this format)
funct7	25–31	1100000	0x60	Additional instruction-specific function

The above table shows that rd and rs1 register are set to zero, which means the actual source and destination for this read-write instruction is missing - thus, this instruction is no-op. We can implement this into asterisc vm and only pass through instruction where the rs1Value and rdValue is zero, and revert if one of those value are non-zero.