Make correction of QIO pins needed (HD GPIO12 and WP GPIO13) for QIO …

…mode.
espressif · Dec 7, 2024 · c8b56d1 · c8b56d1
1 parent 804f2db
commit c8b56d1
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/docs/en/esptool/flash-modes.rst b/docs/en/esptool/flash-modes.rst
@@ -36,7 +36,7 @@ These set Quad Flash I/O or Dual Flash I/O modes. Valid values are ``keep``, ``q
 
     Most {IDF_TARGET_NAME} modules use ``qio``, but are also dual I/O.
 
-In ``qio`` mode, two additional GPIOs (9 and 10) are used for SPI flash communications. If flash mode is set to ``dio`` then these pins are available for other purposes.
+In ``qio`` mode, two additional GPIOs (12 and 13) are used for SPI flash communications. If flash mode is set to ``dio`` then these pins are available for other purposes.
 
 For a full explanation of these modes, see the :ref:`SPI Flash Modes page <spi-flash-modes>`.