Merge pull request #244 from efabless/gf180mcuD_updates

Gf180mcu D variant updates

check_manager/__init__.py

@@ -74,7 +74,7 @@ def run(self):
 class Defaults(CheckManager):
     __ref__ = 'default'
     __surname__ = 'Default'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -101,7 +101,7 @@ def run(self):
 class Documentation(CheckManager):
     __ref__ = 'documentation'
     __surname__ = 'Documentation'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -119,7 +119,7 @@ def run(self):
 class GpioDefines(CheckManager):
     __ref__ = 'gpio_defines'
     __surname__ = 'GPIO-Defines'
-    __supported_pdks__ = ['gf180mcuC','sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital']
 
     def __init__(self, precheck_config, project_config):
@@ -142,7 +142,7 @@ def run(self):
 class Lvs(CheckManager):
     __ref__ = 'lvs'
     __surname__ = 'LVS'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -171,7 +171,7 @@ def run(self):
 class Oeb(CheckManager):
     __ref__ = 'oeb'
     __surname__ = 'OEB'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital']
 
     def __init__(self, precheck_config, project_config):
@@ -231,35 +231,39 @@ def run(self):
 class KlayoutBEOL(KlayoutDRC):
     __ref__ = 'klayout_beol'
     __surname__ = 'Klayout BEOL'
-    __supported_pdks__ = ['gf180mcuC', 'sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
         super().__init__(precheck_config, project_config)
         self.drc_script_path = Path(__file__).parent.parent / f"checks/tech-files/{precheck_config['pdk_path'].stem}_mr.drc"
         self.klayout_cmd_extra_args = ['-rd', 'beol=true']
-        if 'gf180mcu' in precheck_config['pdk_path'].stem:
+        if 'gf180mcuC' in precheck_config['pdk_path'].stem:
             self.klayout_cmd_extra_args += ['-rd', 'metal_top=9K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true']
+        if 'gf180mcuD' in precheck_config['pdk_path'].stem:
+            self.klayout_cmd_extra_args += ['-rd', 'metal_top=11K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true', '-rd', 'run_mode=deep']
 
 
 class KlayoutFEOL(KlayoutDRC):
     __ref__ = 'klayout_feol'
     __surname__ = 'Klayout FEOL'
-    __supported_pdks__ = ['gf180mcuC', 'sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
         super().__init__(precheck_config, project_config)
         self.drc_script_path = Path(__file__).parent.parent / f"checks/tech-files/{precheck_config['pdk_path'].stem}_mr.drc"
         self.klayout_cmd_extra_args = ['-rd', 'feol=true']
-        if 'gf180mcu' in precheck_config['pdk_path'].stem:
+        if 'gf180mcuC' in precheck_config['pdk_path'].stem:
             self.klayout_cmd_extra_args += ['-rd', 'metal_top=9K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true']
+        if 'gf180mcuD' in precheck_config['pdk_path'].stem:
+            self.klayout_cmd_extra_args += ['-rd', 'metal_top=11K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true', '-rd', 'run_mode=deep']
 
 
 class KlayoutMetalMinimumClearAreaDensity(KlayoutDRC):
     __ref__ = 'klayout_met_min_ca_density'
     __surname__ = 'Klayout Metal Minimum Clear Area Density'
-    __supported_pdks__ = ['gf180mcuC','sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -273,15 +277,17 @@ def __init__(self, precheck_config, project_config):
 class KlayoutOffgrid(KlayoutDRC):
     __ref__ = 'klayout_offgrid'
     __surname__ = 'Klayout Offgrid'
-    __supported_pdks__ = ['gf180mcuC', 'sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
         super().__init__(precheck_config, project_config)
         self.drc_script_path = Path(__file__).parent.parent / f"checks/tech-files/{precheck_config['pdk_path'].stem}_mr.drc"
         self.klayout_cmd_extra_args = ['-rd', 'offgrid=true']
-        if 'gf180mcu' in precheck_config['pdk_path'].stem:
+        if 'gf180mcuC' in precheck_config['pdk_path'].stem:
             self.klayout_cmd_extra_args += ['-rd', 'metal_top=9K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true']
+        if 'gf180mcuD' in precheck_config['pdk_path'].stem:
+            self.klayout_cmd_extra_args += ['-rd', 'metal_top=11K', '-rd', 'mim_option=B', '-rd', 'metal_level=5LM', '-rd', 'conn_drc=true', '-rd', 'run_mode=deep']
 
 
 class KlayoutPinLabelPurposesOverlappingDrawing(KlayoutDRC):
@@ -311,7 +317,7 @@ def __init__(self, precheck_config, project_config):
 class License(CheckManager):
     __ref__ = 'license'
     __surname__ = 'License'
-    __supported_pdks__ = ['gf180mcuC', 'sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -391,7 +397,7 @@ def run(self):
 class Makefile(CheckManager):
     __ref__ = 'makefile'
     __surname__ = 'Makefile'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -409,7 +415,7 @@ def run(self):
 class Manifest(CheckManager):
     __ref__ = 'manifest'
     __surname__ = 'Manifest'
-    __supported_pdks__ = ['sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):
@@ -428,7 +434,7 @@ def run(self):
 class XOR(CheckManager):
     __ref__ = 'xor'
     __surname__ = 'XOR'
-    __supported_pdks__ = ['gf180mcuC', 'sky130A', 'sky130B']
+    __supported_pdks__ = ['gf180mcuC', 'gf180mcuD', 'sky130A', 'sky130B']
     __supported_type__ = ['analog', 'digital', 'openframe']
 
     def __init__(self, precheck_config, project_config):

checks/be_checks/tech/gf180mcuD/cvc.models

@@ -0,0 +1,77 @@
+
+MN nfet_01v8 Vth=0.2 Vgs=1.8 Vds=1.8
+MP pfet_01v8_hvt Vth=-0.2 Vgs=1.8 Vds=1.8
+
+R short model=switch_on
+
+D np_6p0
+D pn_6p0 
+D diode_nd2ps_06v0
+D diode_pd2nw_06v0
+
+D sky130_fd_pr__diode_pw2nd_05v5 
+D sky130_fd_pr__diode_pw2nd_11v0 
+D sky130_fd_pr__diode_pw2nd_05v5_nvt 
+D sky130_fd_pr__diode_pd2nw_05v5
+D sky130_fd_pr__diode_pd2nw_05v5_lvt
+D sky130_fd_pr__diode_pd2nw_11v0
+D sky130_fd_pr__model__parasitic__diode_ps2dn
+D sky130_fd_pr__model__parasitic__diode_ps2nw
+D sky130_fd_pr__model__parasitic__diode_pw2dn
+D condiode
+
+
+R ppolyf_u_1k_6p0 R=r_length/r_width*50
+
+#R sky130_fd_pr__res_generic_m1 R=l/w*0.125
+#R sky130_fd_pr__res_generic_m2 R=l/w*0.125
+#R sky130_fd_pr__res_generic_m3 R=l/w*0.047
+#R sky130_fd_pr__res_generic_m4 R=l/w*0.047
+#R sky130_fd_pr__res_generic_nd R=l/w*0.029
+R sky130_fd_pr__res_generic_l1 model=switch_on
+R sky130_fd_pr__res_generic_m1 model=switch_on
+R sky130_fd_pr__res_generic_m2 model=switch_on
+R sky130_fd_pr__res_generic_m3 model=switch_on
+R sky130_fd_pr__res_generic_m4 model=switch_on
+R sky130_fd_pr__res_generic_m5 model=switch_on
+R sky130_fd_pr__res_generic_nd R=l/w*120
+R sky130_fd_pr__res_generic_nd__hv R=l/w*114
+R sky130_fd_pr__res_generic_pd__hv R=l/w*191
+R sky130_fd_pr__res_generic_po R=l/w*48
+R sky130_fd_pr__res_xhigh_po R=l/w*2000
+R sky130_fd_pr__res_high_po R=l/w*2000
+R sky130_fd_pr__reram_reram_cell R=10
+
+MN nfet_06v0 Vth=0.4
+MP pfet_06v0 Vth=-0.4
+MN nmos_6p0 Vth=0.4
+MP pmos_6p0 Vth=-0.4
+MN nmos_3p3 Vth=0.3
+MP pmos_3p3 Vth=-0.3
+
+MN sky130_fd_pr__nfet_01v8 Vth=0.2 Vgs=1.8 Vds=1.8
+MN sky130_fd_pr__nfet_01v8_lvt Vth=0.1 Vgs=1.8 Vds=1.8
+MN sky130_fd_pr__special_nfet_latch Vth=0.2 Vgs=1.8 Vds=1.8
+MN sky130_fd_pr__nfet_03v3_nvt Vth=0.2 Vgs=3.3 Vds=3.3
+MN sky130_fd_pr__esd_nfet_g5v0d10v5 Vth=0.2
+MN sky130_fd_pr__nfet_05v0_nvt Vth=0.2
+MN sky130_fd_pr__nfet_g5v0d10v5 Vth=0.2
+MN sky130_fd_bs_flash__special_sonosfet_star Vth=0.2
+
+MP sky130_fd_pr__pfet_01v8 Vth=-0.2 Vgs=1.8 Vds=1.8
+MP sky130_fd_pr__pfet_01v8_lvt Vth=-0.1 Vgs=1.8 Vds=1.8
+MP sky130_fd_pr__pfet_01v8_hvt Vth=-0.3 Vgs=1.8 Vds=1.8
+MP sky130_fd_pr__special_pfet_pass Vth=-0.2 Vgs=1.8 Vds=1.8
+MP sky130_fd_pr__pfet_g5v0d10v5 Vth=-0.2
+
+C mim_2p0fF
+
+C sky130_fd_pr__cap_mim_m3_1
+C sky130_fd_pr__cap_mim_m3_2
+C sky130_fd_pr__cap_var
+C sky130_fd_pr__cap_var_lvt
+C cap_mim_2f0_m4m5_noshield
+
+Q sky130_fd_pr__pnp_05v5
+
+

checks/be_checks/tech/gf180mcuD/cvc.power.caravan

@@ -0,0 +1,19 @@
+vccd power 1.8
+vccd1 power 1.8
+vccd2 power 1.8
+vdda power 3.3
+vdda1 power 3.3
+vdda1_2 power 3.3
+vdda2 power 3.3
+vddio power 3.3
+vddio_2 power 3.3
+vssa power 0.0
+vssa1 power 0.0
+vssa1_2 power 0.0
+vssa2 power 0.0
+vssd power 0.0
+vssd1 power 0.0
+vssd2 power 0.0
+vssio power 0.0
+vssio_2 power 0.0
+mprj_io[18] power 3.3

checks/be_checks/tech/gf180mcuD/cvc.power.caravel

@@ -0,0 +1,18 @@
+vccd power 1.8
+vccd1 power 1.8
+vccd2 power 1.8
+vdda power 3.3
+vdda1 power 3.3
+vdda1_2 power 3.3
+vdda2 power 3.3
+vddio power 3.3
+vddio_2 power 3.3
+vssa power 0.0
+vssa1 power 0.0
+vssa1_2 power 0.0
+vssa2 power 0.0
+vssd power 0.0
+vssd1 power 0.0
+vssd2 power 0.0
+vssio power 0.0
+vssio_2 power 0.0

checks/be_checks/tech/gf180mcuD/cvc.power.user_analog_project_wrapper

@@ -0,0 +1,15 @@
+vdd power 5.0
+vss power 0.0
+io_analog[*] input min@0.0 max@5.0
+wb_clk_i input min@0.0 max@5.0
+wb_rst_i input min@0.0 max@5.0
+wbs_stb_i input min@0.0 max@5.0
+wbs_cyc_i input min@0.0 max@5.0
+wbs_we_i input min@0.0 max@5.0
+wbs_sel_i[*] input min@0.0 max@5.0
+wbs_dat_i[*] input min@0.0 max@5.0
+wbs_adr_i[*] input min@0.0 max@5.0
+la_data_in[*] input min@0.0 max@5.0
+la_oenb[*] input min@0.0 max@5.0
+io_in[*] input min@0.0 max@5.0
+user_clock2 input min@0.0 max@5.0

checks/be_checks/tech/gf180mcuD/cvc.power.user_project_wrapper

@@ -0,0 +1,15 @@
+vdd power 5.0
+vss power 0.0
+user_clock2 input min@0.0 max@5.0
+wb_clk_i input min@0.0 max@5.0
+wb_rst_i input min@0.0 max@5.0
+wbs_cyc_i input min@0.0 max@5.0
+wbs_stb_i input min@0.0 max@5.0
+wbs_we_i input min@0.0 max@5.0
+io_in[*] input min@0.0 max@5.0
+la_data_in[*] input min@0.0 max@5.0
+la_oenb[*] input min@0.0 max@5.0
+wbs_adr_i[*] input min@0.0 max@5.0
+wbs_dat_i[*] input min@0.0 max@5.0
+wbs_sel_i[*] input min@0.0 max@5.0
+

checks/be_checks/tech/gf180mcuD/cvcrc

@@ -0,0 +1,35 @@
+CVC_TOP = $DESIGN_NAME
+CVC_NETLIST = $RESULTS_DIR/$CVC_TOP.cdl.gz
+CVC_MODE = $CVC_TOP
+CVC_MODEL_FILE = $LVS_ROOT/tech/$PDK/cvc.models
+CVC_POWER_FILE = $WORK_ROOT/cvc.power.$CVC_TOP
+CVC_FUSE_FILE = ''
+CVC_REPORT_FILE = $WORK_ROOT/cvc.log
+CVC_REPORT_TITLE = "CVC $CVC_TOP"
+CVC_CIRCUIT_ERROR_LIMIT = '100'
+CVC_SEARCH_LIMIT = '100'
+CVC_LEAK_LIMIT = '0.0002'
+CVC_SOI = 'false'
+CVC_SCRC = 'false'
+CVC_VTH_GATES = 'false'
+CVC_MIN_VTH_GATES = 'false'
+CVC_IGNORE_VTH_FLOATING = 'false'
+CVC_IGNORE_NO_LEAK_FLOATING = 'false'
+CVC_LEAK_OVERVOLTAGE = 'true'
+CVC_LOGIC_DIODES = 'false'
+CVC_ANALOG_GATES = 'true'
+CVC_BACKUP_RESULTS = 'false'
+CVC_MOS_DIODE_ERROR_THRESHOLD = '0'
+CVC_SHORT_ERROR_THRESHOLD = '0'
+CVC_BIAS_ERROR_THRESHOLD = '0'
+CVC_FORWARD_ERROR_THRESHOLD = '0'
+CVC_FLOATING_ERROR_THRESHOLD = '0'
+CVC_GATE_ERROR_THRESHOLD = '0'
+CVC_LEAK?_ERROR_THRESHOLD = '0'
+CVC_EXPECTED_ERROR_THRESHOLD = '0'
+CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0'
+CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0'
+CVC_CELL_ERROR_LIMIT_FILE = ''
+CVC_CELL_CHECKSUM_FILE = ''
+CVC_LARGE_CIRCUIT_SIZE = '10000000'
+CVC_NET_CHECK_FILE = ''