change power ports direction to inout

efabless · Jul 8, 2024 · 7e7ae4b · 7e7ae4b
1 parent f1fca7b
commit 7e7ae4b
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Showing 3 changed files with 5 additions and 5 deletions.
diff --git a/EF_GPIO8.yaml b/EF_GPIO8.yaml
@@ -7,7 +7,7 @@ info:
   license: APACHE 2.0
   author: Mohamed Shalan
   email: mshalan@efabless.com
-  version: v1.0.6
+  version: v1.0.7
   date: 08-07-2024
   category: digital
   tags:

diff --git a/hdl/rtl/bus_wrappers/EF_GPIO8_APB.pp.v b/hdl/rtl/bus_wrappers/EF_GPIO8_APB.pp.v
@@ -24,8 +24,8 @@
 
 module EF_GPIO8_APB (
 `ifdef USE_POWER_PINS 
-	input wire VPWR,
-	input wire VGND,
+	inout VPWR,
+	inout VGND,
 `endif 
 	input wire          PCLK,
                                         input wire          PRESETn,

diff --git a/hdl/rtl/bus_wrappers/EF_GPIO8_APB.v b/hdl/rtl/bus_wrappers/EF_GPIO8_APB.v
@@ -28,8 +28,8 @@
 
 module EF_GPIO8_APB (
 `ifdef USE_POWER_PINS
-	input wire VPWR,
-	input wire VGND,
+	inout VPWR,
+	inout VGND,
 `endif
 	`APB_SLAVE_PORTS,
 	input	wire	[8-1:0]	io_in,