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[mono][jit] Remove OP_FCONV_TO_I/OP_RCONV_TO_I from the back ends, co… #66268

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Mar 8, 2022
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[mono][jit] Remove OP_FCONV_TO_I/OP_RCONV_TO_I from the back ends, co… #66268

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2 changes: 0 additions & 2 deletions src/mono/mono/mini/cpu-amd64.md
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Original file line number Diff line number Diff line change
Expand Up @@ -267,7 +267,6 @@ float_conv_to_u4: dest:i src1:f len:49
float_conv_to_u8: dest:i src1:f len:49
float_conv_to_u2: dest:i src1:f len:49
float_conv_to_u1: dest:i src1:f len:49
float_conv_to_i: dest:i src1:f len:49
float_conv_to_ovf_i: dest:a src1:f len:40
float_conv_to_ovd_u: dest:a src1:f len:40
float_mul_ovf:
Expand All @@ -293,7 +292,6 @@ r4_conv_to_u2: dest:i src1:f len:32
r4_conv_to_i4: dest:i src1:f len:16
r4_conv_to_u4: dest:i src1:f len:32
r4_conv_to_i8: dest:i src1:f len:32
r4_conv_to_i: dest:i src1:f len:32
r4_conv_to_r8: dest:f src1:f len:17
r4_conv_to_r4: dest:f src1:f len:17
r4_add: dest:f src1:f src2:f clob:1 len:5
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2 changes: 0 additions & 2 deletions src/mono/mono/mini/cpu-arm.md
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Original file line number Diff line number Diff line change
Expand Up @@ -211,7 +211,6 @@ float_conv_to_u4: dest:i src1:f len:88
float_conv_to_u8: dest:l src1:f len:88
float_conv_to_u2: dest:i src1:f len:88
float_conv_to_u1: dest:i src1:f len:88
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:16
float_cgt: dest:i src1:f src2:f len:16
float_cgt_un: dest:i src1:f src2:f len:20
Expand All @@ -226,7 +225,6 @@ rmove: dest:f src1:f len:4
r4_conv_to_i1: dest:i src1:f len:88
r4_conv_to_i2: dest:i src1:f len:88
r4_conv_to_i4: dest:i src1:f len:88
r4_conv_to_i: dest:i src1:f len:88
r4_conv_to_u1: dest:i src1:f len:88
r4_conv_to_u2: dest:i src1:f len:88
r4_conv_to_u4: dest:i src1:f len:88
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2 changes: 0 additions & 2 deletions src/mono/mono/mini/cpu-arm64.md
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Original file line number Diff line number Diff line change
Expand Up @@ -209,7 +209,6 @@ float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:l src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:16
float_cgt: dest:i src1:f src2:f len:16
float_cgt_un: dest:i src1:f src2:f len:20
Expand All @@ -228,7 +227,6 @@ r4_conv_to_u2: dest:i src1:f len:8
r4_conv_to_i4: dest:i src1:f len:8
r4_conv_to_u4: dest:i src1:f len:8
r4_conv_to_i8: dest:l src1:f len:8
r4_conv_to_i: dest:l src1:f len:8
r4_conv_to_u8: dest:l src1:f len:8
r4_conv_to_r4: dest:f src1:f len:4
r4_conv_to_r8: dest:f src1:f len:4
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1 change: 0 additions & 1 deletion src/mono/mono/mini/cpu-mips.md
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Original file line number Diff line number Diff line change
Expand Up @@ -377,7 +377,6 @@ float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:l src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:20
float_cgt: dest:i src1:f src2:f len:20
float_cgt_un: dest:i src1:f src2:f len:20
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/cpu-ppc.md
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Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,6 @@ float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:l src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:16
float_cgt: dest:i src1:f src2:f len:16
float_cgt_un: dest:i src1:f src2:f len:20
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/cpu-ppc64.md
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Expand Up @@ -198,7 +198,6 @@ float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:i src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:16
float_cgt: dest:i src1:f src2:f len:16
float_cgt_un: dest:i src1:f src2:f len:20
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/cpu-s390x.md
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Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,6 @@ float_conv_to_i1: dest:i src1:f len:50
float_conv_to_i2: dest:i src1:f len:50
float_conv_to_i4: dest:i src1:f len:50
float_conv_to_i8: dest:l src1:f len:50
float_conv_to_i: dest:i src1:f len:52
float_conv_to_r4: dest:f src1:f len:8
float_conv_to_u1: dest:i src1:f len:72
float_conv_to_u2: dest:i src1:f len:72
Expand All @@ -143,7 +142,6 @@ r4_conv_to_u1: dest:i src1:f len:32
r4_conv_to_i2: dest:i src1:f len:32
r4_conv_to_u2: dest:i src1:f len:32
r4_conv_to_i4: dest:i src1:f len:16
r4_conv_to_i: dest:i src1:f len:16
r4_conv_to_u4: dest:i src1:f len:32
r4_conv_to_i8: dest:i src1:f len:32
r4_conv_to_r8: dest:f src1:f len:17
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/cpu-sparc.md
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Original file line number Diff line number Diff line change
Expand Up @@ -174,7 +174,6 @@ float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:L src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
float_ceq: dest:i src1:f src2:f len:64
float_cgt: dest:i src1:f src2:f len:64
float_cgt_un: dest:i src1:f src2:f len:64
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/cpu-x86.md
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Original file line number Diff line number Diff line change
Expand Up @@ -254,7 +254,6 @@ float_conv_to_u4: dest:i src1:f len:39
float_conv_to_u8: dest:L src1:f len:39
float_conv_to_u2: dest:y src1:f len:39
float_conv_to_u1: dest:y src1:f len:39
float_conv_to_i: dest:i src1:f len:39
float_conv_to_ovf_i: dest:a src1:f len:30
float_conv_to_ovd_u: dest:a src1:f len:30
float_mul_ovf:
Expand Down
13 changes: 12 additions & 1 deletion src/mono/mono/mini/method-to-ir.c
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Expand Up @@ -1182,6 +1182,17 @@ type_from_op (MonoCompile *cfg, MonoInst *ins, MonoInst *src1, MonoInst *src2)
case MONO_CEE_CONV_OVF_U:
ins->type = STACK_PTR;
ins->opcode += ovfops_op_map [src1->type];

switch (ins->opcode) {
case OP_FCONV_TO_I:
ins->opcode = TARGET_SIZEOF_VOID_P == 4 ? OP_FCONV_TO_I4 : OP_FCONV_TO_I8;
break;
case OP_RCONV_TO_I:
ins->opcode = TARGET_SIZEOF_VOID_P == 4 ? OP_RCONV_TO_I4 : OP_RCONV_TO_I8;
break;
default:
break;
}
break;
case MONO_CEE_ADD_OVF:
case MONO_CEE_ADD_OVF_UN:
Expand Down Expand Up @@ -8723,8 +8734,8 @@ mono_method_to_ir (MonoCompile *cfg, MonoMethod *method, MonoBasicBlock *start_b
break;
case MONO_CEE_CONV_U2:
case MONO_CEE_CONV_U1:
case MONO_CEE_CONV_I:
case MONO_CEE_CONV_U:
case MONO_CEE_CONV_I:
ADD_UNOP (il_op);
CHECK_CFG_EXCEPTION;
break;
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/mini-amd64.c
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Expand Up @@ -6013,7 +6013,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
case OP_FCONV_TO_I4:
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
break;
case OP_FCONV_TO_I:
case OP_FCONV_TO_I8:
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 8, TRUE);
break;
Expand Down Expand Up @@ -6042,7 +6041,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
amd64_sse_cvtss2si_reg_reg (code, ins->dreg, ins->sreg1);
break;
case OP_RCONV_TO_I8:
case OP_RCONV_TO_I:
amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 8);
break;
case OP_RCONV_TO_R8:
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/mini-arm.c
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Expand Up @@ -5682,7 +5682,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
break;
case OP_FCONV_TO_U4:
Expand Down Expand Up @@ -5904,7 +5903,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
code = emit_r4_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
break;
case OP_RCONV_TO_I4:
case OP_RCONV_TO_I:
code = emit_r4_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
break;
case OP_RCONV_TO_U4:
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/mini-arm64.c
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Expand Up @@ -4233,7 +4233,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
arm_fcvtzu_dx (code, dreg, sreg1);
break;
case OP_FCONV_TO_I8:
case OP_FCONV_TO_I:
arm_fcvtzs_dx (code, dreg, sreg1);
break;
case OP_FCONV_TO_U8:
Expand Down Expand Up @@ -4350,7 +4349,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
arm_fcvtzu_sx (code, dreg, sreg1);
break;
case OP_RCONV_TO_I8:
case OP_RCONV_TO_I:
arm_fcvtzs_sx (code, dreg, sreg1);
break;
case OP_RCONV_TO_U8:
Expand Down
10 changes: 2 additions & 8 deletions src/mono/mono/mini/mini-llvm.c
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Expand Up @@ -997,9 +997,6 @@ op_to_llvm_type (int opcode)
case OP_FCONV_TO_U8:
case OP_RCONV_TO_U8:
return LLVMInt64Type ();
case OP_FCONV_TO_I:
case OP_RCONV_TO_I:
return TARGET_SIZEOF_VOID_P == 8 ? LLVMInt64Type () : LLVMInt32Type ();
case OP_IADD_OVF:
case OP_IADD_OVF_UN:
case OP_ISUB_OVF:
Expand Down Expand Up @@ -6594,10 +6591,6 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
case OP_RCONV_TO_I8:
values [ins->dreg] = LLVMBuildFPToSI (builder, lhs, LLVMInt64Type (), dname);
break;
case OP_FCONV_TO_I:
case OP_RCONV_TO_I:
values [ins->dreg] = LLVMBuildFPToSI (builder, lhs, IntPtrType (), dname);
break;
case OP_ICONV_TO_R8:
case OP_LCONV_TO_R8:
values [ins->dreg] = LLVMBuildSIToFP (builder, lhs, LLVMDoubleType (), dname);
Expand Down Expand Up @@ -7804,8 +7797,8 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
break;
case OP_FMAX:
case OP_FMIN: {
LLVMValueRef args [] = { l, r };
#if defined(TARGET_X86) || defined(TARGET_AMD64)
LLVMValueRef args [] = { l, r };
LLVMTypeRef t = LLVMTypeOf (l);
LLVMTypeRef elem_t = LLVMGetElementType (t);
unsigned int elems = LLVMGetVectorSize (t);
Expand Down Expand Up @@ -7833,6 +7826,7 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
}

#elif defined(TARGET_ARM64)
LLVMValueRef args [] = { l, r };
IntrinsicId iid = ins->inst_c0 == OP_FMAX ? INTRINS_AARCH64_ADV_SIMD_FMAX : INTRINS_AARCH64_ADV_SIMD_FMIN;
llvm_ovr_tag_t ovr_tag = ovr_tag_from_mono_vector_class (ins->klass);
result = call_overloaded_intrins (ctx, iid, ovr_tag, args, "");
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/mini-mips.c
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Expand Up @@ -4266,7 +4266,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
break;
case OP_FCONV_TO_U4:
Expand Down
1 change: 0 additions & 1 deletion src/mono/mono/mini/mini-ppc.c
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Expand Up @@ -4159,7 +4159,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
break;
case OP_FCONV_TO_U4:
Expand Down
4 changes: 0 additions & 4 deletions src/mono/mono/mini/mini-runtime.c
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Expand Up @@ -4811,10 +4811,6 @@ register_icalls (void)
register_opcode_emulation (OP_FCONV_TO_U1, __emul_fconv_to_u1, mono_icall_sig_uint8_double, mono_fconv_u1, FALSE);
register_opcode_emulation (OP_FCONV_TO_U2, __emul_fconv_to_u2, mono_icall_sig_uint16_double, mono_fconv_u2, FALSE);

#if TARGET_SIZEOF_VOID_P == 4
register_opcode_emulation (OP_FCONV_TO_I, __emul_fconv_to_i, mono_icall_sig_int32_double, mono_fconv_i4, FALSE);
#endif

register_opcode_emulation (OP_FBEQ, __emul_fcmp_eq, mono_icall_sig_uint32_double_double, mono_fcmp_eq, FALSE);
register_opcode_emulation (OP_FBLT, __emul_fcmp_lt, mono_icall_sig_uint32_double_double, mono_fcmp_lt, FALSE);
register_opcode_emulation (OP_FBGT, __emul_fcmp_gt, mono_icall_sig_uint32_double_double, mono_fcmp_gt, FALSE);
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/mini-s390x.c
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Expand Up @@ -4296,7 +4296,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
}
break;
case OP_FCONV_TO_I8:
case OP_FCONV_TO_I:
s390_cgdbr (code, ins->dreg, 5, ins->sreg1);
break;
case OP_FCONV_TO_U8:
Expand Down Expand Up @@ -4351,7 +4350,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
}
break;
case OP_RCONV_TO_I8:
case OP_RCONV_TO_I:
s390_cgebr (code, ins->dreg, 5, ins->sreg1);
break;
case OP_RCONV_TO_U8:
Expand Down
3 changes: 0 additions & 3 deletions src/mono/mono/mini/mini-sparc.c
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Expand Up @@ -3393,9 +3393,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
case OP_FCONV_TO_U1:
case OP_FCONV_TO_I2:
case OP_FCONV_TO_U2:
#ifndef SPARCV9
case OP_FCONV_TO_I:
#endif
case OP_FCONV_TO_I4:
case OP_FCONV_TO_U4: {
MonoInst *spill = cfg->arch.float_spill_slot;
Expand Down
2 changes: 0 additions & 2 deletions src/mono/mono/mini/mini-x86.c
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Expand Up @@ -3510,7 +3510,6 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
break;
case OP_FCONV_TO_I8:
Expand Down Expand Up @@ -6155,7 +6154,6 @@ mono_arch_decompose_opts (MonoCompile *cfg, MonoInst *ins)
case OP_FCONV_TO_I2:
case OP_FCONV_TO_U2:
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
break;
default:
return;
Expand Down