Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Mono] Add SIMD intrinsic for Vector64/128 comparisons #65128

Merged
merged 15 commits into from
Feb 25, 2022
Merged

[Mono] Add SIMD intrinsic for Vector64/128 comparisons #65128

Changes from 1 commit
Commits
Show all changes
15 commits
Select commit Hold shift + click to select a range
dd0b05a
Add vector comparison intrinsics
simonrozsival Feb 10, 2022
e397416
Add EqualsAll and EqualsAny intrinsics
simonrozsival Feb 11, 2022
7c9dc2a
Merge branch 'main' into vector-intrinsics-eq-gt-geq-lt-leq
simonrozsival Feb 11, 2022
6d01474
Remove broken EqualsAny
simonrozsival Feb 14, 2022
9434cf9
Fix EqualsAny
simonrozsival Feb 15, 2022
c6882fe
Merge branch 'main' of https://github.com/dotnet/runtime into vector-…
simonrozsival Feb 15, 2022
9120f8e
Enable xequal also for arm64
simonrozsival Feb 22, 2022
ba3b3e2
Fix xzero type
simonrozsival Feb 22, 2022
0cd0a3a
Merge branch 'main' into vector-intrinsics-eq-gt-geq-lt-leq
simonrozsival Feb 22, 2022
ed8f56b
Fix bad merge
simonrozsival Feb 22, 2022
a35683b
Add guards for invalid types
simonrozsival Feb 23, 2022
82a7672
Revert unrelated change
simonrozsival Feb 24, 2022
862cda9
Extract duplicate code blocks to a new function
simonrozsival Feb 24, 2022
20113c3
Fix EqualsAny
simonrozsival Feb 24, 2022
1c0f52d
Fix typo + code improvements
simonrozsival Feb 24, 2022
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
32 changes: 32 additions & 0 deletions src/mono/mono/mini/simd-intrinsics.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -580,10 +580,15 @@ static guint16 sri_vector_methods [] = {
SN_Create,
SN_CreateScalar,
SN_CreateScalarUnsafe,
SN_Equals,
SN_Floor,
SN_GetElement,
SN_GetLower,
SN_GetUpper,
SN_GreaterThan,
SN_GreaterThanOrEqual,
SN_LessThan,
SN_LessThanOrEqual,
SN_ToScalar,
SN_ToVector128,
SN_ToVector128Unsafe,
Expand Down Expand Up @@ -698,6 +703,33 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
int op = id == SN_GetLower ? OP_XLOWER : OP_XUPPER;
return emit_simd_ins_for_sig (cfg, klass, op, 0, arg0_type, fsig, args);
}
case SN_Equals:
case SN_GreaterThan:
case SN_GreaterThanOrEqual:
case SN_LessThan:
case SN_LessThanOrEqual: {
gboolean is_unsigned = type_is_unsigned (fsig->params [0]);
MonoInst *ins = emit_xcompare (cfg, klass, arg0_type, args [0], args [1]);
switch (id) {
case SN_Equals:
break;
case SN_GreaterThan:
ins->inst_c0 = is_unsigned ? CMP_GT_UN : CMP_GT;
break;
case SN_GreaterThanOrEqual:
ins->inst_c0 = is_unsigned ? CMP_GE_UN : CMP_GE;
break;
case SN_LessThan:
ins->inst_c0 = is_unsigned ? CMP_LT_UN : CMP_LT;
break;
case SN_LessThanOrEqual:
ins->inst_c0 = is_unsigned ? CMP_LE_UN : CMP_LE;
break;
default:
g_assert_not_reached ();
}
return ins;
}
case SN_ToScalar: {
MonoType *arg_type = get_vector_t_elem_type (fsig->params [0]);
if (!MONO_TYPE_IS_INTRINSICS_VECTOR_PRIMITIVE (arg_type))
Expand Down