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update the location of assert for REG_ZR check #112294

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Feb 8, 2025
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5 changes: 4 additions & 1 deletion src/coreclr/jit/emitarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5860,11 +5860,11 @@ void emitter::emitIns_R_R_I(instruction ins,
else
{
assert(isGeneralRegisterOrSP(reg1));
assert(isGeneralRegisterOrSP(reg2));

// Is it just a mov?
if (imm == 0)
{
assert(isGeneralRegisterOrSP(reg2));
emitIns_Mov(INS_mov, attr, reg1, reg2, /* canSkip */ true);
return;
}
Expand All @@ -5875,6 +5875,9 @@ void emitter::emitIns_R_R_I(instruction ins,
return;
}

// reg2 can be alread encoded to zero
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Suggested change
// reg2 can be alread encoded to zero
// reg2 can be already encoded to zero

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ok to fix in next batch? don't want to run CI again.

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Sure

assert(isGeneralRegisterOrSP(reg2) || (reg2 == REG_ZR));

reg1 = encodingSPtoZR(reg1);
reg2 = encodingSPtoZR(reg2);
}
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