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Mitigate performance impact of respecting FP bit
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Switching from a static OpcodeGrabber table to a curOpcodeGrabber
pointer in ppc_main_opcode results in an extra indirection (as far as
generated assembly having an additional load), which reduces execution
speed.

Make curOpcodeGrabber into its own array, and copy the current opcode
table into it when the FP bit in the MSR changes.
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mihaip committed Jan 22, 2025
1 parent 7df166a commit 41d2344
Showing 1 changed file with 11 additions and 2 deletions.
13 changes: 11 additions & 2 deletions cpu/ppc/ppcexec.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -189,10 +189,17 @@ static PPCOpcode OpcodeGrabber[64 * 2048];
everything else is the same.*/
static PPCOpcode OpcodeGrabberNoFPU[64 * 2048];

static PPCOpcode* curOpcodeGrabber = OpcodeGrabberNoFPU;
/** The contents of either OpcodeGrabber or OpcodeGrabberNoFPU, depending on the MSR::FP bit.
A copy to avoid an memory extra indirection in ppc_main_opcode(). */
static PPCOpcode curOpcodeGrabber[64 * 2048];

void ppc_msr_did_change() {
curOpcodeGrabber = ppc_state.msr & MSR::FP ? OpcodeGrabber : OpcodeGrabberNoFPU;
static bool curr_has_fp = false;
bool has_fp = ppc_state.msr & MSR::FP;
if (has_fp != curr_has_fp) {
std::memcpy(curOpcodeGrabber, has_fp ? OpcodeGrabber : OpcodeGrabberNoFPU, sizeof(OpcodeGrabber));
curr_has_fp = has_fp;
}
}

/** Exception helpers. */
Expand Down Expand Up @@ -786,6 +793,8 @@ void initialize_ppc_opcode_table() {
if (OpcodeGrabberNoFPU[i] != ppc_fpu_off) {
OpcodeGrabberNoFPU[i] = OpcodeGrabber[i];
}
// MSR is initially 0 and thus there's no FPU.
curOpcodeGrabber[i] = OpcodeGrabberNoFPU[i];
}
}

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