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devtools/td-layout-config: handle ROM layout seperately
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Add ROM layout configuration in implementation to make it easier to
calculate the ROM bases and image offsets.

Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com>
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gaojiaqi7 committed Mar 31, 2024
1 parent 9bd29eb commit ddf9c5c
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Showing 3 changed files with 85 additions and 67 deletions.
111 changes: 62 additions & 49 deletions devtools/td-layout-config/src/image.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,9 @@ use serde::Deserialize;

use super::{layout::LayoutConfig, render};

const FIRMWARE_ROM_BASE: usize = 0xFF00_0000;
const FIRMWARE_ROM_SIZE: usize = 0x100_0000;

#[derive(Deserialize, Debug, PartialEq)]
struct ImageConfig {
#[serde(rename = "Payload")]
Expand All @@ -28,60 +31,70 @@ pub fn parse_image(data: String) -> String {
let image_config = serde_json::from_str::<ImageConfig>(&data)
.expect("Content is configuration file is invalid");

let mut image_layout = LayoutConfig::new(0, 0x100_0000);
let config_size = parse_int::parse::<u32>(&image_config.config).unwrap() as usize;
let mailbox_size = parse_int::parse::<u32>(&image_config.mailbox).unwrap() as usize;
let temp_stack_size = parse_int::parse::<u32>(&image_config.temp_stack).unwrap() as usize;
let temp_heap_size = parse_int::parse::<u32>(&image_config.temp_heap).unwrap() as usize;
let reset_vector_size = parse_int::parse::<u32>(&image_config.reset_vector).unwrap() as usize;
let ipl_size = parse_int::parse::<u32>(&image_config.bootloader).unwrap() as usize;
let metadata_size = parse_int::parse::<u32>(&image_config.metadata).unwrap() as usize;
let payload_size = parse_int::parse::<u32>(
&image_config
.builtin_payload
.unwrap_or_else(|| "0".to_string()),
)
.unwrap() as usize;
let td_info_size =
parse_int::parse::<u32>(&image_config.td_info.unwrap_or_else(|| "0".to_string())).unwrap()
as usize;

if let Some(payload_config) = image_config.builtin_payload {
image_layout.reserve_low(
"Payload",
parse_int::parse::<u32>(&payload_config).unwrap() as usize,
"Reserved",
)
// Build firmware image layout
let image_size = config_size
+ reset_vector_size
+ mailbox_size
+ temp_heap_size
+ temp_stack_size
+ ipl_size
+ metadata_size
+ payload_size
+ td_info_size;
let mut image_layout = LayoutConfig::new(0, image_size);
if payload_size != 0 {
image_layout.reserve_low("Payload", payload_size, "Image")
}
image_layout.reserve_low("Config", config_size, "Image");
image_layout.reserve_low("Mailbox", mailbox_size, "Image");
image_layout.reserve_low("TempStack", temp_stack_size, "Image");
image_layout.reserve_low("TempHeap", temp_heap_size, "Image");
image_layout.reserve_high("ResetVector", reset_vector_size, "Image");
image_layout.reserve_high("Ipl", ipl_size, "Image");
image_layout.reserve_high("Metadata", metadata_size, "Image");
if td_info_size != 0 {
image_layout.reserve_high("TdInfo", td_info_size, "Image")
}
image_layout.reserve_low(
"Config",
parse_int::parse::<u32>(&image_config.config).unwrap() as usize,
"Reserved",
);
image_layout.reserve_low(
"Mailbox",
parse_int::parse::<u32>(&image_config.mailbox).unwrap() as usize,
"Reserved",
);
image_layout.reserve_low(
"TempStack",
parse_int::parse::<u32>(&image_config.temp_stack).unwrap() as usize,
"Reserved",
);
image_layout.reserve_low(
"TempHeap",
parse_int::parse::<u32>(&image_config.temp_heap).unwrap() as usize,
"Reserved",
);

image_layout.reserve_high(
"ResetVector",
parse_int::parse::<u32>(&image_config.reset_vector).unwrap() as usize,
"Reserved",
);
image_layout.reserve_high(
"Ipl",
parse_int::parse::<u32>(&image_config.bootloader).unwrap() as usize,
"Reserved",
);
// Build ROM layout at memory space: 0xFF00_0000 - 0xFFFF_FFFF
// Payload image is not loaded into ROM space.
let mut rom_layout =
LayoutConfig::new(FIRMWARE_ROM_BASE, FIRMWARE_ROM_BASE + FIRMWARE_ROM_SIZE);

image_layout.reserve_high(
"Metadata",
parse_int::parse::<u32>(&image_config.metadata).unwrap() as usize,
"Reserved",
);
if image_size > FIRMWARE_ROM_SIZE {
panic!("Image size exceeds the maximum ROM space");
}

if let Some(td_info_config) = image_config.td_info {
image_layout.reserve_high(
"TdInfo",
parse_int::parse::<u32>(&td_info_config).unwrap() as usize,
"Reserved",
)
if payload_size != 0 {
image_layout.reserve_low("Payload", payload_size, "Rom")
}
rom_layout.reserve_low("Config", config_size, "Rom");
rom_layout.reserve_low("Mailbox", mailbox_size, "Rom");
rom_layout.reserve_low("TempStack", temp_stack_size, "Rom");
rom_layout.reserve_low("TempHeap", temp_heap_size, "Rom");
rom_layout.reserve_high("ResetVector", reset_vector_size, "Rom");
rom_layout.reserve_high("Ipl", ipl_size, "Rom");
rom_layout.reserve_high("Metadata", metadata_size, "Rom");
if td_info_size != 0 {
rom_layout.reserve_high("TdInfo", td_info_size, "Rom")
}

render::render_image(&image_layout).expect("Render image layout failed!")
render::render_image(&image_layout, &rom_layout).expect("Render image layout failed!")
}
10 changes: 5 additions & 5 deletions devtools/td-layout-config/src/render.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ use tera::{Context, Result, Tera};
use super::layout::{LayoutConfig, ENTRY_TYPE_FILTER};

/// Render image layout file.
pub fn render_image(image_layout: &LayoutConfig) -> Result<String> {
pub fn render_image(image_layout: &LayoutConfig, rom_layout: &LayoutConfig) -> Result<String> {
let mut tera = Tera::default();
tera.register_filter("format_hex", format_hex);
tera.register_filter("format_name", format_name);
Expand All @@ -19,12 +19,12 @@ pub fn render_image(image_layout: &LayoutConfig) -> Result<String> {
let mut context = Context::new();
context.insert("image_regions", image_layout.get_regions());
context.insert("image_size", &image_layout.get_top());
context.insert("rom_regions", &rom_layout.get_regions());
context.insert("rom_size", &(rom_layout.get_top() - rom_layout.get_base()));
// Image size - metadata pointer offset(0x20) - OVMF GUID table size(0x28) - SEC Core information size(0xC).
context.insert("sec_info_offset", &(image_layout.get_top() - 0x54));
context.insert(
"memory_offset",
&(u32::MAX as usize + 1 - &image_layout.get_top()),
);
context.insert("sec_info_base", &(rom_layout.get_top() - 0x54));
context.insert("rom_base", &rom_layout.get_base());
context.insert("entry_type_filter", ENTRY_TYPE_FILTER);
tera.render("image.rs", &context)
}
Expand Down
31 changes: 18 additions & 13 deletions devtools/td-layout-config/src/template/image.jinja
Original file line number Diff line number Diff line change
Expand Up @@ -14,21 +14,26 @@ Image Layout
Image size: {{image_size|format_hex}} ({{image_size|filesizeformat}})
*/

// Image Layout Configuration
{%for i in image_regions%}
// Image configuration
pub const TD_SHIM_IMAGE_SIZE: u32 = {{image_size | format_hex }};
{%-for i in image_regions%}
pub const TD_SHIM_{{i.name_screaming_snake_case}}_OFFSET: u32 = {{i.region.start | format_hex }};
pub const TD_SHIM_{{i.name_screaming_snake_case}}_SIZE: u32 = {{i.region.end - i.region.start | format_hex }}; // {{i.region.end - i.region.start|filesizeformat}}
{%endfor%}
// Offset when Loading into Memory
pub const TD_SHIM_FIRMWARE_BASE: u32 = {{memory_offset | format_hex }};
pub const TD_SHIM_FIRMWARE_SIZE: u32 = {{image_size | format_hex }};
{%-endfor%}

// Size of regions
{%-for i in image_regions%}
pub const TD_SHIM_{{i.name_screaming_snake_case}}_SIZE: u32 = {{i.region.end - i.region.start | format_hex }};
{%-endfor%}

// ROM configuration
pub const TD_SHIM_FIRMWARE_BASE: u32 = {{rom_base | format_hex }};
pub const TD_SHIM_FIRMWARE_SIZE: u32 = {{rom_size | format_hex }};

{%-for i in rom_regions%}
pub const TD_SHIM_{{i.name_screaming_snake_case}}_BASE: u32 = {{i.region.start | format_hex }};
{%-endfor%}

// TD_SHIM_SEC_INFO_OFFSET equals to firmware size - metadata pointer offset -
// OVMF GUID table size - SEC Core information size.
pub const TD_SHIM_SEC_CORE_INFO_OFFSET: u32 = {{sec_info_offset | format_hex }};
pub const TD_SHIM_SEC_CORE_INFO_BASE: u32 = {{memory_offset + sec_info_offset | format_hex }};

// Base Address after Loaded into Memory
{%-for i in image_regions%}
pub const TD_SHIM_{{i.name_screaming_snake_case}}_BASE: u32 = {{memory_offset + i.region.start | format_hex }};
{%-endfor%}
pub const TD_SHIM_SEC_CORE_INFO_BASE: u32 = {{sec_info_base | format_hex }};

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