minichlink: add ch641

cnlohr · Mar 6, 2025 · e1de487 · e1de487
1 parent 5219910
commit e1de487
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Showing 4 changed files with 41 additions and 8 deletions.
diff --git a/ch32fun/README.md b/ch32fun/README.md
@@ -33,7 +33,7 @@
 |USBPD         |N/A |N/A |N/A |N/A |N/A |1.4 | ×  | ×  |1.2 |
 |WWWDG         | √  | x  | √  | x  | x  | √  | ×  | ×  | √  |
 |**chxxxhw.h** | √  | x  | √  | √  | √  | √  | x  | x  | √  |
-|**minichlink**| √  | x  | √  | √  | √  | √  | x  | x  | +  |
+|**minichlink**| √  | x  | √  | √  | √  | √  | x  | x  | √  |
 
 * n.m:  Last commit message of the header file in ch32xxx/EVT/EXAM/SRC/Peripheral/inc
 * √:    Merged in , version unspecified

diff --git a/minichlink/minichlink.c b/minichlink/minichlink.c
@@ -1046,15 +1046,18 @@ int DefaultDetermineChipType( void * dev )
 		MCF.WriteReg32( dev, DMCOMMAND, 0x00231008 );		// Copy data to x8
 		MCF.WriteReg32( dev, DMDATA0, old_data0 );
 
+		uint32_t chip_type = (vendorid & 0xfff00000)>>20;
+		printf( "Chip Type: %03x\n", chip_type );
 		if( data0offset == 0xe00000f4 )
 		{
-			// Only known processor with this signature = 0 is a CH32V003.
-			switch( vendorid >> 20 )
+			// Only known processor with this signature = 0 is qingke-v2.
+			switch( chip_type )
 			{
 			case 0x002: iss->target_chip_type = CHIP_CH32V002; break;
 			case 0x004: iss->target_chip_type = CHIP_CH32V004; break;
 			case 0x005: iss->target_chip_type = CHIP_CH32V005; break;
 			case 0x006: iss->target_chip_type = CHIP_CH32V006; break;
+			case 0x641: iss->target_chip_type = CHIP_CH641; break;
 			default:    iss->target_chip_type = CHIP_CH32V003; break; // not usually 003
 			}
 			// Examples:
@@ -1065,8 +1068,6 @@ int DefaultDetermineChipType( void * dev )
 		else if( data0offset == 0xe0000380 )
 		{
 			// All other known chips.
-			uint32_t chip_type = (vendorid & 0xfff00000)>>20;
-			printf( "Chip Type: %03x\n", chip_type );
 			switch( chip_type )
 			{
 				case 0x103:
@@ -1341,7 +1342,7 @@ static int DefaultWriteWord( void * dev, uint32_t address_to_write, uint32_t dat
 			// fc75 c.bnez x8, -4
 			// c.ebreak
 			MCF.WriteReg32( dev, DMPROGBUF3, 
-				(iss->target_chip_type == CHIP_CH32X03x || iss->target_chip_type == CHIP_CH32V003 || (iss->target_chip_type >= CHIP_CH32V002 && iss->target_chip_type <= CHIP_CH32V006 ) ) ? 
+				(iss->target_chip_type == CHIP_CH32X03x || iss->target_chip_type == CHIP_CH32V003 || iss->target_chip_type == CHIP_CH641 || (iss->target_chip_type >= CHIP_CH32V002 && iss->target_chip_type <= CHIP_CH32V006 ) ) ? 
 				0x4200c254 : 0x42000001  );
 
 			MCF.WriteReg32( dev, DMPROGBUF4,
@@ -2143,6 +2144,7 @@ void PostSetupConfigureInterface( void * dev )
 		break;
 	default:
 	case CHIP_CH32V003:
+	case CHIP_CH641:
 		iss->sector_size = 64;
 		iss->nr_registers_for_debug = 16;
 		break;
@@ -2492,7 +2494,7 @@ int DefaultUnbrick( void * dev )
 	InternalUnlockFlash(dev, iss);
 
 	const uint8_t * option_data = 
-		( iss->target_chip_type == CHIP_CH32X03x || iss->target_chip_type == CHIP_CH32V003 || (iss->target_chip_type >= CHIP_CH32V002 && iss->target_chip_type <= CHIP_CH32V006 ) ) ?
+		( iss->target_chip_type == CHIP_CH32X03x || iss->target_chip_type == CHIP_CH32V003 || iss->target_chip_type == CHIP_CH641 || (iss->target_chip_type >= CHIP_CH32V002 && iss->target_chip_type <= CHIP_CH32V006 ) ) ?
 		option_data_003_x03x : option_data_20x_30x;
 
 	DefaultWriteBinaryBlob(dev, 0x1ffff800, 16, option_data );

diff --git a/minichlink/minichlink.h b/minichlink/minichlink.h
@@ -118,13 +118,21 @@ enum RiscVChip {
 	CHIP_CH32V30x = 0x06,
 	CHIP_CH58x = 0x07,
 	CHIP_CH32V003 = 0x09,
+	CHIP_CH59x = 0x0b,
+	CHIP_CH643 = 0x0c,
 	CHIP_CH32X03x = 0x0d,
+	CHIP_CH32L10x = 0x0e,
+	CHIP_CH564 = 0x0f,
 
 
 	CHIP_CH32V002 = 0x22,
 	CHIP_CH32V004 = 0x24,
 	CHIP_CH32V005 = 0x25,
 	CHIP_CH32V006 = 0x26,
+
+	CHIP_CH645 = 0x46,
+	CHIP_CH641 = 0x49,
+	CHIP_CH32V317 = 0x86,
 };
 
 enum RAMSplit {

diff --git a/minichlink/pgm-wch-linke.c b/minichlink/pgm-wch-linke.c
@@ -40,9 +40,21 @@ static void printChipInfo(enum RiscVChip chip) {
 		case CHIP_CH58x:
 			fprintf(stderr, "Detected: CH58x\n");
 			break;
+		case CHIP_CH59x:
+			fprintf(stderr, "Detected: CH59x\n");
+			break;
+		case CHIP_CH643:
+			fprintf(stderr, "Detected: CH643\n");
+			break;
 		case CHIP_CH32X03x:
 			fprintf(stderr, "Detected: CH32X03x\n");
 			break;
+		case CHIP_CH32L10x:
+			fprintf(stderr, "Detected: CH32L10x\n");
+			break;
+		case CHIP_CH564:
+			fprintf(stderr, "Detected: CH564\n");
+			break;
 		case CHIP_CH32V003:
 			fprintf(stderr, "Detected: CH32V003\n");
 			break;
@@ -58,6 +70,15 @@ static void printChipInfo(enum RiscVChip chip) {
 		case CHIP_CH32V006:
 			fprintf(stderr, "Detected: CH32V006\n");
 			break;
+		case CHIP_CH645:
+			fprintf(stderr, "Detected: CH645\n");
+			break;
+		case CHIP_CH641:
+			fprintf(stderr, "Detected: CH641\n");
+			break;
+		case CHIP_CH32V317:
+			fprintf(stderr, "Detected: CH32V317\n");
+			break;
 	}
 }
 
@@ -70,6 +91,7 @@ static int checkChip(enum RiscVChip chip) {
 		case CHIP_CH32V004:
 		case CHIP_CH32V006:
 		case CHIP_CH32V005:
+		case CHIP_CH641:
 			return 0; // Use direct mode
 		case CHIP_CH32V10x:
 		case CHIP_CH32V20x:
@@ -444,7 +466,8 @@ static int LESetupInterface( void * d )
 		// It's one of the 00x's.  AND we're on a new programmer, so no need to unknown' it.
 		chip = CHIP_CH32V006;
 	}
-	else if( ( chip == 0x08 || chip > 0x09 ) && chip != CHIP_CH32X03x ) {
+	else if( ( chip == 0x04 || chip == 0x08 || chip == 0x0a || chip > 0x0f )
+		&& chip != CHIP_CH645  && chip != CHIP_CH641 && chip != CHIP_CH32V317 ) {
 		fprintf( stderr, "Chip Type unknown [%02x]. Aborting...\n", chip );
 		return -1;
 	}