MOVEQ generally better on all 68K than CLR for register

[GunnarVB]

Hello Bebbo,

I hope you are doing fine.
Please allow me to point out a possible general improvement for all 68K CPUs.

File: gcc/gcc/config/m68k/m68k.c

static const char *
output_move_simode_const (rtx *operands)
{
  rtx dest;
  HOST_WIDE_INT src;

  dest = operands[0];
  src = INTVAL (operands[1]);
  if (src == 0
      && (DATA_REG_P (dest) || MEM_P (dest))
      /* clr insns on 68000 read before writing.  */
      && ((TARGET_68010 || TARGET_COLDFIRE)
          || !(MEM_P (dest) && MEM_VOLATILE_P (dest))))
    return "clr%.l %0";

The current code uses CLR.L for setting DN to 0
Optimal is always to use MOVEQ #0 for this.

A good solution would be to write it like this:

static const char *
output_move_simode_const (rtx *operands)
{
  rtx dest;
  HOST_WIDE_INT src;

  dest = operands[0];
  src = INTVAL (operands[1]);
  if (src == 0 && (DATA_REG_P (dest) ))         // For clear DN MOVEQ is best
    return "moveq #0,%0";
  else if (src == 0 && MEM_P (dest)             // For memory use CLR
                                                // but not for IO register on 68000
          && ((TARGET_68010  TARGET_COLDFIRE)  !(MEM_P (dest) && MEM_VOLATILE_P (dest))))
    return "clr%.l %0";
  else if (GET_MODE (dest) == SImode && valid_mov3q_const (src))
    return "mov3q%.l %1,%0";
  else if (src == 0 && ADDRESS_REG_P (dest))    // For AN always use SUBA
    return "suba%.l %0,%0";

Please do this change to generally make the code better suited for all 68K members.
Thank you