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[Relax] Initial setup of relax backend pipeline
This PR sets up the initial relax backend pipeline, as per thread in https://discuss.tvm.apache.org/t/relax-target-default-pipeline. Particularly, we organized default list of passes in the default pipeline into four stages: * library dispatch passes, * legalize passes, * dataflow lower passes, * finalize passes. The expectation is to have the default pipeline work out of the box, while users can still choose to customize the pipeline by importing these lists and combining them together, with customized passes inserted at proper locations. In this PR, we set up the initial pipelines for CUDA and LLVM backends. The pipelines for both backends will be enhanced and completed in the near future, and meanwhile the default pipeline for more backends (e.g., generic GPUs) will be added. The existing pipeline registry system in python/tvm/relax/pipeline.py will be gradually deprecated after the establishment of the new relax backend pipeline.
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""The Relax CPU backend compilation pipeline and other passes.""" | ||
from .pipeline import ( | ||
finalize_passes, | ||
get_default_pipeline, | ||
legalize_passes, | ||
library_dispatch_passes, | ||
) |
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""The Relax CPU backend compilation pipeline and other passes.""" | ||
import tvm | ||
from tvm import relax | ||
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def library_dispatch_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default library dispatch passes for CPU backend.""" | ||
return [] | ||
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def legalize_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default legalization passes for CPU backend.""" | ||
return [ | ||
tvm.relax.transform.LegalizeOps(), | ||
tvm.relax.transform.AnnotateTIROpPattern(), | ||
tvm.relax.transform.FoldConstant(), | ||
tvm.relax.transform.FuseOps(), | ||
tvm.relax.transform.FuseTIR(), | ||
] | ||
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def dataflow_lower_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default dataflow lowering passes for CPU backend.""" | ||
return [ | ||
relax.transform.RewriteDataflowReshape(), | ||
relax.transform.ToNonDataflow(), | ||
relax.transform.RemovePurityChecking(), | ||
relax.transform.CallTIRRewrite(), | ||
] | ||
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def finalize_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default finalization passes for CPU backend.""" | ||
return [ | ||
relax.transform.StaticPlanBlockMemory(), | ||
relax.transform.LowerAllocTensor(), | ||
relax.transform.KillAfterLastUse(), | ||
relax.transform.LowerRuntimeBuiltin(), | ||
relax.transform.ComputePrimValue(), | ||
relax.transform.VMShapeLower(), | ||
relax.transform.AttachGlobalSymbol(), | ||
] | ||
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def get_default_pipeline(target: tvm.target.Target): | ||
"""Return the default compilation pipeline for CPU.""" | ||
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@tvm.transform.module_pass(opt_level=0) | ||
def _pipeline(mod: tvm.ir.IRModule, _ctx: tvm.transform.PassContext): | ||
with target: | ||
seq = tvm.transform.Sequential( | ||
library_dispatch_passes(target) | ||
+ legalize_passes(target) | ||
+ dataflow_lower_passes(target) | ||
+ finalize_passes(target) | ||
) | ||
mod = seq(mod) | ||
return mod | ||
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return _pipeline |
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""The Relax CUDA backend compilation pipeline and other passes.""" | ||
from .pipeline import ( | ||
finalize_passes, | ||
get_default_pipeline, | ||
legalize_passes, | ||
library_dispatch_passes, | ||
) |
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""The Relax CUDA backend compilation pipeline and other passes.""" | ||
import tvm | ||
from tvm import dlight as dl | ||
from tvm import relax | ||
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def library_dispatch_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default library dispatch passes for CUDA backend.""" | ||
return [ | ||
relax.backend.DispatchSampling(), | ||
relax.backend.DispatchSortScan(), | ||
] | ||
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def legalize_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default legalization passes for CUDA backend.""" | ||
return [ | ||
tvm.relax.transform.LegalizeOps(), | ||
tvm.relax.transform.AnnotateTIROpPattern(), | ||
tvm.relax.transform.FoldConstant(), | ||
tvm.relax.transform.FuseOps(), | ||
tvm.relax.transform.FuseTIR(), | ||
dl.ApplyDefaultSchedule( | ||
dl.gpu.Matmul(), | ||
dl.gpu.GEMV(), | ||
dl.gpu.Reduction(), | ||
dl.gpu.GeneralReduction(), | ||
dl.gpu.Fallback(), | ||
), | ||
] | ||
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def dataflow_lower_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default dataflow lowering passes for CUDA backend.""" | ||
return [ | ||
relax.transform.RewriteDataflowReshape(), | ||
relax.transform.ToNonDataflow(), | ||
relax.transform.RemovePurityChecking(), | ||
relax.transform.CallTIRRewrite(), | ||
] | ||
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def finalize_passes(target: tvm.target.Target): # pylint: disable=unused-argument | ||
"""The default finalization passes for CUDA backend.""" | ||
return [ | ||
relax.transform.StaticPlanBlockMemory(), | ||
relax.transform.RewriteCUDAGraph(), | ||
relax.transform.LowerAllocTensor(), | ||
relax.transform.KillAfterLastUse(), | ||
relax.transform.LowerRuntimeBuiltin(), | ||
relax.transform.ComputePrimValue(), | ||
relax.transform.VMShapeLower(), | ||
relax.transform.AttachGlobalSymbol(), | ||
] | ||
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def get_default_pipeline(target: tvm.target.Target): | ||
"""Return the default compilation pipeline for CUDA.""" | ||
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@tvm.transform.module_pass(opt_level=0) | ||
def _pipeline(mod: tvm.ir.IRModule, _ctx: tvm.transform.PassContext): | ||
with target: | ||
seq = tvm.transform.Sequential( | ||
library_dispatch_passes(target) | ||
+ legalize_passes(target) | ||
+ dataflow_lower_passes(target) | ||
+ finalize_passes(target) | ||
) | ||
mod = seq(mod) | ||
return mod | ||
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return _pipeline |
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