[BUG] ESP32C6 - UsbConsole feature not working #15656

FelipeMdeO · 2025-01-22T18:05:28Z

Description / Steps to reproduce the issue

Hello All,

I am trying to use esp32c6 usbconsole example but the shell is stucking after I try send any character.
I tried with esp32c3 and everything is going well there.

I am investigating the issue, and trying to solve, if you have any tips, please feel free to share.

Steps to reproduce:
1 . ./tools/configure.sh esp32c6-devkitc:usbconsole
2 . connect to the board
3. inset any character and press enter. Shell will stuck.

@eren-terzioglu and @tmedicci will be good receive your help.

On which OS does this issue occur?

[OS: Linux]

What is the version of your OS?

ubuntu 24.0

NuttX Version

master

Issue Architecture

[Arch: risc-v]

Issue Area

[Area: Drivers]

Host information

Esptool version:
4.8.dev4

HAL version:
sync/release_v5.1.c-nuttx-20230814-1576-g87ccbf88b6

CHIP ID:
ESP32-C6 has no Chip ID. Reading MAC instead.

Flash ID:
Manufacturer: c8
Device: 4017

Verification

I have verified before submitting the report.

tmedicci · 2025-01-22T18:43:48Z

Hi @FelipeMdeO !

Thanks for reporting. We'll talk about it internally and address it according to our schedule.

FelipeMdeO · 2025-01-22T20:40:38Z

Hello.

I tried to build exactly commit that this feature was added:
git checkout 86efbcb -- apps
git checkout 9bd1d5d -- nuttx

It is so old and I cannot build, @acassis can you help me, please:

./tools/configure.sh esp32c6-generic:usbconsole
make CROSSDEV=riscv-none-elf-

I am facing build issues below:

CC:  clock/clock_settime.c /home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h: Assembler messages:
/home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h:675: Error: unrecognized opcode `csrrc s1,mstatus,s1', extension `zicsr' required
/home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h:700: Error: unrecognized opcode `csrw mstatus,s1', extension `zicsr' required
make[1]: *** [Makefile:60: clock_settime.o] Error 1
make: *** [tools/LibTargets.mk:65: sched/libsched.a] Error 2

Also, I tried checkout and run release/12.3 - the first release with this feature. There the usb console is stucked too.

Release 12.5 is the first release with esp32c6-usbconsole configuration, but this release has the same issue than master.

ABOUT ESP32C3

I am able to run properly usbconsole only using esp32c3-generic configuration, esp32c3-devkit isn't work.

FelipeMdeO · 2025-01-23T00:35:33Z

Hello All.

I want to share an strange behavior.
UsbConsole works properly when I remove compile optimization, in other words, the usbconsole stop to work when optimization flag change to -O2.

You can reproduce it going to menuconfig and changing Optimization Level to DEBUG_NOOPT.

I will continue the investigation.

eren-terzioglu · 2025-01-23T08:18:05Z

Hello.

I tried to build exactly commit that this feature was added: git checkout 86efbcb -- apps git checkout 9bd1d5d -- nuttx

It is so old and I cannot build, @acassis can you help me, please:

./tools/configure.sh esp32c6-generic:usbconsole make CROSSDEV=riscv-none-elf-

I am facing build issues below:
CC:  clock/clock_settime.c /home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h: Assembler messages:
/home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h:675: Error: unrecognized opcode `csrrc s1,mstatus,s1', extension `zicsr' required
/home/felipe-moura/nuttxspace/nuttx/include/arch/irq.h:700: Error: unrecognized opcode `csrw mstatus,s1', extension `zicsr' required
make[1]: *** [Makefile:60: clock_settime.o] Error 1
make: *** [tools/LibTargets.mk:65: sched/libsched.a] Error 2
Also, I tried checkout and run release/12.3 - the first release with this feature. There the usb console is stucked too.

Release 12.5 is the first release with esp32c6-usbconsole configuration, but this release has the same issue than master.

ABOUT ESP32C3

I am able to run properly usbconsole only using esp32c3-generic configuration, esp32c3-devkit isn't work.

Hello,

The reason about build error might related to compiler changes between versions. About esp32c3-devkit; it is old approach (not uses esp-hal-3rdparty properly), it might not work as expected and it is not high priority in our ToDo list.

FelipeMdeO · 2025-02-17T01:36:44Z

Hello @tmedicci, @eren-terzioglu,

After some analysis, I discovered that the esp_txint function exhibits divergent behavior depending on the RISC-V compiler optimization level.

I looked disassembles for both builds and cannot find a explicit reason for issue, but studying about I understand that the optimization removes implicit barriers (such as jumps and returns) that, combined with the absence of volatile qualifiers or explicit memory barriers, compromise hardware synchronization. In summary, the reordering of register accesses can affect the update of interrupt control bits, leading to system malfunctions.

Look for O0 buid:

Disassembly of section .text.esp_txint:

00000000 <esp_txint>:
   0:	1101                	add	sp,sp,-32
   2:	ce06                	sw	ra,28(sp)
   4:	c62a                	sw	a0,12(sp)
   6:	87ae                	mv	a5,a1
   8:	00f105a3          	sb	a5,11(sp)
   c:	00b14783          	lbu	a5,11(sp)
  10:	c799                	beqz	a5,1e <.L2>
  12:	4521                	li	a0,8
  14:	00000097          	auipc	ra,0x0
  18:	000080e7          	jalr	ra # 14 <esp_txint+0x14>
  1c:	a031                	j	28 <.L4>

0000001e <.L2>:
  1e:	4521                	li	a0,8
  20:	00000097          	auipc	ra,0x0
  24:	000080e7          	jalr	ra # 20 <.L2+0x2>

00000028 <.L4>:
  28:	0001                	nop
  2a:	40f2                	lw	ra,28(sp)
  2c:	6105                	add	sp,sp,32
  2e:	8082                	ret

Disassembly of section .text.usb_serial_jtag_ll_ena_intr_mask:

00000000 <usb_serial_jtag_ll_ena_intr_mask>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	8f49                	or	a4,a4,a0
   c:	cb98                	sw	a4,16(a5)
   e:	8082                	ret

Disassembly of section .text.usb_serial_jtag_ll_disable_intr_mask:

00000000 <usb_serial_jtag_ll_disable_intr_mask>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	fff54513          	not	a0,a0
   e:	8d79                	and	a0,a0,a4
  10:	cb88                	sw	a0,16(a5)
  12:	8082                	ret

and O2 build:

Disassembly of section .text.esp_txint:

00000000 <esp_txint>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	c589                	beqz	a1,14 <.L35>
   c:	00876713          	or	a4,a4,8

00000010 <.L37>:
  10:	cb98                	sw	a4,16(a5)
  12:	8082                	ret

00000014 <.L35>:
  14:	9b5d                	and	a4,a4,-9
  16:	bfed                	j	10 <.L37>

I was able usbconsole work change the code for:

__attribute__((optimize("O0")))
static void esp_txint(struct uart_dev_s *dev, bool enable)
{
  if (enable)
    {
      usb_serial_jtag_ll_ena_intr_mask(
        USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA);
    }
  else
    {
      usb_serial_jtag_ll_disable_intr_mask(
        USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA);
    }
}

I am not sure this is the right way to solve it, so I want know you opinion.

@acassis Will be good listen you also.

eren-terzioglu · 2025-02-18T13:21:14Z

Hello @tmedicci, @eren-terzioglu,

After some analysis, I discovered that the esp_txint function exhibits divergent behavior depending on the RISC-V compiler optimization level.

I looked disassembles for both builds and cannot find a explicit reason for issue, but studying about I understand that the optimization removes implicit barriers (such as jumps and returns) that, combined with the absence of volatile qualifiers or explicit memory barriers, compromise hardware synchronization. In summary, the reordering of register accesses can affect the update of interrupt control bits, leading to system malfunctions.

Look for O0 buid:

Disassembly of section .text.esp_txint:

00000000 <esp_txint>:
   0:	1101                	add	sp,sp,-32
   2:	ce06                	sw	ra,28(sp)
   4:	c62a                	sw	a0,12(sp)
   6:	87ae                	mv	a5,a1
   8:	00f105a3          	sb	a5,11(sp)
   c:	00b14783          	lbu	a5,11(sp)
  10:	c799                	beqz	a5,1e <.L2>
  12:	4521                	li	a0,8
  14:	00000097          	auipc	ra,0x0
  18:	000080e7          	jalr	ra # 14 <esp_txint+0x14>
  1c:	a031                	j	28 <.L4>

0000001e <.L2>:
  1e:	4521                	li	a0,8
  20:	00000097          	auipc	ra,0x0
  24:	000080e7          	jalr	ra # 20 <.L2+0x2>

00000028 <.L4>:
  28:	0001                	nop
  2a:	40f2                	lw	ra,28(sp)
  2c:	6105                	add	sp,sp,32
  2e:	8082                	ret

Disassembly of section .text.usb_serial_jtag_ll_ena_intr_mask:

00000000 <usb_serial_jtag_ll_ena_intr_mask>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	8f49                	or	a4,a4,a0
   c:	cb98                	sw	a4,16(a5)
   e:	8082                	ret

Disassembly of section .text.usb_serial_jtag_ll_disable_intr_mask:

00000000 <usb_serial_jtag_ll_disable_intr_mask>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	fff54513          	not	a0,a0
   e:	8d79                	and	a0,a0,a4
  10:	cb88                	sw	a0,16(a5)
  12:	8082                	ret

and O2 build:

Disassembly of section .text.esp_txint:

00000000 <esp_txint>:
   0:	000007b7          	lui	a5,0x0
   4:	00078793          	mv	a5,a5
   8:	4b98                	lw	a4,16(a5)
   a:	c589                	beqz	a1,14 <.L35>
   c:	00876713          	or	a4,a4,8

00000010 <.L37>:
  10:	cb98                	sw	a4,16(a5)
  12:	8082                	ret

00000014 <.L35>:
  14:	9b5d                	and	a4,a4,-9
  16:	bfed                	j	10 <.L37>

I was able usbconsole work change the code for:

__attribute__((optimize("O0")))
static void esp_txint(struct uart_dev_s *dev, bool enable)
{
  if (enable)
    {
      usb_serial_jtag_ll_ena_intr_mask(
        USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA);
    }
  else
    {
      usb_serial_jtag_ll_disable_intr_mask(
        USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA);
    }
}

I am not sure this is the right way to solve it, so I want know you opinion.

@acassis Will be good listen you also.

Hi @FelipeMdeO,
We are having a look and will write an update. Thanks for your effort.

tmedicci · 2025-02-20T15:18:24Z

Hi @FelipeMdeO , thanks for figuring it out! We won't be able to investigate it further soon, so your proposed fix is acceptable (turning off optimization for this function). Can you open a PR with this fix?

FelipeMdeO · 2025-02-20T15:26:07Z

Sure. I will!
Thank you.

acassis · 2025-02-20T15:45:53Z

@FelipeMdeO since the issue exist when using esp_hal and works in the esp32c3-legacy, please keep this Issue opened until someone fix it.

FelipeMdeO added the Type: Bug Something isn't working label Jan 22, 2025

github-actions bot added Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Area: Drivers Drivers issues OS: Linux Issues related to Linux (building system, etc) labels Jan 22, 2025

FelipeMdeO closed this as completed Feb 20, 2025

acassis reopened this Feb 20, 2025

This was referenced Feb 23, 2025

riscv/esp32c6: Fix issue related esp32c6 usbserial driver. #15895

Merged

arch/risc-v/common/espressif/espusbserial.c #15920

Merged

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[BUG] ESP32C6 - UsbConsole feature not working #15656

[BUG] ESP32C6 - UsbConsole feature not working #15656

FelipeMdeO commented Jan 22, 2025

tmedicci commented Jan 22, 2025

FelipeMdeO commented Jan 22, 2025

FelipeMdeO commented Jan 23, 2025

eren-terzioglu commented Jan 23, 2025

FelipeMdeO commented Feb 17, 2025

eren-terzioglu commented Feb 18, 2025

tmedicci commented Feb 20, 2025

FelipeMdeO commented Feb 20, 2025

acassis commented Feb 20, 2025 •

edited

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[BUG] ESP32C6 - UsbConsole feature not working #15656

[BUG] ESP32C6 - UsbConsole feature not working #15656

Comments

FelipeMdeO commented Jan 22, 2025

Description / Steps to reproduce the issue

On which OS does this issue occur?

What is the version of your OS?

NuttX Version

Issue Architecture

Issue Area

Host information

Verification

tmedicci commented Jan 22, 2025

FelipeMdeO commented Jan 22, 2025

FelipeMdeO commented Jan 23, 2025

eren-terzioglu commented Jan 23, 2025

FelipeMdeO commented Feb 17, 2025

eren-terzioglu commented Feb 18, 2025

tmedicci commented Feb 20, 2025

FelipeMdeO commented Feb 20, 2025

acassis commented Feb 20, 2025 • edited Loading

acassis commented Feb 20, 2025 •

edited

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