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Fix coproc halt esp32s3 #7115

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@jepler jepler commented Oct 24, 2022

I found that on the esp32-s3-eye, coproc.halt() frequently caused the main CPU to crash or CircuitPython to otherwise
become unresponsive. After experimentation, I arrived at this alternate reset/halt sequence.

I didn't do any testing on S2.

Closes: #7109

@jepler jepler requested a review from microdev1 October 24, 2022 19:25
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jepler commented Oct 24, 2022

This has survived dozen of iterations of

import time
import struct
from coproc import *
from coproc_manager import Program

print("waiting 15s")
time.sleep(15)

while True:
    program = Program("/a.out-stripped")
    shared_mem = program.get_symbol('shared_mem').entry.st_value
    print(f"{shared_mem=}")
    cm = CoprocMemory(0x50000000, 8176)
    c = Coproc(program.code)
    print(f"{shared_mem=}")


    try:
        run(c)

        for _ in range(2):
            cm[shared_mem] = 1
            time.sleep(.2)
            cm[shared_mem] = 2
            time.sleep(.2)
    finally:
        print("about to halt")
        time.sleep(.2)
        halt(c)
        print("returned from halt")
        time.sleep(.2)

@jepler jepler force-pushed the fix-coproc-halt-esp32s3 branch from 215247d to 4503b4d Compare October 25, 2022 01:01
This always trips me up, and starting a build without doing it
can even leave the build in a messed up state.  The outer 'if'
enables ci_set_matrix's way of invoking the Makefile still work
properly.
@jepler jepler marked this pull request as ready for review October 26, 2022 18:03
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The Technical Reference Manual for both esp32s2/s3 mentions the following halt sequence.

Before setting ULP-RISC-V to HALT, users should configure the register RTC_CNTL_COCPU_DONE first,
therefore, it is recommended to end the flashed program with the following pattern:
– Set the register RTC_CNTL_COCPU_DONE to end the operation of ULP-RISC-V and put it into halt;
– Set the register RTC_CNTL_COCPU_SHUT_RESET_EN to reset ULP-RISC-V.
Enough time is reserved for the ULP-RISC-V to complete the operations above before it goes to halt.

I suspect the root cause of the problem is something else.
I'll test with esp32s2 to check if it has the same issue, I believe both s2/s3 share the same coproc design.

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tannewt commented Nov 15, 2022

Any update @microdev1?

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@jepler Can you run the same code (both ulp and circuitpython) on esp32s2 as well.
I am unable to reproduce this with a simple blink example on esp32s2.

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jepler commented Nov 18, 2022

closing since I no longer get exactly this problem; not sure why.

@jepler jepler closed this Nov 18, 2022
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coproc.halt frequently misbehaves
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