README: add logo

Verilog-Solutions · Mar 4, 2019 · 108851a · 108851a
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diff --git a/README.md b/README.md
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 # Slither, the Solidity source analyzer
+<img src="./logo.png" alt="Logo" width="500"/>
+
 [![Build Status](https://travis-ci.com/trailofbits/slither.svg?token=JEF97dFy1QsDCfQ2Wusd&branch=master)](https://travis-ci.com/trailofbits/slither)
 [![Slack Status](https://empireslacking.herokuapp.com/badge.svg)](https://empireslacking.herokuapp.com)
 [![PyPI version](https://badge.fury.io/py/slither-analyzer.svg)](https://badge.fury.io/py/slither-analyzer)

diff --git a/logo.png b/logo.png