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revert sdk to v1.8 as v1.9 causes too many problems"
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This reverts commit 1a92c19.

This reverts commit ce16dd6.
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@Huckies
Huckies committed Oct 10, 2023
1 parent 1a92c19 commit 5492544
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Showing 17 changed files with 23,271 additions and 23,888 deletions.
166 changes: 59 additions & 107 deletions sdk/BLE_LIB/CH58xBLE_LIB.H
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162 changes: 57 additions & 105 deletions sdk/BLE_LIB/CH58xBLE_ROM.H
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22,842 changes: 11,373 additions & 11,469 deletions sdk/BLE_LIB/CH58xBLE_ROM.hex
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22,842 changes: 11,373 additions & 11,469 deletions sdk/BLE_LIB/CH58xBLE_ROMx.hex
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Binary file modified sdk/BLE_LIB/LIBCH58xBLE.a
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4 changes: 1 addition & 3 deletions sdk/HAL/MCU.c
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Original file line number Diff line number Diff line change
Expand Up @@ -96,10 +96,8 @@ void CH58X_BLEInit(void)
cfg.TxNumEvent = (uint32_t)BLE_TX_NUM_EVENT;
cfg.TxPower = (uint32_t)BLE_TX_POWER;
#if(defined(BLE_SNV)) && (BLE_SNV == TRUE)
_Static_assert((BLE_SNV_ADDR + BLE_SNV_BLOCK * BLE_SNV_NUM) <= (0x78000 - FLASH_ROM_MAX_SIZE), "SNV config error!");
cfg.SNVAddr = (uint32_t)BLE_SNV_ADDR;
cfg.SNVBlock = (uint32_t)BLE_SNV_BLOCK;
cfg.SNVNum = (uint32_t)((EEPROM_MAX_SIZE - BLE_SNV_ADDR) / BLE_SNV_BLOCK);
cfg.SNVNum = (uint32_t)((EEPROM_MAX_SIZE - BLE_SNV_ADDR) / EEPROM_PAGE_SIZE);
cfg.readFlashCB = Lib_Read_Flash;
cfg.writeFlashCB = Lib_Write_Flash;
#endif
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11 changes: 2 additions & 9 deletions sdk/HAL/include/config.h
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Original file line number Diff line number Diff line change
Expand Up @@ -50,9 +50,8 @@
【SNV】
BLE_SNV - 是否开启SNV功能，用于储存绑定信息( 默认:TRUE )
BLE_SNV_ADDR - SNV信息保存地址，使用data flash最后512字节( 默认:0x77E00 )
BLE_SNV_BLOCK - SNV信息保存块大小( 默认:256 )
BLE_SNV_NUM - SNV信息保存数量( 默认:1 )
BLE_SNV_ADDR - SNV信息保存地址，使用data flash最后( 默认:0x77E00 )
- 如果配置了SNVNum参数，则需要对应修改Lib_Write_Flash函数内擦除的flash大小，大小为SNVBlock*SNVNum
【RTC】
CLK_OSC32K - RTC时钟选择，如包含主机角色必须使用外部32K( 0 外部(32768Hz)，默认:1：内部(32000Hz)，2：内部(32768Hz) )
Expand Down Expand Up @@ -114,12 +113,6 @@
#ifndef BLE_SNV_ADDR
#define BLE_SNV_ADDR 0x77E00-FLASH_ROM_MAX_SIZE
#endif
#ifndef BLE_SNV_BLOCK
#define BLE_SNV_BLOCK 256
#endif
#ifndef BLE_SNV_NUM
#define BLE_SNV_NUM 1
#endif
#ifndef CLK_OSC32K
#define CLK_OSC32K 1 // 该项请勿在此修改，必须在工程配置里的预处理中修改，如包含主机角色必须使用外部32K
#endif
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265 changes: 2 additions & 263 deletions sdk/RVMSIS/core_riscv.h
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Original file line number Diff line number Diff line change
Expand Up @@ -96,8 +96,8 @@ typedef struct
else \
__asm__ volatile ("csrw " #reg ", %0" :: "r"(val)); })

#define PFIC_EnableAllIRQ() {write_csr(0x800, 0x88);__nop();__nop();}
#define PFIC_DisableAllIRQ() {write_csr(0x800, 0x80);__nop();__nop();}
#define PFIC_EnableAllIRQ() write_csr(0x800, 0x88)
#define PFIC_DisableAllIRQ() write_csr(0x800, 0x80)
/* ########################## PFIC functions #################################### */

/*******************************************************************************
Expand Down Expand Up @@ -349,267 +349,6 @@ RV_STATIC_INLINE void PFIC_SystemReset(void)
PFIC->CFGR = PFIC_KEY3 | (1 << 7);
}

/*********************************************************************
* @fn __AMOADD_W
*
* @brief Atomic Add with 32bit value
* Atomically ADD 32bit value with value in memory using amoadd.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ADDed
*
*
* @return return memory value + add value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOADD_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amoadd.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOAND_W
*
* @brief Atomic And with 32bit value
* Atomically AND 32bit value with value in memory using amoand.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ANDed
*
*
* @return return memory value & and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOAND_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amoand.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOMAX_W
*
* @brief Atomic signed MAX with 32bit value
* @details Atomically signed max compare 32bit value with value in memory using amomax.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the bigger value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMAX_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amomax.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOMAXU_W
*
* @brief Atomic unsigned MAX with 32bit value
* Atomically unsigned max compare 32bit value with value in memory using amomaxu.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
* @return return the bigger value
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMAXU_W(volatile uint32_t *addr, uint32_t value)
{
uint32_t result;

__asm volatile ("amomaxu.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOMIN_W
*
* @brief Atomic signed MIN with 32bit value
* Atomically signed min compare 32bit value with value in memory using amomin.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the smaller value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMIN_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amomin.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOMINU_W
*
* @brief Atomic unsigned MIN with 32bit value
* Atomically unsigned min compare 32bit value with value in memory using amominu.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the smaller value
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMINU_W(volatile uint32_t *addr, uint32_t value)
{
uint32_t result;

__asm volatile ("amominu.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOOR_W
*
* @brief Atomic OR with 32bit value
* @details Atomically OR 32bit value with value in memory using amoor.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ORed
*
*
* @return return memory value | and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOOR_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amoor.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/*********************************************************************
* @fn __AMOSWAP_W
*
* @brief Atomically swap new 32bit value into memory using amoswap.d.
* addr Address pointer to data, address need to be 4byte aligned
* newval New value to be stored into the address
*
* @return return the original value in memory
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOSWAP_W(volatile uint32_t *addr, uint32_t newval)
{
uint32_t result;

__asm volatile ("amoswap.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(newval) : "memory");
return result;
}

/*********************************************************************
* @fn __AMOXOR_W
*
* @brief Atomic XOR with 32bit value
* @details Atomically XOR 32bit value with value in memory using amoxor.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be XORed
*
*
* @return return memory value ^ and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOXOR_W(volatile int32_t *addr, int32_t value)
{
int32_t result;

__asm volatile ("amoxor.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}

/**
* @brief Return the Machine Status Register
*
* @return mstatus value
*/
uint32_t __get_MSTATUS(void);

/**
* @brief Return the Machine ISA Register
*
* @return misa value
*/
uint32_t __get_MISA(void);

/***
* @brief Return the Machine Trap-Vector Base-Address Register
*
* @return mtvec value
*/
uint32_t __get_MTVEC(void);

/**
* @brief Return the Machine Seratch Register
*
* @return mscratch value
*/
uint32_t __get_MSCRATCH(void);

/**
* @brief Return the Machine Exception Program Register
*
* @return mepc value
*/
uint32_t __get_MEPC(void);

/**
* @brief Return the Machine Cause Register
*
* @return mcause value
*/
uint32_t __get_MCAUSE(void);

/**
* @brief Return the Machine Trap Value Register
*
* @return mtval value
*/
uint32_t __get_MTVAL(void);

/**
* @brief Return Vendor ID Register
*
* @return mvendorid value
*/
uint32_t __get_MVENDORID(void);

/**
* @brief Return Machine Architecture ID Register
*
* @return marchid value
*/
uint32_t __get_MARCHID(void);

/**
* @brief Return Machine Implementation ID Register
*
* @return mimpid value
*/
uint32_t __get_MIMPID(void);

/**
* @brief Return Hart ID Register
*
* @return mhartid value
*/
uint32_t __get_MHARTID(void);

/**
* @brief Return SP Register
*
* @return SP value
*/
uint32_t __get_SP(void);

#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFFFFFFFFFFF)
#define SysTick_CTLR_SWIE (1 << 31)
#define SysTick_CTLR_INIT (1 << 5)
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