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Sync PR#66-67 #78

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Nov 2, 2024
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4 changes: 2 additions & 2 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -48,10 +48,10 @@ jobs:
- name: Compile SW
run: |
echo "Compiling SW"
make sw CFG_OVERRIDE=target/sw/cfg/occamy_cfg/hemaia.hjson -j$(nproc)
make sw CFG_OVERRIDE=target/sw/cfg/hemaia.hjson -j$(nproc)
- name: Compile RTL
run: |
make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson
make rtl CFG_OVERRIDE=target/rtl/cfg/hemaia.hjson
- name: Compile Verilator Binary
run: |
make occamy_system_vlt -j$(nproc)
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2 changes: 1 addition & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
MKFILE_PATH := $(abspath $(lastword $(MAKEFILE_LIST)))
MKFILE_DIR := $(dir $(MKFILE_PATH))

CFG_OVERRIDE ?= target/rtl/cfg/occamy_cfg/hemaia.hjson
CFG_OVERRIDE ?= target/rtl/cfg/hemaia.hjson
CFG = $(realpath $(CFG_OVERRIDE))

clean:
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28 changes: 14 additions & 14 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -40,10 +40,10 @@ The following files are released under Solderpad v0.51 (`SHL-0.51`) see `hw/LICE
### Option 1: Occamy configuration on VCU128 (Bootrom and DRAM from Xilinx IP)

```makefile
@ Occamy Docker: make bootrom
@ Occamy Docker: make sw
@ Occamy Docker: make -C target/fpga/sw [APP=???] (Which binary file you want to use)
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson (Can be modified to other configurations)
@ SNAX Docker: make bootrom CFG_OVERRIDE=target/rtl/cfg/...
@ SNAX Docker: make sw
@ SNAX Docker: make -C target/fpga/sw [APP=???] (Which binary file you want to use)
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make occamy_system_vivado_preparation
@ Barnard3: make occamy_system_vcu128
@ Barnard3: make occamy_system_vcu128_gui
Expand All @@ -52,10 +52,10 @@ The following files are released under Solderpad v0.51 (`SHL-0.51`) see `hw/LICE
### Option 2: HeMAiA configuration on VPK180 (Tapeout configuration, everything is internal)

```makefile
@ Occamy Docker: make bootrom
@ Occamy Docker: make sw
@ Occamy Docker: make -C target/fpga/sw [APP=???] (Which binary file you want to use)
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson (Can be modified to other configurations)
@ SNAX Docker: make bootrom CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make sw CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make -C target/fpga/sw [APP=???] (Which binary file you want to use)
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make hemaia_system_vivado_preparation
@ Barnard3: make hemaia_system_vivado TARGET_PLATFORM={vpk180, vcu128}
@ Barnard3: make hemaia_system_vivado_gui
Expand All @@ -65,19 +65,19 @@ The following files are released under Solderpad v0.51 (`SHL-0.51`) see `hw/LICE
### Option 1: Simulate with Verilator

```makefile
@ Occamy Docker: make bootrom
@ Occamy Docker: make sw
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson (Can be modified to other configurations)
@ SNAX Docker: make bootrom CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make sw CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make occamy_system_vlt
@ SNAX Docker: target/sim/bin/occamy_top.vlt [Elf location] [--vcd]
```

### Option 2: Simulate with Questasim

```makefile
@ Occamy Docker: make bootrom
@ Occamy Docker: make sw
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson (Can be modified to other configurations)
@ SNAX Docker: make bootrom CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make sw CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make rtl CFG_OVERRIDE=target/rtl/cfg/...hjson
@ SNAX Docker: make occamy_system_vsim_preparation
@ Barnard3: make occamy_system_vsim
@ Barnard3: target/sim/bin/occamy_top.vsim[.gui] [Elf location]
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4 changes: 2 additions & 2 deletions target/rtl/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -53,12 +53,12 @@ PLICGEN = $(SOURCE_PLIC_DIR)/util/reg_rv_plic.py
# (LRU) config, all targets depending on the configuration file have
# to be rebuilt. This file is used to express this condition as a
# prerequisite for other rules.
CFG = $(TARGET_RTL)/cfg/occamy_cfg/lru.hjson
CFG = $(TARGET_RTL)/cfg/lru.hjson

$(CFG): FORCE
@# If the LRU config file doesn't exist, we use the default config.
@if [ ! -e $@ ] ; then \
DEFAULT_CFG="$(TARGET_RTL)/cfg/occamy_cfg/hemaia.hjson"; \
DEFAULT_CFG="$(TARGET_RTL)/cfg/hemaia.hjson"; \
echo "Using default config file: $$DEFAULT_CFG"; \
cp $$DEFAULT_CFG $@; \
fi
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2 changes: 1 addition & 1 deletion target/rtl/cfg/.gitignore
Original file line number Diff line number Diff line change
@@ -1 +1 @@
occamy_cfg/lru.hjson
/lru.hjson
236 changes: 0 additions & 236 deletions target/rtl/cfg/cluster_cfg/snax_KUL_cluster.hjson

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