Full floating address support for future HeMAiA chip

[IveanEx]

This PR modify the HeMAiA system in many aspects:

• Modify solder to generate dynamic address rule (axi_xbar and axi_lite_xbar) based on the chip_id_i at the top.
• The eight MSBs are used for chip-level identifier and shrink all local addresses to 40 bits.
• Modify CVA6's address rules
• Modify CVA6's cacheable region / execution region nonidempotent region calculation to either 1) treat every chiplet at the same level of privilege or 2) treat other chiplet as external devices, which only allow data copy between chips.
• Add one CSR instruction to retrieve the current socket that chip resides
• New bootrom assembly + C code to provide initial software support for the new memory address layout.