EXT JTAG+UART #24
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EXT JTAG+UART #24
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Konste11ation
approved these changes
Aug 29, 2024
xiaoling-yi
approved these changes
Aug 29, 2024
Konste11ation
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Aug 31, 2024
* Update Vivado Scripts * Bug Fix * Bug Fix * Update bd * Update bd
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As the FPGA in the lab is attached with FT4232HL, the FPGA design is also modified to route JTAG+UART to external pin.