SPI Slave (#57)

* Update occamygen for correct axi slave port generation * Update occamy_top.sv.tpl * Bug Fix * Modify top level IO definition * Testbench for SPI read * Bug Fix * Testbench for SPI write * Bug Fix * Bug Fix * New FPGA Script for SPI Slave
KULeuven-MICAS · Nov 2, 2024 · 52104cb · 52104cb
1 parent c56b308
commit 52104cb
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Showing 18 changed files with 660 additions and 1,277 deletions.
diff --git a/Bender.yml b/Bender.yml
@@ -32,6 +32,7 @@ dependencies:
   snitch_cluster:         { git:  https://github.com/KULeuven-MICAS/snax_cluster.git,      rev:        main }
   tech_cells_generic:     { git:  https://github.com/pulp-platform/tech_cells_generic.git, version: 0.2.13 }
   cluster_icache:         { git:  https://github.com/KULeuven-MICAS/cluster_icache.git,     rev:  main }
+  hemaia_axi_spi_slave:    { git: https://github.com/KULeuven-MICAS/hemaia_axi_spi_slave.git, rev: main }
 
 workspace:
   package_links:

diff --git a/hw/occamy/occamy_chip.sv.tpl b/hw/occamy/occamy_chip.sv.tpl
@@ -35,12 +35,31 @@ import ${name}_pkg::*;
   input  logic        jtag_tdi_i,
   output logic        jtag_tdo_o,
   // `i2c` Interface
-  inout  logic        i2c_sda_io,
-  inout  logic        i2c_scl_io,
+  output logic        i2c_sda_o,
+  input  logic        i2c_sda_i,
+  output logic        i2c_sda_en_o,
+  output logic        i2c_scl_o,
+  input  logic        i2c_scl_i,
+  output logic        i2c_scl_en_o,
   // `SPI Host` Interface
   output logic        spim_sck_o,
+  output logic        spim_sck_en_o,
   output logic [1:0]  spim_csb_o,
-  inout  logic [3:0]  spim_sd_io,
+  output logic [1:0]  spim_csb_en_o,
+  output logic [3:0]  spim_sd_o,
+  input        [3:0]  spim_sd_i,
+  output logic [3:0]  spim_sd_en_o,
+<% 
+  spi_slave_present = any(periph["name"] == "spis" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
+%>
+% if spi_slave_present: 
+  // `SPI Slave` for Debugging Purposes
+  input  logic        spis_sck_i,
+  input  logic        spis_csb_i,
+  output logic [3:0]  spis_sd_o,
+  output logic [3:0]  spis_sd_en_o,
+  input  logic [3:0]  spis_sd_i,
+% endif
 
   input  logic [11:0] ext_irq_i
 );

diff --git a/hw/occamy/occamy_top.sv.tpl b/hw/occamy/occamy_top.sv.tpl
@@ -38,12 +38,31 @@ module ${name}_top
   input  logic        jtag_tdi_i,
   output logic        jtag_tdo_o,
   // `i2c` Interface
-  inout  logic        i2c_sda_io,
-  inout  logic        i2c_scl_io,
+  output logic        i2c_sda_o,
+  input  logic        i2c_sda_i,
+  output logic        i2c_sda_en_o,
+  output logic        i2c_scl_o,
+  input  logic        i2c_scl_i,
+  output logic        i2c_scl_en_o,
   // `SPI Host` Interface
   output logic        spim_sck_o,
+  output logic        spim_sck_en_o,
   output logic [1:0]  spim_csb_o,
-  inout  logic [3:0]  spim_sd_io,
+  output logic [1:0]  spim_csb_en_o,
+  output logic [3:0]  spim_sd_o,
+  output logic [3:0]  spim_sd_en_o,
+  input        [3:0]  spim_sd_i,
+<% 
+  spi_slave_present = any(periph["name"] == "spis" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
+%>
+% if spi_slave_present: 
+  // `SPI Slave` for Debugging Purposes
+  input  logic        spis_sck_i,
+  input  logic        spis_csb_i,
+  output logic [3:0]  spis_sd_o,
+  output logic [3:0]  spis_sd_en_o,
+  input  logic [3:0]  spis_sd_i,
+% endif
 
   /// Boot ROM
   output ${soc_axi_lite_narrow_periph_xbar.out_bootrom.req_type()} bootrom_req_o,
@@ -305,6 +324,32 @@ module ${name}_top
   );
 
 
+  <% 
+    spi_slave_present = any(periph["name"] == "spis" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
+    if spi_slave_present: 
+      axi_spi_slave = soc_periph_xbar.in_spis
+  %>
+
+  % if spi_slave_present: 
+  ///////////////////////////////////////
+  // SPI Slave for Debugging Purposes ///
+  ///////////////////////////////////////
+  occamy_spi_slave #(
+    .axi_lite_req_t(${axi_spi_slave.req_type()}),
+    .axi_lite_rsp_t(${axi_spi_slave.rsp_type()})
+  ) i_spi_slave (
+    .clk_i(${axi_spi_slave.clk}),
+    .rst_ni(${axi_spi_slave.rst}),
+    .axi_lite_req_o(${axi_spi_slave.req_name()}),
+    .axi_lite_rsp_i(${axi_spi_slave.rsp_name()}),
+    .spi_sclk_i(spis_sck_i),
+    .spi_cs_i(spis_csb_i),
+    .spi_sdi_i(spis_sd_i),
+    .spi_sdo_o(spis_sd_o),
+    .spi_oen_o(spis_sd_en_o)
+  );
+  % endif
+
   ///////////////
   //   CLINT   //
   ///////////////
@@ -430,8 +475,6 @@ module ${name}_top
   <% regbus_spim = soc_axi_lite_narrow_periph_xbar.out_spim \
     .cut(context, cuts_spim_cfg, name="soc_axi_lite_narrow_periph_xbar_out_spim_cut") \
     .to_reg(context, "axi_lite_to_reg_spim") %>
-
-  logic [3:0] spim_sd_i, spim_sd_o, spim_sd_en_o;
   spi_host #(
     .reg_req_t (${regbus_spim.req_type()}),
     .reg_rsp_t (${regbus_spim.rsp_type()})
@@ -444,32 +487,16 @@ module ${name}_top
     .reg_req_i (${regbus_spim.req_name()}),
     .reg_rsp_o (${regbus_spim.rsp_name()}),
     .cio_sck_o (spim_sck_o),
-    .cio_sck_en_o (),
+    .cio_sck_en_o (spim_sck_en_o),
     .cio_csb_o (spim_csb_o),
-    .cio_csb_en_o (),
+    .cio_csb_en_o (spim_csb_en_o),
     .cio_sd_o (spim_sd_o),
     .cio_sd_en_o (spim_sd_en_o),
     .cio_sd_i (spim_sd_i),
     .intr_error_o (irq.spim_error),
     .intr_spi_event_o (irq.spim_spi_event)
   );
 
-
-  // Unidirectional - Bidirectional transform
-  logic [3:0] spim_sd_io_reg;
-
-  always_comb begin
-    if (spim_sd_en_o > 0) begin             // Output Mode
-      spim_sd_i = 4'b1111;                  // Tie-off input
-      spim_sd_io_reg = spim_sd_o;
-    end else begin                          // Input Mode
-      spim_sd_i = spim_sd_io;
-      spim_sd_io_reg = 4'bZZZZ;             // Disable output functionality
-    end
-  end
-
-  assign spim_sd_io = spim_sd_io_reg;
-
   //////////////
   //   GPIO   //
   //////////////
@@ -496,8 +523,6 @@ module ${name}_top
   <% regbus_i2c = soc_axi_lite_narrow_periph_xbar.out_i2c \
     .cut(context, cuts_i2c_cfg, name="soc_axi_lite_narrow_periph_xbar_out_i2c_cut") \
     .to_reg(context, "axi_lite_to_reg_i2c") %>
-
-  logic i2c_scl_i, i2c_scl_o, i2c_scl_en_o, i2c_sda_i, i2c_sda_o, i2c_sda_en_o;
 
   i2c #(
     .reg_req_t (${regbus_i2c.req_type()}),
@@ -531,32 +556,6 @@ module ${name}_top
     .intr_host_timeout_o (irq.i2c_host_timeout)
   );
 
-  // Unidirectional - Bidirectional transform
-  logic i2c_sda_io_reg, i2c_scl_io_reg;
-  always_comb begin
-    if (i2c_sda_en_o) begin                     // Output Mode
-      i2c_sda_i = 1'b1;                         // Tie-off input
-      i2c_sda_io_reg = i2c_sda_o ? 1'bZ : 1'b0; // Open-drain connection;
-    end else begin                              // Input Mode
-      i2c_sda_i = i2c_sda_io;
-      i2c_sda_io_reg = 1'bZ;                    // Disable output functionality
-    end
-  end
-
-  assign i2c_sda_io = i2c_sda_io_reg;
-
-  always_comb begin
-    if (i2c_scl_en_o) begin                     // Output Mode
-      i2c_scl_i = 1'b1;                         // Tie-off input
-      i2c_scl_io_reg = i2c_scl_o ? 1'bZ : 1'b0; // Open-drain connection
-    end else begin                              // Input Mode
-      i2c_scl_i = i2c_scl_io;
-      i2c_scl_io_reg = 1'bZ;                    // Disable output functionality
-    end
-  end
-
-  assign i2c_scl_io = i2c_scl_io_reg;
-
   /////////////
   //  Timer  //
   /////////////

diff --git a/hw/occamy/occamy_xilinx.sv.tpl b/hw/occamy/occamy_xilinx.sv.tpl
@@ -37,12 +37,31 @@ import ${name}_pkg::*;
   input  logic        jtag_tdi_i,
   output logic        jtag_tdo_o,
   // `i2c` Interface
-  inout  logic        i2c_sda_io,
-  inout  logic        i2c_scl_io,
+  output logic        i2c_sda_o,
+  input  logic        i2c_sda_i,
+  output logic        i2c_sda_en_o,
+  output logic        i2c_scl_o,
+  input  logic        i2c_scl_i,
+  output logic        i2c_scl_en_o,
   // `SPI Host` Interface
   output logic        spim_sck_o,
+  output logic        spim_sck_en_o,
   output logic [1:0]  spim_csb_o,
-  inout  logic [3:0]  spim_sd_io,
+  output logic [1:0]  spim_csb_en_o,
+  output logic [3:0]  spim_sd_o,
+  input        [3:0]  spim_sd_i,
+  output logic [3:0]  spim_sd_en_o,
+<% 
+  spi_slave_present = any(periph["name"] == "spis" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
+%>
+% if spi_slave_present: 
+  // `SPI Slave` for Debugging Purposes
+  input  logic        spis_sck_i,
+  input  logic        spis_csb_i,
+  output logic [3:0]  spis_sd_o,
+  output logic [3:0]  spis_sd_en_o,
+  input  logic [3:0]  spis_sd_i,
+% endif
 
   input  logic [11:0] ext_irq_i,
 
@@ -53,7 +72,7 @@ import ${name}_pkg::*;
   output logic [47:0] bootrom_addr_o,
   input  logic [31:0] bootrom_data_i,
 
-  // SPM / SRAM as the main memory
+  // HBM Port
   ${soc_wide_xbar.out_spm_wide.emit_flat_master_port("m_axi_ram")}
 );
 

diff --git a/target/fpga/occamy_vcu128_2023_bd.tcl b/target/fpga/occamy_vcu128_2023_bd.tcl
@@ -144,6 +144,7 @@ xilinx.com:ip:util_reduced_logic:2.0\
 xilinx.com:ip:smartconnect:1.0\
 xilinx.com:ip:vio:3.0\
 xilinx.com:ip:xlslice:1.0\
+xilinx.com:ip:util_ds_buf:2.2\
 "
 
    set list_ips_missing ""
@@ -218,22 +219,23 @@ proc create_root_design { parentCell } {
   set_property -dict [ list \
    CONFIG.POLARITY {ACTIVE_HIGH} \
  ] $reset
-  set uart_rx_i_0 [ create_bd_port -dir I uart_rx_i_0 ]
-  set uart_tx_o_0 [ create_bd_port -dir O uart_tx_o_0 ]
+  set uart_rx_i [ create_bd_port -dir I uart_rx_i ]
+  set uart_tx_o [ create_bd_port -dir O uart_tx_o ]
   set jtag_vdd_o [ create_bd_port -dir O -from 0 -to 0 jtag_vdd_o ]
   set jtag_gnd_o [ create_bd_port -dir O -from 0 -to 0 jtag_gnd_o ]
   set jtag_tdo_o [ create_bd_port -dir O jtag_tdo_o ]
   set jtag_tdi_i [ create_bd_port -dir I jtag_tdi_i ]
   set jtag_tms_i [ create_bd_port -dir I jtag_tms_i ]
   set jtag_tck_i [ create_bd_port -dir I -type clk -freq_hz 5000000 jtag_tck_i ]
-  set uart_cts_ni_0 [ create_bd_port -dir I uart_cts_ni_0 ]
+  set uart_cts_ni [ create_bd_port -dir I uart_cts_ni ]
   set uart_rts_no_0 [ create_bd_port -dir O uart_rts_no_0 ]
   set spim_sck_o [ create_bd_port -dir O spim_sck_o ]
-  set spim_sd_io [ create_bd_port -dir IO -from 3 -to 0 spim_sd_io ]
   set gpio_d_o [ create_bd_port -dir O -from 7 -to 0 gpio_d_o ]
   set spim_csb_o [ create_bd_port -dir O -from 1 -to 0 spim_csb_o ]
   set i2c_sda_io [ create_bd_port -dir IO i2c_sda_io ]
   set i2c_scl_io [ create_bd_port -dir IO i2c_scl_io ]
+  set spim_sd_io [ create_bd_port -dir IO -from 3 -to 0 spim_sd_io ]
+  set spis_sd_io [ create_bd_port -dir IO -from 3 -to 0 spis_sd_io ]
 
   # Create instance: axi_bram_ctrl_0, and set properties
   set axi_bram_ctrl_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_0 ]
@@ -538,6 +540,32 @@ proc create_root_design { parentCell } {
   set_property CONFIG.DIN_FROM {7} $xlslice_1
 
 
+  # Create instance: i2c_scl_iobuf, and set properties
+  set i2c_scl_iobuf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.2 i2c_scl_iobuf ]
+  set_property CONFIG.C_BUF_TYPE {IOBUF} $i2c_scl_iobuf
+
+
+  # Create instance: i2c_sda_iobuf, and set properties
+  set i2c_sda_iobuf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.2 i2c_sda_iobuf ]
+  set_property CONFIG.C_BUF_TYPE {IOBUF} $i2c_sda_iobuf
+
+
+  # Create instance: spim_iobuf, and set properties
+  set spim_iobuf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.2 spim_iobuf ]
+  set_property -dict [list \
+    CONFIG.C_BUF_TYPE {IOBUF} \
+    CONFIG.C_SIZE {4} \
+  ] $spim_iobuf
+
+
+  # Create instance: spis_iobuf, and set properties
+  set spis_iobuf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.2 spis_iobuf ]
+  set_property -dict [list \
+    CONFIG.C_BUF_TYPE {IOBUF} \
+    CONFIG.C_SIZE {4} \
+  ] $spis_iobuf
+
+
   # Create interface connections
   connect_bd_intf_net -intf_net default_100mhz_clk_1 [get_bd_intf_ports default_100mhz_clk] [get_bd_intf_pins clk_wiz/CLK_IN1_D]
   connect_bd_intf_net -intf_net jtag_axi_0_M_AXI [get_bd_intf_pins axi_bram_ctrl_0/S_AXI] [get_bd_intf_pins jtag_axi_0/M_AXI]
@@ -547,34 +575,42 @@ proc create_root_design { parentCell } {
   connect_bd_intf_net -intf_net smc_hbm_0_M00_AXI [get_bd_intf_pins hbm_0/SAXI_00] [get_bd_intf_pins smc_hbm_0/M00_AXI]
 
   # Create port connections
-  connect_bd_net -net Net [get_bd_ports i2c_sda_io] [get_bd_pins occamy/i2c_sda_io]
-  set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets Net]
-  connect_bd_net -net Net1 [get_bd_ports i2c_scl_io] [get_bd_pins occamy/i2c_scl_io]
-  set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets Net1]
-  connect_bd_net -net Net2 [get_bd_ports spim_sd_io] [get_bd_pins occamy/spim_sd_io]
-  set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets Net2]
+  connect_bd_net -net Net [get_bd_ports i2c_sda_io] [get_bd_pins i2c_sda_iobuf/IOBUF_IO_IO]
+  connect_bd_net -net Net1 [get_bd_ports i2c_scl_io] [get_bd_pins i2c_scl_iobuf/IOBUF_IO_IO]
+  connect_bd_net -net Net2 [get_bd_ports spis_sd_io] [get_bd_pins spis_iobuf/IOBUF_IO_IO]
+  connect_bd_net -net Net3 [get_bd_ports spim_sd_io] [get_bd_pins spim_iobuf/IOBUF_IO_IO]
   connect_bd_net -net c_high_dout [get_bd_pins c_high/dout] [get_bd_ports jtag_vdd_o] [get_bd_pins occamy/jtag_trst_ni]
   connect_bd_net -net clk_wiz_clk_core [get_bd_pins clk_wiz/clk_core] [get_bd_pins axi_bram_ctrl_0/s_axi_aclk] [get_bd_pins blk_mem_gen_0/clkb] [get_bd_pins hbm_0/APB_0_PCLK] [get_bd_pins hbm_0/APB_1_PCLK] [get_bd_pins jtag_axi_0/aclk] [get_bd_pins psr_core/slowest_sync_clk] [get_bd_pins smc_hbm_0/aclk] [get_bd_pins vio_sys/clk] [get_bd_pins jtag_axi_1/aclk] [get_bd_pins occamy/clk_i] [get_bd_pins occamy/clk_periph_i]
   connect_bd_net -net clk_wiz_clk_hbm [get_bd_pins clk_wiz/clk_hbm] [get_bd_pins hbm_0/HBM_REF_CLK_0] [get_bd_pins hbm_0/HBM_REF_CLK_1] [get_bd_pins hbm_0/AXI_00_ACLK] [get_bd_pins psr_hbm/slowest_sync_clk] [get_bd_pins smc_hbm_0/aclk1]
   connect_bd_net -net clk_wiz_clk_rtc [get_bd_pins clk_wiz/clk_rtc] [get_bd_pins occamy/rtc_i]
   connect_bd_net -net const_low_dout [get_bd_pins c_low/dout] [get_bd_ports jtag_gnd_o] [get_bd_pins occamy/test_mode_i] [get_bd_pins occamy/ext_irq_i] [get_bd_pins occamy/gpio_d_i]
   connect_bd_net -net glbl_rst [get_bd_pins vio_sys/probe_out1] [get_bd_pins concat_rst/In1]
+  connect_bd_net -net i2c_scl_iobuf_IOBUF_IO_O [get_bd_pins i2c_scl_iobuf/IOBUF_IO_O] [get_bd_pins occamy/i2c_scl_i]
+  connect_bd_net -net i2c_sda_iobuf_IOBUF_IO_O [get_bd_pins i2c_sda_iobuf/IOBUF_IO_O] [get_bd_pins occamy/i2c_sda_i]
   connect_bd_net -net jtag_tck_i_1 [get_bd_ports jtag_tck_i] [get_bd_pins occamy/jtag_tck_i]
   connect_bd_net -net jtag_tdi_i_1 [get_bd_ports jtag_tdi_i] [get_bd_pins occamy/jtag_tdi_i]
   connect_bd_net -net jtag_tms_i_1 [get_bd_ports jtag_tms_i] [get_bd_pins occamy/jtag_tms_i]
   connect_bd_net -net occamy_bootmode [get_bd_pins vio_sys/probe_out2] [get_bd_pins occamy/boot_mode_i]
   connect_bd_net -net occamy_bootrom_addr_o [get_bd_pins occamy/bootrom_addr_o] [get_bd_pins xlslice_0/Din]
   connect_bd_net -net occamy_gpio_d_o [get_bd_pins occamy/gpio_d_o] [get_bd_pins xlslice_1/Din]
+  connect_bd_net -net occamy_i2c_scl_en_o [get_bd_pins occamy/i2c_scl_en_o] [get_bd_pins i2c_scl_iobuf/IOBUF_IO_T]
+  connect_bd_net -net occamy_i2c_scl_o [get_bd_pins occamy/i2c_scl_o] [get_bd_pins i2c_scl_iobuf/IOBUF_IO_I]
+  connect_bd_net -net occamy_i2c_sda_en_o [get_bd_pins occamy/i2c_sda_en_o] [get_bd_pins i2c_sda_iobuf/IOBUF_IO_T]
+  connect_bd_net -net occamy_i2c_sda_o [get_bd_pins occamy/i2c_sda_o] [get_bd_pins i2c_sda_iobuf/IOBUF_IO_I]
   connect_bd_net -net occamy_jtag_tdo_o [get_bd_pins occamy/jtag_tdo_o] [get_bd_ports jtag_tdo_o]
   connect_bd_net -net occamy_rst [get_bd_pins rst_or_core/Res] [get_bd_pins rst_core_inv/Op1]
   connect_bd_net -net occamy_rst_vio [get_bd_pins vio_sys/probe_out0] [get_bd_pins concat_rst_core/In1]
   connect_bd_net -net occamy_rstn [get_bd_pins rst_core_inv/Res] [get_bd_pins occamy/rst_ni] [get_bd_pins occamy/rst_periph_ni]
   connect_bd_net -net occamy_spim_csb_o [get_bd_pins occamy/spim_csb_o] [get_bd_ports spim_csb_o]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets occamy_spim_csb_o]
   connect_bd_net -net occamy_spim_sck_o [get_bd_pins occamy/spim_sck_o] [get_bd_ports spim_sck_o]
+  connect_bd_net -net occamy_spim_sd_en_o [get_bd_pins occamy/spim_sd_en_o] [get_bd_pins spim_iobuf/IOBUF_IO_T]
+  connect_bd_net -net occamy_spim_sd_o [get_bd_pins occamy/spim_sd_o] [get_bd_pins spim_iobuf/IOBUF_IO_I]
+  connect_bd_net -net occamy_spis_sd_en_o [get_bd_pins occamy/spis_sd_en_o] [get_bd_pins spis_iobuf/IOBUF_IO_T]
+  connect_bd_net -net occamy_spis_sd_o [get_bd_pins occamy/spis_sd_o] [get_bd_pins spis_iobuf/IOBUF_IO_I]
   connect_bd_net -net occamy_uart_rts_no [get_bd_pins occamy/uart_rts_no] [get_bd_ports uart_rts_no_0]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets occamy_uart_rts_no]
-  connect_bd_net -net occamy_uart_tx_o [get_bd_pins occamy/uart_tx_o] [get_bd_ports uart_tx_o_0]
+  connect_bd_net -net occamy_uart_tx_o [get_bd_pins occamy/uart_tx_o] [get_bd_ports uart_tx_o]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets occamy_uart_tx_o]
   connect_bd_net -net proc_sys_reset_0_peripheral_aresetn [get_bd_pins psr_core/peripheral_aresetn] [get_bd_pins axi_bram_ctrl_0/s_axi_aresetn] [get_bd_pins hbm_0/APB_0_PRESET_N] [get_bd_pins hbm_0/APB_1_PRESET_N] [get_bd_pins jtag_axi_0/aresetn] [get_bd_pins smc_hbm_0/aresetn] [get_bd_pins jtag_axi_1/aresetn]
   connect_bd_net -net psr_hbm_peripheral_aresetn [get_bd_pins psr_hbm/peripheral_aresetn] [get_bd_pins hbm_0/AXI_00_ARESET_N]
@@ -585,9 +621,11 @@ proc create_root_design { parentCell } {
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets rom_doutb]
   connect_bd_net -net rom_en [get_bd_pins occamy/bootrom_en_o] [get_bd_pins blk_mem_gen_0/enb]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets rom_en]
-  connect_bd_net -net uart_cts_ni_0_1 [get_bd_ports uart_cts_ni_0] [get_bd_pins occamy/uart_cts_ni]
+  connect_bd_net -net spim_iobuf_IOBUF_IO_O [get_bd_pins spim_iobuf/IOBUF_IO_O] [get_bd_pins occamy/spim_sd_i]
+  connect_bd_net -net spis_iobuf_IOBUF_IO_O [get_bd_pins spis_iobuf/IOBUF_IO_O] [get_bd_pins occamy/spis_sd_i]
+  connect_bd_net -net uart_cts_ni_0_1 [get_bd_ports uart_cts_ni] [get_bd_pins occamy/uart_cts_ni]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets uart_cts_ni_0_1]
-  connect_bd_net -net uart_rx_i_0_1 [get_bd_ports uart_rx_i_0] [get_bd_pins occamy/uart_rx_i]
+  connect_bd_net -net uart_rx_i_0_1 [get_bd_ports uart_rx_i] [get_bd_pins occamy/uart_rx_i]
   set_property HDL_ATTRIBUTE.DEBUG {true} [get_bd_nets uart_rx_i_0_1]
   connect_bd_net -net util_reduced_logic_0_Res [get_bd_pins rst_or/Res] [get_bd_pins psr_core/ext_reset_in] [get_bd_pins psr_hbm/ext_reset_in]
   connect_bd_net -net xlconcat_0_dout [get_bd_pins concat_rst/dout] [get_bd_pins rst_or/Op1]