Add Chiplet AXI Interconnect #193
Triggered via pull request
November 28, 2024 13:24
Status
Cancelled
Total duration
1h 11m 51s
Artifacts
–
ci.yml
on: pull_request
Simulation with Verilator
1h 11m
Annotations
2 errors
Simulation with Verilator
The run was canceled by @IveanEx.
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Simulation with Verilator
The operation was canceled.
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