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Bump fuel-core and add missing instructions. (#1037)
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* Bump fuel-core and add missing instructions.

* Resolve missed todos.

* Add new instructions to asm lang.
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@adlerjohn
adlerjohn authored Mar 27, 2022
1 parent a4388c3 commit 5840399
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378 changes: 211 additions & 167 deletions Cargo.lock
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8 changes: 4 additions & 4 deletions forc/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -15,10 +15,10 @@ clap = { version = "3.1", features = ["env", "derive"] }
clap_complete = "3.1"
forc-pkg = { version = "0.8.0", path = "../forc-pkg" }
forc-util = { version = "0.8.0", path = "../forc-util" }
fuel-asm = "0.2"
fuel-gql-client = { version = "0.4", default-features = false }
fuel-tx = "0.6"
fuel-vm = "0.5"
fuel-asm = "0.3"
fuel-gql-client = { version = "0.5", default-features = false }
fuel-tx = "0.7"
fuel-vm = "0.6"
futures = "0.3"
hex = "0.4.3"
prettydiff = "0.5.0"
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10 changes: 5 additions & 5 deletions forc/src/utils/defaults.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -31,11 +31,11 @@ name = "{project_name}"
version = "0.1.0"
[dependencies]
fuel-gql-client = {{ version = "0.4", default-features = false }}
fuel-tx = "0.6"
fuels-abigen-macro = "0.6"
fuels-contract = "0.6"
fuels-core = "0.6"
fuel-gql-client = {{ version = "0.5", default-features = false }}
fuel-tx = "0.7"
fuels-abigen-macro = "0.8"
fuels-contract = "0.8"
fuels-core = "0.8"
rand = "0.8"
tokio = {{ version = "1.12", features = ["rt", "macros"] }}
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6 changes: 3 additions & 3 deletions sway-core/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,9 @@ clap = { version = "3.1", features = ["derive"], optional = true }
derivative = "2.2.0"
dirs = "3.0"
either = "1.6"
fuel-asm = "0.2"
fuel-crypto = "0.4.0"
fuel-vm = "0.5"
fuel-asm = "0.3"
fuel-crypto = "0.4"
fuel-vm = "0.6"
hex = { version = "0.4", optional = true }
itertools = "0.10"
lazy_static = "1.4"
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36 changes: 31 additions & 5 deletions sway-core/src/asm_lang/allocated_ops.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@ pub(crate) enum AllocatedOpcode {
MOD(AllocatedRegister, AllocatedRegister, AllocatedRegister),
MODI(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
MOVE(AllocatedRegister, AllocatedRegister),
MOVI(AllocatedRegister, VirtualImmediate18),
MUL(AllocatedRegister, AllocatedRegister, AllocatedRegister),
MULI(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
NOT(AllocatedRegister, AllocatedRegister),
Expand Down Expand Up @@ -99,13 +100,13 @@ pub(crate) enum AllocatedOpcode {
MCL(AllocatedRegister, AllocatedRegister),
MCLI(AllocatedRegister, VirtualImmediate18),
MCP(AllocatedRegister, AllocatedRegister, AllocatedRegister),
MCPI(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
MEQ(
AllocatedRegister,
AllocatedRegister,
AllocatedRegister,
AllocatedRegister,
),
MCPI(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
SB(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
SW(AllocatedRegister, AllocatedRegister, VirtualImmediate12),
BAL(AllocatedRegister, AllocatedRegister, AllocatedRegister),
Expand Down Expand Up @@ -134,6 +135,12 @@ pub(crate) enum AllocatedOpcode {
AllocatedRegister,
AllocatedRegister,
),
LOGD(
AllocatedRegister,
AllocatedRegister,
AllocatedRegister,
AllocatedRegister,
),
MINT(AllocatedRegister),
RVRT(AllocatedRegister),
SLDC(AllocatedRegister, AllocatedRegister, AllocatedRegister),
Expand All @@ -151,7 +158,12 @@ pub(crate) enum AllocatedOpcode {
ECR(AllocatedRegister, AllocatedRegister, AllocatedRegister),
K256(AllocatedRegister, AllocatedRegister, AllocatedRegister),
S256(AllocatedRegister, AllocatedRegister, AllocatedRegister),
XIL(AllocatedRegister, AllocatedRegister),
XIS(AllocatedRegister, AllocatedRegister),
XOL(AllocatedRegister, AllocatedRegister),
XOS(AllocatedRegister, AllocatedRegister),
XWL(AllocatedRegister, AllocatedRegister),
XWS(AllocatedRegister, AllocatedRegister),
NOOP,
FLAG(AllocatedRegister),
GM(AllocatedRegister, VirtualImmediate18),
Expand Down Expand Up @@ -189,6 +201,7 @@ impl fmt::Display for AllocatedOp {
MOD(a, b, c) => format!("mod {} {} {}", a, b, c),
MODI(a, b, c) => format!("modi {} {} {}", a, b, c),
MOVE(a, b) => format!("move {} {}", a, b),
MOVI(a, b) => format!("movi {} {}", a, b),
MUL(a, b, c) => format!("mul {} {} {}", a, b, c),
MULI(a, b, c) => format!("muli {} {} {}", a, b, c),
NOT(a, b) => format!("not {} {}", a, b),
Expand Down Expand Up @@ -217,8 +230,8 @@ impl fmt::Display for AllocatedOp {
MCL(a, b) => format!("mcl {} {}", a, b),
MCLI(a, b) => format!("mcli {} {}", a, b),
MCP(a, b, c) => format!("mcp {} {} {}", a, b, c),
MEQ(a, b, c, d) => format!("meq {} {} {} {}", a, b, c, d),
MCPI(a, b, c) => format!("mcpi {} {} {}", a, b, c),
MEQ(a, b, c, d) => format!("meq {} {} {} {}", a, b, c, d),
SB(a, b, c) => format!("sb {} {} {}", a, b, c),
SW(a, b, c) => format!("sw {} {} {}", a, b, c),
BAL(a, b, c) => format!("bal {} {} {}", a, b, c),
Expand All @@ -232,6 +245,7 @@ impl fmt::Display for AllocatedOp {
CB(a) => format!("cb {}", a),
LDC(a, b, c) => format!("ldc {} {} {}", a, b, c),
LOG(a, b, c, d) => format!("log {} {} {} {}", a, b, c, d),
LOGD(a, b, c, d)=> format!("logd {} {} {} {}", a, b, c, d),
MINT(a) => format!("mint {}", a),
RVRT(a) => format!("rvrt {}", a),
SLDC(a, b, c) => format!("sldc {} {} {}", a, b, c),
Expand All @@ -244,13 +258,18 @@ impl fmt::Display for AllocatedOp {
ECR(a, b, c) => format!("ecr {} {} {}", a, b, c),
K256(a, b, c) => format!("k256 {} {} {}", a, b, c),
S256(a, b, c) => format!("s256 {} {} {}", a, b, c),
XIL(a, b) => format!("xil {} {}", a, b),
XIS(a, b) => format!("xis {} {}", a, b),
XOL(a, b) => format!("xol {} {}", a, b),
XOS(a, b) => format!("xos {} {}", a, b),
XWL(a, b) => format!("xwl {} {}", a, b),
XWS(a, b) => format!("xws {} {}", a, b),
NOOP => "noop".to_string(),
FLAG(a) => format!("flag {}", a),
GM(a, b) => format!("gm {} {}", a, b),
Undefined => "undefined op".into(),
DataSectionOffsetPlaceholder => "DATA_SECTION_OFFSET[0..32]\nDATA_SECTION_OFFSET[32..64]".into(),
DataSectionRegisterLoadPlaceholder => "lw $ds $is 1".into()
DataSectionRegisterLoadPlaceholder => "lw $ds $is 1".into(),
};
// we want the comment to always be COMMENT_START_COLUMN characters offset to the right
// to not interfere with the ASM but to be aligned
Expand Down Expand Up @@ -293,6 +312,7 @@ impl AllocatedOp {
MOD (a, b, c) => VmOp::MOD (a.to_register_id(), b.to_register_id(), c.to_register_id()),
MODI(a, b, c) => VmOp::MODI(a.to_register_id(), b.to_register_id(), c.value),
MOVE(a, b) => VmOp::MOVE(a.to_register_id(), b.to_register_id()),
MOVI(a, b) => VmOp::MOVI(a.to_register_id(), b.value),
MUL (a, b, c) => VmOp::MUL (a.to_register_id(), b.to_register_id(), c.to_register_id()),
MULI(a, b, c) => VmOp::MULI(a.to_register_id(), b.to_register_id(), c.value),
NOT (a, b) => VmOp::NOT (a.to_register_id(), b.to_register_id()),
Expand Down Expand Up @@ -321,8 +341,8 @@ impl AllocatedOp {
MCL (a, b) => VmOp::MCL (a.to_register_id(), b.to_register_id()),
MCLI(a, b) => VmOp::MCLI(a.to_register_id(), b.value),
MCP (a, b, c) => VmOp::MCP (a.to_register_id(), b.to_register_id(), c.to_register_id()),
MEQ (a, b, c, d)=> VmOp::MEQ (a.to_register_id(), b.to_register_id(), c.to_register_id(), d.to_register_id()),
MCPI(a, b, c) => VmOp::MCPI(a.to_register_id(), b.to_register_id(), c.value),
MEQ (a, b, c, d)=> VmOp::MEQ (a.to_register_id(), b.to_register_id(), c.to_register_id(), d.to_register_id()),
SB (a, b, c) => VmOp::SB (a.to_register_id(), b.to_register_id(), c.value),
SW (a, b, c) => VmOp::SW (a.to_register_id(), b.to_register_id(), c.value),
BAL (a, b, c) => VmOp::BAL (a.to_register_id(), b.to_register_id(), c.to_register_id()),
Expand All @@ -336,6 +356,7 @@ impl AllocatedOp {
CB (a) => VmOp::CB (a.to_register_id()),
LDC (a, b, c) => VmOp::LDC (a.to_register_id(), b.to_register_id(), c.to_register_id()),
LOG (a, b, c, d)=> VmOp::LOG (a.to_register_id(), b.to_register_id(), c.to_register_id(), d.to_register_id()),
LOGD(a, b, c, d)=> VmOp::LOGD(a.to_register_id(), b.to_register_id(), c.to_register_id(), d.to_register_id()),
MINT(a) => VmOp::MINT(a.to_register_id()),
RVRT(a) => VmOp::RVRT(a.to_register_id()),
SLDC(a, b, c) => VmOp::SLDC(a.to_register_id(), b.to_register_id(), c.to_register_id()),
Expand All @@ -348,7 +369,12 @@ impl AllocatedOp {
ECR (a, b, c) => VmOp::ECR (a.to_register_id(), b.to_register_id(), c.to_register_id()),
K256(a, b, c) => VmOp::K256(a.to_register_id(), b.to_register_id(), c.to_register_id()),
S256(a, b, c) => VmOp::S256(a.to_register_id(), b.to_register_id(), c.to_register_id()),
XOS(a, b) => VmOp::XOS(a.to_register_id(), b.to_register_id()),
XIL (a, b) => VmOp::XIL(a.to_register_id(), b.to_register_id()),
XIS (a, b) => VmOp::XIS(a.to_register_id(), b.to_register_id()),
XOL (a, b) => VmOp::XOL(a.to_register_id(), b.to_register_id()),
XOS (a, b) => VmOp::XOS(a.to_register_id(), b.to_register_id()),
XWL (a, b) => VmOp::XWL(a.to_register_id(), b.to_register_id()),
XWS (a, b) => VmOp::XWS(a.to_register_id(), b.to_register_id()),
NOOP => VmOp::NOOP,
FLAG(a) => VmOp::FLAG(a.to_register_id()),
GM(a, b) => VmOp::GM(a.to_register_id(), b.value),
Expand Down
86 changes: 78 additions & 8 deletions sway-core/src/asm_lang/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -406,6 +406,15 @@ impl Op {
);
VirtualOp::MOVE(r1, r2)
}
"movi" => {
let (r1, imm) = check!(
single_reg_imm_18(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::MOVI(r1, imm)
}
"mul" => {
let (r1, r2, r3) = check!(
three_regs(args, immediate, whole_op_span),
Expand Down Expand Up @@ -649,23 +658,23 @@ impl Op {
);
VirtualOp::MCP(r1, r2, r3)
}
"meq" => {
let (r1, r2, r3, r4) = check!(
four_regs(args, immediate, whole_op_span),
"mcpi" => {
let (r1, r2, imm) = check!(
two_regs_imm_12(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::MEQ(r1, r2, r3, r4)
VirtualOp::MCPI(r1, r2, imm)
}
"mcpi" => {
let (r1, r2, imm) = check!(
two_regs_imm_12(args, immediate, whole_op_span),
"meq" => {
let (r1, r2, r3, r4) = check!(
four_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::MCPI(r1, r2, imm)
VirtualOp::MEQ(r1, r2, r3, r4)
}
"sb" => {
let (r1, r2, imm) = check!(
Expand Down Expand Up @@ -784,6 +793,15 @@ impl Op {
);
VirtualOp::LOG(r1, r2, r3, r4)
}
"logd" => {
let (r1, r2, r3, r4) = check!(
four_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::LOGD(r1, r2, r3, r4)
}
"mint" => {
let r1 = check!(
single_reg(args, immediate, whole_op_span),
Expand Down Expand Up @@ -892,6 +910,33 @@ impl Op {
);
VirtualOp::S256(r1, r2, r3)
}
"xil" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::XIL(r1, r2)
}
"xis" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::XIS(r1, r2)
}
"xol" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::XOL(r1, r2)
}
"xos" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
Expand All @@ -901,6 +946,24 @@ impl Op {
);
VirtualOp::XOS(r1, r2)
}
"xwl" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::XWL(r1, r2)
}
"xws" => {
let (r1, r2) = check!(
two_regs(args, immediate, whole_op_span),
return err(warnings, errors),
warnings,
errors
);
VirtualOp::XWS(r1, r2)
}
"noop" => VirtualOp::NOOP,
"flag" => {
let r1 = check!(
Expand Down Expand Up @@ -1292,6 +1355,7 @@ impl fmt::Display for Op {
MOD(a, b, c) => format!("mod {} {} {}", a, b, c),
MODI(a, b, c) => format!("modi {} {} {}", a, b, c),
MOVE(a, b) => format!("move {} {}", a, b),
MOVI(a, b) => format!("movi {} {}", a, b),
MUL(a, b, c) => format!("mul {} {} {}", a, b, c),
MULI(a, b, c) => format!("muli {} {} {}", a, b, c),
NOT(a, b) => format!("not {} {}", a, b),
Expand Down Expand Up @@ -1335,6 +1399,7 @@ impl fmt::Display for Op {
CB(a) => format!("cb {}", a),
LDC(a, b, c) => format!("ldc {} {} {}", a, b, c),
LOG(a, b, c, d) => format!("log {} {} {} {}", a, b, c, d),
LOGD(a, b, c, d) => format!("logd {} {} {} {}", a, b, c, d),
MINT(a) => format!("mint {}", a),
RVRT(a) => format!("rvrt {}", a),
SLDC(a, b, c) => format!("sldc {} {} {}", a, b, c),
Expand All @@ -1347,7 +1412,12 @@ impl fmt::Display for Op {
ECR(a, b, c) => format!("ecr {} {} {}", a, b, c),
K256(a, b, c) => format!("k256 {} {} {}", a, b, c),
S256(a, b, c) => format!("s256 {} {} {}", a, b, c),
XIL(a, b) => format!("xil {} {}", a, b),
XIS(a, b) => format!("xis {} {}", a, b),
XOL(a, b) => format!("xol {} {}", a, b),
XOS(a, b) => format!("xos {} {}", a, b),
XWL(a, b) => format!("xwl {} {}", a, b),
XWS(a, b) => format!("xws {} {}", a, b),
NOOP => "noop".to_string(),
FLAG(a) => format!("flag {}", a),
GM(a, b) => format!("gm {} {}", a, b),
Expand Down
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