MLK-10199 ARM: clk-imx6q: set enet pll rate to 125Mhz

Set enet pll rate to 125Mhz for RGMII tx refrence clock to
support i.MX6q sabreauto cpu2 board.

changed the enet_ref clock name for 3.14 kernel.

Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit 6ee3d49271b1f13e359c1acde189dbb6dc4cb13e)

arch/arm/mach-imx/clk-imx6q.c

@@ -568,6 +568,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 		imx_clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
 	}
 
+	/*Set enet_ref clock to 125M to supply for RGMII tx_clk */
+	clk_set_rate(clk[IMX6QDL_CLK_ENET_REF], 125000000);
+
 #ifdef CONFIG_MX6_VPU_352M
 	/*
 	 * If VPU 352M is enabled, then PLL2_PDF2 need to be