Skip to content

Commit

Permalink
new: arty: fix for pin conflict
Browse files Browse the repository at this point in the history
Pin V17 was assigned to two different non-exclusive interfaces. This causes the tools to fail if both interfaces are used in a design. This was introduced when we changed the SPI interface to use IO10 for the SS pin to increase shield compatibility. Unfortunately this created a conflict with the GPIO interface connected to IO0-IO19. To fix the conflict I assigned the GPIO pin to the location attached to the SS pin on the SPI connector. I will create an issue to find a better fix for this.
  • Loading branch information
sbobrowicz authored Feb 2, 2017
1 parent 11b9fa1 commit f8b2758
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion new/board_files/arty/C.0/part0_pins.xml
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@
<pin index="61" name ="shield_dp0_dp19_tri_i_7" iostandard="LVCMOS33" loc="T16"/>
<pin index="62" name ="shield_dp0_dp19_tri_i_8" iostandard="LVCMOS33" loc="N15"/>
<pin index="63" name ="shield_dp0_dp19_tri_i_9" iostandard="LVCMOS33" loc="M16"/>
<pin index="64" name ="shield_dp0_dp19_tri_i_10" iostandard="LVCMOS33" loc="V17"/>
<pin index="64" name ="shield_dp0_dp19_tri_i_10" iostandard="LVCMOS33" loc="C1"/>
<pin index="65" name ="shield_dp0_dp19_tri_i_11" iostandard="LVCMOS33" loc="U18"/>
<pin index="66" name ="shield_dp0_dp19_tri_i_12" iostandard="LVCMOS33" loc="R17"/>
<pin index="67" name ="shield_dp0_dp19_tri_i_13" iostandard="LVCMOS33" loc="P17"/>
Expand Down

0 comments on commit f8b2758

Please sign in to comment.