Bug/duostra order

src/duostra/circuit_topology.cpp

@@ -140,4 +140,20 @@ void CircuitTopology::print_gates_with_prevs() {
     }
 }
 
+/**
+ * @brief HOTFIX map<old, new>
+ *
+ * @param map
+ */
+void Gate::set_prevs(std::unordered_map<size_t, size_t> const& map) {
+    for (size_t i = 0; i < _prevs.size(); i++) {
+        _prevs[i] = map.at(_prevs[i]);
+    }
+}
+void Gate::set_nexts(std::unordered_map<size_t, size_t> const& map) {
+    for (size_t i = 0; i < _nexts.size(); i++) {
+        _nexts[i] = map.at(_nexts[i]);
+    }
+}
+
 }  // namespace qsyn::duostra

src/duostra/circuit_topology.hpp

@@ -38,10 +38,13 @@ class Gate {
     qcir::GateRotationCategory get_type() const { return _type; }
     dvlab::Phase get_phase() const { return _phase; }
 
+    void set_id(size_t id) { _id = id; }
     void set_type(qcir::GateRotationCategory t) { _type = t; }
     void set_phase(dvlab::Phase p) { _phase = p; }
     void add_prev(size_t prev_gate_id);
     void add_next(size_t next_gate_id);
+    void set_prevs(std::unordered_map<size_t, size_t> const&);
+    void set_nexts(std::unordered_map<size_t, size_t> const&);
 
     bool is_available(std::unordered_map<size_t, size_t> const&) const;
     bool is_swapped() const { return _swap; }

src/duostra/duostra.cpp

@@ -79,6 +79,15 @@ void Duostra::make_dependency() {
         }
         all_gates.emplace_back(std::move(temp_gate));
     }
+    std::unordered_map<size_t, size_t> reordered_map;
+    for (size_t i = 0; i < all_gates.size(); i++) {
+        reordered_map[all_gates[i].get_id()] = i;
+    }
+    for (size_t i = 0; i < all_gates.size(); i++) {
+        all_gates[i].set_id(reordered_map[all_gates[i].get_id()]);
+        all_gates[i].set_prevs(reordered_map);
+        all_gates[i].set_nexts(reordered_map);
+    }
     _dependency = make_shared<DependencyGraph>(_logical_circuit->get_num_qubits(), std::move(all_gates));
 }
 

tests/conversion/duostra/dof/v0.6.2-bug.dof

@@ -0,0 +1,23 @@
+device read benchmark/topology/casablanca.layout
+qcir qubit add 3
+qcir gate add h 0
+qcir gate add h 1 --prepend
+qcir gate add cz 0 2 --prepend
+qcir gate add cz 1 2 --prepend
+qcir gate add h 0 --prepend
+qcir gate add h 1 --prepend
+qcir gate add h 2 --prepend
+qcir gate add h 2 --prepend
+qcir print -d
+duostra -c
+qcir new
+qcir qubit add 3
+qcir gate add cx 2 1
+qcir gate add cx 2 0
+qc2zx
+zxopt
+zx2qc
+qcir print -d
+duostra -c
+
+quit -f

tests/conversion/duostra/ref/v0.6.2-bug.log

@@ -0,0 +1,81 @@
+qsyn> device read benchmark/topology/casablanca.layout
+
+qsyn> qcir qubit add 3
+
+qsyn> qcir gate add h 0
+
+qsyn> qcir gate add h 1 --prepend
+
+qsyn> qcir gate add cz 0 2 --prepend
+
+qsyn> qcir gate add cz 1 2 --prepend
+
+qsyn> qcir gate add h 0 --prepend
+
+qsyn> qcir gate add h 1 --prepend
+
+qsyn> qcir gate add h 2 --prepend
+
+qsyn> qcir gate add h 2 --prepend
+
+qsyn> qcir print -d
+Q 0  - h( 4)----------------------------------cz( 2)-- h( 0)-
+Q 1  - h( 5)------------------cz( 3)-- h( 1)-
+Q 2  - h( 7)-- h( 6)----------cz( 3)----------cz( 2)-
+
+qsyn> duostra -c
+Routing...
+
+Checking...
+
+Duostra Result: 
+
+Scheduler:      search
+Router:         duostra
+Placer:         dfs
+
+Mapping Depth:  13
+Total Time:     16
+#SWAP:          1
+
+
+qsyn> qcir new
+
+qsyn> qcir qubit add 3
+
+qsyn> qcir gate add cx 2 1
+
+qsyn> qcir gate add cx 2 0
+
+qsyn> qc2zx
+
+qsyn> zxopt
+[error]    Unknown command!! (zxopt)
+
+qsyn> zx2qc
+[error]    ZXGraph 0 is not extractable because it is not graph-like!!
+
+qsyn> qcir print -d
+Q 0  -------------------------cx( 1)-
+Q 1  ---------cx( 0)-
+Q 2  ---------cx( 0)----------cx( 1)-
+
+qsyn> duostra -c
+Routing...
+
+Checking...
+
+Duostra Result: 
+
+Scheduler:      search
+Router:         duostra
+Placer:         dfs
+
+Mapping Depth:  10
+Total Time:     10
+#SWAP:          1
+
+
+qsyn> 
+qsyn> quit -f
+