[RISC-V] ECLIC Port and GD32VF103 HAL Support#266

Merged

fpoussin merged 111 commits intoChibiOS:chibios-20.3.xfrom KarlK90:gd32vf103-riscv-eclic

Apr 6, 2021

+61,877

Commits on Apr 6, 2021

Add Nucleisys NMSIS sources
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Add RISC-V ECLIC startup and port files
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Migrate port and startup code to nmsis
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Add eclic interrupt driver
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Add eclic system reset
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Add GD32 registry STM32 renames will follow
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Add platform makefile
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Add STM32 HAL Drivers, already adjusted for eclic interrupts
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Replace STM32_ with GD32_
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Increase idle stacksize, add isr locking/unlocking
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Rename stm32_ to gd32_ , remove obsolete tim headers
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Sort and deduplicate trigger handlers
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Remove DMA features not found on gd32vf103
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Rename DMA1 -> DMA0 and channels to start at zero
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Rename DMA2 -> DMA1 and channels to start at zero
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Add renumbered dma channel definitions
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Rename DMA interrupt flags
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Rename DMA ISR register to INTF
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DMA rename IFCR -> INTC
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Rename DMA CCR -> CTL
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Rename DMA CNDTR CPAR CMAR registers
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GPIO Remove obsolete ports, rename registers
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Rename GPIO registers
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Rename AFIO register definitions
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Remove SD card interface defines
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Remove USB HS peripheral, start rename registers
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Rename OTG1 -> USBFS
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Rename otg -> usbfs
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Remove OTG definitions, those are present in gd32_otg.h
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Remove otg stepping, continue rename registers usbfs
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Rename missing otg host registers
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Rename OTG device registers
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Rename missed register, fix rename bug, otg done
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Remove I2C3 peripheral, as it isn't present in this chip
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Rename I2C registers, add fast mode plus register
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Add fast mode plus stub
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Remove STM32F1x specific checks
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Correct DMA channel macros to start from 0
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Add i2c fast mode plus
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Rename I2C1 -> I2C0
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Rename I2C2 -> I2C1
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Rename USART registers
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Remove USART peripherals not present in this device
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Rename USARTx to start at 0
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Rename UARTx to start at 0
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No DMA for UART4
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Revert AFIO USART remapping register changes
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Remove CAN peripheral not present on this device
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Add POC GD32 overclocking flags
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CAN Register renames
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Rename missing CAN registers
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Rename DAC peripheral registers
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Rename missing DAC register definitions
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Remove DAC features not found on this device
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Rename RTC registers
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Rename SPI registers
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Rename i2s registers
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Remove I2S Peripherals not found on this device
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Renumber SPI to begin at 0
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Rename Independent Watchdog registers
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Rename TIM registers
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Remove timers not found on this device
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Renumber TIM to begin at 0
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Use NMSIS functions for periodic systick handling
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Rename ADC registers
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Rename FLASH registers
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Rename RCC -> RCU
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Rename RCU registers
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Rename PWR -> PMU
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Rename STM32F1xx -> GD32VF103
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Rename PMU register defines
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Rename BKP registers
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Rename EXMC -> FSMC
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Rename STM32 clocks to GD32 names
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Rename RCU pll clock names
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Rename f105 hal to gd32vf103 hal
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Rename EXTI registers, remove 5..9 handler
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Rename missed adc registers
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Rename EXTI15_10 to EXTI10_15
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GD32VF103 define rename
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Revert "remove 5..9 handler"
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Renumber CAN peripherals to start from 0
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Remove unified can interrupts which are not present on this device
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Rename DAC1 to just DAC
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Replace GD32_DAC_DAC with GD32_DAC
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Renumber ADC peripherals to begin at 0
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Delete unused exti and control defines
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Remove unused USB OTG Defines
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Rename RCU_CIR and RCU_APB2RST registers
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Renumber SPI RCU defines to begin at 0
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Rename RCU APB1RSTR register and remove unused peripherals
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Rename RCU_AHBENR
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Rename RCU registers
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Remove unused RCU_CFG1 defines
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Rename CMSIS header file to gd32vf103.h
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Merge HAL files
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Remove STM32 registry
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Rename STM32 to GD32
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Add SystemCoreClock again
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Correct default values and usb prescaler defines
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Explicitly define all capabilities in gd32registry
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Add previously undefined constants
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Add Sipeed Longan Nano Board
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Fix periodic tick timer
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Update longan nano board
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Add USB CDC demo for the longan nano board
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Move ECLIC IRQ triggers to driver files
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Update demo mcuconf.h with ECLIC triggers
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Remove duplicate defines
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Add myself to copyright notes :-)
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Fix VBUSSENS for Longan Nano
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