Update core_ca.h #216
Update core_ca.h #216
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Small bugs fixed
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@Masmiseim36, could you double check this one? |
| @@ -1015,7 +1015,7 @@ typedef struct | |||
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| /* GICInterface HPPIR Register */ | |||
| #define GICInterface_HPPIR_INTID_Pos 0U /*!< PTIM HPPIR: INTID Position */ | |||
| #define GICInterface_HPPIR_INTID_Msk (0xFFFFFFU /*<< GICInterface_HPPIR_INTID_Pos*/) /*!< PTIM HPPIR: INTID Mask */ | |||
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According to https://arm-software.github.io/CMSIS_5/Core_A/html/structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6
the value 0xFFFFFFU is correct.
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@NVMarkovich Which documentation are you referring to?
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IHI0048B_gic_architecture_specification_GICv2-GICv1.pdf
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@JonatanAntoni: I think the CMSIS documentation also needs to be updated
| #define GICInterface_DIR_INTID_Pos 0U /*!< PTIM DIR: INTID Position */ | ||
| #define GICInterface_DIR_INTID_Msk (0xFFFFFFU /*<< GICInterface_DIR_INTID_Pos*/) /*!< PTIM DIR: INTID Mask */ | ||
| #define GICInterface_DIR_INTID_Pos 0U /*!< GICInterface DIR: INTID Position */ | ||
| #define GICInterface_DIR_INTID_Msk (0xFFFFFFU /*<< GICInterface_DIR_INTID_Pos*/) /*!< GICInterface DIR: INTID Mask */ | ||
| #define GICInterface_DIR_INTID(x) (((uint32_t)(((uint32_t)(x)) /*<< GICInterface_DIR_INTID_Pos*/)) & GICInterface_DIR_INTID_Msk) |
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According to https://arm-software.github.io/CMSIS_5/Core_A/html/structGICInterface__Type.html#a554bd1f88421df3189c664b9fd9c02aa
the value 0xFFFFFFU is correct.
Also in Version six:
https://arm-software.github.io/CMSIS_6/latest/Core_A/structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6
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You are right, I was referring to an older spec for Architecture version 2.0: ARM IHI 0048B (ID061411)
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Here the remark is about the PTIM comment, not about the value
| #define ISR_I_Msk (1UL << ISR_I_Pos) /*!< \brief ISR: I Mask */ | ||
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| #define ISR_F_Pos 11U /*!< \brief ISR: F Position */ | ||
| #define ISR_F_Pos 6U /*!< \brief ISR: F Position */ | ||
| #define ISR_F_Msk (1UL << ISR_F_Pos) /*!< \brief ISR: F Mask */ |
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According to https://developer.arm.com/documentation/ddi0406/b/System-Level-Architecture/Virtual-Memory-System-Architecture--VMSA-/CP15-registers-for-a-VMSA-implementation/c12--Interrupt-Status-Register--ISR- this change is correct.
But the CMSIS documentation says something different:
https://arm-software.github.io/CMSIS_5/Core_A/html/group__CMSIS__ISR__BITS.html#ga8c6d55d243da46ed7ca05c3941316c8d
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The values appear to have been corrected in the sixth version of the CMSIS documentation:
https://arm-software.github.io/CMSIS_6/latest/Core_A/unionISR__Type.html
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May be the CMSIS documentation needs change too?
Small bugs fixed