From 6820576abba502ab73785e59378b9fca435ff8ab Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Thu, 9 Aug 2018 11:53:33 +0200 Subject: [PATCH] arch: arm: Migrate to new logging subsys Migrate from SYS_LOG to LOG logging mechanism. Signed-off-by: Olivier Martin --- arch/Kconfig | 26 +++++++++++++++++ arch/arm/core/cortex_m/mpu/arm_core_mpu.c | 10 +++++-- arch/arm/core/cortex_m/mpu/arm_mpu.c | 27 ++++++++++-------- arch/arm/core/cortex_m/mpu/nxp_mpu.c | 34 +++++++++++------------ 4 files changed, 64 insertions(+), 33 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 0e63a3c196c6..c5e923a55acf 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -136,6 +136,32 @@ config SIMPLE_FATAL_ERROR_HANDLER for footprint-concerned systems. Only enable this option if you do not want debug capabilities in case of system fatal error. +choice + prompt "Architecture logging level" + default ARCH_LOG_LEVEL_DBG + +config ARCH_LOG_LEVEL_OFF + bool "Off" +config ARCH_LOG_LEVEL_ERR + bool "Error" +config ARCH_LOG_LEVEL_WRN + bool "Warning" +config ARCH_LOG_LEVEL_INF + bool "Info" +config ARCH_LOG_LEVEL_DBG + bool "Debug" + +endchoice + +config ARCH_LOG_LEVEL + int + default 0 if ARCH_LOG_LEVEL_OFF + default 1 if ARCH_LOG_LEVEL_ERR + default 2 if ARCH_LOG_LEVEL_WRN + default 3 if ARCH_LOG_LEVEL_INF + default 4 if ARCH_LOG_LEVEL_DBG + + menu "Interrupt Configuration" # # Interrupt related configs diff --git a/arch/arm/core/cortex_m/mpu/arm_core_mpu.c b/arch/arm/core/cortex_m/mpu/arm_core_mpu.c index 2b3e971e33f2..7b3940eb80f1 100644 --- a/arch/arm/core/cortex_m/mpu/arm_core_mpu.c +++ b/arch/arm/core/cortex_m/mpu/arm_core_mpu.c @@ -10,7 +10,11 @@ #include #include #include -#include + +#define LOG_MODULE_NAME arm_core_mpu +#define LOG_LEVEL CONFIG_ARCH_LOG_LEVEL +#include +LOG_MODULE_REGISTER(); #if defined(CONFIG_MPU_STACK_GUARD) /* @@ -50,7 +54,7 @@ void configure_mpu_stack_guard(struct k_thread *thread) */ void configure_mpu_user_context(struct k_thread *thread) { - SYS_LOG_DBG("configure user thread %p's context", thread); + LOG_DBG("configure user thread %p's context", thread); arm_core_mpu_disable(); arm_core_mpu_configure_user_context(thread); arm_core_mpu_enable(); @@ -66,7 +70,7 @@ void configure_mpu_user_context(struct k_thread *thread) */ void configure_mpu_mem_domain(struct k_thread *thread) { - SYS_LOG_DBG("configure thread %p's domain", thread); + LOG_DBG("configure thread %p's domain", thread); arm_core_mpu_disable(); arm_core_mpu_configure_mem_domain(thread->mem_domain_info.mem_domain); arm_core_mpu_enable(); diff --git a/arch/arm/core/cortex_m/mpu/arm_mpu.c b/arch/arm/core/cortex_m/mpu/arm_mpu.c index 9734fca96c6e..e2b56b50aea1 100644 --- a/arch/arm/core/cortex_m/mpu/arm_mpu.c +++ b/arch/arm/core/cortex_m/mpu/arm_mpu.c @@ -11,9 +11,12 @@ #include #include #include -#include #include +#define LOG_MODULE_NAME arm_mpu +#include +LOG_MODULE_REGISTER(); + /** * Get the number of supported MPU regions. */ @@ -48,7 +51,7 @@ static void _region_init(u32_t index, struct arm_mpu_region *region_conf) MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk) | MPU_RBAR_VALID_Msk | index; MPU->RASR = region_conf->attr | MPU_RASR_ENABLE_Msk; - SYS_LOG_DBG("[%d] 0x%08x 0x%08x", + LOG_DBG("[%d] 0x%08x 0x%08x", index, region_conf->base, region_conf->attr); } @@ -202,7 +205,7 @@ static inline void _disable_region(u32_t r_index) "Index 0x%x out-of-bound (supported regions: 0x%x)\n", r_index, _get_num_regions()); - SYS_LOG_DBG("disable region 0x%x", r_index); + LOG_DBG("disable region 0x%x", r_index); /* Disable region */ ARM_MPU_ClrRegion(r_index); } @@ -269,7 +272,7 @@ void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size) { struct arm_mpu_region region_conf; - SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size); + LOG_DBG("Region info: 0x%x 0x%x", base, size); u32_t region_index = _get_region_index_by_type(type); region_conf.attr = _get_region_attr_by_type(type, size); region_conf.base = base; @@ -309,19 +312,19 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain) struct arm_mpu_region region_conf; if (mem_domain) { - SYS_LOG_DBG("configure domain: %p", mem_domain); + LOG_DBG("configure domain: %p", mem_domain); num_partitions = mem_domain->num_partitions; pparts = mem_domain->partitions; } else { - SYS_LOG_DBG("disable domain partition regions"); + LOG_DBG("disable domain partition regions"); num_partitions = 0; pparts = NULL; } for (; region_index < _get_num_regions(); region_index++) { if (num_partitions && pparts->size) { - SYS_LOG_DBG("set region 0x%x 0x%x 0x%x", - region_index, pparts->start, pparts->size); + LOG_DBG("set region 0x%x 0x%x 0x%x", + region_index, pparts->start, pparts->size); region_conf.base = pparts->start; region_conf.attr = _get_region_attr_by_conf(pparts->attr, @@ -348,12 +351,12 @@ void arm_core_mpu_configure_mem_partition(u32_t part_index, _get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION); struct arm_mpu_region region_conf; - SYS_LOG_DBG("configure partition index: %u", part_index); + LOG_DBG("configure partition index: %u", part_index); if (part && (region_index + part_index < _get_num_regions())) { - SYS_LOG_DBG("set region 0x%x 0x%x 0x%x", - region_index + part_index, part->start, part->size); + LOG_DBG("set region 0x%x 0x%x 0x%x", + region_index + part_index, part->start, part->size); region_conf.attr = _get_region_attr_by_conf(part->attr, part->size); region_conf.base = part->start; @@ -477,7 +480,7 @@ static int arm_mpu_init(struct device *arg) return -1; } - SYS_LOG_DBG("total region count: %d", _get_num_regions()); + LOG_DBG("total region count: %d", _get_num_regions()); arm_core_mpu_disable(); diff --git a/arch/arm/core/cortex_m/mpu/nxp_mpu.c b/arch/arm/core/cortex_m/mpu/nxp_mpu.c index 133efea064ce..2538797b3471 100644 --- a/arch/arm/core/cortex_m/mpu/nxp_mpu.c +++ b/arch/arm/core/cortex_m/mpu/nxp_mpu.c @@ -10,10 +10,14 @@ #include #include #include -#include #include #include +#define LOG_MODULE_NAME nxp_mpu +#define LOG_LEVEL CONFIG_ARCH_LOG_LEVEL +#include +LOG_MODULE_REGISTER(); + /* NXP MPU Enabled state */ static u8_t nxp_mpu_enabled; @@ -92,7 +96,7 @@ static void _region_init(u32_t index, u32_t region_base, SYSMPU->WORD[index][3] = SYSMPU_WORD_VLD_MASK; } - SYS_LOG_DBG("[%d] 0x%08x 0x%08x 0x%08x 0x%08x", index, + LOG_DBG("[%d] 0x%08x 0x%08x 0x%08x 0x%08x", index, SYSMPU->WORD[index][0], SYSMPU->WORD[index][1], SYSMPU->WORD[index][2], @@ -225,7 +229,7 @@ void arm_core_mpu_disable(void) */ void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size) { - SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size); + LOG_DBG("Region info: 0x%x 0x%x", base, size); u32_t region_index = _get_region_index_by_type(type); u32_t region_attr = _get_region_attr_by_type(type); @@ -265,11 +269,11 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain) struct k_mem_partition *pparts; if (mem_domain) { - SYS_LOG_DBG("configure domain: %p", mem_domain); + LOG_DBG("configure domain: %p", mem_domain); num_partitions = mem_domain->num_partitions; pparts = mem_domain->partitions; } else { - SYS_LOG_DBG("disable domain partition regions"); + LOG_DBG("disable domain partition regions"); num_partitions = 0; pparts = NULL; } @@ -280,7 +284,7 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain) */ for (; region_index < _get_num_usable_regions(); region_index++) { if (num_partitions && pparts->size) { - SYS_LOG_DBG("set region 0x%x 0x%x 0x%x", + LOG_DBG("set region 0x%x 0x%x 0x%x", region_index, pparts->start, pparts->size); region_attr = pparts->attr; _region_init(region_index, pparts->start, @@ -288,7 +292,7 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain) region_attr); num_partitions--; } else { - SYS_LOG_DBG("disable region 0x%x", region_index); + LOG_DBG("disable region 0x%x", region_index); /* Disable region */ SYSMPU->WORD[region_index][0] = 0; SYSMPU->WORD[region_index][1] = 0; @@ -312,17 +316,17 @@ void arm_core_mpu_configure_mem_partition(u32_t part_index, _get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION); u32_t region_attr; - SYS_LOG_DBG("configure partition index: %u", part_index); + LOG_DBG("configure partition index: %u", part_index); if (part) { - SYS_LOG_DBG("set region 0x%x 0x%x 0x%x", + LOG_DBG("set region 0x%x 0x%x 0x%x", region_index + part_index, part->start, part->size); region_attr = part->attr; _region_init(region_index + part_index, part->start, ENDADDR_ROUND(part->start + part->size), region_attr); } else { - SYS_LOG_DBG("disable region 0x%x", region_index); + LOG_DBG("disable region 0x%x", region_index); /* Disable region */ SYSMPU->WORD[region_index + part_index][0] = 0; SYSMPU->WORD[region_index + part_index][1] = 0; @@ -341,7 +345,7 @@ void arm_core_mpu_mem_partition_remove(u32_t part_index) u32_t region_index = _get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION); - SYS_LOG_DBG("disable region 0x%x", region_index); + LOG_DBG("disable region 0x%x", region_index); /* Disable region */ SYSMPU->WORD[region_index + part_index][0] = 0; SYSMPU->WORD[region_index + part_index][1] = 0; @@ -424,7 +428,7 @@ static void _nxp_mpu_config(void) __ASSERT(mpu_config.num_regions <= _get_num_regions(), "too many static MPU regions defined"); - SYS_LOG_DBG("total region count: %d", _get_num_regions()); + LOG_DBG("total region count: %d", _get_num_regions()); /* Disable MPU */ SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK; @@ -491,11 +495,5 @@ static int nxp_mpu_init(struct device *arg) return 0; } -#if defined(CONFIG_SYS_LOG) -/* To have logging the driver needs to be initialized later */ -SYS_INIT(nxp_mpu_init, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); -#else SYS_INIT(nxp_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); -#endif