From 0a2c717bc97d2d9a20fdb0564bd2e0e64830456c Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Thu, 23 Sep 2021 12:09:47 -0700 Subject: [PATCH 01/10] Add torture option to chipyard makefile --- common.mk | 18 ++++++++++++++++++ toolchains/riscv-tools/riscv-isa-sim | 2 +- tools/torture | 2 +- 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/common.mk b/common.mk index 1fa626cf15..350a97dee5 100644 --- a/common.mk +++ b/common.mk @@ -46,6 +46,7 @@ HELP_COMMANDS += \ " verilog = generate intermediate verilog files from chisel elaboration and firrtl passes" \ " firrtl = generate intermediate firrtl files from chisel elaboration" \ " run-tests = run all assembly and benchmark tests" \ +" torture = run torture on the RTL testbench" \ " launch-sbt = start sbt terminal" ######################################################################################### @@ -245,6 +246,23 @@ $(output_dir)/%.run: $(output_dir)/% $(sim) $(output_dir)/%.out: $(output_dir)/% $(sim) (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< >(spike-dasm > $@) | tee $<.log) +######################################################################################### +# run torture rules +######################################################################################### +.PHONY: torture torture-overnight + +torture: $(output_dir) $(sim) + $(MAKE) -C $(base_dir)/tools/torture/output clean + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) gen rtest + cp -r $(base_dir)/tools/torture/output $(output_dir)/torture + rm $(output_dir)/torture/Makefile + +torture-overnight: $(output_dir) $(sim) + $(MAKE) -C $(base_dir)/tools/torture/output clean + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) overnight + cp -r $(base_dir)/tools/torture/output $(output_dir)/torture + rm $(output_dir)/torture/Makefile + ######################################################################################### # include build/project specific makefrags made from the generator ######################################################################################### diff --git a/toolchains/riscv-tools/riscv-isa-sim b/toolchains/riscv-tools/riscv-isa-sim index bf4b1e09ed..d6a0c5afd5 160000 --- a/toolchains/riscv-tools/riscv-isa-sim +++ b/toolchains/riscv-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit bf4b1e09ed8e7a11ecff9891b12ce5d7f3375722 +Subproject commit d6a0c5afd5e7615f389e057d813304c216abf0d4 diff --git a/tools/torture b/tools/torture index 59b0f0f224..b2b66a66d5 160000 --- a/tools/torture +++ b/tools/torture @@ -1 +1 @@ -Subproject commit 59b0f0f224ff4f1eb6ebb1b4dd7eaf1ab3fac2e5 +Subproject commit b2b66a66d51b360e0ae95017774d03377c78c574 From 9d458b716591b8eb6669bbc1a31fdca2b68640b6 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Thu, 23 Sep 2021 20:37:52 -0700 Subject: [PATCH 02/10] Add esp-tools patch --- common.mk | 6 ++---- toolchains/esp-tools/riscv-isa-sim | 2 +- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/common.mk b/common.mk index 350a97dee5..3465986c28 100644 --- a/common.mk +++ b/common.mk @@ -47,6 +47,7 @@ HELP_COMMANDS += \ " firrtl = generate intermediate firrtl files from chisel elaboration" \ " run-tests = run all assembly and benchmark tests" \ " torture = run torture on the RTL testbench" \ +" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" \ " launch-sbt = start sbt terminal" ######################################################################################### @@ -258,10 +259,7 @@ torture: $(output_dir) $(sim) rm $(output_dir)/torture/Makefile torture-overnight: $(output_dir) $(sim) - $(MAKE) -C $(base_dir)/tools/torture/output clean - $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) overnight - cp -r $(base_dir)/tools/torture/output $(output_dir)/torture - rm $(output_dir)/torture/Makefile + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) rnight ######################################################################################### # include build/project specific makefrags made from the generator diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim index 467da4f613..63a3f1bf04 160000 --- a/toolchains/esp-tools/riscv-isa-sim +++ b/toolchains/esp-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit 467da4f613e2a447af35e69ee4f14e5adc94664f +Subproject commit 63a3f1bf04dc7ef487024f0af648d1bbf57f920b From 61bda677495102b1ae9c5e3b0c98483cb73be364 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 24 Sep 2021 12:37:52 -0700 Subject: [PATCH 03/10] Bump spike to get the signature bug fix --- toolchains/esp-tools/riscv-isa-sim | 2 +- toolchains/riscv-tools/riscv-isa-sim | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim index 63a3f1bf04..fd11517153 160000 --- a/toolchains/esp-tools/riscv-isa-sim +++ b/toolchains/esp-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit 63a3f1bf04dc7ef487024f0af648d1bbf57f920b +Subproject commit fd11517153792b5015ca7c295cbdd85cc1d56c53 diff --git a/toolchains/riscv-tools/riscv-isa-sim b/toolchains/riscv-tools/riscv-isa-sim index d6a0c5afd5..ce42f1b55a 160000 --- a/toolchains/riscv-tools/riscv-isa-sim +++ b/toolchains/riscv-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit d6a0c5afd5e7615f389e057d813304c216abf0d4 +Subproject commit ce42f1b55a3fa5a3a522439b5370be2256f68862 From 395bd534a3d0ab0201c475df8fe439c57862cc06 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 24 Sep 2021 12:52:25 -0700 Subject: [PATCH 04/10] Add documentation --- common.mk | 3 ++- docs/Advanced-Concepts/Debugging-RTL.rst | 16 ++++++++++++++-- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/common.mk b/common.mk index 3465986c28..f5c8cf7080 100644 --- a/common.mk +++ b/common.mk @@ -258,8 +258,9 @@ torture: $(output_dir) $(sim) cp -r $(base_dir)/tools/torture/output $(output_dir)/torture rm $(output_dir)/torture/Makefile +NIGHT_OPTIONS := torture-overnight: $(output_dir) $(sim) - $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) rnight + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) OPTIONS=$(NIGHT_OPTIONS) rnight ######################################################################################### # include build/project specific makefrags made from the generator diff --git a/docs/Advanced-Concepts/Debugging-RTL.rst b/docs/Advanced-Concepts/Debugging-RTL.rst index 6831cc4acd..97b4e2b7b1 100644 --- a/docs/Advanced-Concepts/Debugging-RTL.rst +++ b/docs/Advanced-Concepts/Debugging-RTL.rst @@ -83,8 +83,20 @@ Torture tests The RISC-V torture utility generates random RISC-V assembly streams, compiles them, runs them on both the Spike functional model and the SW simulator, and verifies identical program behavior. The torture utility can also be configured to run -continuously for stress-testing. The torture utility exists within the ``utilities`` -directory. +continuously for stress-testing. The torture utility exists within the ``tools`` +directory. To run torture test, run make in the simulation direcotry: + +.. code-block:: shell + + make CONFIG=CustomConfig torture + +To run overnight test (repeated random tests), run + +.. code-block:: shell + + make CONFIG=CustomConfig NIGHT_OPTIONS= torture-overnight + +You can find the overnight options in `overnight/src/main/scala/main.scala` in the torture repo. Firesim Debugging --------------------------- From 160a28de1c8a62f3a9344c4c24fd40b2a637b724 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 24 Sep 2021 13:36:18 -0700 Subject: [PATCH 05/10] Move torture rules to a fragment --- common.mk | 20 +++----------------- tools/torture | 2 +- 2 files changed, 4 insertions(+), 18 deletions(-) diff --git a/common.mk b/common.mk index f5c8cf7080..c40ef216b7 100644 --- a/common.mk +++ b/common.mk @@ -46,8 +46,8 @@ HELP_COMMANDS += \ " verilog = generate intermediate verilog files from chisel elaboration and firrtl passes" \ " firrtl = generate intermediate firrtl files from chisel elaboration" \ " run-tests = run all assembly and benchmark tests" \ -" torture = run torture on the RTL testbench" \ -" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" \ +" torture = run torture on the RTL testbench" \ +" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" \ " launch-sbt = start sbt terminal" ######################################################################################### @@ -58,6 +58,7 @@ include $(base_dir)/generators/cva6/cva6.mk include $(base_dir)/generators/tracegen/tracegen.mk include $(base_dir)/generators/nvdla/nvdla.mk include $(base_dir)/tools/dromajo/dromajo.mk +include $(base_dir)/tools/torture/torture.mk ######################################################################################### # Prerequisite lists @@ -247,21 +248,6 @@ $(output_dir)/%.run: $(output_dir)/% $(sim) $(output_dir)/%.out: $(output_dir)/% $(sim) (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< >(spike-dasm > $@) | tee $<.log) -######################################################################################### -# run torture rules -######################################################################################### -.PHONY: torture torture-overnight - -torture: $(output_dir) $(sim) - $(MAKE) -C $(base_dir)/tools/torture/output clean - $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) gen rtest - cp -r $(base_dir)/tools/torture/output $(output_dir)/torture - rm $(output_dir)/torture/Makefile - -NIGHT_OPTIONS := -torture-overnight: $(output_dir) $(sim) - $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) OPTIONS=$(NIGHT_OPTIONS) rnight - ######################################################################################### # include build/project specific makefrags made from the generator ######################################################################################### diff --git a/tools/torture b/tools/torture index b2b66a66d5..52ff6d3466 160000 --- a/tools/torture +++ b/tools/torture @@ -1 +1 @@ -Subproject commit b2b66a66d51b360e0ae95017774d03377c78c574 +Subproject commit 52ff6d3466268b1f6baac22512703bd2c2b4391b From 95f44cea36f1390df20ffefd66575ee69a84cd85 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 24 Sep 2021 13:56:07 -0700 Subject: [PATCH 06/10] Fix docs --- docs/Advanced-Concepts/Debugging-RTL.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/Advanced-Concepts/Debugging-RTL.rst b/docs/Advanced-Concepts/Debugging-RTL.rst index 97b4e2b7b1..baddf5ae06 100644 --- a/docs/Advanced-Concepts/Debugging-RTL.rst +++ b/docs/Advanced-Concepts/Debugging-RTL.rst @@ -94,7 +94,7 @@ To run overnight test (repeated random tests), run .. code-block:: shell - make CONFIG=CustomConfig NIGHT_OPTIONS= torture-overnight + make CONFIG=CustomConfig TORTURE_ONIGHT_OPTIONS= torture-overnight You can find the overnight options in `overnight/src/main/scala/main.scala` in the torture repo. From d34bf08563ecdb135ff78060bdf830623c35f0a9 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 24 Sep 2021 15:54:57 -0700 Subject: [PATCH 07/10] Fix space problem --- common.mk | 4 +--- tools/torture | 2 +- tools/torture.mk | 18 ++++++++++++++++++ 3 files changed, 20 insertions(+), 4 deletions(-) create mode 100644 tools/torture.mk diff --git a/common.mk b/common.mk index c40ef216b7..1b756089db 100644 --- a/common.mk +++ b/common.mk @@ -46,8 +46,6 @@ HELP_COMMANDS += \ " verilog = generate intermediate verilog files from chisel elaboration and firrtl passes" \ " firrtl = generate intermediate firrtl files from chisel elaboration" \ " run-tests = run all assembly and benchmark tests" \ -" torture = run torture on the RTL testbench" \ -" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" \ " launch-sbt = start sbt terminal" ######################################################################################### @@ -58,7 +56,7 @@ include $(base_dir)/generators/cva6/cva6.mk include $(base_dir)/generators/tracegen/tracegen.mk include $(base_dir)/generators/nvdla/nvdla.mk include $(base_dir)/tools/dromajo/dromajo.mk -include $(base_dir)/tools/torture/torture.mk +include $(base_dir)/tools/torture.mk ######################################################################################### # Prerequisite lists diff --git a/tools/torture b/tools/torture index 52ff6d3466..b2b66a66d5 160000 --- a/tools/torture +++ b/tools/torture @@ -1 +1 @@ -Subproject commit 52ff6d3466268b1f6baac22512703bd2c2b4391b +Subproject commit b2b66a66d51b360e0ae95017774d03377c78c574 diff --git a/tools/torture.mk b/tools/torture.mk new file mode 100644 index 0000000000..1a9d290486 --- /dev/null +++ b/tools/torture.mk @@ -0,0 +1,18 @@ +HELP_COMMANDS += \ +" torture = run torture on the RTL testbench" \ +" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" + +######################################################################################### +# run torture rules +######################################################################################### +.PHONY: torture torture-overnight + +torture: $(output_dir) $(sim) + $(MAKE) -C $(base_dir)/tools/torture/output clean + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) gen rtest + cp -r $(base_dir)/tools/torture/output $(output_dir)/torture + rm $(output_dir)/torture/Makefile + +TORTURE_ONIGHT_OPTIONS := +torture-overnight: $(output_dir) $(sim) + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) OPTIONS=$(TORTURE_ONIGHT_OPTIONS) rnight From 475abd838e802fc85c4aa221baf5067d336c067e Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Sat, 25 Sep 2021 00:55:37 -0700 Subject: [PATCH 08/10] Fix overnight option --- tools/torture.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/torture.mk b/tools/torture.mk index 1a9d290486..bcd129b6fc 100644 --- a/tools/torture.mk +++ b/tools/torture.mk @@ -15,4 +15,4 @@ torture: $(output_dir) $(sim) TORTURE_ONIGHT_OPTIONS := torture-overnight: $(output_dir) $(sim) - $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) OPTIONS=$(TORTURE_ONIGHT_OPTIONS) rnight + $(MAKE) -C $(base_dir)/tools/torture R_SIM=$(sim) OPTIONS="$(TORTURE_ONIGHT_OPTIONS)" rnight From 483132b1699a9121f912fb7e5348cb73ce40f174 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Tue, 28 Sep 2021 00:57:02 -0700 Subject: [PATCH 09/10] I should have proofread my docs --- docs/Advanced-Concepts/Debugging-RTL.rst | 4 ++-- tools/torture.mk | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/Advanced-Concepts/Debugging-RTL.rst b/docs/Advanced-Concepts/Debugging-RTL.rst index baddf5ae06..79b9428e33 100644 --- a/docs/Advanced-Concepts/Debugging-RTL.rst +++ b/docs/Advanced-Concepts/Debugging-RTL.rst @@ -84,13 +84,13 @@ The RISC-V torture utility generates random RISC-V assembly streams, compiles th runs them on both the Spike functional model and the SW simulator, and verifies identical program behavior. The torture utility can also be configured to run continuously for stress-testing. The torture utility exists within the ``tools`` -directory. To run torture test, run make in the simulation direcotry: +directory. To run torture tests, run ``make`` in the simulation directories: .. code-block:: shell make CONFIG=CustomConfig torture -To run overnight test (repeated random tests), run +To run overnight tests (repeated random tests), run .. code-block:: shell diff --git a/tools/torture.mk b/tools/torture.mk index bcd129b6fc..33bf98f6b0 100644 --- a/tools/torture.mk +++ b/tools/torture.mk @@ -1,6 +1,6 @@ HELP_COMMANDS += \ " torture = run torture on the RTL testbench" \ -" torture-overnight = run torture overnight tests (set OPTIONS to pass test options)" +" torture-overnight = run torture overnight tests (set TORTURE_ONIGHT_OPTIONS to pass test options)" ######################################################################################### # run torture rules From 7964a855fa03e3a18f5b38c4317ae0b9cb0a6895 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Thu, 30 Sep 2021 14:38:17 -0700 Subject: [PATCH 10/10] Switch to master after spike merge --- toolchains/esp-tools/riscv-isa-sim | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim index fd11517153..34741e07bc 160000 --- a/toolchains/esp-tools/riscv-isa-sim +++ b/toolchains/esp-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit fd11517153792b5015ca7c295cbdd85cc1d56c53 +Subproject commit 34741e07bc6b56f1762ce579537948d58e28cd5a