From 471f8879d799b9528ca0e02c4ba0c5861b5ea925 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 8 Apr 2023 16:38:36 -0700 Subject: [PATCH 1/2] Support banked/partitioned scratchpads --- generators/chipyard/src/main/scala/DigitalTop.scala | 2 +- .../src/main/scala/config/RocketConfigs.scala | 12 +++++++++--- generators/testchipip | 2 +- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/generators/chipyard/src/main/scala/DigitalTop.scala b/generators/chipyard/src/main/scala/DigitalTop.scala index 6711eac7b5..561af0d750 100644 --- a/generators/chipyard/src/main/scala/DigitalTop.scala +++ b/generators/chipyard/src/main/scala/DigitalTop.scala @@ -16,7 +16,7 @@ class DigitalTop(implicit p: Parameters) extends ChipyardSystem with testchipip.CanHavePeripheryCustomBootPin // Enables optional custom boot pin with testchipip.CanHavePeripheryBootAddrReg // Use programmable boot address register with testchipip.CanHaveTraceIO // Enables optionally adding trace IO - with testchipip.CanHaveBackingScratchpad // Enables optionally adding a backing scratchpad + with testchipip.CanHaveBankedScratchpad // Enables optionally adding a banked scratchpad with testchipip.CanHavePeripheryBlockDevice // Enables optionally adding the block device with testchipip.CanHavePeripheryTLSerial // Enables optionally adding the backing memory and serial adapter with sifive.blocks.devices.i2c.HasPeripheryI2C // Enables optionally adding the sifive I2C diff --git a/generators/chipyard/src/main/scala/config/RocketConfigs.scala b/generators/chipyard/src/main/scala/config/RocketConfigs.scala index 21b630cc66..a68ba55d6f 100644 --- a/generators/chipyard/src/main/scala/config/RocketConfigs.scala +++ b/generators/chipyard/src/main/scala/config/RocketConfigs.scala @@ -74,13 +74,19 @@ class L1ScratchpadRocketConfig extends Config( new chipyard.config.AbstractConfig) // DOC include start: mbusscratchpadrocket -class MbusScratchpadRocketConfig extends Config( - new testchipip.WithBackingScratchpad ++ // add mbus backing scratchpad - new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port +class MbusScratchpadOnlyRocketConfig extends Config( + new testchipip.WithMbusScratchpad(stripes=2, partitions=2) ++ // add 4 banks mbus backing scratchpad + new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) // DOC include end: mbusscratchpadrocket +class SbusScratchpadRocketConfig extends Config( + new testchipip.WithSbusScratchpad(base=0x70000000L, stripes=2, partitions=2) ++ // add 4 lanes sbus backing scratchpad + new freechips.rocketchip.subsystem.WithNBigCores(1) ++ + new chipyard.config.AbstractConfig) + + class MulticlockRocketConfig extends Config( new freechips.rocketchip.subsystem.WithAsynchronousRocketTiles(3, 3) ++ // Add async crossings between RocketTile and uncore new freechips.rocketchip.subsystem.WithNBigCores(1) ++ diff --git a/generators/testchipip b/generators/testchipip index a3e9c1ffea..8a1540ce90 160000 --- a/generators/testchipip +++ b/generators/testchipip @@ -1 +1 @@ -Subproject commit a3e9c1ffeae8af573831e4ac5fd00a76df0ca7f1 +Subproject commit 8a1540ce90405433ac377de5a6d331d34ff108df From 1e3d4aad460051c4fc030d10307097ea84766d33 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Mon, 10 Apr 2023 15:31:29 -0700 Subject: [PATCH 2/2] Update WithBackingScratchpad for firechip --- .../chipyard/src/main/scala/config/RocketConfigs.scala | 4 ++-- generators/firechip/src/main/scala/TargetConfigs.scala | 6 +++--- generators/testchipip | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/generators/chipyard/src/main/scala/config/RocketConfigs.scala b/generators/chipyard/src/main/scala/config/RocketConfigs.scala index a68ba55d6f..a0fab881b8 100644 --- a/generators/chipyard/src/main/scala/config/RocketConfigs.scala +++ b/generators/chipyard/src/main/scala/config/RocketConfigs.scala @@ -75,14 +75,14 @@ class L1ScratchpadRocketConfig extends Config( // DOC include start: mbusscratchpadrocket class MbusScratchpadOnlyRocketConfig extends Config( - new testchipip.WithMbusScratchpad(stripes=2, partitions=2) ++ // add 4 banks mbus backing scratchpad + new testchipip.WithMbusScratchpad(banks=2, partitions=2) ++ // add 2 partitions of 2 banks mbus backing scratchpad new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) // DOC include end: mbusscratchpadrocket class SbusScratchpadRocketConfig extends Config( - new testchipip.WithSbusScratchpad(base=0x70000000L, stripes=2, partitions=2) ++ // add 4 lanes sbus backing scratchpad + new testchipip.WithSbusScratchpad(base=0x70000000L, banks=4) ++ // add 4 banks sbus backing scratchpad new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) diff --git a/generators/firechip/src/main/scala/TargetConfigs.scala b/generators/firechip/src/main/scala/TargetConfigs.scala index c27abd5047..1c82129421 100644 --- a/generators/firechip/src/main/scala/TargetConfigs.scala +++ b/generators/firechip/src/main/scala/TargetConfigs.scala @@ -138,7 +138,7 @@ class WithFireSimConfigTweaks extends Config( class WithMinimalFireSimHighPerfConfigTweaks extends Config( new WithFireSimHighPerfClocking ++ new freechips.rocketchip.subsystem.WithNoMemPort ++ - new testchipip.WithBackingScratchpad ++ + new testchipip.WithMbusScratchpad ++ new WithMinimalFireSimDesignTweaks ) @@ -148,7 +148,7 @@ class WithMinimalFireSimHighPerfConfigTweaks extends Config( class WithMinimalAndBlockDeviceFireSimHighPerfConfigTweaks extends Config( new WithFireSimHighPerfClocking ++ new freechips.rocketchip.subsystem.WithNoMemPort ++ // removes mem port for FASEDBridge to match against - new testchipip.WithBackingScratchpad ++ // adds backing scratchpad for memory to replace FASED model + new testchipip.WithMbusScratchpad ++ // adds backing scratchpad for memory to replace FASED model new testchipip.WithBlockDevice(true) ++ // add in block device new WithMinimalFireSimDesignTweaks ) @@ -329,7 +329,7 @@ class FireSim16LargeBoomConfig extends Config( class FireSimNoMemPortConfig extends Config( new WithDefaultFireSimBridges ++ new freechips.rocketchip.subsystem.WithNoMemPort ++ - new testchipip.WithBackingScratchpad ++ + new testchipip.WithMbusScratchpad ++ new WithFireSimConfigTweaks ++ new chipyard.RocketConfig) diff --git a/generators/testchipip b/generators/testchipip index 8a1540ce90..35d7e1969d 160000 --- a/generators/testchipip +++ b/generators/testchipip @@ -1 +1 @@ -Subproject commit 8a1540ce90405433ac377de5a6d331d34ff108df +Subproject commit 35d7e1969d1d3e54d29a10901737d9b2ba2ab5a3