From 32f0f8390060e000db2aa8002d5c2e70f76865ec Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Thu, 6 Apr 2023 12:53:15 -0700 Subject: [PATCH] [ci skip] Update comments for FakePLLClockBinder --- .../chipyard/src/main/scala/clocking/ClockBinders.scala | 4 +++- generators/chipyard/src/main/scala/example/FlatChipTop.scala | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/generators/chipyard/src/main/scala/clocking/ClockBinders.scala b/generators/chipyard/src/main/scala/clocking/ClockBinders.scala index 6d0ace6974..a0dbe482d5 100644 --- a/generators/chipyard/src/main/scala/clocking/ClockBinders.scala +++ b/generators/chipyard/src/main/scala/clocking/ClockBinders.scala @@ -83,7 +83,9 @@ class WithPLLSelectorDividerClockGenerator extends OverrideLazyIOBinder({ val slowClockSource = ClockSourceNode(Seq(ClockSourceParameters())) val pllClockSource = ClockSourceNode(Seq(ClockSourceParameters())) - // The order of the connections to clockSelector.clockNode configures what + // The order of the connections to clockSelector.clockNode configures the inputs + // of the clockSelector's clockMux. Default to using the slowClockSource, + // software should enable the PLL, then switch to the pllClockSource clockSelector.clockNode := slowClockSource clockSelector.clockNode := pllClockSource diff --git a/generators/chipyard/src/main/scala/example/FlatChipTop.scala b/generators/chipyard/src/main/scala/example/FlatChipTop.scala index 97ac5032db..9e142bdac7 100644 --- a/generators/chipyard/src/main/scala/example/FlatChipTop.scala +++ b/generators/chipyard/src/main/scala/example/FlatChipTop.scala @@ -43,7 +43,9 @@ class FlatChipTop(implicit p: Parameters) extends LazyModule { val slowClockSource = ClockSourceNode(Seq(ClockSourceParameters())) val pllClockSource = ClockSourceNode(Seq(ClockSourceParameters())) - // The order of the connections to clockSelector.clockNode configures what + // The order of the connections to clockSelector.clockNode configures the inputs + // of the clockSelector's clockMux. Default to using the slowClockSource, + // software should enable the PLL, then switch to the pllClockSource clockSelector.clockNode := slowClockSource clockSelector.clockNode := pllClockSource