diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json new file mode 100644 index 000000000000..56d71ff48119 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json @@ -0,0 +1,203 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x800G" + }, + "Ethernet9": { + "default_brkout_mode": "1x800G" + }, + "Ethernet17": { + "default_brkout_mode": "1x800G" + }, + "Ethernet25": { + "default_brkout_mode": "1x800G" + }, + "Ethernet33": { + "default_brkout_mode": "1x800G" + }, + "Ethernet41": { + "default_brkout_mode": "1x800G" + }, + "Ethernet49": { + "default_brkout_mode": "1x800G" + }, + "Ethernet57": { + "default_brkout_mode": "1x800G" + }, + "Ethernet65": { + "default_brkout_mode": "1x800G" + }, + "Ethernet73": { + "default_brkout_mode": "1x800G" + }, + "Ethernet81": { + "default_brkout_mode": "1x800G" + }, + "Ethernet89": { + "default_brkout_mode": "1x800G" + }, + "Ethernet97": { + "default_brkout_mode": "1x800G" + }, + "Ethernet105": { + "default_brkout_mode": "1x800G" + }, + "Ethernet113": { + "default_brkout_mode": "1x800G" + }, + "Ethernet121": { + "default_brkout_mode": "1x800G" + }, + "Ethernet129": { + "default_brkout_mode": "1x800G" + }, + "Ethernet137": { + "default_brkout_mode": "1x800G" + }, + "Ethernet145": { + "default_brkout_mode": "1x800G" + }, + "Ethernet153": { + "default_brkout_mode": "1x800G" + }, + "Ethernet161": { + "default_brkout_mode": "1x800G" + }, + "Ethernet169": { + "default_brkout_mode": "1x800G" + }, + "Ethernet177": { + "default_brkout_mode": "1x800G" + }, + "Ethernet185": { + "default_brkout_mode": "1x800G" + }, + "Ethernet193": { + "default_brkout_mode": "1x800G" + }, + "Ethernet201": { + "default_brkout_mode": "1x800G" + }, + "Ethernet209": { + "default_brkout_mode": "1x800G" + }, + "Ethernet217": { + "default_brkout_mode": "1x800G" + }, + "Ethernet225": { + "default_brkout_mode": "1x800G" + }, + "Ethernet233": { + "default_brkout_mode": "1x800G" + }, + "Ethernet241": { + "default_brkout_mode": "1x800G" + }, + "Ethernet249": { + "default_brkout_mode": "1x800G" + }, + "Ethernet257": { + "default_brkout_mode": "1x800G" + }, + "Ethernet265": { + "default_brkout_mode": "1x800G" + }, + "Ethernet273": { + "default_brkout_mode": "1x800G" + }, + "Ethernet281": { + "default_brkout_mode": "1x800G" + }, + "Ethernet289": { + "default_brkout_mode": "1x800G" + }, + "Ethernet297": { + "default_brkout_mode": "1x800G" + }, + "Ethernet305": { + "default_brkout_mode": "1x800G" + }, + "Ethernet313": { + "default_brkout_mode": "1x800G" + }, + "Ethernet321": { + "default_brkout_mode": "1x800G" + }, + "Ethernet329": { + "default_brkout_mode": "1x800G" + }, + "Ethernet337": { + "default_brkout_mode": "1x800G" + }, + "Ethernet345": { + "default_brkout_mode": "1x800G" + }, + "Ethernet353": { + "default_brkout_mode": "1x800G" + }, + "Ethernet361": { + "default_brkout_mode": "1x800G" + }, + "Ethernet369": { + "default_brkout_mode": "1x800G" + }, + "Ethernet377": { + "default_brkout_mode": "1x800G" + }, + "Ethernet385": { + "default_brkout_mode": "1x800G" + }, + "Ethernet393": { + "default_brkout_mode": "1x800G" + }, + "Ethernet401": { + "default_brkout_mode": "1x800G" + }, + "Ethernet409": { + "default_brkout_mode": "1x800G" + }, + "Ethernet417": { + "default_brkout_mode": "1x800G" + }, + "Ethernet425": { + "default_brkout_mode": "1x800G" + }, + "Ethernet433": { + "default_brkout_mode": "1x800G" + }, + "Ethernet441": { + "default_brkout_mode": "1x800G" + }, + "Ethernet449": { + "default_brkout_mode": "1x800G" + }, + "Ethernet457": { + "default_brkout_mode": "1x800G" + }, + "Ethernet465": { + "default_brkout_mode": "1x800G" + }, + "Ethernet473": { + "default_brkout_mode": "1x800G" + }, + "Ethernet481": { + "default_brkout_mode": "1x800G" + }, + "Ethernet489": { + "default_brkout_mode": "1x800G" + }, + "Ethernet497": { + "default_brkout_mode": "1x800G" + }, + "Ethernet505": { + "default_brkout_mode": "1x800G" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G" + }, + "Ethernet515": { + "default_brkout_mode": "1x25G" + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini new file mode 100644 index 000000000000..02e760ad87bb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet1 41,42,43,44,45,46,47,48 eightHundredGigE0/1 0 800000 +Ethernet9 33,34,35,36,37,38,39,40 eightHundredGigE0/2 1 800000 +Ethernet17 57,58,59,60,61,62,63,64 eightHundredGigE0/3 2 800000 +Ethernet25 49,50,51,52,53,54,55,56 eightHundredGigE0/4 3 800000 +Ethernet33 73,74,75,76,77,78,79,80 eightHundredGigE0/5 4 800000 +Ethernet41 65,66,67,68,69,70,71,72 eightHundredGigE0/6 5 800000 +Ethernet49 89,90,91,92,93,94,95,96 eightHundredGigE0/7 6 800000 +Ethernet57 81,82,83,84,85,86,87,88 eightHundredGigE0/8 7 800000 +Ethernet65 105,106,107,108,109,110,111,112 eightHundredGigE0/9 8 800000 +Ethernet73 97,98,99,100,101,102,103,104 eightHundredGigE0/10 9 800000 +Ethernet81 121,122,123,124,125,126,127,128 eightHundredGigE0/11 10 800000 +Ethernet89 113,114,115,116,117,118,119,120 eightHundredGigE0/12 11 800000 +Ethernet97 137,138,139,140,141,142,143,144 eightHundredGigE0/13 12 800000 +Ethernet105 129,130,131,132,133,134,135,136 eightHundredGigE0/14 13 800000 +Ethernet113 153,154,155,156,157,158,159,160 eightHundredGigE0/15 14 800000 +Ethernet121 145,146,147,148,149,150,151,152 eightHundredGigE0/16 15 800000 +Ethernet129 169,170,171,172,173,174,175,176 eightHundredGigE0/17 16 800000 +Ethernet137 161,162,163,164,165,166,167,168 eightHundredGigE0/18 17 800000 +Ethernet145 185,186,187,188,189,190,191,192 eightHundredGigE0/19 18 800000 +Ethernet153 177,178,179,180,181,182,183,184 eightHundredGigE0/20 19 800000 +Ethernet161 201,202,203,204,205,206,207,208 eightHundredGigE0/21 20 800000 +Ethernet169 193,194,195,196,197,198,199,200 eightHundredGigE0/22 21 800000 +Ethernet177 217,218,219,220,221,222,223,224 eightHundredGigE0/23 22 800000 +Ethernet185 209,210,211,212,213,214,215,216 eightHundredGigE0/24 23 800000 +Ethernet193 1,2,3,4,5,6,7,8 eightHundredGigE0/25 24 800000 +Ethernet201 9,10,11,12,13,14,15,16 eightHundredGigE0/26 25 800000 +Ethernet209 17,18,19,20,21,22,23,24 eightHundredGigE0/27 26 800000 +Ethernet217 25,26,27,28,29,30,31,32 eightHundredGigE0/28 27 800000 +Ethernet225 249,250,251,252,253,254,255,256 eightHundredGigE0/29 28 800000 +Ethernet233 241,242,243,244,245,246,247,248 eightHundredGigE0/30 29 800000 +Ethernet241 233,234,235,236,237,238,239,240 eightHundredGigE0/31 30 800000 +Ethernet249 225,226,227,228,229,230,231,232 eightHundredGigE0/32 31 800000 +Ethernet257 257,258,259,260,261,262,263,264 eightHundredGigE0/33 32 800000 +Ethernet265 265,266,267,268,269,270,271,272 eightHundredGigE0/34 33 800000 +Ethernet273 273,274,275,276,277,278,279,280 eightHundredGigE0/35 34 800000 +Ethernet281 281,282,283,284,285,286,287,288 eightHundredGigE0/36 35 800000 +Ethernet289 505,506,507,508,509,510,511,512 eightHundredGigE0/37 36 800000 +Ethernet297 497,498,499,500,501,502,503,504 eightHundredGigE0/38 37 800000 +Ethernet305 489,490,491,492,493,494,495,496 eightHundredGigE0/39 38 800000 +Ethernet313 481,482,483,484,485,486,487,488 eightHundredGigE0/40 39 800000 +Ethernet321 297,298,299,300,301,302,303,304 eightHundredGigE0/41 40 800000 +Ethernet329 289,290,291,292,293,294,295,296 eightHundredGigE0/42 41 800000 +Ethernet337 313,314,315,316,317,318,319,320 eightHundredGigE0/43 42 800000 +Ethernet345 305,306,307,308,309,310,311,312 eightHundredGigE0/44 43 800000 +Ethernet353 329,330,331,332,333,334,335,336 eightHundredGigE0/45 44 800000 +Ethernet361 321,322,323,324,325,326,327,328 eightHundredGigE0/46 45 800000 +Ethernet369 345,346,347,348,349,350,351,352 eightHundredGigE0/47 46 800000 +Ethernet377 337,338,339,340,341,342,343,344 eightHundredGigE0/48 47 800000 +Ethernet385 361,362,363,364,365,366,367,368 eightHundredGigE0/49 48 800000 +Ethernet393 353,354,355,356,357,358,359,360 eightHundredGigE0/50 49 800000 +Ethernet401 377,378,379,380,381,382,383,384 eightHundredGigE0/51 50 800000 +Ethernet409 369,370,371,372,373,374,375,376 eightHundredGigE0/52 51 800000 +Ethernet417 393,394,395,396,397,398,399,400 eightHundredGigE0/53 52 800000 +Ethernet425 385,386,387,388,389,390,391,392 eightHundredGigE0/54 53 800000 +Ethernet433 409,410,411,412,413,414,415,416 eightHundredGigE0/55 54 800000 +Ethernet441 401,402,403,404,405,406,407,408 eightHundredGigE0/56 55 800000 +Ethernet449 425,426,427,428,429,430,431,432 eightHundredGigE0/57 56 800000 +Ethernet457 417,418,419,420,421,422,423,424 eightHundredGigE0/58 57 800000 +Ethernet465 441,442,443,444,445,446,447,448 eightHundredGigE0/59 58 800000 +Ethernet473 433,434,435,436,437,438,439,440 eightHundredGigE0/60 59 800000 +Ethernet481 457,458,459,460,461,462,463,464 eightHundredGigE0/61 60 800000 +Ethernet489 449,450,451,452,453,454,455,456 eightHundredGigE0/62 61 800000 +Ethernet497 473,474,475,476,477,478,479,480 eightHundredGigE0/63 62 800000 +Ethernet505 465,466,467,468,469,470,471,472 eightHundredGigE0/64 63 800000 +Ethernet513 513 twentyfiveGigE0/65 64 25000 +Ethernet515 515 twentyfiveGigE0/66 65 25000 diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile new file mode 100644 index 000000000000..ad2e534f2e58 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64oc-64x800G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml new file mode 100644 index 000000000000..33f2781d7b97 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml @@ -0,0 +1,14985 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02714356 + RX_LANE_MAP: 0x27506431 + TX_POLARITY_FLIP: 0x59 + RX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27360514 + RX_LANE_MAP: 0x46731520 + TX_POLARITY_FLIP: 0x8d + RX_POLARITY_FLIP: 0xd5 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50234716 + RX_LANE_MAP: 0x31642750 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250436 + RX_LANE_MAP: 0x30764215 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xbc + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x60427153 + RX_LANE_MAP: 0x15370426 + TX_POLARITY_FLIP: 0x16 + RX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0xb0 + RX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63250471 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63250471 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17526034 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x3d + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250634 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17526034 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14305267 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x72634150 + RX_LANE_MAP: 0x27340516 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31647025 + RX_LANE_MAP: 0x64531072 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0xaf + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x15602743 + RX_LANE_MAP: 0x52137604 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0xe7 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73564012 + RX_LANE_MAP: 0x34107625 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76243501 + RX_LANE_MAP: 0x35162470 + TX_POLARITY_FLIP: 0xa6 + RX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07546321 + RX_LANE_MAP: 0x25176430 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37164250 + RX_LANE_MAP: 0x75032614 + TX_POLARITY_FLIP: 0x32 + RX_POLARITY_FLIP: 0x3e + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73402516 + RX_LANE_MAP: 0x60347215 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x71345062 + RX_LANE_MAP: 0x42173056 + TX_POLARITY_FLIP: 0xa1 + RX_POLARITY_FLIP: 0x60 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70416352 + RX_LANE_MAP: 0x16053427 + TX_POLARITY_FLIP: 0x18 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x78 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc3 + RX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x89 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x43526071 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x56 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x43526071 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0xfe + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x56 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67524031 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x8b + RX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x1e + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x9e + RX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17524036 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x8b + RX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x1e + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x9e + RX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250436 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50314267 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37146250 + RX_LANE_MAP: 0x35062714 + TX_POLARITY_FLIP: 0xfe + RX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27165304 + RX_LANE_MAP: 0x75340126 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x45 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10527634 + RX_LANE_MAP: 0x53702614 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x89 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04561237 + RX_LANE_MAP: 0x05643217 + TX_POLARITY_FLIP: 0x31 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540123 + RX_LANE_MAP: 0x13056472 + TX_POLARITY_FLIP: 0xe8 + RX_POLARITY_FLIP: 0x5d + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x3012 + TX_POLARITY_FLIP: 0 + RX_LANE_MAP: 0x3012 + RX_POLARITY_FLIP: 0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 70 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 125 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 224 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 279 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 323 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 334 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 515 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [76, 274] + : + ENABLE: 0 + SPEED: 25000 + NUM_LANES: 1 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE + dport_map_enable: 1 + 26: + dport_map_port: 1 + 27: + dport_map_port: 2 + 28: + dport_map_port: 3 + 29: + dport_map_port: 4 + 22: + dport_map_port: 5 + 23: + dport_map_port: 6 + 24: + dport_map_port: 7 + 25: + dport_map_port: 8 + 37: + dport_map_port: 9 + 38: + dport_map_port: 10 + 39: + dport_map_port: 11 + 40: + dport_map_port: 12 + 33: + dport_map_port: 13 + 34: + dport_map_port: 14 + 35: + dport_map_port: 15 + 36: + dport_map_port: 16 + 48: + dport_map_port: 17 + 49: + dport_map_port: 18 + 50: + dport_map_port: 19 + 51: + dport_map_port: 20 + 44: + dport_map_port: 21 + 45: + dport_map_port: 22 + 46: + dport_map_port: 23 + 47: + dport_map_port: 24 + 59: + dport_map_port: 25 + 60: + dport_map_port: 26 + 61: + dport_map_port: 27 + 62: + dport_map_port: 28 + 55: + dport_map_port: 29 + 56: + dport_map_port: 30 + 57: + dport_map_port: 31 + 58: + dport_map_port: 32 + 70: + dport_map_port: 33 + 71: + dport_map_port: 34 + 72: + dport_map_port: 35 + 73: + dport_map_port: 36 + 66: + dport_map_port: 37 + 67: + dport_map_port: 38 + 68: + dport_map_port: 39 + 69: + dport_map_port: 40 + 81: + dport_map_port: 41 + 82: + dport_map_port: 42 + 83: + dport_map_port: 43 + 84: + dport_map_port: 44 + 77: + dport_map_port: 45 + 78: + dport_map_port: 46 + 79: + dport_map_port: 47 + 80: + dport_map_port: 48 + 92: + dport_map_port: 49 + 93: + dport_map_port: 50 + 94: + dport_map_port: 51 + 95: + dport_map_port: 52 + 88: + dport_map_port: 53 + 89: + dport_map_port: 54 + 90: + dport_map_port: 55 + 91: + dport_map_port: 56 + 103: + dport_map_port: 57 + 104: + dport_map_port: 58 + 105: + dport_map_port: 59 + 106: + dport_map_port: 60 + 99: + dport_map_port: 61 + 100: + dport_map_port: 62 + 101: + dport_map_port: 63 + 102: + dport_map_port: 64 + 114: + dport_map_port: 65 + 115: + dport_map_port: 66 + 116: + dport_map_port: 67 + 117: + dport_map_port: 68 + 110: + dport_map_port: 69 + 111: + dport_map_port: 70 + 112: + dport_map_port: 71 + 113: + dport_map_port: 72 + 125: + dport_map_port: 73 + 126: + dport_map_port: 74 + 127: + dport_map_port: 75 + 128: + dport_map_port: 76 + 121: + dport_map_port: 77 + 122: + dport_map_port: 78 + 123: + dport_map_port: 79 + 124: + dport_map_port: 80 + 136: + dport_map_port: 81 + 137: + dport_map_port: 82 + 138: + dport_map_port: 83 + 139: + dport_map_port: 84 + 132: + dport_map_port: 85 + 133: + dport_map_port: 86 + 134: + dport_map_port: 87 + 135: + dport_map_port: 88 + 147: + dport_map_port: 89 + 148: + dport_map_port: 90 + 149: + dport_map_port: 91 + 150: + dport_map_port: 92 + 143: + dport_map_port: 93 + 144: + dport_map_port: 94 + 145: + dport_map_port: 95 + 146: + dport_map_port: 96 + 1: + dport_map_port: 97 + 2: + dport_map_port: 98 + 3: + dport_map_port: 99 + 4: + dport_map_port: 100 + 5: + dport_map_port: 101 + 6: + dport_map_port: 102 + 7: + dport_map_port: 103 + 8: + dport_map_port: 104 + 11: + dport_map_port: 105 + 12: + dport_map_port: 106 + 13: + dport_map_port: 107 + 14: + dport_map_port: 108 + 15: + dport_map_port: 109 + 16: + dport_map_port: 110 + 17: + dport_map_port: 111 + 18: + dport_map_port: 112 + 169: + dport_map_port: 113 + 170: + dport_map_port: 114 + 171: + dport_map_port: 115 + 172: + dport_map_port: 116 + 165: + dport_map_port: 117 + 166: + dport_map_port: 118 + 167: + dport_map_port: 119 + 168: + dport_map_port: 120 + 158: + dport_map_port: 121 + 159: + dport_map_port: 122 + 160: + dport_map_port: 123 + 161: + dport_map_port: 124 + 154: + dport_map_port: 125 + 155: + dport_map_port: 126 + 156: + dport_map_port: 127 + 157: + dport_map_port: 128 + 176: + dport_map_port: 129 + 177: + dport_map_port: 130 + 178: + dport_map_port: 131 + 179: + dport_map_port: 132 + 180: + dport_map_port: 133 + 181: + dport_map_port: 134 + 182: + dport_map_port: 135 + 183: + dport_map_port: 136 + 187: + dport_map_port: 137 + 188: + dport_map_port: 138 + 189: + dport_map_port: 139 + 190: + dport_map_port: 140 + 191: + dport_map_port: 141 + 192: + dport_map_port: 142 + 193: + dport_map_port: 143 + 194: + dport_map_port: 144 + 345: + dport_map_port: 145 + 346: + dport_map_port: 146 + 347: + dport_map_port: 147 + 348: + dport_map_port: 148 + 341: + dport_map_port: 149 + 342: + dport_map_port: 150 + 343: + dport_map_port: 151 + 344: + dport_map_port: 152 + 334: + dport_map_port: 153 + 335: + dport_map_port: 154 + 336: + dport_map_port: 155 + 337: + dport_map_port: 156 + 330: + dport_map_port: 157 + 331: + dport_map_port: 158 + 332: + dport_map_port: 159 + 333: + dport_map_port: 160 + 202: + dport_map_port: 161 + 203: + dport_map_port: 162 + 204: + dport_map_port: 163 + 205: + dport_map_port: 164 + 198: + dport_map_port: 165 + 199: + dport_map_port: 166 + 200: + dport_map_port: 167 + 201: + dport_map_port: 168 + 213: + dport_map_port: 169 + 214: + dport_map_port: 170 + 215: + dport_map_port: 171 + 216: + dport_map_port: 172 + 209: + dport_map_port: 173 + 210: + dport_map_port: 174 + 211: + dport_map_port: 175 + 212: + dport_map_port: 176 + 224: + dport_map_port: 177 + 225: + dport_map_port: 178 + 226: + dport_map_port: 179 + 227: + dport_map_port: 180 + 220: + dport_map_port: 181 + 221: + dport_map_port: 182 + 222: + dport_map_port: 183 + 223: + dport_map_port: 184 + 235: + dport_map_port: 185 + 236: + dport_map_port: 186 + 237: + dport_map_port: 187 + 238: + dport_map_port: 188 + 231: + dport_map_port: 189 + 232: + dport_map_port: 190 + 233: + dport_map_port: 191 + 234: + dport_map_port: 192 + 246: + dport_map_port: 193 + 247: + dport_map_port: 194 + 248: + dport_map_port: 195 + 249: + dport_map_port: 196 + 242: + dport_map_port: 197 + 243: + dport_map_port: 198 + 244: + dport_map_port: 199 + 245: + dport_map_port: 200 + 257: + dport_map_port: 201 + 258: + dport_map_port: 202 + 259: + dport_map_port: 203 + 260: + dport_map_port: 204 + 253: + dport_map_port: 205 + 254: + dport_map_port: 206 + 255: + dport_map_port: 207 + 256: + dport_map_port: 208 + 268: + dport_map_port: 209 + 269: + dport_map_port: 210 + 270: + dport_map_port: 211 + 271: + dport_map_port: 212 + 264: + dport_map_port: 213 + 265: + dport_map_port: 214 + 266: + dport_map_port: 215 + 267: + dport_map_port: 216 + 279: + dport_map_port: 217 + 280: + dport_map_port: 218 + 281: + dport_map_port: 219 + 282: + dport_map_port: 220 + 275: + dport_map_port: 221 + 276: + dport_map_port: 222 + 277: + dport_map_port: 223 + 278: + dport_map_port: 224 + 290: + dport_map_port: 225 + 291: + dport_map_port: 226 + 292: + dport_map_port: 227 + 293: + dport_map_port: 228 + 286: + dport_map_port: 229 + 287: + dport_map_port: 230 + 288: + dport_map_port: 231 + 289: + dport_map_port: 232 + 301: + dport_map_port: 233 + 302: + dport_map_port: 234 + 303: + dport_map_port: 235 + 304: + dport_map_port: 236 + 297: + dport_map_port: 237 + 298: + dport_map_port: 238 + 299: + dport_map_port: 239 + 300: + dport_map_port: 240 + 312: + dport_map_port: 241 + 313: + dport_map_port: 242 + 314: + dport_map_port: 243 + 315: + dport_map_port: 244 + 308: + dport_map_port: 245 + 309: + dport_map_port: 246 + 310: + dport_map_port: 247 + 311: + dport_map_port: 248 + 323: + dport_map_port: 249 + 324: + dport_map_port: 250 + 325: + dport_map_port: 251 + 326: + dport_map_port: 252 + 319: + dport_map_port: 253 + 320: + dport_map_port: 254 + 321: + dport_map_port: 255 + 322: + dport_map_port: 256 + 76: + dport_map_port: 257 + 274: + dport_map_port: 258 +... + +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: 26 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 16 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 2 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 16 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 2 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 24 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin new file mode 100644 index 000000000000..04807432077f Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku new file mode 100644 index 000000000000..76806884effd --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku @@ -0,0 +1 @@ +M2-W6940-64OC l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml new file mode 100644 index 000000000000..99d4cec634e4 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml @@ -0,0 +1,1153 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py new file mode 100644 index 000000000000..f95164e03601 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf new file mode 100644 index 000000000000..deb97654ad43 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt,iTCO_wdt" +CONSOLE_PORT=0x5060 +CONSOLE_DEV=0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc new file mode 100644 index 000000000000..5124ab75ab92 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +led load /usr/share/sonic/platform/custom_led.bin + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json new file mode 100644 index 000000000000..d609404c2e73 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json @@ -0,0 +1,4100 @@ +{ + "PORT_MEDIA_SETTINGS": { + "0": { + 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"0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py new file mode 100644 index 000000000000..5fc287892e50 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py @@ -0,0 +1,402 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L = sorted(L, reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml new file mode 100644 index 000000000000..cce5d873a802 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml @@ -0,0 +1,478 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Device 09a6' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Device 09a7' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev + 01)' +- bus: '00' + dev: '06' + fn: '0' + id: 18da + name: 'PCI bridge: Intel Corporation Device 18da (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 18a4 + name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 18a6 + name: 'PCI bridge: Intel Corporation Device 18a6 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 18a8 + name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 18a9 + name: 'PCI bridge: Intel Corporation Device 18a9 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 18aa + name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)' +- bus: '00' + dev: '13' + fn: '0' + id: 18ab + name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 18ad + name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 18ae + name: 'PCI bridge: Intel Corporation Device 18ae (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Device 18d0 (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Device 18df (rev 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev + 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 18ee + name: 'Co-processor: Intel Corporation Device 18ee (rev 11)' +- bus: '06' + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation Device 7011' +- bus: 08 + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '14' + dev: '02' + fn: '0' + id: 347a + name: 'PCI bridge: Intel Corporation Device 347a (rev 06)' +- bus: '14' + dev: '03' + fn: '0' + id: 347b + name: 'PCI bridge: Intel Corporation Device 347b (rev 06)' +- bus: '14' + dev: '04' + fn: '0' + id: 347c + name: 'PCI bridge: Intel Corporation Device 347c (rev 06)' +- bus: '14' + dev: '05' + fn: '0' + id: 347d + name: 'PCI bridge: Intel Corporation Device 347d (rev 06)' +- bus: '15' + dev: '00' + fn: '0' + id: f900 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)' +- bus: f3 + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: f3 + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: f3 + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: f3 + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: f3 + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '04' + fn: '0' + id: 18d1 + name: 'PCI bridge: Intel Corporation Device 18d1' +- bus: f4 + dev: '00' + fn: '0' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '1' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '2' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '3' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '4' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '5' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '4' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '5' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json new file mode 100644 index 000000000000..154b1abe6ffc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json @@ -0,0 +1,1653 @@ +{ + "chassis": { + "name": "M2-W6940-64OC", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": ["green", "blinking_green", "amber", "blinking_amber"] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "CONNECT_CPLD" + }, + { + "name": "MAC_CPLDA" + }, + { + "name": "MAC_CPLDB" + }, + { + "name": "MAC_CPLDC" + }, + { + "name": "FAN_CPLD" + }, + { + "name": "MGMT_CPLD" + }, + { + "name": "MAC_FPGA" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "Psu1", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu2", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + 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"193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x800G": [ + "Eth22" + ], + "2x400G": [ + "Eth22/1", + "Eth22/2" + ], + "4x200G": [ + "Eth22/1", + "Eth22/2", + "Eth22/3", + "Eth22/4" + ] + } + }, + "Ethernet177": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x800G": [ + "Eth23" + ], + "2x400G": [ + "Eth23/1", + "Eth23/2" + ], + "4x200G": [ + "Eth23/1", + "Eth23/2", + "Eth23/3", + "Eth23/4" + ] + } + }, + "Ethernet185": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x800G": [ + "Eth24" + ], + "2x400G": [ + "Eth24/1", + "Eth24/2" + ], + "4x200G": [ + "Eth24/1", + "Eth24/2", + "Eth24/3", + "Eth24/4" + ] + } + }, + "Ethernet193": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x800G": [ + "Eth25" + ], + "2x400G": [ + "Eth25/1", + "Eth25/2" + ], + "4x200G": [ + "Eth25/1", + "Eth25/2", + "Eth25/3", + "Eth25/4" + ] + } + }, + "Ethernet201": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x800G": [ + "Eth26" + ], + "2x400G": [ + "Eth26/1", + "Eth26/2" + ], + "4x200G": [ + "Eth26/1", + "Eth26/2", + "Eth26/3", + "Eth26/4" + ] + } + }, + "Ethernet209": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x800G": [ + "Eth27" + ], + "2x400G": [ + "Eth27/1", + "Eth27/2" + ], + "4x200G": [ + "Eth27/1", + "Eth27/2", + "Eth27/3", + "Eth27/4" + ] + } + }, + "Ethernet217": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x800G": [ + "Eth28" + ], + "2x400G": [ + "Eth28/1", + "Eth28/2" + ], + "4x200G": [ + "Eth28/1", + "Eth28/2", + "Eth28/3", + "Eth28/4" + ] + } + }, + "Ethernet225": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x800G": [ + "Eth29" + ], + "2x400G": [ + "Eth29/1", + "Eth29/2" + ], + "4x200G": [ + "Eth29/1", + "Eth29/2", + "Eth29/3", + "Eth29/4" + ] + } + }, + "Ethernet233": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x800G": [ + "Eth30" + ], + "2x400G": [ + "Eth30/1", + "Eth30/2" + ], + "4x200G": [ + "Eth30/1", + "Eth30/2", + "Eth30/3", + "Eth30/4" + ] + } + }, + "Ethernet241": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x800G": [ + "Eth31" + ], + "2x400G": [ + "Eth31/1", + "Eth31/2" + ], + "4x200G": [ + "Eth31/1", + "Eth31/2", + "Eth31/3", + "Eth31/4" + ] + } + }, + "Ethernet249": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x800G": [ + "Eth32" + ], + "2x400G": [ + "Eth32/1", + "Eth32/2" + ], + "4x200G": [ + "Eth32/1", + "Eth32/2", + "Eth32/3", + "Eth32/4" + ] + } + }, + "Ethernet257": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "257,258,259,260,261,262,263,264", + "breakout_modes": { + "1x800G": [ + "Eth33" + ], + "2x400G": [ + "Eth33/1", + "Eth33/2" + ], + "4x200G": [ + "Eth33/1", + "Eth33/2", + "Eth33/3", + "Eth33/4" + ] + } + }, + "Ethernet265": { + "index": "33,33,33,33,33,33,33,33", + "lanes": "265,266,267,268,269,270,271,272", + "breakout_modes": { + "1x800G": [ + "Eth34" + ], + "2x400G": [ + "Eth34/1", + "Eth34/2" + ], + "4x200G": [ + "Eth34/1", + "Eth34/2", + "Eth34/3", + "Eth34/4" + ] + } + }, + "Ethernet273": { + "index": "34,34,34,34,34,34,34,34", + "lanes": "273,274,275,276,277,278,279,280", + "breakout_modes": { + "1x800G": [ + "Eth35" + ], + "2x400G": [ + "Eth35/1", + "Eth35/2" + ], + "4x200G": [ + "Eth35/1", + "Eth35/2", + "Eth35/3", + "Eth35/4" + ] + } + }, + "Ethernet281": { + "index": "35,35,35,35,35,35,35,35", + "lanes": "281,282,283,284,285,286,287,288", + "breakout_modes": { + "1x800G": [ + "Eth36" + ], + "2x400G": [ + "Eth36/1", + "Eth36/2" + ], + "4x200G": [ + "Eth36/1", + "Eth36/2", + "Eth36/3", + "Eth36/4" + ] + } + }, + "Ethernet289": { + "index": "36,36,36,36,36,36,36,36", + "lanes": "505,506,507,508,509,510,511,512", + "breakout_modes": { + "1x800G": [ + "Eth37" + ], + "2x400G": [ + "Eth37/1", + "Eth37/2" + ], + "4x200G": [ + "Eth37/1", + "Eth37/2", + "Eth37/3", + "Eth37/4" + ] + } + }, + "Ethernet297": { + "index": "37,37,37,37,37,37,37,37", + "lanes": "497,498,499,500,501,502,503,504", + "breakout_modes": { + "1x800G": [ + "Eth38" + ], + "2x400G": [ + "Eth38/1", + "Eth38/2" + ], + "4x200G": [ + "Eth38/1", + "Eth38/2", + "Eth38/3", + "Eth38/4" + ] + } + }, + "Ethernet305": { + "index": "38,38,38,38,38,38,38,38", + "lanes": "489,490,491,492,493,494,495,496", + "breakout_modes": { + "1x800G": [ + "Eth39" + ], + "2x400G": [ + "Eth39/1", + "Eth39/2" + ], + "4x200G": [ + "Eth39/1", + "Eth39/2", + "Eth39/3", + "Eth39/4" + ] + } + }, + "Ethernet313": { + "index": "39,39,39,39,39,39,39,39", + "lanes": "481,482,483,484,485,486,487,488", + "breakout_modes": { + "1x800G": [ + "Eth40" + ], + "2x400G": [ + "Eth40/1", + "Eth40/2" + ], + "4x200G": [ + "Eth40/1", + "Eth40/2", + "Eth40/3", + "Eth40/4" + ] + } + }, + "Ethernet321": { + "index": "40,40,40,40,40,40,40,40", + "lanes": "297,298,299,300,301,302,303,304", + "breakout_modes": { + "1x800G": [ + "Eth41" + ], + "2x400G": [ + "Eth41/1", + "Eth41/2" + ], + "4x200G": [ + "Eth41/1", + "Eth41/2", + "Eth41/3", + "Eth41/4" + ] + } + }, + "Ethernet329": { + "index": "41,41,41,41,41,41,41,41", + "lanes": "289,290,291,292,293,294,295,296", + "breakout_modes": { + "1x800G": [ + "Eth42" + ], + "2x400G": [ + "Eth42/1", + "Eth42/2" + ], + "4x200G": [ + "Eth42/1", + "Eth42/2", + "Eth42/3", + "Eth42/4" + ] + } + }, + "Ethernet337": { + "index": "42,42,42,42,42,42,42,42", + "lanes": "313,314,315,316,317,318,319,320", + "breakout_modes": { + "1x800G": [ + "Eth43" + ], + "2x400G": [ + "Eth43/1", + "Eth43/2" + ], + "4x200G": [ + "Eth43/1", + "Eth43/2", + "Eth43/3", + "Eth43/4" + ] + } + }, + "Ethernet345": { + "index": "43,43,43,43,43,43,43,43", + "lanes": "305,306,307,308,309,310,311,312", + "breakout_modes": { + "1x800G": [ + "Eth44" + ], + "2x400G": [ + "Eth44/1", + "Eth44/2" + ], + "4x200G": [ + "Eth44/1", + "Eth44/2", + "Eth44/3", + "Eth44/4" + ] + } + }, + "Ethernet353": { + "index": "44,44,44,44,44,44,44,44", + "lanes": "329,330,331,332,333,334,335,336", + "breakout_modes": { + "1x800G": [ + "Eth45" + ], + "2x400G": [ + "Eth45/1", + "Eth45/2" + ], + "4x200G": [ + "Eth45/1", + "Eth45/2", + "Eth45/3", + "Eth45/4" + ] + } + }, + "Ethernet361": { + "index": "45,45,45,45,45,45,45,45", + "lanes": "321,322,323,324,325,326,327,328", + "breakout_modes": { + "1x800G": [ + "Eth46" + ], + "2x400G": [ + "Eth46/1", + "Eth46/2" + ], + "4x200G": [ + "Eth46/1", + "Eth46/2", + "Eth46/3", + "Eth46/4" + ] + } + }, + "Ethernet369": { + "index": "46,46,46,46,46,46,46,46", + "lanes": "345,346,347,348,349,350,351,352", + "breakout_modes": { + "1x800G": [ + "Eth47" + ], + "2x400G": [ + "Eth47/1", + "Eth47/2" + ], + "4x200G": [ + "Eth47/1", + "Eth47/2", + "Eth47/3", + "Eth47/4" + ] + } + }, + "Ethernet377": { + "index": "47,47,47,47,47,47,47,47", + "lanes": "337,338,339,340,341,342,343,344", + "breakout_modes": { + "1x800G": [ + "Eth48" + ], + "2x400G": [ + "Eth48/1", + "Eth48/2" + ], + "4x200G": [ + "Eth48/1", + "Eth48/2", + "Eth48/3", + "Eth48/4" + ] + } + }, + "Ethernet385": { + "index": "48,48,48,48,48,48,48,48", + "lanes": "361,362,363,364,365,366,367,368", + "breakout_modes": { + "1x800G": [ + "Eth49" + ], + "2x400G": [ + "Eth49/1", + "Eth49/2" + ], + "4x200G": [ + "Eth49/1", + "Eth49/2", + "Eth49/3", + "Eth49/4" + ] + } + }, + "Ethernet393": { + "index": "49,49,49,49,49,49,49,49", + "lanes": "353,354,355,356,357,358,359,360", + "breakout_modes": { + "1x800G": [ + "Eth50" + ], + "2x400G": [ + "Eth50/1", + "Eth50/2" + ], + "4x200G": [ + "Eth50/1", + "Eth50/2", + "Eth50/3", + "Eth50/4" + ] + } + }, + "Ethernet401": { + "index": "50,50,50,50,50,50,50,50", + "lanes": "377,378,379,380,381,382,383,384", + "breakout_modes": { + "1x800G": [ + "Eth51" + ], + "2x400G": [ + "Eth51/1", + "Eth51/2" + ], + "4x200G": [ + "Eth51/1", + "Eth51/2", + "Eth51/3", + "Eth51/4" + ] + } + }, + "Ethernet409": { + "index": "51,51,51,51,51,51,51,51", + "lanes": "369,370,371,372,373,374,375,376", + "breakout_modes": { + "1x800G": [ + "Eth52" + ], + "2x400G": [ + "Eth52/1", + "Eth52/2" + ], + "4x200G": [ + "Eth52/1", + "Eth52/2", + "Eth52/3", + "Eth52/4" + ] + } + }, + "Ethernet417": { + "index": "52,52,52,52,52,52,52,52", + "lanes": "393,394,395,396,397,398,399,400", + "breakout_modes": { + "1x800G": [ + "Eth53" + ], + "2x400G": [ + "Eth53/1", + "Eth53/2" + ], + "4x200G": [ + "Eth53/1", + "Eth53/2", + "Eth53/3", + "Eth53/4" + ] + } + }, + "Ethernet425": { + "index": "53,53,53,53,53,53,53,53", + "lanes": "385,386,387,388,389,390,391,392", + "breakout_modes": { + "1x800G": [ + "Eth54" + ], + "2x400G": [ + "Eth54/1", + "Eth54/2" + ], + "4x200G": [ + "Eth54/1", + "Eth54/2", + "Eth54/3", + "Eth54/4" + ] + } + }, + "Ethernet433": { + "index": "54,54,54,54,54,54,54,54", + "lanes": "409,410,411,412,413,414,415,416", + "breakout_modes": { + "1x800G": [ + "Eth55" + ], + "2x400G": [ + "Eth55/1", + "Eth55/2" + ], + "4x200G": [ + "Eth55/1", + "Eth55/2", + "Eth55/3", + "Eth55/4" + ] + } + }, + "Ethernet441": { + "index": "55,55,55,55,55,55,55,55", + "lanes": "401,402,403,404,405,406,407,408", + "breakout_modes": { + "1x800G": [ + "Eth56" + ], + "2x400G": [ + "Eth56/1", + "Eth56/2" + ], + "4x200G": [ + "Eth56/1", + "Eth56/2", + "Eth56/3", + "Eth56/4" + ] + } + }, + "Ethernet449": { + "index": "56,56,56,56,56,56,56,56", + "lanes": "425,426,427,428,429,430,431,432", + "breakout_modes": { + "1x800G": [ + "Eth57" + ], + "2x400G": [ + "Eth57/1", + "Eth57/2" + ], + "4x200G": [ + "Eth57/1", + "Eth57/2", + "Eth57/3", + "Eth57/4" + ] + } + }, + "Ethernet457": { + "index": "57,57,57,57,57,57,57,57", + "lanes": "417,418,419,420,421,422,423,424", + "breakout_modes": { + "1x800G": [ + "Eth58" + ], + "2x400G": [ + "Eth58/1", + "Eth58/2" + ], + "4x200G": [ + "Eth58/1", + "Eth58/2", + "Eth58/3", + "Eth58/4" + ] + } + }, + "Ethernet465": { + "index": "58,58,58,58,58,58,58,58", + "lanes": "441,442,443,444,445,446,447,448", + "breakout_modes": { + "1x800G": [ + "Eth59" + ], + "2x400G": [ + "Eth59/1", + "Eth59/2" + ], + "4x200G": [ + "Eth59/1", + "Eth59/2", + "Eth59/3", + "Eth59/4" + ] + } + }, + "Ethernet473": { + "index": "59,59,59,59,59,59,59,59", + "lanes": "433,434,435,436,437,438,439,440", + "breakout_modes": { + "1x800G": [ + "Eth60" + ], + "2x400G": [ + "Eth60/1", + "Eth60/2" + ], + "4x200G": [ + "Eth60/1", + "Eth60/2", + "Eth60/3", + "Eth60/4" + ] + } + }, + "Ethernet481": { + "index": "60,60,60,60,60,60,60,60", + "lanes": "457,458,459,460,461,462,463,464", + "breakout_modes": { + "1x800G": [ + "Eth61" + ], + "2x400G": [ + "Eth61/1", + "Eth61/2" + ], + "4x200G": [ + "Eth61/1", + "Eth61/2", + "Eth61/3", + "Eth61/4" + ] + } + }, + "Ethernet489": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "449,450,451,452,453,454,455,456", + "breakout_modes": { + "1x800G": [ + "Eth62" + ], + "2x400G": [ + "Eth62/1", + "Eth62/2" + ], + "4x200G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4" + ] + } + }, + "Ethernet497": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "473,474,475,476,477,478,479,480", + "breakout_modes": { + "1x800G": [ + "Eth63" + ], + "2x400G": [ + "Eth63/1", + "Eth63/2" + ], + "4x200G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4" + ] + } + }, + "Ethernet505": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "465,466,467,468,469,470,471,472", + "breakout_modes": { + "1x800G": [ + "Eth64" + ], + "2x400G": [ + "Eth64/1", + "Eth64/2" + ], + "4x200G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4" + ] + } + }, + "Ethernet513": { + "index": "64", + "lanes": "513", + "breakout_modes": { + "1x25G": [ + "Eth65" + ] + } + }, + "Ethernet515": { + "index": "65", + "lanes": "515", + "breakout_modes": { + "1x25G": [ + "Eth66" + ] + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json new file mode 100644 index 000000000000..fa01608f8972 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "M2-W6940-64OC": { + "component": { + "CPU_CPLD": { }, + "CONNECT_CPLD": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "MAC_CPLDC": { }, + "MGMT_CPLD": { }, + "FAN_CPLD": { }, + "MAC_FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf new file mode 100644 index 000000000000..fc119184d5c1 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py new file mode 100644 index 000000000000..c26bc0c53f61 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py @@ -0,0 +1,376 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 65 + PORTS_IN_BLOCK = 66 + + EEPROM_OFFSET = 106 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_i2cbus_mapping[64] = 59 + self.port_to_i2cbus_mapping[65] = 60 + self.update_ports_list() + + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_dd_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + elif port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + if eeprom_raw is None: + return False + # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd, + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def update_ports_list(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + else: + self.qsfp_ports_list.append(x) + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + self.update_ports_list() + return True, {} + else: + # Update reg value + self.update_ports_list() + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def _twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except: + return 0 + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self._twos_comp(result, 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py new file mode 100644 index 000000000000..e8cf2e1a7cbc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..94592fa8cebc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc new file mode 100644 index 000000000000..0f7f6bfea0c5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc @@ -0,0 +1,4 @@ +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=xe,ce,cd,d3c \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json new file mode 100755 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index c3763ab0c284..ac5b44f1c721 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -100,6 +100,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \ $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \ $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \ + $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \ $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \ $(MICAS_M2_W6510_32C_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk index 0b08c9a20822..ea55ae8d4998 100644 --- a/platform/broadcom/platform-modules-micas.mk +++ b/platform/broadcom/platform-modules-micas.mk @@ -25,6 +25,14 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE))) +## M2-W6940-64OC +MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION + +MICAS_M2_W6940_64OC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-64oc_$(MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-64oc-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_64OC_PLATFORM_MODULE))) + ## M2-W6920-32QC2X MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION = 1.0 export MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control index b4f166a75aca..76a23f057c13 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/control +++ b/platform/broadcom/sonic-platform-modules-micas/debian/control @@ -16,6 +16,10 @@ Package: platform-modules-micas-m2-w6520-24dc8qc Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp +Package: platform-modules-micas-m2-w6940-64oc +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + Package: platform-modules-micas-m2-w6920-32qc2x Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp @@ -23,4 +27,3 @@ Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-micas-m2-w6510-32c Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp - diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install new file mode 100644 index 000000000000..49a8fe1026f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install @@ -0,0 +1 @@ +m2-w6940-64oc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-64oc-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst new file mode 100644 index 000000000000..a8132f4f65a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk index ed2b043c3b5c..6be3c6f0563d 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk +++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk @@ -3,6 +3,7 @@ currentdir = $(shell pwd) MODULE_DIRS := m2-w6510-48v8c MODULE_DIRS += m2-w6510-48gt4v MODULE_DIRS += m2-w6520-24dc8qc +MODULE_DIRS += m2-w6940-64oc MODULE_DIRS += m2-w6920-32qc2x MODULE_DIRS += m2-w6510-32c diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile new file mode 100755 index 000000000000..3039a7f85903 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile @@ -0,0 +1,28 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py new file mode 100644 index 000000000000..0f2b3bb581e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py @@ -0,0 +1,1644 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "tty_console": 1, + "dev_monitor": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "reboot_cause": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 42, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu2", + "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 6, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 43, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c64", "bus": 53, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "24c64", "bus": 54, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "24c64", "bus": 55, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 51, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 56, "loc": 0x4e, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 58, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 75, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 76, "loc": 0x4f, "attr": "hwmon"}, + ], + }, + { + "name":"ct7318", + "device":[ + {"id":"ct7318_1", "name":"ct7318","bus":77, "loc":0x4c, "attr":"hwmon"}, + {"id":"ct7318_2", "name":"ct7318","bus":78, "loc":0x4c, "attr":"hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "ucd90160", "bus": 68, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_2", "name": "ucd90160", "bus": 69, "loc": 0x5f, "attr": "hwmon"}, + {"id": "ucd90160_3", "name": "ucd90160", "bus": 82, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_4", "name": "ucd90160", "bus": 83, "loc": 0x5b, "attr": "hwmon"}, + ], + }, + { + "name": "ucd9081", + "device": [ + {"id": "wb_ucd9081_1", "name": "wb_ucd9081", "bus": 72, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 90, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 91, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 92, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 93, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 94, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 95, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "xdpe12284", "bus": 96, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "xdpe12284", "bus": 97, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Device Model", + "cmd": "smartctl -i /dev/sda |grep \"Device Model\"", + "pattern": r".*Device Model", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"", + "pattern": r".*User Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "devfile": { + "loc": "/dev/cpld0", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "CONNECT_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "devfile": { + "loc": "/dev/cpld1", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG256C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLDA", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "devfile": { + "loc": "/dev/cpld6", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLDB", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "devfile": { + "loc": "/dev/cpld7", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "MAC_CPLDC", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "devfile": { + "loc": "/dev/cpld8", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "MGMT_CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "devfile": { + "loc": "/dev/cpld9", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld7": { + "key": "CPLD7", + "parent": "cpld", + "arrt_index": 7, + }, + "cpld7_model": { + "key": "Device Model", + "parent": "cpld7", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld7_vender": { + "key": "Vendor", + "parent": "cpld7", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld7_desc": { + "key": "Description", + "parent": "cpld7", + "config": "FAN_CPLD", + "arrt_index": 3, + }, + "cpld7_version": { + "key": "Firmware Version", + "parent": "cpld7", + "devfile": { + "loc": "/dev/cpld10", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "i210" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484I", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "pci": { + "bus": 6, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 0 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "pci": { + "bus": 6, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "others": { + "key": "OTHERS", + }, + "53134": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index": 1, + }, + "53134_model": { + "parent": "53134", + "config": "BCM53134O", + "key": "Device Model", + "arrt_index": 1, + }, + "53134_vendor": { + "parent": "53134", + "config": "Broadcom", + "key": "Vendor", + "arrt_index": 2, + }, + "53134_hw_version": { + "parent": "53134", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params": { + "before": [ + # OE high + {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio323/direction"}, + # SEL1 high + {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio324/direction"}, + #enable 53134 update + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x01}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x06}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio324/value"}, + {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/unexport"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio323/value"}, + {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01}, + ], + }, + }, + "arrt_index": 3, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + "sff33": "Ethernet33", + "sff34": "Ethernet34", + "sff35": "Ethernet35", + "sff36": "Ethernet36", + "sff37": "Ethernet37", + "sff38": "Ethernet38", + "sff39": "Ethernet39", + "sff40": "Ethernet40", + "sff41": "Ethernet41", + "sff42": "Ethernet42", + "sff43": "Ethernet43", + "sff44": "Ethernet44", + "sff45": "Ethernet45", + "sff46": "Ethernet46", + "sff47": "Ethernet47", + "sff48": "Ethernet48", + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52", + "sff53": "Ethernet53", + "sff54": "Ethernet54", + "sff55": "Ethernet55", + "sff56": "Ethernet56", + "sff57": "Ethernet57", + "sff58": "Ethernet58", + "sff59": "Ethernet59", + "sff60": "Ethernet60", + "sff61": "Ethernet61", + "sff62": "Ethernet62", + "sff63": "Ethernet63", + "sff64": "Ethernet64", + "sff65": "Ethernet65", + "sff66": "Ethernet66", + } + }, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/status"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval":1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +REBOOT_CTRL_PARAM = { + "cpu": {"path":"/dev/cpld1", "offset":0x17, "rst_val":0xfd, "rst_delay":0, "gettype":"devfile"}, + "mac": [ + {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0050", "rst_delay":0.1}, + {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x00, "rst_delay":1, "gettype": "devfile"}, + {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x01, "rst_delay":0, "gettype": "devfile"}, + {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0060", "rst_delay":0.1}, + ], + "phy": {"path":"/dev/cpld1", "offset":0x18, "rst_val":0x1e, "rst_delay":0, "gettype":"devfile"}, + "power": [ + {"bus": 42, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 42, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 43, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 43, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"}, + ], + +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x09}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x05}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x06}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "cpu_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x03, 0x04]}, + "record": [ + {"record_type":"file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_powerdown", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x02, 0x07, 0x0a]}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x82, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"path": "/dev/cpld6", "offset": 0x30, "read_len": 1, "gettype": "devfile"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/84-0040/avs0_vout_command", "gettype": "sysfs", "formula": None}, + "mac_avs_param": { + 0x92: 0xBF4, + 0x90: 0xC29, + 0x8e: 0xC56, + 0x8c: 0xC8B, + 0x8a: 0xCBD, + 0x88: 0xCEA, + 0x86: 0xD14, + 0x84: 0xD44, + 0x82: 0xD71 + } + } +] + +DRIVERLISTS = [ + {"name": "i2c_i801", "delay": 1}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d7", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_indirect_dev", "delay": 0}, + {"name": "wb_indirect_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_spi_dev", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "mdio_bitbang", "delay": 0}, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=69 gpio_mdio=70 gpio_chip_name=INTC3001:00", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "tmp401", "delay": 0}, + {"name": "ct7148", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "tps53679", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_ucd9081", "delay": 0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay":0}, + {"name": "wb_xdpe132g5c", "delay": 0}, + {"name": "plat_dfd", "delay": 0}, + {"name": "plat_switch", "delay": 0}, + {"name": "plat_fan", "delay": 0}, + {"name": "plat_psu", "delay": 0}, + {"name": "plat_sff", "delay": 0}, + {"name": "hw_test", "delay": 0}, + + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "syseeprom_device_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "cpld_device_driver", "delay": 0}, + {"name": "sysled_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "transceiver_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "curr_sensor_device_driver", "delay": 0}, + {"name": "fpga_device_driver", "delay": 0}, + {"name": "watchdog_device_driver", "delay": 0}, +] + +DEVICE = [ + {"name": "24c02", "bus": 1, "loc": 0x56}, + {"name": "24c02", "bus": 57, "loc": 0x57}, + {"name": "24c02", "bus": 61, "loc": 0x57}, + {"name": "24c02", "bus": 66, "loc": 0x57}, + # fan + {"name": "24c64", "bus": 52, "loc": 0x50}, + {"name": "24c64", "bus": 53, "loc": 0x50}, + {"name": "24c64", "bus": 54, "loc": 0x50}, + {"name": "24c64", "bus": 55, "loc": 0x50}, + # psu + {"name": "24c02", "bus": 42, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 42, "loc": 0x58}, + {"name": "24c02", "bus": 43, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 43, "loc": 0x58}, + # temp + {"name": "lm75", "bus": 51, "loc": 0x4b}, + {"name": "lm75", "bus": 56, "loc": 0x4e}, + {"name": "lm75", "bus": 58, "loc": 0x4b}, + {"name": "lm75", "bus": 75, "loc": 0x4b}, + {"name": "lm75", "bus": 76, "loc": 0x4f}, + {"name": "ct7318", "bus": 77, "loc": 0x4c}, + {"name": "ct7318", "bus": 78, "loc": 0x4c}, + #dcdc + {"name": "ucd90160", "bus": 68, "loc": 0x5b}, + {"name": "ucd90160", "bus": 69, "loc": 0x5f}, + {"name": "xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "xdpe12284", "bus": 69, "loc": 0x5e}, + {"name": "xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_ucd9081", "bus": 72, "loc": 0x68}, + {"name": "wb_ucd90160", "bus": 82, "loc": 0x5b}, + {"name": "wb_ucd90160", "bus": 83, "loc": 0x5b}, + {"name": "xdpe12284", "bus": 90, "loc": 0x70}, + {"name": "xdpe12284", "bus": 91, "loc": 0x70}, + {"name": "xdpe12284", "bus": 92, "loc": 0x70}, + {"name": "xdpe12284", "bus": 93, "loc": 0x70}, + {"name": "xdpe12284", "bus": 94, "loc": 0x70}, + {"name": "xdpe12284", "bus": 95, "loc": 0x70}, + {"name": "xdpe12284", "bus": 96, "loc": 0x70}, + {"name": "xdpe12284", "bus": 97, "loc": 0x70}, + #avs + {"name": "wb_xdpe132g5c_pmbus", "bus": 84, "loc": 0x40}, + {"name": "wb_xdpe132g5c", "bus": 84, "loc": 0x10}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 85, "loc": 0x4d}, + {"name": "wb_xdpe132g5c", "bus": 85, "loc": 0x1d}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 86, "loc": 0x4d}, + {"name": "wb_xdpe132g5c", "bus": 86, "loc": 0x1d}, +] + +OPTOE = [ + {"name": "optoe2", "startbus": 59, "endbus": 60}, + {"name": "optoe3", "startbus": 106, "endbus": 169}, +] + + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # open X86 BMC Serial port + "dfd_debug sysfs_data_wr /dev/cpld1 0x41 0x01", + # enable stream light + "dfd_debug sysfs_data_wr /dev/cpld6 0xef 0x01", + "dfd_debug sysfs_data_wr /dev/cpld7 0xef 0x01", + "dfd_debug sysfs_data_wr /dev/cpld8 0x80 0xff", + "dfd_debug sysfs_data_wr /dev/cpld8 0x81 0xff", + # KR power_on + "dfd_debug sysfs_data_wr /dev/cpld9 0x80 0x03", + # KR tx-disable enable + "dfd_debug sysfs_data_wr /dev/cpld9 0x58 0x00", + ] + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + { + "name": "BASE_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/base_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x00, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "value": 0x2c, "delay": 0.1}, #bmc_ready + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x19, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1c, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x23, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2c, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2d, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x38, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3e, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3f, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x43, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x44, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x57, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x5a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x65, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x66, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x67, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x75, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x94, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x95, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbc, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe8, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 180, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x03,"delay": 20}, #after bmc_ready delay time + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x00, "delay": 0.1}, + ], + }, + ], + "chain2": [ + { + "name": "MAC_CPLD_A", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cplda_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x76, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x77, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x78, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + }, + { + "name": "MAC_CPLD_B", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpldb_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x02, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdc, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xde, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdf, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain3": [ + { + "name": "MAC_CPLD_C", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpldc_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x04, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x13, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x14, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x15, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x16, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x1a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x59, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x63, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain4": [ + { + "name": "FAN_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/fan_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x08, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x22, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x56, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain5": [ + { + "name": "MGMT_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mgmt_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x10, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x30, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xa8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x01, "delay": 1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain6": [ + { + "name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/cpu_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "echo 497 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo out > /sys/class/gpio/gpio497/direction", "gettype": "cmd"}, + {"cmd": "echo 1 > /sys/class/gpio/gpio497/value", "gettype": "cmd"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x01, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x51, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x54, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x60, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x61, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x85, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x86, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x87, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x88, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x89, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x8a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 180, + "access_check_reg": {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x10, "read_len": 1, "value": 0x36, "okval": 0xff}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x00, "delay": 0.1}, + {"cmd": "echo 0 > /sys/class/gpio/gpio497/value", "gettype": "cmd"}, + {"cmd": "echo 497 > /sys/class/gpio/unexport", "gettype": "cmd"}, + ], + }, + ], + }, + "SPI-LOGIC-DEV": { + "chain1": [ + {"name": "MAC_FPGA", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "setpci -s 00:12.0 0x114.W=0xffff", "gettype": "cmd"}, + {"cmd": "setpci -s 00:12.0 0x50.W=0x0050", "gettype": "cmd"}, # link_disable + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x01, "delay": 1}, + ], + "after_upgrade_delay": 10, + "after_upgrade_delay_timeout": 10, + "refresh_finish_flag_check": {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x63, "value": 0x01, "read_len": 1}, + "access_check_reg": { + "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len": 4, "gettype": "devfile", + "polling_cmd": [ + {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd", "delay": 1}, # retrain_link + {"cmd": "setpci -s 00:12.0 0x52.w", "gettype": "cmd", "okval": 0x12, + "timeout": 10, "mask": 0xff}, # check link status + {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd", "delay": 0.1}, + {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 2}, + ], + "polling_delay": 0.1 + }, + "finish_cmd": [ + {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd"}, # retrain_link + {"cmd": "setpci -s 00:12.0 0x110.W=0xffff", "gettype": "cmd"}, + {"cmd": "setpci -s 00:12.0 0x114.W=0x0000", "gettype": "cmd"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ] + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x40d7, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "BASE_CPLD", + "is_support_warm_upg": 1, + }, + "chain2": { + "name": "MAC_CPLDAB", + "is_support_warm_upg": 1, + }, + "chain3": { + "name": "MAC_CPLDC", + "is_support_warm_upg": 1, + }, + "chain4": { + "name": "FAN_CPLD", + "is_support_warm_upg": 1, + }, + "chain5": { + "name": "MGMT_CPLD", + "is_support_warm_upg": 1, + }, + "chain6": { + "name": "CPU_CPLD", + "is_support_warm_upg": 1, + }, + }, + + "SPI-LOGIC-DEV": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 1, + } + }, + + "SYSFS": { + "chain2": { + "name": "BCM53134", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00, "delay": 0.1}, + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01, "delay": 0.1}, + ], + }, + }, + + "MTD": { + "chain4": { + "name": "BIOS", + "filesizecheck": 20480, # bios check file size, Unit: K + "is_support_warm_upg": 0, + "init_cmd": [ + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"}, + {"cmd": "rmmod intel_spi", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "MAC_FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "MAC_CPLDAB"}, + {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "MAC_CPLDC"}, + {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "FAN_CPLD"}, + {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "MGMT_CPLD"}, + {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"}, + ], + }, + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/53-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/54-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/55-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], +} + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py new file mode 100644 index 000000000000..bb88ae1a5fae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py @@ -0,0 +1,74 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 66, + "port_bus_map": { + 1: 106, + 2: 107, + 3: 108, + 4: 109, + 5: 110, + 6: 111, + 7: 112, + 8: 113, + 9: 114, + 10: 115, + 11: 116, + 12: 117, + 13: 118, + 14: 119, + 15: 120, + 16: 121, + 17: 122, + 18: 123, + 19: 124, + 20: 125, + 21: 126, + 22: 127, + 23: 128, + 24: 129, + 25: 130, + 26: 131, + 27: 132, + 28: 133, + 29: 134, + 30: 135, + 31: 136, + 32: 137, + 33: 138, + 34: 139, + 35: 140, + 36: 141, + 37: 142, + 38: 143, + 39: 144, + 40: 145, + 41: 146, + 42: 147, + 43: 148, + 44: 149, + 45: 150, + 46: 151, + 47: 152, + 48: 153, + 49: 154, + 50: 155, + 51: 156, + 52: 157, + 53: 158, + 54: 159, + 55: 160, + 56: 161, + 57: 162, + 58: 163, + 59: 164, + 60: 165, + 61: 166, + 62: 167, + 63: 168, + 64: 169, + 65: 59, + 66: 60, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py new file mode 100644 index 000000000000..81a53b11f6f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py @@ -0,0 +1,756 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['FAN80-02-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 65 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 23500 + PSU_A_FAN_SPEED_MAX = 39000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 18000 + REAR_FAN_SPEED_MAX = 16000 + FAN_SPEED_MIN = 3200 + + +devices = { + "sensor_print_src": "s3ip", + + "dcdc_data_source": [ + { + "path": "/sys/s3ip/vol_sensor", + "type": "vol", + "Unit": Unit.Voltage, + "read_times": 3, + }, + { + "path": "/sys/s3ip/curr_sensor", + "type": "curr", + "Unit": Unit.Current, + "read_times": 3, + }, + ], + "temp_data_source": [ + { + "path": "/sys/s3ip/temp_sensor", + "type": "temp", + "Unit": Unit.Temperature, + }, + ], + + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/43-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 43, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 43, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + } + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -15000, + "Low": 10000, + "High": 98000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 40000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 70000, + "Max": 80000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"}, + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP8", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max":125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd2, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd3, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd4, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-52/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan1/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-53/53-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan2/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-54/54-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan3/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-55/55-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "CONNECT_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDC", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MGMT_CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 66, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 6: { + "offset": { + 0x73: "17-24", + 0x74: "9-16", + 0x75: "1-8", + }, + }, + 7: { + "offset": { + 0x76: "57-64", + 0x77: "49-56", + 0x78: "41-48", + 0x79: "33-40", + 0x7a: "25-32", + }, + }, + 9: { + "offset": { + 0x69: "65-66", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": list(range(106, 170)) + [59, 60], + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(106, 170)) + [59, 60], + "reset_cpld": { + "dev_id": { + 6: { + "offset": { + 0x70: "17-24", + 0x71: "9-16", + 0x72: "1-8", + }, + }, + 7: { + "offset": { + 0x70: "57-64", + 0x71: "49-56", + 0x72: "41-48", + 0x73: "33-40", + 0x74: "25-32", + }, + }, + }, + }, + "reset_val_is_reset": 0, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py new file mode 100644 index 000000000000..4e95787950f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py @@ -0,0 +1,158 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x80, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x80, + "pwm_max": 0xff, + "a": -0.38, + "b": 33.68, + "c": -476, + "tin_min": 27, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.1, + "Kd": 0.3, + "target": 97, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.3, + "Kd": 0, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 100, "critical": 125}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x80, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x80, + "temp_error_pid_pwm": 0x80, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_all_fan_error_method_flag": 1, + "all_fan_error_switch_temp_critical_temp": 80, + "all_fan_error_recover_log": "Power off base and mac board.", + "all_fan_error_recover_cmd": "dfd_debug io_wr 0x93a 0x01", + "all_fan_error_check_crit_reboot_num": 3, + "all_fan_error_check_crit_sleep_time": 2, + }, + + "ledcontrol_para": { + "interval":5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile new file mode 100644 index 000000000000..8c39927af73d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile @@ -0,0 +1,13 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m += wb_pcie_dev_device.o +obj-m += wb_io_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_wdt_device.o +obj-m += wb_indirect_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 000000000000..60fde91c5102 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,1101 @@ +/* + * An wb_fpga_i2c_bus_device driver for fpga i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_i2c_debug = 0; +static int g_wb_fpga_i2c_error = 0; + +module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_i2c_debug) { \ + printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_i2c_error) { \ + printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = { + .adap_nr = 2, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = { + .adap_nr = 3, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld5", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-2 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = { + .adap_nr = 4, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld3", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = { + .adap_nr = 5, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld4", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = { + .adap_nr = 6, + .i2c_timeout = 3000, + .i2c_scale = 0x1400, + .i2c_filter = 0x1404, + .i2c_stretch = 0x1408, + .i2c_ext_9548_exits_flag = 0x140c, + .i2c_ext_9548_addr = 0x1410, + .i2c_ext_9548_chan = 0x1414, + .i2c_in_9548_chan = 0x1418, + .i2c_slave = 0x141c, + .i2c_reg = 0x1420, + .i2c_reg_len = 0x1430, + .i2c_data_len = 0x1434, + .i2c_ctrl = 0x1438, + .i2c_status = 0x143c, + .i2c_err_vec = 0x1448, + .i2c_data_buf = 0x1480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = { + .adap_nr = 7, + .i2c_timeout = 3000, + .i2c_scale = 0x1500, + .i2c_filter = 0x1504, + .i2c_stretch = 0x1508, + .i2c_ext_9548_exits_flag = 0x150c, + .i2c_ext_9548_addr = 0x1510, + .i2c_ext_9548_chan = 0x1514, + .i2c_in_9548_chan = 0x1518, + .i2c_slave = 0x151c, + .i2c_reg = 0x1520, + .i2c_reg_len = 0x1530, + .i2c_data_len = 0x1534, + .i2c_ctrl = 0x1538, + .i2c_status = 0x153c, + .i2c_err_vec = 0x1548, + .i2c_data_buf = 0x1580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x50, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = { + .adap_nr = 8, + .i2c_timeout = 3000, + .i2c_scale = 0x1800, + .i2c_filter = 0x1804, + .i2c_stretch = 0x1808, + .i2c_ext_9548_exits_flag = 0x180c, + .i2c_ext_9548_addr = 0x1810, + .i2c_ext_9548_chan = 0x1814, + .i2c_in_9548_chan = 0x1818, + .i2c_slave = 0x181c, + .i2c_reg = 0x1820, + .i2c_reg_len = 0x1830, + .i2c_data_len = 0x1834, + .i2c_ctrl = 0x1838, + .i2c_status = 0x183c, + .i2c_err_vec = 0x1848, + .i2c_data_buf = 0x1880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x54, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = { + .adap_nr = 9, + .i2c_timeout = 3000, + .i2c_scale = 0x1900, + .i2c_filter = 0x1904, + .i2c_stretch = 0x1908, + .i2c_ext_9548_exits_flag = 0x190c, + .i2c_ext_9548_addr = 0x1910, + .i2c_ext_9548_chan = 0x1914, + .i2c_in_9548_chan = 0x1918, + .i2c_slave = 0x191c, + .i2c_reg = 0x1920, + .i2c_reg_len = 0x1930, + .i2c_data_len = 0x1934, + .i2c_ctrl = 0x1938, + .i2c_status = 0x193c, + .i2c_err_vec = 0x1948, + .i2c_data_buf = 0x1980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x58, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8 = { + .adap_nr = 10, + .i2c_timeout = 3000, + .i2c_scale = 0x1a00, + .i2c_filter = 0x1a04, + .i2c_stretch = 0x1a08, + .i2c_ext_9548_exits_flag = 0x1a0c, + .i2c_ext_9548_addr = 0x1a10, + .i2c_ext_9548_chan = 0x1a14, + .i2c_in_9548_chan = 0x1a18, + .i2c_slave = 0x1a1c, + .i2c_reg = 0x1a20, + .i2c_reg_len = 0x1a30, + .i2c_data_len = 0x1a34, + .i2c_ctrl = 0x1a38, + .i2c_status = 0x1a3c, + .i2c_err_vec = 0x1a48, + .i2c_data_buf = 0x1a80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = { + .adap_nr = 11, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2080, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = { + .adap_nr = 12, + .i2c_timeout = 3000, + .i2c_scale = 0x2100, + .i2c_filter = 0x2104, + .i2c_stretch = 0x2108, + .i2c_ext_9548_exits_flag = 0x210c, + .i2c_ext_9548_addr = 0x2110, + .i2c_ext_9548_chan = 0x2114, + .i2c_in_9548_chan = 0x2118, + .i2c_slave = 0x211c, + .i2c_reg = 0x2120, + .i2c_reg_len = 0x2130, + .i2c_data_len = 0x2134, + .i2c_ctrl = 0x2138, + .i2c_status = 0x213c, + .i2c_err_vec = 0x2148, + .i2c_data_buf = 0x2180, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x0000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = { + .adap_nr = 13, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_err_vec = 0x2248, + .i2c_data_buf = 0x2280, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = { + .adap_nr = 14, + .i2c_timeout = 3000, + .i2c_scale = 0x2300, + .i2c_filter = 0x2304, + .i2c_stretch = 0x2308, + .i2c_ext_9548_exits_flag = 0x230c, + .i2c_ext_9548_addr = 0x2310, + .i2c_ext_9548_chan = 0x2314, + .i2c_in_9548_chan = 0x2318, + .i2c_slave = 0x231c, + .i2c_reg = 0x2320, + .i2c_reg_len = 0x2330, + .i2c_data_len = 0x2334, + .i2c_ctrl = 0x2338, + .i2c_status = 0x233c, + .i2c_err_vec = 0x2348, + .i2c_data_buf = 0x2380, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = { + .adap_nr = 15, + .i2c_timeout = 3000, + .i2c_scale = 0x2400, + .i2c_filter = 0x2404, + .i2c_stretch = 0x2408, + .i2c_ext_9548_exits_flag = 0x240c, + .i2c_ext_9548_addr = 0x2410, + .i2c_ext_9548_chan = 0x2414, + .i2c_in_9548_chan = 0x2418, + .i2c_slave = 0x241c, + .i2c_reg = 0x2420, + .i2c_reg_len = 0x2430, + .i2c_data_len = 0x2434, + .i2c_ctrl = 0x2438, + .i2c_status = 0x243c, + .i2c_err_vec = 0x2448, + .i2c_data_buf = 0x2480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = { + .adap_nr = 16, + .i2c_timeout = 3000, + .i2c_scale = 0x2500, + .i2c_filter = 0x2504, + .i2c_stretch = 0x2508, + .i2c_ext_9548_exits_flag = 0x250c, + .i2c_ext_9548_addr = 0x2510, + .i2c_ext_9548_chan = 0x2514, + .i2c_in_9548_chan = 0x2518, + .i2c_slave = 0x251c, + .i2c_reg = 0x2520, + .i2c_reg_len = 0x2530, + .i2c_data_len = 0x2534, + .i2c_ctrl = 0x2538, + .i2c_status = 0x253c, + .i2c_err_vec = 0x2548, + .i2c_data_buf = 0x2580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = { + .adap_nr = 17, + .i2c_timeout = 3000, + .i2c_scale = 0x2600, + .i2c_filter = 0x2604, + .i2c_stretch = 0x2608, + .i2c_ext_9548_exits_flag = 0x260c, + .i2c_ext_9548_addr = 0x2610, + .i2c_ext_9548_chan = 0x2614, + .i2c_in_9548_chan = 0x2618, + .i2c_slave = 0x261c, + .i2c_reg = 0x2620, + .i2c_reg_len = 0x2630, + .i2c_data_len = 0x2634, + .i2c_ctrl = 0x2638, + .i2c_status = 0x263c, + .i2c_err_vec = 0x2648, + .i2c_data_buf = 0x2680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000080, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = { + .adap_nr = 18, + .i2c_timeout = 3000, + .i2c_scale = 0x2700, + .i2c_filter = 0x2704, + .i2c_stretch = 0x2708, + .i2c_ext_9548_exits_flag = 0x270c, + .i2c_ext_9548_addr = 0x2710, + .i2c_ext_9548_chan = 0x2714, + .i2c_in_9548_chan = 0x2718, + .i2c_slave = 0x271c, + .i2c_reg = 0x2720, + .i2c_reg_len = 0x2730, + .i2c_data_len = 0x2734, + .i2c_ctrl = 0x2738, + .i2c_status = 0x273c, + .i2c_err_vec = 0x2748, + .i2c_data_buf = 0x2780, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000100, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data8 = { + .adap_nr = 19, + .i2c_timeout = 3000, + .i2c_scale = 0x2800, + .i2c_filter = 0x2804, + .i2c_stretch = 0x2808, + .i2c_ext_9548_exits_flag = 0x280c, + .i2c_ext_9548_addr = 0x2810, + .i2c_ext_9548_chan = 0x2814, + .i2c_in_9548_chan = 0x2818, + .i2c_slave = 0x281c, + .i2c_reg = 0x2820, + .i2c_reg_len = 0x2830, + .i2c_data_len = 0x2834, + .i2c_ctrl = 0x2838, + .i2c_status = 0x283c, + .i2c_err_vec = 0x2848, + .i2c_data_buf = 0x2880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000200, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data9 = { + .adap_nr = 20, + .i2c_timeout = 3000, + .i2c_scale = 0x2900, + .i2c_filter = 0x2904, + .i2c_stretch = 0x2908, + .i2c_ext_9548_exits_flag = 0x290c, + .i2c_ext_9548_addr = 0x2910, + .i2c_ext_9548_chan = 0x2914, + .i2c_in_9548_chan = 0x2918, + .i2c_slave = 0x291c, + .i2c_reg = 0x2920, + .i2c_reg_len = 0x2930, + .i2c_data_len = 0x2934, + .i2c_ctrl = 0x2938, + .i2c_status = 0x293c, + .i2c_err_vec = 0x2948, + .i2c_data_buf = 0x2980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000400, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data10 = { + .adap_nr = 21, + .i2c_timeout = 3000, + .i2c_scale = 0x2a00, + .i2c_filter = 0x2a04, + .i2c_stretch = 0x2a08, + .i2c_ext_9548_exits_flag = 0x2a0c, + .i2c_ext_9548_addr = 0x2a10, + .i2c_ext_9548_chan = 0x2a14, + .i2c_in_9548_chan = 0x2a18, + .i2c_slave = 0x2a1c, + .i2c_reg = 0x2a20, + .i2c_reg_len = 0x2a30, + .i2c_data_len = 0x2a34, + .i2c_ctrl = 0x2a38, + .i2c_status = 0x2a3c, + .i2c_err_vec = 0x2a48, + .i2c_data_buf = 0x2a80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000800, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data11 = { + .adap_nr = 22, + .i2c_timeout = 3000, + .i2c_scale = 0x2b00, + .i2c_filter = 0x2b04, + .i2c_stretch = 0x2b08, + .i2c_ext_9548_exits_flag = 0x2b0c, + .i2c_ext_9548_addr = 0x2b10, + .i2c_ext_9548_chan = 0x2b14, + .i2c_in_9548_chan = 0x2b18, + .i2c_slave = 0x2b1c, + .i2c_reg = 0x2b20, + .i2c_reg_len = 0x2b30, + .i2c_data_len = 0x2b34, + .i2c_ctrl = 0x2b38, + .i2c_status = 0x2b3c, + .i2c_err_vec = 0x2b48, + .i2c_data_buf = 0x2b80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00001000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data12 = { + .adap_nr = 23, + .i2c_timeout = 3000, + .i2c_scale = 0x2c00, + .i2c_filter = 0x2c04, + .i2c_stretch = 0x2c08, + .i2c_ext_9548_exits_flag = 0x2c0c, + .i2c_ext_9548_addr = 0x2c10, + .i2c_ext_9548_chan = 0x2c14, + .i2c_in_9548_chan = 0x2c18, + .i2c_slave = 0x2c1c, + .i2c_reg = 0x2c20, + .i2c_reg_len = 0x2c30, + .i2c_data_len = 0x2c34, + .i2c_ctrl = 0x2c38, + .i2c_status = 0x2c3c, + .i2c_err_vec = 0x2c48, + .i2c_data_buf = 0x2c80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00002000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data13 = { + .adap_nr = 24, + .i2c_timeout = 3000, + .i2c_scale = 0x2d00, + .i2c_filter = 0x2d04, + .i2c_stretch = 0x2d08, + .i2c_ext_9548_exits_flag = 0x2d0c, + .i2c_ext_9548_addr = 0x2d10, + .i2c_ext_9548_chan = 0x2d14, + .i2c_in_9548_chan = 0x2d18, + .i2c_slave = 0x2d1c, + .i2c_reg = 0x2d20, + .i2c_reg_len = 0x2d30, + .i2c_data_len = 0x2d34, + .i2c_ctrl = 0x2d38, + .i2c_status = 0x2d3c, + .i2c_err_vec = 0x2d48, + .i2c_data_buf = 0x2d80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00004000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data14 = { + .adap_nr = 25, + .i2c_timeout = 3000, + .i2c_scale = 0x2e00, + .i2c_filter = 0x2e04, + .i2c_stretch = 0x2e08, + .i2c_ext_9548_exits_flag = 0x2e0c, + .i2c_ext_9548_addr = 0x2e10, + .i2c_ext_9548_chan = 0x2e14, + .i2c_in_9548_chan = 0x2e18, + .i2c_slave = 0x2e1c, + .i2c_reg = 0x2e20, + .i2c_reg_len = 0x2e30, + .i2c_data_len = 0x2e34, + .i2c_ctrl = 0x2e38, + .i2c_status = 0x2e3c, + .i2c_err_vec = 0x2e48, + .i2c_data_buf = 0x2e80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00008000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data15 = { + .adap_nr = 26, + .i2c_timeout = 3000, + .i2c_scale = 0x2f00, + .i2c_filter = 0x2f04, + .i2c_stretch = 0x2f08, + .i2c_ext_9548_exits_flag = 0x2f0c, + .i2c_ext_9548_addr = 0x2f10, + .i2c_ext_9548_chan = 0x2f14, + .i2c_in_9548_chan = 0x2f18, + .i2c_slave = 0x2f1c, + .i2c_reg = 0x2f20, + .i2c_reg_len = 0x2f30, + .i2c_data_len = 0x2f34, + .i2c_ctrl = 0x2f38, + .i2c_status = 0x2f3c, + .i2c_err_vec = 0x2f48, + .i2c_data_buf = 0x2f80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00010000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 9, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 24, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 25, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 000000000000..043ec82366ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,489 @@ +/* + * An wb_fpga_pca954x_device driver for fpga pca954x device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_pca954x_device_debug = 0; +static int g_wb_fpga_pca954x_device_error = 0; + +module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_error) { \ + printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 2, + .i2c_addr = 0x70, + .pca9548_base_nr = 27, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 27, + .i2c_addr = 0x76, + .pca9548_base_nr = 42, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 3, + .i2c_addr = 0x70, + .pca9548_base_nr = 28, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 28, + .i2c_addr = 0x77, + .pca9548_base_nr = 50, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-2 */ +static fpga_pca954x_device_t fpga_pca954x_device_data4 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .pca9548_base_nr = 29, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data5 = { + .i2c_bus =29, + .i2c_addr = 0x77, + .pca9548_base_nr = 58, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 5, + .i2c_addr = 0x71, + .pca9548_base_nr = 30, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 30, + .i2c_addr = 0x77, + .pca9548_base_nr = 66, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* fpga-i2c-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 6, + .i2c_addr = 0x70, + .pca9548_base_nr = 31, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 31, + .i2c_addr = 0x76, + .pca9548_base_nr = 74, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 7, + .i2c_addr = 0x70, + .pca9548_base_nr = 32, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 32, + .i2c_addr = 0x76, + .pca9548_base_nr = 82, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 8, + .i2c_addr = 0x71, + .pca9548_base_nr = 33, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 33, + .i2c_addr = 0x76, + .pca9548_base_nr = 90, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .pca9548_base_nr = 98, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 10, + .i2c_addr = 0x70, + .pca9548_base_nr = 102, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 11, + .i2c_addr = 0x70, + .pca9548_base_nr = 106, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .pca9548_base_nr = 110, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 13, + .i2c_addr = 0x70, + .pca9548_base_nr = 114, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 14, + .i2c_addr = 0x70, + .pca9548_base_nr = 118, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .pca9548_base_nr = 122, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .pca9548_base_nr = 126, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .pca9548_base_nr = 130, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 18, + .i2c_addr = 0x70, + .pca9548_base_nr = 134, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .pca9548_base_nr = 138, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 20, + .i2c_addr = 0x70, + .pca9548_base_nr = 142, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 21, + .i2c_addr = 0x70, + .pca9548_base_nr = 146, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data27 = { + .i2c_bus = 22, + .i2c_addr = 0x70, + .pca9548_base_nr = 150, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data28 = { + .i2c_bus = 23, + .i2c_addr = 0x70, + .pca9548_base_nr = 154, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data29 = { + .i2c_bus = 24, + .i2c_addr = 0x70, + .pca9548_base_nr = 158, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data30 = { + .i2c_bus = 25, + .i2c_addr = 0x70, + .pca9548_base_nr = 162, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data31 = { + .i2c_bus = 26, + .i2c_addr = 0x70, + .pca9548_base_nr = 166, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data0, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data1, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data2, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data3, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data4, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data5, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data6, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data7, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data8, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data9, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data10, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data11, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data12, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data13, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data14, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data15, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data16, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data17, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data18, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data19, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data20, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data21, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data22, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data23, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data24, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data25, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data26, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data27, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data28, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data29, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data30, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data31, + }, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (!client) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 000000000000..92bced35580d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,181 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* mac cplda */ +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 98, + .i2c_addr = 0x1d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mac cpldb */ +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 99, + .i2c_addr = 0x2d, + .i2c_name = "cpld7", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mac cpldc */ +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 100, + .i2c_addr = 0x3d, + .i2c_name = "cpld8", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mgmt cpld */ +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 5, + .i2c_addr = 0x1a, + .i2c_name = "cpld9", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* fan cpld */ +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 50, + .i2c_addr = 0x0d, + .i2c_name = "cpld10", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 000000000000..1bc2aafed2a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,122 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 34, + .pca9548_reset_type = PCA9548_RESET_IO, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .io_attr.io_addr = 0x91e, + .io_attr.mask = 0x01, + .io_attr.reset_on = 0, + .io_attr.reset_off = 0x01, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c new file mode 100644 index 000000000000..82b692e414cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c @@ -0,0 +1,193 @@ +/* + * An wb_indirect_dev_device driver for indirect load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_indirect_dev_device_debug = 0; +static int g_indirect_dev_device_error = 0; + +module_param(g_indirect_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_indirect_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define INDIRECT_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_indirect_dev_device_debug) { \ + printk(KERN_INFO "[INDIRECT_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define INDIRECT_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_indirect_dev_device_error) { \ + printk(KERN_ERR "[INDIRECT_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-0 */ +static indirect_dev_device_t indirect_dev_device_data0 = { + .logic_func_mode = 4, + .dev_name = "cpld2", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x70, + .wr_data_width = 4, + .addr_low = 0x74, + .addr_high = 0x75, + .rd_data = 0x76, + .rd_data_width = 4, + .opt_ctl = 0x7a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-1 */ +static indirect_dev_device_t indirect_dev_device_data1 = { + .logic_func_mode = 4, + .dev_name = "cpld3", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x80, + .wr_data_width = 4, + .addr_low = 0x84, + .addr_high = 0x85, + .rd_data = 0x86, + .rd_data_width = 4, + .opt_ctl = 0x8a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-2 */ +static indirect_dev_device_t indirect_dev_device_data2 = { + .logic_func_mode = 4, + .dev_name = "cpld4", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x90, + .wr_data_width = 4, + .addr_low = 0x94, + .addr_high = 0x95, + .rd_data = 0x96, + .rd_data_width = 4, + .opt_ctl = 0x9a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-3 */ +static indirect_dev_device_t indirect_dev_device_data3 = { + .logic_func_mode = 4, + .dev_name = "cpld5", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0xa0, + .wr_data_width = 4, + .addr_low = 0xa4, + .addr_high = 0xa5, + .rd_data = 0xa6, + .rd_data_width = 4, + .opt_ctl = 0xaa, + .indirect_len = 0x230, +}; + +static void indirect_dev_device_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device indirect_dev_device[] = { + { + .name = "wb-indirect-dev", + .id = 1, + .dev = { + .platform_data = &indirect_dev_device_data0, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 2, + .dev = { + .platform_data = &indirect_dev_device_data1, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 3, + .dev = { + .platform_data = &indirect_dev_device_data2, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 4, + .dev = { + .platform_data = &indirect_dev_device_data3, + .release = indirect_dev_device_bus_device_release, + }, + }, +}; + +static int __init indirect_dev_device_bus_device_init(void) +{ + int i; + int ret = 0; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(indirect_dev_device); i++) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + ret = platform_device_register(&indirect_dev_device[i]); + if (ret < 0) { + indirect_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-indirect-dev.%d register failed!\n", i + 1); + } else { + indirect_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit indirect_dev_device_bus_device_exit(void) +{ + int i; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(indirect_dev_device) - 1; i >= 0; i--) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + if (indirect_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&indirect_dev_device[i]); + } + } +} + +module_init(indirect_dev_device_bus_device_init); +module_exit(indirect_dev_device_bus_device_exit); +MODULE_DESCRIPTION("INDIRECT DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c new file mode 100644 index 000000000000..91767b2fdff0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c @@ -0,0 +1,123 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0xa00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 000000000000..c76daa348e0a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,116 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x12, + .bridge_fn = 0, + .upg_ctrl_base = 0xa00, + .upg_flash_base = 0x2f0000, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c new file mode 100644 index 000000000000..e40ed10639f9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c @@ -0,0 +1,155 @@ +/* + * An wb_wdt_device driver for watchdog device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#include + +static int g_wb_wdt_device_debug = 0; +static int g_wb_wdt_device_error = 0; + +module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_wdt_device_debug) { \ + printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_wdt_device_error) { \ + printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .feed_wdt_type = 1, + .hw_margin = 408000, + .feed_time = 9000, + .config_dev_name = "/dev/cpld1", + .config_mode = 1, + .priv_func_mode = 3, + .enable_reg = 0xb0, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xb1, + .timeleft_cfg_reg = 0xb2, + .hw_algo = "toggle", + .wdt_config_mode.gpio_wdt = { + .gpio = 346, + .flags = 1 + }, + .timer_accuracy = 1600, /* 1.6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +/* sys led */ +static wb_wdt_device_t wb_wdt_device_data_1 = { + .feed_wdt_type = 2, + .hw_margin = 180000, + .feed_time = 30000, + .config_dev_name = "/dev/cpld1", + .config_mode = 2, + .priv_func_mode = 3, + .enable_reg = 0xba, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xbc, + .timeleft_cfg_reg = 0xbd, + .hw_algo = "toggle", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld1", + .feed_reg = 0xbb, + .active_val = 0x01, + .logic_func_mode = 4, + }, + .timer_accuracy = 6000, /* 6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, + { + .name = "wb_wdt", + .id = 1, + .dev = { + .platform_data = &wb_wdt_device_data_1, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 000000000000..f08fd5866a8a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,321 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Set item: System E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev look rg_main_dev_type_t definition, main board is 0, minor_dev is 0 +other_i2c_dev.bus_0_0=1 +other_i2c_dev.addr_0_0=0x56 + +# Configuration item: System E2 path +eeprom_path_0_0=/sys/bus/i2c/devices/1-0056/eeprom + +# Configuration item: System E2 size +eeprom_size_0_0=256 + +# Configuration item: watchdog number +# Description: Format watchdog_id_[index] +watchdog_id_0=0 + +# Configuration item: watchdog device name +# Description: Format watchdog_name_[index]_[type] +watchdog_name_0_0=identity +watchdog_name_0_1=state +watchdog_name_0_2=timeleft + +# Configuration item: i2c bus address of the cpld +# Description: Format cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_slot: 1: cable card 1, 2: cable card 2, 3: cable card 3, 4: cable card 4,5: fan adapter board +# cpld_id: 0:CPLD_A 1:CPLD_B +# .bus is configuration item corresponds to the bus number(/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: This field is optional. This field is not required for a cpld that does not have I2C access +cpld_i2c_dev.bus_0_2=98 +cpld_i2c_dev.addr_0_2=0x1d +cpld_i2c_dev.bus_0_3=99 +cpld_i2c_dev.addr_0_3=0x2d +cpld_i2c_dev.bus_0_4=100 +cpld_i2c_dev.addr_0_4=0x3d +cpld_i2c_dev.bus_0_5=5 +cpld_i2c_dev.addr_0_5=0x1a +cpld_i2c_dev.bus_0_6=50 +cpld_i2c_dev.addr_0_6=0x0d + +# Configuration item: cpld lpc address +# Description: Format cpld_lpc_addr_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_id: 0:X86_CPLD, 1:MAC_CPLDA, 2:MAC_CPLDB +# Note: This field is optional. This field is not required for CPLDS that are not accessed by LPCS +cpld_lpc_dev_0_0=0xa00 +cpld_lpc_dev_0_1=0x900 + +# Configuration item: Access mode of each cpld(LPC/I2C) +# Description: Format mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c, cpld_id is cpld number,Start at 0 +# Note: This field is required +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c +mode_cpld_0_6=i2c + +# Configuration item: the number of CPLD +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: indicates that the mainboard is 0, the subPLD is 5, and the minor_dev: CPLD is 8 +dev_num_0_8=7 + +# Configuration item: Name of each cpld +# Description: Format cpld_name_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_name_0_0=CPU_CPLD +cpld_name_0_1=BASE_CPLD +cpld_name_0_2=MAC_CPLDA +cpld_name_0_3=MAC_CPLDB +cpld_name_0_4=MAC_CPLDC +cpld_name_0_5=MGMT_CPLD +cpld_name_0_6=FAN_CPLD + + +# Configuration item: Model of each cpld +# Description: Format cpld_type_[cpld_id] cpld_idis cpld number,start with 1 +# Note: This field is required +cpld_type_0_0=LATTICE/LCMXO3LF-2100C-5BG256C +cpld_type_0_1=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_2=LATTICE/LCMXO3LF-4300C-6BG256C +cpld_type_0_3=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_4=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_5=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_6=LATTICE/LCMXO3LF-2100C-5BG256C + + +# Configuration item: Version register of each CPLD +# Description: Format cpld_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_version.mode_0_0=config +cpld_version.int_cons_0_0= +cpld_version.src_0_0=cpld +cpld_version.frmt_0_0=num_bytes +cpld_version.pola_0_0= +cpld_version.fpath_0_0= +cpld_version.addr_0_0=0x00000000 +cpld_version.len_0_0=4 +cpld_version.bit_offset_0_0= + +cpld_version.mode_0_1=config +cpld_version.int_cons_0_1= +cpld_version.src_0_1=cpld +cpld_version.frmt_0_1=num_bytes +cpld_version.pola_0_1= +cpld_version.fpath_0_1= +cpld_version.addr_0_1=0x00010000 +cpld_version.len_0_1=4 +cpld_version.bit_offset_0_1= + +cpld_version.mode_0_2=config +cpld_version.int_cons_0_2= +cpld_version.src_0_2=cpld +cpld_version.frmt_0_2=num_bytes +cpld_version.pola_0_2= +cpld_version.fpath_0_2= +cpld_version.addr_0_2=0x00020000 +cpld_version.len_0_2=4 +cpld_version.bit_offset_0_2= + +cpld_version.mode_0_3=config +cpld_version.int_cons_0_3= +cpld_version.src_0_3=cpld +cpld_version.frmt_0_3=num_bytes +cpld_version.pola_0_3= +cpld_version.fpath_0_3= +cpld_version.addr_0_3=0x00030000 +cpld_version.len_0_3=4 +cpld_version.bit_offset_0_3= + +cpld_version.mode_0_4=config +cpld_version.int_cons_0_4= +cpld_version.src_0_4=cpld +cpld_version.frmt_0_4=num_bytes +cpld_version.pola_0_4= +cpld_version.fpath_0_4= +cpld_version.addr_0_4=0x00040000 +cpld_version.len_0_4=4 +cpld_version.bit_offset_0_4= + +cpld_version.mode_0_5=config +cpld_version.int_cons_0_5= +cpld_version.src_0_5=cpld +cpld_version.frmt_0_5=num_bytes +cpld_version.pola_0_5= +cpld_version.fpath_0_5= +cpld_version.addr_0_5=0x00050000 +cpld_version.len_0_5=4 +cpld_version.bit_offset_0_5= + +cpld_version.mode_0_6=config +cpld_version.int_cons_0_6= +cpld_version.src_0_6=cpld +cpld_version.frmt_0_6=num_bytes +cpld_version.pola_0_6= +cpld_version.fpath_0_6= +cpld_version.addr_0_6=0x00060000 +cpld_version.len_0_6=4 +cpld_version.bit_offset_0_6= + +# Configuration item: Test register for each CPLD +# Description: Format cpld_test_reg_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_test_reg.mode_0_0=config +cpld_test_reg.int_cons_0_0= +cpld_test_reg.src_0_0=cpld +cpld_test_reg.frmt_0_0=byte +cpld_test_reg.pola_0_0= +cpld_test_reg.fpath_0_0= +cpld_test_reg.addr_0_0=0x00000005 +cpld_test_reg.len_0_0=1 +cpld_test_reg.bit_offset_0_0= + +cpld_test_reg.mode_0_1=config +cpld_test_reg.int_cons_0_1= +cpld_test_reg.src_0_1=cpld +cpld_test_reg.frmt_0_1=byte +cpld_test_reg.pola_0_1= +cpld_test_reg.fpath_0_1= +cpld_test_reg.addr_0_1=0x00010055 +cpld_test_reg.len_0_1=1 +cpld_test_reg.bit_offset_0_1= + +cpld_test_reg.mode_0_2=config +cpld_test_reg.int_cons_0_2= +cpld_test_reg.src_0_2=cpld +cpld_test_reg.frmt_0_2=byte +cpld_test_reg.pola_0_2= +cpld_test_reg.fpath_0_2= +cpld_test_reg.addr_0_2=0x00020055 +cpld_test_reg.len_0_2=1 +cpld_test_reg.bit_offset_0_2= + +cpld_test_reg.mode_0_3=config +cpld_test_reg.int_cons_0_3= +cpld_test_reg.src_0_3=cpld +cpld_test_reg.frmt_0_3=byte +cpld_test_reg.pola_0_3= +cpld_test_reg.fpath_0_3= +cpld_test_reg.addr_0_3=0x00030055 +cpld_test_reg.len_0_3=1 +cpld_test_reg.bit_offset_0_3= + +cpld_test_reg.mode_0_4=config +cpld_test_reg.int_cons_0_4= +cpld_test_reg.src_0_4=cpld +cpld_test_reg.frmt_0_4=byte +cpld_test_reg.pola_0_4= +cpld_test_reg.fpath_0_4= +cpld_test_reg.addr_0_4=0x00040055 +cpld_test_reg.len_0_4=1 +cpld_test_reg.bit_offset_0_4= + +cpld_test_reg.mode_0_5=config +cpld_test_reg.int_cons_0_5= +cpld_test_reg.src_0_5=cpld +cpld_test_reg.frmt_0_5=byte +cpld_test_reg.pola_0_5= +cpld_test_reg.fpath_0_5= +cpld_test_reg.addr_0_5=0x00050055 +cpld_test_reg.len_0_5=1 +cpld_test_reg.bit_offset_0_5= + +cpld_test_reg.mode_0_6=config +cpld_test_reg.int_cons_0_6= +cpld_test_reg.src_0_6=cpld +cpld_test_reg.frmt_0_6=byte +cpld_test_reg.pola_0_6= +cpld_test_reg.fpath_0_6= +cpld_test_reg.addr_0_6=0x00060055 +cpld_test_reg.len_0_6=1 +cpld_test_reg.bit_offset_0_6= + +# Configuration item: Hardware version register of each CPLD +# Description: Format cpld_hw_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: Optional +cpld_hw_version.mode_0_0=config +cpld_hw_version.int_cons_0_0= +cpld_hw_version.src_0_0=cpld +cpld_hw_version.frmt_0_0=byte +cpld_hw_version.pola_0_0= +cpld_hw_version.fpath_0_0= +cpld_hw_version.addr_0_0=0x00000009 +cpld_hw_version.len_0_0=1 +cpld_hw_version.bit_offset_0_0= + +cpld_hw_version.mode_0_1=config +cpld_hw_version.int_cons_0_1= +cpld_hw_version.src_0_1=cpld +cpld_hw_version.frmt_0_1=byte +cpld_hw_version.pola_0_1= +cpld_hw_version.fpath_0_1= +cpld_hw_version.addr_0_1=0x00010009 +cpld_hw_version.len_0_1=1 +cpld_hw_version.bit_offset_0_1= + +cpld_hw_version.mode_0_2=config +cpld_hw_version.int_cons_0_2= +cpld_hw_version.src_0_2=cpld +cpld_hw_version.frmt_0_2=byte +cpld_hw_version.pola_0_2= +cpld_hw_version.fpath_0_2= +cpld_hw_version.addr_0_2=0x00020009 +cpld_hw_version.len_0_2=1 +cpld_hw_version.bit_offset_0_2= + +cpld_hw_version.mode_0_3=config +cpld_hw_version.int_cons_0_3= +cpld_hw_version.src_0_3=cpld +cpld_hw_version.frmt_0_3=byte +cpld_hw_version.pola_0_3= +cpld_hw_version.fpath_0_3= +cpld_hw_version.addr_0_3=0x00030009 +cpld_hw_version.len_0_3=1 +cpld_hw_version.bit_offset_0_3= + +cpld_hw_version.mode_0_4=config +cpld_hw_version.int_cons_0_4= +cpld_hw_version.src_0_4=cpld +cpld_hw_version.frmt_0_4=byte +cpld_hw_version.pola_0_4= +cpld_hw_version.fpath_0_4= +cpld_hw_version.addr_0_4=0x00040009 +cpld_hw_version.len_0_4=1 +cpld_hw_version.bit_offset_0_4= + +cpld_hw_version.mode_0_5=config +cpld_hw_version.int_cons_0_5= +cpld_hw_version.src_0_5=cpld +cpld_hw_version.frmt_0_5=byte +cpld_hw_version.pola_0_5= +cpld_hw_version.fpath_0_5= +cpld_hw_version.addr_0_5=0x00050009 +cpld_hw_version.len_0_5=1 +cpld_hw_version.bit_offset_0_5= + +cpld_hw_version.mode_0_6=config +cpld_hw_version.int_cons_0_6= +cpld_hw_version.src_0_6=cpld +cpld_hw_version.frmt_0_6=byte +cpld_hw_version.pola_0_6= +cpld_hw_version.fpath_0_6= +cpld_hw_version.addr_0_6=0x00060009 +cpld_hw_version.len_0_6=1 +cpld_hw_version.bit_offset_0_6= + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 000000000000..86fb3b13a106 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,358 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev is defined in rg_main_dev_type_t. mainboard is 0, fan is 1, dev_index is device index +other_i2c_dev.bus_1_1=52 +other_i2c_dev.addr_1_1=0x50 +other_i2c_dev.bus_1_2=53 +other_i2c_dev.addr_1_2=0x50 +other_i2c_dev.bus_1_3=54 +other_i2c_dev.addr_1_3=0x50 +other_i2c_dev.bus_1_4=55 +other_i2c_dev.addr_1_4=0x50 + +# Configuration items: Fan dependent constant +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,Fan is 1 minor_dev, 0: does not exist, 5: motor + +# Number of fans +dev_num_1_0=4 + +# Number of motors +dev_num_1_5=2 + +# Configuration items: Product fan E2 format +# Description: Format fan_e2_mode +# Note: required +fan_e2_mode=fru + +# Configuration items: Mode of reading fan E2 +# Description: Format fan_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +fan_sysfs_name=eeprom + +# Configuration items: Fan air duct type +# Filling instructions: fan_direction_[direction]_[index] +# direction is air duct 0:F2B 1:B2F, indexstart with 1 +# Note: required +fan_direction_0_1=FAN80-02-F +# Configuration items: Fan status CPLD register address +# Description: Format dev_present_status_[main_dev_id][fan_index] fan_indexstart with 1 +# Note: fan main_dev_id is 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x0006005b +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x0006005b +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=1 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x0006005b +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=2 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x0006005b +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=3 + +# Configuration items: Fan rotation status CPLD register address +# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x0006005c +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=0 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=cpld +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2= +fan_roll_status.addr_1_2=0x0006005d +fan_roll_status.len_1_2=1 +fan_roll_status.bit_offset_1_2=0 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x0006005c +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=1 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=cpld +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2= +fan_roll_status.addr_2_2=0x0006005d +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x0006005c +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=2 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=cpld +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2= +fan_roll_status.addr_3_2=0x0006005d +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=2 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x0006005c +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=3 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=cpld +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2= +fan_roll_status.addr_4_2=0x0006005d +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=3 + +# Configuration items: Fan speed CPLD register address +# Description: Format fan_speed_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x00060094 +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=cpld +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2=negative +fan_speed.fpath_1_2= +fan_speed.addr_1_2=0x000600a0 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x00060096 +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=cpld +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2=negative +fan_speed.fpath_2_2= +fan_speed.addr_2_2=0x000600a2 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00060098 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=cpld +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2=negative +fan_speed.fpath_3_2= +fan_speed.addr_3_2=0x000600a4 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x0006009a +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=cpld +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2=negative +fan_speed.fpath_4_2= +fan_speed.addr_4_2=0x000600a6 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +# Configuration items: Fan speed level CPLD register address +# Description: Format fan_ratio_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=cpld +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1= +fan_ratio.addr_1=0x00060090 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=cpld +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2= +fan_ratio.addr_2=0x00060091 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=cpld +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3= +fan_ratio.addr_3=0x00060092 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=cpld +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4= +fan_ratio.addr_4=0x00060093 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +# Fan speed tolerance +fan_threshold_0x0301_0x01=30 +fan_threshold_0x0301_0x02=30 + +# Maximum fan speed +fan_threshold_0x0201_0x01=18000 +fan_threshold_0x0201_0x02=16000 + +# Minimum fan speed +fan_threshold_0x0101_0x01=3600 +fan_threshold_0x0101_0x02=3200 + +# Rated fan speed +fan_threshold_0x1001_0x01=0 +fan_threshold_0x1001_0x02=0 + +fan_threshold_0x1101_0x01=0 +fan_threshold_0x1101_0x02=0 + +fan_threshold_0x1201_0x01=3600 +fan_threshold_0x1201_0x02=3200 + +fan_threshold_0x1301_0x01=5400 +fan_threshold_0x1301_0x02=4800 + +fan_threshold_0x1401_0x01=7200 +fan_threshold_0x1401_0x02=6400 + +fan_threshold_0x1501_0x01=9000 +fan_threshold_0x1501_0x02=8000 + +fan_threshold_0x1601_0x01=10800 +fan_threshold_0x1601_0x02=9600 + +fan_threshold_0x1701_0x01=12600 +fan_threshold_0x1701_0x02=11200 + +fan_threshold_0x1801_0x01=14400 +fan_threshold_0x1801_0x02=12800 + +fan_threshold_0x1901_0x01=16200 +fan_threshold_0x1901_0x02=14400 + +fan_threshold_0x1a01_0x01=18000 +fan_threshold_0x1a01_0x02=16000 + +# Configuration items: the number of fan names displayed in the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,FAN is 1, minor_dev, 7: The number of fan names displayed +dev_num_1_7=1 + +# Configuration items: number of fan types supported by each fan name +# Description: Format fan_type_num_[fan_id] +# Note: fan_id start with 1 +fan_type_num_1=1 + +# Configuration items: product Fan type Name +# Description: Format fan_name_[index1]_[index2] +# Note: index1 indicates the ID of the fan that is displayed, start with 1, +# index2 Indicates different fan names with the same ID, start with 1 +fan_name_0_1=FAN80-02-F + +# Configuration items: fan name is displayed +# Description: Format decode_fan_name_[index] +# Note: index indicates the ID of the fan that is displayed +decode_fan_name_1=FAN80-02-F diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg new file mode 100644 index 000000000000..c5dff6c6d0cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg @@ -0,0 +1,64 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + + +# Configuration item: motherboard FPGA number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: motherboard is 0,daughter card is 5, minor_dev: FPGA is 8 +dev_num_0_9=1 + +# Configuration item: name of each fpga +# Description: Format fpga_name_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_name_0_0=MAC_FPGA + +# Configuration item: Version register for each FPGA +# Description: Format fpga_version_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_version.mode_0_0=config +fpga_version.int_cons_0_0= +fpga_version.src_0_0=file +fpga_version.frmt_0_0=num_bytes +fpga_version.pola_0_0=negative +fpga_version.fpath_0_0=/dev/fpga0 +fpga_version.addr_0_0=0x0 +fpga_version.len_0_0=4 +fpga_version.bit_offset_0_0= + +# Configuration item: Test registers for each FPGA +# Description: Format fpga_test_reg_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_test_reg.mode_0_0=config +fpga_test_reg.int_cons_0_0= +fpga_test_reg.src_0_0=file +fpga_test_reg.frmt_0_0=num_bytes +fpga_test_reg.pola_0_0=negative +fpga_test_reg.fpath_0_0=/dev/fpga0 +fpga_test_reg.addr_0_0=0x08 +fpga_test_reg.len_0_0=4 +fpga_test_reg.bit_offset_0_0= + +# Configuration item: Device type register for each FPGA +# Description: Format fpga_model_reg_[main_dev]_[fpga_id] +# Note: main_dev: motherboard is 0, daughter card is 5, fpga_id is fpga number,Start at 0 +fpga_model_reg.mode_0_0=config +fpga_model_reg.int_cons_0_0= +fpga_model_reg.src_0_0=file +fpga_model_reg.frmt_0_0=num_bytes +fpga_model_reg.pola_0_0=negative +fpga_model_reg.fpath_0_0=/dev/fpga0 +fpga_model_reg.addr_0_0=0x98 +fpga_model_reg.len_0_0=4 +fpga_model_reg.bit_offset_0_0= + + +# Configuration item: Device conversion configuration for each FPGA +# Description: Format fpga_model_decode_[origin_value] +# Note: origin_value is the value read from the FPGA device model register cannot exceed 0xffff +fpga_model_decode_0x0=XC7A150T-2FGG484I \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg new file mode 100644 index 000000000000..049d2af1aaa2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg @@ -0,0 +1,128 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: LED CPLD register address +# Description: Formatled_status_[led_id]_[led_index] +# Note: led_id By definition wb_led_t +# led_index:If there is no index, fill in 0. If there is an index (such as a fan light), the number starts from 1 + +# Front panel SYS light +led_status.mode_0_0=config +led_status.src_0_0=cpld +led_status.frmt_0_0=bit +led_status.addr_0_0=0x000100d2 +led_status.len_0_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 0- Front panel SYS light +led_status_decode_0_0=0 +led_status_decode_0_1=7 +led_status_decode_0_2=3 +led_status_decode_0_3=5 +led_status_decode_0_4=1 +led_status_decode_0_5=6 +led_status_decode_0_6=2 +led_status_decode_0_7=0 + +# Front panel BMC light +led_status.mode_2_0=config +led_status.src_2_0=cpld +led_status.frmt_2_0=bit +led_status.addr_2_0=0x000100d5 +led_status.len_2_0=3 + +led_status_decode_2_0=0 +led_status_decode_2_1=7 +led_status_decode_2_2=3 +led_status_decode_2_3=5 +led_status_decode_2_4=1 +led_status_decode_2_5=6 +led_status_decode_2_6=2 +led_status_decode_2_7=0 + +# Front panel FAN light +led_status.mode_4_0=config +led_status.src_4_0=cpld +led_status.frmt_4_0=bit +led_status.addr_4_0=0x000100d4 +led_status.len_4_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 4-Front panel FAN light +led_status_decode_4_0=0 +led_status_decode_4_1=7 +led_status_decode_4_2=3 +led_status_decode_4_3=5 +led_status_decode_4_4=1 +led_status_decode_4_5=6 +led_status_decode_4_6=2 +led_status_decode_4_7=0 + +# Front panel PSU light +led_status.mode_6_0=config +led_status.src_6_0=cpld +led_status.frmt_6_0=bit +led_status.addr_6_0=0x000100d3 +led_status.len_6_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 6-Front panel PSU light +led_status_decode_6_0=0 +led_status_decode_6_1=7 +led_status_decode_6_2=3 +led_status_decode_6_3=5 +led_status_decode_6_4=1 +led_status_decode_6_5=6 +led_status_decode_6_6=2 +led_status_decode_6_7=0 + +# Fan body lamp1 +led_status.mode_10_1=config +led_status.src_10_1=cpld +led_status.frmt_10_1=bit +led_status.addr_10_1=0x000600d0 +led_status.len_10_1=3 + +# Fan body lamp2 +led_status.mode_10_2=config +led_status.src_10_2=cpld +led_status.frmt_10_2=bit +led_status.addr_10_2=0x000600d1 +led_status.len_10_2=3 + +# Fan body lamp3 +led_status.mode_10_3=config +led_status.src_10_3=cpld +led_status.frmt_10_3=bit +led_status.addr_10_3=0x000600d2 +led_status.len_10_3=3 + +# Fan body lamp4 +led_status.mode_10_4=config +led_status.src_10_4=cpld +led_status.frmt_10_4=bit +led_status.addr_10_4=0x000600d3 +led_status.len_10_4=3 + + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 10-Fan body lamp +led_status_decode_10_0=0 +led_status_decode_10_1=7 +led_status_decode_10_2=3 +led_status_decode_10_3=5 +led_status_decode_10_4=1 +led_status_decode_10_5=6 +led_status_decode_10_6=2 +led_status_decode_10_7=0 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 000000000000..a344173b362e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,657 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: PSU number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev,0 indicates the obtained number +dev_num_2_0=2 + +# Configuration items: PSU temperature sensors number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 1:temperature +dev_num_2_1=3 + +# Configuration items: PSU E2 information +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev,PSU is 2, psu_index:Power supply number, start with 1 +other_i2c_dev.bus_2_1=42 +other_i2c_dev.addr_2_1=0x50 +other_i2c_dev.bus_2_2=43 +other_i2c_dev.addr_2_2=0x50 + +# Configuration items: Mode of reading power supply E2 +# Description: Format psu_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +psu_sysfs_name=eeprom + +other_i2c_dev.bus_2_5=42 +other_i2c_dev.addr_2_5=0x58 +other_i2c_dev.bus_2_6=43 +other_i2c_dev.addr_2_6=0x58 + +# Configuration items: PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 9:Power Output Status (0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02050079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02060079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 10:Power input Status (0x79) +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02050079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02060079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,,start with 1 reg_id 11:Power Input type (0x80) +psu_pmbus_reg.mode_1_11=config +psu_pmbus_reg.src_1_11=other_i2c +psu_pmbus_reg.frmt_1_11=byte +psu_pmbus_reg.pola_1_11=positive +psu_pmbus_reg.addr_1_11=0x02050080 +psu_pmbus_reg.len_1_11=1 +psu_pmbus_reg.bit_offset_1_11= + +psu_pmbus_reg.mode_2_11=config +psu_pmbus_reg.src_2_11=other_i2c +psu_pmbus_reg.frmt_2_11=byte +psu_pmbus_reg.pola_2_11=positive +psu_pmbus_reg.addr_2_11=0x02060080 +psu_pmbus_reg.len_2_11=1 +psu_pmbus_reg.bit_offset_2_11= + + +psu_pmbus_reg.mode_1_12=config +psu_pmbus_reg.src_1_12=other_i2c +psu_pmbus_reg.frmt_1_12=byte +psu_pmbus_reg.pola_1_12=positive +psu_pmbus_reg.addr_1_12=0x0205003b +psu_pmbus_reg.len_1_12=1 +psu_pmbus_reg.bit_offset_1_12= + +psu_pmbus_reg.mode_2_12=config +psu_pmbus_reg.src_2_12=other_i2c +psu_pmbus_reg.frmt_2_12=byte +psu_pmbus_reg.pola_2_12=positive +psu_pmbus_reg.addr_2_12=0x0206003b +psu_pmbus_reg.len_2_12=1 +psu_pmbus_reg.bit_offset_2_12= + +# Configuration items: Input status of the power module +# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value +# Note: psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10 +# value value:bus[8]_addr[16]_offset[8] +psu_pmbus_id_1_11=0x5F005880 +psu_pmbus_id_2_11=0x60005880 + + +# Configuration items: Address of the power status register +# Description: Format psu_status_[psu_index]_[status_id] +# Note: psu_index:Power supply number,start with 1 status_id 0:present 1:status 2:Alarm status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00010058 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=2 + +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00010058 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=1 + +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=positive +psu_status.addr_1_2=0x00010058 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=0 + +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00010058 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=6 + +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00010058 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=5 + +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=positive +psu_status.addr_2_2=0x00010058 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=4 + +# Configuration items:PSU PMBUS information +# Description: Format hwmon_psu_[psu_index]_[sensor_type] +# Note: psu_index:Power supply number,start with 1 sensor_type definition is as follows: +# 0:None 1:in_vol 2:in_curr 3:in_power 4:out_vol 5:out_curr 6:out_power 7:fan +# psu1 in_vol +hwmon_psu.mode_1_1=config +hwmon_psu.int_cons_1_1=0 +hwmon_psu.src_1_1=file +hwmon_psu.frmt_1_1=buf +hwmon_psu.fpath_1_1=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_1=0 +hwmon_psu.len_1_1=8 +hwmon_psu.bit_offset_1_1= +hwmon_psu.str_cons_1_1=in1_input + +# psu1 in_curr +hwmon_psu.mode_1_2=config +hwmon_psu.int_cons_1_2=0 +hwmon_psu.src_1_2=file +hwmon_psu.frmt_1_2=buf +hwmon_psu.fpath_1_2=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_2=0 +hwmon_psu.len_1_2=8 +hwmon_psu.bit_offset_1_2= +hwmon_psu.str_cons_1_2=curr1_input + +# psu1 in_power +hwmon_psu.mode_1_3=config +hwmon_psu.int_cons_1_3=0 +hwmon_psu.src_1_3=file +hwmon_psu.frmt_1_3=buf +hwmon_psu.fpath_1_3=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_3=0 +hwmon_psu.len_1_3=16 +hwmon_psu.bit_offset_1_3=0 +hwmon_psu.str_cons_1_3=power1_input + +# psu1 out_vol +hwmon_psu.mode_1_4=config +hwmon_psu.int_cons_1_4=0 +hwmon_psu.src_1_4=file +hwmon_psu.frmt_1_4=buf +hwmon_psu.fpath_1_4=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_4=0 +hwmon_psu.len_1_4=8 +hwmon_psu.bit_offset_1_4= +hwmon_psu.str_cons_1_4=in2_input + +# psu1 out_curr +hwmon_psu.mode_1_5=config +hwmon_psu.int_cons_1_5=0 +hwmon_psu.src_1_5=file +hwmon_psu.frmt_1_5=buf +hwmon_psu.fpath_1_5=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_5=0 +hwmon_psu.len_1_5=8 +hwmon_psu.bit_offset_1_5= +hwmon_psu.str_cons_1_5=curr2_input + +# psu1 out_power +hwmon_psu.mode_1_6=config +hwmon_psu.int_cons_1_6=0 +hwmon_psu.src_1_6=file +hwmon_psu.frmt_1_6=buf +hwmon_psu.fpath_1_6=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_6=0 +hwmon_psu.len_1_6=16 +hwmon_psu.bit_offset_1_6=0 +hwmon_psu.str_cons_1_6=power2_input + +# psu1 fan +hwmon_psu.mode_1_7=config +hwmon_psu.int_cons_1_7= +hwmon_psu.src_1_7=file +hwmon_psu.frmt_1_7=buf +hwmon_psu.fpath_1_7=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_7=0 +hwmon_psu.len_1_7=8 +hwmon_psu.bit_offset_1_7= +hwmon_psu.str_cons_1_7=fan1_input + +# psu2 in_vol +hwmon_psu.mode_2_1=config +hwmon_psu.int_cons_2_1=0 +hwmon_psu.src_2_1=file +hwmon_psu.frmt_2_1=buf +hwmon_psu.fpath_2_1=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_1=0 +hwmon_psu.len_2_1=8 +hwmon_psu.bit_offset_2_1= +hwmon_psu.str_cons_2_1=in1_input + +# psu2 in_curr +hwmon_psu.mode_2_2=config +hwmon_psu.int_cons_2_2=0 +hwmon_psu.src_2_2=file +hwmon_psu.frmt_2_2=buf +hwmon_psu.fpath_2_2=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_2=0 +hwmon_psu.len_2_2=8 +hwmon_psu.bit_offset_2_2= +hwmon_psu.str_cons_2_2=curr1_input + +# psu2 in_power +hwmon_psu.mode_2_3=config +hwmon_psu.int_cons_2_3=0 +hwmon_psu.src_2_3=file +hwmon_psu.frmt_2_3=buf +hwmon_psu.fpath_2_3=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_3=0 +hwmon_psu.len_2_3=16 +hwmon_psu.bit_offset_2_3=0 +hwmon_psu.str_cons_2_3=power1_input + +# psu2 out_vol +hwmon_psu.mode_2_4=config +hwmon_psu.int_cons_2_4=0 +hwmon_psu.src_2_4=file +hwmon_psu.frmt_2_4=buf +hwmon_psu.fpath_2_4=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_4=0 +hwmon_psu.len_2_4=8 +hwmon_psu.bit_offset_2_4= +hwmon_psu.str_cons_2_4=in2_input + +# psu2 out_curr +hwmon_psu.mode_2_5=config +hwmon_psu.int_cons_2_5=0 +hwmon_psu.src_2_5=file +hwmon_psu.frmt_2_5=buf +hwmon_psu.fpath_2_5=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_5=0 +hwmon_psu.len_2_5=8 +hwmon_psu.bit_offset_2_5= +hwmon_psu.str_cons_2_5=curr2_input + +# psu2 out_power +hwmon_psu.mode_2_6=config +hwmon_psu.int_cons_2_6=0 +hwmon_psu.src_2_6=file +hwmon_psu.frmt_2_6=buf +hwmon_psu.fpath_2_6=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_6=0 +hwmon_psu.len_2_6=16 +hwmon_psu.bit_offset_2_6=0 +hwmon_psu.str_cons_2_6=power2_input + +# psu2 fan +hwmon_psu.mode_2_7=config +hwmon_psu.int_cons_2_7= +hwmon_psu.src_2_7=file +hwmon_psu.frmt_2_7=buf +hwmon_psu.fpath_2_7=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_7=0 +hwmon_psu.len_2_7=8 +hwmon_psu.bit_offset_2_7= +hwmon_psu.str_cons_2_7=fan1_input + + +# Configuration items: Temperature hwmon path +# Description: Format hwmon_temp[key1]_[key2] +# Note: key1: high 8bit indicates the index of the device (start with 1), and the low 8bit indicates the temperature index,start with 1 +# key2: high 4bit indicates the main device type, the power supply is 5, and the low 4bit indicates the temperature type +# 0:input 1:alias 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src +# int_cons:N raw value/(10^N) +# fpath:hwmon first half of the path +# bit_offset: Number of decimal places, retain original precision if not configured +# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name. + +# psu1 temp1 input +hwmon_temp.mode_0x0101_0x20=config +hwmon_temp.int_cons_0x0101_0x20=0 +hwmon_temp.src_0x0101_0x20=file +hwmon_temp.frmt_0x0101_0x20=buf +hwmon_temp.fpath_0x0101_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0101_0x20=0 +hwmon_temp.len_0x0101_0x20=8 +hwmon_temp.bit_offset_0x0101_0x20= +hwmon_temp.str_cons_0x0101_0x20=temp1_input + +# psu1 temp1 alias +hwmon_temp.mode_0x0101_0x21=str_constant +hwmon_temp.str_cons_0x0101_0x21=temp1 +# psu1 temp1 max +hwmon_temp.mode_0x0101_0x23=str_constant +hwmon_temp.str_cons_0x0101_0x23=60000 +# psu1 temp1 min +hwmon_temp.mode_0x0101_0x25=str_constant +hwmon_temp.str_cons_0x0101_0x25=-10000 +# psu1 temp1 type +hwmon_temp.mode_0x0101_0x22=str_constant +hwmon_temp.str_cons_0x0101_0x22=psu_pmbus + +# psu1 temp2 input +hwmon_temp.mode_0x0102_0x20=config +hwmon_temp.int_cons_0x0102_0x20=0 +hwmon_temp.src_0x0102_0x20=file +hwmon_temp.frmt_0x0102_0x20=buf +hwmon_temp.fpath_0x0102_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0102_0x20=0 +hwmon_temp.len_0x0102_0x20=8 +hwmon_temp.bit_offset_0x0102_0x20= +hwmon_temp.str_cons_0x0102_0x20=temp2_input + +# psu1 temp2 alias +hwmon_temp.mode_0x0102_0x21=str_constant +hwmon_temp.str_cons_0x0102_0x21=temp2 +# psu1 temp2 max +hwmon_temp.mode_0x0102_0x23=str_constant +hwmon_temp.str_cons_0x0102_0x23=60000 +# psu1 temp2 min +hwmon_temp.mode_0x0102_0x25=str_constant +hwmon_temp.str_cons_0x0102_0x25=-10000 +# psu1 temp2 type +hwmon_temp.mode_0x0102_0x22=str_constant +hwmon_temp.str_cons_0x0102_0x22=psu_pmbus + +# psu1 temp3 input +hwmon_temp.mode_0x0103_0x20=config +hwmon_temp.int_cons_0x0103_0x20=0 +hwmon_temp.src_0x0103_0x20=file +hwmon_temp.frmt_0x0103_0x20=buf +hwmon_temp.fpath_0x0103_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0103_0x20=0 +hwmon_temp.len_0x0103_0x20=8 +hwmon_temp.bit_offset_0x0103_0x20= +hwmon_temp.str_cons_0x0103_0x20=temp3_input + +# psu1 temp3 alias +hwmon_temp.mode_0x0103_0x21=str_constant +hwmon_temp.str_cons_0x0103_0x21=temp3 +# psu1 temp3 max +hwmon_temp.mode_0x0103_0x23=str_constant +hwmon_temp.str_cons_0x0103_0x23=60000 +# psu1 temp3 min +hwmon_temp.mode_0x0103_0x25=str_constant +hwmon_temp.str_cons_0x0103_0x25=-10000 +# psu1 temp1 type +hwmon_temp.mode_0x0103_0x22=str_constant +hwmon_temp.str_cons_0x0103_0x22=psu_pmbus + +# psu2 temp1 input +hwmon_temp.mode_0x0201_0x20=config +hwmon_temp.int_cons_0x0201_0x20=0 +hwmon_temp.src_0x0201_0x20=file +hwmon_temp.frmt_0x0201_0x20=buf +hwmon_temp.fpath_0x0201_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0201_0x20=0 +hwmon_temp.len_0x0201_0x20=8 +hwmon_temp.bit_offset_0x0201_0x20= +hwmon_temp.str_cons_0x0201_0x20=temp1_input + +# psu2 temp1 alias +hwmon_temp.mode_0x0201_0x21=str_constant +hwmon_temp.str_cons_0x0201_0x21=temp1 +# psu2 temp1 max +hwmon_temp.mode_0x0201_0x23=str_constant +hwmon_temp.str_cons_0x0201_0x23=60000 +# psu2 temp1 min +hwmon_temp.mode_0x0201_0x25=str_constant +hwmon_temp.str_cons_0x0201_0x25=-10000 +# psu2 temp1 type +hwmon_temp.mode_0x0201_0x22=str_constant +hwmon_temp.str_cons_0x0201_0x22=psu_pmbus + +# psu2 temp2 input +hwmon_temp.mode_0x0202_0x20=config +hwmon_temp.int_cons_0x0202_0x20=0 +hwmon_temp.src_0x0202_0x20=file +hwmon_temp.frmt_0x0202_0x20=buf +hwmon_temp.fpath_0x0202_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0202_0x20=0 +hwmon_temp.len_0x0202_0x20=8 +hwmon_temp.bit_offset_0x0202_0x20= +hwmon_temp.str_cons_0x0202_0x20=temp2_input + +# psu2 temp2 alias +hwmon_temp.mode_0x0202_0x21=str_constant +hwmon_temp.str_cons_0x0202_0x21=temp2 +# psu2 temp2 max +hwmon_temp.mode_0x0202_0x23=str_constant +hwmon_temp.str_cons_0x0202_0x23=60000 +# psu2 temp2 min +hwmon_temp.mode_0x0202_0x25=str_constant +hwmon_temp.str_cons_0x0202_0x25=-10000 +# psu2 temp2 type +hwmon_temp.mode_0x0202_0x22=str_constant +hwmon_temp.str_cons_0x0202_0x22=psu_pmbus + +# psu2 temp3 input +hwmon_temp.mode_0x0203_0x20=config +hwmon_temp.int_cons_0x0203_0x20=0 +hwmon_temp.src_0x0203_0x20=file +hwmon_temp.frmt_0x0203_0x20=buf +hwmon_temp.fpath_0x0203_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0203_0x20=0 +hwmon_temp.len_0x0203_0x20=8 +hwmon_temp.bit_offset_0x0203_0x20= +hwmon_temp.str_cons_0x0203_0x20=temp3_input + +# psu2 temp3 alias +hwmon_temp.mode_0x0203_0x21=str_constant +hwmon_temp.str_cons_0x0203_0x21=temp3 +# psu2 temp3 max +hwmon_temp.mode_0x0203_0x23=str_constant +hwmon_temp.str_cons_0x0203_0x23=60000 +# psu2 temp3 min +hwmon_temp.mode_0x0203_0x25=str_constant +hwmon_temp.str_cons_0x0203_0x25=-10000 +# psu2 temp3 type +hwmon_temp.mode_0x0203_0x22=str_constant +hwmon_temp.str_cons_0x0203_0x22=psu_pmbus + +# psu3 temp1 input +hwmon_temp.mode_0x0301_0x20=config +hwmon_temp.int_cons_0x0301_0x20=0 +hwmon_temp.src_0x0301_0x20=file +hwmon_temp.frmt_0x0301_0x20=buf +hwmon_temp.fpath_0x0301_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0301_0x20=0 +hwmon_temp.len_0x0301_0x20=8 +hwmon_temp.bit_offset_0x0301_0x20= +hwmon_temp.str_cons_0x0301_0x20=temp1_input + +# psu3 temp1 alias +hwmon_temp.mode_0x0301_0x21=str_constant +hwmon_temp.str_cons_0x0301_0x21=temp1 +# psu3 temp1 max +hwmon_temp.mode_0x0301_0x23=str_constant +hwmon_temp.str_cons_0x0301_0x23=60000 +# psu3 temp1 min +hwmon_temp.mode_0x0301_0x25=str_constant +hwmon_temp.str_cons_0x0301_0x25=-10000 +# psu3 temp1 type +hwmon_temp.mode_0x0301_0x22=str_constant +hwmon_temp.str_cons_0x0301_0x22=psu_pmbus + +# psu3 temp2 input +hwmon_temp.mode_0x0302_0x20=config +hwmon_temp.int_cons_0x0302_0x20=0 +hwmon_temp.src_0x0302_0x20=file +hwmon_temp.frmt_0x0302_0x20=buf +hwmon_temp.fpath_0x0302_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0302_0x20=0 +hwmon_temp.len_0x0302_0x20=8 +hwmon_temp.bit_offset_0x0302_0x20= +hwmon_temp.str_cons_0x0302_0x20=temp2_input + +# psu3 temp2 alias +hwmon_temp.mode_0x0302_0x21=str_constant +hwmon_temp.str_cons_0x0302_0x21=temp2 +# psu3 temp2 max +hwmon_temp.mode_0x0302_0x23=str_constant +hwmon_temp.str_cons_0x0302_0x23=60000 +# psu3 temp2 min +hwmon_temp.mode_0x0302_0x25=str_constant +hwmon_temp.str_cons_0x0302_0x25=-10000 +# psu3 temp2 type +hwmon_temp.mode_0x0302_0x22=str_constant +hwmon_temp.str_cons_0x0302_0x22=psu_pmbus + +# psu3 temp3 input +hwmon_temp.mode_0x0303_0x20=config +hwmon_temp.int_cons_0x0303_0x20=0 +hwmon_temp.src_0x0303_0x20=file +hwmon_temp.frmt_0x0303_0x20=buf +hwmon_temp.fpath_0x0303_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0303_0x20=0 +hwmon_temp.len_0x0303_0x20=8 +hwmon_temp.bit_offset_0x0303_0x20= +hwmon_temp.str_cons_0x0303_0x20=temp3_input + +# psu3 temp3 alias +hwmon_temp.mode_0x0303_0x21=str_constant +hwmon_temp.str_cons_0x0303_0x21=temp3 +# psu3 temp3 max +hwmon_temp.mode_0x0303_0x23=str_constant +hwmon_temp.str_cons_0x0303_0x23=60000 +# psu3 temp3 min +hwmon_temp.mode_0x0303_0x25=str_constant +hwmon_temp.str_cons_0x0303_0x25=-10000 +# psu3 temp3 type +hwmon_temp.mode_0x0303_0x22=str_constant +hwmon_temp.str_cons_0x0303_0x22=psu_pmbus + +# psu4 temp1 input +hwmon_temp.mode_0x0401_0x20=config +hwmon_temp.int_cons_0x0401_0x20=0 +hwmon_temp.src_0x0401_0x20=file +hwmon_temp.frmt_0x0401_0x20=buf +hwmon_temp.fpath_0x0401_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0401_0x20=0 +hwmon_temp.len_0x0401_0x20=8 +hwmon_temp.bit_offset_0x0401_0x20= +hwmon_temp.str_cons_0x0401_0x20=temp1_input + +# psu4 temp1 alias +hwmon_temp.mode_0x0401_0x21=str_constant +hwmon_temp.str_cons_0x0401_0x21=temp1 +# psu4 temp1 max +hwmon_temp.mode_0x0401_0x23=str_constant +hwmon_temp.str_cons_0x0401_0x23=60000 +# psu4 temp1 min +hwmon_temp.mode_0x0401_0x25=str_constant +hwmon_temp.str_cons_0x0401_0x25=-10000 +# psu4 temp1 type +hwmon_temp.mode_0x0401_0x22=str_constant +hwmon_temp.str_cons_0x0401_0x22=psu_pmbus + +# psu4 temp2 input +hwmon_temp.mode_0x0402_0x20=config +hwmon_temp.int_cons_0x0402_0x20=0 +hwmon_temp.src_0x0402_0x20=file +hwmon_temp.frmt_0x0402_0x20=buf +hwmon_temp.fpath_0x0402_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0402_0x20=0 +hwmon_temp.len_0x0402_0x20=8 +hwmon_temp.bit_offset_0x0402_0x20= +hwmon_temp.str_cons_0x0402_0x20=temp2_input + +# psu4 temp2 alias +hwmon_temp.mode_0x0402_0x21=str_constant +hwmon_temp.str_cons_0x0402_0x21=temp2 +# psu4 temp2 max +hwmon_temp.mode_0x0402_0x23=str_constant +hwmon_temp.str_cons_0x0402_0x23=60000 +# psu4 temp2 min +hwmon_temp.mode_0x0402_0x25=str_constant +hwmon_temp.str_cons_0x0402_0x25=-10000 +# psu4 temp2 type +hwmon_temp.mode_0x0402_0x22=str_constant +hwmon_temp.str_cons_0x0402_0x22=psu_pmbus + +# psu4 temp3 input +hwmon_temp.mode_0x0403_0x20=config +hwmon_temp.int_cons_0x0403_0x20=0 +hwmon_temp.src_0x0403_0x20=file +hwmon_temp.frmt_0x0403_0x20=buf +hwmon_temp.fpath_0x0403_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0403_0x20=0 +hwmon_temp.len_0x0403_0x20=8 +hwmon_temp.bit_offset_0x0403_0x20= +hwmon_temp.str_cons_0x0403_0x20=temp3_input + +# psu4 temp3 alias +hwmon_temp.mode_0x0403_0x21=str_constant +hwmon_temp.str_cons_0x0403_0x21=temp3 +# psu4 temp3 max +hwmon_temp.mode_0x0403_0x23=str_constant +hwmon_temp.str_cons_0x0403_0x23=60000 +# psu4 temp3 min +hwmon_temp.mode_0x0403_0x25=str_constant +hwmon_temp.str_cons_0x0403_0x25=-10000 +# psu4 temp3 type +hwmon_temp.mode_0x0403_0x22=str_constant +hwmon_temp.str_cons_0x0403_0x22=psu_pmbus + +# Configuration items: The number of power supply names displayed by the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 6:The number of power supply names displayed +dev_num_2_6=2 + +# Configuration items: Product power supply type name +# Description: Format power_name_[index1]_[index2] +# Note: index1 Indicates the power supply displayed ID, start with 1, +# index2 Indicates different power supplies with the same ID, start with 1 +power_name_1_1=ECDL3000123 +power_name_1_2=CRPS3000CL + +# Configuration items: The power supply name is displayed +# Description: Format decode_power_name_[index] +# Note: index Indicates the power supply displayed ID +decode_power_name_1=PA3000I-F + + +# Configuration items: Rated power of supply +# Description: Format power_rate_supply_[index] +# Note: index Indicates the power supply displayed ID +power_rate_supply_1=1300000000 + +# Configuration items: Displays the type of power duct +# Description: Format decode_power_fan_dir_[index] +# Note: index Indicates the power supply displayed ID,attr 0 indicates -F and 1 indicates -R +decode_power_fan_dir_1=0 +decode_power_fan_dir_2=1 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 000000000000..7bdfdcd9369c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,3463 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Temperature hwmon path +# Description: Format hwmon_temp[key1]_[key2] +# Note: key1: A high 8bit indicates the device index starting from 1. A low 8bit indicates the temperature index starting from 1 +# key2:The high 4bit indicates the main device type, the sub-card is 5, and the low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src +# int_cons:N raw value/(10^N) +# fpath:hwmon first half of the path +# bit_offset: Number of decimal places, retain original precision if not configured +# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name. + +# temperature sensor number +dev_num_0_1=20 + +# voltage sensors number +dev_num_0_2=112 + +# current sensors number +dev_num_0_3=7 + +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# sensor temp1 input +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.int_cons_0x0001_0x00=0 +hwmon_temp.src_0x0001_0x00=file +hwmon_temp.frmt_0x0001_0x00=buf +hwmon_temp.fpath_0x0001_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x00=0 +hwmon_temp.len_0x0001_0x00=8 +hwmon_temp.bit_offset_0x0001_0x00= +hwmon_temp.str_cons_0x0001_0x00=temp1_input + +# sensor temp1 alias +hwmon_temp.mode_0x0001_0x01=config +hwmon_temp.int_cons_0x0001_0x01= +hwmon_temp.src_0x0001_0x01=file +hwmon_temp.frmt_0x0001_0x01=buf +hwmon_temp.fpath_0x0001_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x01=0 +hwmon_temp.len_0x0001_0x01=16 +hwmon_temp.bit_offset_0x0001_0x01= +hwmon_temp.str_cons_0x0001_0x01=temp1_label +# sensor temp1 type +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=cpu + +# sensor temp1 max +hwmon_temp.mode_0x0001_0x03=config +hwmon_temp.int_cons_0x0001_0x03=0 +hwmon_temp.src_0x0001_0x03=file +hwmon_temp.frmt_0x0001_0x03=buf +hwmon_temp.fpath_0x0001_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x03=0 +hwmon_temp.len_0x0001_0x03=8 +hwmon_temp.bit_offset_0x0001_0x03= +hwmon_temp.str_cons_0x0001_0x03=temp1_max +# sensor temp1 min +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +# sensor temp2 input +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.int_cons_0x0002_0x00=0 +hwmon_temp.src_0x0002_0x00=file +hwmon_temp.frmt_0x0002_0x00=buf +hwmon_temp.fpath_0x0002_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x00=0 +hwmon_temp.len_0x0002_0x00=8 +hwmon_temp.bit_offset_0x0002_0x00= +hwmon_temp.str_cons_0x0002_0x00=temp2_input + +# sensor temp2 alias +hwmon_temp.mode_0x0002_0x01=config +hwmon_temp.int_cons_0x0002_0x01= +hwmon_temp.src_0x0002_0x01=file +hwmon_temp.frmt_0x0002_0x01=buf +hwmon_temp.fpath_0x0002_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x01=0 +hwmon_temp.len_0x0002_0x01=16 +hwmon_temp.bit_offset_0x0002_0x01= +hwmon_temp.str_cons_0x0002_0x01=temp2_label + +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=cpu + +# sensor temp2 max +hwmon_temp.mode_0x0002_0x03=config +hwmon_temp.int_cons_0x0002_0x03=0 +hwmon_temp.src_0x0002_0x03=file +hwmon_temp.frmt_0x0002_0x03=buf +hwmon_temp.fpath_0x0002_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x03=0 +hwmon_temp.len_0x0002_0x03=8 +hwmon_temp.bit_offset_0x0002_0x03= +hwmon_temp.str_cons_0x0002_0x03=temp2_max +# sensor temp2 min +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 + +# sensor temp3 input +hwmon_temp.mode_0x0003_0x00=config +hwmon_temp.int_cons_0x0003_0x00=0 +hwmon_temp.src_0x0003_0x00=file +hwmon_temp.frmt_0x0003_0x00=buf +hwmon_temp.fpath_0x0003_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x00=0 +hwmon_temp.len_0x0003_0x00=8 +hwmon_temp.bit_offset_0x0003_0x00= +hwmon_temp.str_cons_0x0003_0x00=temp3_input + +# sensor temp3 alias +hwmon_temp.mode_0x0003_0x01=config +hwmon_temp.int_cons_0x0003_0x01= +hwmon_temp.src_0x0003_0x01=file +hwmon_temp.frmt_0x0003_0x01=buf +hwmon_temp.fpath_0x0003_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x01=0 +hwmon_temp.len_0x0003_0x01=16 +hwmon_temp.bit_offset_0x0003_0x01= +hwmon_temp.str_cons_0x0003_0x01=temp3_label + +hwmon_temp.mode_0x0003_0x02=str_constant +hwmon_temp.str_cons_0x0003_0x02=cpu + +# sensor temp3 max +hwmon_temp.mode_0x0003_0x03=config +hwmon_temp.int_cons_0x0003_0x03=0 +hwmon_temp.src_0x0003_0x03=file +hwmon_temp.frmt_0x0003_0x03=buf +hwmon_temp.fpath_0x0003_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x03=0 +hwmon_temp.len_0x0003_0x03=8 +hwmon_temp.bit_offset_0x0003_0x03= +hwmon_temp.str_cons_0x0003_0x03=temp3_max +# sensor temp3 min +hwmon_temp.mode_0x0003_0x05=str_constant +hwmon_temp.str_cons_0x0003_0x05=-30000 + +# sensor temp4 input +hwmon_temp.mode_0x0004_0x00=config +hwmon_temp.int_cons_0x0004_0x00=0 +hwmon_temp.src_0x0004_0x00=file +hwmon_temp.frmt_0x0004_0x00=buf +hwmon_temp.fpath_0x0004_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x00=0 +hwmon_temp.len_0x0004_0x00=8 +hwmon_temp.bit_offset_0x0004_0x00= +hwmon_temp.str_cons_0x0004_0x00=temp4_input + +# sensor temp4 alias +hwmon_temp.mode_0x0004_0x01=config +hwmon_temp.int_cons_0x0004_0x01= +hwmon_temp.src_0x0004_0x01=file +hwmon_temp.frmt_0x0004_0x01=buf +hwmon_temp.fpath_0x0004_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x01=0 +hwmon_temp.len_0x0004_0x01=16 +hwmon_temp.bit_offset_0x0004_0x01= +hwmon_temp.str_cons_0x0004_0x01=temp4_label + +hwmon_temp.mode_0x0004_0x02=str_constant +hwmon_temp.str_cons_0x0004_0x02=cpu + +# sensor temp4 max +hwmon_temp.mode_0x0004_0x03=config +hwmon_temp.int_cons_0x0004_0x03=0 +hwmon_temp.src_0x0004_0x03=file +hwmon_temp.frmt_0x0004_0x03=buf +hwmon_temp.fpath_0x0004_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x03=0 +hwmon_temp.len_0x0004_0x03=8 +hwmon_temp.bit_offset_0x0004_0x03= +hwmon_temp.str_cons_0x0004_0x03=temp4_max +# sensor temp4 min +hwmon_temp.mode_0x0004_0x05=str_constant +hwmon_temp.str_cons_0x0004_0x05=-30000 + +# sensor temp5 input +hwmon_temp.mode_0x0005_0x00=config +hwmon_temp.int_cons_0x0005_0x00=0 +hwmon_temp.src_0x0005_0x00=file +hwmon_temp.frmt_0x0005_0x00=buf +hwmon_temp.fpath_0x0005_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x00=0 +hwmon_temp.len_0x0005_0x00=8 +hwmon_temp.bit_offset_0x0005_0x00= +hwmon_temp.str_cons_0x0005_0x00=temp5_input + +# sensor temp5 alias +hwmon_temp.mode_0x0005_0x01=config +hwmon_temp.int_cons_0x0005_0x01= +hwmon_temp.src_0x0005_0x01=file +hwmon_temp.frmt_0x0005_0x01=buf +hwmon_temp.fpath_0x0005_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x01=0 +hwmon_temp.len_0x0005_0x01=16 +hwmon_temp.bit_offset_0x0005_0x01= +hwmon_temp.str_cons_0x0005_0x01=temp5_label + +hwmon_temp.mode_0x0005_0x02=str_constant +hwmon_temp.str_cons_0x0005_0x02=cpu + +# sensor temp5 max +hwmon_temp.mode_0x0005_0x03=config +hwmon_temp.int_cons_0x0005_0x03=0 +hwmon_temp.src_0x0005_0x03=file +hwmon_temp.frmt_0x0005_0x03=buf +hwmon_temp.fpath_0x0005_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x03=0 +hwmon_temp.len_0x0005_0x03=8 +hwmon_temp.bit_offset_0x0005_0x03= +hwmon_temp.str_cons_0x0005_0x03=temp5_max +# sensor temp5 min +hwmon_temp.mode_0x0005_0x05=str_constant +hwmon_temp.str_cons_0x0005_0x05=-30000 + +# sensor temp6 input +hwmon_temp.mode_0x0006_0x00=config +hwmon_temp.int_cons_0x0006_0x00=0 +hwmon_temp.src_0x0006_0x00=file +hwmon_temp.frmt_0x0006_0x00=buf +hwmon_temp.fpath_0x0006_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x00=0 +hwmon_temp.len_0x0006_0x00=8 +hwmon_temp.bit_offset_0x0006_0x00= +hwmon_temp.str_cons_0x0006_0x00=temp6_input + +# sensor temp6 alias +hwmon_temp.mode_0x0006_0x01=config +hwmon_temp.int_cons_0x0006_0x01= +hwmon_temp.src_0x0006_0x01=file +hwmon_temp.frmt_0x0006_0x01=buf +hwmon_temp.fpath_0x0006_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x01=0 +hwmon_temp.len_0x0006_0x01=16 +hwmon_temp.bit_offset_0x0006_0x01= +hwmon_temp.str_cons_0x0006_0x01=temp6_label + +hwmon_temp.mode_0x0006_0x02=str_constant +hwmon_temp.str_cons_0x0006_0x02=cpu + +# sensor temp6 max +hwmon_temp.mode_0x0006_0x03=config +hwmon_temp.int_cons_0x0006_0x03=0 +hwmon_temp.src_0x0006_0x03=file +hwmon_temp.frmt_0x0006_0x03=buf +hwmon_temp.fpath_0x0006_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x03=0 +hwmon_temp.len_0x0006_0x03=8 +hwmon_temp.bit_offset_0x0006_0x03= +hwmon_temp.str_cons_0x0006_0x03=temp6_max +# sensor temp6 min +hwmon_temp.mode_0x0006_0x05=str_constant +hwmon_temp.str_cons_0x0006_0x05=-30000 + +# sensor temp7 input +hwmon_temp.mode_0x0007_0x00=config +hwmon_temp.int_cons_0x0007_0x00=0 +hwmon_temp.src_0x0007_0x00=file +hwmon_temp.frmt_0x0007_0x00=buf +hwmon_temp.fpath_0x0007_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x00=0 +hwmon_temp.len_0x0007_0x00=8 +hwmon_temp.bit_offset_0x0007_0x00= +hwmon_temp.str_cons_0x0007_0x00=temp7_input + +# sensor temp7 alias +hwmon_temp.mode_0x0007_0x01=config +hwmon_temp.int_cons_0x0007_0x01= +hwmon_temp.src_0x0007_0x01=file +hwmon_temp.frmt_0x0007_0x01=buf +hwmon_temp.fpath_0x0007_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x01=0 +hwmon_temp.len_0x0007_0x01=16 +hwmon_temp.bit_offset_0x0007_0x01= +hwmon_temp.str_cons_0x0007_0x01=temp7_label + +hwmon_temp.mode_0x0007_0x02=str_constant +hwmon_temp.str_cons_0x0007_0x02=cpu + +# sensor temp7 max +hwmon_temp.mode_0x0007_0x03=config +hwmon_temp.int_cons_0x0007_0x03=0 +hwmon_temp.src_0x0007_0x03=file +hwmon_temp.frmt_0x0007_0x03=buf +hwmon_temp.fpath_0x0007_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x03=0 +hwmon_temp.len_0x0007_0x03=8 +hwmon_temp.bit_offset_0x0007_0x03= +hwmon_temp.str_cons_0x0007_0x03=temp7_max +# sensor temp7 min +hwmon_temp.mode_0x0007_0x05=str_constant +hwmon_temp.str_cons_0x0007_0x05=-30000 + +# sensor temp8 input +hwmon_temp.mode_0x0008_0x00=config +hwmon_temp.int_cons_0x0008_0x00=0 +hwmon_temp.src_0x0008_0x00=file +hwmon_temp.frmt_0x0008_0x00=buf +hwmon_temp.fpath_0x0008_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x00=0 +hwmon_temp.len_0x0008_0x00=8 +hwmon_temp.bit_offset_0x0008_0x00= +hwmon_temp.str_cons_0x0008_0x00=temp8_input + +# sensor temp8 alias +hwmon_temp.mode_0x0008_0x01=config +hwmon_temp.int_cons_0x0008_0x01= +hwmon_temp.src_0x0008_0x01=file +hwmon_temp.frmt_0x0008_0x01=buf +hwmon_temp.fpath_0x0008_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x01=0 +hwmon_temp.len_0x0008_0x01=16 +hwmon_temp.bit_offset_0x0008_0x01= +hwmon_temp.str_cons_0x0008_0x01=temp8_label + +hwmon_temp.mode_0x0008_0x02=str_constant +hwmon_temp.str_cons_0x0008_0x02=cpu + +# sensor temp8 max +hwmon_temp.mode_0x0008_0x03=config +hwmon_temp.int_cons_0x0008_0x03=0 +hwmon_temp.src_0x0008_0x03=file +hwmon_temp.frmt_0x0008_0x03=buf +hwmon_temp.fpath_0x0008_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x03=0 +hwmon_temp.len_0x0008_0x03=8 +hwmon_temp.bit_offset_0x0008_0x03= +hwmon_temp.str_cons_0x0008_0x03=temp8_max +# sensor temp8 min +hwmon_temp.mode_0x0008_0x05=str_constant +hwmon_temp.str_cons_0x0008_0x05=-30000 + +# sensor temp9 input +hwmon_temp.mode_0x0009_0x00=config +hwmon_temp.int_cons_0x0009_0x00=0 +hwmon_temp.src_0x0009_0x00=file +hwmon_temp.frmt_0x0009_0x00=buf +hwmon_temp.fpath_0x0009_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x00=0 +hwmon_temp.len_0x0009_0x00=8 +hwmon_temp.bit_offset_0x0009_0x00= +hwmon_temp.str_cons_0x0009_0x00=temp9_input + +# sensor temp9 alias +hwmon_temp.mode_0x0009_0x01=config +hwmon_temp.int_cons_0x0009_0x01= +hwmon_temp.src_0x0009_0x01=file +hwmon_temp.frmt_0x0009_0x01=buf +hwmon_temp.fpath_0x0009_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x01=0 +hwmon_temp.len_0x0009_0x01=16 +hwmon_temp.bit_offset_0x0009_0x01= +hwmon_temp.str_cons_0x0009_0x01=temp9_label + +hwmon_temp.mode_0x0009_0x02=str_constant +hwmon_temp.str_cons_0x0009_0x02=cpu + +# sensor temp9 max +hwmon_temp.mode_0x0009_0x03=config +hwmon_temp.int_cons_0x0009_0x03=0 +hwmon_temp.src_0x0009_0x03=file +hwmon_temp.frmt_0x0009_0x03=buf +hwmon_temp.fpath_0x0009_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x03=0 +hwmon_temp.len_0x0009_0x03=8 +hwmon_temp.bit_offset_0x0009_0x03= +hwmon_temp.str_cons_0x0009_0x03=temp9_max +# sensor temp9 min +hwmon_temp.mode_0x0009_0x05=str_constant +hwmon_temp.str_cons_0x0009_0x05=-30000 + +# sensor temp10 input +hwmon_temp.mode_0x000a_0x00=config +hwmon_temp.int_cons_0x000a_0x00=0 +hwmon_temp.src_0x000a_0x00=file +hwmon_temp.frmt_0x000a_0x00=buf +hwmon_temp.fpath_0x000a_0x00=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x00=0 +hwmon_temp.len_0x000a_0x00=8 +hwmon_temp.bit_offset_0x000a_0x00= +hwmon_temp.str_cons_0x000a_0x00=temp1_input + +hwmon_temp.mode_0x000a_0x01=str_constant +hwmon_temp.str_cons_0x000a_0x01=MGMT_INLET_TEMP_01 + +hwmon_temp.mode_0x000a_0x02=str_constant +hwmon_temp.str_cons_0x000a_0x02=lm75 + +# sensor temp10 max +hwmon_temp.mode_0x000a_0x03=config +hwmon_temp.int_cons_0x000a_0x03=0 +hwmon_temp.src_0x000a_0x03=file +hwmon_temp.frmt_0x000a_0x03=buf +hwmon_temp.fpath_0x000a_0x03=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x03=0 +hwmon_temp.len_0x000a_0x03=8 +hwmon_temp.bit_offset_0x000a_0x03= +hwmon_temp.str_cons_0x000a_0x03=temp1_max + +hwmon_temp.mode_0x000a_0x04=config +hwmon_temp.int_cons_0x000a_0x04=0 +hwmon_temp.src_0x000a_0x04=file +hwmon_temp.frmt_0x000a_0x04=buf +hwmon_temp.fpath_0x000a_0x04=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x04=0 +hwmon_temp.len_0x000a_0x04=8 +hwmon_temp.bit_offset_0x000a_0x04= +hwmon_temp.str_cons_0x000a_0x04=temp1_max_hyst +# sensor temp10 min +hwmon_temp.mode_0x000a_0x05=str_constant +hwmon_temp.str_cons_0x000a_0x05=-30000 + +hwmon_temp.mode_0x000b_0x00=config +hwmon_temp.int_cons_0x000b_0x00=0 +hwmon_temp.src_0x000b_0x00=file +hwmon_temp.frmt_0x000b_0x00=buf +hwmon_temp.fpath_0x000b_0x00=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x00=0 +hwmon_temp.len_0x000b_0x00=8 +hwmon_temp.bit_offset_0x000b_0x00= +hwmon_temp.str_cons_0x000b_0x00=temp1_input + +hwmon_temp.mode_0x000b_0x01=str_constant +hwmon_temp.str_cons_0x000b_0x01=FCB_TEMP_02 + +hwmon_temp.mode_0x000b_0x02=str_constant +hwmon_temp.str_cons_0x000b_0x02=lm75 + +hwmon_temp.mode_0x000b_0x03=config +hwmon_temp.int_cons_0x000b_0x03=0 +hwmon_temp.src_0x000b_0x03=file +hwmon_temp.frmt_0x000b_0x03=buf +hwmon_temp.fpath_0x000b_0x03=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x03=0 +hwmon_temp.len_0x000b_0x03=8 +hwmon_temp.bit_offset_0x000b_0x03= +hwmon_temp.str_cons_0x000b_0x03=temp1_max + +hwmon_temp.mode_0x000b_0x04=config +hwmon_temp.int_cons_0x000b_0x04=0 +hwmon_temp.src_0x000b_0x04=file +hwmon_temp.frmt_0x000b_0x04=buf +hwmon_temp.fpath_0x000b_0x04=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x04=0 +hwmon_temp.len_0x000b_0x04=8 +hwmon_temp.bit_offset_0x000b_0x04= +hwmon_temp.str_cons_0x000b_0x04=temp1_max_hyst +# sensor temp11 min +hwmon_temp.mode_0x000b_0x05=str_constant +hwmon_temp.str_cons_0x000b_0x05=-30000 + +hwmon_temp.mode_0x000c_0x00=config +hwmon_temp.int_cons_0x000c_0x00=0 +hwmon_temp.src_0x000c_0x00=file +hwmon_temp.frmt_0x000c_0x00=buf +hwmon_temp.fpath_0x000c_0x00=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x00=0 +hwmon_temp.len_0x000c_0x00=8 +hwmon_temp.bit_offset_0x000c_0x00= +hwmon_temp.str_cons_0x000c_0x00=temp1_input + +hwmon_temp.mode_0x000c_0x01=str_constant +hwmon_temp.str_cons_0x000c_0x01=FCB_TEMP_03 + +hwmon_temp.mode_0x000c_0x02=str_constant +hwmon_temp.str_cons_0x000c_0x02=lm75 + +hwmon_temp.mode_0x000c_0x03=config +hwmon_temp.int_cons_0x000c_0x03=0 +hwmon_temp.src_0x000c_0x03=file +hwmon_temp.frmt_0x000c_0x03=buf +hwmon_temp.fpath_0x000c_0x03=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x03=0 +hwmon_temp.len_0x000c_0x03=8 +hwmon_temp.bit_offset_0x000c_0x03= +hwmon_temp.str_cons_0x000c_0x03=temp1_max + +hwmon_temp.mode_0x000c_0x04=config +hwmon_temp.int_cons_0x000c_0x04=0 +hwmon_temp.src_0x000c_0x04=file +hwmon_temp.frmt_0x000c_0x04=buf +hwmon_temp.fpath_0x000c_0x04=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x04=0 +hwmon_temp.len_0x000c_0x04=8 +hwmon_temp.bit_offset_0x000c_0x04= +hwmon_temp.str_cons_0x000c_0x04=temp1_max_hyst +# sensor temp12 min +hwmon_temp.mode_0x000c_0x05=str_constant +hwmon_temp.str_cons_0x000c_0x05=-30000 + +#temp13 MAC_Tboard_TEMP_05 +hwmon_temp.mode_0x000d_0x00=config +hwmon_temp.int_cons_0x000d_0x00=0 +hwmon_temp.src_0x000d_0x00=file +hwmon_temp.frmt_0x000d_0x00=buf +hwmon_temp.fpath_0x000d_0x00=/sys/bus/i2c/devices/77-004c/hwmon/ +hwmon_temp.addr_0x000d_0x00=0 +hwmon_temp.len_0x000d_0x00=8 +hwmon_temp.bit_offset_0x000d_0x00= +hwmon_temp.str_cons_0x000d_0x00=temp1_input + +hwmon_temp.mode_0x000d_0x01=str_constant +hwmon_temp.str_cons_0x000d_0x01=MAC_Tboard_TEMP_05 + +hwmon_temp.mode_0x000d_0x02=str_constant +hwmon_temp.str_cons_0x000d_0x02=ct7318 + +# sensor temp13 min +hwmon_temp.mode_0x000d_0x05=str_constant +hwmon_temp.str_cons_0x000d_0x05=-30000 + +# sensor temp13 max +hwmon_temp.mode_0x000d_0x03=str_constant +hwmon_temp.str_cons_0x000d_0x03=105000 + +#temp14 MAC_Tboard_TEMP_06 +hwmon_temp.mode_0x000e_0x00=config +hwmon_temp.int_cons_0x000e_0x00=0 +hwmon_temp.src_0x000e_0x00=file +hwmon_temp.frmt_0x000e_0x00=buf +hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/78-004c/hwmon/ +hwmon_temp.addr_0x000e_0x00=0 +hwmon_temp.len_0x000e_0x00=8 +hwmon_temp.bit_offset_0x000e_0x00= +hwmon_temp.str_cons_0x000e_0x00=temp1_input + +hwmon_temp.mode_0x000e_0x01=str_constant +hwmon_temp.str_cons_0x000e_0x01=MAC_Tboard_TEMP_06 + +hwmon_temp.mode_0x000e_0x02=str_constant +hwmon_temp.str_cons_0x000e_0x02=ct7318 + +# sensor temp14 min +hwmon_temp.mode_0x000e_0x05=str_constant +hwmon_temp.str_cons_0x000e_0x05=-30000 + +# sensor temp14 ax +hwmon_temp.mode_0x000e_0x03=str_constant +hwmon_temp.str_cons_0x000e_0x03=105000 + +#temp15 MAC_Tboard_TEMP_07 +hwmon_temp.mode_0x000f_0x00=config +hwmon_temp.int_cons_0x000f_0x00=0 +hwmon_temp.src_0x000f_0x00=file +hwmon_temp.frmt_0x000f_0x00=buf +hwmon_temp.fpath_0x000f_0x00=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x00=0 +hwmon_temp.len_0x000f_0x00=8 +hwmon_temp.bit_offset_0x000f_0x00= +hwmon_temp.str_cons_0x000f_0x00=temp1_input + +hwmon_temp.mode_0x000f_0x01=str_constant +hwmon_temp.str_cons_0x000f_0x01=MAC_Tboard_TEMP_07 + +hwmon_temp.mode_0x000f_0x02=str_constant +hwmon_temp.str_cons_0x000f_0x02=lm75 + +hwmon_temp.mode_0x000f_0x03=config +hwmon_temp.int_cons_0x000f_0x03=0 +hwmon_temp.src_0x000f_0x03=file +hwmon_temp.frmt_0x000f_0x03=buf +hwmon_temp.fpath_0x000f_0x03=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x03=0 +hwmon_temp.len_0x000f_0x03=8 +hwmon_temp.bit_offset_0x000f_0x03= +hwmon_temp.str_cons_0x000f_0x03=temp1_max + +hwmon_temp.mode_0x000f_0x04=config +hwmon_temp.int_cons_0x000f_0x04=0 +hwmon_temp.src_0x000f_0x04=file +hwmon_temp.frmt_0x000f_0x04=buf +hwmon_temp.fpath_0x000f_0x04=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x04=0 +hwmon_temp.len_0x000f_0x04=8 +hwmon_temp.bit_offset_0x000f_0x04= +hwmon_temp.str_cons_0x000f_0x04=temp1_max_hyst +# sensor temp15 min +hwmon_temp.mode_0x000f_0x05=str_constant +hwmon_temp.str_cons_0x000f_0x05=-30000 + +# temp16 mac_temp_min +hwmon_temp.mode_0x0010_0x00=config +hwmon_temp.src_0x0010_0x00=cpld +hwmon_temp.addr_0x0010_0x00=0x00020080 +hwmon_temp.frmt_0x0010_0x00=num_bytes +hwmon_temp.len_0x00010_0x00=2 +hwmon_temp.pola_0x0010_0x00=positive +hwmon_temp.str_cons_0x0010_0x00=temp0_input +hwmon_temp.int_extra1_0x0010_0x00=4 + +hwmon_temp.mode_0x0010_0x01=str_constant +hwmon_temp.str_cons_0x0010_0x01=MAC_TEMP_MIN + +hwmon_temp.mode_0x0010_0x02=str_constant +hwmon_temp.str_cons_0x0010_0x02=CPLD + +hwmon_temp.mode_0x0010_0x03=constant +hwmon_temp.int_cons_0x0010_0x03=105000 + +hwmon_temp.mode_0x0010_0x05=constant +hwmon_temp.int_cons_0x0010_0x05=-30000 + +#temp17 mac_temp_max +hwmon_temp.mode_0x0011_0x00=config +hwmon_temp.src_0x0011_0x00=cpld +hwmon_temp.addr_0x0011_0x00=0x00020082 +hwmon_temp.frmt_0x0011_0x00=num_bytes +hwmon_temp.len_0x0011_0x00=2 +hwmon_temp.pola_0x0011_0x00=positive +hwmon_temp.str_cons_0x0011_0x00=temp1_input +hwmon_temp.int_extra1_0x0011_0x00=4 + +hwmon_temp.mode_0x0011_0x01=str_constant +hwmon_temp.str_cons_0x0011_0x01=MAC_TEMP_MAX + +hwmon_temp.mode_0x0011_0x02=str_constant +hwmon_temp.str_cons_0x0011_0x02=CPLD + +hwmon_temp.mode_0x0011_0x03=constant +hwmon_temp.int_cons_0x0011_0x03=105000 + +hwmon_temp.mode_0x0011_0x05=constant +hwmon_temp.int_cons_0x0011_0x05=-30000 + +#temp18 TMOS_CORE_TEMP_01 +hwmon_temp.mode_0x0012_0x00=config +hwmon_temp.int_cons_0x0012_0x00=0 +hwmon_temp.src_0x0012_0x00=file +hwmon_temp.frmt_0x0012_0x00=buf +hwmon_temp.fpath_0x0012_0x00=/sys/bus/i2c/devices/84-0040/hwmon/ +hwmon_temp.addr_0x0012_0x00=0 +hwmon_temp.len_0x0012_0x00=8 +hwmon_temp.bit_offset_0x0012_0x00= +hwmon_temp.str_cons_0x0012_0x00=temp1_input + +hwmon_temp.mode_0x0012_0x01=str_constant +hwmon_temp.str_cons_0x0012_0x01=TMOS_CORE_TEMP_01 + +hwmon_temp.mode_0x0012_0x02=str_constant +hwmon_temp.str_cons_0x0012_0x02=xdpe132g5c + +hwmon_temp.mode_0x0012_0x03=str_constant +hwmon_temp.str_cons_0x0012_0x03=125000 + +# sensor temp18 min +hwmon_temp.mode_0x0012_0x05=str_constant +hwmon_temp.str_cons_0x0012_0x05=-30000 + +#temp19 TMOS_ANALOG0_TEMP +hwmon_temp.mode_0x0013_0x00=config +hwmon_temp.int_cons_0x0013_0x00=0 +hwmon_temp.src_0x0013_0x00=file +hwmon_temp.frmt_0x0013_0x00=buf +hwmon_temp.fpath_0x0013_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_temp.addr_0x0013_0x00=0 +hwmon_temp.len_0x0013_0x00=8 +hwmon_temp.bit_offset_0x0013_0x00= +hwmon_temp.str_cons_0x0013_0x00=temp1_input + +hwmon_temp.mode_0x0013_0x01=str_constant +hwmon_temp.str_cons_0x0013_0x01=TMOS_ANALOG0_TEMP + +hwmon_temp.mode_0x0013_0x02=str_constant +hwmon_temp.str_cons_0x0013_0x02=xdpe132g5c + +hwmon_temp.mode_0x0013_0x03=str_constant +hwmon_temp.str_cons_0x0013_0x03=125000 + +# sensor temp19 min +hwmon_temp.mode_0x0013_0x05=str_constant +hwmon_temp.str_cons_0x0013_0x05=-30000 + +#temp20 TMOS_ANALOG1_TEMP +hwmon_temp.mode_0x0014_0x00=config +hwmon_temp.int_cons_0x0014_0x00=0 +hwmon_temp.src_0x0014_0x00=file +hwmon_temp.frmt_0x0014_0x00=buf +hwmon_temp.fpath_0x0014_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_temp.addr_0x0014_0x00=0 +hwmon_temp.len_0x0014_0x00=8 +hwmon_temp.bit_offset_0x0014_0x00= +hwmon_temp.str_cons_0x0014_0x00=temp1_input + +hwmon_temp.mode_0x0014_0x01=str_constant +hwmon_temp.str_cons_0x0014_0x01=TMOS_ANALOG1_TEMP + +hwmon_temp.mode_0x0014_0x02=str_constant +hwmon_temp.str_cons_0x0014_0x02=xdpe132g5c + +hwmon_temp.mode_0x0014_0x03=str_constant +hwmon_temp.str_cons_0x0014_0x03=125000 + +# sensor temp20 min +hwmon_temp.mode_0x0014_0x05=str_constant +hwmon_temp.str_cons_0x0014_0x05=-30000 + +# sensor vol +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# vol1 +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=file +hwmon_in.frmt_0x0001_0x00=buf +hwmon_in.fpath_0x0001_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0001_0x00=0 +hwmon_in.len_0x0001_0x00=8 +hwmon_in.bit_offset_0x0001_0x00= +hwmon_in.str_cons_0x0001_0x00=in1_input +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=VDD12V_BASE +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=ucd90160 +hwmon_in.mode_0x0001_0x03=constant +hwmon_in.int_cons_0x0001_0x03=13200 +hwmon_in.mode_0x0001_0x05=constant +hwmon_in.int_cons_0x0001_0x05=10800 +hwmon_in.mode_0x0001_0x08=constant +hwmon_in.int_cons_0x0001_0x08=12000 +hwmon_in.mode_0x0001_0x07=constant +hwmon_in.int_cons_0x0001_0x07=60 + +# vol2 +hwmon_in.mode_0x0002_0x00=config +hwmon_in.int_cons_0x0002_0x00=0 +hwmon_in.src_0x0002_0x00=file +hwmon_in.frmt_0x0002_0x00=buf +hwmon_in.fpath_0x0002_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0002_0x00=0 +hwmon_in.len_0x0002_0x00=8 +hwmon_in.bit_offset_0x0002_0x00= +hwmon_in.str_cons_0x0002_0x00=in2_input +hwmon_in.mode_0x0002_0x01=str_constant +hwmon_in.str_cons_0x0002_0x01=VDD3.3_STBY +hwmon_in.mode_0x0002_0x02=str_constant +hwmon_in.str_cons_0x0002_0x02=ucd90160 +hwmon_in.mode_0x0002_0x03=constant +hwmon_in.int_cons_0x0002_0x03=3630 +hwmon_in.mode_0x0002_0x05=constant +hwmon_in.int_cons_0x0002_0x05=2970 +hwmon_in.mode_0x0002_0x08=constant +hwmon_in.int_cons_0x0002_0x08=3300 +hwmon_in.mode_0x0002_0x07=constant +hwmon_in.int_cons_0x0002_0x07=16 + +# vol3 +hwmon_in.mode_0x0003_0x00=config +hwmon_in.int_cons_0x0003_0x00=0 +hwmon_in.src_0x0003_0x00=file +hwmon_in.frmt_0x0003_0x00=buf +hwmon_in.fpath_0x0003_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0003_0x00=0 +hwmon_in.len_0x0003_0x00=8 +hwmon_in.bit_offset_0x0003_0x00= +hwmon_in.str_cons_0x0003_0x00=in3_input +hwmon_in.mode_0x0003_0x01=str_constant +hwmon_in.str_cons_0x0003_0x01=VDD5V_USB +hwmon_in.mode_0x0003_0x02=str_constant +hwmon_in.str_cons_0x0003_0x02=ucd90160 +hwmon_in.mode_0x0003_0x03=constant +hwmon_in.int_cons_0x0003_0x03=5500 +hwmon_in.mode_0x0003_0x05=constant +hwmon_in.int_cons_0x0003_0x05=4500 +hwmon_in.mode_0x0003_0x08=constant +hwmon_in.int_cons_0x0003_0x08=5000 +hwmon_in.mode_0x0003_0x07=constant +hwmon_in.int_cons_0x0003_0x07=25 + +# vol4 +hwmon_in.mode_0x0004_0x00=config +hwmon_in.int_cons_0x0004_0x00=0 +hwmon_in.src_0x0004_0x00=file +hwmon_in.frmt_0x0004_0x00=buf +hwmon_in.fpath_0x0004_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0004_0x00=0 +hwmon_in.len_0x0004_0x00=8 +hwmon_in.bit_offset_0x0004_0x00= +hwmon_in.str_cons_0x0004_0x00=in4_input +hwmon_in.mode_0x0004_0x01=str_constant +hwmon_in.str_cons_0x0004_0x01=PHY_VDD1V0 +hwmon_in.mode_0x0004_0x02=str_constant +hwmon_in.str_cons_0x0004_0x02=ucd90160 +hwmon_in.mode_0x0004_0x03=constant +hwmon_in.int_cons_0x0004_0x03=1100 +hwmon_in.mode_0x0004_0x05=constant +hwmon_in.int_cons_0x0004_0x05=900 +hwmon_in.mode_0x0004_0x08=constant +hwmon_in.int_cons_0x0004_0x08=1000 +hwmon_in.mode_0x0004_0x07=constant +hwmon_in.int_cons_0x0004_0x07=5 + +# vol5 +hwmon_in.mode_0x0005_0x00=config +hwmon_in.int_cons_0x0005_0x00=0 +hwmon_in.src_0x0005_0x00=file +hwmon_in.frmt_0x0005_0x00=buf +hwmon_in.fpath_0x0005_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0005_0x00=0 +hwmon_in.len_0x0005_0x00=8 +hwmon_in.bit_offset_0x0005_0x00= +hwmon_in.str_cons_0x0005_0x00=in5_input +hwmon_in.mode_0x0005_0x01=str_constant +hwmon_in.str_cons_0x0005_0x01=VDD3.3V_BASE +hwmon_in.mode_0x0005_0x02=str_constant +hwmon_in.str_cons_0x0005_0x02=ucd90160 +hwmon_in.mode_0x0005_0x03=constant +hwmon_in.int_cons_0x0005_0x03=3630 +hwmon_in.mode_0x0005_0x05=constant +hwmon_in.int_cons_0x0005_0x05=2970 +hwmon_in.mode_0x0005_0x08=constant +hwmon_in.int_cons_0x0005_0x08=3300 +hwmon_in.mode_0x0005_0x07=constant +hwmon_in.int_cons_0x0005_0x07=16 + +# vol6 +hwmon_in.mode_0x0006_0x00=config +hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.src_0x0006_0x00=file +hwmon_in.frmt_0x0006_0x00=buf +hwmon_in.fpath_0x0006_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0006_0x00=0 +hwmon_in.len_0x0006_0x00=8 +hwmon_in.bit_offset_0x0006_0x00= +hwmon_in.str_cons_0x0006_0x00=in6_input +hwmon_in.mode_0x0006_0x01=str_constant +hwmon_in.str_cons_0x0006_0x01=VDD3.3_CLK_BASE +hwmon_in.mode_0x0006_0x02=str_constant +hwmon_in.str_cons_0x0006_0x02=ucd90160 +hwmon_in.mode_0x0006_0x03=constant +hwmon_in.int_cons_0x0006_0x03=3630 +hwmon_in.mode_0x0006_0x05=constant +hwmon_in.int_cons_0x0006_0x05=2970 +hwmon_in.mode_0x0006_0x08=constant +hwmon_in.int_cons_0x0006_0x08=3300 +hwmon_in.mode_0x0006_0x07=constant +hwmon_in.int_cons_0x0006_0x07=16 + +# vol7 +hwmon_in.mode_0x0007_0x00=config +hwmon_in.int_cons_0x0007_0x00=0 +hwmon_in.src_0x0007_0x00=file +hwmon_in.frmt_0x0007_0x00=buf +hwmon_in.fpath_0x0007_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0007_0x00=0 +hwmon_in.len_0x0007_0x00=8 +hwmon_in.bit_offset_0x0007_0x00= +hwmon_in.str_cons_0x0007_0x00=in7_input +hwmon_in.mode_0x0007_0x01=str_constant +hwmon_in.str_cons_0x0007_0x01=BMC_VCC3.3V_OUT +hwmon_in.mode_0x0007_0x02=str_constant +hwmon_in.str_cons_0x0007_0x02=ucd90160 +hwmon_in.mode_0x0007_0x03=constant +hwmon_in.int_cons_0x0007_0x03=3630 +hwmon_in.mode_0x0007_0x05=constant +hwmon_in.int_cons_0x0007_0x05=2970 +hwmon_in.mode_0x0007_0x08=constant +hwmon_in.int_cons_0x0007_0x08=3300 +hwmon_in.mode_0x0007_0x07=constant +hwmon_in.int_cons_0x0007_0x07=16 + +# vol8 +hwmon_in.mode_0x0008_0x00=config +hwmon_in.int_cons_0x0008_0x00=0 +hwmon_in.src_0x0008_0x00=file +hwmon_in.frmt_0x0008_0x00=buf +hwmon_in.fpath_0x0008_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0008_0x00=0 +hwmon_in.len_0x0008_0x00=8 +hwmon_in.bit_offset_0x0008_0x00= +hwmon_in.str_cons_0x0008_0x00=in8_input +hwmon_in.mode_0x0008_0x01=str_constant +hwmon_in.str_cons_0x0008_0x01=SSD_VDD3.3V +hwmon_in.mode_0x0008_0x02=str_constant +hwmon_in.str_cons_0x0008_0x02=ucd90160 +hwmon_in.mode_0x0008_0x03=constant +hwmon_in.int_cons_0x0008_0x03=3630 +hwmon_in.mode_0x0008_0x05=constant +hwmon_in.int_cons_0x0008_0x05=2970 +hwmon_in.mode_0x0008_0x08=constant +hwmon_in.int_cons_0x0008_0x08=3300 +hwmon_in.mode_0x0008_0x07=constant +hwmon_in.int_cons_0x0008_0x07=16 + +# vol9 +hwmon_in.mode_0x0009_0x00=config +hwmon_in.int_cons_0x0009_0x00=0 +hwmon_in.src_0x0009_0x00=file +hwmon_in.frmt_0x0009_0x00=buf +hwmon_in.fpath_0x0009_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0009_0x00=0 +hwmon_in.len_0x0009_0x00=8 +hwmon_in.bit_offset_0x0009_0x00= +hwmon_in.str_cons_0x0009_0x00=in9_input +hwmon_in.mode_0x0009_0x01=str_constant +hwmon_in.str_cons_0x0009_0x01=VDD3V8_CLK_BASE +hwmon_in.mode_0x0009_0x02=str_constant +hwmon_in.str_cons_0x0009_0x02=ucd90160 +hwmon_in.mode_0x0009_0x03=constant +hwmon_in.int_cons_0x0009_0x03=4180 +hwmon_in.mode_0x0009_0x05=constant +hwmon_in.int_cons_0x0009_0x05=3420 +hwmon_in.mode_0x0009_0x08=constant +hwmon_in.int_cons_0x0009_0x08=3800 +hwmon_in.mode_0x0009_0x07=constant +hwmon_in.int_cons_0x0009_0x07=19 + +# vol10 +hwmon_in.mode_0x000a_0x00=config +hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.src_0x000a_0x00=file +hwmon_in.frmt_0x000a_0x00=buf +hwmon_in.fpath_0x000a_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000a_0x00=0 +hwmon_in.len_0x000a_0x00=8 +hwmon_in.bit_offset_0x000a_0x00= +hwmon_in.str_cons_0x000a_0x00=in1_input +hwmon_in.mode_0x000a_0x01=str_constant +hwmon_in.str_cons_0x000a_0x01=VDD12V_MAC1 +hwmon_in.mode_0x000a_0x02=str_constant +hwmon_in.str_cons_0x000a_0x02=ucd90160 +hwmon_in.mode_0x000a_0x03=constant +hwmon_in.int_cons_0x000a_0x03=13200 +hwmon_in.mode_0x000a_0x05=constant +hwmon_in.int_cons_0x000a_0x05=10800 +hwmon_in.mode_0x000a_0x08=constant +hwmon_in.int_cons_0x000a_0x08=12000 +hwmon_in.mode_0x000a_0x07=constant +hwmon_in.int_cons_0x000a_0x07=60 + +# vol11 +hwmon_in.mode_0x000b_0x00=config +hwmon_in.int_cons_0x000b_0x00=0 +hwmon_in.src_0x000b_0x00=file +hwmon_in.frmt_0x000b_0x00=buf +hwmon_in.fpath_0x000b_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000b_0x00=0 +hwmon_in.len_0x000b_0x00=8 +hwmon_in.bit_offset_0x000b_0x00= +hwmon_in.str_cons_0x000b_0x00=in2_input +hwmon_in.mode_0x000b_0x01=str_constant +hwmon_in.str_cons_0x000b_0x01=VDD1.8_CLK +hwmon_in.mode_0x000b_0x02=str_constant +hwmon_in.str_cons_0x000b_0x02=ucd90160 +hwmon_in.mode_0x000b_0x03=constant +hwmon_in.int_cons_0x000b_0x03=1980 +hwmon_in.mode_0x000b_0x05=constant +hwmon_in.int_cons_0x000b_0x05=1620 +hwmon_in.mode_0x000b_0x08=constant +hwmon_in.int_cons_0x000b_0x08=1800 +hwmon_in.mode_0x000b_0x07=constant +hwmon_in.int_cons_0x000b_0x07=9 + +# vol12 +hwmon_in.mode_0x000c_0x00=config +hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.src_0x000c_0x00=file +hwmon_in.frmt_0x000c_0x00=buf +hwmon_in.fpath_0x000c_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000c_0x00=0 +hwmon_in.len_0x000c_0x00=8 +hwmon_in.bit_offset_0x000c_0x00= +hwmon_in.str_cons_0x000c_0x00=in3_input +hwmon_in.mode_0x000c_0x01=str_constant +hwmon_in.str_cons_0x000c_0x01=VDD3.3_CLK_MAC +hwmon_in.mode_0x000c_0x02=str_constant +hwmon_in.str_cons_0x000c_0x02=ucd90160 +hwmon_in.mode_0x000c_0x03=constant +hwmon_in.int_cons_0x000c_0x03=3630 +hwmon_in.mode_0x000c_0x05=constant +hwmon_in.int_cons_0x000c_0x05=2970 +hwmon_in.mode_0x000c_0x08=constant +hwmon_in.int_cons_0x000c_0x08=3300 +hwmon_in.mode_0x000c_0x07=constant +hwmon_in.int_cons_0x000c_0x07=16 + +# vol13 +hwmon_in.mode_0x000d_0x00=config +hwmon_in.int_cons_0x000d_0x00=0 +hwmon_in.src_0x000d_0x00=file +hwmon_in.frmt_0x000d_0x00=buf +hwmon_in.fpath_0x000d_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000d_0x00=0 +hwmon_in.len_0x000d_0x00=8 +hwmon_in.bit_offset_0x000d_0x00= +hwmon_in.str_cons_0x000d_0x00=in4_input +hwmon_in.mode_0x000d_0x01=str_constant +hwmon_in.str_cons_0x000d_0x01=VDD1.0V_FPGA +hwmon_in.mode_0x000d_0x02=str_constant +hwmon_in.str_cons_0x000d_0x02=ucd90160 +hwmon_in.mode_0x000d_0x03=constant +hwmon_in.int_cons_0x000d_0x03=1100 +hwmon_in.mode_0x000d_0x05=constant +hwmon_in.int_cons_0x000d_0x05=900 +hwmon_in.mode_0x000d_0x08=constant +hwmon_in.int_cons_0x000d_0x08=1000 +hwmon_in.mode_0x000d_0x07=constant +hwmon_in.int_cons_0x000d_0x07=5 + +# vol14 +hwmon_in.mode_0x000e_0x00=config +hwmon_in.int_cons_0x000e_0x00=0 +hwmon_in.src_0x000e_0x00=file +hwmon_in.frmt_0x000e_0x00=buf +hwmon_in.fpath_0x000e_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000e_0x00=0 +hwmon_in.len_0x000e_0x00=8 +hwmon_in.bit_offset_0x000e_0x00= +hwmon_in.str_cons_0x000e_0x00=in5_input +hwmon_in.mode_0x000e_0x01=str_constant +hwmon_in.str_cons_0x000e_0x01=VDD1.8V_FPGA +hwmon_in.mode_0x000e_0x02=str_constant +hwmon_in.str_cons_0x000e_0x02=ucd90160 +hwmon_in.mode_0x000e_0x03=constant +hwmon_in.int_cons_0x000e_0x03=1980 +hwmon_in.mode_0x000e_0x05=constant +hwmon_in.int_cons_0x000e_0x05=1620 +hwmon_in.mode_0x000e_0x08=constant +hwmon_in.int_cons_0x000e_0x08=1800 +hwmon_in.mode_0x000e_0x07=constant +hwmon_in.int_cons_0x000e_0x07=9 + +# vol15 +hwmon_in.mode_0x000f_0x00=config +hwmon_in.int_cons_0x000f_0x00=0 +hwmon_in.src_0x000f_0x00=file +hwmon_in.frmt_0x000f_0x00=buf +hwmon_in.fpath_0x000f_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000f_0x00=0 +hwmon_in.len_0x000f_0x00=8 +hwmon_in.bit_offset_0x000f_0x00= +hwmon_in.str_cons_0x000f_0x00=in6_input +hwmon_in.mode_0x000f_0x01=str_constant +hwmon_in.str_cons_0x000f_0x01=VDD1.2V_FPGA +hwmon_in.mode_0x000f_0x02=str_constant +hwmon_in.str_cons_0x000f_0x02=ucd90160 +hwmon_in.mode_0x000f_0x03=constant +hwmon_in.int_cons_0x000f_0x03=1320 +hwmon_in.mode_0x000f_0x05=constant +hwmon_in.int_cons_0x000f_0x05=1080 +hwmon_in.mode_0x000f_0x08=constant +hwmon_in.int_cons_0x000f_0x08=1200 +hwmon_in.mode_0x000f_0x07=constant +hwmon_in.int_cons_0x000f_0x07=6 + +# vol16 +hwmon_in.mode_0x0010_0x00=config +hwmon_in.int_cons_0x0010_0x00=0 +hwmon_in.src_0x0010_0x00=file +hwmon_in.frmt_0x0010_0x00=buf +hwmon_in.fpath_0x0010_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0010_0x00=0 +hwmon_in.len_0x0010_0x00=8 +hwmon_in.bit_offset_0x0010_0x00= +hwmon_in.str_cons_0x0010_0x00=in7_input +hwmon_in.mode_0x0010_0x01=str_constant +hwmon_in.str_cons_0x0010_0x01=VDD3.3V_MAC +hwmon_in.mode_0x0010_0x02=str_constant +hwmon_in.str_cons_0x0010_0x02=ucd90160 +hwmon_in.mode_0x0010_0x03=constant +hwmon_in.int_cons_0x0010_0x03=3630 +hwmon_in.mode_0x0010_0x05=constant +hwmon_in.int_cons_0x0010_0x05=2970 +hwmon_in.mode_0x0010_0x08=constant +hwmon_in.int_cons_0x0010_0x08=3300 +hwmon_in.mode_0x0010_0x07=constant +hwmon_in.int_cons_0x0010_0x07=16 + +# vol17 +hwmon_in.mode_0x0011_0x00=config +hwmon_in.int_cons_0x0011_0x00=0 +hwmon_in.src_0x0011_0x00=file +hwmon_in.frmt_0x0011_0x00=buf +hwmon_in.fpath_0x0011_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0011_0x00=0 +hwmon_in.len_0x0011_0x00=8 +hwmon_in.bit_offset_0x0011_0x00= +hwmon_in.str_cons_0x0011_0x00=in8_input +hwmon_in.mode_0x0011_0x01=str_constant +hwmon_in.str_cons_0x0011_0x01=VDDO1.2V +hwmon_in.mode_0x0011_0x02=str_constant +hwmon_in.str_cons_0x0011_0x02=ucd90160 +hwmon_in.mode_0x0011_0x03=constant +hwmon_in.int_cons_0x0011_0x03=1320 +hwmon_in.mode_0x0011_0x05=constant +hwmon_in.int_cons_0x0011_0x05=1080 +hwmon_in.mode_0x0011_0x08=constant +hwmon_in.int_cons_0x0011_0x08=1200 +hwmon_in.mode_0x0011_0x07=constant +hwmon_in.int_cons_0x0011_0x07=6 + +# vol18 +hwmon_in.mode_0x0012_0x00=config +hwmon_in.int_cons_0x0012_0x00=0 +hwmon_in.src_0x0012_0x00=file +hwmon_in.frmt_0x0012_0x00=buf +hwmon_in.fpath_0x0012_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0012_0x00=0 +hwmon_in.len_0x0012_0x00=8 +hwmon_in.bit_offset_0x0012_0x00= +hwmon_in.str_cons_0x0012_0x00=in9_input +hwmon_in.mode_0x0012_0x01=str_constant +hwmon_in.str_cons_0x0012_0x01=VDDO1.8V +hwmon_in.mode_0x0012_0x02=str_constant +hwmon_in.str_cons_0x0012_0x02=ucd90160 +hwmon_in.mode_0x0012_0x03=constant +hwmon_in.int_cons_0x0012_0x03=1980 +hwmon_in.mode_0x0012_0x05=constant +hwmon_in.int_cons_0x0012_0x05=1620 +hwmon_in.mode_0x0012_0x08=constant +hwmon_in.int_cons_0x0012_0x08=1800 +hwmon_in.mode_0x0012_0x07=constant +hwmon_in.int_cons_0x0012_0x07=9 + +# vol19 +hwmon_in.mode_0x0013_0x00=config +hwmon_in.int_cons_0x0013_0x00=0 +hwmon_in.src_0x0013_0x00=file +hwmon_in.frmt_0x0013_0x00=buf +hwmon_in.fpath_0x0013_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0013_0x00=0 +hwmon_in.len_0x0013_0x00=8 +hwmon_in.bit_offset_0x0013_0x00= +hwmon_in.str_cons_0x0013_0x00=in10_input +hwmon_in.mode_0x0013_0x01=str_constant +hwmon_in.str_cons_0x0013_0x01=VDD_CORE +hwmon_in.mode_0x0013_0x02=str_constant +hwmon_in.str_cons_0x0013_0x02=ucd90160 +hwmon_in.mode_0x0013_0x03=constant +hwmon_in.int_cons_0x0013_0x03=900 +hwmon_in.mode_0x0013_0x05=constant +hwmon_in.int_cons_0x0013_0x05=630 +hwmon_in.mode_0x0013_0x08=constant +hwmon_in.int_cons_0x0013_0x08=800 +hwmon_in.mode_0x0013_0x07=constant +hwmon_in.int_cons_0x0013_0x07=4 + +# vol20 +hwmon_in.mode_0x0014_0x00=config +hwmon_in.int_cons_0x0014_0x00=0 +hwmon_in.src_0x0014_0x00=file +hwmon_in.frmt_0x0014_0x00=buf +hwmon_in.fpath_0x0014_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0014_0x00=0 +hwmon_in.len_0x0014_0x00=8 +hwmon_in.bit_offset_0x0014_0x00= +hwmon_in.str_cons_0x0014_0x00=in11_input +hwmon_in.mode_0x0014_0x01=str_constant +hwmon_in.str_cons_0x0014_0x01=VDDA1.5V +hwmon_in.mode_0x0014_0x02=str_constant +hwmon_in.str_cons_0x0014_0x02=ucd90160 +hwmon_in.mode_0x0014_0x03=constant +hwmon_in.int_cons_0x0014_0x03=1650 +hwmon_in.mode_0x0014_0x05=constant +hwmon_in.int_cons_0x0014_0x05=1350 +hwmon_in.mode_0x0014_0x08=constant +hwmon_in.int_cons_0x0014_0x08=1500 +hwmon_in.mode_0x0014_0x07=constant +hwmon_in.int_cons_0x0014_0x07=7 + +# vol21 +hwmon_in.mode_0x0015_0x00=config +hwmon_in.int_cons_0x0015_0x00=0 +hwmon_in.src_0x0015_0x00=file +hwmon_in.frmt_0x0015_0x00=buf +hwmon_in.fpath_0x0015_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0015_0x00=0 +hwmon_in.len_0x0015_0x00=8 +hwmon_in.bit_offset_0x0015_0x00=0 +hwmon_in.str_cons_0x0015_0x00=in12_input +hwmon_in.mode_0x0015_0x01=str_constant +hwmon_in.str_cons_0x0015_0x01=VDD0_9V_ANLG0 +hwmon_in.mode_0x0015_0x02=str_constant +hwmon_in.str_cons_0x0015_0x02=ucd90160 +hwmon_in.mode_0x0015_0x03=constant +hwmon_in.int_cons_0x0015_0x03=990 +hwmon_in.mode_0x0015_0x05=constant +hwmon_in.int_cons_0x0015_0x05=810 +hwmon_in.mode_0x0015_0x08=constant +hwmon_in.int_cons_0x0015_0x08=900 +hwmon_in.mode_0x0015_0x07=constant +hwmon_in.int_cons_0x0015_0x07=4 + + +# vol22 +hwmon_in.mode_0x0016_0x00=config +hwmon_in.int_cons_0x0016_0x00=0 +hwmon_in.src_0x0016_0x00=file +hwmon_in.frmt_0x0016_0x00=buf +hwmon_in.fpath_0x0016_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0016_0x00=0 +hwmon_in.len_0x0016_0x00=8 +hwmon_in.bit_offset_0x0016_0x00=0 +hwmon_in.str_cons_0x0016_0x00=in13_input +hwmon_in.mode_0x0016_0x01=str_constant +hwmon_in.str_cons_0x0016_0x01=VDD0_9V_ANLG1 +hwmon_in.mode_0x0016_0x02=str_constant +hwmon_in.str_cons_0x0016_0x02=ucd90160 +hwmon_in.mode_0x0016_0x03=constant +hwmon_in.int_cons_0x0016_0x03=990 +hwmon_in.mode_0x0016_0x05=constant +hwmon_in.int_cons_0x0016_0x05=810 +hwmon_in.mode_0x0016_0x08=constant +hwmon_in.int_cons_0x0016_0x08=900 +hwmon_in.mode_0x0016_0x07=constant +hwmon_in.int_cons_0x0016_0x07=4 + + +# vol23 +hwmon_in.mode_0x0017_0x00=config +hwmon_in.int_cons_0x0017_0x00=0 +hwmon_in.src_0x0017_0x00=file +hwmon_in.frmt_0x0017_0x00=buf +hwmon_in.fpath_0x0017_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0017_0x00=0 +hwmon_in.len_0x0017_0x00=8 +hwmon_in.bit_offset_0x0017_0x00= +hwmon_in.str_cons_0x0017_0x00=in14_input +hwmon_in.mode_0x0017_0x01=str_constant +hwmon_in.str_cons_0x0017_0x01=VDD0_75V_ANLG0 +hwmon_in.mode_0x0017_0x02=str_constant +hwmon_in.str_cons_0x0017_0x02=ucd90160 +hwmon_in.mode_0x0017_0x03=constant +hwmon_in.int_cons_0x0017_0x03=825 +hwmon_in.mode_0x0017_0x05=constant +hwmon_in.int_cons_0x0017_0x05=675 +hwmon_in.mode_0x0017_0x08=constant +hwmon_in.int_cons_0x0017_0x08=750 +hwmon_in.mode_0x0017_0x07=constant +hwmon_in.int_cons_0x0017_0x07=3 + +# vol24 +hwmon_in.mode_0x0018_0x00=config +hwmon_in.int_cons_0x0018_0x00=0 +hwmon_in.src_0x0018_0x00=file +hwmon_in.frmt_0x0018_0x00=buf +hwmon_in.fpath_0x0018_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0018_0x00=0 +hwmon_in.len_0x0018_0x00=8 +hwmon_in.bit_offset_0x0018_0x00= +hwmon_in.str_cons_0x0018_0x00=in15_input +hwmon_in.mode_0x0018_0x01=str_constant +hwmon_in.str_cons_0x0018_0x01=VDD0_75V_ANLG1 +hwmon_in.mode_0x0018_0x02=str_constant +hwmon_in.str_cons_0x0018_0x02=ucd90160 +hwmon_in.mode_0x0018_0x03=constant +hwmon_in.int_cons_0x0018_0x03=825 +hwmon_in.mode_0x0018_0x05=constant +hwmon_in.int_cons_0x0018_0x05=675 +hwmon_in.mode_0x0018_0x08=constant +hwmon_in.int_cons_0x0018_0x08=750 +hwmon_in.mode_0x0018_0x07=constant +hwmon_in.int_cons_0x0018_0x07=3 + +# vol25 +hwmon_in.mode_0x0019_0x00=config +hwmon_in.int_cons_0x0019_0x00=0 +hwmon_in.src_0x0019_0x00=file +hwmon_in.frmt_0x0019_0x00=buf +hwmon_in.fpath_0x0019_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0019_0x00=0 +hwmon_in.len_0x0019_0x00=8 +hwmon_in.bit_offset_0x0019_0x00= +hwmon_in.str_cons_0x0019_0x00=in16_input +hwmon_in.mode_0x0019_0x01=str_constant +hwmon_in.str_cons_0x0019_0x01=VDD0.8V +hwmon_in.mode_0x0019_0x02=str_constant +hwmon_in.str_cons_0x0019_0x02=ucd90160 +hwmon_in.mode_0x0019_0x03=constant +hwmon_in.int_cons_0x0019_0x03=880 +hwmon_in.mode_0x0019_0x05=constant +hwmon_in.int_cons_0x0019_0x05=720 +hwmon_in.mode_0x0019_0x08=constant +hwmon_in.int_cons_0x0019_0x08=750 +hwmon_in.mode_0x0019_0x07=constant +hwmon_in.int_cons_0x0019_0x07=3 + +# vol26 +hwmon_in.mode_0x001a_0x00=config +hwmon_in.int_cons_0x001a_0x00=0 +hwmon_in.src_0x001a_0x00=file +hwmon_in.frmt_0x001a_0x00=buf +hwmon_in.fpath_0x001a_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001a_0x00=0 +hwmon_in.len_0x001a_0x00=8 +hwmon_in.bit_offset_0x001a_0x00= +hwmon_in.str_cons_0x001a_0x00=in1_input +hwmon_in.mode_0x001a_0x01=str_constant +hwmon_in.str_cons_0x001a_0x01=VDD12V_MAC2 +hwmon_in.mode_0x001a_0x02=str_constant +hwmon_in.str_cons_0x001a_0x02=ucd90160 +hwmon_in.mode_0x001a_0x03=constant +hwmon_in.int_cons_0x001a_0x03=13200 +hwmon_in.mode_0x001a_0x05=constant +hwmon_in.int_cons_0x001a_0x05=10800 +hwmon_in.mode_0x001a_0x08=constant +hwmon_in.int_cons_0x001a_0x08=12000 +hwmon_in.mode_0x001a_0x07=constant +hwmon_in.int_cons_0x001a_0x07=60 + +# vol27 +hwmon_in.mode_0x001b_0x00=config +hwmon_in.int_cons_0x001b_0x00=0 +hwmon_in.src_0x001b_0x00=file +hwmon_in.frmt_0x001b_0x00=buf +hwmon_in.fpath_0x001b_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001b_0x00=0 +hwmon_in.len_0x001b_0x00=8 +hwmon_in.bit_offset_0x001b_0x00= +hwmon_in.str_cons_0x001b_0x00=in2_input +hwmon_in.mode_0x001b_0x01=str_constant +hwmon_in.str_cons_0x001b_0x01=VDD3.3V_STANDBY +hwmon_in.mode_0x001b_0x02=str_constant +hwmon_in.str_cons_0x001b_0x02=ucd90160 +hwmon_in.mode_0x001b_0x03=constant +hwmon_in.int_cons_0x001b_0x03=3630 +hwmon_in.mode_0x001b_0x05=constant +hwmon_in.int_cons_0x001b_0x05=2970 +hwmon_in.mode_0x001b_0x08=constant +hwmon_in.int_cons_0x001b_0x08=3300 +hwmon_in.mode_0x001b_0x07=constant +hwmon_in.int_cons_0x001b_0x07=16 + +# vol28 +hwmon_in.mode_0x001c_0x00=config +hwmon_in.int_cons_0x001c_0x00=0 +hwmon_in.src_0x001c_0x00=file +hwmon_in.frmt_0x001c_0x00=buf +hwmon_in.fpath_0x001c_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001c_0x00=0 +hwmon_in.len_0x001c_0x00=8 +hwmon_in.bit_offset_0x001c_0x00=0 +hwmon_in.str_cons_0x001c_0x00=in3_input +hwmon_in.mode_0x001c_0x01=str_constant +hwmon_in.str_cons_0x001c_0x01=VDD3V8_CLK +hwmon_in.mode_0x001c_0x02=str_constant +hwmon_in.str_cons_0x001c_0x02=ucd90160 +hwmon_in.mode_0x001c_0x03=constant +hwmon_in.int_cons_0x001c_0x03=4180 +hwmon_in.mode_0x001c_0x05=constant +hwmon_in.int_cons_0x001c_0x05=3420 +hwmon_in.mode_0x001c_0x08=constant +hwmon_in.int_cons_0x001c_0x08=3800 +hwmon_in.mode_0x001c_0x07=constant +hwmon_in.int_cons_0x001c_0x07=19 + +# vol29 +hwmon_in.mode_0x001d_0x00=config +hwmon_in.int_cons_0x001d_0x00=0 +hwmon_in.src_0x001d_0x00=file +hwmon_in.frmt_0x001d_0x00=buf +hwmon_in.fpath_0x001d_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001d_0x00=0 +hwmon_in.len_0x001d_0x00=8 +hwmon_in.bit_offset_0x001d_0x00=0 +hwmon_in.str_cons_0x001d_0x00=in4_input +hwmon_in.mode_0x001d_0x01=str_constant +hwmon_in.str_cons_0x001d_0x01=VDD5V_VR +hwmon_in.mode_0x001d_0x02=str_constant +hwmon_in.str_cons_0x001d_0x02=ucd90160 +hwmon_in.mode_0x001d_0x03=constant +hwmon_in.int_cons_0x001d_0x03=5500 +hwmon_in.mode_0x001d_0x05=constant +hwmon_in.int_cons_0x001d_0x05=4500 +hwmon_in.mode_0x001d_0x08=constant +hwmon_in.int_cons_0x001d_0x08=5000 +hwmon_in.mode_0x001d_0x07=constant +hwmon_in.int_cons_0x001d_0x07=25 + +# vol30 +hwmon_in.mode_0x001e_0x00=config +hwmon_in.int_cons_0x001e_0x00=0 +hwmon_in.src_0x001e_0x00=file +hwmon_in.frmt_0x001e_0x00=buf +hwmon_in.fpath_0x001e_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001e_0x00=0 +hwmon_in.len_0x001e_0x00=8 +hwmon_in.bit_offset_0x001e_0x00=0 +hwmon_in.str_cons_0x001e_0x00=in5_input +hwmon_in.mode_0x001e_0x01=str_constant +hwmon_in.str_cons_0x001e_0x01=VDD1.5V +hwmon_in.mode_0x001e_0x02=str_constant +hwmon_in.str_cons_0x001e_0x02=ucd90160 +hwmon_in.mode_0x001e_0x03=constant +hwmon_in.int_cons_0x001e_0x03=1650 +hwmon_in.mode_0x001e_0x05=constant +hwmon_in.int_cons_0x001e_0x05=1350 +hwmon_in.mode_0x001e_0x08=constant +hwmon_in.int_cons_0x001e_0x08=1500 +hwmon_in.mode_0x001e_0x07=constant +hwmon_in.int_cons_0x001e_0x07=7 + +# vol31 +hwmon_in.mode_0x001f_0x00=config +hwmon_in.int_cons_0x001f_0x00=0 +hwmon_in.src_0x001f_0x00=file +hwmon_in.frmt_0x001f_0x00=buf +hwmon_in.fpath_0x001f_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001f_0x00=0 +hwmon_in.len_0x001f_0x00=8 +hwmon_in.bit_offset_0x001f_0x00=0 +hwmon_in.str_cons_0x001f_0x00=in6_input +hwmon_in.mode_0x001f_0x01=str_constant +hwmon_in.str_cons_0x001f_0x01=VDD1_2V +hwmon_in.mode_0x001f_0x02=str_constant +hwmon_in.str_cons_0x001f_0x02=ucd90160 +hwmon_in.mode_0x001f_0x03=constant +hwmon_in.int_cons_0x001f_0x03=1320 +hwmon_in.mode_0x001f_0x05=constant +hwmon_in.int_cons_0x001f_0x05=1080 +hwmon_in.mode_0x001f_0x08=constant +hwmon_in.int_cons_0x001f_0x08=1200 +hwmon_in.mode_0x001f_0x07=constant +hwmon_in.int_cons_0x001f_0x07=6 + +# vol32 +hwmon_in.mode_0x0020_0x00=config +hwmon_in.int_cons_0x0020_0x00=0 +hwmon_in.src_0x0020_0x00=file +hwmon_in.frmt_0x0020_0x00=buf +hwmon_in.fpath_0x0020_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0020_0x00=0 +hwmon_in.len_0x0020_0x00=8 +hwmon_in.bit_offset_0x0020_0x00= +hwmon_in.str_cons_0x0020_0x00=in7_input +hwmon_in.mode_0x0020_0x01=str_constant +hwmon_in.str_cons_0x0020_0x01=VDD_PLL0 +hwmon_in.mode_0x0020_0x02=str_constant +hwmon_in.str_cons_0x0020_0x02=ucd90160 +hwmon_in.mode_0x0020_0x03=constant +hwmon_in.int_cons_0x0020_0x03=990 +hwmon_in.mode_0x0020_0x05=constant +hwmon_in.int_cons_0x0020_0x05=810 +hwmon_in.mode_0x0020_0x08=constant +hwmon_in.int_cons_0x0020_0x08=900 +hwmon_in.mode_0x0020_0x07=constant +hwmon_in.int_cons_0x0020_0x07=4 + +# vol33 +hwmon_in.mode_0x0021_0x00=config +hwmon_in.int_cons_0x0021_0x00=0 +hwmon_in.src_0x0021_0x00=file +hwmon_in.frmt_0x0021_0x00=buf +hwmon_in.fpath_0x0021_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0021_0x00=0 +hwmon_in.len_0x0021_0x00=8 +hwmon_in.bit_offset_0x0021_0x00= +hwmon_in.str_cons_0x0021_0x00=in8_input +hwmon_in.mode_0x0021_0x01=str_constant +hwmon_in.str_cons_0x0021_0x01=VDD_PLL1 +hwmon_in.mode_0x0021_0x02=str_constant +hwmon_in.str_cons_0x0021_0x02=ucd90160 +hwmon_in.mode_0x0021_0x03=constant +hwmon_in.int_cons_0x0021_0x03=990 +hwmon_in.mode_0x0021_0x05=constant +hwmon_in.int_cons_0x0021_0x05=810 +hwmon_in.mode_0x0021_0x08=constant +hwmon_in.int_cons_0x0021_0x08=900 +hwmon_in.mode_0x0021_0x07=constant +hwmon_in.int_cons_0x0021_0x07=4 + +# vol34 +hwmon_in.mode_0x0022_0x00=config +hwmon_in.int_cons_0x0022_0x00=0 +hwmon_in.src_0x0022_0x00=file +hwmon_in.frmt_0x0022_0x00=buf +hwmon_in.fpath_0x0022_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0022_0x00=0 +hwmon_in.len_0x0022_0x00=8 +hwmon_in.bit_offset_0x0022_0x00= +hwmon_in.str_cons_0x0022_0x00=in9_input +hwmon_in.mode_0x0022_0x01=str_constant +hwmon_in.str_cons_0x0022_0x01=VDD_PLL2 +hwmon_in.mode_0x0022_0x02=str_constant +hwmon_in.str_cons_0x0022_0x02=ucd90160 +hwmon_in.mode_0x0022_0x03=constant +hwmon_in.int_cons_0x0022_0x03=990 +hwmon_in.mode_0x0022_0x05=constant +hwmon_in.int_cons_0x0022_0x05=810 +hwmon_in.mode_0x0022_0x08=constant +hwmon_in.int_cons_0x0022_0x08=900 +hwmon_in.mode_0x0022_0x07=constant +hwmon_in.int_cons_0x0022_0x07=4 + +# vol35 +hwmon_in.mode_0x0023_0x00=config +hwmon_in.int_cons_0x0023_0x00=0 +hwmon_in.src_0x0023_0x00=file +hwmon_in.frmt_0x0023_0x00=buf +hwmon_in.fpath_0x0023_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0023_0x00=0 +hwmon_in.len_0x0023_0x00=8 +hwmon_in.bit_offset_0x0023_0x00= +hwmon_in.str_cons_0x0023_0x00=in10_input +hwmon_in.mode_0x0023_0x01=str_constant +hwmon_in.str_cons_0x0023_0x01=VDD_PLL3 +hwmon_in.mode_0x0023_0x02=str_constant +hwmon_in.str_cons_0x0023_0x02=ucd90160 +hwmon_in.mode_0x0023_0x03=constant +hwmon_in.int_cons_0x0023_0x03=990 +hwmon_in.mode_0x0023_0x05=constant +hwmon_in.int_cons_0x0023_0x05=810 +hwmon_in.mode_0x0023_0x08=constant +hwmon_in.int_cons_0x0023_0x08=900 +hwmon_in.mode_0x0023_0x07=constant +hwmon_in.int_cons_0x0023_0x07=4 + +# vol36 +hwmon_in.mode_0x0024_0x00=config +hwmon_in.int_cons_0x0024_0x00=0 +hwmon_in.src_0x0024_0x00=file +hwmon_in.frmt_0x0024_0x00=buf +hwmon_in.fpath_0x0024_0x00=/sys/bus/i2c/devices/84-0040/hwmon/ +hwmon_in.addr_0x0024_0x00=0 +hwmon_in.len_0x0024_0x00=8 +hwmon_in.bit_offset_0x0024_0x00= +hwmon_in.str_cons_0x0024_0x00=in3_input +hwmon_in.mode_0x0024_0x01=str_constant +hwmon_in.str_cons_0x0024_0x01=XDPE_VDD_CORE +hwmon_in.mode_0x0024_0x02=str_constant +hwmon_in.str_cons_0x0024_0x02=xdpe132g5c +hwmon_in.mode_0x0024_0x03=constant +hwmon_in.int_cons_0x0024_0x03=900 +hwmon_in.mode_0x0024_0x05=constant +hwmon_in.int_cons_0x0024_0x05=630 +hwmon_in.mode_0x0024_0x08=constant +hwmon_in.int_cons_0x0024_0x08=800 +hwmon_in.mode_0x0024_0x07=constant +hwmon_in.int_cons_0x0024_0x07=12 + +# vol37 +hwmon_in.mode_0x0025_0x00=config +hwmon_in.int_cons_0x0025_0x00=0 +hwmon_in.src_0x0025_0x00=file +hwmon_in.frmt_0x0025_0x00=buf +hwmon_in.fpath_0x0025_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_in.addr_0x0025_0x00=0 +hwmon_in.len_0x0025_0x00=8 +hwmon_in.bit_offset_0x0025_0x00= +hwmon_in.str_cons_0x0025_0x00=in3_input +hwmon_in.mode_0x0025_0x01=str_constant +hwmon_in.str_cons_0x0025_0x01=XDPE_VDD0_9V_ANLG0 +hwmon_in.mode_0x0025_0x02=str_constant +hwmon_in.str_cons_0x0025_0x02=xdpe132g5c +hwmon_in.mode_0x0025_0x03=constant +hwmon_in.int_cons_0x0025_0x03=990 +hwmon_in.mode_0x0025_0x05=constant +hwmon_in.int_cons_0x0025_0x05=810 +hwmon_in.mode_0x0025_0x08=constant +hwmon_in.int_cons_0x0025_0x08=900 +hwmon_in.mode_0x0025_0x07=constant +hwmon_in.int_cons_0x0025_0x07=12 + +# vol38 +hwmon_in.mode_0x0026_0x00=config +hwmon_in.int_cons_0x0026_0x00=0 +hwmon_in.src_0x0026_0x00=file +hwmon_in.frmt_0x0026_0x00=buf +hwmon_in.fpath_0x0026_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_in.addr_0x0026_0x00=0 +hwmon_in.len_0x0026_0x00=8 +hwmon_in.bit_offset_0x0026_0x00= +hwmon_in.str_cons_0x0026_0x00=in4_input +hwmon_in.mode_0x0026_0x01=str_constant +hwmon_in.str_cons_0x0026_0x01=XDPE_VDD0_75V_ANLG0 +hwmon_in.mode_0x0026_0x02=str_constant +hwmon_in.str_cons_0x0026_0x02=xdpe132g5c +hwmon_in.mode_0x0026_0x03=constant +hwmon_in.int_cons_0x0026_0x03=825 +hwmon_in.mode_0x0026_0x05=constant +hwmon_in.int_cons_0x0026_0x05=675 +hwmon_in.mode_0x0026_0x08=constant +hwmon_in.int_cons_0x0026_0x08=750 +hwmon_in.mode_0x0026_0x07=constant +hwmon_in.int_cons_0x0026_0x07=12 + +# vol39 +hwmon_in.mode_0x0027_0x00=config +hwmon_in.int_cons_0x0027_0x00=0 +hwmon_in.src_0x0027_0x00=file +hwmon_in.frmt_0x0027_0x00=buf +hwmon_in.fpath_0x0027_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_in.addr_0x0027_0x00=0 +hwmon_in.len_0x0027_0x00=8 +hwmon_in.bit_offset_0x0027_0x00= +hwmon_in.str_cons_0x0027_0x00=in3_input +hwmon_in.mode_0x0027_0x01=str_constant +hwmon_in.str_cons_0x0027_0x01=XDPE_VDD0_9V_ANLG1 +hwmon_in.mode_0x0027_0x02=str_constant +hwmon_in.str_cons_0x0027_0x02=xdpe132g5c +hwmon_in.mode_0x0027_0x03=constant +hwmon_in.int_cons_0x0027_0x03=990 +hwmon_in.mode_0x0027_0x05=constant +hwmon_in.int_cons_0x0027_0x05=810 +hwmon_in.mode_0x0027_0x08=constant +hwmon_in.int_cons_0x0027_0x08=900 +hwmon_in.mode_0x0027_0x07=constant +hwmon_in.int_cons_0x0027_0x07=12 + +# vol40 +hwmon_in.mode_0x0028_0x00=config +hwmon_in.int_cons_0x0028_0x00=0 +hwmon_in.src_0x0028_0x00=file +hwmon_in.frmt_0x0028_0x00=buf +hwmon_in.fpath_0x0028_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_in.addr_0x0028_0x00=0 +hwmon_in.len_0x0028_0x00=8 +hwmon_in.bit_offset_0x0028_0x00= +hwmon_in.str_cons_0x0028_0x00=in4_input +hwmon_in.mode_0x0028_0x01=str_constant +hwmon_in.str_cons_0x0028_0x01=XDPE_VDD0_75V_ANLG1 +hwmon_in.mode_0x0028_0x02=str_constant +hwmon_in.str_cons_0x0028_0x02=xdpe132g5c +hwmon_in.mode_0x0028_0x03=constant +hwmon_in.int_cons_0x0028_0x03=825 +hwmon_in.mode_0x0028_0x05=constant +hwmon_in.int_cons_0x0028_0x05=675 +hwmon_in.mode_0x0028_0x08=constant +hwmon_in.int_cons_0x0028_0x08=750 +hwmon_in.mode_0x0028_0x07=constant +hwmon_in.int_cons_0x0028_0x07=12 + +# vol41 +hwmon_in.mode_0x0029_0x00=config +hwmon_in.int_cons_0x0029_0x00=3 +hwmon_in.src_0x0029_0x00=file +hwmon_in.frmt_0x0029_0x00=buf +hwmon_in.fpath_0x0029_0x00=/sys/bus/i2c/devices/90-0070/hwmon/ +hwmon_in.addr_0x0029_0x00=0 +hwmon_in.len_0x0029_0x00=8 +hwmon_in.bit_offset_0x0029_0x00=0 +hwmon_in.str_cons_0x0029_0x00=in3_input +hwmon_in.mode_0x0029_0x01=str_constant +hwmon_in.str_cons_0x0029_0x01=OSFP_VDD3.3V_A1 +hwmon_in.mode_0x0029_0x02=str_constant +hwmon_in.str_cons_0x0029_0x02=xdpe12284c +hwmon_in.mode_0x0029_0x03=constant +hwmon_in.int_cons_0x0029_0x03=3630 +hwmon_in.mode_0x0029_0x05=constant +hwmon_in.int_cons_0x0029_0x05=2970 +hwmon_in.mode_0x0029_0x08=constant +hwmon_in.int_cons_0x0029_0x08=3300 +hwmon_in.mode_0x0029_0x07=constant +hwmon_in.int_cons_0x0029_0x07=12 +hwmon_in.int_extra1_0x0029_0x00=1500 + +# vol42 +hwmon_in.mode_0x002a_0x00=config +hwmon_in.int_cons_0x002a_0x00=3 +hwmon_in.src_0x002a_0x00=file +hwmon_in.frmt_0x002a_0x00=buf +hwmon_in.fpath_0x002a_0x00=/sys/bus/i2c/devices/90-0070/hwmon/ +hwmon_in.addr_0x002a_0x00=0 +hwmon_in.len_0x002a_0x00=8 +hwmon_in.bit_offset_0x002a_0x00=0 +hwmon_in.str_cons_0x002a_0x00=in4_input +hwmon_in.mode_0x002a_0x01=str_constant +hwmon_in.str_cons_0x002a_0x01=OSFP_VDD3.3V_B1 +hwmon_in.mode_0x002a_0x02=str_constant +hwmon_in.str_cons_0x002a_0x02=xdpe12284c +hwmon_in.mode_0x002a_0x03=constant +hwmon_in.int_cons_0x002a_0x03=3630 +hwmon_in.mode_0x002a_0x05=constant +hwmon_in.int_cons_0x002a_0x05=2970 +hwmon_in.mode_0x002a_0x08=constant +hwmon_in.int_cons_0x002a_0x08=3300 +hwmon_in.mode_0x002a_0x07=constant +hwmon_in.int_cons_0x002a_0x07=12 +hwmon_in.int_extra1_0x002a_0x00=1500 + +# vol43 +hwmon_in.mode_0x002b_0x00=config +hwmon_in.int_cons_0x002b_0x00=3 +hwmon_in.src_0x002b_0x00=file +hwmon_in.frmt_0x002b_0x00=buf +hwmon_in.fpath_0x002b_0x00=/sys/bus/i2c/devices/91-0070/hwmon/ +hwmon_in.addr_0x002b_0x00=0 +hwmon_in.len_0x002b_0x00=8 +hwmon_in.bit_offset_0x002b_0x00=0 +hwmon_in.str_cons_0x002b_0x00=in3_input +hwmon_in.mode_0x002b_0x01=str_constant +hwmon_in.str_cons_0x002b_0x01=OSFP_VDD3.3V_A2 +hwmon_in.mode_0x002b_0x02=str_constant +hwmon_in.str_cons_0x002b_0x02=xdpe12284c +hwmon_in.mode_0x002b_0x03=constant +hwmon_in.int_cons_0x002b_0x03=3630 +hwmon_in.mode_0x002b_0x05=constant +hwmon_in.int_cons_0x002b_0x05=2970 +hwmon_in.mode_0x002b_0x08=constant +hwmon_in.int_cons_0x002b_0x08=3300 +hwmon_in.mode_0x002b_0x07=constant +hwmon_in.int_cons_0x002b_0x07=12 +hwmon_in.int_extra1_0x002b_0x00=1500 + +# vol44 +hwmon_in.mode_0x002c_0x00=config +hwmon_in.int_cons_0x002c_0x00=3 +hwmon_in.src_0x002c_0x00=file +hwmon_in.frmt_0x002c_0x00=buf +hwmon_in.fpath_0x002c_0x00=/sys/bus/i2c/devices/91-0070/hwmon/ +hwmon_in.addr_0x002c_0x00=0 +hwmon_in.len_0x002c_0x00=8 +hwmon_in.bit_offset_0x002c_0x00=0 +hwmon_in.str_cons_0x002c_0x00=in4_input +hwmon_in.mode_0x002c_0x01=str_constant +hwmon_in.str_cons_0x002c_0x01=OSFP_VDD3.3V_B2 +hwmon_in.mode_0x002c_0x02=str_constant +hwmon_in.str_cons_0x002c_0x02=xdpe12284c +hwmon_in.mode_0x002c_0x03=constant +hwmon_in.int_cons_0x002c_0x03=3630 +hwmon_in.mode_0x002c_0x05=constant +hwmon_in.int_cons_0x002c_0x05=2970 +hwmon_in.mode_0x002c_0x08=constant +hwmon_in.int_cons_0x002c_0x08=3300 +hwmon_in.mode_0x002c_0x07=constant +hwmon_in.int_cons_0x002c_0x07=12 +hwmon_in.int_extra1_0x002c_0x00=1500 + +# vol45 +hwmon_in.mode_0x002d_0x00=config +hwmon_in.int_cons_0x002d_0x00=3 +hwmon_in.src_0x002d_0x00=file +hwmon_in.frmt_0x002d_0x00=buf +hwmon_in.fpath_0x002d_0x00=/sys/bus/i2c/devices/92-0070/hwmon/ +hwmon_in.addr_0x002d_0x00=0 +hwmon_in.len_0x002d_0x00=8 +hwmon_in.bit_offset_0x002d_0x00=0 +hwmon_in.str_cons_0x002d_0x00=in3_input +hwmon_in.mode_0x002d_0x01=str_constant +hwmon_in.str_cons_0x002d_0x01=OSFP_VDD3.3V_A3 +hwmon_in.mode_0x002d_0x02=str_constant +hwmon_in.str_cons_0x002d_0x02=xdpe12284c +hwmon_in.mode_0x002d_0x03=constant +hwmon_in.int_cons_0x002d_0x03=3630 +hwmon_in.mode_0x002d_0x05=constant +hwmon_in.int_cons_0x002d_0x05=2970 +hwmon_in.mode_0x002d_0x08=constant +hwmon_in.int_cons_0x002d_0x08=3300 +hwmon_in.mode_0x002d_0x07=constant +hwmon_in.int_cons_0x002d_0x07=12 +hwmon_in.int_extra1_0x002d_0x00=1500 + +# vol46 +hwmon_in.mode_0x002e_0x00=config +hwmon_in.int_cons_0x002e_0x00=3 +hwmon_in.src_0x002e_0x00=file +hwmon_in.frmt_0x002e_0x00=buf +hwmon_in.fpath_0x002e_0x00=/sys/bus/i2c/devices/92-0070/hwmon/ +hwmon_in.addr_0x002e_0x00=0 +hwmon_in.len_0x002e_0x00=8 +hwmon_in.bit_offset_0x002e_0x00=0 +hwmon_in.str_cons_0x002e_0x00=in4_input +hwmon_in.mode_0x002e_0x01=str_constant +hwmon_in.str_cons_0x002e_0x01=OSFP_VDD3.3V_B3 +hwmon_in.mode_0x002e_0x02=str_constant +hwmon_in.str_cons_0x002e_0x02=xdpe12284c +hwmon_in.mode_0x002e_0x03=constant +hwmon_in.int_cons_0x002e_0x03=3630 +hwmon_in.mode_0x002e_0x05=constant +hwmon_in.int_cons_0x002e_0x05=2970 +hwmon_in.mode_0x002e_0x08=constant +hwmon_in.int_cons_0x002e_0x08=3300 +hwmon_in.mode_0x002e_0x07=constant +hwmon_in.int_cons_0x002e_0x07=12 +hwmon_in.int_extra1_0x002e_0x00=1500 + +# vol47 +hwmon_in.mode_0x002f_0x00=config +hwmon_in.int_cons_0x002f_0x00=3 +hwmon_in.src_0x002f_0x00=file +hwmon_in.frmt_0x002f_0x00=buf +hwmon_in.fpath_0x002f_0x00=/sys/bus/i2c/devices/93-0070/hwmon/ +hwmon_in.addr_0x002f_0x00=0 +hwmon_in.len_0x002f_0x00=8 +hwmon_in.bit_offset_0x002f_0x00=0 +hwmon_in.str_cons_0x002f_0x00=in3_input +hwmon_in.mode_0x002f_0x01=str_constant +hwmon_in.str_cons_0x002f_0x01=OSFP_VDD3.3V_A4 +hwmon_in.mode_0x002f_0x02=str_constant +hwmon_in.str_cons_0x002f_0x02=xdpe12284c +hwmon_in.mode_0x002f_0x03=constant +hwmon_in.int_cons_0x002f_0x03=3630 +hwmon_in.mode_0x002f_0x05=constant +hwmon_in.int_cons_0x002f_0x05=2970 +hwmon_in.mode_0x002f_0x08=constant +hwmon_in.int_cons_0x002f_0x08=3300 +hwmon_in.mode_0x002f_0x07=constant +hwmon_in.int_cons_0x002f_0x07=12 +hwmon_in.int_extra1_0x002f_0x00=1500 + +# vol48 +hwmon_in.mode_0x0030_0x00=config +hwmon_in.int_cons_0x0030_0x00=3 +hwmon_in.src_0x0030_0x00=file +hwmon_in.frmt_0x0030_0x00=buf +hwmon_in.fpath_0x0030_0x00=/sys/bus/i2c/devices/93-0070/hwmon/ +hwmon_in.addr_0x0030_0x00=0 +hwmon_in.len_0x0030_0x00=8 +hwmon_in.bit_offset_0x0030_0x00=0 +hwmon_in.str_cons_0x0030_0x00=in4_input +hwmon_in.mode_0x0030_0x01=str_constant +hwmon_in.str_cons_0x0030_0x01=OSFP_VDD3.3V_B4 +hwmon_in.mode_0x0030_0x02=str_constant +hwmon_in.str_cons_0x0030_0x02=xdpe12284c +hwmon_in.mode_0x0030_0x03=constant +hwmon_in.int_cons_0x0030_0x03=3630 +hwmon_in.mode_0x0030_0x05=constant +hwmon_in.int_cons_0x0030_0x05=2970 +hwmon_in.mode_0x0030_0x08=constant +hwmon_in.int_cons_0x0030_0x08=3300 +hwmon_in.mode_0x0030_0x07=constant +hwmon_in.int_cons_0x0030_0x07=12 +hwmon_in.int_extra1_0x0030_0x00=1500 + +# vol49 +hwmon_in.mode_0x0031_0x00=config +hwmon_in.int_cons_0x0031_0x00=3 +hwmon_in.src_0x0031_0x00=file +hwmon_in.frmt_0x0031_0x00=buf +hwmon_in.fpath_0x0031_0x00=/sys/bus/i2c/devices/94-0070/hwmon/ +hwmon_in.addr_0x0031_0x00=0 +hwmon_in.len_0x0031_0x00=8 +hwmon_in.bit_offset_0x0031_0x00=0 +hwmon_in.str_cons_0x0031_0x00=in3_input +hwmon_in.mode_0x0031_0x01=str_constant +hwmon_in.str_cons_0x0031_0x01=OSFP_VDD3.3V_A5 +hwmon_in.mode_0x0031_0x02=str_constant +hwmon_in.str_cons_0x0031_0x02=xdpe12284c +hwmon_in.mode_0x0031_0x03=constant +hwmon_in.int_cons_0x0031_0x03=3630 +hwmon_in.mode_0x0031_0x05=constant +hwmon_in.int_cons_0x0031_0x05=2970 +hwmon_in.mode_0x0031_0x08=constant +hwmon_in.int_cons_0x0031_0x08=3300 +hwmon_in.mode_0x0031_0x07=constant +hwmon_in.int_cons_0x0031_0x07=12 +hwmon_in.int_extra1_0x0031_0x00=1500 + +# vol50 +hwmon_in.mode_0x0032_0x00=config +hwmon_in.int_cons_0x0032_0x00=3 +hwmon_in.src_0x0032_0x00=file +hwmon_in.frmt_0x0032_0x00=buf +hwmon_in.fpath_0x0032_0x00=/sys/bus/i2c/devices/94-0070/hwmon/ +hwmon_in.addr_0x0032_0x00=0 +hwmon_in.len_0x0032_0x00=8 +hwmon_in.bit_offset_0x0032_0x00=0 +hwmon_in.str_cons_0x0032_0x00=in4_input +hwmon_in.mode_0x0032_0x01=str_constant +hwmon_in.str_cons_0x0032_0x01=OSFP_VDD3.3V_B5 +hwmon_in.mode_0x0032_0x02=str_constant +hwmon_in.str_cons_0x0032_0x02=xdpe12284c +hwmon_in.mode_0x0032_0x03=constant +hwmon_in.int_cons_0x0032_0x03=3630 +hwmon_in.mode_0x0032_0x05=constant +hwmon_in.int_cons_0x0032_0x05=2970 +hwmon_in.mode_0x0032_0x08=constant +hwmon_in.int_cons_0x0032_0x08=3300 +hwmon_in.mode_0x0032_0x07=constant +hwmon_in.int_cons_0x0032_0x07=12 +hwmon_in.int_extra1_0x0032_0x00=1500 + +# vol51 +hwmon_in.mode_0x0033_0x00=config +hwmon_in.int_cons_0x0033_0x00=3 +hwmon_in.src_0x0033_0x00=file +hwmon_in.frmt_0x0033_0x00=buf +hwmon_in.fpath_0x0033_0x00=/sys/bus/i2c/devices/95-0070/hwmon/ +hwmon_in.addr_0x0033_0x00=0 +hwmon_in.len_0x0033_0x00=8 +hwmon_in.bit_offset_0x0033_0x00=0 +hwmon_in.str_cons_0x0033_0x00=in3_input +hwmon_in.mode_0x0033_0x01=str_constant +hwmon_in.str_cons_0x0033_0x01=OSFP_VDD3.3V_A6 +hwmon_in.mode_0x0033_0x02=str_constant +hwmon_in.str_cons_0x0033_0x02=xdpe12284c +hwmon_in.mode_0x0033_0x03=constant +hwmon_in.int_cons_0x0033_0x03=3630 +hwmon_in.mode_0x0033_0x05=constant +hwmon_in.int_cons_0x0033_0x05=2970 +hwmon_in.mode_0x0033_0x08=constant +hwmon_in.int_cons_0x0033_0x08=3300 +hwmon_in.mode_0x0033_0x07=constant +hwmon_in.int_cons_0x0033_0x07=12 +hwmon_in.int_extra1_0x0033_0x00=1500 + +# vol52 +hwmon_in.mode_0x0034_0x00=config +hwmon_in.int_cons_0x0034_0x00=3 +hwmon_in.src_0x0034_0x00=file +hwmon_in.frmt_0x0034_0x00=buf +hwmon_in.fpath_0x0034_0x00=/sys/bus/i2c/devices/95-0070/hwmon/ +hwmon_in.addr_0x0034_0x00=0 +hwmon_in.len_0x0034_0x00=8 +hwmon_in.bit_offset_0x0034_0x00=0 +hwmon_in.str_cons_0x0034_0x00=in4_input +hwmon_in.mode_0x0034_0x01=str_constant +hwmon_in.str_cons_0x0034_0x01=OSFP_VDD3.3V_B6 +hwmon_in.mode_0x0034_0x02=str_constant +hwmon_in.str_cons_0x0034_0x02=xdpe12284c +hwmon_in.mode_0x0034_0x03=constant +hwmon_in.int_cons_0x0034_0x03=3630 +hwmon_in.mode_0x0034_0x05=constant +hwmon_in.int_cons_0x0034_0x05=2970 +hwmon_in.mode_0x0034_0x08=constant +hwmon_in.int_cons_0x0034_0x08=3300 +hwmon_in.mode_0x0034_0x07=constant +hwmon_in.int_cons_0x0034_0x07=12 +hwmon_in.int_extra1_0x0034_0x00=1500 + +# vol53 +hwmon_in.mode_0x0035_0x00=config +hwmon_in.int_cons_0x0035_0x00=3 +hwmon_in.src_0x0035_0x00=file +hwmon_in.frmt_0x0035_0x00=buf +hwmon_in.fpath_0x0035_0x00=/sys/bus/i2c/devices/96-0070/hwmon/ +hwmon_in.addr_0x0035_0x00=0 +hwmon_in.len_0x0035_0x00=8 +hwmon_in.bit_offset_0x0035_0x00=0 +hwmon_in.str_cons_0x0035_0x00=in3_input +hwmon_in.mode_0x0035_0x01=str_constant +hwmon_in.str_cons_0x0035_0x01=OSFP_VDD3.3V_A7 +hwmon_in.mode_0x0035_0x02=str_constant +hwmon_in.str_cons_0x0035_0x02=xdpe12284c +hwmon_in.mode_0x0035_0x03=constant +hwmon_in.int_cons_0x0035_0x03=3630 +hwmon_in.mode_0x0035_0x05=constant +hwmon_in.int_cons_0x0035_0x05=2970 +hwmon_in.mode_0x0035_0x08=constant +hwmon_in.int_cons_0x0035_0x08=3300 +hwmon_in.mode_0x0035_0x07=constant +hwmon_in.int_cons_0x0035_0x07=12 +hwmon_in.int_extra1_0x0035_0x00=1500 + +# vol54 +hwmon_in.mode_0x0036_0x00=config +hwmon_in.int_cons_0x0036_0x00=3 +hwmon_in.src_0x0036_0x00=file +hwmon_in.frmt_0x0036_0x00=buf +hwmon_in.fpath_0x0036_0x00=/sys/bus/i2c/devices/96-0070/hwmon/ +hwmon_in.addr_0x0036_0x00=0 +hwmon_in.len_0x0036_0x00=8 +hwmon_in.bit_offset_0x0036_0x00=0 +hwmon_in.str_cons_0x0036_0x00=in4_input +hwmon_in.mode_0x0036_0x01=str_constant +hwmon_in.str_cons_0x0036_0x01=OSFP_VDD3.3V_B7 +hwmon_in.mode_0x0036_0x02=str_constant +hwmon_in.str_cons_0x0036_0x02=xdpe12284c +hwmon_in.mode_0x0036_0x03=constant +hwmon_in.int_cons_0x0036_0x03=3630 +hwmon_in.mode_0x0036_0x05=constant +hwmon_in.int_cons_0x0036_0x05=2970 +hwmon_in.mode_0x0036_0x08=constant +hwmon_in.int_cons_0x0036_0x08=3300 +hwmon_in.mode_0x0036_0x07=constant +hwmon_in.int_cons_0x0036_0x07=12 +hwmon_in.int_extra1_0x0036_0x00=1500 + +# vol55 +hwmon_in.mode_0x0037_0x00=config +hwmon_in.int_cons_0x0037_0x00=3 +hwmon_in.src_0x0037_0x00=file +hwmon_in.frmt_0x0037_0x00=buf +hwmon_in.fpath_0x0037_0x00=/sys/bus/i2c/devices/97-0070/hwmon/ +hwmon_in.addr_0x0037_0x00=0 +hwmon_in.len_0x0037_0x00=8 +hwmon_in.bit_offset_0x0037_0x00=0 +hwmon_in.str_cons_0x0037_0x00=in3_input +hwmon_in.mode_0x0037_0x01=str_constant +hwmon_in.str_cons_0x0037_0x01=OSFP_VDD3.3V_A8 +hwmon_in.mode_0x0037_0x02=str_constant +hwmon_in.str_cons_0x0037_0x02=xdpe12284c +hwmon_in.mode_0x0037_0x03=constant +hwmon_in.int_cons_0x0037_0x03=3630 +hwmon_in.mode_0x0037_0x05=constant +hwmon_in.int_cons_0x0037_0x05=2970 +hwmon_in.mode_0x0037_0x08=constant +hwmon_in.int_cons_0x0037_0x08=3300 +hwmon_in.mode_0x0037_0x07=constant +hwmon_in.int_cons_0x0037_0x07=12 +hwmon_in.int_extra1_0x0037_0x00=1500 + +# vol56 +hwmon_in.mode_0x0038_0x00=config +hwmon_in.int_cons_0x0038_0x00=3 +hwmon_in.src_0x0038_0x00=file +hwmon_in.frmt_0x0038_0x00=buf +hwmon_in.fpath_0x0038_0x00=/sys/bus/i2c/devices/97-0070/hwmon/ +hwmon_in.addr_0x0038_0x00=0 +hwmon_in.len_0x0038_0x00=8 +hwmon_in.bit_offset_0x0038_0x00=0 +hwmon_in.str_cons_0x0038_0x00=in3_input +hwmon_in.mode_0x0038_0x01=str_constant +hwmon_in.str_cons_0x0038_0x01=OSFP_VDD3.3V_B8 +hwmon_in.mode_0x0038_0x02=str_constant +hwmon_in.str_cons_0x0038_0x02=xdpe12284c +hwmon_in.mode_0x0038_0x03=constant +hwmon_in.int_cons_0x0038_0x03=3630 +hwmon_in.mode_0x0038_0x05=constant +hwmon_in.int_cons_0x0038_0x05=2970 +hwmon_in.mode_0x0038_0x08=constant +hwmon_in.int_cons_0x0038_0x08=3300 +hwmon_in.mode_0x0038_0x07=constant +hwmon_in.int_cons_0x0038_0x07=12 +hwmon_in.int_extra1_0x0038_0x00=1500 + +# vol57 +hwmon_in.mode_0x0039_0x00=config +hwmon_in.int_cons_0x0039_0x00=0 +hwmon_in.src_0x0039_0x00=file +hwmon_in.frmt_0x0039_0x00=buf +hwmon_in.fpath_0x0039_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_in.addr_0x0039_0x00=0 +hwmon_in.len_0x0039_0x00=8 +hwmon_in.bit_offset_0x0039_0x00= +hwmon_in.str_cons_0x0039_0x00=in3_input +hwmon_in.mode_0x0039_0x01=str_constant +hwmon_in.str_cons_0x0039_0x01=CPU_XDPE_VCCIN_V +hwmon_in.mode_0x0039_0x02=str_constant +hwmon_in.str_cons_0x0039_0x02=xdpe12284c +hwmon_in.mode_0x0039_0x03=constant +hwmon_in.int_cons_0x0039_0x03=2200 +hwmon_in.mode_0x0039_0x05=constant +hwmon_in.int_cons_0x0039_0x05=1350 +hwmon_in.mode_0x0039_0x08=constant +hwmon_in.int_cons_0x0039_0x08=1800 +hwmon_in.mode_0x0039_0x07=constant +hwmon_in.int_cons_0x0039_0x07=12 + +# vol58 +hwmon_in.mode_0x003a_0x00=config +hwmon_in.int_cons_0x003a_0x00=0 +hwmon_in.src_0x003a_0x00=file +hwmon_in.frmt_0x003a_0x00=buf +hwmon_in.fpath_0x003a_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_in.addr_0x003a_0x00=0 +hwmon_in.len_0x003a_0x00=8 +hwmon_in.bit_offset_0x003a_0x00= +hwmon_in.str_cons_0x003a_0x00=in4_input +hwmon_in.mode_0x003a_0x01=str_constant +hwmon_in.str_cons_0x003a_0x01=CPU_XDPE_P1V8_V +hwmon_in.mode_0x003a_0x02=str_constant +hwmon_in.str_cons_0x003a_0x02=xdpe12284c +hwmon_in.mode_0x003a_0x03=constant +hwmon_in.int_cons_0x003a_0x03=1910 +hwmon_in.mode_0x003a_0x05=constant +hwmon_in.int_cons_0x003a_0x05=1690 +hwmon_in.mode_0x003a_0x08=constant +hwmon_in.int_cons_0x003a_0x08=1800 +hwmon_in.mode_0x003a_0x07=constant +hwmon_in.int_cons_0x003a_0x07=12 + +# vol59 +hwmon_in.mode_0x003b_0x00=config +hwmon_in.int_cons_0x003b_0x00=0 +hwmon_in.src_0x003b_0x00=file +hwmon_in.frmt_0x003b_0x00=buf +hwmon_in.fpath_0x003b_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_in.addr_0x003b_0x00=0 +hwmon_in.len_0x003b_0x00=8 +hwmon_in.bit_offset_0x003b_0x00= +hwmon_in.str_cons_0x003b_0x00=in3_input +hwmon_in.mode_0x003b_0x01=str_constant +hwmon_in.str_cons_0x003b_0x01=CPU_XDPE_P1V05_V +hwmon_in.mode_0x003b_0x02=str_constant +hwmon_in.str_cons_0x003b_0x02=xdpe12284c +hwmon_in.mode_0x003b_0x03=constant +hwmon_in.int_cons_0x003b_0x03=1160 +hwmon_in.mode_0x003b_0x05=constant +hwmon_in.int_cons_0x003b_0x05=954 +hwmon_in.mode_0x003b_0x08=constant +hwmon_in.int_cons_0x003b_0x08=1060 +hwmon_in.mode_0x003b_0x07=constant +hwmon_in.int_cons_0x003b_0x07=12 + +# vol60 +hwmon_in.mode_0x003c_0x00=config +hwmon_in.int_cons_0x003c_0x00=0 +hwmon_in.src_0x003c_0x00=file +hwmon_in.frmt_0x003c_0x00=buf +hwmon_in.fpath_0x003c_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_in.addr_0x003c_0x00=0 +hwmon_in.len_0x003c_0x00=8 +hwmon_in.bit_offset_0x003c_0x00= +hwmon_in.str_cons_0x003c_0x00=in4_input +hwmon_in.mode_0x003c_0x01=str_constant +hwmon_in.str_cons_0x003c_0x01=CPU_XDPE_VNN_PCH_V +hwmon_in.mode_0x003c_0x02=str_constant +hwmon_in.str_cons_0x003c_0x02=xdpe12284c +hwmon_in.mode_0x003c_0x03=constant +hwmon_in.int_cons_0x003c_0x03=1320 +hwmon_in.mode_0x003c_0x05=constant +hwmon_in.int_cons_0x003c_0x05=540 +hwmon_in.mode_0x003c_0x08=constant +hwmon_in.int_cons_0x003c_0x08=1000 +hwmon_in.mode_0x003c_0x07=constant +hwmon_in.int_cons_0x003c_0x07=12 + +# vol61 +hwmon_in.mode_0x003d_0x00=config +hwmon_in.int_cons_0x003d_0x00=0 +hwmon_in.src_0x003d_0x00=file +hwmon_in.frmt_0x003d_0x00=buf +hwmon_in.fpath_0x003d_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_in.addr_0x003d_0x00=0 +hwmon_in.len_0x003d_0x00=8 +hwmon_in.bit_offset_0x003d_0x00= +hwmon_in.str_cons_0x003d_0x00=in3_input +hwmon_in.mode_0x003d_0x01=str_constant +hwmon_in.str_cons_0x003d_0x01=CPU_XDPE_VNN_NAC_V +hwmon_in.mode_0x003d_0x02=str_constant +hwmon_in.str_cons_0x003d_0x02=xdpe12284c +hwmon_in.mode_0x003d_0x03=constant +hwmon_in.int_cons_0x003d_0x03=1320 +hwmon_in.mode_0x003d_0x05=constant +hwmon_in.int_cons_0x003d_0x05=540 +hwmon_in.mode_0x003d_0x08=constant +hwmon_in.int_cons_0x003d_0x08=1000 +hwmon_in.mode_0x003d_0x07=constant +hwmon_in.int_cons_0x003d_0x07=12 + +# vol62 +hwmon_in.mode_0x003e_0x00=config +hwmon_in.int_cons_0x003e_0x00=0 +hwmon_in.src_0x003e_0x00=file +hwmon_in.frmt_0x003e_0x00=buf +hwmon_in.fpath_0x003e_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_in.addr_0x003e_0x00=0 +hwmon_in.len_0x003e_0x00=8 +hwmon_in.bit_offset_0x003e_0x00=0 +hwmon_in.str_cons_0x003e_0x00=in4_input +hwmon_in.mode_0x003e_0x01=str_constant +hwmon_in.str_cons_0x003e_0x01=CPU_XDPE_VCC_ANA_V +hwmon_in.mode_0x003e_0x02=str_constant +hwmon_in.str_cons_0x003e_0x02=xdpe12284c +hwmon_in.mode_0x003e_0x03=constant +hwmon_in.int_cons_0x003e_0x03=1100 +hwmon_in.mode_0x003e_0x05=constant +hwmon_in.int_cons_0x003e_0x05=900 +hwmon_in.mode_0x003e_0x08=constant +hwmon_in.int_cons_0x003e_0x08=1000 +hwmon_in.mode_0x003e_0x07=constant +hwmon_in.int_cons_0x003e_0x07=12 + +# vol63 +hwmon_in.mode_0x003f_0x00=config +hwmon_in.int_cons_0x003f_0x00=0 +hwmon_in.src_0x003f_0x00=file +hwmon_in.frmt_0x003f_0x00=buf +hwmon_in.fpath_0x003f_0x00=/sys/bus/i2c/devices/69-005e/hwmon/ +hwmon_in.addr_0x003f_0x00=0 +hwmon_in.len_0x003f_0x00=8 +hwmon_in.bit_offset_0x003f_0x00=0 +hwmon_in.str_cons_0x003f_0x00=in3_input +hwmon_in.mode_0x003f_0x01=str_constant +hwmon_in.str_cons_0x003f_0x01=CPU_XDPE_P1V2_VDDQ_V +hwmon_in.mode_0x003f_0x02=str_constant +hwmon_in.str_cons_0x003f_0x02=xdpe12284c +hwmon_in.mode_0x003f_0x03=constant +hwmon_in.int_cons_0x003f_0x03=1280 +hwmon_in.mode_0x003f_0x05=constant +hwmon_in.int_cons_0x003f_0x05=1120 +hwmon_in.mode_0x003f_0x08=constant +hwmon_in.int_cons_0x003f_0x08=1200 +hwmon_in.mode_0x003f_0x07=constant +hwmon_in.int_cons_0x003f_0x07=12 + +# vol64 +hwmon_in.mode_0x0040_0x00=config +hwmon_in.int_cons_0x0040_0x00=0 +hwmon_in.src_0x0040_0x00=file +hwmon_in.frmt_0x0040_0x00=buf +hwmon_in.fpath_0x0040_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0040_0x00=0 +hwmon_in.len_0x0040_0x00=8 +hwmon_in.bit_offset_0x0040_0x00= +hwmon_in.str_cons_0x0040_0x00=in1_input +hwmon_in.mode_0x0040_0x01=str_constant +hwmon_in.str_cons_0x0040_0x01=CPU_P1V05_V +hwmon_in.mode_0x0040_0x02=str_constant +hwmon_in.str_cons_0x0040_0x02=ucd90160 +hwmon_in.mode_0x0040_0x03=constant +hwmon_in.int_cons_0x0040_0x03=1160 +hwmon_in.mode_0x0040_0x05=constant +hwmon_in.int_cons_0x0040_0x05=954 +hwmon_in.mode_0x0040_0x08=constant +hwmon_in.int_cons_0x0040_0x08=1060 +hwmon_in.mode_0x0040_0x07=constant +hwmon_in.int_cons_0x0040_0x07=5 + +# vol65 +hwmon_in.mode_0x0041_0x00=config +hwmon_in.int_cons_0x0041_0x00=0 +hwmon_in.src_0x0041_0x00=file +hwmon_in.frmt_0x0041_0x00=buf +hwmon_in.fpath_0x0041_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0041_0x00=0 +hwmon_in.len_0x0041_0x00=8 +hwmon_in.bit_offset_0x0041_0x00= +hwmon_in.str_cons_0x0041_0x00=in2_input +hwmon_in.mode_0x0041_0x01=str_constant +hwmon_in.str_cons_0x0041_0x01=CPU_VCCIN_V +hwmon_in.mode_0x0041_0x02=str_constant +hwmon_in.str_cons_0x0041_0x02=ucd90160 +hwmon_in.mode_0x0041_0x03=constant +hwmon_in.int_cons_0x0041_0x03=2200 +hwmon_in.mode_0x0041_0x05=constant +hwmon_in.int_cons_0x0041_0x05=1350 +hwmon_in.mode_0x0041_0x08=constant +hwmon_in.int_cons_0x0041_0x08=1800 +hwmon_in.mode_0x0041_0x07=constant +hwmon_in.int_cons_0x0041_0x07=9 + +# vol66 +hwmon_in.mode_0x0042_0x00=config +hwmon_in.int_cons_0x0042_0x00=0 +hwmon_in.src_0x0042_0x00=file +hwmon_in.frmt_0x0042_0x00=buf +hwmon_in.fpath_0x0042_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0042_0x00=0 +hwmon_in.len_0x0042_0x00=8 +hwmon_in.bit_offset_0x0042_0x00= +hwmon_in.str_cons_0x0042_0x00=in3_input +hwmon_in.mode_0x0042_0x01=str_constant +hwmon_in.str_cons_0x0042_0x01=CPU_P1V2_VDDQ_V +hwmon_in.mode_0x0042_0x02=str_constant +hwmon_in.str_cons_0x0042_0x02=ucd90160 +hwmon_in.mode_0x0042_0x03=constant +hwmon_in.int_cons_0x0042_0x03=1280 +hwmon_in.mode_0x0042_0x05=constant +hwmon_in.int_cons_0x0042_0x05=1100 +hwmon_in.mode_0x0042_0x08=constant +hwmon_in.int_cons_0x0042_0x08=1210 +hwmon_in.mode_0x0042_0x07=constant +hwmon_in.int_cons_0x0042_0x07=6 + +# vol67 +hwmon_in.mode_0x0043_0x00=config +hwmon_in.int_cons_0x0043_0x00=0 +hwmon_in.src_0x0043_0x00=file +hwmon_in.frmt_0x0043_0x00=buf +hwmon_in.fpath_0x0043_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0043_0x00=0 +hwmon_in.len_0x0043_0x00=8 +hwmon_in.bit_offset_0x0043_0x00= +hwmon_in.str_cons_0x0043_0x00=in4_input +hwmon_in.mode_0x0043_0x01=str_constant +hwmon_in.str_cons_0x0043_0x01=CPU_P1V8_V +hwmon_in.mode_0x0043_0x02=str_constant +hwmon_in.str_cons_0x0043_0x02=ucd90160 +hwmon_in.mode_0x0043_0x03=constant +hwmon_in.int_cons_0x0043_0x03=1910 +hwmon_in.mode_0x0043_0x05=constant +hwmon_in.int_cons_0x0043_0x05=169- +hwmon_in.mode_0x0043_0x08=constant +hwmon_in.int_cons_0x0043_0x08=1800 +hwmon_in.mode_0x0043_0x07=constant +hwmon_in.int_cons_0x0043_0x07=9 + +# vol68 +hwmon_in.mode_0x0044_0x00=config +hwmon_in.int_cons_0x0044_0x00=0 +hwmon_in.src_0x0044_0x00=file +hwmon_in.frmt_0x0044_0x00=buf +hwmon_in.fpath_0x0044_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0044_0x00=0 +hwmon_in.len_0x0044_0x00=8 +hwmon_in.bit_offset_0x0044_0x00= +hwmon_in.str_cons_0x0044_0x00=in5_input +hwmon_in.mode_0x0044_0x01=str_constant +hwmon_in.str_cons_0x0044_0x01=CPU_P0V6_VTT_V +hwmon_in.mode_0x0044_0x02=str_constant +hwmon_in.str_cons_0x0044_0x02=ucd90160 +hwmon_in.mode_0x0044_0x03=constant +hwmon_in.int_cons_0x0044_0x03=682 +hwmon_in.mode_0x0044_0x05=constant +hwmon_in.int_cons_0x0044_0x05=558 +hwmon_in.mode_0x0044_0x08=constant +hwmon_in.int_cons_0x0044_0x08=615 +hwmon_in.mode_0x0044_0x07=constant +hwmon_in.int_cons_0x0044_0x07=3 + +# vol69 +hwmon_in.mode_0x0045_0x00=config +hwmon_in.int_cons_0x0045_0x00=0 +hwmon_in.src_0x0045_0x00=file +hwmon_in.frmt_0x0045_0x00=buf +hwmon_in.fpath_0x0045_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0045_0x00=0 +hwmon_in.len_0x0045_0x00=8 +hwmon_in.bit_offset_0x0045_0x00= +hwmon_in.str_cons_0x0045_0x00=in6_input +hwmon_in.mode_0x0045_0x01=str_constant +hwmon_in.str_cons_0x0045_0x01=CPU_VNN_PCH_V +hwmon_in.mode_0x0045_0x02=str_constant +hwmon_in.str_cons_0x0045_0x02=ucd90160 +hwmon_in.mode_0x0045_0x03=constant +hwmon_in.int_cons_0x0045_0x03=1320 +hwmon_in.mode_0x0045_0x05=constant +hwmon_in.int_cons_0x0045_0x05=540 +hwmon_in.mode_0x0045_0x08=constant +hwmon_in.int_cons_0x0045_0x08=1000 +hwmon_in.mode_0x0045_0x07=constant +hwmon_in.int_cons_0x0045_0x07=5 + +# vol70 +hwmon_in.mode_0x0046_0x00=config +hwmon_in.int_cons_0x0046_0x00=0 +hwmon_in.src_0x0046_0x00=file +hwmon_in.frmt_0x0046_0x00=buf +hwmon_in.fpath_0x0046_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0046_0x00=0 +hwmon_in.len_0x0046_0x00=8 +hwmon_in.bit_offset_0x0046_0x00= +hwmon_in.str_cons_0x0046_0x00=in7_input +hwmon_in.mode_0x0046_0x01=str_constant +hwmon_in.str_cons_0x0046_0x01=CPU_VNN_NAC_V +hwmon_in.mode_0x0046_0x02=str_constant +hwmon_in.str_cons_0x0046_0x02=ucd90160 +hwmon_in.mode_0x0046_0x03=constant +hwmon_in.int_cons_0x0046_0x03=1320 +hwmon_in.mode_0x0046_0x05=constant +hwmon_in.int_cons_0x0046_0x05=540 +hwmon_in.mode_0x0046_0x08=constant +hwmon_in.int_cons_0x0046_0x08=1000 +hwmon_in.mode_0x0046_0x07=constant +hwmon_in.int_cons_0x0046_0x07=5 + +# vol71 +hwmon_in.mode_0x0047_0x00=config +hwmon_in.int_cons_0x0047_0x00=0 +hwmon_in.src_0x0047_0x00=file +hwmon_in.frmt_0x0047_0x00=buf +hwmon_in.fpath_0x0047_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0047_0x00=0 +hwmon_in.len_0x0047_0x00=8 +hwmon_in.bit_offset_0x0047_0x00= +hwmon_in.str_cons_0x0047_0x00=in8_input +hwmon_in.mode_0x0047_0x01=str_constant +hwmon_in.str_cons_0x0047_0x01=CPU_P2V5_VPP_V +hwmon_in.mode_0x0047_0x02=str_constant +hwmon_in.str_cons_0x0047_0x02=ucd90160 +hwmon_in.mode_0x0047_0x03=constant +hwmon_in.int_cons_0x0047_0x03=2750 +hwmon_in.mode_0x0047_0x05=constant +hwmon_in.int_cons_0x0047_0x05=2250 +hwmon_in.mode_0x0047_0x08=constant +hwmon_in.int_cons_0x0047_0x08=2500 +hwmon_in.mode_0x0047_0x07=constant +hwmon_in.int_cons_0x0047_0x07=12 + +# vol72 +hwmon_in.mode_0x0048_0x00=config +hwmon_in.int_cons_0x0048_0x00=0 +hwmon_in.src_0x0048_0x00=file +hwmon_in.frmt_0x0048_0x00=buf +hwmon_in.fpath_0x0048_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0048_0x00=0 +hwmon_in.len_0x0048_0x00=8 +hwmon_in.bit_offset_0x0048_0x00= +hwmon_in.str_cons_0x0048_0x00=in9_input +hwmon_in.mode_0x0048_0x01=str_constant +hwmon_in.str_cons_0x0048_0x01=CPU_VCC_ANA_V +hwmon_in.mode_0x0048_0x02=str_constant +hwmon_in.str_cons_0x0048_0x02=ucd90160 +hwmon_in.mode_0x0048_0x03=constant +hwmon_in.int_cons_0x0048_0x03=1100 +hwmon_in.mode_0x0048_0x05=constant +hwmon_in.int_cons_0x0048_0x05=900 +hwmon_in.mode_0x0048_0x08=constant +hwmon_in.int_cons_0x0048_0x08=1000 +hwmon_in.mode_0x0048_0x07=constant +hwmon_in.int_cons_0x0048_0x07=5 + +# vol73 +hwmon_in.mode_0x0049_0x00=config +hwmon_in.int_cons_0x0049_0x00=0 +hwmon_in.src_0x0049_0x00=file +hwmon_in.frmt_0x0049_0x00=buf +hwmon_in.fpath_0x0049_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0049_0x00=0 +hwmon_in.len_0x0049_0x00=8 +hwmon_in.bit_offset_0x0049_0x00= +hwmon_in.str_cons_0x0049_0x00=in10_input +hwmon_in.mode_0x0049_0x01=str_constant +hwmon_in.str_cons_0x0049_0x01=CPU_P3V3_STBY_V +hwmon_in.mode_0x0049_0x02=str_constant +hwmon_in.str_cons_0x0049_0x02=ucd90160 +hwmon_in.mode_0x0049_0x03=constant +hwmon_in.int_cons_0x0049_0x03=3630 +hwmon_in.mode_0x0049_0x05=constant +hwmon_in.int_cons_0x0049_0x05=2970 +hwmon_in.mode_0x0049_0x08=constant +hwmon_in.int_cons_0x0049_0x08=3300 +hwmon_in.mode_0x0049_0x07=constant +hwmon_in.int_cons_0x0049_0x07=16 + +# vol74 +hwmon_in.mode_0x004a_0x00=config +hwmon_in.int_cons_0x004a_0x00=0 +hwmon_in.src_0x004a_0x00=file +hwmon_in.frmt_0x004a_0x00=buf +hwmon_in.fpath_0x004a_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004a_0x00=0 +hwmon_in.len_0x004a_0x00=8 +hwmon_in.bit_offset_0x004a_0x00= +hwmon_in.str_cons_0x004a_0x00=in11_input +hwmon_in.mode_0x004a_0x01=str_constant +hwmon_in.str_cons_0x004a_0x01=CPU_P5V_AUX_V +hwmon_in.mode_0x004a_0x02=str_constant +hwmon_in.str_cons_0x004a_0x02=ucd90160 +hwmon_in.mode_0x004a_0x03=constant +hwmon_in.int_cons_0x004a_0x03=5750 +hwmon_in.mode_0x004a_0x05=constant +hwmon_in.int_cons_0x004a_0x05=4000 +hwmon_in.mode_0x004a_0x08=constant +hwmon_in.int_cons_0x004a_0x08=5000 +hwmon_in.mode_0x004a_0x07=constant +hwmon_in.int_cons_0x004a_0x07=25 + +# vol75 +hwmon_in.mode_0x004b_0x00=config +hwmon_in.int_cons_0x004b_0x00=0 +hwmon_in.src_0x004b_0x00=file +hwmon_in.frmt_0x004b_0x00=buf +hwmon_in.fpath_0x004b_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004b_0x00=0 +hwmon_in.len_0x004b_0x00=8 +hwmon_in.bit_offset_0x004b_0x00= +hwmon_in.str_cons_0x004b_0x00=in12_input +hwmon_in.mode_0x004b_0x01=str_constant +hwmon_in.str_cons_0x004b_0x01=CPU_P1V8_AUX_NAC_V +hwmon_in.mode_0x004b_0x02=str_constant +hwmon_in.str_cons_0x004b_0x02=ucd90160 +hwmon_in.mode_0x004b_0x03=constant +hwmon_in.int_cons_0x004b_0x03=1910 +hwmon_in.mode_0x004b_0x05=constant +hwmon_in.int_cons_0x004b_0x05=1690 +hwmon_in.mode_0x004b_0x08=constant +hwmon_in.int_cons_0x004b_0x08=1800 +hwmon_in.mode_0x004b_0x07=constant +hwmon_in.int_cons_0x004b_0x07=9 + +# vol76 +hwmon_in.mode_0x004c_0x00=config +hwmon_in.int_cons_0x004c_0x00=0 +hwmon_in.src_0x004c_0x00=file +hwmon_in.frmt_0x004c_0x00=buf +hwmon_in.fpath_0x004c_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004c_0x00=0 +hwmon_in.len_0x004c_0x00=8 +hwmon_in.bit_offset_0x004c_0x00= +hwmon_in.str_cons_0x004c_0x00=in13_input +hwmon_in.mode_0x004c_0x01=str_constant +hwmon_in.str_cons_0x004c_0x01=CPU_P3V3_AUX_V +hwmon_in.mode_0x004c_0x02=str_constant +hwmon_in.str_cons_0x004c_0x02=ucd90160 +hwmon_in.mode_0x004c_0x03=constant +hwmon_in.int_cons_0x004c_0x03=3630 +hwmon_in.mode_0x004c_0x05=constant +hwmon_in.int_cons_0x004c_0x05=2970 +hwmon_in.mode_0x004c_0x08=constant +hwmon_in.int_cons_0x004c_0x08=3300 +hwmon_in.mode_0x004c_0x07=constant +hwmon_in.int_cons_0x004c_0x07=16 + +# vol77 FANA_VDD3.3V +hwmon_in.mode_0x004d_0x00=config +hwmon_in.int_cons_0x004d_0x00=0 +hwmon_in.src_0x004d_0x00=cpld +hwmon_in.frmt_0x004d_0x00=num_bytes +hwmon_in.addr_0x004d_0x00=0x000600e8 +hwmon_in.len_0x004d_0x00=2 +hwmon_in.int_extra1_0x004d_0x00=0x000600e8 +hwmon_in.int_extra2_0x004d_0x00=2000 +hwmon_in.int_extra3_0x004d_0x00=1 + +hwmon_in.mode_0x004d_0x01=str_constant +hwmon_in.str_cons_0x004d_0x01=FANA_VDD3.3V + +hwmon_in.mode_0x004d_0x02=str_constant +hwmon_in.str_cons_0x004d_0x02=cpld + +hwmon_in.mode_0x004d_0x03=str_constant +hwmon_in.str_cons_0x004d_0x03=3630 + +hwmon_in.mode_0x004d_0x05=str_constant +hwmon_in.str_cons_0x004d_0x05=2970 + +# vol78 FANB_VDD3.3V +hwmon_in.mode_0x004e_0x00=config +hwmon_in.int_cons_0x004e_0x00=0 +hwmon_in.src_0x004e_0x00=cpld +hwmon_in.frmt_0x004e_0x00=num_bytes +hwmon_in.addr_0x004e_0x00=0x000600ea +hwmon_in.len_0x004e_0x00=2 +hwmon_in.int_extra1_0x004e_0x00=0x000600ea +hwmon_in.int_extra2_0x004e_0x00=2000 +hwmon_in.int_extra3_0x004e_0x00=1 + +hwmon_in.mode_0x004e_0x01=str_constant +hwmon_in.str_cons_0x004e_0x01=FANB_VDD3.3V + +hwmon_in.mode_0x004e_0x02=str_constant +hwmon_in.str_cons_0x004e_0x02=cpld + +hwmon_in.mode_0x004e_0x03=str_constant +hwmon_in.str_cons_0x004e_0x03=3630 + +hwmon_in.mode_0x004e_0x05=str_constant +hwmon_in.str_cons_0x004e_0x05=2970 + +# vol79 FANC_VDD3.3V +hwmon_in.mode_0x004f_0x00=config +hwmon_in.int_cons_0x004f_0x00=0 +hwmon_in.src_0x004f_0x00=cpld +hwmon_in.frmt_0x004f_0x00=num_bytes +hwmon_in.addr_0x004f_0x00=0x000600ec +hwmon_in.len_0x004f_0x00=2 +hwmon_in.int_extra1_0x004f_0x00=0x000600ec +hwmon_in.int_extra2_0x004f_0x00=2000 +hwmon_in.int_extra3_0x004f_0x00=1 + +hwmon_in.mode_0x004f_0x01=str_constant +hwmon_in.str_cons_0x004f_0x01=FANC_VDD3.3V + +hwmon_in.mode_0x004f_0x02=str_constant +hwmon_in.str_cons_0x004f_0x02=cpld + +hwmon_in.mode_0x004f_0x03=str_constant +hwmon_in.str_cons_0x004f_0x03=3630 + +hwmon_in.mode_0x004f_0x05=str_constant +hwmon_in.str_cons_0x004f_0x05=2970 + +# vol80 FAND_VDD3.3V +hwmon_in.mode_0x0050_0x00=config +hwmon_in.int_cons_0x0050_0x00=0 +hwmon_in.src_0x0050_0x00=cpld +hwmon_in.frmt_0x0050_0x00=num_bytes +hwmon_in.addr_0x0050_0x00=0x000600ee +hwmon_in.len_0x0050_0x00=2 +hwmon_in.int_extra1_0x0050_0x00=0x000600ee +hwmon_in.int_extra2_0x0050_0x00=2000 +hwmon_in.int_extra3_0x0050_0x00=1 + +hwmon_in.mode_0x0050_0x01=str_constant +hwmon_in.str_cons_0x0050_0x01=FAND_VDD3.3V + +hwmon_in.mode_0x0050_0x02=str_constant +hwmon_in.str_cons_0x0050_0x02=cpld + +hwmon_in.mode_0x0050_0x03=str_constant +hwmon_in.str_cons_0x0050_0x03=3630 + +hwmon_in.mode_0x0050_0x05=str_constant +hwmon_in.str_cons_0x0050_0x05=2970 + +# vol81 FAN_VDD12V_1 +hwmon_in.mode_0x0051_0x00=config +hwmon_in.int_cons_0x0051_0x00=0 +hwmon_in.src_0x0051_0x00=cpld +hwmon_in.frmt_0x0051_0x00=num_bytes +hwmon_in.addr_0x0051_0x00=0x000600e0 +hwmon_in.len_0x0051_0x00=2 +hwmon_in.int_extra1_0x0051_0x00=0x000600e0 +hwmon_in.int_extra2_0x0051_0x00=7070 +hwmon_in.int_extra3_0x0051_0x00=1 + +hwmon_in.mode_0x0051_0x01=str_constant +hwmon_in.str_cons_0x0051_0x01=FAN_VDD12V_1 + +hwmon_in.mode_0x0051_0x02=str_constant +hwmon_in.str_cons_0x0051_0x02=cpld + +hwmon_in.mode_0x0051_0x03=str_constant +hwmon_in.str_cons_0x0051_0x03=13200 + +hwmon_in.mode_0x0051_0x05=str_constant +hwmon_in.str_cons_0x0051_0x05=10800 + +# vol82 FAN_VDD12V_2 +hwmon_in.mode_0x0052_0x00=config +hwmon_in.int_cons_0x0052_0x00=0 +hwmon_in.src_0x0052_0x00=cpld +hwmon_in.frmt_0x0052_0x00=num_bytes +hwmon_in.addr_0x0052_0x00=0x000600e2 +hwmon_in.len_0x0052_0x00=2 +hwmon_in.int_extra1_0x0052_0x00=0x000600e2 +hwmon_in.int_extra2_0x0052_0x00=7070 +hwmon_in.int_extra3_0x0052_0x00=1 + +hwmon_in.mode_0x0052_0x01=str_constant +hwmon_in.str_cons_0x0052_0x01=FAN_VDD12V_2 + +hwmon_in.mode_0x0052_0x02=str_constant +hwmon_in.str_cons_0x0052_0x02=cpld + +hwmon_in.mode_0x0052_0x03=str_constant +hwmon_in.str_cons_0x0052_0x03=13200 + +hwmon_in.mode_0x0052_0x05=str_constant +hwmon_in.str_cons_0x0052_0x05=10800 + +# vol83 FAN_VDD12V_3 +hwmon_in.mode_0x0053_0x00=config +hwmon_in.int_cons_0x0053_0x00=0 +hwmon_in.src_0x0053_0x00=cpld +hwmon_in.frmt_0x0053_0x00=num_bytes +hwmon_in.addr_0x0053_0x00=0x000600e4 +hwmon_in.len_0x0053_0x00=2 +hwmon_in.int_extra1_0x0053_0x00=0x000600e4 +hwmon_in.int_extra2_0x0053_0x00=7070 +hwmon_in.int_extra3_0x0053_0x00=1 + +hwmon_in.mode_0x0053_0x01=str_constant +hwmon_in.str_cons_0x0053_0x01=FAN_VDD12V_3 + +hwmon_in.mode_0x0053_0x02=str_constant +hwmon_in.str_cons_0x0053_0x02=cpld + +hwmon_in.mode_0x0053_0x03=str_constant +hwmon_in.str_cons_0x0053_0x03=13200 + +hwmon_in.mode_0x0053_0x05=str_constant +hwmon_in.str_cons_0x0053_0x05=10800 + +# vol84 FAN_VDD12V_4 +hwmon_in.mode_0x0054_0x00=config +hwmon_in.int_cons_0x0054_0x00=0 +hwmon_in.src_0x0054_0x00=cpld +hwmon_in.frmt_0x0054_0x00=num_bytes +hwmon_in.addr_0x0054_0x00=0x000600e6 +hwmon_in.len_0x0054_0x00=2 +hwmon_in.int_extra1_0x0054_0x00=0x000600e6 +hwmon_in.int_extra2_0x0054_0x00=7070 +hwmon_in.int_extra3_0x0054_0x00=1 + +hwmon_in.mode_0x0054_0x01=str_constant +hwmon_in.str_cons_0x0054_0x01=FAN_VDD12V_4 + +hwmon_in.mode_0x0054_0x02=str_constant +hwmon_in.str_cons_0x0054_0x02=cpld + +hwmon_in.mode_0x0054_0x03=str_constant +hwmon_in.str_cons_0x0054_0x03=13200 + +hwmon_in.mode_0x0054_0x05=str_constant +hwmon_in.str_cons_0x0054_0x05=10800 + +# vol85 +hwmon_in.mode_0x0055_0x00=config +hwmon_in.int_cons_0x0055_0x00=0 +hwmon_in.src_0x0055_0x00=cpld +hwmon_in.frmt_0x0055_0x00=num_bytes +hwmon_in.addr_0x0055_0x00=0x00040092 +hwmon_in.len_0x0055_0x00=2 +hwmon_in.int_extra1_0x0055_0x00=0x00040092 +hwmon_in.int_extra2_0x0055_0x00=2000 +hwmon_in.int_extra3_0x0055_0x00=1 + +hwmon_in.mode_0x0055_0x01=str_constant +hwmon_in.str_cons_0x0055_0x01=OSFP_CPLD_VDD3.3V_A1 + +hwmon_in.mode_0x0055_0x02=str_constant +hwmon_in.str_cons_0x0055_0x02=cpld + +hwmon_in.mode_0x0055_0x03=str_constant +hwmon_in.str_cons_0x0055_0x03=3630 + +hwmon_in.mode_0x0055_0x05=str_constant +hwmon_in.str_cons_0x0055_0x05=2970 + +# vol86 +hwmon_in.mode_0x0056_0x00=config +hwmon_in.int_cons_0x0056_0x00=0 +hwmon_in.src_0x0056_0x00=cpld +hwmon_in.frmt_0x0056_0x00=num_bytes +hwmon_in.addr_0x0056_0x00=0x00040094 +hwmon_in.len_0x0056_0x00=2 +hwmon_in.int_extra1_0x0056_0x00=0x00040094 +hwmon_in.int_extra2_0x0056_0x00=2000 +hwmon_in.int_extra3_0x0056_0x00=1 + +hwmon_in.mode_0x0056_0x01=str_constant +hwmon_in.str_cons_0x0056_0x01=OSFP_CPLD_VDD3.3V_A2 + +hwmon_in.mode_0x0056_0x02=str_constant +hwmon_in.str_cons_0x0056_0x02=cpld + +hwmon_in.mode_0x0056_0x03=str_constant +hwmon_in.str_cons_0x0056_0x03=3630 + +hwmon_in.mode_0x0056_0x05=str_constant +hwmon_in.str_cons_0x0056_0x05=2970 + +# vol87 +hwmon_in.mode_0x0057_0x00=config +hwmon_in.int_cons_0x0057_0x00=0 +hwmon_in.src_0x0057_0x00=cpld +hwmon_in.frmt_0x0057_0x00=num_bytes +hwmon_in.addr_0x0057_0x00=0x00040096 +hwmon_in.len_0x0057_0x00=2 +hwmon_in.int_extra1_0x0057_0x00=0x00040096 +hwmon_in.int_extra2_0x0057_0x00=2000 +hwmon_in.int_extra3_0x0057_0x00=1 + +hwmon_in.mode_0x0057_0x01=str_constant +hwmon_in.str_cons_0x0057_0x01=OSFP_CPLD_VDD3.3V_A3 + +hwmon_in.mode_0x0057_0x02=str_constant +hwmon_in.str_cons_0x0057_0x02=cpld + +hwmon_in.mode_0x0057_0x03=str_constant +hwmon_in.str_cons_0x0057_0x03=3630 + +hwmon_in.mode_0x0057_0x05=str_constant +hwmon_in.str_cons_0x0057_0x05=2970 + +# vol88 +hwmon_in.mode_0x0058_0x00=config +hwmon_in.int_cons_0x0058_0x00=0 +hwmon_in.src_0x0058_0x00=cpld +hwmon_in.frmt_0x0058_0x00=num_bytes +hwmon_in.addr_0x0058_0x00=0x00040098 +hwmon_in.len_0x0058_0x00=2 +hwmon_in.int_extra1_0x0058_0x00=0x00040098 +hwmon_in.int_extra2_0x0058_0x00=2000 +hwmon_in.int_extra3_0x0058_0x00=1 + +hwmon_in.mode_0x0058_0x01=str_constant +hwmon_in.str_cons_0x0058_0x01=OSFP_CPLD_VDD3.3V_A4 + +hwmon_in.mode_0x0058_0x02=str_constant +hwmon_in.str_cons_0x0058_0x02=cpld + +hwmon_in.mode_0x0058_0x03=str_constant +hwmon_in.str_cons_0x0058_0x03=3630 + +hwmon_in.mode_0x0058_0x05=str_constant +hwmon_in.str_cons_0x0058_0x05=2970 + +# vol89 +hwmon_in.mode_0x0059_0x00=config +hwmon_in.int_cons_0x0059_0x00=0 +hwmon_in.src_0x0059_0x00=cpld +hwmon_in.frmt_0x0059_0x00=num_bytes +hwmon_in.addr_0x0059_0x00=0x0004009a +hwmon_in.len_0x0059_0x00=2 +hwmon_in.int_extra1_0x0059_0x00=0x0004009a +hwmon_in.int_extra2_0x0059_0x00=2000 +hwmon_in.int_extra3_0x0059_0x00=1 + +hwmon_in.mode_0x0059_0x01=str_constant +hwmon_in.str_cons_0x0059_0x01=OSFP_CPLD_VDD3.3V_A5 + +hwmon_in.mode_0x0059_0x02=str_constant +hwmon_in.str_cons_0x0059_0x02=cpld + +hwmon_in.mode_0x0059_0x03=str_constant +hwmon_in.str_cons_0x0059_0x03=3630 + +hwmon_in.mode_0x0059_0x05=str_constant +hwmon_in.str_cons_0x0059_0x05=2970 + +# vol90 +hwmon_in.mode_0x005a_0x00=config +hwmon_in.int_cons_0x005a_0x00=0 +hwmon_in.src_0x005a_0x00=cpld +hwmon_in.frmt_0x005a_0x00=num_bytes +hwmon_in.addr_0x005a_0x00=0x0004009c +hwmon_in.len_0x005a_0x00=2 +hwmon_in.int_extra1_0x005a_0x00=0x0004009c +hwmon_in.int_extra2_0x005a_0x00=2000 +hwmon_in.int_extra3_0x005a_0x00=1 + +hwmon_in.mode_0x005a_0x01=str_constant +hwmon_in.str_cons_0x005a_0x01=OSFP_CPLD_VDD3.3V_A6 + +hwmon_in.mode_0x005a_0x02=str_constant +hwmon_in.str_cons_0x005a_0x02=cpld + +hwmon_in.mode_0x005a_0x03=str_constant +hwmon_in.str_cons_0x005a_0x03=3630 + +hwmon_in.mode_0x005a_0x05=str_constant +hwmon_in.str_cons_0x005a_0x05=2970 + +# vol91 +hwmon_in.mode_0x005b_0x00=config +hwmon_in.int_cons_0x005b_0x00=0 +hwmon_in.src_0x005b_0x00=cpld +hwmon_in.frmt_0x005b_0x00=num_bytes +hwmon_in.addr_0x005b_0x00=0x0004009e +hwmon_in.len_0x005b_0x00=2 +hwmon_in.int_extra1_0x005b_0x00=0x0004009e +hwmon_in.int_extra2_0x005b_0x00=2000 +hwmon_in.int_extra3_0x005b_0x00=1 + +hwmon_in.mode_0x005b_0x01=str_constant +hwmon_in.str_cons_0x005b_0x01=OSFP_CPLD_VDD3.3V_A7 + +hwmon_in.mode_0x005b_0x02=str_constant +hwmon_in.str_cons_0x005b_0x02=cpld + +hwmon_in.mode_0x005b_0x03=str_constant +hwmon_in.str_cons_0x005b_0x03=3630 + +hwmon_in.mode_0x005b_0x05=str_constant +hwmon_in.str_cons_0x005b_0x05=2970 + +# vol92 +hwmon_in.mode_0x005c_0x00=config +hwmon_in.int_cons_0x005c_0x00=0 +hwmon_in.src_0x005c_0x00=cpld +hwmon_in.frmt_0x005c_0x00=num_bytes +hwmon_in.addr_0x005c_0x00=0x000400a0 +hwmon_in.len_0x005c_0x00=2 +hwmon_in.int_extra1_0x005c_0x00=0x000400a0 +hwmon_in.int_extra2_0x005c_0x00=2000 +hwmon_in.int_extra3_0x005c_0x00=1 + +hwmon_in.mode_0x005c_0x01=str_constant +hwmon_in.str_cons_0x005c_0x01=OSFP_CPLD_VDD3.3V_A8 + +hwmon_in.mode_0x005c_0x02=str_constant +hwmon_in.str_cons_0x005c_0x02=cpld + +hwmon_in.mode_0x005c_0x03=str_constant +hwmon_in.str_cons_0x005c_0x03=3630 + +hwmon_in.mode_0x005c_0x05=str_constant +hwmon_in.str_cons_0x005c_0x05=2970 + +# vol93 +hwmon_in.mode_0x005d_0x00=config +hwmon_in.int_cons_0x005d_0x00=0 +hwmon_in.src_0x005d_0x00=cpld +hwmon_in.frmt_0x005d_0x00=num_bytes +hwmon_in.addr_0x005d_0x00=0x000400a2 +hwmon_in.len_0x005d_0x00=2 +hwmon_in.int_extra1_0x005d_0x00=0x000400a2 +hwmon_in.int_extra2_0x005d_0x00=2000 +hwmon_in.int_extra3_0x005d_0x00=1 + +hwmon_in.mode_0x005d_0x01=str_constant +hwmon_in.str_cons_0x005d_0x01=OSFP_CPLD_VDD3.3V_B1 + +hwmon_in.mode_0x005d_0x02=str_constant +hwmon_in.str_cons_0x005d_0x02=cpld + +hwmon_in.mode_0x005d_0x03=str_constant +hwmon_in.str_cons_0x005d_0x03=3630 + +hwmon_in.mode_0x005d_0x05=str_constant +hwmon_in.str_cons_0x005d_0x05=2970 + +# vol94 +hwmon_in.mode_0x005e_0x00=config +hwmon_in.int_cons_0x005e_0x00=0 +hwmon_in.src_0x005e_0x00=cpld +hwmon_in.frmt_0x005e_0x00=num_bytes +hwmon_in.addr_0x005e_0x00=0x000400a4 +hwmon_in.len_0x005e_0x00=2 +hwmon_in.int_extra1_0x005e_0x00=0x000400a4 +hwmon_in.int_extra2_0x005e_0x00=2000 +hwmon_in.int_extra3_0x005e_0x00=1 + +hwmon_in.mode_0x005e_0x01=str_constant +hwmon_in.str_cons_0x005e_0x01=OSFP_CPLD_VDD3.3V_B2 + +hwmon_in.mode_0x005e_0x02=str_constant +hwmon_in.str_cons_0x005e_0x02=cpld + +hwmon_in.mode_0x005e_0x03=str_constant +hwmon_in.str_cons_0x005e_0x03=3630 + +hwmon_in.mode_0x005e_0x05=str_constant +hwmon_in.str_cons_0x005e_0x05=2970 + +# vol95 +hwmon_in.mode_0x005f_0x00=config +hwmon_in.int_cons_0x005f_0x00=0 +hwmon_in.src_0x005f_0x00=cpld +hwmon_in.frmt_0x005f_0x00=num_bytes +hwmon_in.addr_0x005f_0x00=0x000400a6 +hwmon_in.len_0x005f_0x00=2 +hwmon_in.int_extra1_0x005f_0x00=0x000400a6 +hwmon_in.int_extra2_0x005f_0x00=2000 +hwmon_in.int_extra3_0x005f_0x00=1 + +hwmon_in.mode_0x005f_0x01=str_constant +hwmon_in.str_cons_0x005f_0x01=OSFP_CPLD_VDD3.3V_B3 + +hwmon_in.mode_0x005f_0x02=str_constant +hwmon_in.str_cons_0x005f_0x02=cpld + +hwmon_in.mode_0x005f_0x03=str_constant +hwmon_in.str_cons_0x005f_0x03=3630 + +hwmon_in.mode_0x005f_0x05=str_constant +hwmon_in.str_cons_0x005f_0x05=2970 + +# vol96 +hwmon_in.mode_0x0060_0x00=config +hwmon_in.int_cons_0x0060_0x00=0 +hwmon_in.src_0x0060_0x00=cpld +hwmon_in.frmt_0x0060_0x00=num_bytes +hwmon_in.addr_0x0060_0x00=0x000400a8 +hwmon_in.len_0x0060_0x00=2 +hwmon_in.int_extra1_0x0060_0x00=0x000400a8 +hwmon_in.int_extra2_0x0060_0x00=2000 +hwmon_in.int_extra3_0x0060_0x00=1 + +hwmon_in.mode_0x0060_0x01=str_constant +hwmon_in.str_cons_0x0060_0x01=OSFP_CPLD_VDD3.3V_B4 + +hwmon_in.mode_0x0060_0x02=str_constant +hwmon_in.str_cons_0x0060_0x02=cpld + +hwmon_in.mode_0x0060_0x03=str_constant +hwmon_in.str_cons_0x0060_0x03=3630 + +hwmon_in.mode_0x0060_0x05=str_constant +hwmon_in.str_cons_0x0060_0x05=2970 + +# vol97 +hwmon_in.mode_0x0061_0x00=config +hwmon_in.int_cons_0x0061_0x00=0 +hwmon_in.src_0x0061_0x00=cpld +hwmon_in.frmt_0x0061_0x00=num_bytes +hwmon_in.addr_0x0061_0x00=0x000400aa +hwmon_in.len_0x0061_0x00=2 +hwmon_in.int_extra1_0x0061_0x00=0x000400aa +hwmon_in.int_extra2_0x0061_0x00=2000 +hwmon_in.int_extra3_0x0061_0x00=1 + +hwmon_in.mode_0x0061_0x01=str_constant +hwmon_in.str_cons_0x0061_0x01=OSFP_CPLD_VDD3.3V_B5 + +hwmon_in.mode_0x0061_0x02=str_constant +hwmon_in.str_cons_0x0061_0x02=cpld + +hwmon_in.mode_0x0061_0x03=str_constant +hwmon_in.str_cons_0x0061_0x03=3630 + +hwmon_in.mode_0x0061_0x05=str_constant +hwmon_in.str_cons_0x0061_0x05=2970 + +# vol98 +hwmon_in.mode_0x0062_0x00=config +hwmon_in.int_cons_0x0062_0x00=0 +hwmon_in.src_0x0062_0x00=cpld +hwmon_in.frmt_0x0062_0x00=num_bytes +hwmon_in.addr_0x0062_0x00=0x000400ac +hwmon_in.len_0x0062_0x00=2 +hwmon_in.int_extra1_0x0062_0x00=0x000400ac +hwmon_in.int_extra2_0x0062_0x00=2000 +hwmon_in.int_extra3_0x0062_0x00=1 + +hwmon_in.mode_0x0062_0x01=str_constant +hwmon_in.str_cons_0x0062_0x01=OSFP_CPLD_VDD3.3V_B6 + +hwmon_in.mode_0x0062_0x02=str_constant +hwmon_in.str_cons_0x0062_0x02=cpld + +hwmon_in.mode_0x0062_0x03=str_constant +hwmon_in.str_cons_0x0062_0x03=3630 + +hwmon_in.mode_0x0062_0x05=str_constant +hwmon_in.str_cons_0x0062_0x05=2970 + +# vol99 +hwmon_in.mode_0x0063_0x00=config +hwmon_in.int_cons_0x0063_0x00=0 +hwmon_in.src_0x0063_0x00=cpld +hwmon_in.frmt_0x0063_0x00=num_bytes +hwmon_in.addr_0x0063_0x00=0x000400ae +hwmon_in.len_0x0063_0x00=2 +hwmon_in.int_extra1_0x0063_0x00=0x000400ae +hwmon_in.int_extra2_0x0063_0x00=2000 +hwmon_in.int_extra3_0x0063_0x00=1 + +hwmon_in.mode_0x0063_0x01=str_constant +hwmon_in.str_cons_0x0063_0x01=OSFP_CPLD_VDD3.3V_B7 + +hwmon_in.mode_0x0063_0x02=str_constant +hwmon_in.str_cons_0x0063_0x02=cpld + +hwmon_in.mode_0x0063_0x03=str_constant +hwmon_in.str_cons_0x0063_0x03=3630 + +hwmon_in.mode_0x0063_0x05=str_constant +hwmon_in.str_cons_0x0063_0x05=2970 + +# vol100 +hwmon_in.mode_0x0064_0x00=config +hwmon_in.int_cons_0x0064_0x00=0 +hwmon_in.src_0x0064_0x00=cpld +hwmon_in.frmt_0x0064_0x00=num_bytes +hwmon_in.addr_0x0064_0x00=0x000400b0 +hwmon_in.len_0x0064_0x00=2 +hwmon_in.int_extra1_0x0064_0x00=0x000400b0 +hwmon_in.int_extra2_0x0064_0x00=2000 +hwmon_in.int_extra3_0x0064_0x00=1 + +hwmon_in.mode_0x0064_0x01=str_constant +hwmon_in.str_cons_0x0064_0x01=OSFP_CPLD_VDD3.3V_B8 + +hwmon_in.mode_0x0064_0x02=str_constant +hwmon_in.str_cons_0x0064_0x02=cpld + +hwmon_in.mode_0x0064_0x03=str_constant +hwmon_in.str_cons_0x0064_0x03=3630 + +hwmon_in.mode_0x0064_0x05=str_constant +hwmon_in.str_cons_0x0064_0x05=2970 + + +# vol101 +hwmon_in.mode_0x0065_0x00=config +hwmon_in.int_cons_0x0065_0x00=3 +hwmon_in.src_0x0065_0x00=file +hwmon_in.frmt_0x0065_0x00=buf +hwmon_in.fpath_0x0065_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0065_0x00=0 +hwmon_in.len_0x0065_0x00=8 +hwmon_in.bit_offset_0x0065_0x00=0 +hwmon_in.str_cons_0x0065_0x00=in1_input +hwmon_in.mode_0x0065_0x01=str_constant +hwmon_in.str_cons_0x0065_0x01=VCC_3V3_BMC +hwmon_in.mode_0x0065_0x02=str_constant +hwmon_in.str_cons_0x0065_0x02=ucd9081 +hwmon_in.mode_0x0065_0x03=constant +hwmon_in.int_cons_0x0065_0x03=3630 +hwmon_in.mode_0x0065_0x05=constant +hwmon_in.int_cons_0x0065_0x05=2970 +hwmon_in.mode_0x0065_0x08=constant +hwmon_in.int_cons_0x0065_0x08=3300 +hwmon_in.mode_0x0065_0x07=constant +hwmon_in.int_cons_0x0065_0x07=5 +hwmon_in.int_extra1_0x0065_0x00=1500 + +# vol102 +hwmon_in.mode_0x0066_0x00=config +hwmon_in.int_cons_0x0066_0x00=3 +hwmon_in.src_0x0066_0x00=file +hwmon_in.frmt_0x0066_0x00=buf +hwmon_in.fpath_0x0066_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0066_0x00=0 +hwmon_in.len_0x0066_0x00=8 +hwmon_in.bit_offset_0x0066_0x00=0 +hwmon_in.str_cons_0x0066_0x00=in2_input +hwmon_in.mode_0x0066_0x01=str_constant +hwmon_in.str_cons_0x0066_0x01=VCC_2V5_BMC +hwmon_in.mode_0x0066_0x02=str_constant +hwmon_in.str_cons_0x0066_0x02=ucd9081 +hwmon_in.mode_0x0066_0x03=constant +hwmon_in.int_cons_0x0066_0x03=2750 +hwmon_in.mode_0x0066_0x05=constant +hwmon_in.int_cons_0x0066_0x05=2250 +hwmon_in.mode_0x0066_0x08=constant +hwmon_in.int_cons_0x0066_0x08=2500 +hwmon_in.mode_0x0066_0x07=constant +hwmon_in.int_cons_0x0066_0x07=5 +hwmon_in.int_extra1_0x0066_0x00=1500 + + +# vol103 +hwmon_in.mode_0x0067_0x00=config +hwmon_in.int_cons_0x0067_0x00=0 +hwmon_in.src_0x0067_0x00=file +hwmon_in.frmt_0x0067_0x00=buf +hwmon_in.fpath_0x0067_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0067_0x00=0 +hwmon_in.len_0x0067_0x00=8 +hwmon_in.bit_offset_0x0067_0x00= +hwmon_in.str_cons_0x0067_0x00=in3_input +hwmon_in.mode_0x0067_0x01=str_constant +hwmon_in.str_cons_0x0067_0x01=VCC_1V8_BMC +hwmon_in.mode_0x0067_0x02=str_constant +hwmon_in.str_cons_0x0067_0x02=ucd9081 +hwmon_in.mode_0x0067_0x03=constant +hwmon_in.int_cons_0x0067_0x03=1980 +hwmon_in.mode_0x0067_0x05=constant +hwmon_in.int_cons_0x0067_0x05=1620 +hwmon_in.mode_0x0067_0x08=constant +hwmon_in.int_cons_0x0067_0x08=1800 +hwmon_in.mode_0x0067_0x07=constant +hwmon_in.int_cons_0x0067_0x07=5 + +# vol104 +hwmon_in.mode_0x0068_0x00=config +hwmon_in.int_cons_0x0068_0x00=3 +hwmon_in.src_0x0068_0x00=file +hwmon_in.frmt_0x0068_0x00=buf +hwmon_in.fpath_0x0068_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0068_0x00=0 +hwmon_in.len_0x0068_0x00=8 +hwmon_in.bit_offset_0x0068_0x00=0 +hwmon_in.str_cons_0x0068_0x00=in4_input +hwmon_in.mode_0x0068_0x01=str_constant +hwmon_in.str_cons_0x0068_0x01=VCC_3V3_RGM_BMC +hwmon_in.mode_0x0068_0x02=str_constant +hwmon_in.str_cons_0x0068_0x02=ucd9081 +hwmon_in.mode_0x0068_0x03=constant +hwmon_in.int_cons_0x0068_0x03=3630 +hwmon_in.mode_0x0068_0x05=constant +hwmon_in.int_cons_0x0068_0x05=2970 +hwmon_in.mode_0x0068_0x08=constant +hwmon_in.int_cons_0x0068_0x08=3300 +hwmon_in.mode_0x0068_0x07=constant +hwmon_in.int_cons_0x0068_0x07=5 +hwmon_in.int_extra1_0x0068_0x00=1500 + +# vol105 +hwmon_in.mode_0x0069_0x00=config +hwmon_in.int_cons_0x0069_0x00=0 +hwmon_in.src_0x0069_0x00=file +hwmon_in.frmt_0x0069_0x00=buf +hwmon_in.fpath_0x0069_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0069_0x00=0 +hwmon_in.len_0x0069_0x00=8 +hwmon_in.bit_offset_0x0069_0x00= +hwmon_in.str_cons_0x0069_0x00=in5_input +hwmon_in.mode_0x0069_0x01=str_constant +hwmon_in.str_cons_0x0069_0x01=VCC_DDRVDDQ_BMC +hwmon_in.mode_0x0069_0x02=str_constant +hwmon_in.str_cons_0x0069_0x02=ucd9081 +hwmon_in.mode_0x0069_0x03=constant +hwmon_in.int_cons_0x0069_0x03=1320 +hwmon_in.mode_0x0069_0x05=constant +hwmon_in.int_cons_0x0069_0x05=1080 +hwmon_in.mode_0x0069_0x08=constant +hwmon_in.int_cons_0x0069_0x08=1200 +hwmon_in.mode_0x0069_0x07=constant +hwmon_in.int_cons_0x0069_0x07=5 + +# vol106 +hwmon_in.mode_0x006a_0x00=config +hwmon_in.int_cons_0x006a_0x00=0 +hwmon_in.src_0x006a_0x00=file +hwmon_in.frmt_0x006a_0x00=buf +hwmon_in.fpath_0x006a_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x006a_0x00=0 +hwmon_in.len_0x006a_0x00=8 +hwmon_in.bit_offset_0x006a_0x00= +hwmon_in.str_cons_0x006a_0x00=in6_input +hwmon_in.mode_0x006a_0x01=str_constant +hwmon_in.str_cons_0x006a_0x01=VCC_1V0_BMC +hwmon_in.mode_0x006a_0x02=str_constant +hwmon_in.str_cons_0x006a_0x02=ucd9081 +hwmon_in.mode_0x006a_0x03=constant +hwmon_in.int_cons_0x006a_0x03=1100 +hwmon_in.mode_0x006a_0x05=constant +hwmon_in.int_cons_0x006a_0x05=900 +hwmon_in.mode_0x006a_0x08=constant +hwmon_in.int_cons_0x006a_0x08=1000 +hwmon_in.mode_0x006a_0x07=constant +hwmon_in.int_cons_0x006a_0x07=5 + +# vol107 +hwmon_in.mode_0x006b_0x00=config +hwmon_in.int_cons_0x006b_0x00=0 +hwmon_in.src_0x006b_0x00=file +hwmon_in.frmt_0x006b_0x00=buf +hwmon_in.fpath_0x006b_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x006b_0x00=0 +hwmon_in.len_0x006b_0x00=8 +hwmon_in.bit_offset_0x006b_0x00= +hwmon_in.str_cons_0x006b_0x00=in7_input +hwmon_in.mode_0x006b_0x01=str_constant +hwmon_in.str_cons_0x006b_0x01=PE_RC_VCC18A_BMC +hwmon_in.mode_0x006b_0x02=str_constant +hwmon_in.str_cons_0x006b_0x02=ucd9081 +hwmon_in.mode_0x006b_0x03=constant +hwmon_in.int_cons_0x006b_0x03=1980 +hwmon_in.mode_0x006b_0x05=constant +hwmon_in.int_cons_0x006b_0x05=1620 +hwmon_in.mode_0x006b_0x08=constant +hwmon_in.int_cons_0x006b_0x08=1800 +hwmon_in.mode_0x006b_0x07=constant +hwmon_in.int_cons_0x006b_0x07=5 + +# vol108 +hwmon_in.mode_0x006c_0x00=config +hwmon_in.int_cons_0x006c_0x00=0 +hwmon_in.src_0x006c_0x00=cpld +hwmon_in.frmt_0x006c_0x00=num_bytes +hwmon_in.addr_0x006c_0x00=0x0005009a +hwmon_in.len_0x006c_0x00=2 +hwmon_in.int_extra1_0x006c_0x00=0x0005009a +hwmon_in.int_extra2_0x006c_0x00=2000 +hwmon_in.int_extra3_0x006c_0x00=1 + +hwmon_in.mode_0x006c_0x01=str_constant +hwmon_in.str_cons_0x006c_0x01=MGMT_VDD3.3V + +hwmon_in.mode_0x006c_0x02=str_constant +hwmon_in.str_cons_0x006c_0x02=cpld + +hwmon_in.mode_0x006c_0x03=str_constant +hwmon_in.str_cons_0x006c_0x03=3630 + +hwmon_in.mode_0x006c_0x05=str_constant +hwmon_in.str_cons_0x006c_0x05=2970 + +# vol109 +hwmon_in.mode_0x006d_0x00=config +hwmon_in.int_cons_0x006d_0x00=0 +hwmon_in.src_0x006d_0x00=cpld +hwmon_in.frmt_0x006d_0x00=num_bytes +hwmon_in.addr_0x006d_0x00=0x00050090 +hwmon_in.len_0x006d_0x00=2 +hwmon_in.int_extra1_0x006d_0x00=0x00050090 +hwmon_in.int_extra2_0x006d_0x00=2000 +hwmon_in.int_extra3_0x006d_0x00=1 + +hwmon_in.mode_0x006d_0x01=str_constant +hwmon_in.str_cons_0x006d_0x01=MGMT_VDD3.3V_PHY + +hwmon_in.mode_0x006d_0x02=str_constant +hwmon_in.str_cons_0x006d_0x02=cpld + +hwmon_in.mode_0x006d_0x03=str_constant +hwmon_in.str_cons_0x006d_0x03=3630 + +hwmon_in.mode_0x006d_0x05=str_constant +hwmon_in.str_cons_0x006d_0x05=2970 + +# vol110 +hwmon_in.mode_0x006e_0x00=config +hwmon_in.int_cons_0x006e_0x00=0 +hwmon_in.src_0x006e_0x00=cpld +hwmon_in.frmt_0x006e_0x00=num_bytes +hwmon_in.addr_0x006e_0x00=0x00050092 +hwmon_in.len_0x006e_0x00=2 +hwmon_in.int_extra1_0x006e_0x00=0x00050092 +hwmon_in.int_extra2_0x006e_0x00=1000 +hwmon_in.int_extra3_0x006e_0x00=1 + +hwmon_in.mode_0x006e_0x01=str_constant +hwmon_in.str_cons_0x006e_0x01=MGMT_PHY_VDD1_8V + +hwmon_in.mode_0x006e_0x02=str_constant +hwmon_in.str_cons_0x006e_0x02=cpld + +hwmon_in.mode_0x006e_0x03=str_constant +hwmon_in.str_cons_0x006e_0x03=1910 + +hwmon_in.mode_0x006e_0x05=str_constant +hwmon_in.str_cons_0x006e_0x05=1690 + +# vol111 +hwmon_in.mode_0x006f_0x00=config +hwmon_in.int_cons_0x006f_0x00=0 +hwmon_in.src_0x006f_0x00=cpld +hwmon_in.frmt_0x006f_0x00=num_bytes +hwmon_in.addr_0x006f_0x00=0x00050094 +hwmon_in.len_0x006f_0x00=2 +hwmon_in.int_extra1_0x006f_0x00=0x00050094 +hwmon_in.int_extra2_0x006f_0x00=1000 +hwmon_in.int_extra3_0x006f_0x00=1 + +hwmon_in.mode_0x006f_0x01=str_constant +hwmon_in.str_cons_0x006f_0x01=MGMT_PHY_VDD1_25V + +hwmon_in.mode_0x006f_0x02=str_constant +hwmon_in.str_cons_0x006f_0x02=cpld + +hwmon_in.mode_0x006f_0x03=str_constant +hwmon_in.str_cons_0x006f_0x03=1375 + +hwmon_in.mode_0x006f_0x05=str_constant +hwmon_in.str_cons_0x006f_0x05=1125 + +# vol112 +hwmon_in.mode_0x0070_0x00=config +hwmon_in.int_cons_0x0070_0x00=0 +hwmon_in.src_0x0070_0x00=cpld +hwmon_in.frmt_0x0070_0x00=num_bytes +hwmon_in.addr_0x0070_0x00=0x00050098 +hwmon_in.len_0x0070_0x00=2 +hwmon_in.int_extra1_0x0070_0x00=0x00050098 +hwmon_in.int_extra2_0x0070_0x00=1000 +hwmon_in.int_extra3_0x0070_0x00=1 + +hwmon_in.mode_0x0070_0x01=str_constant +hwmon_in.str_cons_0x0070_0x01=MGMT_PHY_VDD0_8V + +hwmon_in.mode_0x0070_0x02=str_constant +hwmon_in.str_cons_0x0070_0x02=cpld + +hwmon_in.mode_0x0070_0x03=str_constant +hwmon_in.str_cons_0x0070_0x03=880 + +hwmon_in.mode_0x0070_0x05=str_constant +hwmon_in.str_cons_0x0070_0x05=720 + + +# curr1 +hwmon_curr.mode_0x0001_0x00=config +hwmon_curr.int_cons_0x0001_0x00=0 +hwmon_curr.src_0x0001_0x00=file +hwmon_curr.frmt_0x0001_0x00=buf +hwmon_curr.fpath_0x0001_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_curr.addr_0x0001_0x00=0 +hwmon_curr.len_0x0001_0x00=8 +hwmon_curr.bit_offset_0x0001_0x00= +hwmon_curr.str_cons_0x0001_0x00=curr3_input +hwmon_curr.mode_0x0001_0x01=str_constant +hwmon_curr.str_cons_0x0001_0x01=CPU_XDPE_VCCIN_C +hwmon_curr.mode_0x0001_0x02=str_constant +hwmon_curr.str_cons_0x0001_0x02=xdpe12284c +hwmon_curr.mode_0x0001_0x03=constant +hwmon_curr.int_cons_0x0001_0x03=14700 +hwmon_curr.mode_0x0001_0x05=constant +hwmon_curr.int_cons_0x0001_0x05=-3100 + +# curr2 +hwmon_curr.mode_0x0002_0x00=config +hwmon_curr.int_cons_0x0002_0x00=0 +hwmon_curr.src_0x0002_0x00=file +hwmon_curr.frmt_0x0002_0x00=buf +hwmon_curr.fpath_0x0002_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_curr.addr_0x0002_0x00=0 +hwmon_curr.len_0x0002_0x00=8 +hwmon_curr.bit_offset_0x0002_0x00= +hwmon_curr.str_cons_0x0002_0x00=curr4_input +hwmon_curr.mode_0x0002_0x01=str_constant +hwmon_curr.str_cons_0x0002_0x01=CPU_XDPE_P1V8_C +hwmon_curr.mode_0x0002_0x02=str_constant +hwmon_curr.str_cons_0x0002_0x02=xdpe12284c +hwmon_curr.mode_0x0002_0x03=constant +hwmon_curr.int_cons_0x0002_0x03=4100 +hwmon_curr.mode_0x0002_0x05=constant +hwmon_curr.int_cons_0x0002_0x05=-3100 + +# curr3 +hwmon_curr.mode_0x0003_0x00=config +hwmon_curr.int_cons_0x0003_0x00=0 +hwmon_curr.src_0x0003_0x00=file +hwmon_curr.frmt_0x0003_0x00=buf +hwmon_curr.fpath_0x0003_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_curr.addr_0x0003_0x00=0 +hwmon_curr.len_0x0003_0x00=8 +hwmon_curr.bit_offset_0x0003_0x00= +hwmon_curr.str_cons_0x0003_0x00=curr3_input +hwmon_curr.mode_0x0003_0x01=str_constant +hwmon_curr.str_cons_0x0003_0x01=CPU_XDPE_P1V05_C +hwmon_curr.mode_0x0003_0x02=str_constant +hwmon_curr.str_cons_0x0003_0x02=xdpe12284c +hwmon_curr.mode_0x0003_0x03=constant +hwmon_curr.int_cons_0x0003_0x03=14300 +hwmon_curr.mode_0x0003_0x05=constant +hwmon_curr.int_cons_0x0003_0x05=-3100 + +# curr4 +hwmon_curr.mode_0x0004_0x00=config +hwmon_curr.int_cons_0x0004_0x00=0 +hwmon_curr.src_0x0004_0x00=file +hwmon_curr.frmt_0x0004_0x00=buf +hwmon_curr.fpath_0x0004_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_curr.addr_0x0004_0x00=0 +hwmon_curr.len_0x0004_0x00=8 +hwmon_curr.bit_offset_0x0004_0x00= +hwmon_curr.str_cons_0x0004_0x00=curr4_input +hwmon_curr.mode_0x0004_0x01=str_constant +hwmon_curr.str_cons_0x0004_0x01=CPU_XDPE_VNN_PCH_C +hwmon_curr.mode_0x0004_0x02=str_constant +hwmon_curr.str_cons_0x0004_0x02=xdpe12284c +hwmon_curr.mode_0x0004_0x03=constant +hwmon_curr.int_cons_0x0004_0x03=9100 +hwmon_curr.mode_0x0004_0x05=constant +hwmon_curr.int_cons_0x0004_0x05=-3100 + +# curr5 +hwmon_curr.mode_0x0005_0x00=config +hwmon_curr.int_cons_0x0005_0x00=0 +hwmon_curr.src_0x0005_0x00=file +hwmon_curr.frmt_0x0005_0x00=buf +hwmon_curr.fpath_0x0005_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_curr.addr_0x0005_0x00=0 +hwmon_curr.len_0x0005_0x00=8 +hwmon_curr.bit_offset_0x0005_0x00= +hwmon_curr.str_cons_0x0005_0x00=curr3_input +hwmon_curr.mode_0x0005_0x01=str_constant +hwmon_curr.str_cons_0x0005_0x01=CPU_XDPE_VNN_NAC_C +hwmon_curr.mode_0x0005_0x02=str_constant +hwmon_curr.str_cons_0x0005_0x02=xdpe12284c +hwmon_curr.mode_0x0005_0x03=constant +hwmon_curr.int_cons_0x0005_0x03=22000 +hwmon_curr.mode_0x0005_0x05=constant +hwmon_curr.int_cons_0x0005_0x05=-3100 + +# curr6 +hwmon_curr.mode_0x0006_0x00=config +hwmon_curr.int_cons_0x0006_0x00=0 +hwmon_curr.src_0x0006_0x00=file +hwmon_curr.frmt_0x0006_0x00=buf +hwmon_curr.fpath_0x0006_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_curr.addr_0x0006_0x00=0 +hwmon_curr.len_0x0006_0x00=8 +hwmon_curr.bit_offset_0x0006_0x00= +hwmon_curr.str_cons_0x0006_0x00=curr4_input +hwmon_curr.mode_0x0006_0x01=str_constant +hwmon_curr.str_cons_0x0006_0x01=CPU_XDPE_VCC_ANA_C +hwmon_curr.mode_0x0006_0x02=str_constant +hwmon_curr.str_cons_0x0006_0x02=xdpe12284c +hwmon_curr.mode_0x0006_0x03=constant +hwmon_curr.int_cons_0x0006_0x03=4100 +hwmon_curr.mode_0x0006_0x05=constant +hwmon_curr.int_cons_0x0006_0x05=-3100 + +# curr7 +hwmon_curr.mode_0x0007_0x00=config +hwmon_curr.int_cons_0x0007_0x00=0 +hwmon_curr.src_0x0007_0x00=file +hwmon_curr.frmt_0x0007_0x00=buf +hwmon_curr.fpath_0x0007_0x00=/sys/bus/i2c/devices/69-005e/hwmon/ +hwmon_curr.addr_0x0007_0x00=0 +hwmon_curr.len_0x0007_0x00=8 +hwmon_curr.bit_offset_0x0007_0x00= +hwmon_curr.str_cons_0x0007_0x00=curr3_input +hwmon_curr.mode_0x0007_0x01=str_constant +hwmon_curr.str_cons_0x0007_0x01=CPU_XDPE_P1V2_VDDQ_C +hwmon_curr.mode_0x0007_0x02=str_constant +hwmon_curr.str_cons_0x0007_0x02=xdpe12284c +hwmon_curr.mode_0x0007_0x03=constant +hwmon_curr.int_cons_0x0007_0x03=19000 +hwmon_curr.mode_0x0007_0x05=constant +hwmon_curr.int_cons_0x0007_0x05=-3100 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg new file mode 100644 index 000000000000..78acfeb999f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg @@ -0,0 +1,2682 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Number of optical modules +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,optical module is 3, minor_dev, 0:does not exist +dev_num_3_0=66 + +# Configuration items:: optical module EEPROM size +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_size_3_1=0x8180 +eeprom_size_3_2=0x8180 +eeprom_size_3_3=0x8180 +eeprom_size_3_4=0x8180 +eeprom_size_3_5=0x8180 +eeprom_size_3_6=0x8180 +eeprom_size_3_7=0x8180 +eeprom_size_3_8=0x8180 +eeprom_size_3_9=0x8180 +eeprom_size_3_10=0x8180 +eeprom_size_3_11=0x8180 +eeprom_size_3_12=0x8180 +eeprom_size_3_13=0x8180 +eeprom_size_3_14=0x8180 +eeprom_size_3_15=0x8180 +eeprom_size_3_16=0x8180 +eeprom_size_3_17=0x8180 +eeprom_size_3_18=0x8180 +eeprom_size_3_19=0x8180 +eeprom_size_3_20=0x8180 +eeprom_size_3_21=0x8180 +eeprom_size_3_22=0x8180 +eeprom_size_3_23=0x8180 +eeprom_size_3_24=0x8180 +eeprom_size_3_25=0x8180 +eeprom_size_3_26=0x8180 +eeprom_size_3_27=0x8180 +eeprom_size_3_28=0x8180 +eeprom_size_3_29=0x8180 +eeprom_size_3_30=0x8180 +eeprom_size_3_31=0x8180 +eeprom_size_3_32=0x8180 +eeprom_size_3_33=0x8180 +eeprom_size_3_34=0x8180 +eeprom_size_3_35=0x8180 +eeprom_size_3_36=0x8180 +eeprom_size_3_37=0x8180 +eeprom_size_3_38=0x8180 +eeprom_size_3_39=0x8180 +eeprom_size_3_40=0x8180 +eeprom_size_3_41=0x8180 +eeprom_size_3_42=0x8180 +eeprom_size_3_43=0x8180 +eeprom_size_3_44=0x8180 +eeprom_size_3_45=0x8180 +eeprom_size_3_46=0x8180 +eeprom_size_3_47=0x8180 +eeprom_size_3_48=0x8180 +eeprom_size_3_49=0x8180 +eeprom_size_3_50=0x8180 +eeprom_size_3_51=0x8180 +eeprom_size_3_52=0x8180 +eeprom_size_3_53=0x8180 +eeprom_size_3_54=0x8180 +eeprom_size_3_55=0x8180 +eeprom_size_3_56=0x8180 +eeprom_size_3_57=0x8180 +eeprom_size_3_58=0x8180 +eeprom_size_3_59=0x8180 +eeprom_size_3_60=0x8180 +eeprom_size_3_61=0x8180 +eeprom_size_3_62=0x8180 +eeprom_size_3_63=0x8180 +eeprom_size_3_64=0x8180 +eeprom_size_3_65=0x8180 +eeprom_size_3_66=0x8180 + +# Configuration items: optical module EEPROM sysfs path +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_path_3_1=/sys/bus/i2c/devices/106-0050/eeprom +eeprom_path_3_2=/sys/bus/i2c/devices/107-0050/eeprom +eeprom_path_3_3=/sys/bus/i2c/devices/108-0050/eeprom +eeprom_path_3_4=/sys/bus/i2c/devices/109-0050/eeprom +eeprom_path_3_5=/sys/bus/i2c/devices/110-0050/eeprom +eeprom_path_3_6=/sys/bus/i2c/devices/111-0050/eeprom +eeprom_path_3_7=/sys/bus/i2c/devices/112-0050/eeprom +eeprom_path_3_8=/sys/bus/i2c/devices/113-0050/eeprom +eeprom_path_3_9=/sys/bus/i2c/devices/114-0050/eeprom +eeprom_path_3_10=/sys/bus/i2c/devices/115-0050/eeprom +eeprom_path_3_11=/sys/bus/i2c/devices/116-0050/eeprom +eeprom_path_3_12=/sys/bus/i2c/devices/117-0050/eeprom +eeprom_path_3_13=/sys/bus/i2c/devices/118-0050/eeprom +eeprom_path_3_14=/sys/bus/i2c/devices/119-0050/eeprom +eeprom_path_3_15=/sys/bus/i2c/devices/120-0050/eeprom +eeprom_path_3_16=/sys/bus/i2c/devices/121-0050/eeprom +eeprom_path_3_17=/sys/bus/i2c/devices/122-0050/eeprom +eeprom_path_3_18=/sys/bus/i2c/devices/123-0050/eeprom +eeprom_path_3_19=/sys/bus/i2c/devices/124-0050/eeprom +eeprom_path_3_20=/sys/bus/i2c/devices/125-0050/eeprom +eeprom_path_3_21=/sys/bus/i2c/devices/126-0050/eeprom +eeprom_path_3_22=/sys/bus/i2c/devices/127-0050/eeprom +eeprom_path_3_23=/sys/bus/i2c/devices/128-0050/eeprom +eeprom_path_3_24=/sys/bus/i2c/devices/129-0050/eeprom +eeprom_path_3_25=/sys/bus/i2c/devices/130-0050/eeprom +eeprom_path_3_26=/sys/bus/i2c/devices/131-0050/eeprom +eeprom_path_3_27=/sys/bus/i2c/devices/132-0050/eeprom +eeprom_path_3_28=/sys/bus/i2c/devices/133-0050/eeprom +eeprom_path_3_29=/sys/bus/i2c/devices/134-0050/eeprom +eeprom_path_3_30=/sys/bus/i2c/devices/135-0050/eeprom +eeprom_path_3_31=/sys/bus/i2c/devices/136-0050/eeprom +eeprom_path_3_32=/sys/bus/i2c/devices/137-0050/eeprom +eeprom_path_3_33=/sys/bus/i2c/devices/138-0050/eeprom +eeprom_path_3_34=/sys/bus/i2c/devices/139-0050/eeprom +eeprom_path_3_35=/sys/bus/i2c/devices/140-0050/eeprom +eeprom_path_3_36=/sys/bus/i2c/devices/141-0050/eeprom +eeprom_path_3_37=/sys/bus/i2c/devices/142-0050/eeprom +eeprom_path_3_38=/sys/bus/i2c/devices/143-0050/eeprom +eeprom_path_3_39=/sys/bus/i2c/devices/144-0050/eeprom +eeprom_path_3_40=/sys/bus/i2c/devices/145-0050/eeprom +eeprom_path_3_41=/sys/bus/i2c/devices/146-0050/eeprom +eeprom_path_3_42=/sys/bus/i2c/devices/147-0050/eeprom +eeprom_path_3_43=/sys/bus/i2c/devices/148-0050/eeprom +eeprom_path_3_44=/sys/bus/i2c/devices/149-0050/eeprom +eeprom_path_3_45=/sys/bus/i2c/devices/150-0050/eeprom +eeprom_path_3_46=/sys/bus/i2c/devices/151-0050/eeprom +eeprom_path_3_47=/sys/bus/i2c/devices/152-0050/eeprom +eeprom_path_3_48=/sys/bus/i2c/devices/153-0050/eeprom +eeprom_path_3_49=/sys/bus/i2c/devices/154-0050/eeprom +eeprom_path_3_50=/sys/bus/i2c/devices/155-0050/eeprom +eeprom_path_3_51=/sys/bus/i2c/devices/156-0050/eeprom +eeprom_path_3_52=/sys/bus/i2c/devices/157-0050/eeprom +eeprom_path_3_53=/sys/bus/i2c/devices/158-0050/eeprom +eeprom_path_3_54=/sys/bus/i2c/devices/159-0050/eeprom +eeprom_path_3_55=/sys/bus/i2c/devices/160-0050/eeprom +eeprom_path_3_56=/sys/bus/i2c/devices/161-0050/eeprom +eeprom_path_3_57=/sys/bus/i2c/devices/162-0050/eeprom +eeprom_path_3_58=/sys/bus/i2c/devices/163-0050/eeprom +eeprom_path_3_59=/sys/bus/i2c/devices/164-0050/eeprom +eeprom_path_3_60=/sys/bus/i2c/devices/165-0050/eeprom +eeprom_path_3_61=/sys/bus/i2c/devices/166-0050/eeprom +eeprom_path_3_62=/sys/bus/i2c/devices/167-0050/eeprom +eeprom_path_3_63=/sys/bus/i2c/devices/168-0050/eeprom +eeprom_path_3_64=/sys/bus/i2c/devices/169-0050/eeprom +eeprom_path_3_65=/sys/bus/i2c/devices/59-0050/eeprom +eeprom_path_3_66=/sys/bus/i2c/devices/60-0050/eeprom + + +# Configuration items: Optical module CPLD register +# Description: Format sff_cpld_reg_[sff_index]_[cpld_reg] +# Note: sff_index indicates the optical module number, starting from 1. 0 indicates that the power_on register is useful +# cpld_reg 1:power_on 2:tx_fault, 3:tx_dis 4:reserve 5:rx_los +# 6:reset 7:lpmode 8:module_present 9:interrupt + + +# 800G module reset signal +sff_cpld_reg.mode_1_6=config +sff_cpld_reg.src_1_6=cpld +sff_cpld_reg.frmt_1_6=bit +sff_cpld_reg.pola_1_6=negative +sff_cpld_reg.addr_1_6=0x00020072 +sff_cpld_reg.len_1_6=1 +sff_cpld_reg.bit_offset_1_6=0 + +sff_cpld_reg.mode_2_6=config +sff_cpld_reg.src_2_6=cpld +sff_cpld_reg.frmt_2_6=bit +sff_cpld_reg.pola_2_6=negative +sff_cpld_reg.addr_2_6=0x00020072 +sff_cpld_reg.len_2_6=1 +sff_cpld_reg.bit_offset_2_6=1 + +sff_cpld_reg.mode_3_6=config +sff_cpld_reg.src_3_6=cpld +sff_cpld_reg.frmt_3_6=bit +sff_cpld_reg.pola_3_6=negative +sff_cpld_reg.addr_3_6=0x00020072 +sff_cpld_reg.len_3_6=1 +sff_cpld_reg.bit_offset_3_6=2 + +sff_cpld_reg.mode_4_6=config +sff_cpld_reg.src_4_6=cpld +sff_cpld_reg.frmt_4_6=bit +sff_cpld_reg.pola_4_6=negative +sff_cpld_reg.addr_4_6=0x00020072 +sff_cpld_reg.len_4_6=1 +sff_cpld_reg.bit_offset_4_6=3 + +sff_cpld_reg.mode_5_6=config +sff_cpld_reg.src_5_6=cpld +sff_cpld_reg.frmt_5_6=bit +sff_cpld_reg.pola_5_6=negative +sff_cpld_reg.addr_5_6=0x00020072 +sff_cpld_reg.len_5_6=1 +sff_cpld_reg.bit_offset_5_6=4 + +sff_cpld_reg.mode_6_6=config +sff_cpld_reg.src_6_6=cpld +sff_cpld_reg.frmt_6_6=bit +sff_cpld_reg.pola_6_6=negative +sff_cpld_reg.addr_6_6=0x00020072 +sff_cpld_reg.len_6_6=1 +sff_cpld_reg.bit_offset_6_6=5 + +sff_cpld_reg.mode_7_6=config +sff_cpld_reg.src_7_6=cpld +sff_cpld_reg.frmt_7_6=bit +sff_cpld_reg.pola_7_6=negative +sff_cpld_reg.addr_7_6=0x00020072 +sff_cpld_reg.len_7_6=1 +sff_cpld_reg.bit_offset_7_6=6 + +sff_cpld_reg.mode_8_6=config +sff_cpld_reg.src_8_6=cpld +sff_cpld_reg.frmt_8_6=bit +sff_cpld_reg.pola_8_6=negative +sff_cpld_reg.addr_8_6=0x00020072 +sff_cpld_reg.len_8_6=1 +sff_cpld_reg.bit_offset_8_6=7 + +sff_cpld_reg.mode_9_6=config +sff_cpld_reg.src_9_6=cpld +sff_cpld_reg.frmt_9_6=bit +sff_cpld_reg.pola_9_6=negative +sff_cpld_reg.addr_9_6=0x00020071 +sff_cpld_reg.len_9_6=1 +sff_cpld_reg.bit_offset_9_6=0 + +sff_cpld_reg.mode_10_6=config +sff_cpld_reg.src_10_6=cpld +sff_cpld_reg.frmt_10_6=bit +sff_cpld_reg.pola_10_6=negative +sff_cpld_reg.addr_10_6=0x00020071 +sff_cpld_reg.len_10_6=1 +sff_cpld_reg.bit_offset_10_6=1 + +sff_cpld_reg.mode_11_6=config +sff_cpld_reg.src_11_6=cpld +sff_cpld_reg.frmt_11_6=bit +sff_cpld_reg.pola_11_6=negative +sff_cpld_reg.addr_11_6=0x00020071 +sff_cpld_reg.len_11_6=1 +sff_cpld_reg.bit_offset_11_6=2 + +sff_cpld_reg.mode_12_6=config +sff_cpld_reg.src_12_6=cpld +sff_cpld_reg.frmt_12_6=bit +sff_cpld_reg.pola_12_6=negative +sff_cpld_reg.addr_12_6=0x00020071 +sff_cpld_reg.len_12_6=1 +sff_cpld_reg.bit_offset_12_6=3 + +sff_cpld_reg.mode_13_6=config +sff_cpld_reg.src_13_6=cpld +sff_cpld_reg.frmt_13_6=bit +sff_cpld_reg.pola_13_6=negative +sff_cpld_reg.addr_13_6=0x00020071 +sff_cpld_reg.len_13_6=1 +sff_cpld_reg.bit_offset_13_6=4 + +sff_cpld_reg.mode_14_6=config +sff_cpld_reg.src_14_6=cpld +sff_cpld_reg.frmt_14_6=bit +sff_cpld_reg.pola_14_6=negative +sff_cpld_reg.addr_14_6=0x00020071 +sff_cpld_reg.len_14_6=1 +sff_cpld_reg.bit_offset_14_6=5 + +sff_cpld_reg.mode_15_6=config +sff_cpld_reg.src_15_6=cpld +sff_cpld_reg.frmt_15_6=bit +sff_cpld_reg.pola_15_6=negative +sff_cpld_reg.addr_15_6=0x00020071 +sff_cpld_reg.len_15_6=1 +sff_cpld_reg.bit_offset_15_6=6 + +sff_cpld_reg.mode_16_6=config +sff_cpld_reg.src_16_6=cpld +sff_cpld_reg.frmt_16_6=bit +sff_cpld_reg.pola_16_6=negative +sff_cpld_reg.addr_16_6=0x00020071 +sff_cpld_reg.len_16_6=1 +sff_cpld_reg.bit_offset_16_6=7 + +sff_cpld_reg.mode_17_6=config +sff_cpld_reg.src_17_6=cpld +sff_cpld_reg.frmt_17_6=bit +sff_cpld_reg.pola_17_6=negative +sff_cpld_reg.addr_17_6=0x00020070 +sff_cpld_reg.len_17_6=1 +sff_cpld_reg.bit_offset_17_6=0 + +sff_cpld_reg.mode_18_6=config +sff_cpld_reg.src_18_6=cpld +sff_cpld_reg.frmt_18_6=bit +sff_cpld_reg.pola_18_6=negative +sff_cpld_reg.addr_18_6=0x00020070 +sff_cpld_reg.len_18_6=1 +sff_cpld_reg.bit_offset_18_6=1 + +sff_cpld_reg.mode_19_6=config +sff_cpld_reg.src_19_6=cpld +sff_cpld_reg.frmt_19_6=bit +sff_cpld_reg.pola_19_6=negative +sff_cpld_reg.addr_19_6=0x00020070 +sff_cpld_reg.len_19_6=1 +sff_cpld_reg.bit_offset_19_6=2 + +sff_cpld_reg.mode_20_6=config +sff_cpld_reg.src_20_6=cpld +sff_cpld_reg.frmt_20_6=bit +sff_cpld_reg.pola_20_6=negative +sff_cpld_reg.addr_20_6=0x00020070 +sff_cpld_reg.len_20_6=1 +sff_cpld_reg.bit_offset_20_6=3 + +sff_cpld_reg.mode_21_6=config +sff_cpld_reg.src_21_6=cpld +sff_cpld_reg.frmt_21_6=bit +sff_cpld_reg.pola_21_6=negative +sff_cpld_reg.addr_21_6=0x00020070 +sff_cpld_reg.len_21_6=1 +sff_cpld_reg.bit_offset_21_6=4 + +sff_cpld_reg.mode_22_6=config +sff_cpld_reg.src_22_6=cpld +sff_cpld_reg.frmt_22_6=bit +sff_cpld_reg.pola_22_6=negative +sff_cpld_reg.addr_22_6=0x00020070 +sff_cpld_reg.len_22_6=1 +sff_cpld_reg.bit_offset_22_6=5 + +sff_cpld_reg.mode_23_6=config +sff_cpld_reg.src_23_6=cpld +sff_cpld_reg.frmt_23_6=bit +sff_cpld_reg.pola_23_6=negative +sff_cpld_reg.addr_23_6=0x00020070 +sff_cpld_reg.len_23_6=1 +sff_cpld_reg.bit_offset_23_6=6 + +sff_cpld_reg.mode_24_6=config +sff_cpld_reg.src_24_6=cpld +sff_cpld_reg.frmt_24_6=bit +sff_cpld_reg.pola_24_6=negative +sff_cpld_reg.addr_24_6=0x00020070 +sff_cpld_reg.len_24_6=1 +sff_cpld_reg.bit_offset_24_6=7 + +sff_cpld_reg.mode_25_6=config +sff_cpld_reg.src_25_6=cpld +sff_cpld_reg.frmt_25_6=bit +sff_cpld_reg.pola_25_6=negative +sff_cpld_reg.addr_25_6=0x00030074 +sff_cpld_reg.len_25_6=1 +sff_cpld_reg.bit_offset_25_6=0 + +sff_cpld_reg.mode_26_6=config +sff_cpld_reg.src_26_6=cpld +sff_cpld_reg.frmt_26_6=bit +sff_cpld_reg.pola_26_6=negative +sff_cpld_reg.addr_26_6=0x00030074 +sff_cpld_reg.len_26_6=1 +sff_cpld_reg.bit_offset_26_6=1 + +sff_cpld_reg.mode_27_6=config +sff_cpld_reg.src_27_6=cpld +sff_cpld_reg.frmt_27_6=bit +sff_cpld_reg.pola_27_6=negative +sff_cpld_reg.addr_27_6=0x00030074 +sff_cpld_reg.len_27_6=1 +sff_cpld_reg.bit_offset_27_6=2 + +sff_cpld_reg.mode_28_6=config +sff_cpld_reg.src_28_6=cpld +sff_cpld_reg.frmt_28_6=bit +sff_cpld_reg.pola_28_6=negative +sff_cpld_reg.addr_28_6=0x00030074 +sff_cpld_reg.len_28_6=1 +sff_cpld_reg.bit_offset_28_6=3 + +sff_cpld_reg.mode_29_6=config +sff_cpld_reg.src_29_6=cpld +sff_cpld_reg.frmt_29_6=bit +sff_cpld_reg.pola_29_6=negative +sff_cpld_reg.addr_29_6=0x00030074 +sff_cpld_reg.len_29_6=1 +sff_cpld_reg.bit_offset_29_6=4 + +sff_cpld_reg.mode_30_6=config +sff_cpld_reg.src_30_6=cpld +sff_cpld_reg.frmt_30_6=bit +sff_cpld_reg.pola_30_6=negative +sff_cpld_reg.addr_30_6=0x00030074 +sff_cpld_reg.len_30_6=1 +sff_cpld_reg.bit_offset_30_6=5 + +sff_cpld_reg.mode_31_6=config +sff_cpld_reg.src_31_6=cpld +sff_cpld_reg.frmt_31_6=bit +sff_cpld_reg.pola_31_6=negative +sff_cpld_reg.addr_31_6=0x00030074 +sff_cpld_reg.len_31_6=1 +sff_cpld_reg.bit_offset_31_6=6 + +sff_cpld_reg.mode_32_6=config +sff_cpld_reg.src_32_6=cpld +sff_cpld_reg.frmt_32_6=bit +sff_cpld_reg.pola_32_6=negative +sff_cpld_reg.addr_32_6=0x00030074 +sff_cpld_reg.len_32_6=1 +sff_cpld_reg.bit_offset_32_6=7 + +sff_cpld_reg.mode_33_6=config +sff_cpld_reg.src_33_6=cpld +sff_cpld_reg.frmt_33_6=bit +sff_cpld_reg.pola_33_6=negative +sff_cpld_reg.addr_33_6=0x00030073 +sff_cpld_reg.len_33_6=1 +sff_cpld_reg.bit_offset_33_6=0 + +sff_cpld_reg.mode_34_6=config +sff_cpld_reg.src_34_6=cpld +sff_cpld_reg.frmt_34_6=bit +sff_cpld_reg.pola_34_6=negative +sff_cpld_reg.addr_34_6=0x00030073 +sff_cpld_reg.len_34_6=1 +sff_cpld_reg.bit_offset_34_6=1 + +sff_cpld_reg.mode_35_6=config +sff_cpld_reg.src_35_6=cpld +sff_cpld_reg.frmt_35_6=bit +sff_cpld_reg.pola_35_6=negative +sff_cpld_reg.addr_35_6=0x00030073 +sff_cpld_reg.len_35_6=1 +sff_cpld_reg.bit_offset_35_6=2 + +sff_cpld_reg.mode_36_6=config +sff_cpld_reg.src_36_6=cpld +sff_cpld_reg.frmt_36_6=bit +sff_cpld_reg.pola_36_6=negative +sff_cpld_reg.addr_36_6=0x00030073 +sff_cpld_reg.len_36_6=1 +sff_cpld_reg.bit_offset_36_6=3 + +sff_cpld_reg.mode_37_6=config +sff_cpld_reg.src_37_6=cpld +sff_cpld_reg.frmt_37_6=bit +sff_cpld_reg.pola_37_6=negative +sff_cpld_reg.addr_37_6=0x00030073 +sff_cpld_reg.len_37_6=1 +sff_cpld_reg.bit_offset_37_6=4 + +sff_cpld_reg.mode_38_6=config +sff_cpld_reg.src_38_6=cpld +sff_cpld_reg.frmt_38_6=bit +sff_cpld_reg.pola_38_6=negative +sff_cpld_reg.addr_38_6=0x00030073 +sff_cpld_reg.len_38_6=1 +sff_cpld_reg.bit_offset_38_6=5 + +sff_cpld_reg.mode_39_6=config +sff_cpld_reg.src_39_6=cpld +sff_cpld_reg.frmt_39_6=bit +sff_cpld_reg.pola_39_6=negative +sff_cpld_reg.addr_39_6=0x00030073 +sff_cpld_reg.len_39_6=1 +sff_cpld_reg.bit_offset_39_6=6 + +sff_cpld_reg.mode_40_6=config +sff_cpld_reg.src_40_6=cpld +sff_cpld_reg.frmt_40_6=bit +sff_cpld_reg.pola_40_6=negative +sff_cpld_reg.addr_40_6=0x00030073 +sff_cpld_reg.len_40_6=1 +sff_cpld_reg.bit_offset_40_6=7 + +sff_cpld_reg.mode_41_6=config +sff_cpld_reg.src_41_6=cpld +sff_cpld_reg.frmt_41_6=bit +sff_cpld_reg.pola_41_6=negative +sff_cpld_reg.addr_41_6=0x00030072 +sff_cpld_reg.len_41_6=1 +sff_cpld_reg.bit_offset_41_6=0 + +sff_cpld_reg.mode_42_6=config +sff_cpld_reg.src_42_6=cpld +sff_cpld_reg.frmt_42_6=bit +sff_cpld_reg.pola_42_6=negative +sff_cpld_reg.addr_42_6=0x00030072 +sff_cpld_reg.len_42_6=1 +sff_cpld_reg.bit_offset_42_6=1 + +sff_cpld_reg.mode_43_6=config +sff_cpld_reg.src_43_6=cpld +sff_cpld_reg.frmt_43_6=bit +sff_cpld_reg.pola_43_6=negative +sff_cpld_reg.addr_43_6=0x00030072 +sff_cpld_reg.len_43_6=1 +sff_cpld_reg.bit_offset_43_6=2 + +sff_cpld_reg.mode_44_6=config +sff_cpld_reg.src_44_6=cpld +sff_cpld_reg.frmt_44_6=bit +sff_cpld_reg.pola_44_6=negative +sff_cpld_reg.addr_44_6=0x00030072 +sff_cpld_reg.len_44_6=1 +sff_cpld_reg.bit_offset_44_6=3 + +sff_cpld_reg.mode_45_6=config +sff_cpld_reg.src_45_6=cpld +sff_cpld_reg.frmt_45_6=bit +sff_cpld_reg.pola_45_6=negative +sff_cpld_reg.addr_45_6=0x00030072 +sff_cpld_reg.len_45_6=1 +sff_cpld_reg.bit_offset_45_6=4 + +sff_cpld_reg.mode_46_6=config +sff_cpld_reg.src_46_6=cpld +sff_cpld_reg.frmt_46_6=bit +sff_cpld_reg.pola_46_6=negative +sff_cpld_reg.addr_46_6=0x00030072 +sff_cpld_reg.len_46_6=1 +sff_cpld_reg.bit_offset_46_6=5 + +sff_cpld_reg.mode_47_6=config +sff_cpld_reg.src_47_6=cpld +sff_cpld_reg.frmt_47_6=bit +sff_cpld_reg.pola_47_6=negative +sff_cpld_reg.addr_47_6=0x00030072 +sff_cpld_reg.len_47_6=1 +sff_cpld_reg.bit_offset_47_6=6 + +sff_cpld_reg.mode_48_6=config +sff_cpld_reg.src_48_6=cpld +sff_cpld_reg.frmt_48_6=bit +sff_cpld_reg.pola_48_6=negative +sff_cpld_reg.addr_48_6=0x00030072 +sff_cpld_reg.len_48_6=1 +sff_cpld_reg.bit_offset_48_6=7 + +sff_cpld_reg.mode_49_6=config +sff_cpld_reg.src_49_6=cpld +sff_cpld_reg.frmt_49_6=bit +sff_cpld_reg.pola_49_6=negative +sff_cpld_reg.addr_49_6=0x00030071 +sff_cpld_reg.len_49_6=1 +sff_cpld_reg.bit_offset_49_6=0 + +sff_cpld_reg.mode_50_6=config +sff_cpld_reg.src_50_6=cpld +sff_cpld_reg.frmt_50_6=bit +sff_cpld_reg.pola_50_6=negative +sff_cpld_reg.addr_50_6=0x00030071 +sff_cpld_reg.len_50_6=1 +sff_cpld_reg.bit_offset_50_6=1 + +sff_cpld_reg.mode_51_6=config +sff_cpld_reg.src_51_6=cpld +sff_cpld_reg.frmt_51_6=bit +sff_cpld_reg.pola_51_6=negative +sff_cpld_reg.addr_51_6=0x00030071 +sff_cpld_reg.len_51_6=1 +sff_cpld_reg.bit_offset_51_6=2 + +sff_cpld_reg.mode_52_6=config +sff_cpld_reg.src_52_6=cpld +sff_cpld_reg.frmt_52_6=bit +sff_cpld_reg.pola_52_6=negative +sff_cpld_reg.addr_52_6=0x00030071 +sff_cpld_reg.len_52_6=1 +sff_cpld_reg.bit_offset_52_6=3 + +sff_cpld_reg.mode_53_6=config +sff_cpld_reg.src_53_6=cpld +sff_cpld_reg.frmt_53_6=bit +sff_cpld_reg.pola_53_6=negative +sff_cpld_reg.addr_53_6=0x00030071 +sff_cpld_reg.len_53_6=1 +sff_cpld_reg.bit_offset_53_6=4 + +sff_cpld_reg.mode_54_6=config +sff_cpld_reg.src_54_6=cpld +sff_cpld_reg.frmt_54_6=bit +sff_cpld_reg.pola_54_6=negative +sff_cpld_reg.addr_54_6=0x00030071 +sff_cpld_reg.len_54_6=1 +sff_cpld_reg.bit_offset_54_6=5 + +sff_cpld_reg.mode_55_6=config +sff_cpld_reg.src_55_6=cpld +sff_cpld_reg.frmt_55_6=bit +sff_cpld_reg.pola_55_6=negative +sff_cpld_reg.addr_55_6=0x00030071 +sff_cpld_reg.len_55_6=1 +sff_cpld_reg.bit_offset_55_6=6 + +sff_cpld_reg.mode_56_6=config +sff_cpld_reg.src_56_6=cpld +sff_cpld_reg.frmt_56_6=bit +sff_cpld_reg.pola_56_6=negative +sff_cpld_reg.addr_56_6=0x00030071 +sff_cpld_reg.len_56_6=1 +sff_cpld_reg.bit_offset_56_6=7 + +sff_cpld_reg.mode_57_6=config +sff_cpld_reg.src_57_6=cpld +sff_cpld_reg.frmt_57_6=bit +sff_cpld_reg.pola_57_6=negative +sff_cpld_reg.addr_57_6=0x00030070 +sff_cpld_reg.len_57_6=1 +sff_cpld_reg.bit_offset_57_6=0 + +sff_cpld_reg.mode_58_6=config +sff_cpld_reg.src_58_6=cpld +sff_cpld_reg.frmt_58_6=bit +sff_cpld_reg.pola_58_6=negative +sff_cpld_reg.addr_58_6=0x00030070 +sff_cpld_reg.len_58_6=1 +sff_cpld_reg.bit_offset_58_6=1 + +sff_cpld_reg.mode_59_6=config +sff_cpld_reg.src_59_6=cpld +sff_cpld_reg.frmt_59_6=bit +sff_cpld_reg.pola_59_6=negative +sff_cpld_reg.addr_59_6=0x00030070 +sff_cpld_reg.len_59_6=1 +sff_cpld_reg.bit_offset_59_6=2 + +sff_cpld_reg.mode_60_6=config +sff_cpld_reg.src_60_6=cpld +sff_cpld_reg.frmt_60_6=bit +sff_cpld_reg.pola_60_6=negative +sff_cpld_reg.addr_60_6=0x00030070 +sff_cpld_reg.len_60_6=1 +sff_cpld_reg.bit_offset_60_6=3 + +sff_cpld_reg.mode_61_6=config +sff_cpld_reg.src_61_6=cpld +sff_cpld_reg.frmt_61_6=bit +sff_cpld_reg.pola_61_6=negative +sff_cpld_reg.addr_61_6=0x00030070 +sff_cpld_reg.len_61_6=1 +sff_cpld_reg.bit_offset_61_6=4 + +sff_cpld_reg.mode_62_6=config +sff_cpld_reg.src_62_6=cpld +sff_cpld_reg.frmt_62_6=bit +sff_cpld_reg.pola_62_6=negative +sff_cpld_reg.addr_62_6=0x00030070 +sff_cpld_reg.len_62_6=1 +sff_cpld_reg.bit_offset_62_6=5 + +sff_cpld_reg.mode_63_6=config +sff_cpld_reg.src_63_6=cpld +sff_cpld_reg.frmt_63_6=bit +sff_cpld_reg.pola_63_6=negative +sff_cpld_reg.addr_63_6=0x00030070 +sff_cpld_reg.len_63_6=1 +sff_cpld_reg.bit_offset_63_6=6 + +sff_cpld_reg.mode_64_6=config +sff_cpld_reg.src_64_6=cpld +sff_cpld_reg.frmt_64_6=bit +sff_cpld_reg.pola_64_6=negative +sff_cpld_reg.addr_64_6=0x00030070 +sff_cpld_reg.len_64_6=1 +sff_cpld_reg.bit_offset_64_6=7 + +# 800G module lpmode signal +sff_cpld_reg.mode_1_7=config +sff_cpld_reg.src_1_7=cpld +sff_cpld_reg.frmt_1_7=bit +sff_cpld_reg.pola_1_7=positive +sff_cpld_reg.addr_1_7=0x00020078 +sff_cpld_reg.len_1_7=1 +sff_cpld_reg.bit_offset_1_7=0 + +sff_cpld_reg.mode_2_7=config +sff_cpld_reg.src_2_7=cpld +sff_cpld_reg.frmt_2_7=bit +sff_cpld_reg.pola_2_7=positive +sff_cpld_reg.addr_2_7=0x00020078 +sff_cpld_reg.len_2_7=1 +sff_cpld_reg.bit_offset_2_7=1 + +sff_cpld_reg.mode_3_7=config +sff_cpld_reg.src_3_7=cpld +sff_cpld_reg.frmt_3_7=bit +sff_cpld_reg.pola_3_7=positive +sff_cpld_reg.addr_3_7=0x00020078 +sff_cpld_reg.len_3_7=1 +sff_cpld_reg.bit_offset_3_7=2 + +sff_cpld_reg.mode_4_7=config +sff_cpld_reg.src_4_7=cpld +sff_cpld_reg.frmt_4_7=bit +sff_cpld_reg.pola_4_7=positive +sff_cpld_reg.addr_4_7=0x00020078 +sff_cpld_reg.len_4_7=1 +sff_cpld_reg.bit_offset_4_7=3 + +sff_cpld_reg.mode_5_7=config +sff_cpld_reg.src_5_7=cpld +sff_cpld_reg.frmt_5_7=bit +sff_cpld_reg.pola_5_7=positive +sff_cpld_reg.addr_5_7=0x00020078 +sff_cpld_reg.len_5_7=1 +sff_cpld_reg.bit_offset_5_7=4 + +sff_cpld_reg.mode_6_7=config +sff_cpld_reg.src_6_7=cpld +sff_cpld_reg.frmt_6_7=bit +sff_cpld_reg.pola_6_7=positive +sff_cpld_reg.addr_6_7=0x00020078 +sff_cpld_reg.len_6_7=1 +sff_cpld_reg.bit_offset_6_7=5 + +sff_cpld_reg.mode_7_7=config +sff_cpld_reg.src_7_7=cpld +sff_cpld_reg.frmt_7_7=bit +sff_cpld_reg.pola_7_7=positive +sff_cpld_reg.addr_7_7=0x00020078 +sff_cpld_reg.len_7_7=1 +sff_cpld_reg.bit_offset_7_7=6 + +sff_cpld_reg.mode_8_7=config +sff_cpld_reg.src_8_7=cpld +sff_cpld_reg.frmt_8_7=bit +sff_cpld_reg.pola_8_7=positive +sff_cpld_reg.addr_8_7=0x00020078 +sff_cpld_reg.len_8_7=1 +sff_cpld_reg.bit_offset_8_7=7 + +sff_cpld_reg.mode_9_7=config +sff_cpld_reg.src_9_7=cpld +sff_cpld_reg.frmt_9_7=bit +sff_cpld_reg.pola_9_7=positive +sff_cpld_reg.addr_9_7=0x00020077 +sff_cpld_reg.len_9_7=1 +sff_cpld_reg.bit_offset_9_7=0 + +sff_cpld_reg.mode_10_7=config +sff_cpld_reg.src_10_7=cpld +sff_cpld_reg.frmt_10_7=bit +sff_cpld_reg.pola_10_7=positive +sff_cpld_reg.addr_10_7=0x00020077 +sff_cpld_reg.len_10_7=1 +sff_cpld_reg.bit_offset_10_7=1 + +sff_cpld_reg.mode_11_7=config +sff_cpld_reg.src_11_7=cpld +sff_cpld_reg.frmt_11_7=bit +sff_cpld_reg.pola_11_7=positive +sff_cpld_reg.addr_11_7=0x00020077 +sff_cpld_reg.len_11_7=1 +sff_cpld_reg.bit_offset_11_7=2 + +sff_cpld_reg.mode_12_7=config +sff_cpld_reg.src_12_7=cpld +sff_cpld_reg.frmt_12_7=bit +sff_cpld_reg.pola_12_7=positive +sff_cpld_reg.addr_12_7=0x00020077 +sff_cpld_reg.len_12_7=1 +sff_cpld_reg.bit_offset_12_7=3 + +sff_cpld_reg.mode_13_7=config +sff_cpld_reg.src_13_7=cpld +sff_cpld_reg.frmt_13_7=bit +sff_cpld_reg.pola_13_7=positive +sff_cpld_reg.addr_13_7=0x00020077 +sff_cpld_reg.len_13_7=1 +sff_cpld_reg.bit_offset_13_7=4 + +sff_cpld_reg.mode_14_7=config +sff_cpld_reg.src_14_7=cpld +sff_cpld_reg.frmt_14_7=bit +sff_cpld_reg.pola_14_7=positive +sff_cpld_reg.addr_14_7=0x00020077 +sff_cpld_reg.len_14_7=1 +sff_cpld_reg.bit_offset_14_7=5 + +sff_cpld_reg.mode_15_7=config +sff_cpld_reg.src_15_7=cpld +sff_cpld_reg.frmt_15_7=bit +sff_cpld_reg.pola_15_7=positive +sff_cpld_reg.addr_15_7=0x00020077 +sff_cpld_reg.len_15_7=1 +sff_cpld_reg.bit_offset_15_7=6 + +sff_cpld_reg.mode_16_7=config +sff_cpld_reg.src_16_7=cpld +sff_cpld_reg.frmt_16_7=bit +sff_cpld_reg.pola_16_7=positive +sff_cpld_reg.addr_16_7=0x00020077 +sff_cpld_reg.len_16_7=1 +sff_cpld_reg.bit_offset_16_7=7 + +sff_cpld_reg.mode_17_7=config +sff_cpld_reg.src_17_7=cpld +sff_cpld_reg.frmt_17_7=bit +sff_cpld_reg.pola_17_7=positive +sff_cpld_reg.addr_17_7=0x00020076 +sff_cpld_reg.len_17_7=1 +sff_cpld_reg.bit_offset_17_7=0 + +sff_cpld_reg.mode_18_7=config +sff_cpld_reg.src_18_7=cpld +sff_cpld_reg.frmt_18_7=bit +sff_cpld_reg.pola_18_7=positive +sff_cpld_reg.addr_18_7=0x00020076 +sff_cpld_reg.len_18_7=1 +sff_cpld_reg.bit_offset_18_7=1 + +sff_cpld_reg.mode_19_7=config +sff_cpld_reg.src_19_7=cpld +sff_cpld_reg.frmt_19_7=bit +sff_cpld_reg.pola_19_7=positive +sff_cpld_reg.addr_19_7=0x00020076 +sff_cpld_reg.len_19_7=1 +sff_cpld_reg.bit_offset_19_7=2 + +sff_cpld_reg.mode_20_7=config +sff_cpld_reg.src_20_7=cpld +sff_cpld_reg.frmt_20_7=bit +sff_cpld_reg.pola_20_7=positive +sff_cpld_reg.addr_20_7=0x00020076 +sff_cpld_reg.len_20_7=1 +sff_cpld_reg.bit_offset_20_7=3 + +sff_cpld_reg.mode_21_7=config +sff_cpld_reg.src_21_7=cpld +sff_cpld_reg.frmt_21_7=bit +sff_cpld_reg.pola_21_7=positive +sff_cpld_reg.addr_21_7=0x00020076 +sff_cpld_reg.len_21_7=1 +sff_cpld_reg.bit_offset_21_7=4 + +sff_cpld_reg.mode_22_7=config +sff_cpld_reg.src_22_7=cpld +sff_cpld_reg.frmt_22_7=bit +sff_cpld_reg.pola_22_7=positive +sff_cpld_reg.addr_22_7=0x00020076 +sff_cpld_reg.len_22_7=1 +sff_cpld_reg.bit_offset_22_7=5 + +sff_cpld_reg.mode_23_7=config +sff_cpld_reg.src_23_7=cpld +sff_cpld_reg.frmt_23_7=bit +sff_cpld_reg.pola_23_7=positive +sff_cpld_reg.addr_23_7=0x00020076 +sff_cpld_reg.len_23_7=1 +sff_cpld_reg.bit_offset_23_7=6 + +sff_cpld_reg.mode_24_7=config +sff_cpld_reg.src_24_7=cpld +sff_cpld_reg.frmt_24_7=bit +sff_cpld_reg.pola_24_7=positive +sff_cpld_reg.addr_24_7=0x00020076 +sff_cpld_reg.len_24_7=1 +sff_cpld_reg.bit_offset_24_7=7 + +sff_cpld_reg.mode_25_7=config +sff_cpld_reg.src_25_7=cpld +sff_cpld_reg.frmt_25_7=bit +sff_cpld_reg.pola_25_7=positive +sff_cpld_reg.addr_25_7=0x00030084 +sff_cpld_reg.len_25_7=1 +sff_cpld_reg.bit_offset_25_7=0 + +sff_cpld_reg.mode_26_7=config +sff_cpld_reg.src_26_7=cpld +sff_cpld_reg.frmt_26_7=bit +sff_cpld_reg.pola_26_7=positive +sff_cpld_reg.addr_26_7=0x00030084 +sff_cpld_reg.len_26_7=1 +sff_cpld_reg.bit_offset_26_7=1 + +sff_cpld_reg.mode_27_7=config +sff_cpld_reg.src_27_7=cpld +sff_cpld_reg.frmt_27_7=bit +sff_cpld_reg.pola_27_7=positive +sff_cpld_reg.addr_27_7=0x00030084 +sff_cpld_reg.len_27_7=1 +sff_cpld_reg.bit_offset_27_7=2 + +sff_cpld_reg.mode_28_7=config +sff_cpld_reg.src_28_7=cpld +sff_cpld_reg.frmt_28_7=bit +sff_cpld_reg.pola_28_7=positive +sff_cpld_reg.addr_28_7=0x00030084 +sff_cpld_reg.len_28_7=1 +sff_cpld_reg.bit_offset_28_7=3 + +sff_cpld_reg.mode_29_7=config +sff_cpld_reg.src_29_7=cpld +sff_cpld_reg.frmt_29_7=bit +sff_cpld_reg.pola_29_7=positive +sff_cpld_reg.addr_29_7=0x00030084 +sff_cpld_reg.len_29_7=1 +sff_cpld_reg.bit_offset_29_7=4 + +sff_cpld_reg.mode_30_7=config +sff_cpld_reg.src_30_7=cpld +sff_cpld_reg.frmt_30_7=bit +sff_cpld_reg.pola_30_7=positive +sff_cpld_reg.addr_30_7=0x00030084 +sff_cpld_reg.len_30_7=1 +sff_cpld_reg.bit_offset_30_7=5 + +sff_cpld_reg.mode_31_7=config +sff_cpld_reg.src_31_7=cpld +sff_cpld_reg.frmt_31_7=bit +sff_cpld_reg.pola_31_7=positive +sff_cpld_reg.addr_31_7=0x00030084 +sff_cpld_reg.len_31_7=1 +sff_cpld_reg.bit_offset_31_7=6 + +sff_cpld_reg.mode_32_7=config +sff_cpld_reg.src_32_7=cpld +sff_cpld_reg.frmt_32_7=bit +sff_cpld_reg.pola_32_7=positive +sff_cpld_reg.addr_32_7=0x00030084 +sff_cpld_reg.len_32_7=1 +sff_cpld_reg.bit_offset_32_7=7 + +sff_cpld_reg.mode_33_7=config +sff_cpld_reg.src_33_7=cpld +sff_cpld_reg.frmt_33_7=bit +sff_cpld_reg.pola_33_7=positive +sff_cpld_reg.addr_33_7=0x00030083 +sff_cpld_reg.len_33_7=1 +sff_cpld_reg.bit_offset_33_7=0 + +sff_cpld_reg.mode_34_7=config +sff_cpld_reg.src_34_7=cpld +sff_cpld_reg.frmt_34_7=bit +sff_cpld_reg.pola_34_7=positive +sff_cpld_reg.addr_34_7=0x00030083 +sff_cpld_reg.len_34_7=1 +sff_cpld_reg.bit_offset_34_7=1 + +sff_cpld_reg.mode_35_7=config +sff_cpld_reg.src_35_7=cpld +sff_cpld_reg.frmt_35_7=bit +sff_cpld_reg.pola_35_7=positive +sff_cpld_reg.addr_35_7=0x00030083 +sff_cpld_reg.len_35_7=1 +sff_cpld_reg.bit_offset_35_7=2 + +sff_cpld_reg.mode_36_7=config +sff_cpld_reg.src_36_7=cpld +sff_cpld_reg.frmt_36_7=bit +sff_cpld_reg.pola_36_7=positive +sff_cpld_reg.addr_36_7=0x00030083 +sff_cpld_reg.len_36_7=1 +sff_cpld_reg.bit_offset_36_7=3 + +sff_cpld_reg.mode_37_7=config +sff_cpld_reg.src_37_7=cpld +sff_cpld_reg.frmt_37_7=bit +sff_cpld_reg.pola_37_7=positive +sff_cpld_reg.addr_37_7=0x00030083 +sff_cpld_reg.len_37_7=1 +sff_cpld_reg.bit_offset_37_7=4 + +sff_cpld_reg.mode_38_7=config +sff_cpld_reg.src_38_7=cpld +sff_cpld_reg.frmt_38_7=bit +sff_cpld_reg.pola_38_7=positive +sff_cpld_reg.addr_38_7=0x00030083 +sff_cpld_reg.len_38_7=1 +sff_cpld_reg.bit_offset_38_7=5 + +sff_cpld_reg.mode_39_7=config +sff_cpld_reg.src_39_7=cpld +sff_cpld_reg.frmt_39_7=bit +sff_cpld_reg.pola_39_7=positive +sff_cpld_reg.addr_39_7=0x00030083 +sff_cpld_reg.len_39_7=1 +sff_cpld_reg.bit_offset_39_7=6 + +sff_cpld_reg.mode_40_7=config +sff_cpld_reg.src_40_7=cpld +sff_cpld_reg.frmt_40_7=bit +sff_cpld_reg.pola_40_7=positive +sff_cpld_reg.addr_40_7=0x00030083 +sff_cpld_reg.len_40_7=1 +sff_cpld_reg.bit_offset_40_7=7 + +sff_cpld_reg.mode_41_7=config +sff_cpld_reg.src_41_7=cpld +sff_cpld_reg.frmt_41_7=bit +sff_cpld_reg.pola_41_7=positive +sff_cpld_reg.addr_41_7=0x00030082 +sff_cpld_reg.len_41_7=1 +sff_cpld_reg.bit_offset_41_7=0 + +sff_cpld_reg.mode_42_7=config +sff_cpld_reg.src_42_7=cpld +sff_cpld_reg.frmt_42_7=bit +sff_cpld_reg.pola_42_7=positive +sff_cpld_reg.addr_42_7=0x00030082 +sff_cpld_reg.len_42_7=1 +sff_cpld_reg.bit_offset_42_7=1 + +sff_cpld_reg.mode_43_7=config +sff_cpld_reg.src_43_7=cpld +sff_cpld_reg.frmt_43_7=bit +sff_cpld_reg.pola_43_7=positive +sff_cpld_reg.addr_43_7=0x00030082 +sff_cpld_reg.len_43_7=1 +sff_cpld_reg.bit_offset_43_7=2 + +sff_cpld_reg.mode_44_7=config +sff_cpld_reg.src_44_7=cpld +sff_cpld_reg.frmt_44_7=bit +sff_cpld_reg.pola_44_7=positive +sff_cpld_reg.addr_44_7=0x00030082 +sff_cpld_reg.len_44_7=1 +sff_cpld_reg.bit_offset_44_7=3 + +sff_cpld_reg.mode_45_7=config +sff_cpld_reg.src_45_7=cpld +sff_cpld_reg.frmt_45_7=bit +sff_cpld_reg.pola_45_7=positive +sff_cpld_reg.addr_45_7=0x00030082 +sff_cpld_reg.len_45_7=1 +sff_cpld_reg.bit_offset_45_7=4 + +sff_cpld_reg.mode_46_7=config +sff_cpld_reg.src_46_7=cpld +sff_cpld_reg.frmt_46_7=bit +sff_cpld_reg.pola_46_7=positive +sff_cpld_reg.addr_46_7=0x00030082 +sff_cpld_reg.len_46_7=1 +sff_cpld_reg.bit_offset_46_7=5 + +sff_cpld_reg.mode_47_7=config +sff_cpld_reg.src_47_7=cpld +sff_cpld_reg.frmt_47_7=bit +sff_cpld_reg.pola_47_7=positive +sff_cpld_reg.addr_47_7=0x00030082 +sff_cpld_reg.len_47_7=1 +sff_cpld_reg.bit_offset_47_7=6 + +sff_cpld_reg.mode_48_7=config +sff_cpld_reg.src_48_7=cpld +sff_cpld_reg.frmt_48_7=bit +sff_cpld_reg.pola_48_7=positive +sff_cpld_reg.addr_48_7=0x00030082 +sff_cpld_reg.len_48_7=1 +sff_cpld_reg.bit_offset_48_7=7 + +sff_cpld_reg.mode_49_7=config +sff_cpld_reg.src_49_7=cpld +sff_cpld_reg.frmt_49_7=bit +sff_cpld_reg.pola_49_7=positive +sff_cpld_reg.addr_49_7=0x00030081 +sff_cpld_reg.len_49_7=1 +sff_cpld_reg.bit_offset_49_7=0 + +sff_cpld_reg.mode_50_7=config +sff_cpld_reg.src_50_7=cpld +sff_cpld_reg.frmt_50_7=bit +sff_cpld_reg.pola_50_7=positive +sff_cpld_reg.addr_50_7=0x00030081 +sff_cpld_reg.len_50_7=1 +sff_cpld_reg.bit_offset_50_7=1 + +sff_cpld_reg.mode_51_7=config +sff_cpld_reg.src_51_7=cpld +sff_cpld_reg.frmt_51_7=bit +sff_cpld_reg.pola_51_7=positive +sff_cpld_reg.addr_51_7=0x00030081 +sff_cpld_reg.len_51_7=1 +sff_cpld_reg.bit_offset_51_7=2 + +sff_cpld_reg.mode_52_7=config +sff_cpld_reg.src_52_7=cpld +sff_cpld_reg.frmt_52_7=bit +sff_cpld_reg.pola_52_7=positive +sff_cpld_reg.addr_52_7=0x00030081 +sff_cpld_reg.len_52_7=1 +sff_cpld_reg.bit_offset_52_7=3 + +sff_cpld_reg.mode_53_7=config +sff_cpld_reg.src_53_7=cpld +sff_cpld_reg.frmt_53_7=bit +sff_cpld_reg.pola_53_7=positive +sff_cpld_reg.addr_53_7=0x00030081 +sff_cpld_reg.len_53_7=1 +sff_cpld_reg.bit_offset_53_7=4 + +sff_cpld_reg.mode_54_7=config +sff_cpld_reg.src_54_7=cpld +sff_cpld_reg.frmt_54_7=bit +sff_cpld_reg.pola_54_7=positive +sff_cpld_reg.addr_54_7=0x00030081 +sff_cpld_reg.len_54_7=1 +sff_cpld_reg.bit_offset_54_7=5 + +sff_cpld_reg.mode_55_7=config +sff_cpld_reg.src_55_7=cpld +sff_cpld_reg.frmt_55_7=bit +sff_cpld_reg.pola_55_7=positive +sff_cpld_reg.addr_55_7=0x00030081 +sff_cpld_reg.len_55_7=1 +sff_cpld_reg.bit_offset_55_7=6 + +sff_cpld_reg.mode_56_7=config +sff_cpld_reg.src_56_7=cpld +sff_cpld_reg.frmt_56_7=bit +sff_cpld_reg.pola_56_7=positive +sff_cpld_reg.addr_56_7=0x00030081 +sff_cpld_reg.len_56_7=1 +sff_cpld_reg.bit_offset_56_7=7 + +sff_cpld_reg.mode_57_7=config +sff_cpld_reg.src_57_7=cpld +sff_cpld_reg.frmt_57_7=bit +sff_cpld_reg.pola_57_7=positive +sff_cpld_reg.addr_57_7=0x00030080 +sff_cpld_reg.len_57_7=1 +sff_cpld_reg.bit_offset_57_7=0 + +sff_cpld_reg.mode_58_7=config +sff_cpld_reg.src_58_7=cpld +sff_cpld_reg.frmt_58_7=bit +sff_cpld_reg.pola_58_7=positive +sff_cpld_reg.addr_58_7=0x00030080 +sff_cpld_reg.len_58_7=1 +sff_cpld_reg.bit_offset_58_7=1 + +sff_cpld_reg.mode_59_7=config +sff_cpld_reg.src_59_7=cpld +sff_cpld_reg.frmt_59_7=bit +sff_cpld_reg.pola_59_7=positive +sff_cpld_reg.addr_59_7=0x00030080 +sff_cpld_reg.len_59_7=1 +sff_cpld_reg.bit_offset_59_7=2 + +sff_cpld_reg.mode_60_7=config +sff_cpld_reg.src_60_7=cpld +sff_cpld_reg.frmt_60_7=bit +sff_cpld_reg.pola_60_7=positive +sff_cpld_reg.addr_60_7=0x00030080 +sff_cpld_reg.len_60_7=1 +sff_cpld_reg.bit_offset_60_7=3 + +sff_cpld_reg.mode_61_7=config +sff_cpld_reg.src_61_7=cpld +sff_cpld_reg.frmt_61_7=bit +sff_cpld_reg.pola_61_7=positive +sff_cpld_reg.addr_61_7=0x00030080 +sff_cpld_reg.len_61_7=1 +sff_cpld_reg.bit_offset_61_7=4 + +sff_cpld_reg.mode_62_7=config +sff_cpld_reg.src_62_7=cpld +sff_cpld_reg.frmt_62_7=bit +sff_cpld_reg.pola_62_7=positive +sff_cpld_reg.addr_62_7=0x00030080 +sff_cpld_reg.len_62_7=1 +sff_cpld_reg.bit_offset_62_7=5 + +sff_cpld_reg.mode_63_7=config +sff_cpld_reg.src_63_7=cpld +sff_cpld_reg.frmt_63_7=bit +sff_cpld_reg.pola_63_7=positive +sff_cpld_reg.addr_63_7=0x00030080 +sff_cpld_reg.len_63_7=1 +sff_cpld_reg.bit_offset_63_7=6 + +sff_cpld_reg.mode_64_7=config +sff_cpld_reg.src_64_7=cpld +sff_cpld_reg.frmt_64_7=bit +sff_cpld_reg.pola_64_7=positive +sff_cpld_reg.addr_64_7=0x00030080 +sff_cpld_reg.len_64_7=1 +sff_cpld_reg.bit_offset_64_7=7 + + +# 800G module module_present signal +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x00020075 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=0 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x00020075 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=1 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x00020075 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=2 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x00020075 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=3 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=cpld +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.addr_5_8=0x00020075 +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=4 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=cpld +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.addr_6_8=0x00020075 +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=5 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=cpld +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.addr_7_8=0x00020075 +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=6 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=cpld +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.addr_8_8=0x00020075 +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=7 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=cpld +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.addr_9_8=0x00020074 +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=0 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=cpld +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.addr_10_8=0x00020074 +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=1 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=cpld +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.addr_11_8=0x00020074 +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=2 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=cpld +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.addr_12_8=0x00020074 +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=3 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=cpld +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.addr_13_8=0x00020074 +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=4 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=cpld +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.addr_14_8=0x00020074 +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=5 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=cpld +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.addr_15_8=0x00020074 +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=cpld +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.addr_16_8=0x00020074 +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=cpld +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.addr_17_8=0x00020073 +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=cpld +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.addr_18_8=0x00020073 +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=cpld +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.addr_19_8=0x00020073 +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=2 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=cpld +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.addr_20_8=0x00020073 +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=3 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=cpld +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.addr_21_8=0x00020073 +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=4 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=cpld +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.addr_22_8=0x00020073 +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=5 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=cpld +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.addr_23_8=0x00020073 +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=6 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=cpld +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.addr_24_8=0x00020073 +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=7 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=cpld +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.addr_25_8=0x0003007a +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=0 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=cpld +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.addr_26_8=0x0003007a +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=1 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=cpld +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.addr_27_8=0x0003007a +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=2 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=cpld +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.addr_28_8=0x0003007a +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=3 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=cpld +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.addr_29_8=0x0003007a +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=4 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=cpld +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.addr_30_8=0x0003007a +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=5 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=cpld +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.addr_31_8=0x0003007a +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=6 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=cpld +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.addr_32_8=0x0003007a +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=7 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=cpld +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.addr_33_8=0x00030079 +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=0 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=cpld +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.addr_34_8=0x00030079 +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=1 + +sff_cpld_reg.mode_35_8=config +sff_cpld_reg.src_35_8=cpld +sff_cpld_reg.frmt_35_8=bit +sff_cpld_reg.pola_35_8=negative +sff_cpld_reg.addr_35_8=0x00030079 +sff_cpld_reg.len_35_8=1 +sff_cpld_reg.bit_offset_35_8=2 + +sff_cpld_reg.mode_36_8=config +sff_cpld_reg.src_36_8=cpld +sff_cpld_reg.frmt_36_8=bit +sff_cpld_reg.pola_36_8=negative +sff_cpld_reg.addr_36_8=0x00030079 +sff_cpld_reg.len_36_8=1 +sff_cpld_reg.bit_offset_36_8=3 + +sff_cpld_reg.mode_37_8=config +sff_cpld_reg.src_37_8=cpld +sff_cpld_reg.frmt_37_8=bit +sff_cpld_reg.pola_37_8=negative +sff_cpld_reg.addr_37_8=0x00030079 +sff_cpld_reg.len_37_8=1 +sff_cpld_reg.bit_offset_37_8=4 + +sff_cpld_reg.mode_38_8=config +sff_cpld_reg.src_38_8=cpld +sff_cpld_reg.frmt_38_8=bit +sff_cpld_reg.pola_38_8=negative +sff_cpld_reg.addr_38_8=0x00030079 +sff_cpld_reg.len_38_8=1 +sff_cpld_reg.bit_offset_38_8=5 + +sff_cpld_reg.mode_39_8=config +sff_cpld_reg.src_39_8=cpld +sff_cpld_reg.frmt_39_8=bit +sff_cpld_reg.pola_39_8=negative +sff_cpld_reg.addr_39_8=0x00030079 +sff_cpld_reg.len_39_8=1 +sff_cpld_reg.bit_offset_39_8=6 + +sff_cpld_reg.mode_40_8=config +sff_cpld_reg.src_40_8=cpld +sff_cpld_reg.frmt_40_8=bit +sff_cpld_reg.pola_40_8=negative +sff_cpld_reg.addr_40_8=0x00030079 +sff_cpld_reg.len_40_8=1 +sff_cpld_reg.bit_offset_40_8=7 + +sff_cpld_reg.mode_41_8=config +sff_cpld_reg.src_41_8=cpld +sff_cpld_reg.frmt_41_8=bit +sff_cpld_reg.pola_41_8=negative +sff_cpld_reg.addr_41_8=0x00030078 +sff_cpld_reg.len_41_8=1 +sff_cpld_reg.bit_offset_41_8=0 + +sff_cpld_reg.mode_42_8=config +sff_cpld_reg.src_42_8=cpld +sff_cpld_reg.frmt_42_8=bit +sff_cpld_reg.pola_42_8=negative +sff_cpld_reg.addr_42_8=0x00030078 +sff_cpld_reg.len_42_8=1 +sff_cpld_reg.bit_offset_42_8=1 + +sff_cpld_reg.mode_43_8=config +sff_cpld_reg.src_43_8=cpld +sff_cpld_reg.frmt_43_8=bit +sff_cpld_reg.pola_43_8=negative +sff_cpld_reg.addr_43_8=0x00030078 +sff_cpld_reg.len_43_8=1 +sff_cpld_reg.bit_offset_43_8=2 + +sff_cpld_reg.mode_44_8=config +sff_cpld_reg.src_44_8=cpld +sff_cpld_reg.frmt_44_8=bit +sff_cpld_reg.pola_44_8=negative +sff_cpld_reg.addr_44_8=0x00030078 +sff_cpld_reg.len_44_8=1 +sff_cpld_reg.bit_offset_44_8=3 + +sff_cpld_reg.mode_45_8=config +sff_cpld_reg.src_45_8=cpld +sff_cpld_reg.frmt_45_8=bit +sff_cpld_reg.pola_45_8=negative +sff_cpld_reg.addr_45_8=0x00030078 +sff_cpld_reg.len_45_8=1 +sff_cpld_reg.bit_offset_45_8=4 + +sff_cpld_reg.mode_46_8=config +sff_cpld_reg.src_46_8=cpld +sff_cpld_reg.frmt_46_8=bit +sff_cpld_reg.pola_46_8=negative +sff_cpld_reg.addr_46_8=0x00030078 +sff_cpld_reg.len_46_8=1 +sff_cpld_reg.bit_offset_46_8=5 + +sff_cpld_reg.mode_47_8=config +sff_cpld_reg.src_47_8=cpld +sff_cpld_reg.frmt_47_8=bit +sff_cpld_reg.pola_47_8=negative +sff_cpld_reg.addr_47_8=0x00030078 +sff_cpld_reg.len_47_8=1 +sff_cpld_reg.bit_offset_47_8=6 + +sff_cpld_reg.mode_48_8=config +sff_cpld_reg.src_48_8=cpld +sff_cpld_reg.frmt_48_8=bit +sff_cpld_reg.pola_48_8=negative +sff_cpld_reg.addr_48_8=0x00030078 +sff_cpld_reg.len_48_8=1 +sff_cpld_reg.bit_offset_48_8=7 + +sff_cpld_reg.mode_49_8=config +sff_cpld_reg.src_49_8=cpld +sff_cpld_reg.frmt_49_8=bit +sff_cpld_reg.pola_49_8=negative +sff_cpld_reg.addr_49_8=0x00030077 +sff_cpld_reg.len_49_8=1 +sff_cpld_reg.bit_offset_49_8=0 + +sff_cpld_reg.mode_50_8=config +sff_cpld_reg.src_50_8=cpld +sff_cpld_reg.frmt_50_8=bit +sff_cpld_reg.pola_50_8=negative +sff_cpld_reg.addr_50_8=0x00030077 +sff_cpld_reg.len_50_8=1 +sff_cpld_reg.bit_offset_50_8=1 + +sff_cpld_reg.mode_51_8=config +sff_cpld_reg.src_51_8=cpld +sff_cpld_reg.frmt_51_8=bit +sff_cpld_reg.pola_51_8=negative +sff_cpld_reg.addr_51_8=0x00030077 +sff_cpld_reg.len_51_8=1 +sff_cpld_reg.bit_offset_51_8=2 + +sff_cpld_reg.mode_52_8=config +sff_cpld_reg.src_52_8=cpld +sff_cpld_reg.frmt_52_8=bit +sff_cpld_reg.pola_52_8=negative +sff_cpld_reg.addr_52_8=0x00030077 +sff_cpld_reg.len_52_8=1 +sff_cpld_reg.bit_offset_52_8=3 + +sff_cpld_reg.mode_53_8=config +sff_cpld_reg.src_53_8=cpld +sff_cpld_reg.frmt_53_8=bit +sff_cpld_reg.pola_53_8=negative +sff_cpld_reg.addr_53_8=0x00030077 +sff_cpld_reg.len_53_8=1 +sff_cpld_reg.bit_offset_53_8=4 + +sff_cpld_reg.mode_54_8=config +sff_cpld_reg.src_54_8=cpld +sff_cpld_reg.frmt_54_8=bit +sff_cpld_reg.pola_54_8=negative +sff_cpld_reg.addr_54_8=0x00030077 +sff_cpld_reg.len_54_8=1 +sff_cpld_reg.bit_offset_54_8=5 + +sff_cpld_reg.mode_55_8=config +sff_cpld_reg.src_55_8=cpld +sff_cpld_reg.frmt_55_8=bit +sff_cpld_reg.pola_55_8=negative +sff_cpld_reg.addr_55_8=0x00030077 +sff_cpld_reg.len_55_8=1 +sff_cpld_reg.bit_offset_55_8=6 + +sff_cpld_reg.mode_56_8=config +sff_cpld_reg.src_56_8=cpld +sff_cpld_reg.frmt_56_8=bit +sff_cpld_reg.pola_56_8=negative +sff_cpld_reg.addr_56_8=0x00030077 +sff_cpld_reg.len_56_8=1 +sff_cpld_reg.bit_offset_56_8=7 + +sff_cpld_reg.mode_57_8=config +sff_cpld_reg.src_57_8=cpld +sff_cpld_reg.frmt_57_8=bit +sff_cpld_reg.pola_57_8=negative +sff_cpld_reg.addr_57_8=0x00030076 +sff_cpld_reg.len_57_8=1 +sff_cpld_reg.bit_offset_57_8=0 + +sff_cpld_reg.mode_58_8=config +sff_cpld_reg.src_58_8=cpld +sff_cpld_reg.frmt_58_8=bit +sff_cpld_reg.pola_58_8=negative +sff_cpld_reg.addr_58_8=0x00030076 +sff_cpld_reg.len_58_8=1 +sff_cpld_reg.bit_offset_58_8=1 + +sff_cpld_reg.mode_59_8=config +sff_cpld_reg.src_59_8=cpld +sff_cpld_reg.frmt_59_8=bit +sff_cpld_reg.pola_59_8=negative +sff_cpld_reg.addr_59_8=0x00030076 +sff_cpld_reg.len_59_8=1 +sff_cpld_reg.bit_offset_59_8=2 + +sff_cpld_reg.mode_60_8=config +sff_cpld_reg.src_60_8=cpld +sff_cpld_reg.frmt_60_8=bit +sff_cpld_reg.pola_60_8=negative +sff_cpld_reg.addr_60_8=0x00030076 +sff_cpld_reg.len_60_8=1 +sff_cpld_reg.bit_offset_60_8=3 + +sff_cpld_reg.mode_61_8=config +sff_cpld_reg.src_61_8=cpld +sff_cpld_reg.frmt_61_8=bit +sff_cpld_reg.pola_61_8=negative +sff_cpld_reg.addr_61_8=0x00030076 +sff_cpld_reg.len_61_8=1 +sff_cpld_reg.bit_offset_61_8=4 + +sff_cpld_reg.mode_62_8=config +sff_cpld_reg.src_62_8=cpld +sff_cpld_reg.frmt_62_8=bit +sff_cpld_reg.pola_62_8=negative +sff_cpld_reg.addr_62_8=0x00030076 +sff_cpld_reg.len_62_8=1 +sff_cpld_reg.bit_offset_62_8=5 + +sff_cpld_reg.mode_63_8=config +sff_cpld_reg.src_63_8=cpld +sff_cpld_reg.frmt_63_8=bit +sff_cpld_reg.pola_63_8=negative +sff_cpld_reg.addr_63_8=0x00030076 +sff_cpld_reg.len_63_8=1 +sff_cpld_reg.bit_offset_63_8=6 + +sff_cpld_reg.mode_64_8=config +sff_cpld_reg.src_64_8=cpld +sff_cpld_reg.frmt_64_8=bit +sff_cpld_reg.pola_64_8=negative +sff_cpld_reg.addr_64_8=0x00030076 +sff_cpld_reg.len_64_8=1 +sff_cpld_reg.bit_offset_64_8=7 + +sff_cpld_reg.mode_65_8=config +sff_cpld_reg.src_65_8=cpld +sff_cpld_reg.frmt_65_8=bit +sff_cpld_reg.pola_65_8=negative +sff_cpld_reg.addr_65_8=0x00050069 +sff_cpld_reg.len_65_8=1 +sff_cpld_reg.bit_offset_65_8=0 + +sff_cpld_reg.mode_66_8=config +sff_cpld_reg.src_66_8=cpld +sff_cpld_reg.frmt_66_8=bit +sff_cpld_reg.pola_66_8=negative +sff_cpld_reg.addr_66_8=0x00050069 +sff_cpld_reg.len_66_8=1 +sff_cpld_reg.bit_offset_66_8=1 + + +# 800G module power_on signal +sff_cpld_reg.mode_1_1=config +sff_cpld_reg.src_1_1=cpld +sff_cpld_reg.frmt_1_1=bit +sff_cpld_reg.addr_1_1=0x00040080 +sff_cpld_reg.len_1_1=1 +sff_cpld_reg.bit_offset_1_1=0 + +sff_cpld_reg.mode_2_1=config +sff_cpld_reg.src_2_1=cpld +sff_cpld_reg.frmt_2_1=bit +sff_cpld_reg.addr_2_1=0x00040080 +sff_cpld_reg.len_2_1=1 +sff_cpld_reg.bit_offset_2_1=0 + +sff_cpld_reg.mode_3_1=config +sff_cpld_reg.src_3_1=cpld +sff_cpld_reg.frmt_3_1=bit +sff_cpld_reg.addr_3_1=0x00040080 +sff_cpld_reg.len_3_1=1 +sff_cpld_reg.bit_offset_3_1=0 + +sff_cpld_reg.mode_4_1=config +sff_cpld_reg.src_4_1=cpld +sff_cpld_reg.frmt_4_1=bit +sff_cpld_reg.addr_4_1=0x00040080 +sff_cpld_reg.len_4_1=1 +sff_cpld_reg.bit_offset_4_1=0 + +sff_cpld_reg.mode_5_1=config +sff_cpld_reg.src_5_1=cpld +sff_cpld_reg.frmt_5_1=bit +sff_cpld_reg.addr_5_1=0x00040081 +sff_cpld_reg.len_5_1=1 +sff_cpld_reg.bit_offset_5_1=0 + +sff_cpld_reg.mode_6_1=config +sff_cpld_reg.src_6_1=cpld +sff_cpld_reg.frmt_6_1=bit +sff_cpld_reg.addr_6_1=0x00040081 +sff_cpld_reg.len_6_1=1 +sff_cpld_reg.bit_offset_6_1=0 + +sff_cpld_reg.mode_7_1=config +sff_cpld_reg.src_7_1=cpld +sff_cpld_reg.frmt_7_1=bit +sff_cpld_reg.addr_7_1=0x00040081 +sff_cpld_reg.len_7_1=1 +sff_cpld_reg.bit_offset_7_1=0 + +sff_cpld_reg.mode_8_1=config +sff_cpld_reg.src_8_1=cpld +sff_cpld_reg.frmt_8_1=bit +sff_cpld_reg.addr_8_1=0x00040081 +sff_cpld_reg.len_8_1=1 +sff_cpld_reg.bit_offset_8_1=0 + +sff_cpld_reg.mode_9_1=config +sff_cpld_reg.src_9_1=cpld +sff_cpld_reg.frmt_9_1=bit +sff_cpld_reg.addr_9_1=0x00040080 +sff_cpld_reg.len_9_1=1 +sff_cpld_reg.bit_offset_9_1=1 + +sff_cpld_reg.mode_10_1=config +sff_cpld_reg.src_10_1=cpld +sff_cpld_reg.frmt_10_1=bit +sff_cpld_reg.addr_10_1=0x00040080 +sff_cpld_reg.len_10_1=1 +sff_cpld_reg.bit_offset_10_1=1 + +sff_cpld_reg.mode_11_1=config +sff_cpld_reg.src_11_1=cpld +sff_cpld_reg.frmt_11_1=bit +sff_cpld_reg.addr_11_1=0x00040080 +sff_cpld_reg.len_11_1=1 +sff_cpld_reg.bit_offset_11_1=1 + +sff_cpld_reg.mode_12_1=config +sff_cpld_reg.src_12_1=cpld +sff_cpld_reg.frmt_12_1=bit +sff_cpld_reg.addr_12_1=0x00040080 +sff_cpld_reg.len_12_1=1 +sff_cpld_reg.bit_offset_12_1=1 + +sff_cpld_reg.mode_13_1=config +sff_cpld_reg.src_13_1=cpld +sff_cpld_reg.frmt_13_1=bit +sff_cpld_reg.addr_13_1=0x00040081 +sff_cpld_reg.len_13_1=1 +sff_cpld_reg.bit_offset_13_1=1 + +sff_cpld_reg.mode_14_1=config +sff_cpld_reg.src_14_1=cpld +sff_cpld_reg.frmt_14_1=bit +sff_cpld_reg.addr_14_1=0x00040081 +sff_cpld_reg.len_14_1=1 +sff_cpld_reg.bit_offset_14_1=1 + +sff_cpld_reg.mode_15_1=config +sff_cpld_reg.src_15_1=cpld +sff_cpld_reg.frmt_15_1=bit +sff_cpld_reg.addr_15_1=0x00040081 +sff_cpld_reg.len_15_1=1 +sff_cpld_reg.bit_offset_15_1=1 + +sff_cpld_reg.mode_16_1=config +sff_cpld_reg.src_16_1=cpld +sff_cpld_reg.frmt_16_1=bit +sff_cpld_reg.addr_16_1=0x00040081 +sff_cpld_reg.len_16_1=1 +sff_cpld_reg.bit_offset_16_1=1 + +sff_cpld_reg.mode_17_1=config +sff_cpld_reg.src_17_1=cpld +sff_cpld_reg.frmt_17_1=bit +sff_cpld_reg.addr_17_1=0x00040080 +sff_cpld_reg.len_17_1=1 +sff_cpld_reg.bit_offset_17_1=2 + +sff_cpld_reg.mode_18_1=config +sff_cpld_reg.src_18_1=cpld +sff_cpld_reg.frmt_18_1=bit +sff_cpld_reg.addr_18_1=0x00040080 +sff_cpld_reg.len_18_1=1 +sff_cpld_reg.bit_offset_18_1=2 + +sff_cpld_reg.mode_19_1=config +sff_cpld_reg.src_19_1=cpld +sff_cpld_reg.frmt_19_1=bit +sff_cpld_reg.addr_19_1=0x00040080 +sff_cpld_reg.len_19_1=1 +sff_cpld_reg.bit_offset_19_1=2 + +sff_cpld_reg.mode_20_1=config +sff_cpld_reg.src_20_1=cpld +sff_cpld_reg.frmt_20_1=bit +sff_cpld_reg.addr_20_1=0x00040080 +sff_cpld_reg.len_20_1=1 +sff_cpld_reg.bit_offset_20_1=2 + +sff_cpld_reg.mode_21_1=config +sff_cpld_reg.src_21_1=cpld +sff_cpld_reg.frmt_21_1=bit +sff_cpld_reg.addr_21_1=0x00040081 +sff_cpld_reg.len_21_1=1 +sff_cpld_reg.bit_offset_21_1=2 + +sff_cpld_reg.mode_22_1=config +sff_cpld_reg.src_22_1=cpld +sff_cpld_reg.frmt_22_1=bit +sff_cpld_reg.addr_22_1=0x00040081 +sff_cpld_reg.len_22_1=1 +sff_cpld_reg.bit_offset_22_1=2 + +sff_cpld_reg.mode_23_1=config +sff_cpld_reg.src_23_1=cpld +sff_cpld_reg.frmt_23_1=bit +sff_cpld_reg.addr_23_1=0x00040081 +sff_cpld_reg.len_23_1=1 +sff_cpld_reg.bit_offset_23_1=2 + +sff_cpld_reg.mode_24_1=config +sff_cpld_reg.src_24_1=cpld +sff_cpld_reg.frmt_24_1=bit +sff_cpld_reg.addr_24_1=0x00040081 +sff_cpld_reg.len_24_1=1 +sff_cpld_reg.bit_offset_24_1=2 + +sff_cpld_reg.mode_25_1=config +sff_cpld_reg.src_25_1=cpld +sff_cpld_reg.frmt_25_1=bit +sff_cpld_reg.addr_25_1=0x00040080 +sff_cpld_reg.len_25_1=1 +sff_cpld_reg.bit_offset_25_1=3 + +sff_cpld_reg.mode_26_1=config +sff_cpld_reg.src_26_1=cpld +sff_cpld_reg.frmt_26_1=bit +sff_cpld_reg.addr_26_1=0x00040080 +sff_cpld_reg.len_26_1=1 +sff_cpld_reg.bit_offset_26_1=3 + +sff_cpld_reg.mode_27_1=config +sff_cpld_reg.src_27_1=cpld +sff_cpld_reg.frmt_27_1=bit +sff_cpld_reg.addr_27_1=0x00040080 +sff_cpld_reg.len_27_1=1 +sff_cpld_reg.bit_offset_27_1=3 + +sff_cpld_reg.mode_28_1=config +sff_cpld_reg.src_28_1=cpld +sff_cpld_reg.frmt_28_1=bit +sff_cpld_reg.addr_28_1=0x00040080 +sff_cpld_reg.len_28_1=1 +sff_cpld_reg.bit_offset_28_1=3 + +sff_cpld_reg.mode_29_1=config +sff_cpld_reg.src_29_1=cpld +sff_cpld_reg.frmt_29_1=bit +sff_cpld_reg.addr_29_1=0x00040081 +sff_cpld_reg.len_29_1=1 +sff_cpld_reg.bit_offset_29_1=3 + +sff_cpld_reg.mode_30_1=config +sff_cpld_reg.src_30_1=cpld +sff_cpld_reg.frmt_30_1=bit +sff_cpld_reg.addr_30_1=0x00040081 +sff_cpld_reg.len_30_1=1 +sff_cpld_reg.bit_offset_30_1=3 + +sff_cpld_reg.mode_31_1=config +sff_cpld_reg.src_31_1=cpld +sff_cpld_reg.frmt_31_1=bit +sff_cpld_reg.addr_31_1=0x00040081 +sff_cpld_reg.len_31_1=1 +sff_cpld_reg.bit_offset_31_1=3 + +sff_cpld_reg.mode_32_1=config +sff_cpld_reg.src_32_1=cpld +sff_cpld_reg.frmt_32_1=bit +sff_cpld_reg.addr_32_1=0x00040081 +sff_cpld_reg.len_32_1=1 +sff_cpld_reg.bit_offset_32_1=3 + +sff_cpld_reg.mode_33_1=config +sff_cpld_reg.src_33_1=cpld +sff_cpld_reg.frmt_33_1=bit +sff_cpld_reg.addr_33_1=0x00040080 +sff_cpld_reg.len_33_1=1 +sff_cpld_reg.bit_offset_33_1=4 + +sff_cpld_reg.mode_34_1=config +sff_cpld_reg.src_34_1=cpld +sff_cpld_reg.frmt_34_1=bit +sff_cpld_reg.addr_34_1=0x00040080 +sff_cpld_reg.len_34_1=1 +sff_cpld_reg.bit_offset_34_1=4 + +sff_cpld_reg.mode_35_1=config +sff_cpld_reg.src_35_1=cpld +sff_cpld_reg.frmt_35_1=bit +sff_cpld_reg.addr_35_1=0x00040080 +sff_cpld_reg.len_35_1=1 +sff_cpld_reg.bit_offset_35_1=4 + +sff_cpld_reg.mode_36_1=config +sff_cpld_reg.src_36_1=cpld +sff_cpld_reg.frmt_36_1=bit +sff_cpld_reg.addr_36_1=0x00040080 +sff_cpld_reg.len_36_1=1 +sff_cpld_reg.bit_offset_36_1=4 + +sff_cpld_reg.mode_37_1=config +sff_cpld_reg.src_37_1=cpld +sff_cpld_reg.frmt_37_1=bit +sff_cpld_reg.addr_37_1=0x00040081 +sff_cpld_reg.len_37_1=1 +sff_cpld_reg.bit_offset_37_1=4 + +sff_cpld_reg.mode_38_1=config +sff_cpld_reg.src_38_1=cpld +sff_cpld_reg.frmt_38_1=bit +sff_cpld_reg.addr_38_1=0x00040081 +sff_cpld_reg.len_38_1=1 +sff_cpld_reg.bit_offset_38_1=4 + +sff_cpld_reg.mode_39_1=config +sff_cpld_reg.src_39_1=cpld +sff_cpld_reg.frmt_39_1=bit +sff_cpld_reg.addr_39_1=0x00040081 +sff_cpld_reg.len_39_1=1 +sff_cpld_reg.bit_offset_39_1=4 + +sff_cpld_reg.mode_40_1=config +sff_cpld_reg.src_40_1=cpld +sff_cpld_reg.frmt_40_1=bit +sff_cpld_reg.addr_40_1=0x00040081 +sff_cpld_reg.len_40_1=1 +sff_cpld_reg.bit_offset_40_1=4 + +sff_cpld_reg.mode_41_1=config +sff_cpld_reg.src_41_1=cpld +sff_cpld_reg.frmt_41_1=bit +sff_cpld_reg.addr_41_1=0x00040080 +sff_cpld_reg.len_41_1=1 +sff_cpld_reg.bit_offset_41_1=5 + +sff_cpld_reg.mode_42_1=config +sff_cpld_reg.src_42_1=cpld +sff_cpld_reg.frmt_42_1=bit +sff_cpld_reg.addr_42_1=0x00040080 +sff_cpld_reg.len_42_1=1 +sff_cpld_reg.bit_offset_42_1=5 + +sff_cpld_reg.mode_43_1=config +sff_cpld_reg.src_43_1=cpld +sff_cpld_reg.frmt_43_1=bit +sff_cpld_reg.addr_43_1=0x00040080 +sff_cpld_reg.len_43_1=1 +sff_cpld_reg.bit_offset_43_1=5 + +sff_cpld_reg.mode_44_1=config +sff_cpld_reg.src_44_1=cpld +sff_cpld_reg.frmt_44_1=bit +sff_cpld_reg.addr_44_1=0x00040080 +sff_cpld_reg.len_44_1=1 +sff_cpld_reg.bit_offset_44_1=5 + +sff_cpld_reg.mode_45_1=config +sff_cpld_reg.src_45_1=cpld +sff_cpld_reg.frmt_45_1=bit +sff_cpld_reg.addr_45_1=0x00040081 +sff_cpld_reg.len_45_1=1 +sff_cpld_reg.bit_offset_45_1=5 + +sff_cpld_reg.mode_46_1=config +sff_cpld_reg.src_46_1=cpld +sff_cpld_reg.frmt_46_1=bit +sff_cpld_reg.addr_46_1=0x00040081 +sff_cpld_reg.len_46_1=1 +sff_cpld_reg.bit_offset_46_1=5 + +sff_cpld_reg.mode_47_1=config +sff_cpld_reg.src_47_1=cpld +sff_cpld_reg.frmt_47_1=bit +sff_cpld_reg.addr_47_1=0x00040081 +sff_cpld_reg.len_47_1=1 +sff_cpld_reg.bit_offset_47_1=5 + +sff_cpld_reg.mode_48_1=config +sff_cpld_reg.src_48_1=cpld +sff_cpld_reg.frmt_48_1=bit +sff_cpld_reg.addr_48_1=0x00040081 +sff_cpld_reg.len_48_1=1 +sff_cpld_reg.bit_offset_48_1=5 + +sff_cpld_reg.mode_49_1=config +sff_cpld_reg.src_49_1=cpld +sff_cpld_reg.frmt_49_1=bit +sff_cpld_reg.addr_49_1=0x00040080 +sff_cpld_reg.len_49_1=1 +sff_cpld_reg.bit_offset_49_1=6 + +sff_cpld_reg.mode_50_1=config +sff_cpld_reg.src_50_1=cpld +sff_cpld_reg.frmt_50_1=bit +sff_cpld_reg.addr_50_1=0x00040080 +sff_cpld_reg.len_50_1=1 +sff_cpld_reg.bit_offset_50_1=6 + +sff_cpld_reg.mode_51_1=config +sff_cpld_reg.src_51_1=cpld +sff_cpld_reg.frmt_51_1=bit +sff_cpld_reg.addr_51_1=0x00040080 +sff_cpld_reg.len_51_1=1 +sff_cpld_reg.bit_offset_51_1=6 + +sff_cpld_reg.mode_52_1=config +sff_cpld_reg.src_52_1=cpld +sff_cpld_reg.frmt_52_1=bit +sff_cpld_reg.addr_52_1=0x00040080 +sff_cpld_reg.len_52_1=1 +sff_cpld_reg.bit_offset_52_1=6 + +sff_cpld_reg.mode_53_1=config +sff_cpld_reg.src_53_1=cpld +sff_cpld_reg.frmt_53_1=bit +sff_cpld_reg.addr_53_1=0x00040081 +sff_cpld_reg.len_53_1=1 +sff_cpld_reg.bit_offset_53_1=6 + +sff_cpld_reg.mode_54_1=config +sff_cpld_reg.src_54_1=cpld +sff_cpld_reg.frmt_54_1=bit +sff_cpld_reg.addr_54_1=0x00040081 +sff_cpld_reg.len_54_1=1 +sff_cpld_reg.bit_offset_54_1=6 + +sff_cpld_reg.mode_55_1=config +sff_cpld_reg.src_55_1=cpld +sff_cpld_reg.frmt_55_1=bit +sff_cpld_reg.addr_55_1=0x00040081 +sff_cpld_reg.len_55_1=1 +sff_cpld_reg.bit_offset_55_1=6 + +sff_cpld_reg.mode_56_1=config +sff_cpld_reg.src_56_1=cpld +sff_cpld_reg.frmt_56_1=bit +sff_cpld_reg.addr_56_1=0x00040081 +sff_cpld_reg.len_56_1=1 +sff_cpld_reg.bit_offset_56_1=6 + +sff_cpld_reg.mode_57_1=config +sff_cpld_reg.src_57_1=cpld +sff_cpld_reg.frmt_57_1=bit +sff_cpld_reg.addr_57_1=0x00040080 +sff_cpld_reg.len_57_1=1 +sff_cpld_reg.bit_offset_57_1=7 + +sff_cpld_reg.mode_58_1=config +sff_cpld_reg.src_58_1=cpld +sff_cpld_reg.frmt_58_1=bit +sff_cpld_reg.addr_58_1=0x00040080 +sff_cpld_reg.len_58_1=1 +sff_cpld_reg.bit_offset_58_1=7 + +sff_cpld_reg.mode_59_1=config +sff_cpld_reg.src_59_1=cpld +sff_cpld_reg.frmt_59_1=bit +sff_cpld_reg.addr_59_1=0x00040080 +sff_cpld_reg.len_59_1=1 +sff_cpld_reg.bit_offset_59_1=7 + +sff_cpld_reg.mode_60_1=config +sff_cpld_reg.src_60_1=cpld +sff_cpld_reg.frmt_60_1=bit +sff_cpld_reg.addr_60_1=0x00040080 +sff_cpld_reg.len_60_1=1 +sff_cpld_reg.bit_offset_60_1=7 + +sff_cpld_reg.mode_61_1=config +sff_cpld_reg.src_61_1=cpld +sff_cpld_reg.frmt_61_1=bit +sff_cpld_reg.addr_61_1=0x00040081 +sff_cpld_reg.len_61_1=1 +sff_cpld_reg.bit_offset_61_1=7 + +sff_cpld_reg.mode_62_1=config +sff_cpld_reg.src_62_1=cpld +sff_cpld_reg.frmt_62_1=bit +sff_cpld_reg.addr_62_1=0x00040081 +sff_cpld_reg.len_62_1=1 +sff_cpld_reg.bit_offset_62_1=7 + +sff_cpld_reg.mode_63_1=config +sff_cpld_reg.src_63_1=cpld +sff_cpld_reg.frmt_63_1=bit +sff_cpld_reg.addr_63_1=0x00040081 +sff_cpld_reg.len_63_1=1 +sff_cpld_reg.bit_offset_63_1=7 + +sff_cpld_reg.mode_64_1=config +sff_cpld_reg.src_64_1=cpld +sff_cpld_reg.frmt_64_1=bit +sff_cpld_reg.addr_64_1=0x00040081 +sff_cpld_reg.len_64_1=1 +sff_cpld_reg.bit_offset_64_1=7 + + +# interrupt +sff_cpld_reg.mode_1_9=config +sff_cpld_reg.src_1_9=cpld +sff_cpld_reg.frmt_1_9=bit +sff_cpld_reg.pola_1_9=negative +sff_cpld_reg.addr_1_9=0x00020062 +sff_cpld_reg.len_1_9=1 +sff_cpld_reg.bit_offset_1_9=0 + +sff_cpld_reg.mode_2_9=config +sff_cpld_reg.src_2_9=cpld +sff_cpld_reg.frmt_2_9=bit +sff_cpld_reg.pola_2_9=negative +sff_cpld_reg.addr_2_9=0x00020062 +sff_cpld_reg.len_2_9=1 +sff_cpld_reg.bit_offset_2_9=1 + +sff_cpld_reg.mode_3_9=config +sff_cpld_reg.src_3_9=cpld +sff_cpld_reg.frmt_3_9=bit +sff_cpld_reg.pola_3_9=negative +sff_cpld_reg.addr_3_9=0x00020062 +sff_cpld_reg.len_3_9=1 +sff_cpld_reg.bit_offset_3_9=2 + +sff_cpld_reg.mode_4_9=config +sff_cpld_reg.src_4_9=cpld +sff_cpld_reg.frmt_4_9=bit +sff_cpld_reg.pola_4_9=negative +sff_cpld_reg.addr_4_9=0x00020062 +sff_cpld_reg.len_4_9=1 +sff_cpld_reg.bit_offset_4_9=3 + +sff_cpld_reg.mode_5_9=config +sff_cpld_reg.src_5_9=cpld +sff_cpld_reg.frmt_5_9=bit +sff_cpld_reg.pola_5_9=negative +sff_cpld_reg.addr_5_9=0x00020062 +sff_cpld_reg.len_5_9=1 +sff_cpld_reg.bit_offset_5_9=4 + +sff_cpld_reg.mode_6_9=config +sff_cpld_reg.src_6_9=cpld +sff_cpld_reg.frmt_6_9=bit +sff_cpld_reg.pola_6_9=negative +sff_cpld_reg.addr_6_9=0x00020062 +sff_cpld_reg.len_6_9=1 +sff_cpld_reg.bit_offset_6_9=5 + +sff_cpld_reg.mode_7_9=config +sff_cpld_reg.src_7_9=cpld +sff_cpld_reg.frmt_7_9=bit +sff_cpld_reg.pola_7_9=negative +sff_cpld_reg.addr_7_9=0x00020062 +sff_cpld_reg.len_7_9=1 +sff_cpld_reg.bit_offset_7_9=6 + +sff_cpld_reg.mode_8_9=config +sff_cpld_reg.src_8_9=cpld +sff_cpld_reg.frmt_8_9=bit +sff_cpld_reg.pola_8_9=negative +sff_cpld_reg.addr_8_9=0x00020062 +sff_cpld_reg.len_8_9=1 +sff_cpld_reg.bit_offset_8_9=7 + +sff_cpld_reg.mode_9_9=config +sff_cpld_reg.src_9_9=cpld +sff_cpld_reg.frmt_9_9=bit +sff_cpld_reg.pola_9_9=negative +sff_cpld_reg.addr_9_9=0x00020061 +sff_cpld_reg.len_9_9=1 +sff_cpld_reg.bit_offset_9_9=0 + +sff_cpld_reg.mode_10_9=config +sff_cpld_reg.src_10_9=cpld +sff_cpld_reg.frmt_10_9=bit +sff_cpld_reg.pola_10_9=negative +sff_cpld_reg.addr_10_9=0x00020061 +sff_cpld_reg.len_10_9=1 +sff_cpld_reg.bit_offset_10_9=1 + +sff_cpld_reg.mode_11_9=config +sff_cpld_reg.src_11_9=cpld +sff_cpld_reg.frmt_11_9=bit +sff_cpld_reg.pola_11_9=negative +sff_cpld_reg.addr_11_9=0x00020061 +sff_cpld_reg.len_11_9=1 +sff_cpld_reg.bit_offset_11_9=2 + +sff_cpld_reg.mode_12_9=config +sff_cpld_reg.src_12_9=cpld +sff_cpld_reg.frmt_12_9=bit +sff_cpld_reg.pola_12_9=negative +sff_cpld_reg.addr_12_9=0x00020061 +sff_cpld_reg.len_12_9=1 +sff_cpld_reg.bit_offset_12_9=3 + +sff_cpld_reg.mode_13_9=config +sff_cpld_reg.src_13_9=cpld +sff_cpld_reg.frmt_13_9=bit +sff_cpld_reg.pola_13_9=negative +sff_cpld_reg.addr_13_9=0x00020061 +sff_cpld_reg.len_13_9=1 +sff_cpld_reg.bit_offset_13_9=4 + +sff_cpld_reg.mode_14_9=config +sff_cpld_reg.src_14_9=cpld +sff_cpld_reg.frmt_14_9=bit +sff_cpld_reg.pola_14_9=negative +sff_cpld_reg.addr_14_9=0x00020061 +sff_cpld_reg.len_14_9=1 +sff_cpld_reg.bit_offset_14_9=5 + +sff_cpld_reg.mode_15_9=config +sff_cpld_reg.src_15_9=cpld +sff_cpld_reg.frmt_15_9=bit +sff_cpld_reg.pola_15_9=negative +sff_cpld_reg.addr_15_9=0x00020061 +sff_cpld_reg.len_15_9=1 +sff_cpld_reg.bit_offset_15_9=6 + +sff_cpld_reg.mode_16_9=config +sff_cpld_reg.src_16_9=cpld +sff_cpld_reg.frmt_16_9=bit +sff_cpld_reg.pola_16_9=negative +sff_cpld_reg.addr_16_9=0x00020061 +sff_cpld_reg.len_16_9=1 +sff_cpld_reg.bit_offset_16_9=7 + +sff_cpld_reg.mode_17_9=config +sff_cpld_reg.src_17_9=cpld +sff_cpld_reg.frmt_17_9=bit +sff_cpld_reg.pola_17_9=negative +sff_cpld_reg.addr_17_9=0x00020060 +sff_cpld_reg.len_17_9=1 +sff_cpld_reg.bit_offset_17_9=0 + +sff_cpld_reg.mode_18_9=config +sff_cpld_reg.src_18_9=cpld +sff_cpld_reg.frmt_18_9=bit +sff_cpld_reg.pola_18_9=negative +sff_cpld_reg.addr_18_9=0x00020060 +sff_cpld_reg.len_18_9=1 +sff_cpld_reg.bit_offset_18_9=1 + +sff_cpld_reg.mode_19_9=config +sff_cpld_reg.src_19_9=cpld +sff_cpld_reg.frmt_19_9=bit +sff_cpld_reg.pola_19_9=negative +sff_cpld_reg.addr_19_9=0x00020060 +sff_cpld_reg.len_19_9=1 +sff_cpld_reg.bit_offset_19_9=2 + +sff_cpld_reg.mode_20_9=config +sff_cpld_reg.src_20_9=cpld +sff_cpld_reg.frmt_20_9=bit +sff_cpld_reg.pola_20_9=negative +sff_cpld_reg.addr_20_9=0x00020060 +sff_cpld_reg.len_20_9=1 +sff_cpld_reg.bit_offset_20_9=3 + +sff_cpld_reg.mode_21_9=config +sff_cpld_reg.src_21_9=cpld +sff_cpld_reg.frmt_21_9=bit +sff_cpld_reg.pola_21_9=negative +sff_cpld_reg.addr_21_9=0x00020060 +sff_cpld_reg.len_21_9=1 +sff_cpld_reg.bit_offset_21_9=4 + +sff_cpld_reg.mode_22_9=config +sff_cpld_reg.src_22_9=cpld +sff_cpld_reg.frmt_22_9=bit +sff_cpld_reg.pola_22_9=negative +sff_cpld_reg.addr_22_9=0x00020060 +sff_cpld_reg.len_22_9=1 +sff_cpld_reg.bit_offset_22_9=5 + +sff_cpld_reg.mode_23_9=config +sff_cpld_reg.src_23_9=cpld +sff_cpld_reg.frmt_23_9=bit +sff_cpld_reg.pola_23_9=negative +sff_cpld_reg.addr_23_9=0x00020060 +sff_cpld_reg.len_23_9=1 +sff_cpld_reg.bit_offset_23_9=6 + +sff_cpld_reg.mode_24_9=config +sff_cpld_reg.src_24_9=cpld +sff_cpld_reg.frmt_24_9=bit +sff_cpld_reg.pola_24_9=negative +sff_cpld_reg.addr_24_9=0x00020060 +sff_cpld_reg.len_24_9=1 +sff_cpld_reg.bit_offset_24_9=7 + +sff_cpld_reg.mode_25_9=config +sff_cpld_reg.src_25_9=cpld +sff_cpld_reg.frmt_25_9=bit +sff_cpld_reg.pola_25_9=negative +sff_cpld_reg.addr_25_9=0x00030064 +sff_cpld_reg.len_25_9=1 +sff_cpld_reg.bit_offset_25_9=0 + +sff_cpld_reg.mode_26_9=config +sff_cpld_reg.src_26_9=cpld +sff_cpld_reg.frmt_26_9=bit +sff_cpld_reg.pola_26_9=negative +sff_cpld_reg.addr_26_9=0x00030064 +sff_cpld_reg.len_26_9=1 +sff_cpld_reg.bit_offset_26_9=1 + +sff_cpld_reg.mode_27_9=config +sff_cpld_reg.src_27_9=cpld +sff_cpld_reg.frmt_27_9=bit +sff_cpld_reg.pola_27_9=negative +sff_cpld_reg.addr_27_9=0x00030064 +sff_cpld_reg.len_27_9=1 +sff_cpld_reg.bit_offset_27_9=2 + +sff_cpld_reg.mode_28_9=config +sff_cpld_reg.src_28_9=cpld +sff_cpld_reg.frmt_28_9=bit +sff_cpld_reg.pola_28_9=negative +sff_cpld_reg.addr_28_9=0x00030064 +sff_cpld_reg.len_28_9=1 +sff_cpld_reg.bit_offset_28_9=3 + +sff_cpld_reg.mode_29_9=config +sff_cpld_reg.src_29_9=cpld +sff_cpld_reg.frmt_29_9=bit +sff_cpld_reg.pola_29_9=negative +sff_cpld_reg.addr_29_9=0x00030064 +sff_cpld_reg.len_29_9=1 +sff_cpld_reg.bit_offset_29_9=4 + +sff_cpld_reg.mode_30_9=config +sff_cpld_reg.src_30_9=cpld +sff_cpld_reg.frmt_30_9=bit +sff_cpld_reg.pola_30_9=negative +sff_cpld_reg.addr_30_9=0x00030064 +sff_cpld_reg.len_30_9=1 +sff_cpld_reg.bit_offset_30_9=5 + +sff_cpld_reg.mode_31_9=config +sff_cpld_reg.src_31_9=cpld +sff_cpld_reg.frmt_31_9=bit +sff_cpld_reg.pola_31_9=negative +sff_cpld_reg.addr_31_9=0x00030064 +sff_cpld_reg.len_31_9=1 +sff_cpld_reg.bit_offset_31_9=6 + +sff_cpld_reg.mode_32_9=config +sff_cpld_reg.src_32_9=cpld +sff_cpld_reg.frmt_32_9=bit +sff_cpld_reg.pola_32_9=negative +sff_cpld_reg.addr_32_9=0x00030064 +sff_cpld_reg.len_32_9=1 +sff_cpld_reg.bit_offset_32_9=7 + +sff_cpld_reg.mode_33_9=config +sff_cpld_reg.src_33_9=cpld +sff_cpld_reg.frmt_33_9=bit +sff_cpld_reg.pola_33_9=negative +sff_cpld_reg.addr_33_9=0x00030063 +sff_cpld_reg.len_33_9=1 +sff_cpld_reg.bit_offset_33_9=0 + +sff_cpld_reg.mode_34_9=config +sff_cpld_reg.src_34_9=cpld +sff_cpld_reg.frmt_34_9=bit +sff_cpld_reg.pola_34_9=negative +sff_cpld_reg.addr_34_9=0x00030063 +sff_cpld_reg.len_34_9=1 +sff_cpld_reg.bit_offset_34_9=1 + +sff_cpld_reg.mode_35_9=config +sff_cpld_reg.src_35_9=cpld +sff_cpld_reg.frmt_35_9=bit +sff_cpld_reg.pola_35_9=negative +sff_cpld_reg.addr_35_9=0x00030063 +sff_cpld_reg.len_35_9=1 +sff_cpld_reg.bit_offset_35_9=2 + +sff_cpld_reg.mode_36_9=config +sff_cpld_reg.src_36_9=cpld +sff_cpld_reg.frmt_36_9=bit +sff_cpld_reg.pola_36_9=negative +sff_cpld_reg.addr_36_9=0x00030063 +sff_cpld_reg.len_36_9=1 +sff_cpld_reg.bit_offset_36_9=3 + +sff_cpld_reg.mode_37_9=config +sff_cpld_reg.src_37_9=cpld +sff_cpld_reg.frmt_37_9=bit +sff_cpld_reg.pola_37_9=negative +sff_cpld_reg.addr_37_9=0x00030063 +sff_cpld_reg.len_37_9=1 +sff_cpld_reg.bit_offset_37_9=4 + +sff_cpld_reg.mode_38_9=config +sff_cpld_reg.src_38_9=cpld +sff_cpld_reg.frmt_38_9=bit +sff_cpld_reg.pola_38_9=negative +sff_cpld_reg.addr_38_9=0x00030063 +sff_cpld_reg.len_38_9=1 +sff_cpld_reg.bit_offset_38_9=5 + +sff_cpld_reg.mode_39_9=config +sff_cpld_reg.src_39_9=cpld +sff_cpld_reg.frmt_39_9=bit +sff_cpld_reg.pola_39_9=negative +sff_cpld_reg.addr_39_9=0x00030063 +sff_cpld_reg.len_39_9=1 +sff_cpld_reg.bit_offset_39_9=6 + +sff_cpld_reg.mode_40_9=config +sff_cpld_reg.src_40_9=cpld +sff_cpld_reg.frmt_40_9=bit +sff_cpld_reg.pola_40_9=negative +sff_cpld_reg.addr_40_9=0x00030063 +sff_cpld_reg.len_40_9=1 +sff_cpld_reg.bit_offset_40_9=7 + +sff_cpld_reg.mode_41_9=config +sff_cpld_reg.src_41_9=cpld +sff_cpld_reg.frmt_41_9=bit +sff_cpld_reg.pola_41_9=negative +sff_cpld_reg.addr_41_9=0x00030062 +sff_cpld_reg.len_41_9=1 +sff_cpld_reg.bit_offset_41_9=0 + +sff_cpld_reg.mode_42_9=config +sff_cpld_reg.src_42_9=cpld +sff_cpld_reg.frmt_42_9=bit +sff_cpld_reg.pola_42_9=negative +sff_cpld_reg.addr_42_9=0x00030062 +sff_cpld_reg.len_42_9=1 +sff_cpld_reg.bit_offset_42_9=1 + +sff_cpld_reg.mode_43_9=config +sff_cpld_reg.src_43_9=cpld +sff_cpld_reg.frmt_43_9=bit +sff_cpld_reg.pola_43_9=negative +sff_cpld_reg.addr_43_9=0x00030062 +sff_cpld_reg.len_43_9=1 +sff_cpld_reg.bit_offset_43_9=2 + +sff_cpld_reg.mode_44_9=config +sff_cpld_reg.src_44_9=cpld +sff_cpld_reg.frmt_44_9=bit +sff_cpld_reg.pola_44_9=negative +sff_cpld_reg.addr_44_9=0x00030062 +sff_cpld_reg.len_44_9=1 +sff_cpld_reg.bit_offset_44_9=3 + +sff_cpld_reg.mode_45_9=config +sff_cpld_reg.src_45_9=cpld +sff_cpld_reg.frmt_45_9=bit +sff_cpld_reg.pola_45_9=negative +sff_cpld_reg.addr_45_9=0x00030062 +sff_cpld_reg.len_45_9=1 +sff_cpld_reg.bit_offset_45_9=4 + +sff_cpld_reg.mode_46_9=config +sff_cpld_reg.src_46_9=cpld +sff_cpld_reg.frmt_46_9=bit +sff_cpld_reg.pola_46_9=negative +sff_cpld_reg.addr_46_9=0x00030062 +sff_cpld_reg.len_46_9=1 +sff_cpld_reg.bit_offset_46_9=5 + +sff_cpld_reg.mode_47_9=config +sff_cpld_reg.src_47_9=cpld +sff_cpld_reg.frmt_47_9=bit +sff_cpld_reg.pola_47_9=negative +sff_cpld_reg.addr_47_9=0x00030062 +sff_cpld_reg.len_47_9=1 +sff_cpld_reg.bit_offset_47_9=6 + +sff_cpld_reg.mode_48_9=config +sff_cpld_reg.src_48_9=cpld +sff_cpld_reg.frmt_48_9=bit +sff_cpld_reg.pola_48_9=negative +sff_cpld_reg.addr_48_9=0x00030062 +sff_cpld_reg.len_48_9=1 +sff_cpld_reg.bit_offset_48_9=7 + +sff_cpld_reg.mode_49_9=config +sff_cpld_reg.src_49_9=cpld +sff_cpld_reg.frmt_49_9=bit +sff_cpld_reg.pola_49_9=negative +sff_cpld_reg.addr_49_9=0x00030061 +sff_cpld_reg.len_49_9=1 +sff_cpld_reg.bit_offset_49_9=0 + +sff_cpld_reg.mode_50_9=config +sff_cpld_reg.src_50_9=cpld +sff_cpld_reg.frmt_50_9=bit +sff_cpld_reg.pola_50_9=negative +sff_cpld_reg.addr_50_9=0x00030061 +sff_cpld_reg.len_50_9=1 +sff_cpld_reg.bit_offset_50_9=1 + +sff_cpld_reg.mode_51_9=config +sff_cpld_reg.src_51_9=cpld +sff_cpld_reg.frmt_51_9=bit +sff_cpld_reg.pola_51_9=negative +sff_cpld_reg.addr_51_9=0x00030061 +sff_cpld_reg.len_51_9=1 +sff_cpld_reg.bit_offset_51_9=2 + +sff_cpld_reg.mode_52_9=config +sff_cpld_reg.src_52_9=cpld +sff_cpld_reg.frmt_52_9=bit +sff_cpld_reg.pola_52_9=negative +sff_cpld_reg.addr_52_9=0x00030061 +sff_cpld_reg.len_52_9=1 +sff_cpld_reg.bit_offset_52_9=3 + +sff_cpld_reg.mode_53_9=config +sff_cpld_reg.src_53_9=cpld +sff_cpld_reg.frmt_53_9=bit +sff_cpld_reg.pola_53_9=negative +sff_cpld_reg.addr_53_9=0x00030061 +sff_cpld_reg.len_53_9=1 +sff_cpld_reg.bit_offset_53_9=4 + +sff_cpld_reg.mode_54_9=config +sff_cpld_reg.src_54_9=cpld +sff_cpld_reg.frmt_54_9=bit +sff_cpld_reg.pola_54_9=negative +sff_cpld_reg.addr_54_9=0x00030061 +sff_cpld_reg.len_54_9=1 +sff_cpld_reg.bit_offset_54_9=5 + +sff_cpld_reg.mode_55_9=config +sff_cpld_reg.src_55_9=cpld +sff_cpld_reg.frmt_55_9=bit +sff_cpld_reg.pola_55_9=negative +sff_cpld_reg.addr_55_9=0x00030061 +sff_cpld_reg.len_55_9=1 +sff_cpld_reg.bit_offset_55_9=6 + +sff_cpld_reg.mode_56_9=config +sff_cpld_reg.src_56_9=cpld +sff_cpld_reg.frmt_56_9=bit +sff_cpld_reg.pola_56_9=negative +sff_cpld_reg.addr_56_9=0x00030061 +sff_cpld_reg.len_56_9=1 +sff_cpld_reg.bit_offset_56_9=7 + +sff_cpld_reg.mode_57_9=config +sff_cpld_reg.src_57_9=cpld +sff_cpld_reg.frmt_57_9=bit +sff_cpld_reg.pola_57_9=negative +sff_cpld_reg.addr_57_9=0x00030060 +sff_cpld_reg.len_57_9=1 +sff_cpld_reg.bit_offset_57_9=0 + +sff_cpld_reg.mode_58_9=config +sff_cpld_reg.src_58_9=cpld +sff_cpld_reg.frmt_58_9=bit +sff_cpld_reg.pola_58_9=negative +sff_cpld_reg.addr_58_9=0x00030060 +sff_cpld_reg.len_58_9=1 +sff_cpld_reg.bit_offset_58_9=1 + +sff_cpld_reg.mode_59_9=config +sff_cpld_reg.src_59_9=cpld +sff_cpld_reg.frmt_59_9=bit +sff_cpld_reg.pola_59_9=negative +sff_cpld_reg.addr_59_9=0x00030060 +sff_cpld_reg.len_59_9=1 +sff_cpld_reg.bit_offset_59_9=2 + +sff_cpld_reg.mode_60_9=config +sff_cpld_reg.src_60_9=cpld +sff_cpld_reg.frmt_60_9=bit +sff_cpld_reg.pola_60_9=negative +sff_cpld_reg.addr_60_9=0x00030060 +sff_cpld_reg.len_60_9=1 +sff_cpld_reg.bit_offset_60_9=3 + +sff_cpld_reg.mode_61_9=config +sff_cpld_reg.src_61_9=cpld +sff_cpld_reg.frmt_61_9=bit +sff_cpld_reg.pola_61_9=negative +sff_cpld_reg.addr_61_9=0x00030060 +sff_cpld_reg.len_61_9=1 +sff_cpld_reg.bit_offset_61_9=4 + +sff_cpld_reg.mode_62_9=config +sff_cpld_reg.src_62_9=cpld +sff_cpld_reg.frmt_62_9=bit +sff_cpld_reg.pola_62_9=negative +sff_cpld_reg.addr_62_9=0x00030060 +sff_cpld_reg.len_62_9=1 +sff_cpld_reg.bit_offset_62_9=5 + +sff_cpld_reg.mode_63_9=config +sff_cpld_reg.src_63_9=cpld +sff_cpld_reg.frmt_63_9=bit +sff_cpld_reg.pola_63_9=negative +sff_cpld_reg.addr_63_9=0x00030060 +sff_cpld_reg.len_63_9=1 +sff_cpld_reg.bit_offset_63_9=6 + +sff_cpld_reg.mode_64_9=config +sff_cpld_reg.src_64_9=cpld +sff_cpld_reg.frmt_64_9=bit +sff_cpld_reg.pola_64_9=negative +sff_cpld_reg.addr_64_9=0x00030060 +sff_cpld_reg.len_64_9=1 +sff_cpld_reg.bit_offset_64_9=7 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg new file mode 100644 index 000000000000..e087fee62045 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg @@ -0,0 +1,20 @@ + +watchdog_dev.mode_0_4=config +watchdog_dev.src_0_4=cpld +watchdog_dev.frmt_0_4=bit +watchdog_dev.addr_0_4=0x000100b0 +watchdog_dev.len_0_4=1 +watchdog_dev.bit_offset_0_4=0 + +watchdog_dev.mode_0_3=config +watchdog_dev.src_0_3=cpld +watchdog_dev.frmt_0_3=byte +watchdog_dev.addr_0_3=0x000100b1 +watchdog_dev.len_0_3=1 + +watchdog_dev.mode_0_5=config +watchdog_dev.src_0_5=cpld +watchdog_dev.frmt_0_5=bit +watchdog_dev.addr_0_5=0x000100b0 +watchdog_dev.len_0_5=1 +watchdog_dev.bit_offset_0_5=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 new file mode 100644 index 000000000000..3944674a473a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 @@ -0,0 +1,8 @@ +CPLD +FAN +LED +PSU +SENSOR +SFF +FPGA +WATCHDOG diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py new file mode 100755 index 000000000000..6c3916921abb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +)