diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile
index 5312a779bbc3..acd7f9034862 100644
--- a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile
+++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile
@@ -1,2 +1,2 @@
-SAI_INIT_CONFIG_FILE=/etc/bcm/th-d7032q28b-32x100g.config.bcm
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-d7032q28b-32x100g.config.bcm
 SAI_NUM_ECMP_MEMBERS=32
diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm
new file mode 100644
index 000000000000..613158431634
--- /dev/null
+++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm
@@ -0,0 +1,290 @@
+# Redwood BCM Shell config / all 100G 32 ports
+
+# Define default OS / SAL
+os=unix
+
+l2_mem_entries=8192
+l3_mem_entries=8192
+l3_alpm_enable=2
+#ipv6_lpm_128b_enable=1
+l2xmsg_mode=1
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+# per Broadcom feedback, no more pbmp_oversubscribe 
+# pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe
+oversubscribe_mode=1
+pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
+
+# EagleCore ports
+portmap_66=129:10
+portmap_100=131:10
+
+# Loopback ports
+portmap_33=132:10
+portmap_67=133:10
+portmap_101=134:10
+portmap_135=135:10
+
+portmap_68=65:100
+portmap_69=69:100
+portmap_70=73:100
+portmap_71=77:100
+portmap_72=81:100
+portmap_73=85:100
+portmap_74=89:100
+portmap_75=93:100
+
+portmap_102=97:100
+portmap_103=101:100
+portmap_104=105:100
+portmap_105=109:100
+portmap_106=113:100
+portmap_107=117:100
+portmap_108=121:100
+portmap_109=125:100
+
+portmap_1=1:100
+portmap_2=5:100
+portmap_3=9:100
+portmap_4=13:100
+portmap_5=17:100
+portmap_6=21:100
+portmap_7=25:100
+portmap_8=29:100
+
+portmap_34=33:100
+portmap_35=37:100
+portmap_36=41:100
+portmap_37=45:100
+portmap_38=49:100
+portmap_39=53:100
+portmap_40=57:100
+portmap_41=61:100
+
+phy_xaui_tx_polarity_flip_ce0=0x8
+phy_xaui_tx_polarity_flip_ce1=0x6
+phy_xaui_tx_polarity_flip_ce2=0x6
+phy_xaui_tx_polarity_flip_ce3=0x6
+phy_xaui_tx_polarity_flip_ce4=0x3
+phy_xaui_tx_polarity_flip_ce5=0x4
+phy_xaui_tx_polarity_flip_ce6=0xc
+phy_xaui_tx_polarity_flip_ce7=0x6
+phy_xaui_tx_polarity_flip_ce8=0xc
+phy_xaui_tx_polarity_flip_ce9=0x3
+phy_xaui_tx_polarity_flip_ce10=0x3
+phy_xaui_tx_polarity_flip_ce11=0x3
+phy_xaui_tx_polarity_flip_ce12=0x4
+phy_xaui_tx_polarity_flip_ce13=0x1
+phy_xaui_tx_polarity_flip_ce14=0x2
+phy_xaui_tx_polarity_flip_ce15=0x3
+phy_xaui_tx_polarity_flip_ce16=0x2
+phy_xaui_tx_polarity_flip_ce17=0x3
+phy_xaui_tx_polarity_flip_ce18=0x2
+phy_xaui_tx_polarity_flip_ce19=0x8
+phy_xaui_tx_polarity_flip_ce20=0x2
+phy_xaui_tx_polarity_flip_ce21=0x9
+phy_xaui_tx_polarity_flip_ce22=0x8
+phy_xaui_tx_polarity_flip_ce23=0x9
+phy_xaui_tx_polarity_flip_ce24=0x2
+phy_xaui_tx_polarity_flip_ce25=0x4
+phy_xaui_tx_polarity_flip_ce26=0xd
+phy_xaui_tx_polarity_flip_ce27=0xc
+phy_xaui_tx_polarity_flip_ce28=0x3
+phy_xaui_tx_polarity_flip_ce29=0xc
+phy_xaui_tx_polarity_flip_ce30=0xc
+phy_xaui_tx_polarity_flip_ce31=0x2
+
+phy_xaui_rx_polarity_flip_ce0=0xb
+phy_xaui_rx_polarity_flip_ce1=0xc
+phy_xaui_rx_polarity_flip_ce2=0xc
+phy_xaui_rx_polarity_flip_ce3=0xc
+phy_xaui_rx_polarity_flip_ce4=0x1
+phy_xaui_rx_polarity_flip_ce5=0xc
+phy_xaui_rx_polarity_flip_ce6=0x4
+phy_xaui_rx_polarity_flip_ce7=0xc
+phy_xaui_rx_polarity_flip_ce8=0xb
+phy_xaui_rx_polarity_flip_ce9=0x6
+phy_xaui_rx_polarity_flip_ce10=0x1
+phy_xaui_rx_polarity_flip_ce11=0x8
+phy_xaui_rx_polarity_flip_ce12=0xc
+phy_xaui_rx_polarity_flip_ce13=0x6
+phy_xaui_rx_polarity_flip_ce14=0x4
+phy_xaui_rx_polarity_flip_ce15=0xe
+phy_xaui_rx_polarity_flip_ce16=0xe
+phy_xaui_rx_polarity_flip_ce17=0x2
+phy_xaui_rx_polarity_flip_ce18=0x4
+phy_xaui_rx_polarity_flip_ce19=0x6
+phy_xaui_rx_polarity_flip_ce20=0xe
+phy_xaui_rx_polarity_flip_ce21=0x3
+phy_xaui_rx_polarity_flip_ce22=0x3
+phy_xaui_rx_polarity_flip_ce23=0x3
+phy_xaui_rx_polarity_flip_ce24=0xb
+phy_xaui_rx_polarity_flip_ce25=0xc
+phy_xaui_rx_polarity_flip_ce26=0xe
+phy_xaui_rx_polarity_flip_ce27=0xc
+phy_xaui_rx_polarity_flip_ce28=0xb
+phy_xaui_rx_polarity_flip_ce29=0x9
+phy_xaui_rx_polarity_flip_ce30=0x6
+phy_xaui_rx_polarity_flip_ce31=0x9
+
+# EQ/iDriver
+serdes_preemphasis_1=0x323E00
+serdes_preemphasis_2=0x323E00
+serdes_preemphasis_3=0x323E00
+serdes_preemphasis_4=0x323E00
+   
+serdes_preemphasis_5=0x323E00
+serdes_preemphasis_6=0x323E00
+serdes_preemphasis_7=0x323E00
+serdes_preemphasis_8=0x323E00
+
+serdes_preemphasis_9=0x343C00
+serdes_preemphasis_10=0x343C00
+serdes_preemphasis_11=0x343C00
+serdes_preemphasis_12=0x343C00
+
+serdes_preemphasis_13=0x343C00
+serdes_preemphasis_14=0x343C00
+serdes_preemphasis_15=0x343C00
+serdes_preemphasis_16=0x343C00
+
+serdes_preemphasis_17=0x323E00
+serdes_preemphasis_18=0x323E00
+serdes_preemphasis_19=0x323E00
+serdes_preemphasis_20=0x323E00
+
+serdes_preemphasis_21=0x323E00
+serdes_preemphasis_22=0x323E00
+serdes_preemphasis_23=0x323E00
+serdes_preemphasis_24=0x323E00
+
+serdes_preemphasis_25=0x304000
+serdes_preemphasis_26=0x304000
+serdes_preemphasis_27=0x304000
+serdes_preemphasis_28=0x304000
+
+serdes_preemphasis_29=0x304000
+serdes_preemphasis_30=0x304000
+serdes_preemphasis_31=0x304000
+serdes_preemphasis_32=0x304000
+
+serdes_preemphasis_34=0x2D4300
+serdes_preemphasis_35=0x2D4300
+serdes_preemphasis_36=0x2D4300
+serdes_preemphasis_37=0x2D4300
+
+serdes_preemphasis_38=0x2D4300
+serdes_preemphasis_39=0x2D4300
+serdes_preemphasis_40=0x2D4300
+serdes_preemphasis_41=0x2D4300
+
+serdes_preemphasis_42=0x2B4500
+serdes_preemphasis_43=0x2B4500
+serdes_preemphasis_44=0x2B4500
+serdes_preemphasis_45=0x2B4500
+
+serdes_preemphasis_46=0x2B4500
+serdes_preemphasis_47=0x2B4500
+serdes_preemphasis_48=0x2B4500
+serdes_preemphasis_49=0x2B4500
+
+serdes_preemphasis_50=0x2B4500
+serdes_preemphasis_51=0x2B4500
+serdes_preemphasis_52=0x2B4500
+serdes_preemphasis_53=0x2B4500
+
+serdes_preemphasis_54=0x284800
+serdes_preemphasis_55=0x284800
+serdes_preemphasis_56=0x284800
+serdes_preemphasis_57=0x284800
+
+serdes_preemphasis_58=0x2B4500
+serdes_preemphasis_59=0x2B4500
+serdes_preemphasis_60=0x2B4500
+serdes_preemphasis_61=0x2B4500
+
+serdes_preemphasis_62=0x2B4500
+serdes_preemphasis_63=0x2B4500
+serdes_preemphasis_64=0x2B4500
+serdes_preemphasis_65=0x2B4500
+
+serdes_preemphasis_68=0x284800
+serdes_preemphasis_69=0x284800
+serdes_preemphasis_70=0x284800
+serdes_preemphasis_71=0x284800
+
+serdes_preemphasis_72=0x284800
+serdes_preemphasis_73=0x284800
+serdes_preemphasis_74=0x284800
+serdes_preemphasis_75=0x284800
+
+serdes_preemphasis_76=0x284800
+serdes_preemphasis_77=0x284800
+serdes_preemphasis_78=0x284800
+serdes_preemphasis_79=0x284800
+
+serdes_preemphasis_80=0x2A4600
+serdes_preemphasis_81=0x2A4600
+serdes_preemphasis_82=0x2A4600
+serdes_preemphasis_83=0x2A4600
+
+serdes_preemphasis_84=0x2B4500
+serdes_preemphasis_85=0x2B4500
+serdes_preemphasis_86=0x2B4500
+serdes_preemphasis_87=0x2B4500
+
+serdes_preemphasis_88=0x2A4600
+serdes_preemphasis_89=0x2A4600
+serdes_preemphasis_90=0x2A4600
+serdes_preemphasis_91=0x2A4600
+
+serdes_preemphasis_92=0x2B4500
+serdes_preemphasis_93=0x2B4500
+serdes_preemphasis_94=0x2B4500
+serdes_preemphasis_95=0x2B4500
+
+serdes_preemphasis_96=0x2B4500
+serdes_preemphasis_97=0x2B4500
+serdes_preemphasis_98=0x2B4500
+serdes_preemphasis_99=0x2B4500
+
+serdes_preemphasis_102=0x2B4500
+serdes_preemphasis_103=0x2B4500
+serdes_preemphasis_104=0x2B4500
+serdes_preemphasis_105=0x2B4500
+
+serdes_preemphasis_106=0x2B4500
+serdes_preemphasis_107=0x2B4500
+serdes_preemphasis_108=0x2B4500
+serdes_preemphasis_109=0x2B4500
+
+serdes_preemphasis_110=0x2D4300
+serdes_preemphasis_111=0x2D4300
+serdes_preemphasis_112=0x2D4300
+serdes_preemphasis_113=0x2D4300
+
+serdes_preemphasis_114=0x304000
+serdes_preemphasis_115=0x304000
+serdes_preemphasis_116=0x304000
+serdes_preemphasis_117=0x304000
+
+serdes_preemphasis_118=0x304000
+serdes_preemphasis_119=0x304000
+serdes_preemphasis_120=0x304000
+serdes_preemphasis_121=0x304000
+
+serdes_preemphasis_122=0x304000
+serdes_preemphasis_123=0x304000
+serdes_preemphasis_124=0x304000
+serdes_preemphasis_125=0x304000
+
+serdes_preemphasis_126=0x343C00
+serdes_preemphasis_127=0x343C00
+serdes_preemphasis_128=0x343C00
+serdes_preemphasis_129=0x343C00
+
+serdes_preemphasis_130=0x343C00
+serdes_preemphasis_131=0x343C00
+serdes_preemphasis_132=0x343C00
+serdes_preemphasis_133=0x343C00
diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm
new file mode 100644
index 000000000000..03d0bb06cb06
--- /dev/null
+++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm
@@ -0,0 +1,427 @@
+# Redwood BCM Shell config / all 100G 32 ports
+
+# Define default OS / SAL
+os=unix
+
+l2_mem_entries=8192
+l3_mem_entries=8192
+l3_alpm_enable=2
+#ipv6_lpm_128b_enable=1
+l2xmsg_mode=1
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+# per Broadcom feedback, no more pbmp_oversubscribe 
+# pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe
+oversubscribe_mode=1
+pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
+
+# EagleCore ports
+portmap_66=129:10
+portmap_100=131:10
+
+# Loopback ports
+portmap_33=132:10
+portmap_67=133:10
+portmap_101=134:10
+portmap_135=135:10
+
+portmap_68=65:40
+portmap_69=69:40
+portmap_70=73:40
+portmap_71=77:40
+portmap_72=81:40
+portmap_73=85:40
+portmap_74=89:40
+portmap_75=93:40
+
+portmap_102=97:40
+portmap_103=101:40
+portmap_104=105:40
+portmap_105=109:40
+portmap_106=113:40
+portmap_107=117:40
+portmap_108=121:40
+portmap_109=125:40
+
+portmap_1=1:40
+portmap_2=5:40
+portmap_3=9:40
+portmap_4=13:40
+portmap_5=17:40
+portmap_6=21:40
+portmap_7=25:40
+portmap_8=29:40
+
+portmap_34=33:40
+portmap_35=37:40
+portmap_36=41:40
+portmap_37=45:40
+portmap_38=49:40
+portmap_39=53:40
+portmap_40=57:40
+portmap_41=61:40
+
+phy_xaui_tx_polarity_flip_xe0=0x8
+phy_xaui_tx_polarity_flip_xe1=0x6
+phy_xaui_tx_polarity_flip_xe2=0x6
+phy_xaui_tx_polarity_flip_xe3=0x6
+phy_xaui_tx_polarity_flip_xe4=0x3
+phy_xaui_tx_polarity_flip_xe5=0x4
+phy_xaui_tx_polarity_flip_xe6=0xc
+phy_xaui_tx_polarity_flip_xe7=0x6
+phy_xaui_tx_polarity_flip_xe8=0xc
+phy_xaui_tx_polarity_flip_xe9=0x3
+phy_xaui_tx_polarity_flip_xe10=0x3
+phy_xaui_tx_polarity_flip_xe11=0x3
+phy_xaui_tx_polarity_flip_xe12=0x4
+phy_xaui_tx_polarity_flip_xe13=0x1
+phy_xaui_tx_polarity_flip_xe14=0x2
+phy_xaui_tx_polarity_flip_xe15=0x3
+phy_xaui_tx_polarity_flip_xe16=0x2
+phy_xaui_tx_polarity_flip_xe17=0x3
+phy_xaui_tx_polarity_flip_xe18=0x2
+phy_xaui_tx_polarity_flip_xe19=0x8
+phy_xaui_tx_polarity_flip_xe20=0x2
+phy_xaui_tx_polarity_flip_xe21=0x9
+phy_xaui_tx_polarity_flip_xe22=0x8
+phy_xaui_tx_polarity_flip_xe23=0x9
+phy_xaui_tx_polarity_flip_xe24=0x2
+phy_xaui_tx_polarity_flip_xe25=0x4
+phy_xaui_tx_polarity_flip_xe26=0xd
+phy_xaui_tx_polarity_flip_xe27=0xc
+phy_xaui_tx_polarity_flip_xe28=0x3
+phy_xaui_tx_polarity_flip_xe29=0xc
+phy_xaui_tx_polarity_flip_xe30=0xc
+phy_xaui_tx_polarity_flip_xe31=0x2
+
+phy_xaui_rx_polarity_flip_xe0=0xb
+phy_xaui_rx_polarity_flip_xe1=0xc
+phy_xaui_rx_polarity_flip_xe2=0xc
+phy_xaui_rx_polarity_flip_xe3=0xc
+phy_xaui_rx_polarity_flip_xe4=0x1
+phy_xaui_rx_polarity_flip_xe5=0xc
+phy_xaui_rx_polarity_flip_xe6=0x4
+phy_xaui_rx_polarity_flip_xe7=0xc
+phy_xaui_rx_polarity_flip_xe8=0xb
+phy_xaui_rx_polarity_flip_xe9=0x6
+phy_xaui_rx_polarity_flip_xe10=0x1
+phy_xaui_rx_polarity_flip_xe11=0x8
+phy_xaui_rx_polarity_flip_xe12=0xc
+phy_xaui_rx_polarity_flip_xe13=0x6
+phy_xaui_rx_polarity_flip_xe14=0x4
+phy_xaui_rx_polarity_flip_xe15=0xe
+phy_xaui_rx_polarity_flip_xe16=0xe
+phy_xaui_rx_polarity_flip_xe17=0x2
+phy_xaui_rx_polarity_flip_xe18=0x4
+phy_xaui_rx_polarity_flip_xe19=0x6
+phy_xaui_rx_polarity_flip_xe20=0xe
+phy_xaui_rx_polarity_flip_xe21=0x3
+phy_xaui_rx_polarity_flip_xe22=0x3
+phy_xaui_rx_polarity_flip_xe23=0x3
+phy_xaui_rx_polarity_flip_xe24=0xb
+phy_xaui_rx_polarity_flip_xe25=0xc
+phy_xaui_rx_polarity_flip_xe26=0xe
+phy_xaui_rx_polarity_flip_xe27=0xc
+phy_xaui_rx_polarity_flip_xe28=0xb
+phy_xaui_rx_polarity_flip_xe29=0x9
+phy_xaui_rx_polarity_flip_xe30=0x6
+phy_xaui_rx_polarity_flip_xe31=0x9
+
+# EQ/iDriver
+# 0 ~ 5
+serdes_preemphasis_1=0x1E5200
+serdes_preemphasis_2=0x1E5200
+serdes_preemphasis_3=0x1E5200
+serdes_preemphasis_4=0x1E5200
+serdes_driver_current_1=0x000001
+serdes_driver_current_2=0x000001
+serdes_driver_current_3=0x000001
+serdes_driver_current_4=0x000001
+
+serdes_preemphasis_5=0x1E5200
+serdes_preemphasis_6=0x1E5200
+serdes_preemphasis_7=0x1E5200
+serdes_preemphasis_8=0x1E5200
+serdes_driver_current_5=0x000001
+serdes_driver_current_6=0x000001
+serdes_driver_current_7=0x000001
+serdes_driver_current_8=0x000001
+
+serdes_preemphasis_9=0x1E5200
+serdes_preemphasis_10=0x1E5200
+serdes_preemphasis_11=0x1E5200
+serdes_preemphasis_12=0x1E5200
+serdes_driver_current_9=0x000001
+serdes_driver_current_10=0x000001
+serdes_driver_current_11=0x000001
+serdes_driver_current_12=0x000001
+
+serdes_preemphasis_13=0x1E5200
+serdes_preemphasis_14=0x1E5200
+serdes_preemphasis_15=0x1E5200
+serdes_preemphasis_16=0x1E5200
+serdes_driver_current_13=0x000001
+serdes_driver_current_14=0x000001
+serdes_driver_current_15=0x000001
+serdes_driver_current_16=0x000001
+
+serdes_preemphasis_17=0x1E5200
+serdes_preemphasis_18=0x1E5200
+serdes_preemphasis_19=0x1E5200
+serdes_preemphasis_20=0x1E5200
+serdes_driver_current_17=0x000001
+serdes_driver_current_18=0x000001
+serdes_driver_current_19=0x000001
+serdes_driver_current_20=0x000001
+
+serdes_preemphasis_21=0x1E5200
+serdes_preemphasis_22=0x1E5200
+serdes_preemphasis_23=0x1E5200
+serdes_preemphasis_24=0x1E5200
+serdes_driver_current_21=0x000001
+serdes_driver_current_22=0x000001
+serdes_driver_current_23=0x000001
+serdes_driver_current_24=0x000001
+
+# 6 ~ 11
+serdes_preemphasis_25=0x1A5600
+serdes_preemphasis_26=0x1A5600
+serdes_preemphasis_27=0x1A5600
+serdes_preemphasis_28=0x1A5600
+serdes_driver_current_25=0x000001
+serdes_driver_current_26=0x000001
+serdes_driver_current_27=0x000001
+serdes_driver_current_28=0x000001
+
+serdes_preemphasis_29=0x1A5600
+serdes_preemphasis_30=0x1A5600
+serdes_preemphasis_31=0x1A5600
+serdes_preemphasis_32=0x1A5600
+serdes_driver_current_29=0x000001
+serdes_driver_current_30=0x000001
+serdes_driver_current_31=0x000001
+serdes_driver_current_32=0x000001
+
+serdes_preemphasis_34=0x1A5600
+serdes_preemphasis_35=0x1A5600
+serdes_preemphasis_36=0x1A5600
+serdes_preemphasis_37=0x1A5600
+serdes_driver_current_34=0x000001
+serdes_driver_current_35=0x000001
+serdes_driver_current_36=0x000001
+serdes_driver_current_37=0x000001
+
+serdes_preemphasis_38=0x1A5600
+serdes_preemphasis_39=0x1A5600
+serdes_preemphasis_40=0x1A5600
+serdes_preemphasis_41=0x1A5600
+serdes_driver_current_38=0x000001
+serdes_driver_current_39=0x000001
+serdes_driver_current_40=0x000001
+serdes_driver_current_41=0x000001
+
+serdes_preemphasis_42=0x1A5600
+serdes_preemphasis_43=0x1A5600
+serdes_preemphasis_44=0x1A5600
+serdes_preemphasis_45=0x1A5600
+serdes_driver_current_42=0x000001
+serdes_driver_current_43=0x000001
+serdes_driver_current_44=0x000001
+serdes_driver_current_45=0x000001
+
+serdes_preemphasis_46=0x1A5600
+serdes_preemphasis_47=0x1A5600
+serdes_preemphasis_48=0x1A5600
+serdes_preemphasis_49=0x1A5600
+serdes_driver_current_46=0x000001
+serdes_driver_current_47=0x000001
+serdes_driver_current_48=0x000001
+serdes_driver_current_49=0x000001
+
+# 12 ~ 13
+serdes_preemphasis_50=0x165A00
+serdes_preemphasis_51=0x165A00
+serdes_preemphasis_52=0x165A00
+serdes_preemphasis_53=0x165A00
+serdes_driver_current_50=0x000000
+serdes_driver_current_51=0x000000
+serdes_driver_current_52=0x000000
+serdes_driver_current_53=0x000000
+
+serdes_preemphasis_54=0x165A00
+serdes_preemphasis_55=0x165A00
+serdes_preemphasis_56=0x165A00
+serdes_preemphasis_57=0x165A00
+serdes_driver_current_54=0x000000
+serdes_driver_current_55=0x000000
+serdes_driver_current_56=0x000000
+serdes_driver_current_57=0x000000
+
+# 14 ~ 16
+serdes_preemphasis_58=0x125E00
+serdes_preemphasis_59=0x125E00
+serdes_preemphasis_60=0x125E00
+serdes_preemphasis_61=0x125E00
+serdes_driver_current_58=0x000100
+serdes_driver_current_59=0x000100
+serdes_driver_current_60=0x000100
+serdes_driver_current_61=0x000100
+
+serdes_preemphasis_62=0x125E00
+serdes_preemphasis_63=0x125E00
+serdes_preemphasis_64=0x125E00
+serdes_preemphasis_65=0x125E00
+serdes_driver_current_62=0x000100
+serdes_driver_current_63=0x000100
+serdes_driver_current_64=0x000100
+serdes_driver_current_65=0x000100
+
+serdes_preemphasis_68=0x125E00
+serdes_preemphasis_69=0x125E00
+serdes_preemphasis_70=0x125E00
+serdes_preemphasis_71=0x125E00
+serdes_driver_current_68=0x000100
+serdes_driver_current_69=0x000100
+serdes_driver_current_70=0x000100
+serdes_driver_current_71=0x000100
+
+# 17 ~ 21
+serdes_preemphasis_72=0x106000
+serdes_preemphasis_73=0x106000
+serdes_preemphasis_74=0x106000
+serdes_preemphasis_75=0x106000
+serdes_driver_current_72=0x000100
+serdes_driver_current_73=0x000100
+serdes_driver_current_74=0x000100
+serdes_driver_current_75=0x000100
+
+serdes_preemphasis_76=0x106000
+serdes_preemphasis_77=0x106000
+serdes_preemphasis_78=0x106000
+serdes_preemphasis_79=0x106000
+serdes_driver_current_76=0x000100
+serdes_driver_current_77=0x000100
+serdes_driver_current_78=0x000100
+serdes_driver_current_79=0x000100
+
+serdes_preemphasis_80=0x106000
+serdes_preemphasis_81=0x106000
+serdes_preemphasis_82=0x106000
+serdes_preemphasis_83=0x106000
+serdes_driver_current_80=0x000100
+serdes_driver_current_81=0x000100
+serdes_driver_current_82=0x000100
+serdes_driver_current_83=0x000100
+
+serdes_preemphasis_84=0x106000
+serdes_preemphasis_85=0x106000
+serdes_preemphasis_86=0x106000
+serdes_preemphasis_87=0x106000
+serdes_driver_current_84=0x000100
+serdes_driver_current_85=0x000100
+serdes_driver_current_86=0x000100
+serdes_driver_current_87=0x000100
+
+serdes_preemphasis_88=0x106000
+serdes_preemphasis_89=0x106000
+serdes_preemphasis_90=0x106000
+serdes_preemphasis_91=0x106000
+serdes_driver_current_88=0x000100
+serdes_driver_current_89=0x000100
+serdes_driver_current_90=0x000100
+serdes_driver_current_91=0x000100
+
+# 22 ~ 23
+serdes_preemphasis_92=0x125E00
+serdes_preemphasis_93=0x125E00
+serdes_preemphasis_94=0x125E00
+serdes_preemphasis_95=0x125E00
+serdes_driver_current_92=0x000100
+serdes_driver_current_93=0x000100
+serdes_driver_current_94=0x000100
+serdes_driver_current_95=0x000100
+
+serdes_preemphasis_96=0x125E00
+serdes_preemphasis_97=0x125E00
+serdes_preemphasis_98=0x125E00
+serdes_preemphasis_99=0x125E00
+serdes_driver_current_96=0x000100
+serdes_driver_current_97=0x000100
+serdes_driver_current_98=0x000100
+serdes_driver_current_99=0x000100
+
+# 24 ~ 25
+serdes_preemphasis_102=0x165A00
+serdes_preemphasis_103=0x165A00
+serdes_preemphasis_104=0x165A00
+serdes_preemphasis_105=0x165A00
+serdes_driver_current_102=0x000000
+serdes_driver_current_103=0x000000
+serdes_driver_current_104=0x000000
+serdes_driver_current_105=0x000000
+
+serdes_preemphasis_106=0x165A00
+serdes_preemphasis_107=0x165A00
+serdes_preemphasis_108=0x165A00
+serdes_preemphasis_109=0x165A00
+serdes_driver_current_106=0x000000
+serdes_driver_current_107=0x000000
+serdes_driver_current_108=0x000000
+serdes_driver_current_109=0x000000
+
+# 26 ~ 29
+serdes_preemphasis_110=0x1A5600
+serdes_preemphasis_111=0x1A5600
+serdes_preemphasis_112=0x1A5600
+serdes_preemphasis_113=0x1A5600
+serdes_driver_current_110=0x000001
+serdes_driver_current_111=0x000001
+serdes_driver_current_112=0x000001
+serdes_driver_current_113=0x000001
+
+serdes_preemphasis_114=0x1A5600
+serdes_preemphasis_115=0x1A5600
+serdes_preemphasis_116=0x1A5600
+serdes_preemphasis_117=0x1A5600
+serdes_driver_current_114=0x000001
+serdes_driver_current_115=0x000001
+serdes_driver_current_116=0x000001
+serdes_driver_current_117=0x000001
+
+serdes_preemphasis_118=0x1A5600
+serdes_preemphasis_119=0x1A5600
+serdes_preemphasis_120=0x1A5600
+serdes_preemphasis_121=0x1A5600
+serdes_driver_current_118=0x000001
+serdes_driver_current_119=0x000001
+serdes_driver_current_120=0x000001
+serdes_driver_current_121=0x000001
+
+serdes_preemphasis_122=0x1A5600
+serdes_preemphasis_123=0x1A5600
+serdes_preemphasis_124=0x1A5600
+serdes_preemphasis_125=0x1A5600
+serdes_driver_current_122=0x000001
+serdes_driver_current_123=0x000001
+serdes_driver_current_124=0x000001
+serdes_driver_current_125=0x000001
+
+# 30 ~ 31
+serdes_preemphasis_126=0x1E5200
+serdes_preemphasis_127=0x1E5200
+serdes_preemphasis_128=0x1E5200
+serdes_preemphasis_129=0x1E5200
+serdes_driver_current_126=0x000001
+serdes_driver_current_127=0x000001
+serdes_driver_current_128=0x000001
+serdes_driver_current_129=0x000001
+
+serdes_preemphasis_130=0x1E5200
+serdes_preemphasis_131=0x1E5200
+serdes_preemphasis_132=0x1E5200
+serdes_preemphasis_133=0x1E5200
+serdes_driver_current_130=0x000001
+serdes_driver_current_131=0x000001
+serdes_driver_current_132=0x000001
+serdes_driver_current_133=0x000001
diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile
index 7e019adbbb94..73cbea239694 100644
--- a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile
+++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile
@@ -1,2 +1,2 @@
-SAI_INIT_CONFIG_FILE=/etc/bcm/th-d7054q28b-48x25g-6x100g.config.bcm
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-d7054q28b-48x25g-6x100g.config.bcm
 SAI_NUM_ECMP_MEMBERS=32
diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm
new file mode 100644
index 000000000000..b90ba92a97bc
--- /dev/null
+++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm
@@ -0,0 +1,465 @@
+# Cypress BCM Shell config / 10G * 48 ports; 100G * 6 ports
+
+# Define default OS / SAL
+os=unix
+
+l2_mem_entries=40960
+l3_mem_entries=40960
+fpem_mem_entries=32768
+l2xmsg_mode=1
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+
+## update the hex string based on case ID: 925941
+## 1. type "phy info" then get each hg ports' number
+## 2. Set these number as 1 in pbmp_xport_xe and pbmp_oversubscribe
+##    130 xe ports, 4 * 32 + 2
+##  no more pbmp_oversubscribe 
+oversubscribe_mode=1
+pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe
+
+
+# EagleCore ports: 36 & 49  
+portmap_66=129:10
+portmap_100=131:10
+
+# Loopback ports
+portmap_33=132:10
+portmap_67=133:10
+portmap_101=134:10
+portmap_135=135:10
+
+# First 12*4 48 ports config for 10G
+# Second 6 ports config for 100G
+# For Tomahawk FalconCore:
+#	Physical ports in FalconCore[0 - 7] must map to logical port[1 - 32] at any order
+#	Physical ports in FalconCore[8 - 15] must map to logical port[34 - 65] at any order
+#	Physical ports in FalconCore[16 - 23] must map to logical port[68 - 99] at any order
+#	Physical ports in FalconCore[24 - 31] must map to logical port[102 - 133] at any order
+
+## FalconCore[0,1,2,5]
+portmap_1=2:10
+portmap_2=1:10
+portmap_3=4:10
+portmap_4=3:10
+portmap_5=6:10
+portmap_6=5:10
+portmap_7=8:10
+portmap_8=7:10
+portmap_9=10:10
+portmap_10=9:10
+portmap_11=12:10
+portmap_12=11:10
+# FC-05
+portmap_13=22:10
+portmap_14=21:10
+portmap_15=24:10
+portmap_16=23:10
+
+## FalconCore[8, 9, 10, 12, 13]
+portmap_34=34:10
+portmap_35=33:10
+portmap_36=36:10
+portmap_37=35:10
+portmap_38=38:10
+portmap_39=37:10
+portmap_40=40:10
+portmap_41=39:10
+portmap_42=42:10
+portmap_43=41:10
+portmap_44=44:10
+portmap_45=43:10 
+# FC-12 & FC-13
+portmap_46=50:10
+portmap_47=49:10
+portmap_48=52:10
+portmap_49=51:10
+portmap_50=54:10
+portmap_51=53:10
+portmap_52=56:10
+portmap_53=55:10
+
+## FalconCore[16, 17, 20]
+portmap_68=66:10
+portmap_69=65:10
+portmap_70=68:10
+portmap_71=67:10
+portmap_72=70:10
+portmap_73=69:10
+portmap_74=72:10
+portmap_75=71:10
+# FC-20
+portmap_76=82:10
+portmap_77=81:10
+portmap_78=84:10
+portmap_79=83:10
+
+# FC-21 (100G)
+portmap_80=85:100
+
+## FalconCore[24, 25, 26, 27, 29] (100G)
+portmap_102=97:100
+portmap_103=105:100
+portmap_104=101:100
+portmap_105=117:100
+portmap_107=109:100
+
+
+
+# FalconCore[0,1,2,5] ports TX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[8, 9, 10, 12, 13] ports TX polarity flip for 25G
+# For Baidu xe20 & xe22; for GA xe21 & xe23
+phy_xaui_tx_polarity_flip_xe20=1
+phy_xaui_tx_polarity_flip_xe22=1
+
+# FalconCore[16, 17, 20] ports TX polarity flip for 25G
+# no polarity reversal
+
+# FC-21 for 100G
+
+# FalconCore[24, 25, 26, 27, 29] ports TX polarity flip for 100G
+phy_xaui_tx_polarity_flip_ce1=0xf
+phy_xaui_tx_polarity_flip_ce2=0xf
+
+
+# FalconCore[0,1,2,5] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[8, 9, 10, 12, 13] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[16, 17, 20] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FC-21 for 100G
+
+# FalconCore[24, 25, 26, 27, 29] ports RX polarity flip for 100G
+phy_xaui_rx_polarity_flip_ce2=0xf
+
+
+## Lane swapping 
+## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" 
+# TX - Config A. (FC 0/1/2/16) 
+# 0x3210 - port 0-11, 36-39 
+xgxs_tx_lane_map_xe0=0x3210
+xgxs_tx_lane_map_xe1=0x3210
+xgxs_tx_lane_map_xe2=0x3210
+xgxs_tx_lane_map_xe3=0x3210
+xgxs_tx_lane_map_xe4=0x3210
+xgxs_tx_lane_map_xe5=0x3210
+xgxs_tx_lane_map_xe6=0x3210
+xgxs_tx_lane_map_xe7=0x3210
+xgxs_tx_lane_map_xe8=0x3210
+xgxs_tx_lane_map_xe9=0x3210
+xgxs_tx_lane_map_xe10=0x3210
+xgxs_tx_lane_map_xe11=0x3210
+xgxs_tx_lane_map_xe37=0x3210
+xgxs_tx_lane_map_xe38=0x3210
+xgxs_tx_lane_map_xe39=0x3210
+xgxs_tx_lane_map_xe40=0x3210
+
+
+# TX - Config B. (FC 5/9/20) 
+# 0x0123 - port 12-13, 20-23, 44-47
+xgxs_tx_lane_map_xe12=0x0123
+xgxs_tx_lane_map_xe13=0x0123
+xgxs_tx_lane_map_xe14=0x0123
+xgxs_tx_lane_map_xe15=0x0123
+xgxs_tx_lane_map_xe20=0x0123
+xgxs_tx_lane_map_xe21=0x0123
+xgxs_tx_lane_map_xe22=0x0123
+xgxs_tx_lane_map_xe23=0x0123
+xgxs_tx_lane_map_xe45=0x0123
+xgxs_tx_lane_map_xe46=0x0123
+xgxs_tx_lane_map_xe47=0x0123
+xgxs_tx_lane_map_xe48=0x0123
+
+
+# TX - Config C. (FC 8/10) 
+# 0x3210 - port 16-19, 24-27
+xgxs_tx_lane_map_xe16=0x3210
+xgxs_tx_lane_map_xe17=0x3210
+xgxs_tx_lane_map_xe18=0x3210
+xgxs_tx_lane_map_xe19=0x3210
+xgxs_tx_lane_map_xe24=0x3210
+xgxs_tx_lane_map_xe25=0x3210
+xgxs_tx_lane_map_xe26=0x3210
+xgxs_tx_lane_map_xe27=0x3210
+
+
+# TX - Config D. (FC 12/13/17) 
+# 0x0123 - port 28-35, 40-43
+xgxs_tx_lane_map_xe28=0x0123
+xgxs_tx_lane_map_xe29=0x0123
+xgxs_tx_lane_map_xe30=0x0123
+xgxs_tx_lane_map_xe31=0x0123
+xgxs_tx_lane_map_xe32=0x0123
+xgxs_tx_lane_map_xe33=0x0123
+xgxs_tx_lane_map_xe34=0x0123
+xgxs_tx_lane_map_xe35=0x0123
+xgxs_tx_lane_map_xe41=0x0123
+xgxs_tx_lane_map_xe42=0x0123
+xgxs_tx_lane_map_xe43=0x0123
+xgxs_tx_lane_map_xe44=0x0123
+
+
+
+
+# RX - Config A. (FC 0/1/2/16) 
+# 0x1032 - port 0-11, 36-39 
+xgxs_rx_lane_map_xe0=0x1032
+xgxs_rx_lane_map_xe1=0x1032
+xgxs_rx_lane_map_xe2=0x1032
+xgxs_rx_lane_map_xe3=0x1032
+xgxs_rx_lane_map_xe4=0x1032
+xgxs_rx_lane_map_xe5=0x1032
+xgxs_rx_lane_map_xe6=0x1032
+xgxs_rx_lane_map_xe7=0x1032
+xgxs_rx_lane_map_xe8=0x1032
+xgxs_rx_lane_map_xe9=0x1032
+xgxs_rx_lane_map_xe10=0x1032
+xgxs_rx_lane_map_xe11=0x1032
+xgxs_rx_lane_map_xe37=0x1032
+xgxs_rx_lane_map_xe38=0x1032
+xgxs_rx_lane_map_xe39=0x1032
+xgxs_rx_lane_map_xe40=0x1032
+
+
+
+# RX - Config B. (FC 5/9/20) 
+# 0x1032 - port 12-13, 20-23, 44-47
+xgxs_rx_lane_map_xe12=0x1032
+xgxs_rx_lane_map_xe13=0x1032
+xgxs_rx_lane_map_xe14=0x1032
+xgxs_rx_lane_map_xe15=0x1032
+xgxs_rx_lane_map_xe20=0x1032
+xgxs_rx_lane_map_xe21=0x1032
+xgxs_rx_lane_map_xe22=0x1032
+xgxs_rx_lane_map_xe23=0x1032
+xgxs_rx_lane_map_xe45=0x1032
+xgxs_rx_lane_map_xe46=0x1032
+xgxs_rx_lane_map_xe47=0x1032
+xgxs_rx_lane_map_xe48=0x1032
+
+
+# RX - Config C. (FC 8/10) 
+# 0x3210 - port 16-19, 24-27
+xgxs_rx_lane_map_xe16=0x3210
+xgxs_rx_lane_map_xe17=0x3210
+xgxs_rx_lane_map_xe18=0x3210
+xgxs_rx_lane_map_xe19=0x3210
+xgxs_rx_lane_map_xe24=0x3210
+xgxs_rx_lane_map_xe25=0x3210
+xgxs_rx_lane_map_xe26=0x3210
+xgxs_rx_lane_map_xe27=0x3210
+
+
+# RX - Config D. (FC 12/13/17) 
+# 0x3210 - port 28-35, 40-43
+xgxs_rx_lane_map_xe28=0x3210
+xgxs_rx_lane_map_xe29=0x3210
+xgxs_rx_lane_map_xe30=0x3210
+xgxs_rx_lane_map_xe31=0x3210
+xgxs_rx_lane_map_xe32=0x3210
+xgxs_rx_lane_map_xe33=0x3210
+xgxs_rx_lane_map_xe34=0x3210
+xgxs_rx_lane_map_xe35=0x3210
+xgxs_rx_lane_map_xe41=0x3210
+xgxs_rx_lane_map_xe42=0x3210
+xgxs_rx_lane_map_xe43=0x3210
+xgxs_rx_lane_map_xe44=0x3210
+
+
+## Lane swapping for QSFP28 (100G)                                                                    
+## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" 
+# TX - Config A. (FC 21/25)
+# 0x3210 - port ce0, ce3
+xgxs_tx_lane_map_ce0=0x3210
+xgxs_tx_lane_map_ce3=0x3210
+                            
+                            
+# TX - Config B. (FC 24)    
+# 0x3210 - port ce1       
+xgxs_tx_lane_map_ce1=0x3210
+                            
+                            
+# TX - Config C. (FC 26)    
+# 0x3210 - port ce2
+xgxs_tx_lane_map_ce2=0x3210
+                            
+                            
+# TX - Config D. (FC 27)    
+# 0x3210 - ce5
+xgxs_tx_lane_map_ce5=0x3210
+                            
+                            
+# TX - Config E. (FC 29)    
+# 0x3210 - ce4
+xgxs_tx_lane_map_ce4=0x3210
+                            
+                            
+# RX - Config A. (FC 21/25)
+# 0x1032 - port ce0, ce3
+xgxs_rx_lane_map_ce0=0x1032
+xgxs_rx_lane_map_ce3=0x1032
+                            
+                            
+# RX - Config B. (FC 24)    
+# 0x1032 - port ce1       
+xgxs_rx_lane_map_ce1=0x1032
+                            
+                            
+# RX - Config C. (FC 26)    
+# 0x2301 - port ce2
+xgxs_rx_lane_map_ce2=0x2301
+                            
+                            
+# RX - Config D. (FC 27)    
+# 0x2301 - ce5
+xgxs_rx_lane_map_ce5=0x2301
+                            
+                            
+# TX - Config E. (FC 29)    
+# 0x3210 - ce4
+xgxs_rx_lane_map_ce4=0x3210
+
+# EQ/iDriver
+
+# The 1st 16 ports, xe0-xe15
+serdes_preemphasis_1=0x1A5600
+serdes_preemphasis_2=0x1A5600
+serdes_preemphasis_3=0x1A5600
+serdes_preemphasis_4=0x1A5600
+serdes_preemphasis_5=0x1A5600
+serdes_preemphasis_6=0x1A5600
+serdes_preemphasis_7=0x185800
+serdes_preemphasis_8=0x1A5600
+serdes_preemphasis_9=0x185800
+serdes_preemphasis_10=0x185800
+serdes_preemphasis_11=0x165A00
+serdes_preemphasis_12=0x185800
+serdes_preemphasis_13=0x105F01
+serdes_preemphasis_14=0x165A00
+serdes_preemphasis_15=0x105F01
+serdes_preemphasis_16=0x105F01
+
+serdes_driver_current_1=0x000001
+serdes_driver_current_2=0x000001
+serdes_driver_current_3=0x000001
+serdes_driver_current_4=0x000001
+serdes_driver_current_5=0x000001
+serdes_driver_current_6=0x000001
+serdes_driver_current_7=0x000001
+serdes_driver_current_8=0x000001
+serdes_driver_current_9=0x000000
+serdes_driver_current_10=0x000001
+serdes_driver_current_11=0x000000
+serdes_driver_current_12=0x000000
+serdes_driver_current_13=0x000000
+serdes_driver_current_14=0x000000
+serdes_driver_current_15=0x000000
+serdes_driver_current_16=0x000000
+
+# The 2nd 20 ports, xe16-xe35
+serdes_preemphasis_34=0x105F01
+serdes_preemphasis_35=0x105F01
+serdes_preemphasis_36=0x0E6002
+serdes_preemphasis_37=0x0E6002
+serdes_preemphasis_38=0x0E6002
+serdes_preemphasis_39=0x0E6002
+serdes_preemphasis_40=0x125B03
+serdes_preemphasis_41=0x0E6002
+serdes_preemphasis_42=0x125B03
+serdes_preemphasis_43=0x125B03
+serdes_preemphasis_44=0x125B03
+serdes_preemphasis_45=0x125B03
+serdes_preemphasis_46=0x125B03
+serdes_preemphasis_47=0x125B03
+serdes_preemphasis_48=0x125B03
+serdes_preemphasis_49=0x125B03
+serdes_preemphasis_50=0x125B03
+serdes_preemphasis_51=0x125B03
+serdes_preemphasis_52=0x125B03
+serdes_preemphasis_53=0x125B03
+
+serdes_driver_current_34=0x000000
+serdes_driver_current_35=0x000000
+serdes_driver_current_36=0x000000
+serdes_driver_current_37=0x000000
+serdes_driver_current_38=0x000000
+serdes_driver_current_39=0x000000
+serdes_driver_current_40=0x000000
+serdes_driver_current_41=0x000000
+serdes_driver_current_42=0x000000
+serdes_driver_current_43=0x000000
+serdes_driver_current_44=0x000000
+serdes_driver_current_45=0x000000
+serdes_driver_current_46=0x000000
+serdes_driver_current_47=0x000000
+serdes_driver_current_48=0x000000
+serdes_driver_current_49=0x000000
+serdes_driver_current_50=0x000000
+serdes_driver_current_51=0x000000
+serdes_driver_current_52=0x000000
+serdes_driver_current_53=0x000000
+
+# The 3rd 12 ports, xe36-xe47
+serdes_preemphasis_68=0x125B03
+serdes_preemphasis_69=0x125B03
+serdes_preemphasis_70=0x125B03
+serdes_preemphasis_71=0x125B03
+serdes_preemphasis_72=0x125B03
+serdes_preemphasis_73=0x125B03
+serdes_preemphasis_74=0x125B03
+serdes_preemphasis_75=0x125B03
+serdes_preemphasis_76=0x105F01
+serdes_preemphasis_77=0x105F01
+serdes_preemphasis_78=0x105F01
+serdes_preemphasis_79=0x105F01
+
+serdes_driver_current_68=0x000000
+serdes_driver_current_69=0x000000
+serdes_driver_current_70=0x000000
+serdes_driver_current_71=0x000000
+serdes_driver_current_72=0x000000
+serdes_driver_current_73=0x000000
+serdes_driver_current_74=0x000000
+serdes_driver_current_75=0x000000
+serdes_driver_current_76=0x000000
+serdes_driver_current_77=0x000000
+serdes_driver_current_78=0x000000
+serdes_driver_current_79=0x000000
+
+# 6 x 100G ports, expandable to 24 x 25G ports
+serdes_preemphasis_80=0x2D4300
+serdes_preemphasis_81=0x2D4300
+serdes_preemphasis_82=0x2D4300
+serdes_preemphasis_83=0x2D4300
+
+serdes_preemphasis_102=0x304000
+serdes_preemphasis_103=0x304000
+serdes_preemphasis_104=0x304000
+serdes_preemphasis_105=0x304000
+
+serdes_preemphasis_106=0x304000
+serdes_preemphasis_107=0x304000
+serdes_preemphasis_108=0x304000
+serdes_preemphasis_109=0x304000
+
+serdes_preemphasis_110=0x304000
+serdes_preemphasis_111=0x304000
+serdes_preemphasis_112=0x304000
+serdes_preemphasis_113=0x304000
+
+serdes_preemphasis_114=0x2E360C
+serdes_preemphasis_115=0x2E360C
+serdes_preemphasis_116=0x2E360C
+serdes_preemphasis_117=0x2E360C
+
+serdes_preemphasis_118=0x2E360C
+serdes_preemphasis_119=0x2E360C
+serdes_preemphasis_120=0x2E360C
+serdes_preemphasis_121=0x2E360C
diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm
new file mode 100644
index 000000000000..ff09305ccbff
--- /dev/null
+++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm
@@ -0,0 +1,414 @@
+# Cypress BCM Shell config / 25G * 48 ports; 100G * 6 ports
+
+# Define default OS / SAL
+os=unix
+
+l2_mem_entries=40960
+l3_mem_entries=40960
+fpem_mem_entries=32768
+l2xmsg_mode=1
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+
+## update the hex string based on case ID: 925941
+## 1. type "phy info" then get each hg ports' number
+## 2. Set these number as 1 in pbmp_xport_xe and pbmp_oversubscribe
+##    130 xe ports, 4 * 32 + 2
+##  no more pbmp_oversubscribe 
+oversubscribe_mode=1
+pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe
+
+
+# EagleCore ports: 36 & 49  
+portmap_66=129:10
+portmap_100=131:10
+
+# Loopback ports
+portmap_33=132:10
+portmap_67=133:10
+portmap_101=134:10
+portmap_135=135:10
+
+# First 12*4 48 ports config for 25G
+# Second 6 ports config for 100G
+# For Tomahawk FalconCore:
+#	Physical ports in FalconCore[0 - 7] must map to logical port[1 - 32] at any order
+#	Physical ports in FalconCore[8 - 15] must map to logical port[34 - 65] at any order
+#	Physical ports in FalconCore[16 - 23] must map to logical port[68 - 99] at any order
+#	Physical ports in FalconCore[24 - 31] must map to logical port[102 - 133] at any order
+
+## FalconCore[0,1,2,5]
+portmap_1=2:25
+portmap_2=1:25
+portmap_3=4:25
+portmap_4=3:25
+portmap_5=6:25
+portmap_6=5:25
+portmap_7=8:25
+portmap_8=7:25
+portmap_9=10:25
+portmap_10=9:25
+portmap_11=12:25
+portmap_12=11:25
+# FC-05
+portmap_13=22:25
+portmap_14=21:25
+portmap_15=24:25
+portmap_16=23:25
+
+## FalconCore[8, 9, 10, 12, 13]
+portmap_34=34:25
+portmap_35=33:25
+portmap_36=36:25
+portmap_37=35:25
+portmap_38=38:25
+portmap_39=37:25
+portmap_40=40:25
+portmap_41=39:25
+portmap_42=42:25
+portmap_43=41:25
+portmap_44=44:25
+portmap_45=43:25 
+# FC-12 & FC-13
+portmap_46=50:25
+portmap_47=49:25
+portmap_48=52:25
+portmap_49=51:25
+portmap_50=54:25
+portmap_51=53:25
+portmap_52=56:25
+portmap_53=55:25
+
+## FalconCore[16, 17, 20]
+portmap_68=66:25
+portmap_69=65:25
+portmap_70=68:25
+portmap_71=67:25
+portmap_72=70:25
+portmap_73=69:25
+portmap_74=72:25
+portmap_75=71:25
+# FC-20
+portmap_76=82:25
+portmap_77=81:25
+portmap_78=84:25
+portmap_79=83:25
+
+# FC-21 (100G)
+portmap_80=85:100
+
+## FalconCore[24, 25, 26, 27, 29] (100G)
+portmap_102=97:100
+portmap_103=105:100
+portmap_104=101:100
+portmap_105=117:100
+portmap_107=109:100
+
+
+
+# FalconCore[0,1,2,5] ports TX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[8, 9, 10, 12, 13] ports TX polarity flip for 25G
+# For Baidu xe20 & xe22; for GA xe21 & xe23
+phy_xaui_tx_polarity_flip_xe20=1
+phy_xaui_tx_polarity_flip_xe22=1
+
+# FalconCore[16, 17, 20] ports TX polarity flip for 25G
+# no polarity reversal
+
+# FC-21 for 100G
+
+# FalconCore[24, 25, 26, 27, 29] ports TX polarity flip for 100G
+phy_xaui_tx_polarity_flip_ce1=0xf
+phy_xaui_tx_polarity_flip_ce2=0xf
+
+
+# FalconCore[0,1,2,5] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[8, 9, 10, 12, 13] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FalconCore[16, 17, 20] ports RX polarity flip for 25G
+# no polarity reversal
+
+# FC-21 for 100G
+
+# FalconCore[24, 25, 26, 27, 29] ports RX polarity flip for 100G
+phy_xaui_rx_polarity_flip_ce2=0xf
+
+
+## Lane swapping 
+## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" 
+# TX - Config A. (FC 0/1/2/16) 
+# 0x3210 - port 0-11, 36-39 
+xgxs_tx_lane_map_xe0=0x3210
+xgxs_tx_lane_map_xe1=0x3210
+xgxs_tx_lane_map_xe2=0x3210
+xgxs_tx_lane_map_xe3=0x3210
+xgxs_tx_lane_map_xe4=0x3210
+xgxs_tx_lane_map_xe5=0x3210
+xgxs_tx_lane_map_xe6=0x3210
+xgxs_tx_lane_map_xe7=0x3210
+xgxs_tx_lane_map_xe8=0x3210
+xgxs_tx_lane_map_xe9=0x3210
+xgxs_tx_lane_map_xe10=0x3210
+xgxs_tx_lane_map_xe11=0x3210
+xgxs_tx_lane_map_xe37=0x3210
+xgxs_tx_lane_map_xe38=0x3210
+xgxs_tx_lane_map_xe39=0x3210
+xgxs_tx_lane_map_xe40=0x3210
+
+
+# TX - Config B. (FC 5/9/20) 
+# 0x0123 - port 12-13, 20-23, 44-47
+xgxs_tx_lane_map_xe12=0x0123
+xgxs_tx_lane_map_xe13=0x0123
+xgxs_tx_lane_map_xe14=0x0123
+xgxs_tx_lane_map_xe15=0x0123
+xgxs_tx_lane_map_xe20=0x0123
+xgxs_tx_lane_map_xe21=0x0123
+xgxs_tx_lane_map_xe22=0x0123
+xgxs_tx_lane_map_xe23=0x0123
+xgxs_tx_lane_map_xe45=0x0123
+xgxs_tx_lane_map_xe46=0x0123
+xgxs_tx_lane_map_xe47=0x0123
+xgxs_tx_lane_map_xe48=0x0123
+
+
+# TX - Config C. (FC 8/10) 
+# 0x3210 - port 16-19, 24-27
+xgxs_tx_lane_map_xe16=0x3210
+xgxs_tx_lane_map_xe17=0x3210
+xgxs_tx_lane_map_xe18=0x3210
+xgxs_tx_lane_map_xe19=0x3210
+xgxs_tx_lane_map_xe24=0x3210
+xgxs_tx_lane_map_xe25=0x3210
+xgxs_tx_lane_map_xe26=0x3210
+xgxs_tx_lane_map_xe27=0x3210
+
+
+# TX - Config D. (FC 12/13/17) 
+# 0x0123 - port 28-35, 40-43
+xgxs_tx_lane_map_xe28=0x0123
+xgxs_tx_lane_map_xe29=0x0123
+xgxs_tx_lane_map_xe30=0x0123
+xgxs_tx_lane_map_xe31=0x0123
+xgxs_tx_lane_map_xe32=0x0123
+xgxs_tx_lane_map_xe33=0x0123
+xgxs_tx_lane_map_xe34=0x0123
+xgxs_tx_lane_map_xe35=0x0123
+xgxs_tx_lane_map_xe41=0x0123
+xgxs_tx_lane_map_xe42=0x0123
+xgxs_tx_lane_map_xe43=0x0123
+xgxs_tx_lane_map_xe44=0x0123
+
+
+
+
+# RX - Config A. (FC 0/1/2/16) 
+# 0x1032 - port 0-11, 36-39 
+xgxs_rx_lane_map_xe0=0x1032
+xgxs_rx_lane_map_xe1=0x1032
+xgxs_rx_lane_map_xe2=0x1032
+xgxs_rx_lane_map_xe3=0x1032
+xgxs_rx_lane_map_xe4=0x1032
+xgxs_rx_lane_map_xe5=0x1032
+xgxs_rx_lane_map_xe6=0x1032
+xgxs_rx_lane_map_xe7=0x1032
+xgxs_rx_lane_map_xe8=0x1032
+xgxs_rx_lane_map_xe9=0x1032
+xgxs_rx_lane_map_xe10=0x1032
+xgxs_rx_lane_map_xe11=0x1032
+xgxs_rx_lane_map_xe37=0x1032
+xgxs_rx_lane_map_xe38=0x1032
+xgxs_rx_lane_map_xe39=0x1032
+xgxs_rx_lane_map_xe40=0x1032
+
+
+
+# RX - Config B. (FC 5/9/20) 
+# 0x1032 - port 12-13, 20-23, 44-47
+xgxs_rx_lane_map_xe12=0x1032
+xgxs_rx_lane_map_xe13=0x1032
+xgxs_rx_lane_map_xe14=0x1032
+xgxs_rx_lane_map_xe15=0x1032
+xgxs_rx_lane_map_xe20=0x1032
+xgxs_rx_lane_map_xe21=0x1032
+xgxs_rx_lane_map_xe22=0x1032
+xgxs_rx_lane_map_xe23=0x1032
+xgxs_rx_lane_map_xe45=0x1032
+xgxs_rx_lane_map_xe46=0x1032
+xgxs_rx_lane_map_xe47=0x1032
+xgxs_rx_lane_map_xe48=0x1032
+
+
+# RX - Config C. (FC 8/10) 
+# 0x3210 - port 16-19, 24-27
+xgxs_rx_lane_map_xe16=0x3210
+xgxs_rx_lane_map_xe17=0x3210
+xgxs_rx_lane_map_xe18=0x3210
+xgxs_rx_lane_map_xe19=0x3210
+xgxs_rx_lane_map_xe24=0x3210
+xgxs_rx_lane_map_xe25=0x3210
+xgxs_rx_lane_map_xe26=0x3210
+xgxs_rx_lane_map_xe27=0x3210
+
+
+# RX - Config D. (FC 12/13/17) 
+# 0x3210 - port 28-35, 40-43
+xgxs_rx_lane_map_xe28=0x3210
+xgxs_rx_lane_map_xe29=0x3210
+xgxs_rx_lane_map_xe30=0x3210
+xgxs_rx_lane_map_xe31=0x3210
+xgxs_rx_lane_map_xe32=0x3210
+xgxs_rx_lane_map_xe33=0x3210
+xgxs_rx_lane_map_xe34=0x3210
+xgxs_rx_lane_map_xe35=0x3210
+xgxs_rx_lane_map_xe41=0x3210
+xgxs_rx_lane_map_xe42=0x3210
+xgxs_rx_lane_map_xe43=0x3210
+xgxs_rx_lane_map_xe44=0x3210
+
+
+## Lane swapping for QSFP28 (100G)                                                                    
+## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" 
+# TX - Config A. (FC 21/25)
+# 0x3210 - port ce0, ce3
+xgxs_tx_lane_map_ce0=0x3210
+xgxs_tx_lane_map_ce3=0x3210
+                            
+                            
+# TX - Config B. (FC 24)    
+# 0x3210 - port ce1       
+xgxs_tx_lane_map_ce1=0x3210
+                            
+                            
+# TX - Config C. (FC 26)    
+# 0x3210 - port ce2
+xgxs_tx_lane_map_ce2=0x3210
+                            
+                            
+# TX - Config D. (FC 27)    
+# 0x3210 - ce5
+xgxs_tx_lane_map_ce5=0x3210
+                            
+                            
+# TX - Config E. (FC 29)    
+# 0x3210 - ce4
+xgxs_tx_lane_map_ce4=0x3210
+                            
+                            
+# RX - Config A. (FC 21/25)
+# 0x1032 - port ce0, ce3
+xgxs_rx_lane_map_ce0=0x1032
+xgxs_rx_lane_map_ce3=0x1032
+                            
+                            
+# RX - Config B. (FC 24)    
+# 0x1032 - port ce1       
+xgxs_rx_lane_map_ce1=0x1032
+                            
+                            
+# RX - Config C. (FC 26)    
+# 0x2301 - port ce2
+xgxs_rx_lane_map_ce2=0x2301
+                            
+                            
+# RX - Config D. (FC 27)    
+# 0x2301 - ce5
+xgxs_rx_lane_map_ce5=0x2301
+                            
+                            
+# TX - Config E. (FC 29)    
+# 0x3210 - ce4
+xgxs_rx_lane_map_ce4=0x3210
+
+# EQ/iDriver
+
+# The first 16 ports, xe0-xe15
+serdes_preemphasis_1=0x2E380A
+serdes_preemphasis_2=0x2E380A
+serdes_preemphasis_3=0x2E380A
+serdes_preemphasis_4=0x2E380A
+serdes_preemphasis_5=0x2C3A0A
+serdes_preemphasis_6=0x2C3A0A
+serdes_preemphasis_7=0x2C3A0A
+serdes_preemphasis_8=0x2C3A0A
+serdes_preemphasis_9=0x323E00
+serdes_preemphasis_10=0x323E00
+serdes_preemphasis_11=0x304000
+serdes_preemphasis_12=0x304000
+serdes_preemphasis_13=0x2D4300
+serdes_preemphasis_14=0x304000
+serdes_preemphasis_15=0x2D4300
+serdes_preemphasis_16=0x2D4300
+
+# The 2nd 20 ports, xe16-xe35
+serdes_preemphasis_34=0x2D4300
+serdes_preemphasis_35=0x2D4300
+serdes_preemphasis_36=0x2B4500
+serdes_preemphasis_37=0x2B4500
+serdes_preemphasis_38=0x2B4500
+serdes_preemphasis_39=0x2B4500
+serdes_preemphasis_40=0x2B4500
+serdes_preemphasis_41=0x2B4500
+serdes_preemphasis_42=0x2B4500
+serdes_preemphasis_43=0x2B4500
+serdes_preemphasis_44=0x284800
+serdes_preemphasis_45=0x284800
+serdes_preemphasis_46=0x284800
+serdes_preemphasis_47=0x284800
+serdes_preemphasis_48=0x284800
+serdes_preemphasis_49=0x284800
+serdes_preemphasis_50=0x2B4500
+serdes_preemphasis_51=0x2B4500
+serdes_preemphasis_52=0x284800
+serdes_preemphasis_53=0x284800
+
+# The 3rd 12 ports, xe36-xe47
+serdes_preemphasis_68=0x284800
+serdes_preemphasis_69=0x2A4600
+serdes_preemphasis_70=0x2B4500
+serdes_preemphasis_71=0x2A4600
+serdes_preemphasis_72=0x2A4600
+serdes_preemphasis_73=0x2B4500
+serdes_preemphasis_74=0x2B4500
+serdes_preemphasis_75=0x2A4600
+serdes_preemphasis_76=0x2B4500
+serdes_preemphasis_77=0x2B4500
+serdes_preemphasis_78=0x2B4500
+serdes_preemphasis_79=0x2B4500
+
+# 6 x 100G ports, expandable to 24 x 25G ports
+serdes_preemphasis_80=0x2D4300
+serdes_preemphasis_81=0x2D4300
+serdes_preemphasis_82=0x2D4300
+serdes_preemphasis_83=0x2D4300
+
+serdes_preemphasis_102=0x304000
+serdes_preemphasis_103=0x304000
+serdes_preemphasis_104=0x304000
+serdes_preemphasis_105=0x304000
+
+serdes_preemphasis_106=0x304000
+serdes_preemphasis_107=0x304000
+serdes_preemphasis_108=0x304000
+serdes_preemphasis_109=0x304000
+
+serdes_preemphasis_110=0x304000
+serdes_preemphasis_111=0x304000
+serdes_preemphasis_112=0x304000
+serdes_preemphasis_113=0x304000
+
+serdes_preemphasis_114=0x2E360C
+serdes_preemphasis_115=0x2E360C
+serdes_preemphasis_116=0x2E360C
+serdes_preemphasis_117=0x2E360C
+
+serdes_preemphasis_118=0x2E360C
+serdes_preemphasis_119=0x2E360C
+serdes_preemphasis_120=0x2E360C
+serdes_preemphasis_121=0x2E360C