From 1f3e8dc1a1f72f99c8c758c80463138bbef90534 Mon Sep 17 00:00:00 2001 From: "John H. Palmieri" Date: Thu, 24 Sep 2015 07:43:14 -0700 Subject: [PATCH] trac 19233: change ".align 2^n" to ".p2align n" in the files x86_64/mulredc*.asm, so that ecm will build with Xcode 7 and OS X 10.11. --- build/pkgs/ecm/SPKG.txt | 141 +----- build/pkgs/ecm/patches/asm-align.patch | 627 +++++++++++++++++++++++++ 2 files changed, 631 insertions(+), 137 deletions(-) create mode 100644 build/pkgs/ecm/patches/asm-align.patch diff --git a/build/pkgs/ecm/SPKG.txt b/build/pkgs/ecm/SPKG.txt index ae8cf15d62f..9d705f0eac8 100644 --- a/build/pkgs/ecm/SPKG.txt +++ b/build/pkgs/ecm/SPKG.txt @@ -48,140 +48,7 @@ LGPL V3+ files for later versions of Microsoft Visual C get added.) === Patches === - * Currently none - -== Changelog == - -=== ecm-6.4.4 (Jeroen Demeyer, 11 April 2013) === - * Trac #14151: upgrade to GMP-ECM 6.4.4, remove all Sage patches - since they are upstream now. - -=== ecm-6.3.p8 (Jeroen Demeyer, 28 May 2012) === - * Trac #12751: remove the gcc-4.7.0 workaround for ia64 since this bug - has been fixed in gcc-4.7.1 and we will not support building Sage - with gcc-4.7.0 on Itanium. - * Remove unused variable SAGE_CONF_OPTS. - * Rename ECM_EXTRA_OPTS to ECM_CONFIGURE for consistency with MPIR. - * Don't override user-set CFLAGS. - -=== ecm-6.3.p7 (Leif Leonhardy, April 19th 2012) === - * #12830: Add `-m[no-]power*` to the processor-specific options recognized; - these are used to enable/disable specific instruction set extensions of the - POWER and PowerPC (PPC) CPUs. - -=== ecm-6.3.p6 (Leif Leonhardy, April 16th 2012) === - * #12830: Add a work-around for GCC 4.7.x on ia64 (Itanium), since GMP-ECM - currently won't build with that and anything but `-O0` on that platform. - * Use `\{1,\}` instead of `\+` in `sed` patterns, which is more portable. - * Also support newer system-wide MPIR installations for printing their - settings. - * Use `patch` to apply patches. Since the pre-patched `configure` in - `patches/` was created with a newer version of autotools (or, rather, the - original `configure` was created with an outdated version), the patch would - have been almost as large as the patched `configure` file itself. Hence - I `autoreconf`ed the source tree with a patched `configure.in` (and almost - the latest versions of autotools), then created a patch to `configure` - from the resulting file(s). Note that therefore `src/` isn't really vanilla - any more, although just the auto-generated files differ (which are still - made from vanilla upstream sources, including `configure.in`). - Add a "Patches" subsection and update "Special Update/Build Instructions". - Remove files in `patches/` from `.hgignore` (and also remove pre-patched - files from that directory); the patch to `configure` and the diff of - `configure.in` are [now] under revision control, which IMHO makes sense. - * Beautify (and simplify) the output with respect to options passed to - `configure`; print the settings of a few more environment variables that - GMP-ECM uses (in case they're set); add some messages, also mention - `--enable-assert` etc. if `SAGE_DEBUG=yes`. - * Remove unused test for GCC. - -=== ecm-6.3.p5 (Leif Leonhardy, April 11th 2012) === - * #12830: Don't add `-march=native` if the assembler doesn't understand the - instructions the compiler emits with that. (E.g. the Apple/XCode assembler - on Darwin doesn't yet support AVX.) - * Fix extraction of `__GMP_CC` and `__GMP_CFLAGS` (from `gmp.h`) for newer - versions of MPIR, which define these to preprocessor macros rather than - strings. - * Redirect warnings and error messages to `stderr`; add some messages. - * Correct `SPKG.txt` w.r.t. applied patches. - -=== ecm-6.3.p4 (Jeroen Demeyer, 13 February 2012) === - * #12501: Do not patch configure.in in spkg-install (to prevent - automake from running). - * Restore upstream sources. - -=== ecm-6.3.p3 (Simon King, December 11th, 2011) === - * #12131: Use --libdir, to make the package work on openSUSE. - -=== ecm-6.3.p2 (Leif Leonhardy, November 25th, 2010) === - * #5847: Apply another patch from upstream to 'configure.in' to fix com- - pilation on 32-bit x86 processors supporting SSE2. (Also #10252.) - (There's only a single, cumulative patch file since both patches are to - 'configure.in'.) - * Work around linker bug on MacOS X 10.5 PPC (see Special Update/Build - Instructions above, and #5847 comment 35 ff.). - * Allow passing extra arguments to 'configure' through ECM_EXTRA_OPTS. - * Add "-march=native" to CFLAGS on platforms that support it, or use - processor-specific CFLAGS from GMP's / MPIR's 'gmp.h' if available, - but only if CFLAGS do not already contain similar (i.e., don't over- - ride a user's choice). [Subject to further improvement.] - * Print settings of CC, CFLAGS etc. and how we configure. - * Print settings of CC and CFLAGS found in 'SAGE_LOCAL/include/gmp.h' - and eventually a system-wide 'gmp.h', although the latter aren't (yet) - used at all, and only processor-specific parts of the former. - * Add '-fPIC' conditionally, i.e. not if we're also building a shared - library (or '--with-pic' was given). - * Don't delete previous installations unless the build succeeded. - * Further clean-up. - -=== ecm-6.3.p1 (Jeroen Demeyer, November 10th, 2010) === - * #5847: Apply a patch from upstream to configure.in to fix compilation - on 32-bit PowerPC processors. - -=== ecm-6.3.p0 (Leif Leonhardy, November 4th, 2010) === - * #5847: Reviewer patch applied to Mike's spkg (upgrade to 6.3) - * There are no patches, but to avoid confusion with the previous - one, it's now 'p0'. - * Added sanity checks to spkg-install and spkg-check. - * Add debug symbols by default, disable optimization if SAGE_DEBUG=yes, - enable optimization (-O3) otherwise. - * Remove also the manual page of previous installations. - * Typo: 'rm -r' -> 'rm -f' (header file) - * Removed setting of CXXFLAGS, since we don't have C++ code. - * Don't overwrite CFLAGS if SAGE64=yes (instead, append). - Removed -O2 -g in that case. Make use of CFLAG64 if set. - * Quote $SAGE_LOCAL in the parameters to configure, too. - * Use $MAKE instead of 'make' in spkg-check, too. - * Some messages changed (e.g. all failures now starting with "Error"), - some added. - * A few comments/notes added (SPKG.txt, spkg-install). - -=== ecm-6.3 (Mike Hansen, August 16th, 2010) === - * #5847: Update GMP-ECM to 6.3 - -=== ecm-6.2.1.p2 (Jaap Spies, Jan 25th, 2010) === - * Made SAGE64="yes" work also for Open Solaris 64 bit - * Removed Michael Mabshoff as maintainer - -=== ecm-6.2.1.p1 (François Bissey, October 26th, 2009) === - * The removal of the old version of ecm in ecm-6.2.1_p0.spkg is - broken because of the typo "SAGE_LCOAL"; notice that it should be - "SAGE_LOCAL". - -=== ecm-6.2.1.p0 (Michael Abshoff, January 19th, 2008) === - * bump version to force recompile due to gmp -> MPIR switch - -=== ecm-6.2.1 (Michael Abshoff, December 23rd, 2008) === - * upgrade to latest upstream release (#3237) - * clean up old static library, headers and binary - * improve SPKG.txt - -=== ecm-6.1.3.p0 (Michael Abshoff, May 18th, 2008) === - * add 64 bit OSX support - -=== ecm-6.1.3 (Michael Abshoff, Sept. 24th, 2007) === - * update to ecm 6.1.3 - -* Initial version - date unknown: - -I obtained the package from http://gforge.inria.fr/projects/ecm/ - + * asm-align.patch: on OS X using Xcode 7, ".align 64" in the files + "x86_64/mulredc*.asm" causes an error, and similarly with ".align + 32,,16". These need to be changed to ".p2align 6" and ".p2align + 5,,4", respectively diff --git a/build/pkgs/ecm/patches/asm-align.patch b/build/pkgs/ecm/patches/asm-align.patch new file mode 100644 index 00000000000..88e7a8f4f80 --- /dev/null +++ b/build/pkgs/ecm/patches/asm-align.patch @@ -0,0 +1,627 @@ +diff -r -u ecm-6.4.4-orig/x86_64/mulredc10.asm ecm-6.4.4/x86_64/mulredc10.asm +--- ecm-6.4.4-orig/x86_64/mulredc10.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc10.asm 2015-09-23 21:02:14.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc10 + TYPE(GSYM_PREFIX`'mulredc`'10,`function') + +@@ -535,7 +535,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc11.asm ecm-6.4.4/x86_64/mulredc11.asm +--- ecm-6.4.4-orig/x86_64/mulredc11.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc11.asm 2015-09-23 21:05:49.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc11 + TYPE(GSYM_PREFIX`'mulredc`'11,`function') + +@@ -579,7 +579,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc12.asm ecm-6.4.4/x86_64/mulredc12.asm +--- ecm-6.4.4-orig/x86_64/mulredc12.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc12.asm 2015-09-23 21:05:55.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc12 + TYPE(GSYM_PREFIX`'mulredc`'12,`function') + +@@ -623,7 +623,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc13.asm ecm-6.4.4/x86_64/mulredc13.asm +--- ecm-6.4.4-orig/x86_64/mulredc13.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc13.asm 2015-09-23 21:05:57.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc13 + TYPE(GSYM_PREFIX`'mulredc`'13,`function') + +@@ -667,7 +667,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc14.asm ecm-6.4.4/x86_64/mulredc14.asm +--- ecm-6.4.4-orig/x86_64/mulredc14.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc14.asm 2015-09-23 21:05:59.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc14 + TYPE(GSYM_PREFIX`'mulredc`'14,`function') + +@@ -711,7 +711,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc15.asm ecm-6.4.4/x86_64/mulredc15.asm +--- ecm-6.4.4-orig/x86_64/mulredc15.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc15.asm 2015-09-23 21:06:02.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc15 + TYPE(GSYM_PREFIX`'mulredc`'15,`function') + +@@ -755,7 +755,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc16.asm ecm-6.4.4/x86_64/mulredc16.asm +--- ecm-6.4.4-orig/x86_64/mulredc16.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc16.asm 2015-09-23 21:06:03.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc16 + TYPE(GSYM_PREFIX`'mulredc`'16,`function') + +@@ -799,7 +799,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc17.asm ecm-6.4.4/x86_64/mulredc17.asm +--- ecm-6.4.4-orig/x86_64/mulredc17.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc17.asm 2015-09-23 21:06:05.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc17 + TYPE(GSYM_PREFIX`'mulredc`'17,`function') + +@@ -843,7 +843,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc18.asm ecm-6.4.4/x86_64/mulredc18.asm +--- ecm-6.4.4-orig/x86_64/mulredc18.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc18.asm 2015-09-23 21:06:07.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc18 + TYPE(GSYM_PREFIX`'mulredc`'18,`function') + +@@ -887,7 +887,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc19.asm ecm-6.4.4/x86_64/mulredc19.asm +--- ecm-6.4.4-orig/x86_64/mulredc19.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc19.asm 2015-09-23 21:06:10.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc19 + TYPE(GSYM_PREFIX`'mulredc`'19,`function') + +@@ -931,7 +931,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_10.asm ecm-6.4.4/x86_64/mulredc1_10.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_10.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_10.asm 2015-09-23 20:52:08.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 bytes long + GLOBL GSYM_PREFIX`'mulredc1_10 + TYPE(GSYM_PREFIX`'mulredc1_`'10,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_11.asm ecm-6.4.4/x86_64/mulredc1_11.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_11.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_11.asm 2015-09-23 21:03:24.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_11 + TYPE(GSYM_PREFIX`'mulredc1_`'11,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_12.asm ecm-6.4.4/x86_64/mulredc1_12.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_12.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_12.asm 2015-09-23 21:03:25.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_12 + TYPE(GSYM_PREFIX`'mulredc1_`'12,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_13.asm ecm-6.4.4/x86_64/mulredc1_13.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_13.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_13.asm 2015-09-23 21:03:25.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_13 + TYPE(GSYM_PREFIX`'mulredc1_`'13,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_14.asm ecm-6.4.4/x86_64/mulredc1_14.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_14.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_14.asm 2015-09-23 21:03:25.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_14 + TYPE(GSYM_PREFIX`'mulredc1_`'14,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_15.asm ecm-6.4.4/x86_64/mulredc1_15.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_15.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_15.asm 2015-09-23 21:03:25.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_15 + TYPE(GSYM_PREFIX`'mulredc1_`'15,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_16.asm ecm-6.4.4/x86_64/mulredc1_16.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_16.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_16.asm 2015-09-23 21:03:26.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_16 + TYPE(GSYM_PREFIX`'mulredc1_`'16,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_17.asm ecm-6.4.4/x86_64/mulredc1_17.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_17.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_17.asm 2015-09-23 21:03:26.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_17 + TYPE(GSYM_PREFIX`'mulredc1_`'17,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_18.asm ecm-6.4.4/x86_64/mulredc1_18.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_18.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_18.asm 2015-09-23 21:03:26.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_18 + TYPE(GSYM_PREFIX`'mulredc1_`'18,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_19.asm ecm-6.4.4/x86_64/mulredc1_19.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_19.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_19.asm 2015-09-23 21:03:26.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_19 + TYPE(GSYM_PREFIX`'mulredc1_`'19,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_2.asm ecm-6.4.4/x86_64/mulredc1_2.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_2.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_2.asm 2015-09-23 21:03:26.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_2 + TYPE(GSYM_PREFIX`'mulredc1_`'2,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_20.asm ecm-6.4.4/x86_64/mulredc1_20.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_20.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_20.asm 2015-09-23 21:03:27.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_20 + TYPE(GSYM_PREFIX`'mulredc1_`'20,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_3.asm ecm-6.4.4/x86_64/mulredc1_3.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_3.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_3.asm 2015-09-23 21:03:27.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_3 + TYPE(GSYM_PREFIX`'mulredc1_`'3,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_4.asm ecm-6.4.4/x86_64/mulredc1_4.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_4.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_4.asm 2015-09-23 21:03:28.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_4 + TYPE(GSYM_PREFIX`'mulredc1_`'4,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_5.asm ecm-6.4.4/x86_64/mulredc1_5.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_5.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_5.asm 2015-09-23 21:03:28.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_5 + TYPE(GSYM_PREFIX`'mulredc1_`'5,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_6.asm ecm-6.4.4/x86_64/mulredc1_6.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_6.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_6.asm 2015-09-23 21:03:28.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_6 + TYPE(GSYM_PREFIX`'mulredc1_`'6,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_7.asm ecm-6.4.4/x86_64/mulredc1_7.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_7.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_7.asm 2015-09-23 21:03:28.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_7 + TYPE(GSYM_PREFIX`'mulredc1_`'7,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_8.asm ecm-6.4.4/x86_64/mulredc1_8.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_8.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_8.asm 2015-09-23 21:03:28.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_8 + TYPE(GSYM_PREFIX`'mulredc1_`'8,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc1_9.asm ecm-6.4.4/x86_64/mulredc1_9.asm +--- ecm-6.4.4-orig/x86_64/mulredc1_9.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc1_9.asm 2015-09-23 21:03:29.000000000 -0700 +@@ -18,7 +18,7 @@ + define(`INVM_PARAM',`%r8')dnl' + )dnl + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc1_9 + TYPE(GSYM_PREFIX`'mulredc1_`'9,`function') + +diff -r -u ecm-6.4.4-orig/x86_64/mulredc2.asm ecm-6.4.4/x86_64/mulredc2.asm +--- ecm-6.4.4-orig/x86_64/mulredc2.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc2.asm 2015-09-23 21:04:57.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc2 + TYPE(GSYM_PREFIX`'mulredc`'2,`function') + +@@ -183,7 +183,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc20.asm ecm-6.4.4/x86_64/mulredc20.asm +--- ecm-6.4.4-orig/x86_64/mulredc20.asm 2013-02-27 07:17:53.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc20.asm 2015-09-23 21:05:17.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc20 + TYPE(GSYM_PREFIX`'mulredc`'20,`function') + +@@ -975,7 +975,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc3.asm ecm-6.4.4/x86_64/mulredc3.asm +--- ecm-6.4.4-orig/x86_64/mulredc3.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc3.asm 2015-09-23 21:06:14.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc3 + TYPE(GSYM_PREFIX`'mulredc`'3,`function') + +@@ -227,7 +227,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc4.asm ecm-6.4.4/x86_64/mulredc4.asm +--- ecm-6.4.4-orig/x86_64/mulredc4.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc4.asm 2015-09-23 21:06:18.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc4 + TYPE(GSYM_PREFIX`'mulredc`'4,`function') + +@@ -271,7 +271,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc5.asm ecm-6.4.4/x86_64/mulredc5.asm +--- ecm-6.4.4-orig/x86_64/mulredc5.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc5.asm 2015-09-23 21:06:23.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc5 + TYPE(GSYM_PREFIX`'mulredc`'5,`function') + +@@ -315,7 +315,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc6.asm ecm-6.4.4/x86_64/mulredc6.asm +--- ecm-6.4.4-orig/x86_64/mulredc6.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc6.asm 2015-09-23 21:06:27.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc6 + TYPE(GSYM_PREFIX`'mulredc`'6,`function') + +@@ -359,7 +359,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc7.asm ecm-6.4.4/x86_64/mulredc7.asm +--- ecm-6.4.4-orig/x86_64/mulredc7.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc7.asm 2015-09-23 21:06:31.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc7 + TYPE(GSYM_PREFIX`'mulredc`'7,`function') + +@@ -403,7 +403,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc8.asm ecm-6.4.4/x86_64/mulredc8.asm +--- ecm-6.4.4-orig/x86_64/mulredc8.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc8.asm 2015-09-23 21:06:34.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc8 + TYPE(GSYM_PREFIX`'mulredc`'8,`function') + +@@ -447,7 +447,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m +diff -r -u ecm-6.4.4-orig/x86_64/mulredc9.asm ecm-6.4.4/x86_64/mulredc9.asm +--- ecm-6.4.4-orig/x86_64/mulredc9.asm 2013-02-27 07:17:52.000000000 -0800 ++++ ecm-6.4.4/x86_64/mulredc9.asm 2015-09-23 21:06:38.000000000 -0700 +@@ -23,7 +23,7 @@ + include(`config.m4') + + TEXT +-.align 64 # Opteron L1 code cache line is 64 bytes long ++.p2align 6 # Opteron L1 code cache line is 64 5,,4 + GLOBL GSYM_PREFIX`'mulredc9 + TYPE(GSYM_PREFIX`'mulredc`'9,`function') + +@@ -491,7 +491,7 @@ + # i > 0 passes + ######################################################################### + +-.align 32,,16 ++.p2align 5,,4 + LABEL_SUFFIX(1) + + # register values at loop entry: %TP = tmp, %I = i, %YP = y, %MP = m