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Add example to _mm_extract_ps (#1228)
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crates/core_arch/src/lib.rs

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@@ -5,7 +5,6 @@
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#![deny(rust_2018_idioms)]
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#![feature(
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asm,
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const_panic,
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custom_inner_attributes,
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link_llvm_intrinsics,
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platform_intrinsics,

crates/core_arch/src/x86/sse41.rs

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@@ -141,8 +141,30 @@ pub unsafe fn _mm_blend_ps<const IMM4: i32>(a: __m128, b: __m128) -> __m128 {
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}
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/// Extracts a single-precision (32-bit) floating-point element from `a`,
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/// selected with `IMM8`
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/// selected with `IMM8`. The returned `i32` stores the float's bit-pattern,
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/// and may be converted back to a floating point number via casting.
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///
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/// # Example
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/// ```rust
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/// #[cfg(target_arch = "x86")]
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/// #use std::arch::x86::*;
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/// #[cfg(target_arch = "x86_64")]
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/// #use std::arch::x86_64::*;
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/// #fn main() {
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/// # if is_x86_feature_detected!("sse4.1") {
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/// # #[target_feature(enable = "sse4.1")]
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/// # unsafe fn worker() {
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/// let mut float_store = vec![1.0, 1.0, 2.0, 3.0];
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/// unsafe {
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/// let simd_floats = _mm_set_ps(2.5, 5.0, 7.5, 10.0);
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/// let x: i32 = _mm_extract_ps::<2>(simd_floats);
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/// float_store.push(f32::from_bits(x as u32));
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/// }
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/// assert_eq!(float_store, vec![1.0, 1.0, 2.0, 3.0, 5.0]);
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/// # }
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/// # unsafe { worker() }
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/// #}
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/// ```
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_extract_ps)
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#[inline]
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#[target_feature(enable = "sse4.1")]

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