From f23173b13810826aa5a351fbfd352ab0058104e0 Mon Sep 17 00:00:00 2001
From: Jubilee Young <workingjubilee@gmail.com>
Date: Fri, 13 Sep 2024 13:36:32 -0700
Subject: [PATCH] Use -0.0 in `intrinsics::simd::reduce_add_unordered`

-0.0 is the actual neutral additive float, not +0.0, and this matters to codegen.
---
 compiler/rustc_codegen_llvm/src/intrinsic.rs   |  4 ++--
 tests/assembly/aarch64-reduce-add-unordered.rs | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)
 create mode 100644 tests/assembly/aarch64-reduce-add-unordered.rs

diff --git a/compiler/rustc_codegen_llvm/src/intrinsic.rs b/compiler/rustc_codegen_llvm/src/intrinsic.rs
index 05fb77a193af3..b79bfd8a1cdef 100644
--- a/compiler/rustc_codegen_llvm/src/intrinsic.rs
+++ b/compiler/rustc_codegen_llvm/src/intrinsic.rs
@@ -2090,14 +2090,14 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         };
     }
 
-    arith_red!(simd_reduce_add_ordered: vector_reduce_add, vector_reduce_fadd, true, add, 0.0);
+    arith_red!(simd_reduce_add_ordered: vector_reduce_add, vector_reduce_fadd, true, add, -0.0);
     arith_red!(simd_reduce_mul_ordered: vector_reduce_mul, vector_reduce_fmul, true, mul, 1.0);
     arith_red!(
         simd_reduce_add_unordered: vector_reduce_add,
         vector_reduce_fadd_reassoc,
         false,
         add,
-        0.0
+        -0.0
     );
     arith_red!(
         simd_reduce_mul_unordered: vector_reduce_mul,
diff --git a/tests/assembly/aarch64-reduce-add-unordered.rs b/tests/assembly/aarch64-reduce-add-unordered.rs
new file mode 100644
index 0000000000000..199e2ad997747
--- /dev/null
+++ b/tests/assembly/aarch64-reduce-add-unordered.rs
@@ -0,0 +1,16 @@
+//@ assembly-output: emit-asm
+//@ compile-flags: --crate-type=lib -O
+//@ only-aarch64
+#![feature(portable_simd)]
+#![feature(core_intrinsics)]
+use std::intrinsics::simd as intrinsics;
+use std::simd::*;
+
+// CHECK-LABEL: reduce_fadd_negative_zero
+pub unsafe fn reduce_fadd_negative_zero(v: f32x4) -> f32 {
+    // CHECK-NEXT: ldr
+    // CHECK-NEXT: faddp
+    // CHECK-NEXT: faddp
+    // CHECK-NEXT: ret
+    intrinsics::simd_reduce_add_unordered(v)
+}