From cd14ebabe97b4c372a4a0729353ff142a5059ba8 Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Thu, 20 Feb 2025 20:11:56 +0300 Subject: [PATCH 1/6] translations: Update source strings in TS files Signed-off-by: Anton Midyukov --- translations/qucs_ar.ts | 1049 +++-- translations/qucs_ca.ts | 1055 +++-- translations/qucs_cs.ts | 1045 +++-- translations/qucs_de.ts | 1051 +++-- translations/qucs_en.ts | 1027 ++-- translations/qucs_es.ts | 1049 +++-- translations/qucs_fr.ts | 1051 +++-- translations/qucs_he.ts | 1049 +++-- translations/qucs_hu.ts | 1051 +++-- translations/qucs_it.ts | 1053 +++-- translations/qucs_ja.ts | 1049 +++-- translations/qucs_kk.ts | 1049 +++-- translations/qucs_pl.ts | 1049 +++-- translations/qucs_pt_BR.ts | 1057 +++-- translations/qucs_pt_PT.ts | 1055 +++-- translations/qucs_ro.ts | 1043 +++-- translations/qucs_ru.ts | 1031 +++-- translations/qucs_sv.ts | 1053 +++-- translations/qucs_tr.ts | 9007 ++++++++++++++++++------------------ translations/qucs_uk.ts | 1051 +++-- translations/qucs_zh_CN.ts | 1047 +++-- 21 files changed, 17338 insertions(+), 12633 deletions(-) diff --git a/translations/qucs_ar.ts b/translations/qucs_ar.ts index 1317a3dfc..a562557dd 100644 --- a/translations/qucs_ar.ts +++ b/translations/qucs_ar.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate محاكاة @@ -545,195 +550,195 @@ ComponentDialog - + Edit Component Properties تحرير خصائص العنصر - + + Equation Editor + + + + + Put result in dataset + + + + Sweep الاجتياح - - - - - - - - - display in schematic - العرض التخطيطي + العرض التخطيطي - Simulation: - المحاكاة : + المحاكاة : - Sweep Parameter: - الاجتياح المعلم : + الاجتياح المعلم : - Type: - النوع : + النوع : - linear - خطية + خطية - logarithmic - لوغاريتمي + لوغاريتمي - list - قائمة + قائمة - constant - ثابت + ثابت - Values: - القيم : + القيم : - Start: - بداية : + بداية : - Stop: - التوقف : + التوقف : - - - Step: - خطوة : + خطوة : - Number: - العدد : + العدد : - - + + Properties الخصائص : - Name: - الاسم : + الاسم : - + + Name الاسم - - Value - القيمة + + Simulation + المحاكاة - display - يعرض + Sweep Parameter + - Description - وصف + Type + النوع - - Edit - تحرير + + Values + - - Browse - تصفح + + Start + - - Add - إضافة + + Stop + - - Remove - يزيل + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + القيمة + + + + Show - + display + يعرض + + + + Description + وصف + + + Edit + تحرير + + + Browse + تصفح + + + Add + إضافة + + + Remove + يزيل + + OK - موافق + موافق - Apply - ينطبق + ينطبق - Cancel - إلغاء + إلغاء - - - - - - - - - yes - نعم + نعم - - - - - no - لا + لا - + Select a file تحديد ملف @@ -768,66 +773,65 @@ فيريلوج ملفات - Points per decade: - نقطة لكل عقد من الزمن : + نقطة لكل عقد من الزمن : CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic العرض التخطيطي - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply - + Cancel إلغاء - + OK موافق - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +839,7 @@ DiagramDialog - + Edit Diagram Properties تعديل خصائص الشكل البياني @@ -1366,38 +1370,38 @@ محاكاة - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1407,12 +1411,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1423,17 +1427,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2185,12 +2189,12 @@ Node name will not be changed. - + Library Name: مكتبة الاسم : - + Choose subcircuits: اختيار subcircuits : @@ -2200,7 +2204,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All اختيار الكل @@ -2342,7 +2351,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2354,7 +2363,7 @@ Node name will not be changed. - + Error creating library. @@ -2918,7 +2927,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3659,6 +3668,7 @@ but is %1 ! + delay time (SPICE only) @@ -3673,7 +3683,7 @@ but is %1 ! المصدر AM التضمي - + ideal ac current source مصدر المنحنى المثالي الحالي @@ -3682,14 +3692,19 @@ but is %1 ! peak current in Ampere ذروة الحالية لأمبير + + + offset current (SPICE only) + + - + damping factor (transient simulation only) التخميد عامل (المحاكاة عابرة فقط) ق - + ac Current Source مصدر المنحنى الحالي @@ -3704,7 +3719,7 @@ but is %1 ! الحالي في أمبير - + dc Current Source مصدر دس الحالي @@ -3983,7 +3998,7 @@ but is %1 ! - + transfer function scaling factor @@ -4000,7 +4015,7 @@ but is %1 ! - + npn transistor npn ترانزستور @@ -4563,20 +4578,20 @@ but is %1 ! المستوى العالي للفولتاج - + - + - + - + @@ -4591,16 +4606,16 @@ but is %1 ! - - + + - + - + Error خطأ @@ -5153,7 +5168,7 @@ Wrong 'component' line format! المنطقة الافتراضية للصمام الثنائي - + Diode صمام ثنائي @@ -6244,6 +6259,7 @@ Wrong 'component' line format! + put result into dataset وضع نتيجة في جدول البيانات @@ -6530,7 +6546,7 @@ Wrong 'component' line format! التيار الأولي عابرة للمحاكاة - + Inductor أداة الحث @@ -6621,7 +6637,7 @@ Wrong 'component' line format! بداية وقت التأخير - + Rectangle Current التيار المستطيل @@ -6722,7 +6738,7 @@ Wrong 'component' line format! JFETالسطح الإفتراضي ل - + n-JFET n-JFET @@ -7386,7 +7402,7 @@ Wrong 'component' line format! - + n-MOSFET n-MOSFET @@ -7404,7 +7420,7 @@ Wrong 'component' line format! depletion MOSFET - + zero-bias threshold voltage عتبة الفولت معدومة @@ -7595,8 +7611,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8370,7 +8386,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8585,7 +8601,7 @@ Wrong 'component' line format! - + Resistor المقاومة @@ -8725,8 +8741,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - متاحة) القوة المتناوبة بالوات) + متاحة) القوة المتناوبة بالوات) @@ -8814,7 +8834,7 @@ Wrong 'component' line format! SPICE ملف وثيقة - + SPICE netlist SPICE وثيقة @@ -8829,7 +8849,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". خطأ : لا يوجد اسم الملف في عنصر SPICE في "٪ 1". @@ -8850,7 +8870,7 @@ Wrong 'component' line format! .خطأ : لا يمكن فتح ملف سبيس"%1"ء - + Info معلومات @@ -8911,12 +8931,7 @@ Wrong 'component' line format! (نوع المنفذ (للمحاكاة الرقمية فقط - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port منفذ فرع الدائرة الكهربائية @@ -8984,7 +8999,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9434,7 +9449,7 @@ Wrong 'component' line format! مصدر التيار المستمر المثالي - + dc Voltage Source مصدر الفولتاج لتيار المستمر @@ -9479,7 +9494,7 @@ Wrong 'component' line format! الفولتاج لذبذبة - + Voltage Pulse ذبذبة الفولتاج @@ -9499,7 +9514,7 @@ Wrong 'component' line format! - + Rectangle Voltage فولتاج المستطيل @@ -9593,7 +9608,7 @@ Wrong 'component' line format! الجدول الحقيقة - + ERROR: Cannot open file "%1". "خطأ : لا يمكن إنشاء الملف "٪ 1. @@ -9637,13 +9652,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9662,7 +9677,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9761,16 +9776,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9782,7 +9797,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties تعديل خصائص @@ -9792,7 +9807,7 @@ Use PNG, JPEG or SVG graphics! - + power matching مطابقة الإشعال @@ -9857,7 +9872,7 @@ Use PNG, JPEG or SVG graphics! النص - + Rectangle المستطيل @@ -9867,7 +9882,7 @@ Use PNG, JPEG or SVG graphics! شغل مستطيل - + Edit Rectangle Properties تعديل خصائص مستطيل @@ -9886,15 +9901,15 @@ Use PNG, JPEG or SVG graphics! بدون عنوان - - + + Format Error: 'Painting' field is not closed! خطأ في الشكل : الطلاء الميدانية ليست مغلقة! - + Wrong document version: الخطأ في إصدار الوثيقة : @@ -9912,7 +9927,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9933,7 +9948,7 @@ Unknown field! - + Cannot save document! لا يمكن حفظ الوثيقة! @@ -9946,7 +9961,7 @@ Wrong property field limiter! خطأ مجال الملكية المحدد! - + Format Error: Unknown property: خطأ في الشكل : @@ -10062,13 +10077,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! خطأ في تنسيق ملف :حقل مجهول! - + ERROR: Component "%1" has no analog model. خطأ : العنصر "٪ 1" ليس لديها نموذج التناظرية. @@ -10088,7 +10103,7 @@ Unknown field! تحذير : مكتبة تخطي عنصر "٪ 1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -10098,12 +10113,12 @@ Unknown field! تحذير : تجاهل عنصر المحاكاة في subcircuit "٪ 1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. خطأ : واحد فقط يسمح المحاكاة الرقمية. @@ -10326,7 +10341,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10375,7 +10390,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10385,8 +10400,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10797,12 +10812,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10833,12 +10848,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10850,17 +10865,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10895,7 +10910,7 @@ seven line XSPICE specification. - + core @@ -10906,7 +10921,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10918,7 +10933,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10946,7 +10961,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10982,7 +10997,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11254,7 +11269,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11281,7 +11296,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11521,6 +11536,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11578,29 +11609,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11675,7 +11706,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11709,7 +11740,7 @@ Change parameters and/or topology and try again! حقوق الطبع محفوظة (جيم) 2004 ، 2005 من قبل {2014, 2015 ?} - + Filter topology @@ -11745,12 +11776,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11760,12 +11791,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11840,12 +11871,13 @@ Active Filter synthesis program QucsApp - + + Schematic تخطيطي - + Data Display عرض البيانات @@ -11856,42 +11888,42 @@ Active Filter synthesis program - + VHDL Sources مصادر VHDL - - + + Verilog Sources مصادر verilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File أية ملفات - + The schematic search path has been refreshed. @@ -11906,7 +11938,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11916,7 +11948,7 @@ Active Filter synthesis program - + Open example… @@ -11931,14 +11963,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11948,23 +11980,23 @@ Active Filter synthesis program الخطط - + New جديد - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11977,7 +12009,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11987,7 +12019,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -12022,13 +12054,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo مضمون المشروع الحالي - + Search Components - + Clear @@ -12059,8 +12091,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -12071,12 +12104,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -12084,7 +12117,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -12102,43 +12135,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo خطأ - + Cannot open "%1". لا نستطيع فتح "%1. - + Library is corrupt. المكتبة فاسدة. - + - - - + + + - + Info معلومات - + Default icon not found: %1.png - + -port -الميناء @@ -12149,14 +12182,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! وتتضمن هذه الوثيقة التغييرات غير المحفوظة! - + Do you want to save the changes before copying? @@ -12196,17 +12229,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo لا يمكن حذف ملف مفتوح! - - + + - - + + Warning تحذير - + This will delete the file permanently! Continue ? حذف هذا الملف نهائيا! الاستمرار؟ @@ -12269,12 +12302,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! لا يمكن إنشاء دليل عمل! - + Cannot create project directory ! لا يمكن إنشاء دليل للمشروع! @@ -12302,41 +12335,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12415,34 +12448,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo تخطيطية جديدة... - - + + - + - + - + Ready. جاهز. - + Creating new text editor... محرر نصوص جديدة... - + Opening file... فتح الملف... @@ -12464,12 +12497,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted إجهاض الحفظ - + Qucs Netlist @@ -12484,12 +12517,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name إدخال الاسم وثيقة @@ -12549,7 +12583,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo & تجاهل - + untitled بدون عنوان @@ -12589,22 +12623,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12628,7 +12668,7 @@ Use subcircuit to crete Verilog-A module! هل تريد حقا الانسحاب؟ - + The document was modified by another program ! الوثيقة التي تم تعديلها من خلال برنامج آخر! @@ -12728,7 +12768,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12808,7 +12855,7 @@ Overwrite ? لا تستطيع كتابة "٪ 1"! - + Please open project with subcircuits! !يرجى فتح المشروع الدارة الفرعية @@ -12875,7 +12922,7 @@ Have you saved the Verilog-A symbols? - + &New &عرض @@ -13713,7 +13760,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13755,7 +13833,7 @@ Install Content of a Package تثبيت محتوى المجلد - + Convert data file @@ -14101,7 +14179,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -14140,7 +14218,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -14157,7 +14235,7 @@ Rotates the selected component by 90° counter-clockwise دوران العنصر المختار ب° 90 - + Mirror about X Axis مرآة المحور ْX @@ -14570,12 +14648,12 @@ Starts attenuator calculation program - + Simulate محاكاة - + Simulates the current schematic تمثيل التخطيط الحالي @@ -14628,17 +14706,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph مجموعة ماركر على الرسم البياني @@ -14657,7 +14730,7 @@ Sets a marker on a diagram's graph وضع علامة على الرسم البياني - + Show Last Messages إظهار آخر الرسائل @@ -14885,12 +14958,12 @@ About Qt by Trolltech ‏&‏المحاكاة - + &View &عرض - + &Help ‏&‏مساعدة‏ @@ -14999,7 +15072,7 @@ Open - + Input مدخلات @@ -15652,7 +15725,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties تحرير خصائص كوكس @@ -15661,7 +15734,7 @@ Enables/disables the table of contents فونت (بعد إعادة تحميل ) : - + Large font size: @@ -15671,117 +15744,117 @@ Enables/disables the table of contents لون الخلفي للوثيقة : - + Language (set after reload): اللغة (بعد إعادة تحميل ) : - + system language لغة النظام - + English إنجليزي - + German الألمانية - + French فرنسي - + Spanish الأسبانية - + Italian الايطالية - + Polish البولندية - + Romanian الرومانية - + Japanese اليابانية - + Swedish السويدية - + Hungarian الهنغارية - + Hebrew العبرية - + Portuguese-BR - + Portuguese-PT - + Turkish التركية - + Ukrainian الأوكرانية - + Russian الروسية - + Czech التشيكية - + Catalan الكاتالوينية - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15791,12 +15864,12 @@ Enables/disables the table of contents - + Kazakh - + Maximum undo operations: @@ -15826,7 +15899,7 @@ Enables/disables the table of contents - + Draw diagrams with anti-aliasing feature: @@ -15841,17 +15914,17 @@ Enables/disables the table of contents - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15865,6 +15938,26 @@ Enables/disables the table of contents Settings إعدادات + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -16028,7 +16121,7 @@ open files with an appropriate program. القيمة الافتراضية - + Error خطأ @@ -16038,7 +16131,7 @@ open files with an appropriate program. هذه الاحقة سجلت من قبل! - + Select the home directory @@ -16637,7 +16730,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File ‏‏&ملف @@ -16662,7 +16755,7 @@ open files with an appropriate program. - + &Help @@ -16678,7 +16771,7 @@ open files with an appropriate program. - + Qucs-S S-parameter Help @@ -16711,24 +16804,24 @@ Copyright (C) 2024 by - - + + Warning تحذير - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16752,7 +16845,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16803,7 +16896,7 @@ Copyright (C) 2024 by Schematic - + Title العنوان @@ -16823,7 +16916,7 @@ Copyright (C) 2024 by مراجعة : - + Edit Schematic @@ -16859,12 +16952,12 @@ Edits the symbol for this schematic تعديلات لهذا الرمز التخطيطي - + generic - + Error خطأ @@ -16882,7 +16975,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -17125,7 +17218,7 @@ Set the admsXml location on the application settings. إنشاء netlist... - + Error خطأ @@ -17137,7 +17230,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -17163,13 +17256,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -17180,7 +17273,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17245,12 +17338,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17265,40 +17358,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel إلغاء - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17308,7 +17411,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17318,7 +17421,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17351,7 +17454,24 @@ Set the admsXml location on the application settings. ملف: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic عرض اسم الملف في المخطط @@ -17406,7 +17526,7 @@ Set the admsXml location on the application settings. إلغاء - + Select a file إختر ملف @@ -17476,50 +17596,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open ‏يفتح - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK موافق - + Apply - + Cancel إلغاء - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17547,24 +17680,24 @@ No SUBCKT directive found in library - + Error خطأ - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17589,7 +17722,8 @@ No SUBCKT directive found in library - + + Warning تحذير @@ -17823,7 +17957,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17998,10 +18132,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 خطأ + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_ca.ts b/translations/qucs_ca.ts index d1387c0ab..d65c89f5a 100644 --- a/translations/qucs_ca.ts +++ b/translations/qucs_ca.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs Pel que fa a Qucs @@ -26,7 +26,7 @@ Programador GUI, Verilog - Un carregador dinàmic - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ refactorització, modularitat - - + + RF design tools eines de disseny de RF - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -368,7 +373,7 @@ AbstractSpiceKernel - + Simulate Simular @@ -577,195 +582,203 @@ ComponentDialog - + Edit Component Properties Editar les propietats del component - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Escombrat - - - - - - - - - display in schematic - mostrar a l'esquema + mostrar a l'esquema - Simulation: - Simulació: + Simulació: - Sweep Parameter: - Paràmetre d'Escombrat: + Paràmetre d'Escombrat: - Type: - Tipus: + Tipus: - linear - lineal + lineal - logarithmic - logarítmic + logarítmic - list - llista + llista - constant - constant + constant - Values: - Valors: + Valors: - Start: - Inici: + Inici: - Stop: - Parar: + Parar: - - - Step: - Pas: + Pas: - Number: - Número: + Número: - - + + Properties Propietats - Name: - Nom: + Nom: - + + Name Nom + + + Simulation + Simulació + + + + Sweep Parameter + + + + + Type + Tipus + + + + Values + + + + + Start + + + + + Stop + + + + + Step + + + Number + + + + + Populate parameters from SPICE file... + + + + Value Valor - + + Show + + + display - mostrar + mostrar - + Description Descripció - Edit - Editar + Editar - Browse - Examinar + Examinar - Add - Afegir + Afegir - Remove - Borrar + Borrar - Move Up - Mou amunt + Mou amunt - Move Down - Mou avall - - - - Fill from SPICE .MODEL - + Mou avall - OK - Acceptar + Acceptar - Apply - Aplicar + Aplicar - Cancel - Cancel·lar + Cancel·lar - - - - - - - - - yes - Si + Si - - - - - no - no + no - + Select a file Seleccionar un fitxer @@ -800,66 +813,65 @@ Arxius verilog - Points per decade: - Punts por dècada: + Punts por dècada: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic mostrar a l'esquema - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Aplicar - + Cancel Cancel·lar - + OK Acceptar - + Find all variables - + Find all outputs - + SPICE code editor @@ -867,7 +879,7 @@ DiagramDialog - + Edit Diagram Properties Editar les propietats del diagrama @@ -1398,38 +1410,38 @@ Simular - + Stop - - + + Save netlist - + Exit Sortir - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1439,12 +1451,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1455,17 +1467,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2344,12 +2356,12 @@ Node name will not be changed. - + Library Name: Nom de la Biblioteca: - + Choose subcircuits: Escollir subcircuits: @@ -2359,7 +2371,12 @@ Node name will not be changed. Afegir la descripció del subcircuit - + + Analog models only + + + + Select All Seleccionar todo @@ -2504,7 +2521,7 @@ Node name will not be changed. - + Creating Verilog netlist. Creant la llista de nodes per Verilog. @@ -2518,7 +2535,7 @@ Node name will not be changed. - + Error creating library. Error en la creació de la llibreria. @@ -3104,7 +3121,7 @@ Programa de càlcul del codi de colors de resistències Ngspice - + Problem with SaveNetlist @@ -3850,6 +3867,7 @@ Programa de càlcul del codi de colors de resistències + delay time (SPICE only) @@ -3864,7 +3882,7 @@ Programa de càlcul del codi de colors de resistències Fuente modulada AM - + ideal ac current source fuente de intensidad ac ideal @@ -3873,14 +3891,19 @@ Programa de càlcul del codi de colors de resistències peak current in Ampere corriente de pico en Amperios + + + offset current (SPICE only) + + - + damping factor (transient simulation only) Factor de damping (sólo para simulación de transitorio) - + ac Current Source Fuente de intensidad ac @@ -3895,7 +3918,7 @@ Programa de càlcul del codi de colors de resistències intensidad en Amperios - + dc Current Source Fuente de intensidad dc @@ -4174,7 +4197,7 @@ Programa de càlcul del codi de colors de resistències - + transfer function scaling factor factor d'escala de la funció de transferència @@ -4191,7 +4214,7 @@ Programa de càlcul del codi de colors de resistències - + npn transistor transitor npn @@ -4754,20 +4777,20 @@ Programa de càlcul del codi de colors de resistències tensión de alto nivel - + - + - + - + @@ -4782,16 +4805,16 @@ Programa de càlcul del codi de colors de resistències - - + + - + - + Error Error @@ -5344,7 +5367,7 @@ Wrong 'component' line format! area predeterminada para el diodo - + Diode Diodo @@ -6287,6 +6310,7 @@ Wrong 'component' line format! + put result into dataset poner els resultados en el conjunto de dades @@ -6573,7 +6597,7 @@ Wrong 'component' line format! - + Inductor Bobina @@ -6664,7 +6688,7 @@ Wrong 'component' line format! - + Rectangle Current Corriente Cuadrada @@ -6765,7 +6789,7 @@ Wrong 'component' line format! area predeterminada para JFET - + n-JFET JFET-n @@ -7425,7 +7449,7 @@ Wrong 'component' line format! transistor de efecto de campo MOS - + n-MOSFET MOSFET-n @@ -7443,7 +7467,7 @@ Wrong 'component' line format! - + zero-bias threshold voltage tensión umbral de polarización @@ -7634,8 +7658,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8409,7 +8433,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8624,7 +8648,7 @@ Wrong 'component' line format! - + Resistor Resistencia @@ -8764,7 +8788,7 @@ Wrong 'component' line format! - (available) ac power in Watts + (available) ac power in dBm @@ -8853,7 +8877,7 @@ Wrong 'component' line format! fitxer netlist SPICE - + SPICE netlist netlist SPICE @@ -8868,7 +8892,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". ERROR: Sin nombre de fitxer en el componente SPICE "%1". @@ -8889,7 +8913,7 @@ Wrong 'component' line format! - + Info Información @@ -8950,12 +8974,7 @@ Wrong 'component' line format! tipo de conexión (sólo para simulación digital) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Conexión de Subcircuito @@ -9023,7 +9042,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9473,7 +9492,7 @@ Wrong 'component' line format! fuente de tensión dc ideal - + dc Voltage Source Fuente de Tensión dc @@ -9518,7 +9537,7 @@ Wrong 'component' line format! tensión del pulso - + Voltage Pulse Pulso de Tensión @@ -9538,7 +9557,7 @@ Wrong 'component' line format! - + Rectangle Voltage Tensión Cuadrada @@ -9632,7 +9651,7 @@ Wrong 'component' line format! Tabla de Verdad - + ERROR: Cannot open file "%1". @@ -9674,13 +9693,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9699,7 +9718,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9798,16 +9817,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9819,7 +9838,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Editar Propietats @@ -9829,7 +9848,7 @@ Use PNG, JPEG or SVG graphics! - + power matching adaptación de potencia @@ -9894,7 +9913,7 @@ Use PNG, JPEG or SVG graphics! Texto - + Rectangle Rectángulo @@ -9904,7 +9923,7 @@ Use PNG, JPEG or SVG graphics! Rectángulo relleno - + Edit Rectangle Properties Editar les propietats del Rectángulo @@ -9923,15 +9942,15 @@ Use PNG, JPEG or SVG graphics! sinTítulo - - + + Format Error: 'Painting' field is not closed! Error de Formato: ¡El campo 'Painting' no está cerrado! - + Wrong document version: Versión equivocada del document: @@ -9949,7 +9968,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9970,7 +9989,7 @@ Unknown field! - + Cannot save document! ¡No puedo guardar el document! @@ -9983,7 +10002,7 @@ Wrong property field limiter! ¡limitador de campo amb propiedad equivocada! - + Format Error: Unknown property: Error de Formato: @@ -10099,13 +10118,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! Error de formato de fitxer: ¡Campo desconocido! - + ERROR: Component "%1" has no analog model. ERROR: El componente "%1" no tiene modelo analógico. @@ -10125,7 +10144,7 @@ Unknown field! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -10135,12 +10154,12 @@ Unknown field! AVISO: Ignora simulación de componente en el subcircuit "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ERROR: Sólo está permitida una simulación digital. @@ -10363,7 +10382,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10412,7 +10431,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10422,8 +10441,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10834,12 +10853,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10870,12 +10889,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10887,17 +10906,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10932,7 +10951,7 @@ seven line XSPICE specification. - + core @@ -10943,7 +10962,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10955,7 +10974,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10983,7 +11002,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11019,7 +11038,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11291,7 +11310,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11318,7 +11337,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11558,13 +11577,29 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter - - &File - &Fitxer + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter + + + &File + &Fitxer @@ -11615,29 +11650,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11712,7 +11747,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11746,7 +11781,7 @@ Change parameters and/or topology and try again! Copyright (C) 2014, 2015 per - + Filter topology @@ -11782,12 +11817,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11797,12 +11832,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11877,12 +11912,13 @@ Active Filter synthesis program QucsApp - + + Schematic Esquema - + Data Display Vista de dades @@ -11893,42 +11929,42 @@ Active Filter synthesis program - + VHDL Sources Fuentes VHDL - - + + Verilog Sources - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Qualsevol Fitxer - + The schematic search path has been refreshed. @@ -11943,7 +11979,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11953,7 +11989,7 @@ Active Filter synthesis program - + Open example… @@ -11968,14 +12004,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11985,23 +12021,23 @@ Active Filter synthesis program Esquemas - + New Nou - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -12014,7 +12050,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -12024,7 +12060,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -12059,13 +12095,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo contenido del proyecto actual - + Search Components - + Clear @@ -12096,8 +12132,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -12108,12 +12145,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -12121,7 +12158,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -12139,43 +12176,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Error - + Cannot open "%1". No puedo abrir "%1". - + Library is corrupt. La librería está corrupta. - + - - - + + + - + Info Información - + Default icon not found: %1.png - + -port -conexiones @@ -12186,7 +12223,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! ¡El document contiene cambios no guardados! @@ -12194,7 +12231,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Do you want to save the changes before copying? @@ -12234,17 +12271,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo ¡No puedo eliminar un fitxer abierto! - - + + - - + + Warning Aviso - + This will delete the file permanently! Continue ? ¡Esto eliminará el fitxer para siempre! ¿Continuo? @@ -12307,12 +12344,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! ¡No puedo crear el directorio de trabajo! - + Cannot create project directory ! ¡No puedo crear el directorio del proyecto! @@ -12340,41 +12377,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12453,34 +12490,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Creando un nuevo esquema... - - + + - + - + - + Ready. Listo. - + Creating new text editor... Creando un nuevo editor de texts... - + Opening file... Abriendo fitxer... @@ -12502,12 +12539,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Guardado interrumpido - + Qucs Netlist @@ -12522,12 +12559,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Escriba un nombre del document @@ -12587,7 +12625,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Descartar - + untitled sinTítulo @@ -12627,22 +12665,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12666,7 +12710,7 @@ Use subcircuit to crete Verilog-A module! ¿Seguro que desea salir? - + The document was modified by another program ! ¡ Otro programa ha modificado el document ! @@ -12766,7 +12810,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12846,7 +12897,7 @@ Overwrite ? ¡No puedo escribir "%1"! - + Please open project with subcircuits! ¡Abra un proyecto amb subcircuits! @@ -12913,7 +12964,7 @@ Have you saved the Verilog-A symbols? - + &New &Nou @@ -13747,7 +13798,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13789,7 +13871,7 @@ Install Content of a Package Instalar el contenido de un Paquete - + Convert data file @@ -14135,7 +14217,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -14174,7 +14256,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -14191,7 +14273,7 @@ Rotates the selected component by 90° counter-clockwise Rota el elemento seleccionado 90º en el sentido de les agujas del reloj - + Mirror about X Axis Reflejar sobre el eje x @@ -14604,12 +14686,12 @@ Arranca el programa de cálculo de atenuadores - + Simulate Simular - + Simulates the current schematic Simula el esquema actual @@ -14662,17 +14744,12 @@ Calcula la polaridad DC y la muestra - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Poner Marcas en el gráfico @@ -14691,7 +14768,7 @@ Sets a marker on a diagram's graph Pone marcas de medida en un gráfico o diagrama - + Show Last Messages Mostrar els últimos mensajes @@ -14921,12 +14998,12 @@ Acerca de Qt por Trolltech &Simulació - + &View &Ver - + &Help &Ajuda @@ -15035,7 +15112,7 @@ Open - + Input Entrada @@ -15647,7 +15724,7 @@ Programa de síntexis de filtros QucsSettingsDialog - + Edit Qucs Properties Editar les propietats de Qucs @@ -15656,7 +15733,7 @@ Programa de síntexis de filtros Fuente (se activará al recargar): - + Large font size: @@ -15666,117 +15743,117 @@ Programa de síntexis de filtros Color de fondo del document: - + Language (set after reload): Idioma (usado después de recargar): - + system language Idioma del sistema - + English Inglés - + German Alemán - + French Francés - + Spanish Español - + Italian Italiano - + Polish Polaco - + Romanian Rumano - + Japanese Japonés - + Swedish Sueco - + Hungarian Húngaro - + Hebrew Hebreo - + Portuguese-BR - + Portuguese-PT - + Turkish Turco - + Ukrainian Ucraniano - + Russian Ruso - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15786,12 +15863,12 @@ Programa de síntexis de filtros - + Kazakh - + Maximum undo operations: @@ -15821,7 +15898,7 @@ Programa de síntexis de filtros - + Draw diagrams with anti-aliasing feature: @@ -15836,17 +15913,17 @@ Programa de síntexis de filtros - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15860,6 +15937,26 @@ Programa de síntexis de filtros Settings Configuración + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -16023,7 +16120,7 @@ abrir els fitxers amb el programa apropiado. Valors predeterminados - + Error Error @@ -16033,7 +16130,7 @@ abrir els fitxers amb el programa apropiado. ¡Ya está registrado este sufijo! - + Select the home directory @@ -16632,7 +16729,7 @@ abrir els fitxers amb el programa apropiado. Qucs_S_SPAR_Viewer - + &File &Fitxer @@ -16657,7 +16754,7 @@ abrir els fitxers amb el programa apropiado. - + &Help &Ajuda @@ -16673,7 +16770,7 @@ abrir els fitxers amb el programa apropiado. Acerca de Qt... - + Qucs-S S-parameter Help @@ -16706,24 +16803,24 @@ Copyright (C) 2024 by - - + + Warning Aviso - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16747,7 +16844,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16798,7 +16895,7 @@ Copyright (C) 2024 by Schematic - + Title Título @@ -16818,7 +16915,7 @@ Copyright (C) 2024 by Revisión: - + Edit Schematic @@ -16854,12 +16951,12 @@ Edits the symbol for this schematic Edita els símboels de este esquema - + generic - + Error Error @@ -16877,7 +16974,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -17120,7 +17217,7 @@ Set the admsXml location on the application settings. creando netlist... - + Error Error @@ -17132,7 +17229,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -17158,13 +17255,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -17175,7 +17272,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17242,12 +17339,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17262,40 +17359,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Cancel·lar - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17305,7 +17412,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17315,7 +17422,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17348,7 +17455,24 @@ Set the admsXml location on the application settings. Fitxer: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic mostar el nombre del fitxer en el esquema @@ -17403,7 +17527,7 @@ Set the admsXml location on the application settings. Cancel·lar - + Select a file Seleccionar un fitxer @@ -17473,50 +17597,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Abrir - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK Acceptar - + Apply Aplicar - + Cancel Cancel·lar - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17544,24 +17681,24 @@ No SUBCKT directive found in library - + Error Error - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17586,7 +17723,8 @@ No SUBCKT directive found in library - + + Warning Aviso @@ -17822,7 +17960,7 @@ Insereix l'esquelet d'una funció dOctave TunerDialog - + Add component @@ -17997,10 +18135,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Error + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_cs.ts b/translations/qucs_cs.ts index be61f917b..d662c34f0 100644 --- a/translations/qucs_cs.ts +++ b/translations/qucs_cs.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simulovat @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Změnit vlastnosti komponent - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Sweep - - - - - - - - - display in schematic - zobrazit ve schématu + zobrazit ve schématu - Simulation: - simulace: + simulace: - Sweep Parameter: - Sweep parametr: + Sweep parametr: - Type: - typ: + typ: - linear - lineární + lineární - logarithmic - logaritmický + logaritmický - list - seznam + seznam - constant - konstanta + konstanta - Values: - hodnoty: + hodnoty: - Start: - Spustit: + Spustit: - Stop: - zastavit: + zastavit: - - - Step: - délka kroku: + délka kroku: - Number: - počet: + počet: - - + + Properties Vlastnosti - Name: - jméno: + jméno: - + + Name jméno - - Value - hodnota + + Simulation + Simulace - display - zobrazit + Sweep Parameter + - Description - popis + Type + Typ - - Edit - upravit + + Values + - - Browse - prohledat + + Start + - - Add - přidat + + Stop + - - Remove - odebrat + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + hodnota + + + + Show - + display + zobrazit + + + + Description + popis + + + Edit + upravit + + + Browse + prohledat + + + Add + přidat + + + Remove + odebrat + + OK - OK + OK - Apply - převzít + převzít - Cancel - zrušit + zrušit - - - - - - - - - yes - ano + ano - - - - - no - ne + ne - + Select a file vyber soubor @@ -769,66 +774,65 @@ Verilog soubory - Points per decade: - bodů na dekádu: + bodů na dekádu: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic zobrazit ve schématu - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply - + Cancel - + OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties @@ -1363,38 +1367,38 @@ Simulovat - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1404,12 +1408,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1420,17 +1424,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2174,12 +2178,12 @@ Node name will not be changed. - + Library Name: Jméno knihovny: - + Choose subcircuits: Vybrat podobvody: @@ -2189,7 +2193,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Vybrat vše @@ -2331,7 +2340,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2343,7 +2352,7 @@ Node name will not be changed. - + Error creating library. @@ -2908,7 +2917,7 @@ je ale %1 ! Ngspice - + Problem with SaveNetlist @@ -3649,6 +3658,7 @@ je ale %1 ! + delay time (SPICE only) @@ -3663,7 +3673,7 @@ je ale %1 ! AM modulovaný zdroj - + ideal ac current source ideální Zdroj AC proudu @@ -3672,14 +3682,19 @@ je ale %1 ! peak current in Ampere špičková hodnota proudu v ampérech + + + offset current (SPICE only) + + - + damping factor (transient simulation only) tlumící faktor (pouze pro přechodovou simulaci) - + ac Current Source zdroj AC proudu @@ -3694,7 +3709,7 @@ je ale %1 ! Proud v ampérech - + dc Current Source zdroj DC proudu @@ -3973,7 +3988,7 @@ je ale %1 ! - + transfer function scaling factor @@ -3990,7 +4005,7 @@ je ale %1 ! - + npn transistor npn tranzistor @@ -4553,20 +4568,20 @@ je ale %1 ! napětí horní úrovně - + - + - + - + @@ -4581,16 +4596,16 @@ je ale %1 ! - - + + - + - + Error Chyba @@ -5143,7 +5158,7 @@ Chybný řádkový formát 'component' ! plošný faktor diody - + Diode Dioda @@ -6038,6 +6053,7 @@ Chybný řádkový formát 'component' ! + put result into dataset výsledek zapsat do datové sady @@ -6324,7 +6340,7 @@ Chybný řádkový formát 'component' ! počáteční proud pro přechodovou simulaci - + Inductor Cívka @@ -6415,7 +6431,7 @@ Chybný řádkový formát 'component' ! počáteční časová prodleva - + Rectangle Current Zdroj obdélníkového proudu @@ -6516,7 +6532,7 @@ Chybný řádkový formát 'component' ! plošný faktor JFETu - + n-JFET n-JFET @@ -7176,7 +7192,7 @@ Chybný řádkový formát 'component' ! MOS polem řízený tranzistor - + n-MOSFET n-MOSFET @@ -7194,7 +7210,7 @@ Chybný řádkový formát 'component' ! MOSFET (depletion) - + zero-bias threshold voltage nulové prahové napětí @@ -7385,8 +7401,8 @@ Chybný řádkový formát 'component' ! - - + + Use global SPICE temperature @@ -8160,7 +8176,7 @@ Chybný řádkový formát 'component' ! - + carrier signal frequency @@ -8375,7 +8391,7 @@ Chybný řádkový formát 'component' ! - + Resistor Odpor @@ -8515,7 +8531,7 @@ Chybný řádkový formát 'component' ! - (available) ac power in Watts + (available) ac power in dBm @@ -8604,7 +8620,7 @@ Chybný řádkový formát 'component' ! SPICE netlist soubor - + SPICE netlist Space netlist @@ -8619,7 +8635,7 @@ Chybný řádkový formát 'component' ! spice - + ERROR: No file name in SPICE component "%1". CHYBA: ve SPICE-komponentě "%1" není zadán žádný název souboru. @@ -8640,7 +8656,7 @@ Chybný řádkový formát 'component' ! - + Info Info @@ -8701,12 +8717,7 @@ Chybný řádkový formát 'component' ! druh připojení (pouze pro digitální simulaci) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Port podobvodu @@ -8774,7 +8785,7 @@ Chybný řádkový formát 'component' ! - + simulation temperature in degree Celsius (Qucsator only) @@ -9224,7 +9235,7 @@ Chybný řádkový formát 'component' ! ideální zdroj DC napětí - + dc Voltage Source zdroj DC napětí @@ -9269,7 +9280,7 @@ Chybný řádkový formát 'component' ! Napětí během pulzu - + Voltage Pulse Napěťový pulzní zdroj @@ -9289,7 +9300,7 @@ Chybný řádkový formát 'component' ! - + Rectangle Voltage Zdroj obdélníkového napětí @@ -9383,7 +9394,7 @@ Chybný řádkový formát 'component' ! Logická tabulka - + ERROR: Cannot open file "%1". @@ -9425,13 +9436,13 @@ Přepsat ? - + Successfully exported - + Disk write error! @@ -9450,7 +9461,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9549,16 +9560,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9570,7 +9581,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Upravit vlastnosti @@ -9580,7 +9591,7 @@ Use PNG, JPEG or SVG graphics! - + power matching výkonové přizpůsobení @@ -9645,7 +9656,7 @@ Use PNG, JPEG or SVG graphics! Text - + Rectangle Obdélník @@ -9655,7 +9666,7 @@ Use PNG, JPEG or SVG graphics! vyplněný obdélník - + Edit Rectangle Properties Změnit vlastnosti obdélníku @@ -9674,15 +9685,15 @@ Use PNG, JPEG or SVG graphics! nepojmenováno - - + + Format Error: 'Painting' field is not closed! Chyba formátu: 'Grafický objekt' Položka není uzavřena! - + Wrong document version: Špatná verze dokumentu: @@ -9700,7 +9711,7 @@ Neznámá položka! - + Cannot open Verilog-A file "%1"! @@ -9721,7 +9732,7 @@ Neznámá položka! - + Cannot save document! Dokument nelze uložit! @@ -9734,7 +9745,7 @@ Wrong property field limiter! Chybný oddělovač parametru! - + Format Error: Unknown property: Chyba formátu: @@ -9850,14 +9861,14 @@ Chybný formát řádku v 'grafických objektů'! - + File Format Error: Unknown field! Chyba formátu souboru: Neznámá položka! - + ERROR: Component "%1" has no analog model. CHYBA: Komponenta "%1" neobsahuje žádný analogový model. @@ -9877,7 +9888,7 @@ Neznámá položka! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9887,12 +9898,12 @@ Neznámá položka! UPOZORNĚNÍ: Simulační komponenta v podobvodu "%1" bude ignorována. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. CHYBA: Je povolena pouze jedna digitální simulace. @@ -10116,7 +10127,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10165,7 +10176,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10175,8 +10186,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10587,12 +10598,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10623,12 +10634,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10640,17 +10651,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10685,7 +10696,7 @@ seven line XSPICE specification. - + core @@ -10696,7 +10707,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10708,7 +10719,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10736,7 +10747,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10772,7 +10783,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11044,7 +11055,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11071,7 +11082,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11311,6 +11322,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11368,29 +11395,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11465,7 +11492,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11499,7 +11526,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 : {2014, 2015 ?} - + Filter topology @@ -11535,12 +11562,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11550,12 +11577,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11630,12 +11657,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schéma - + Data Display Datová vizualizace @@ -11646,42 +11674,42 @@ Active Filter synthesis program - + VHDL Sources VHDL zdroje - - + + Verilog Sources Verilog data - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Všechny soubory - + The schematic search path has been refreshed. @@ -11696,7 +11724,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11706,7 +11734,7 @@ Active Filter synthesis program - + Open example… @@ -11721,14 +11749,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11738,23 +11766,23 @@ Active Filter synthesis program Schémata - + New Nový - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11767,7 +11795,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11777,7 +11805,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11812,13 +11840,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo obsah aktuálního projektu - + Search Components - + Clear @@ -11849,8 +11877,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11861,12 +11890,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11874,7 +11903,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11892,43 +11921,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Chyba - + Cannot open "%1". Soubor "%1" nelze otevřít. - + Library is corrupt. Soubor s knihovnou je poškozen. - + - - - + + + - + Info Informace - + Default icon not found: %1.png - + -port -port @@ -11939,14 +11968,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Dokument obsahuje neuložené změny! - + Do you want to save the changes before copying? @@ -11986,17 +12015,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Otevřený soubor nemůže být smazán! - - + + - - + + Warning Upozornění - + This will delete the file permanently! Continue ? Soubor bude nenávratně smazán! Pokračovat ? @@ -12059,12 +12088,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Pracovní adresář nelze vytvořit ! - + Cannot create project directory ! Adresář s projektem nelze vytvořit ! @@ -12092,41 +12121,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12205,34 +12234,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Vytvořit nové schéma... - - + + - + - + - + Ready. Hotovo. - + Creating new text editor... Vytvoření nového textového editoru... - + Opening file... Otevřít soubor... @@ -12254,12 +12283,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Ukládání přerušeno - + Qucs Netlist @@ -12274,12 +12303,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Vložit jméno dokumentu @@ -12339,7 +12369,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Zrušit - + untitled nepojmenováno @@ -12379,22 +12409,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12418,7 +12454,7 @@ Use subcircuit to crete Verilog-A module! Chcete program skutečně ukončit? - + The document was modified by another program ! Dokument byl modifikován jiným programem ! @@ -12518,7 +12554,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12598,7 +12641,7 @@ Přepsat ? Soubor "%1" nelze uložit ! - + Please open project with subcircuits! Je nutné otevřít projekt s podobvody! @@ -12665,7 +12708,7 @@ Have you saved the Verilog-A symbols? - + &New &Nový @@ -13503,7 +13546,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13543,7 +13617,7 @@ Install Content of a Package Instalovat obsah balíčku - + Convert data file @@ -13889,7 +13963,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13928,7 +14002,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13945,7 +14019,7 @@ Rotates the selected component by 90° counter-clockwise Otočí vybrané komponenty o 90° doleva - + Mirror about X Axis Ozrcadlit podle x-ové osy @@ -14358,12 +14432,12 @@ Spustit podprogram pro výpočet atenuátoru - + Simulate Simulovat - + Simulates the current schematic Simuluje aktuální obvod @@ -14416,17 +14490,12 @@ Vypočítá pracovní DC bod a zobrazí ho - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Nastavit označení na diagramu @@ -14445,7 +14514,7 @@ Sets a marker on a diagram's graph Nastaví označení na jednom grafu v diagramu - + Show Last Messages Zobrazit poslední hlášky @@ -14675,12 +14744,12 @@ O aplikačním prostředí QT od firmy Trolltech &Simulace - + &View &Náhled - + &Help &Nápověda @@ -14789,7 +14858,7 @@ Open - + Input Vstup @@ -15448,7 +15517,7 @@ Aktivuje/deaktivuje výpis obsahu QucsSettingsDialog - + Edit Qucs Properties Upravit vlastnosti programu Qucs @@ -15457,7 +15526,7 @@ Aktivuje/deaktivuje výpis obsahu Typ písma (aktivováno až po restartu): - + Large font size: @@ -15467,117 +15536,117 @@ Aktivuje/deaktivuje výpis obsahu Barva pozadí schématu: - + Language (set after reload): Jazyk (bude nastaveno po restartu): - + system language Jazyk systému - + English Angličtina - + German Němčina - + French Francouzština - + Spanish Španělština - + Italian Italština - + Polish Polština - + Romanian Rumunština - + Japanese Japonština - + Swedish Švédština - + Hungarian Maďarština - + Hebrew Hebrejština - + Portuguese-BR - + Portuguese-PT - + Turkish Turečtina - + Ukrainian Ukrajinština - + Russian Ruština - + Czech Česky - + Catalan Katalánsky - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15587,12 +15656,12 @@ Aktivuje/deaktivuje výpis obsahu - + Kazakh - + Maximum undo operations: @@ -15622,7 +15691,7 @@ Aktivuje/deaktivuje výpis obsahu - + Draw diagrams with anti-aliasing feature: @@ -15637,17 +15706,17 @@ Aktivuje/deaktivuje výpis obsahu - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15661,6 +15730,26 @@ Aktivuje/deaktivuje výpis obsahu Settings Nastavení + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15824,7 +15913,7 @@ soubory automaticky otevírat s odpovídajícími programy. Přednastavení - + Error Chyba @@ -15834,7 +15923,7 @@ soubory automaticky otevírat s odpovídajícími programy. Tato koncovka je již registrovaná! - + Select the home directory @@ -16434,7 +16523,7 @@ soubory automaticky otevírat s odpovídajícími programy. Qucs_S_SPAR_Viewer - + &File &Soubor @@ -16459,7 +16548,7 @@ soubory automaticky otevírat s odpovídajícími programy. - + &Help &Nápověda @@ -16475,7 +16564,7 @@ soubory automaticky otevírat s odpovídajícími programy. - + Qucs-S S-parameter Help @@ -16508,24 +16597,24 @@ Copyright (C) 2024 by - - + + Warning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16549,7 +16638,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16600,7 +16689,7 @@ Copyright (C) 2024 by Schematic - + Title Název @@ -16620,7 +16709,7 @@ Copyright (C) 2024 by Verze: - + Edit Schematic @@ -16656,12 +16745,12 @@ Edits the symbol for this schematic Upraví symbol v tomto schématu - + generic - + Error Chyba @@ -16679,7 +16768,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16922,7 +17011,7 @@ Set the admsXml location on the application settings. vytváření netlistu... - + Error Chyba @@ -16934,7 +17023,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16960,13 +17049,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16977,7 +17066,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17043,12 +17132,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17063,40 +17152,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17106,7 +17205,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17116,7 +17215,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17149,7 +17248,24 @@ Set the admsXml location on the application settings. Soubor: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic Zobrazit jméno souboru ve schématu @@ -17204,7 +17320,7 @@ Set the admsXml location on the application settings. Zrušit - + Select a file Vybrat soubor @@ -17274,50 +17390,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Otevřít - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK - + Apply - + Cancel - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17345,24 +17474,24 @@ No SUBCKT directive found in library - + Error Chyba - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17387,7 +17516,8 @@ No SUBCKT directive found in library - + + Warning @@ -17621,7 +17751,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17796,10 +17926,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Chyba + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_de.ts b/translations/qucs_de.ts index 3a8f3a79f..b6878bd16 100644 --- a/translations/qucs_de.ts +++ b/translations/qucs_de.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Komponenteneigenschaften bearbeiten - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Durchlauf - - - - - - - - - display in schematic - im Schaltplan anzeigen + im Schaltplan anzeigen - Simulation: - Simulation: + Simulation: - Sweep Parameter: - Durchlaufparameter: + Durchlaufparameter: - Type: - Typ: + Typ: - linear - linear + linear - logarithmic - logarithmisch + logarithmisch - list - Liste + Liste - constant - Konstante + Konstante - Values: - Werte: + Werte: - Start: - Start: + Start: - Stop: - Ende: + Ende: - - - Step: - Schrittweite: + Schrittweite: - Number: - Anzahl: + Anzahl: - - + + Properties Eigenschaften - Name: - Name: + Name: - + + Name Name - - Value - Wert + + Simulation + Simulation - display - Anzeige + Sweep Parameter + - Description - Beschreibung + Type + Typ - - Edit - Bearbeiten + + Values + - - Browse - Durchsuchen + + Start + - - Add - Hinzufügen + + Stop + - - Remove - Löschen + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Wert + + + + Show - + display + Anzeige + + + + Description + Beschreibung + + + Edit + Bearbeiten + + + Browse + Durchsuchen + + + Add + Hinzufügen + + + Remove + Löschen + + OK - OK + OK - Apply - Übernehmen + Übernehmen - Cancel - Abbrechen + Abbrechen - - - - - - - - - yes - ja + ja - - - - - no - nein + nein - + Select a file Datei auswählen @@ -769,66 +774,65 @@ Verilog Dateien - Points per decade: - Punkte pro Dekade: + Punkte pro Dekade: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic im Schaltplan anzeigen - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Übernehmen - + Cancel Abbrechen - + OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Diagrammeigenschaften bearbeiten @@ -1363,38 +1367,38 @@ ExternSimDialog - + Stop - - + + Save netlist - + Exit Verlassen - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1404,12 +1408,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1420,17 +1424,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2268,12 +2272,12 @@ Node name will not be changed. - + Library Name: Bibliotheksname: - + Choose subcircuits: Wähle Unterschaltkreise aus: @@ -2283,7 +2287,12 @@ Node name will not be changed. Füge Teilschaltsbeschreibung hinzu - + + Analog models only + + + + Select All Alle auswählen @@ -2425,7 +2434,7 @@ Node name will not be changed. - + Creating Verilog netlist. Erstelle Verilog Netzliste. @@ -2437,7 +2446,7 @@ Node name will not be changed. Erstelle VHDL Netzliste. - + Error creating library. Fehler beim Erstellen der Bibliothek. @@ -3020,7 +3029,7 @@ Resistor color code computation program Ngspice - + Problem with SaveNetlist @@ -3765,6 +3774,7 @@ Resistor color code computation program + delay time (SPICE only) @@ -3779,7 +3789,7 @@ Resistor color code computation program AM modulierte Quelle - + ideal ac current source ideale AC Stromquelle @@ -3788,14 +3798,19 @@ Resistor color code computation program peak current in Ampere Spitzenwert des Stroms in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) Dämpfungsfaktor (nur für Transientensimulation) - + ac Current Source AC Stromquelle @@ -3810,7 +3825,7 @@ Resistor color code computation program Strom in Ampere - + dc Current Source DC Stromquelle @@ -4089,7 +4104,7 @@ Resistor color code computation program - + transfer function scaling factor @@ -4106,7 +4121,7 @@ Resistor color code computation program - + npn transistor npn Transistor @@ -4669,20 +4684,20 @@ Resistor color code computation program Spannung des High-Pegels - + - + - + - + @@ -4697,16 +4712,16 @@ Resistor color code computation program - - + + - + - + Error Fehler @@ -5259,7 +5274,7 @@ Falsches 'component' Zeilenformat! Skalierungsfaktor der Diode - + Diode Diode @@ -6154,6 +6169,7 @@ Falsches 'component' Zeilenformat! + put result into dataset Ergebnis in den Datensatz ausgeben @@ -6440,7 +6456,7 @@ Falsches 'component' Zeilenformat! - + Inductor Spule @@ -6531,7 +6547,7 @@ Falsches 'component' Zeilenformat! - + Rectangle Current Rechteckstromquelle @@ -6632,7 +6648,7 @@ Falsches 'component' Zeilenformat! Flächenfaktor für den JFET - + n-JFET n-JFET @@ -7292,7 +7308,7 @@ Falsches 'component' Zeilenformat! MOS Feldeffekttransistor - + n-MOSFET n-MOSFET @@ -7310,7 +7326,7 @@ Falsches 'component' Zeilenformat! MOSFET (Verarmungstyp) - + zero-bias threshold voltage Null-Schwellenspannung @@ -7501,8 +7517,8 @@ Falsches 'component' Zeilenformat! - - + + Use global SPICE temperature @@ -8276,7 +8292,7 @@ Falsches 'component' Zeilenformat! - + carrier signal frequency @@ -8491,7 +8507,7 @@ Falsches 'component' Zeilenformat! - + Resistor Widerstand @@ -8631,7 +8647,7 @@ Falsches 'component' Zeilenformat! - (available) ac power in Watts + (available) ac power in dBm @@ -8720,7 +8736,7 @@ Falsches 'component' Zeilenformat! SPICE Netzlistendatei - + SPICE netlist SPICE Netzliste @@ -8735,7 +8751,7 @@ Falsches 'component' Zeilenformat! spice - + ERROR: No file name in SPICE component "%1". FEHLER: In der SPICE-Komponente "%1" ist kein Dateiname angegeben. @@ -8756,7 +8772,7 @@ Falsches 'component' Zeilenformat! - + Info Information @@ -8817,12 +8833,7 @@ Falsches 'component' Zeilenformat! Art des Anschlusses (nur für digitale Simulation) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Schaltkreis-Anschluss @@ -8890,7 +8901,7 @@ Falsches 'component' Zeilenformat! - + simulation temperature in degree Celsius (Qucsator only) @@ -9340,7 +9351,7 @@ Falsches 'component' Zeilenformat! ideale DC Spannungsquelle - + dc Voltage Source DC Spannungsquelle @@ -9385,7 +9396,7 @@ Falsches 'component' Zeilenformat! Spannung während des Pulses - + Voltage Pulse Spannungspulsquelle @@ -9405,7 +9416,7 @@ Falsches 'component' Zeilenformat! - + Rectangle Voltage Rechteckspannungsquelle @@ -9499,7 +9510,7 @@ Falsches 'component' Zeilenformat! Logiktabelle - + ERROR: Cannot open file "%1". @@ -9541,13 +9552,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9566,7 +9577,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9665,16 +9676,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9686,7 +9697,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties @@ -9696,7 +9707,7 @@ Use PNG, JPEG or SVG graphics! - + power matching @@ -9768,7 +9779,7 @@ Setzte Octave Pfad in Einstellungen. Text - + Rectangle Rechteck @@ -9778,7 +9789,7 @@ Setzte Octave Pfad in Einstellungen. gefülltes Rechteck - + Edit Rectangle Properties Rechteckeigenschaften bearbeiten @@ -9797,15 +9808,15 @@ Setzte Octave Pfad in Einstellungen. unbenannt - - + + Format Error: 'Painting' field is not closed! Formatierfehler: 'Painting' Feld ist nicht geschlossen! - + Wrong document version: Falsche Dokumentenversion: @@ -9823,7 +9834,7 @@ Unbekanntes Feld! - + Cannot open Verilog-A file "%1"! @@ -9844,7 +9855,7 @@ Unbekanntes Feld! Kann JSON Symbole Datei nicht speichern! - + Cannot save document! Dokument kann nicht gespeichert werden! @@ -9857,7 +9868,7 @@ Wrong property field limiter! Falscher Eigenschaftsfeldtrenner! - + Format Error: Unknown property: Formatierfehler: @@ -9973,14 +9984,14 @@ Falsches 'painting' Zeilenformat! - + File Format Error: Unknown field! Dateiformatfehler: Unbekanntes Feld! - + ERROR: Component "%1" has no analog model. FEHLER: Die Komponente "%1" besitzt kein analoges Modell. @@ -10000,7 +10011,7 @@ Unbekanntes Feld! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -10010,12 +10021,12 @@ Unbekanntes Feld! WARNUNG: Die Simulationskomponente in der Unterschaltung "%1" wird ignoriert. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. FEHLER: Es ist nur eine Digitalsimulation erlaubt. @@ -10243,7 +10254,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10292,7 +10303,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10302,8 +10313,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10714,12 +10725,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10750,12 +10761,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10767,17 +10778,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10812,7 +10823,7 @@ seven line XSPICE specification. - + core @@ -10823,7 +10834,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10835,7 +10846,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10863,7 +10874,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10899,7 +10910,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11171,7 +11182,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11198,7 +11209,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11438,9 +11449,25 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter &File @@ -11495,29 +11522,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11592,7 +11619,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11626,7 +11653,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11662,12 +11689,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11677,12 +11704,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11757,12 +11784,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schaltkreise - + Data Display Datenanzeige @@ -11773,42 +11801,42 @@ Active Filter synthesis program - + VHDL Sources VHDL Quellen - - + + Verilog Sources Verilog Quellen - - + + Verilog-A Sources Verilog-A Quellen - - + + Octave Scripts Octave Scripte - + Spice Files Spice Dateien - + Any File Alle Dateien - + The schematic search path has been refreshed. @@ -11823,7 +11851,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11833,7 +11861,7 @@ Active Filter synthesis program - + Open example… @@ -11848,14 +11876,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11865,23 +11893,23 @@ Active Filter synthesis program Schaltkreise - + New Neu - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11894,7 +11922,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11904,7 +11932,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11939,13 +11967,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo inhalt des aktuellen Projekts - + Search Components - + Clear @@ -11980,8 +12008,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11992,12 +12021,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -12005,7 +12034,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -12023,43 +12052,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Fehler - + Cannot open "%1". Kann "%1" nicht öffnen. - + Library is corrupt. Die Bibliotheksdatei ist beschädigt. - + - - - + + + - + Info Information - + Default icon not found: %1.png Standardicon nicht gefunden: %1.png - + -port @@ -12070,13 +12099,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! - + Do you want to save the changes before copying? Änderungen vor dem Kopieren speichern? @@ -12120,17 +12149,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Kann keine geöffneten Daten löschen! - - + + - - + + Warning Warnung - + This will delete the file permanently! Continue ? Dies löscht die Datein endgültig! Weiter? @@ -12193,12 +12222,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Konfiguration - + Cannot create work directory ! Konnte kein Arbeitsverzeichnis erstellen! - + Cannot create project directory ! Konnte kein Projektverzeichnis erstellen! @@ -12226,41 +12255,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12339,34 +12368,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Erstelle neuen Schaltkreis... - - + + - + - + - + Ready. Bereit. - + Creating new text editor... Erstelle neuen Text Editor... - + Opening file... Datei öffnen... @@ -12388,12 +12417,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Speichern abgebrochen - + Qucs Netlist Qucs Netzliste @@ -12408,12 +12437,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Einfacher Text - + + Subcircuit symbol - + Enter a Document Name Dokumentnamen eingeben @@ -12472,7 +12502,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Verwerfen - + untitled unbenannt @@ -12512,22 +12542,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12547,7 +12583,7 @@ Use subcircuit to crete Verilog-A module! Beenden... - + The document was modified by another program ! @@ -12641,7 +12677,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12721,7 +12764,7 @@ Overwrite ? Kann "%1" nicht schreiben! - + Please open project with subcircuits! Projekt bitte mit Teilschaltungen öffnen! @@ -12791,7 +12834,7 @@ Wurden die Verilog-A Symbole gespeichert? - + &New &Neu @@ -13553,12 +13596,43 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qt - + Convert data file @@ -13886,7 +13960,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13925,12 +13999,12 @@ Resets the limits for all axis to auto. - + Simulators Settings... - + Mirror about X Axis @@ -14295,12 +14369,12 @@ Starts attenuator calculation program - + Simulate - + Simulates the current schematic @@ -14341,17 +14415,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph @@ -14368,7 +14437,7 @@ Sets a marker on a diagram's graph - + Show Last Messages @@ -14553,12 +14622,12 @@ About Qt by Trolltech - + &View - + &Help &Hilfe @@ -14667,7 +14736,7 @@ Open - + Input @@ -15201,12 +15270,12 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties - + Large font size: @@ -15216,117 +15285,117 @@ Filter synthesis program - + Language (set after reload): - + system language - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15336,12 +15405,12 @@ Filter synthesis program - + Kazakh - + Maximum undo operations: @@ -15371,7 +15440,7 @@ Filter synthesis program - + Draw diagrams with anti-aliasing feature: @@ -15386,17 +15455,17 @@ Filter synthesis program - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15410,6 +15479,26 @@ Filter synthesis program Settings + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15572,7 +15661,7 @@ open files with an appropriate program. - + Error Fehler @@ -15582,7 +15671,7 @@ open files with an appropriate program. - + Select the home directory @@ -16177,7 +16266,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Datei @@ -16202,7 +16291,7 @@ open files with an appropriate program. - + &Help &Hilfe @@ -16218,7 +16307,7 @@ open files with an appropriate program. Über Qt... - + Qucs-S S-parameter Help @@ -16251,24 +16340,24 @@ Copyright (C) 2024 by - - + + Warning Warnung - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16292,7 +16381,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16343,7 +16432,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -16363,7 +16452,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -16397,12 +16486,12 @@ Edits the symbol for this schematic - + generic - + Error Fehler @@ -16420,7 +16509,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16663,7 +16752,7 @@ Set the admsXml location on the application settings. - + Error Fehler @@ -16675,7 +16764,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16701,13 +16790,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16718,7 +16807,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16783,12 +16872,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16803,40 +16892,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Abbrechen - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16846,7 +16945,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -16856,7 +16955,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -16889,7 +16988,24 @@ Set the admsXml location on the application settings. - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic @@ -16944,7 +17060,7 @@ Set the admsXml location on the application settings. Abbrechen - + Select a file Datei auswählen @@ -17014,50 +17130,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Öffnen - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK - + Apply Übernehmen - + Cancel Abbrechen - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17085,24 +17214,24 @@ No SUBCKT directive found in library - + Error Fehler - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17127,7 +17256,8 @@ No SUBCKT directive found in library - + + Warning Warnung @@ -17359,7 +17489,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17534,10 +17664,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Fehler + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_en.ts b/translations/qucs_en.ts index e6966ab58..818d7de11 100644 --- a/translations/qucs_en.ts +++ b/translations/qucs_en.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate @@ -545,195 +550,99 @@ ComponentDialog - + Edit Component Properties - - Sweep + + Equation Editor - - - - - - - - - - display in schematic + + Put result in dataset - - Simulation: + + Sweep - - Sweep Parameter: + + + Properties - - Type: + + + Name - - linear + + Simulation - logarithmic + Sweep Parameter - list + Type - constant - - - - - Values: - - - - - Start: - - - - - Stop: - - - - - - - Step: - - - - - Number: - - - - - - Properties - - - - - Name: - - - - - Name + Values - Value + Start - display + Stop - Description - - - - - Edit - - - - - Browse - - - - - Add - - - - - Remove - - - - - Move Up - - - - - Move Down - - - - - Fill from SPICE .MODEL + Step - - OK + + Number - - Apply + + Populate parameters from SPICE file... - - Cancel + + Value - - - - - - - - - - yes + + Show - - - - - - no + + Description - + Select a file @@ -767,67 +676,62 @@ Verilog files - - - Points per decade: - - CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply - + Cancel - + OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +739,7 @@ DiagramDialog - + Edit Diagram Properties @@ -1342,38 +1246,38 @@ ExternSimDialog - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1383,12 +1287,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1399,17 +1303,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2090,12 +1994,12 @@ Node name will not be changed. - + Library Name: - + Choose subcircuits: @@ -2105,7 +2009,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All @@ -2239,7 +2148,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2251,7 +2160,7 @@ Node name will not be changed. - + Error creating library. @@ -2712,7 +2621,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3294,6 +3203,7 @@ but is %1 ! + delay time (SPICE only) @@ -3308,7 +3218,7 @@ but is %1 ! - + ideal ac current source @@ -3317,14 +3227,19 @@ but is %1 ! peak current in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) - + ac Current Source @@ -3339,7 +3254,7 @@ but is %1 ! - + dc Current Source @@ -3618,7 +3533,7 @@ but is %1 ! - + transfer function scaling factor @@ -3635,7 +3550,7 @@ but is %1 ! - + npn transistor @@ -4198,20 +4113,20 @@ but is %1 ! - + - + - + - + @@ -4226,16 +4141,16 @@ but is %1 ! - - + + - + - + Error @@ -4782,7 +4697,7 @@ Wrong 'component' line format! - + Diode @@ -5677,6 +5592,7 @@ Wrong 'component' line format! + put result into dataset @@ -5963,7 +5879,7 @@ Wrong 'component' line format! - + Inductor @@ -6054,7 +5970,7 @@ Wrong 'component' line format! - + Rectangle Current @@ -6155,7 +6071,7 @@ Wrong 'component' line format! - + n-JFET @@ -6811,7 +6727,7 @@ Wrong 'component' line format! - + n-MOSFET @@ -6829,7 +6745,7 @@ Wrong 'component' line format! - + zero-bias threshold voltage @@ -7020,8 +6936,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -7795,7 +7711,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8010,7 +7926,7 @@ Wrong 'component' line format! - + Resistor @@ -8150,7 +8066,7 @@ Wrong 'component' line format! - (available) ac power in Watts + (available) ac power in dBm @@ -8239,7 +8155,7 @@ Wrong 'component' line format! - + SPICE netlist @@ -8254,7 +8170,7 @@ Wrong 'component' line format! - + ERROR: No file name in SPICE component "%1". @@ -8275,7 +8191,7 @@ Wrong 'component' line format! - + Info @@ -8336,12 +8252,7 @@ Wrong 'component' line format! - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port @@ -8409,7 +8320,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -8859,7 +8770,7 @@ Wrong 'component' line format! - + dc Voltage Source @@ -8904,7 +8815,7 @@ Wrong 'component' line format! - + Voltage Pulse @@ -8924,7 +8835,7 @@ Wrong 'component' line format! - + Rectangle Voltage @@ -9018,7 +8929,7 @@ Wrong 'component' line format! - + ERROR: Cannot open file "%1". @@ -9059,13 +8970,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9084,7 +8995,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9183,16 +9094,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9204,7 +9115,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties @@ -9214,7 +9125,7 @@ Use PNG, JPEG or SVG graphics! - + power matching @@ -9279,7 +9190,7 @@ Use PNG, JPEG or SVG graphics! - + Rectangle @@ -9289,7 +9200,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Rectangle Properties @@ -9304,14 +9215,14 @@ Use PNG, JPEG or SVG graphics! - - + + Format Error: 'Painting' field is not closed! - + Wrong document version: @@ -9328,7 +9239,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9349,7 +9260,7 @@ Unknown field! - + Cannot save document! @@ -9361,7 +9272,7 @@ Wrong property field limiter! - + Format Error: Unknown property: @@ -9465,13 +9376,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! - + ERROR: Component "%1" has no analog model. @@ -9491,7 +9402,7 @@ Unknown field! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9501,12 +9412,12 @@ Unknown field! - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. @@ -9664,7 +9575,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -9713,7 +9624,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -9723,8 +9634,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10135,12 +10046,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10171,12 +10082,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10188,17 +10099,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10233,7 +10144,7 @@ seven line XSPICE specification. - + core @@ -10244,7 +10155,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10256,7 +10167,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10284,7 +10195,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10320,7 +10231,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10592,7 +10503,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -10619,7 +10530,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -10859,6 +10770,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -10916,29 +10843,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11013,7 +10940,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11047,7 +10974,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11083,12 +11010,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11098,12 +11025,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11178,12 +11105,13 @@ Active Filter synthesis program QucsApp - + + Schematic - + Data Display @@ -11194,42 +11122,42 @@ Active Filter synthesis program - + VHDL Sources - - + + Verilog Sources - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File - + The schematic search path has been refreshed. @@ -11244,7 +11172,7 @@ Active Filter synthesis program - + Open file @@ -11254,14 +11182,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11271,23 +11199,23 @@ Active Filter synthesis program - + New - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11300,7 +11228,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11310,7 +11238,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11345,13 +11273,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Search Components - + Clear @@ -11382,8 +11310,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11394,12 +11323,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11407,7 +11336,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11425,43 +11354,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot open "%1". - + Library is corrupt. - + - - - + + + - + Info - + Default icon not found: %1.png - + -port @@ -11472,13 +11401,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! - + Do you want to save the changes before copying? @@ -11518,17 +11447,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - - + + Warning - + This will delete the file permanently! Continue ? @@ -11583,12 +11512,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! - + Cannot create project directory ! @@ -11608,41 +11537,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -11713,34 +11642,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + - + - + Ready. - + Creating new text editor... - + Opening file... @@ -11762,12 +11691,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted - + Qucs Netlist @@ -11782,12 +11711,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name @@ -11838,7 +11768,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + untitled @@ -11878,22 +11808,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -11909,12 +11845,12 @@ Use subcircuit to crete Verilog-A module! - + The document was modified by another program ! - + Open example… @@ -11929,7 +11865,7 @@ Use subcircuit to crete Verilog-A module! - + Do you want to reload or keep this version ? @@ -12016,7 +11952,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12095,7 +12038,7 @@ Overwrite ? - + Please open project with subcircuits! @@ -12158,7 +12101,7 @@ Have you saved the Verilog-A symbols? - + &New @@ -12920,12 +12863,43 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qt - + Convert data file @@ -13253,7 +13227,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13292,12 +13266,12 @@ Resets the limits for all axis to auto. - + Simulators Settings... - + Mirror about X Axis @@ -13662,12 +13636,12 @@ Starts attenuator calculation program - + Simulate - + Simulates the current schematic @@ -13708,17 +13682,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph @@ -13735,7 +13704,7 @@ Sets a marker on a diagram's graph - + Show Last Messages @@ -13916,12 +13885,12 @@ About Qt by Trolltech - + &View - + &Help @@ -14030,7 +13999,7 @@ Open - + Input @@ -14427,12 +14396,12 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties - + Large font size: @@ -14442,117 +14411,117 @@ Filter synthesis program - + Language (set after reload): - + system language - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -14562,12 +14531,12 @@ Filter synthesis program - + Kazakh - + Maximum undo operations: @@ -14597,7 +14566,7 @@ Filter synthesis program - + Draw diagrams with anti-aliasing feature: @@ -14612,17 +14581,17 @@ Filter synthesis program - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -14636,6 +14605,26 @@ Filter synthesis program Settings + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -14798,7 +14787,7 @@ open files with an appropriate program. - + Error @@ -14808,7 +14797,7 @@ open files with an appropriate program. - + Select the home directory @@ -15402,7 +15391,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File @@ -15427,7 +15416,7 @@ open files with an appropriate program. - + &Help @@ -15443,7 +15432,7 @@ open files with an appropriate program. - + Qucs-S S-parameter Help @@ -15476,24 +15465,24 @@ Copyright (C) 2024 by - - + + Warning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -15517,7 +15506,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -15568,7 +15557,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -15588,7 +15577,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -15622,12 +15611,12 @@ Edits the symbol for this schematic - + generic - + Error @@ -15645,7 +15634,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -15888,7 +15877,7 @@ Set the admsXml location on the application settings. - + Error @@ -15900,7 +15889,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -15926,13 +15915,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -15943,7 +15932,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16008,12 +15997,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16028,40 +16017,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16071,7 +16070,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -16081,7 +16080,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -16114,7 +16113,24 @@ Set the admsXml location on the application settings. - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic @@ -16169,7 +16185,7 @@ Set the admsXml location on the application settings. - + Select a file @@ -16239,50 +16255,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK - + Apply - + Cancel - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -16310,24 +16339,24 @@ No SUBCKT directive found in library - + Error - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -16352,7 +16381,8 @@ No SUBCKT directive found in library - + + Warning @@ -16584,7 +16614,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -16759,10 +16789,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_es.ts b/translations/qucs_es.ts index c83a3ff36..8af9fdd81 100644 --- a/translations/qucs_es.ts +++ b/translations/qucs_es.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simular @@ -545,195 +550,195 @@ ComponentDialog - + Edit Component Properties Editar las propiedades del componente - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Barrido - - - - - - - - - display in schematic - mostrar en el esquema + mostrar en el esquema - Simulation: - Simulación: + Simulación: - Sweep Parameter: - Parámetro de Barrido: + Parámetro de Barrido: - Type: - Tipo: + Tipo: - linear - lineal + lineal - logarithmic - logarítmico + logarítmico - list - lista + lista - constant - constante + constante - Values: - Valores: + Valores: - Start: - Inicio: + Inicio: - Stop: - Parada: + Parada: - - - Step: - Paso: + Paso: - Number: - Número: + Número: - - + + Properties Propiedades - Name: - Nombre: + Nombre: - + + Name Nombre - - Value - Valor + + Simulation + Simulación - display - mostrar + Sweep Parameter + - Description - Descripción + Type + Tipo - - Edit - Editar + + Values + - - Browse - Examinar + + Start + - - Add - Añadir + + Stop + - - Remove - Borrar + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Valor + + + + Show - + display + mostrar + + + + Description + Descripción + + + Edit + Editar + + + Browse + Examinar + + + Add + Añadir + + + Remove + Borrar + + OK - Aceptar + Aceptar - Apply - Aplicar + Aplicar - Cancel - Cancelar + Cancelar - - - - - - - - - yes - Sí + Sí - - - - - no - no + no - + Select a file Seleccionar un archivo @@ -768,66 +773,65 @@ Archivos Verilog - Points per decade: - Puntos por década: + Puntos por década: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic mostrar en el esquema - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Aplicar - + Cancel Cancelar - + OK Aceptar - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +839,7 @@ DiagramDialog - + Edit Diagram Properties Editar las propiedades del diagrama @@ -1366,38 +1370,38 @@ Simular - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1407,12 +1411,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1423,17 +1427,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2184,12 +2188,12 @@ Node name will not be changed. - + Library Name: Nombre de la Biblioteca: - + Choose subcircuits: Elija subcircuitos: @@ -2199,7 +2203,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Seleccionar todo @@ -2341,7 +2350,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2353,7 +2362,7 @@ Node name will not be changed. - + Error creating library. @@ -2918,7 +2927,7 @@ pero es %1! Ngspice - + Problem with SaveNetlist @@ -3660,6 +3669,7 @@ pero es %1! + delay time (SPICE only) @@ -3674,7 +3684,7 @@ pero es %1! Fuente modulada AM - + ideal ac current source fuente de intensidad ac ideal @@ -3683,14 +3693,19 @@ pero es %1! peak current in Ampere corriente de pico en Amperios + + + offset current (SPICE only) + + - + damping factor (transient simulation only) Factor de damping (sólo para simulación de transitorio) - + ac Current Source Fuente de intensidad ac @@ -3705,7 +3720,7 @@ pero es %1! intensidad en Amperios - + dc Current Source Fuente de intensidad dc @@ -3984,7 +3999,7 @@ pero es %1! - + transfer function scaling factor @@ -4001,7 +4016,7 @@ pero es %1! - + npn transistor transitor npn @@ -4564,20 +4579,20 @@ pero es %1! tensión de alto nivel - + - + - + - + @@ -4592,16 +4607,16 @@ pero es %1! - - + + - + - + Error Error @@ -5154,7 +5169,7 @@ Wrong 'component' line format! area predeterminada para el diodo - + Diode Diodo @@ -6053,6 +6068,7 @@ Wrong 'component' line format! + put result into dataset poner los resultados en el conjunto de datos @@ -6339,7 +6355,7 @@ Wrong 'component' line format! - + Inductor Bobina @@ -6430,7 +6446,7 @@ Wrong 'component' line format! Retardo inicial - + Rectangle Current Corriente Cuadrada @@ -6531,7 +6547,7 @@ Wrong 'component' line format! area predeterminada para JFET - + n-JFET JFET-n @@ -7195,7 +7211,7 @@ Wrong 'component' line format! transistor de efecto de campo MOS - + n-MOSFET MOSFET-n @@ -7213,7 +7229,7 @@ Wrong 'component' line format! - + zero-bias threshold voltage tensión umbral de polarización @@ -7404,8 +7420,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8179,7 +8195,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8394,7 +8410,7 @@ Wrong 'component' line format! - + Resistor Resistencia @@ -8534,8 +8550,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (disponible) Potencia AC en Watios + (disponible) Potencia AC en Watios @@ -8623,7 +8643,7 @@ Wrong 'component' line format! archivo netlist SPICE - + SPICE netlist netlist SPICE @@ -8638,7 +8658,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". ERROR: Sin nombre de archivo en el componente SPICE "%1". @@ -8659,7 +8679,7 @@ Wrong 'component' line format! ERROR: No se pudo abrir el archivo SPICE convertido "%1". - + Info Información @@ -8720,12 +8740,7 @@ Wrong 'component' line format! tipo de conexión (sólo para simulación digital) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Conexión de Subcircuito @@ -8793,7 +8808,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9243,7 +9258,7 @@ Wrong 'component' line format! fuente de tensión dc ideal - + dc Voltage Source Fuente de Tensión dc @@ -9288,7 +9303,7 @@ Wrong 'component' line format! tensión del pulso - + Voltage Pulse Pulso de Tensión @@ -9308,7 +9323,7 @@ Wrong 'component' line format! - + Rectangle Voltage Tensión Cuadrada @@ -9402,7 +9417,7 @@ Wrong 'component' line format! Tabla de Verdad - + ERROR: Cannot open file "%1". ERROR: No se pudo abrir el archivo "%1". @@ -9447,13 +9462,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9472,7 +9487,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9571,16 +9586,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9592,7 +9607,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Editar Propiedades @@ -9602,7 +9617,7 @@ Use PNG, JPEG or SVG graphics! - + power matching adaptación de potencia @@ -9667,7 +9682,7 @@ Use PNG, JPEG or SVG graphics! Texto - + Rectangle Rectángulo @@ -9677,7 +9692,7 @@ Use PNG, JPEG or SVG graphics! Rectángulo relleno - + Edit Rectangle Properties Editar las propiedades del Rectángulo @@ -9696,15 +9711,15 @@ Use PNG, JPEG or SVG graphics! sinTítulo - - + + Format Error: 'Painting' field is not closed! Error de Formato: ¡El campo 'Painting' no está cerrado! - + Wrong document version: Versión equivocada del documento: @@ -9722,7 +9737,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9743,7 +9758,7 @@ Unknown field! - + Cannot save document! ¡No puedo guardar el documento! @@ -9756,7 +9771,7 @@ Wrong property field limiter! ¡limitador de campo con propiedad equivocada! - + Format Error: Unknown property: Error de Formato: @@ -9872,13 +9887,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! Error de formato de archivo: ¡Campo desconocido! - + ERROR: Component "%1" has no analog model. ERROR: El componente "%1" no tiene modelo analógico. @@ -9898,7 +9913,7 @@ Unknown field! AVISO: Saltando el componente de la biblioteca "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9908,12 +9923,12 @@ Unknown field! AVISO: Ignora simulación de componente en el subcircuito "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ERROR: Sólo está permitida una simulación digital. @@ -10136,7 +10151,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10185,7 +10200,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10195,8 +10210,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10607,12 +10622,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10643,12 +10658,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10660,17 +10675,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10705,7 +10720,7 @@ seven line XSPICE specification. - + core @@ -10716,7 +10731,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10728,7 +10743,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10756,7 +10771,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10792,7 +10807,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11064,7 +11079,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11091,7 +11106,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11331,6 +11346,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11388,29 +11419,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11485,7 +11516,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11519,7 +11550,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 por {2014, 2015 ?} - + Filter topology @@ -11555,12 +11586,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11570,12 +11601,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11650,12 +11681,13 @@ Active Filter synthesis program QucsApp - + + Schematic Esquema - + Data Display Vista de datos @@ -11666,42 +11698,42 @@ Active Filter synthesis program - + VHDL Sources Fuentes VHDL - - + + Verilog Sources Fuentes Verilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Cualquier Archivo - + The schematic search path has been refreshed. @@ -11716,7 +11748,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11726,7 +11758,7 @@ Active Filter synthesis program - + Open example… @@ -11741,14 +11773,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11758,23 +11790,23 @@ Active Filter synthesis program Esquemas - + New Nuevo - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11787,7 +11819,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11797,7 +11829,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11832,13 +11864,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo contenido del proyecto actual - + Search Components - + Clear @@ -11869,8 +11901,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11881,12 +11914,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11894,7 +11927,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11912,43 +11945,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Error - + Cannot open "%1". No puedo abrir "%1". - + Library is corrupt. La librería está corrupta. - + - - - + + + - + Info Información - + Default icon not found: %1.png - + -port -conexiones @@ -11959,7 +11992,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! ¡El documento contiene cambios no guardados! @@ -11967,7 +12000,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Do you want to save the changes before copying? @@ -12007,17 +12040,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo ¡No puedo eliminar un archivo abierto! - - + + - - + + Warning Aviso - + This will delete the file permanently! Continue ? ¡Esto eliminará el archivo para siempre! ¿Continuo? @@ -12080,12 +12113,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! ¡No puedo crear el directorio de trabajo! - + Cannot create project directory ! ¡No puedo crear el directorio del proyecto! @@ -12113,41 +12146,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12226,34 +12259,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Creando un nuevo esquema... - - + + - + - + - + Ready. Listo. - + Creating new text editor... Creando un nuevo editor de textos... - + Opening file... Abriendo archivo... @@ -12275,12 +12308,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Guardado interrumpido - + Qucs Netlist @@ -12295,12 +12328,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Escriba un nombre del documento @@ -12360,7 +12394,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Descartar - + untitled sinTítulo @@ -12400,22 +12434,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12439,7 +12479,7 @@ Use subcircuit to crete Verilog-A module! ¿Seguro que desea salir? - + The document was modified by another program ! ¡ Otro programa ha modificado el documento ! @@ -12539,7 +12579,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12619,7 +12666,7 @@ Overwrite ? ¡No puedo escribir "%1"! - + Please open project with subcircuits! ¡Abra un proyecto con subcircuitos! @@ -12686,7 +12733,7 @@ Have you saved the Verilog-A symbols? - + &New &Nuevo @@ -13524,7 +13571,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13566,7 +13644,7 @@ Install Content of a Package Instalar el contenido de un Paquete - + Convert data file @@ -13912,7 +13990,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13951,7 +14029,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13968,7 +14046,7 @@ Rotates the selected component by 90° counter-clockwise Rota el elemento seleccionado 90º en el sentido de las agujas del reloj - + Mirror about X Axis Reflejar sobre el eje x @@ -14381,12 +14459,12 @@ Arranca el programa de cálculo de atenuadores - + Simulate Simular - + Simulates the current schematic Simula el esquema actual @@ -14439,17 +14517,12 @@ Calcula la polaridad DC y la muestra - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Poner Marcas en el gráfico @@ -14468,7 +14541,7 @@ Sets a marker on a diagram's graph Pone marcas de medida en un gráfico o diagrama - + Show Last Messages Mostrar los últimos mensajes @@ -14698,12 +14771,12 @@ Acerca de Qt por Trolltech &Simulación - + &View &Ver - + &Help &Ayuda @@ -14812,7 +14885,7 @@ Open - + Input Entrada @@ -15473,7 +15546,7 @@ Habilita/deshabilita la tabla de contenidos QucsSettingsDialog - + Edit Qucs Properties Editar las propiedades de Qucs @@ -15482,7 +15555,7 @@ Habilita/deshabilita la tabla de contenidos Fuente (se activará al recargar): - + Large font size: @@ -15492,117 +15565,117 @@ Habilita/deshabilita la tabla de contenidos Color de fondo del documento: - + Language (set after reload): Idioma (usado después de recargar): - + system language Idioma del sistema - + English Inglés - + German Alemán - + French Francés - + Spanish Español - + Italian Italiano - + Polish Polaco - + Romanian Rumano - + Japanese Japonés - + Swedish Sueco - + Hungarian Húngaro - + Hebrew Hebreo - + Portuguese-BR - + Portuguese-PT - + Turkish Turco - + Ukrainian Ucraniano - + Russian Ruso - + Czech Checo - + Catalan Catalán - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15612,12 +15685,12 @@ Habilita/deshabilita la tabla de contenidos - + Kazakh - + Maximum undo operations: @@ -15647,7 +15720,7 @@ Habilita/deshabilita la tabla de contenidos - + Draw diagrams with anti-aliasing feature: @@ -15662,17 +15735,17 @@ Habilita/deshabilita la tabla de contenidos - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15686,6 +15759,26 @@ Habilita/deshabilita la tabla de contenidos Settings Configuración + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15849,7 +15942,7 @@ abrir los archivos con el programa apropiado. Valores predeterminados - + Error Error @@ -15859,7 +15952,7 @@ abrir los archivos con el programa apropiado. ¡Ya está registrado este sufijo! - + Select the home directory @@ -16458,7 +16551,7 @@ abrir los archivos con el programa apropiado. Qucs_S_SPAR_Viewer - + &File &Archivo @@ -16483,7 +16576,7 @@ abrir los archivos con el programa apropiado. - + &Help &Ayuda @@ -16499,7 +16592,7 @@ abrir los archivos con el programa apropiado. Acerca de Qt... - + Qucs-S S-parameter Help @@ -16532,24 +16625,24 @@ Copyright (C) 2024 by - - + + Warning Aviso - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16573,7 +16666,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16624,7 +16717,7 @@ Copyright (C) 2024 by Schematic - + Title Título @@ -16644,7 +16737,7 @@ Copyright (C) 2024 by Revisión: - + Edit Schematic @@ -16680,12 +16773,12 @@ Edits the symbol for this schematic Edita los símbolos de este esquema - + generic - + Error Error @@ -16703,7 +16796,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16946,7 +17039,7 @@ Set the admsXml location on the application settings. creando netlist... - + Error Error @@ -16958,7 +17051,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16984,13 +17077,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -17001,7 +17094,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17067,12 +17160,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17087,40 +17180,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Cancelar - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17130,7 +17233,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17140,7 +17243,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17173,7 +17276,24 @@ Set the admsXml location on the application settings. Archivo: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic mostar el nombre del archivo en el esquema @@ -17228,7 +17348,7 @@ Set the admsXml location on the application settings. Cancelar - + Select a file Seleccionar un archivo @@ -17298,50 +17418,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Abrir - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK Aceptar - + Apply Aplicar - + Cancel Cancelar - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17369,24 +17502,24 @@ No SUBCKT directive found in library - + Error Error - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17411,7 +17544,8 @@ No SUBCKT directive found in library - + + Warning Aviso @@ -17645,7 +17779,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17820,10 +17954,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Error + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_fr.ts b/translations/qucs_fr.ts index 6f28c53bf..29b348a62 100644 --- a/translations/qucs_fr.ts +++ b/translations/qucs_fr.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs À propos de Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simuler @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Modifier les propriétés du composant - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Variation - - - - - - - - - display in schematic - afficher dans le schéma + afficher dans le schéma - Simulation: - Simulation : + Simulation : - Sweep Parameter: - Variable : + Variable : - Type: - Type : + Type : - linear - linéaire + linéaire - logarithmic - logarithmique + logarithmique - list - liste + liste - constant - constante + constante - Values: - Valeurs : + Valeurs : - Start: - Initiale : + Initiale : - Stop: - Finale : + Finale : - - - Step: - Pas : + Pas : - Number: - Nombre : + Nombre : - - + + Properties Propriétés - Name: - Nom : + Nom : - + + Name Nom - - Value - Valeur + + Simulation + Simulation - display - afficher + Sweep Parameter + - Description - Description + Type + Type - - Edit - Modifier + + Values + - - Browse - Choisir + + Start + - - Add - Ajouter + + Stop + - - Remove - Enlever + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Valeur + + + + Show - + display + afficher + + + + Description + Description + + + Edit + Modifier + + + Browse + Choisir + + + Add + Ajouter + + + Remove + Enlever + + OK - OK + OK - Apply - Modifier + Modifier - Cancel - Annuler + Annuler - - - - - - - - - yes - oui + oui - - - - - no - non + non - + Select a file Choisir un fichier @@ -769,66 +774,65 @@ Fichiers Vérilog - Points per decade: - Points par decade : + Points par decade : CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic afficher dans le schéma - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply - + Cancel Annuler - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Modifier les propriétés du graphique @@ -1368,38 +1372,38 @@ Simuler - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1409,12 +1413,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1425,17 +1429,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2183,12 +2187,12 @@ Node name will not be changed. - + Library Name: Nom de la bibliothèque : - + Choose subcircuits: Choisir un sous-circuit : @@ -2198,7 +2202,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Tout sélectionner @@ -2340,7 +2349,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2352,7 +2361,7 @@ Node name will not be changed. - + Error creating library. @@ -2917,7 +2926,7 @@ or elle vaut %1 ! Ngspice - + Problem with SaveNetlist @@ -3658,6 +3667,7 @@ or elle vaut %1 ! + delay time (SPICE only) @@ -3672,7 +3682,7 @@ or elle vaut %1 ! Source modulée en amplitude - + ideal ac current source Source de courant sinusoïdale idéale @@ -3681,14 +3691,19 @@ or elle vaut %1 ! peak current in Ampere Courant de crête en ampères + + + offset current (SPICE only) + + - + damping factor (transient simulation only) facteur d'amortissement (pour les simulations transitoires) - + ac Current Source Source de courant alternatif @@ -3703,7 +3718,7 @@ or elle vaut %1 ! Intensité en ampères - + dc Current Source Source de courant continu @@ -3982,7 +3997,7 @@ or elle vaut %1 ! - + transfer function scaling factor @@ -3999,7 +4014,7 @@ or elle vaut %1 ! - + npn transistor transistor npn @@ -4562,20 +4577,20 @@ or elle vaut %1 ! niveau du 1 - + - + - + - + @@ -4590,16 +4605,16 @@ or elle vaut %1 ! - - + + - + - + Error Erreur @@ -5152,7 +5167,7 @@ Ligne « composant » incohérente ! Surface par défaut de la diode - + Diode Diode @@ -6047,6 +6062,7 @@ Ligne « composant » incohérente ! + put result into dataset inclure le résultat @@ -6333,7 +6349,7 @@ Ligne « composant » incohérente ! Courant initial pour la simulation en transitoire - + Inductor Self @@ -6424,7 +6440,7 @@ Ligne « composant » incohérente ! Délai initial - + Rectangle Current Courant en Crénaux @@ -6525,7 +6541,7 @@ Ligne « composant » incohérente ! Surface par défaut des JFET - + n-JFET Effet de champ de type n @@ -7185,7 +7201,7 @@ Ligne « composant » incohérente ! transistor MOS - + n-MOSFET nMOS @@ -7203,7 +7219,7 @@ Ligne « composant » incohérente ! MOS à déplétion - + zero-bias threshold voltage tension de seuil à vide @@ -7394,8 +7410,8 @@ Ligne « composant » incohérente ! - - + + Use global SPICE temperature @@ -8169,7 +8185,7 @@ Ligne « composant » incohérente ! - + carrier signal frequency @@ -8384,7 +8400,7 @@ Ligne « composant » incohérente ! - + Resistor Résistance @@ -8524,8 +8540,12 @@ Ligne « composant » incohérente ! + (available) ac power in dBm + + + (available) ac power in Watts - (disponible) puissance alternative (W) + (disponible) puissance alternative (W) @@ -8613,7 +8633,7 @@ Ligne « composant » incohérente ! Fichier source Spice - + SPICE netlist Schéma Spice @@ -8628,7 +8648,7 @@ Ligne « composant » incohérente ! Spice - + ERROR: No file name in SPICE component "%1". ERREUR : Aucune référence de fichier dans le composant Spice "%1". @@ -8649,7 +8669,7 @@ Ligne « composant » incohérente ! ERREUR : impossible de charger le fichier Spice converti « %1 ». - + Info Info @@ -8710,12 +8730,7 @@ Ligne « composant » incohérente ! type du port (pour les simulations numériques seulement) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Port de sous-circuit @@ -8783,7 +8798,7 @@ Ligne « composant » incohérente ! - + simulation temperature in degree Celsius (Qucsator only) @@ -9233,7 +9248,7 @@ Ligne « composant » incohérente ! source de courant continu idéale - + dc Voltage Source Alimentation continue @@ -9278,7 +9293,7 @@ Ligne « composant » incohérente ! tension d'impulsion - + Voltage Pulse Impulsion en Tension @@ -9298,7 +9313,7 @@ Ligne « composant » incohérente ! - + Rectangle Voltage Tension carrée @@ -9392,7 +9407,7 @@ Ligne « composant » incohérente ! Tableau de vérité - + ERROR: Cannot open file "%1". ERREUR : impossible d'ouvrir « %1 ». @@ -9437,13 +9452,13 @@ Le remplacer ? - + Successfully exported - + Disk write error! @@ -9462,7 +9477,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9561,16 +9576,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9582,7 +9597,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Modifier les paramètres @@ -9592,7 +9607,7 @@ Use PNG, JPEG or SVG graphics! - + power matching Adaptation en puissance @@ -9657,7 +9672,7 @@ Use PNG, JPEG or SVG graphics! Texte - + Rectangle Rectangle @@ -9667,7 +9682,7 @@ Use PNG, JPEG or SVG graphics! Rectangle rempli - + Edit Rectangle Properties Modifier les paramètres du rectangle @@ -9686,15 +9701,15 @@ Use PNG, JPEG or SVG graphics! sans nom - - + + Format Error: 'Painting' field is not closed! Erreur de format : Champ « painting » non refermé ! - + Wrong document version: Mauvaise version : @@ -9712,7 +9727,7 @@ Champ inconnu ! - + Cannot open Verilog-A file "%1"! @@ -9733,7 +9748,7 @@ Champ inconnu ! - + Cannot save document! Enregistrement impossible ! @@ -9746,7 +9761,7 @@ Wrong property field limiter! Mauvais séparateur de champ ! - + Format Error: Unknown property: Erreur de format : @@ -9862,14 +9877,14 @@ Ligne « painting » incohérente ! - + File Format Error: Unknown field! Erreur de format : Champ inconnu ! - + ERROR: Component "%1" has no analog model. ERREUR : le composant "%1" n'a pas de modèle analogique. @@ -9889,7 +9904,7 @@ Champ inconnu ! AVERTISSEMENT : le composant « %1 » est ignoré. - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9899,12 +9914,12 @@ Champ inconnu ! ATTENTION : Ordre de simulation ignoré dans le sous-cricuit "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ERREUR : Une seule simulation numérique possible. @@ -10128,7 +10143,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10177,7 +10192,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10187,8 +10202,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10599,12 +10614,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10635,12 +10650,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10652,17 +10667,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10697,7 +10712,7 @@ seven line XSPICE specification. - + core @@ -10708,7 +10723,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10720,7 +10735,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10748,7 +10763,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10784,7 +10799,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11056,7 +11071,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11083,7 +11098,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11323,7 +11338,23 @@ Leave continuation lines blank when NOT in use. Spiral inductor - + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + QucsActiveFilter @@ -11380,29 +11411,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11477,7 +11508,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11511,7 +11542,7 @@ Change parameters and/or topology and try again! Copyright © 2005, 2006 {2014, 2015 ?} - + Filter topology @@ -11547,12 +11578,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11562,12 +11593,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11642,12 +11673,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schéma - + Data Display Graphiques @@ -11658,42 +11690,42 @@ Active Filter synthesis program - + VHDL Sources Sources VHDL - - + + Verilog Sources Sources Vérilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Tous les fichiers - + The schematic search path has been refreshed. @@ -11708,7 +11740,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11718,7 +11750,7 @@ Active Filter synthesis program - + Open example… @@ -11733,14 +11765,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11750,23 +11782,23 @@ Active Filter synthesis program Schémas - + New Nouveau - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11779,7 +11811,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11789,7 +11821,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11824,13 +11856,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo contenu du projet actuel - + Search Components - + Clear @@ -11861,8 +11893,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11873,12 +11906,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11886,7 +11919,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11904,43 +11937,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Erreur - + Cannot open "%1". Impossible d'ouvrir "%1". - + Library is corrupt. La bibliothèque est illisible. - + - - - + + + - + Info Info - + Default icon not found: %1.png - + -port -port @@ -11951,14 +11984,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Certaines modifications sont non sauvegardées ! - + Do you want to save the changes before copying? @@ -12002,17 +12035,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Impossible d'effacer un fichier en cours d'utilisation ! - - + + - - + + Warning Attention - + This will delete the file permanently! Continue ? Le fichier va être définitivement détruit ! Poursuivre ? @@ -12075,12 +12108,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Ne peut créer le répertoire de travail ! - + Cannot create project directory ! Ne peut créer ce répertoire ! @@ -12108,41 +12141,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12221,34 +12254,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Création d'un nouveau schéma... - - + + - + - + - + Ready. Prêt. - + Creating new text editor... Création d'un nouvel éditeur de texte… - + Opening file... Ouverture du fichier... @@ -12270,12 +12303,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Sauvegarde interrompue - + Qucs Netlist @@ -12290,12 +12323,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Saisissez un nom de fichier @@ -12355,7 +12389,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Jeter - + untitled sans nom @@ -12395,22 +12429,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12434,7 +12474,7 @@ Use subcircuit to crete Verilog-A module! Voulez-vous vraiment terminer ? - + The document was modified by another program ! Le fichier a été modifié par un autre programme ! @@ -12534,7 +12574,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12614,7 +12661,7 @@ Le remplacer ? Impossible d'écrire "%1" ! - + Please open project with subcircuits! Ouvrez un projet comportant des sous-circuits ! @@ -12681,7 +12728,7 @@ Have you saved the Verilog-A symbols? - + &New &Nouveau @@ -13519,7 +13566,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13561,7 +13639,7 @@ Install Content of a Package Retire les fichiers contenus dans une chemise - + Convert data file @@ -13907,7 +13985,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13946,7 +14024,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13963,7 +14041,7 @@ Rotates the selected component by 90° counter-clockwise Tourne le composant sélectionné de 90° dans le sens direct - + Mirror about X Axis Symétrie verticale @@ -14374,12 +14452,12 @@ Lance l'application de calcul d'atténuateur - + Simulate Simuler - + Simulates the current schematic Simule le circuit @@ -14432,17 +14510,12 @@ Calcule et affiche le point de fonctionnement - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Positionne un inspecteur sur une courbe @@ -14461,7 +14534,7 @@ Sets a marker on a diagram's graph Positionne un inspecteur (« marker ») dans un graphique - + Show Last Messages Afficher les derniers messages @@ -14689,12 +14762,12 @@ Informations sur le toolkit Qt de Trolltech &Simulation - + &View &Visualiser - + &Help &Aide @@ -14803,7 +14876,7 @@ Open - + Input Entrée @@ -15465,7 +15538,7 @@ Affiche/Cache la table des matières QucsSettingsDialog - + Edit Qucs Properties Modifier les propriétés générales @@ -15474,7 +15547,7 @@ Affiche/Cache la table des matières Police (chargée au prochain redémarrage) : - + Large font size: @@ -15484,117 +15557,117 @@ Affiche/Cache la table des matières Couleur de fond : - + Language (set after reload): Langue (nécessite de relancer l'application) : - + system language Langue système - + English Anglais - + German Allemand - + French Français - + Spanish Espagnol - + Italian Italien - + Polish Polonais - + Romanian Roumain - + Japanese Japonais - + Swedish Suédois - + Hungarian Hongrois - + Hebrew Hébreu - + Portuguese-BR - + Portuguese-PT - + Turkish Turc - + Ukrainian Ukrainien - + Russian Russe - + Czech Tchèque - + Catalan Catalan - + Arabic Arabe - + Chinese - + Schematic font (set after reload): @@ -15604,12 +15677,12 @@ Affiche/Cache la table des matières - + Kazakh - + Maximum undo operations: @@ -15639,7 +15712,7 @@ Affiche/Cache la table des matières - + Draw diagrams with anti-aliasing feature: @@ -15654,17 +15727,17 @@ Affiche/Cache la table des matières - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15678,6 +15751,26 @@ Affiche/Cache la table des matières Settings Réglages + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15841,7 +15934,7 @@ ouvrir ceux-ci avec le programme ad-hoc. Valeurs par défaut - + Error Erreur @@ -15851,7 +15944,7 @@ ouvrir ceux-ci avec le programme ad-hoc. Cette extension est déjà enregistrée ! - + Select the home directory @@ -16450,7 +16543,7 @@ ouvrir ceux-ci avec le programme ad-hoc. Qucs_S_SPAR_Viewer - + &File &Fichier @@ -16475,7 +16568,7 @@ ouvrir ceux-ci avec le programme ad-hoc. - + &Help &Aide @@ -16491,7 +16584,7 @@ ouvrir ceux-ci avec le programme ad-hoc. À propos de Qt… - + Qucs-S S-parameter Help @@ -16524,24 +16617,24 @@ Copyright (C) 2024 by - - + + Warning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16565,7 +16658,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16616,7 +16709,7 @@ Copyright (C) 2024 by Schematic - + Title Titre @@ -16636,7 +16729,7 @@ Copyright (C) 2024 by Version : - + Edit Schematic @@ -16672,12 +16765,12 @@ Edits the symbol for this schematic Modifie le symbole pour ce schéma - + generic - + Error Erreur @@ -16695,7 +16788,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16938,7 +17031,7 @@ Set the admsXml location on the application settings. création du fichier topologique… - + Error Erreur @@ -16950,7 +17043,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16976,13 +17069,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16993,7 +17086,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17059,12 +17152,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17079,40 +17172,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Annuler - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17122,7 +17225,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17132,7 +17235,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17165,7 +17268,24 @@ Set the admsXml location on the application settings. Fichier : - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic afficher le nom du fichier dans le schéma @@ -17220,7 +17340,7 @@ Set the admsXml location on the application settings. Annuler - + Select a file Choisir un fichier @@ -17290,50 +17410,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Ouvrir - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply - + Cancel Annuler - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17361,24 +17494,24 @@ No SUBCKT directive found in library - + Error Erreur - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17403,7 +17536,8 @@ No SUBCKT directive found in library - + + Warning @@ -17637,7 +17771,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17812,10 +17946,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Erreur + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_he.ts b/translations/qucs_he.ts index 2547ef45f..1b1ad6b9a 100644 --- a/translations/qucs_he.ts +++ b/translations/qucs_he.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate @@ -545,196 +550,196 @@ ComponentDialog - + Edit Component Properties ערוך מאפייני רכיב - + + Equation Editor + + + + + Put result in dataset + + + + Sweep סריקה - - - - - - - - - display in schematic - הראה בסרטוט + הראה בסרטוט - Simulation: - סימולציה: + סימולציה: - Sweep Parameter: - מאפייני סריקה: + מאפייני סריקה: - Type: - סוג: + סוג: - linear - לינארי + לינארי - logarithmic - לוגריתמי + לוגריתמי - list - רשימה + רשימה - constant - קבוע + קבוע - Values: - ערכים: + ערכים: - Start: - התחל: + התחל: - Stop: - עצור: + עצור: - - - Step: - צעד: + צעד: - Number: - מספר: + מספר: - - + + Properties מאפיינים - Name: - שם: + שם: - + + Name שם - - Value - ערך + + Simulation + סימולציה - display - הצג + Sweep Parameter + - Description - תאור + Type + - - Edit - ערוך + + Values + - - Browse - סייר + + Start + - - Add - הוסף + + Stop + - - Remove - הסר + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + ערך + + + + Show - + display + הצג + + + + Description + תאור + + + Edit + ערוך + + + Browse + סייר + + + Add + הוסף + + + Remove + הסר + + OK - אשר + אשר - Apply - החל + החל - Cancel - בטל + בטל - - - - - - - - - yes - כן + כן - - - - - no - לא + לא - + Select a file בחר קובץ @@ -769,66 +774,65 @@ - Points per decade: - נקודות לעשור: + נקודות לעשור: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic הראה בסרטוט - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply החל - + Cancel בטל - + OK אשר - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties ערוך מאפייני דיאגרמה @@ -1347,38 +1351,38 @@ ExternSimDialog - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1388,12 +1392,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1404,17 +1408,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2110,12 +2114,12 @@ Node name will not be changed. - + Library Name: - + Choose subcircuits: @@ -2125,7 +2129,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All @@ -2259,7 +2268,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2271,7 +2280,7 @@ Node name will not be changed. - + Error creating library. @@ -2747,7 +2756,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3364,6 +3373,7 @@ but is %1 ! + delay time (SPICE only) @@ -3378,7 +3388,7 @@ but is %1 ! - + ideal ac current source מקור זרם-חילופין אידאלי @@ -3387,14 +3397,19 @@ but is %1 ! peak current in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) - + ac Current Source מקור זרם-חילופין @@ -3409,7 +3424,7 @@ but is %1 ! זרם באמפר (A) - + dc Current Source מקור זרם-ישר @@ -3688,7 +3703,7 @@ but is %1 ! - + transfer function scaling factor @@ -3705,7 +3720,7 @@ but is %1 ! - + npn transistor טרנזיסטור NPN @@ -4268,20 +4283,20 @@ but is %1 ! - + - + - + - + @@ -4296,16 +4311,16 @@ but is %1 ! - - + + - + - + Error שגיאה @@ -4854,7 +4869,7 @@ Wrong 'component' line format! - + Diode דיודה @@ -5749,6 +5764,7 @@ Wrong 'component' line format! + put result into dataset הכנס תוצאה לקומץ מידע @@ -6035,7 +6051,7 @@ Wrong 'component' line format! - + Inductor סליל @@ -6126,7 +6142,7 @@ Wrong 'component' line format! - + Rectangle Current זרם מרובע @@ -6227,7 +6243,7 @@ Wrong 'component' line format! - + n-JFET n-JFET @@ -6883,7 +6899,7 @@ Wrong 'component' line format! טרנזיסטור תופעת שדה MOS - MOSFET - + n-MOSFET n-MOSFET @@ -6901,7 +6917,7 @@ Wrong 'component' line format! depletion MOSFET - + zero-bias threshold voltage מתח סף למתח-שיחוד-אפס (ZERO-BIAS) @@ -7092,8 +7108,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -7867,7 +7883,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8082,7 +8098,7 @@ Wrong 'component' line format! - + Resistor נגד @@ -8222,7 +8238,7 @@ Wrong 'component' line format! - (available) ac power in Watts + (available) ac power in dBm @@ -8311,7 +8327,7 @@ Wrong 'component' line format! קובץ SPICE NETLIST - + SPICE netlist SPICE NETLIST @@ -8326,7 +8342,7 @@ Wrong 'component' line format! SPICE - + ERROR: No file name in SPICE component "%1". @@ -8347,7 +8363,7 @@ Wrong 'component' line format! - + Info מידע @@ -8408,12 +8424,7 @@ Wrong 'component' line format! - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port פורט של תת-מעגל @@ -8481,7 +8492,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -8931,7 +8942,7 @@ Wrong 'component' line format! מקור מתח אידאלי DC - + dc Voltage Source מקור מתח DC @@ -8976,7 +8987,7 @@ Wrong 'component' line format! מתח הפולס - + Voltage Pulse פולס מתח @@ -8996,7 +9007,7 @@ Wrong 'component' line format! - + Rectangle Voltage מתח ריבועי (RECTANGLE VOLTAGE) @@ -9090,7 +9101,7 @@ Wrong 'component' line format! - + ERROR: Cannot open file "%1". @@ -9131,13 +9142,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9156,7 +9167,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9255,16 +9266,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9276,7 +9287,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties @@ -9286,7 +9297,7 @@ Use PNG, JPEG or SVG graphics! - + power matching @@ -9351,7 +9362,7 @@ Use PNG, JPEG or SVG graphics! - + Rectangle @@ -9361,7 +9372,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Rectangle Properties ערוך מאפייני מלבן @@ -9380,15 +9391,15 @@ Use PNG, JPEG or SVG graphics! ללא שם - - + + Format Error: 'Painting' field is not closed! שגיאת פורמט: שדה 'ציור' לא סגור! - + Wrong document version: גרסת מסמך שגוייה: @@ -9405,7 +9416,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9426,7 +9437,7 @@ Unknown field! - + Cannot save document! אין ביכולתי לשמור את המסמך! @@ -9439,7 +9450,7 @@ Wrong property field limiter! מגביל מאפיין שדה שגוי! - + Format Error: Unknown property: שגיאת פורמט: @@ -9555,13 +9566,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! שגיאת תבנית קובץ: שדה לא ידוע! - + ERROR: Component "%1" has no analog model. @@ -9581,7 +9592,7 @@ Unknown field! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9591,12 +9602,12 @@ Unknown field! - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. @@ -9818,7 +9829,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -9867,7 +9878,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -9877,8 +9888,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10289,12 +10300,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10325,12 +10336,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10342,17 +10353,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10387,7 +10398,7 @@ seven line XSPICE specification. - + core @@ -10398,7 +10409,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10410,7 +10421,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10438,7 +10449,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10474,7 +10485,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10746,7 +10757,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -10773,7 +10784,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11013,8 +11024,24 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + QucsActiveFilter @@ -11070,29 +11097,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11167,7 +11194,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11201,7 +11228,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11237,12 +11264,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11252,12 +11279,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11332,12 +11359,13 @@ Active Filter synthesis program QucsApp - + + Schematic סכמה - + Data Display תצוגת מידע @@ -11348,42 +11376,42 @@ Active Filter synthesis program - + VHDL Sources - - + + Verilog Sources - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File כל קובץ - + The schematic search path has been refreshed. @@ -11398,7 +11426,7 @@ Active Filter synthesis program - + Open file @@ -11408,7 +11436,7 @@ Active Filter synthesis program - + Open example… @@ -11423,14 +11451,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11440,23 +11468,23 @@ Active Filter synthesis program סכמות - + New חדש - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11469,7 +11497,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11479,7 +11507,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11514,13 +11542,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Search Components - + Clear @@ -11551,8 +11579,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11563,12 +11592,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11576,7 +11605,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11594,43 +11623,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo שגיאה - + Cannot open "%1". - + Library is corrupt. - + - - - + + + - + Info מידע - + Default icon not found: %1.png - + -port -פורט @@ -11641,13 +11670,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! המסמך מכיל שינויים שלא נשמרו! - + Do you want to save the changes before copying? @@ -11687,17 +11716,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo לא יכול למחוק קובץ פתוח! - - + + - - + + Warning אזהרה - + This will delete the file permanently! Continue ? הפעולה הבאה תמחק את הקובץ לצמיתות! להמשיך? @@ -11760,12 +11789,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! לא ניתן ליצור ספריית עבודה! - + Cannot create project directory ! לא יכול ליצור ספריית פרוייקט! @@ -11793,41 +11822,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -11906,34 +11935,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo צור סכמה חדשה... - - + + - + - + - + Ready. מוכן. - + Creating new text editor... - + Opening file... פותח קובץ... @@ -11955,12 +11984,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted שמירה בוטלה - + Qucs Netlist @@ -11975,12 +12004,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name הכנס שם מסמך @@ -12039,7 +12069,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &התעלם - + untitled ללא שם @@ -12079,22 +12109,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12118,7 +12154,7 @@ Use subcircuit to crete Verilog-A module! האם אתה באמת רוצה לצאת? - + The document was modified by another program ! @@ -12210,7 +12246,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12289,7 +12332,7 @@ Overwrite ? - + Please open project with subcircuits! @@ -12352,7 +12395,7 @@ Have you saved the Verilog-A symbols? - + &New @@ -13116,12 +13159,43 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qt - + Convert data file @@ -13449,7 +13523,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13488,12 +13562,12 @@ Resets the limits for all axis to auto. - + Simulators Settings... - + Mirror about X Axis @@ -13858,12 +13932,12 @@ Starts attenuator calculation program - + Simulate - + Simulates the current schematic @@ -13904,17 +13978,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph @@ -13931,7 +14000,7 @@ Sets a marker on a diagram's graph - + Show Last Messages @@ -14112,12 +14181,12 @@ About Qt by Trolltech - + &View - + &Help @@ -14226,7 +14295,7 @@ Open - + Input @@ -14723,7 +14792,7 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties ערוך מאפייני QUCS @@ -14732,7 +14801,7 @@ Filter synthesis program פונט (יקבע אחרי טעינה מחדש): - + Large font size: @@ -14742,117 +14811,117 @@ Filter synthesis program צבע רקע למסמך: - + Language (set after reload): - + system language - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -14862,12 +14931,12 @@ Filter synthesis program - + Kazakh - + Maximum undo operations: @@ -14897,7 +14966,7 @@ Filter synthesis program - + Draw diagrams with anti-aliasing feature: @@ -14912,17 +14981,17 @@ Filter synthesis program - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -14936,6 +15005,26 @@ Filter synthesis program Settings הגדרות + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15098,7 +15187,7 @@ open files with an appropriate program. ערכי ברירת מחדל - + Error שגיאה @@ -15108,7 +15197,7 @@ open files with an appropriate program. - + Select the home directory @@ -15703,7 +15792,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File @@ -15728,7 +15817,7 @@ open files with an appropriate program. - + &Help @@ -15744,7 +15833,7 @@ open files with an appropriate program. - + Qucs-S S-parameter Help @@ -15777,24 +15866,24 @@ Copyright (C) 2024 by - - + + Warning אזהרה - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -15818,7 +15907,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -15869,7 +15958,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -15889,7 +15978,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -15925,12 +16014,12 @@ Edits the symbol for this schematic עורך את הסמל לסכימה זו - + generic - + Error שגיאה @@ -15948,7 +16037,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16191,7 +16280,7 @@ Set the admsXml location on the application settings. - + Error שגיאה @@ -16203,7 +16292,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16229,13 +16318,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16246,7 +16335,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16311,12 +16400,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16331,40 +16420,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel בטל - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16374,7 +16473,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -16384,7 +16483,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -16417,7 +16516,24 @@ Set the admsXml location on the application settings. - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic @@ -16472,7 +16588,7 @@ Set the admsXml location on the application settings. בטל - + Select a file בחר קובץ @@ -16542,50 +16658,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open פתח - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK אשר - + Apply החל - + Cancel בטל - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -16613,24 +16742,24 @@ No SUBCKT directive found in library - + Error שגיאה - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -16655,7 +16784,8 @@ No SUBCKT directive found in library - + + Warning אזהרה @@ -16887,7 +17017,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17062,10 +17192,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 שגיאה + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_hu.ts b/translations/qucs_hu.ts index f8ee668b4..e6b2904cd 100644 --- a/translations/qucs_hu.ts +++ b/translations/qucs_hu.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Szimuláció @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Komponens tulajdonságainak beállítása - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Léptetés - - - - - - - - - display in schematic - Kijelezve a kapcsolási rajzon + Kijelezve a kapcsolási rajzon - Simulation: - Szimuláció: + Szimuláció: - Sweep Parameter: - Léptetés paraméter: + Léptetés paraméter: - Type: - Típus: + Típus: - linear - lineáris + lineáris - logarithmic - logaritmikus + logaritmikus - list - lista + lista - constant - állandó + állandó - Values: - Értékek: + Értékek: - Start: - Start: + Start: - Stop: - Stop: + Stop: - - - Step: - Léptetés: + Léptetés: - Number: - Lépésszám: + Lépésszám: - - + + Properties Tulajdonságok - Name: - Név: + Név: - + + Name Név - - Value - Érték + + Simulation + Szimuláció - display - Kijelezve + Sweep Parameter + - Description - Leírás + Type + Típus - - Edit - Szerkesztés + + Values + - - Browse - Kiválasztás + + Start + - - Add - Hozzáadás + + Stop + - - Remove - Eltávolítás + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Érték + + + + Show - + display + Kijelezve + + + + Description + Leírás + + + Edit + Szerkesztés + + + Browse + Kiválasztás + + + Add + Hozzáadás + + + Remove + Eltávolítás + + OK - Ok + Ok - Apply - Alkalmaz + Alkalmaz - Cancel - Mégsem + Mégsem - - - - - - - - - yes - igen + igen - - - - - no - nem + nem - + Select a file Fájl kiválasztás @@ -769,66 +774,65 @@ Verilog fájl - Points per decade: - Pont per dekád: + Pont per dekád: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic Kijelezve a kapcsolási rajzon - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Alkalmaz - + Cancel Mégsem - + OK Ok - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Diagram tulajdonságainak beállítása @@ -1367,38 +1371,38 @@ Szimuláció - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1408,12 +1412,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1424,17 +1428,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2185,12 +2189,12 @@ Node name will not be changed. - + Library Name: Alkatrész katalógus neve: - + Choose subcircuits: Beágyazott kapcsolás választás: @@ -2200,7 +2204,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Mindent kijelöl @@ -2342,7 +2351,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2354,7 +2363,7 @@ Node name will not be changed. - + Error creating library. @@ -2920,7 +2929,7 @@ de %1 ! Ngspice - + Problem with SaveNetlist @@ -3662,6 +3671,7 @@ de %1 ! + delay time (SPICE only) @@ -3676,7 +3686,7 @@ de %1 ! AM modulált jelforrás - + ideal ac current source ideális váltóáram AC generátor @@ -3685,14 +3695,19 @@ de %1 ! peak current in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) csillapítási faktor (csak tranziens szimuláció) - + ac Current Source váltóáram AC generátor @@ -3707,7 +3722,7 @@ de %1 ! áram Amper-ben - + dc Current Source egyenáram DC forrás @@ -3986,7 +4001,7 @@ de %1 ! - + transfer function scaling factor @@ -4003,7 +4018,7 @@ de %1 ! - + npn transistor npn tranzisztor @@ -4566,20 +4581,20 @@ de %1 ! a magas szint feszültsége - + - + - + - + @@ -4594,16 +4609,16 @@ de %1 ! - - + + - + - + Error Hiba @@ -5153,7 +5168,7 @@ Digitális szimuláció - + Diode Dióda @@ -6048,6 +6063,7 @@ Digitális szimuláció + put result into dataset eredmény mentése az adatbeállításba @@ -6334,7 +6350,7 @@ Digitális szimuláció kezdeti áram tranziens szimulációhoz - + Inductor Tekercs @@ -6425,7 +6441,7 @@ Digitális szimuláció kezdeti késleltetési idő - + Rectangle Current Négyszögáram @@ -6526,7 +6542,7 @@ Digitális szimuláció - + n-JFET n-JFET @@ -7183,7 +7199,7 @@ Digitális szimuláció MOS térvezérlésű tranzisztor - + n-MOSFET n-MOSFET @@ -7201,7 +7217,7 @@ Digitális szimuláció kiürítéses MOSFET - + zero-bias threshold voltage @@ -7392,8 +7408,8 @@ Digitális szimuláció - - + + Use global SPICE temperature @@ -8167,7 +8183,7 @@ Digitális szimuláció - + carrier signal frequency @@ -8382,7 +8398,7 @@ Digitális szimuláció - + Resistor Ellenállás @@ -8522,7 +8538,7 @@ Digitális szimuláció - (available) ac power in Watts + (available) ac power in dBm @@ -8611,7 +8627,7 @@ Digitális szimuláció SPICE kötéslista fájl - + SPICE netlist SPICE kötéslista @@ -8626,7 +8642,7 @@ Digitális szimuláció spice - + ERROR: No file name in SPICE component "%1". HIBA: A "%1" SPICE komponensnek nincs fájlneve. @@ -8647,7 +8663,7 @@ Digitális szimuláció - + Info Infó @@ -8708,12 +8724,7 @@ Digitális szimuláció a kivezetés típusa (csak digitális szimulációhoz) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Beágyazott kapcsolás kivezetés @@ -8781,7 +8792,7 @@ Digitális szimuláció - + simulation temperature in degree Celsius (Qucsator only) @@ -9231,7 +9242,7 @@ Digitális szimuláció ideális egyenfeszültség DC forrás - + dc Voltage Source Egyenfeszültség DC forrás @@ -9276,7 +9287,7 @@ Digitális szimuláció impulzus feszültség - + Voltage Pulse Feszültség impulzus @@ -9296,7 +9307,7 @@ Digitális szimuláció - + Rectangle Voltage Négyszögfeszültség @@ -9390,7 +9401,7 @@ Digitális szimuláció Igazságtábla - + ERROR: Cannot open file "%1". @@ -9432,13 +9443,13 @@ Felülírjam? - + Successfully exported - + Disk write error! @@ -9457,7 +9468,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9556,16 +9567,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9577,7 +9588,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Tulajdonságok beállítása @@ -9587,7 +9598,7 @@ Use PNG, JPEG or SVG graphics! - + power matching Teljesítmény illesztő @@ -9652,7 +9663,7 @@ Use PNG, JPEG or SVG graphics! Szöveg - + Rectangle Téglalap @@ -9662,7 +9673,7 @@ Use PNG, JPEG or SVG graphics! Kitöltött téglalap - + Edit Rectangle Properties Nényszög tulajdonságainak beállítása @@ -9681,15 +9692,15 @@ Use PNG, JPEG or SVG graphics! cím nélkül - - + + Format Error: 'Painting' field is not closed! Formázási hiba: 'Painting' mező nincs lezárva! - + Wrong document version: Helytelen dokumentum verzió: @@ -9707,7 +9718,7 @@ Ismeretlen mező! - + Cannot open Verilog-A file "%1"! @@ -9728,7 +9739,7 @@ Ismeretlen mező! - + Cannot save document! Dokumentum nem menthető! @@ -9741,7 +9752,7 @@ Wrong property field limiter! Helytelen szélsőérték! - + Format Error: Unknown property: Formázási hiba: @@ -9857,14 +9868,14 @@ Helytelen 'painting' sor! - + File Format Error: Unknown field! Fájl formátum hiba: Ismeretlen mező! - + ERROR: Component "%1" has no analog model. HIBA: "%1" alkatrész nem analóg modell. @@ -9884,7 +9895,7 @@ Ismeretlen mező! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9894,12 +9905,12 @@ Ismeretlen mező! FIGYELMEZTETÉS: Mellőzve az alkatrész a "%1" beágyazott kapcsolásban. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. HIBA: Csak egy digitális szimáció megengedett. @@ -10123,7 +10134,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10172,7 +10183,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10182,8 +10193,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10594,12 +10605,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10630,12 +10641,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10647,17 +10658,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10692,7 +10703,7 @@ seven line XSPICE specification. - + core @@ -10703,7 +10714,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10715,7 +10726,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10743,7 +10754,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10779,7 +10790,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11051,7 +11062,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11078,7 +11089,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11318,9 +11329,25 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter &File @@ -11375,29 +11402,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11472,7 +11499,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11506,7 +11533,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 by {2014, 2015 ?} - + Filter topology @@ -11542,12 +11569,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11557,12 +11584,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11638,12 +11665,13 @@ Active Filter synthesis program QucsApp - + + Schematic Kapcsolási rajz - + Data Display Adat megjelenítők @@ -11654,42 +11682,42 @@ Active Filter synthesis program - + VHDL Sources VHDL forrás - - + + Verilog Sources Verilog forrás - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Bármelyik fájl - + The schematic search path has been refreshed. @@ -11704,7 +11732,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11714,7 +11742,7 @@ Active Filter synthesis program - + Open example… @@ -11729,14 +11757,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11746,23 +11774,23 @@ Active Filter synthesis program Kapcsolási rajzok - + New Új - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11775,7 +11803,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11785,7 +11813,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11820,13 +11848,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo aktuális projekt tartalma - + Search Components - + Clear @@ -11857,8 +11885,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11869,12 +11898,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11882,7 +11911,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11900,43 +11929,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Hiba - + Cannot open "%1". "%1" megnyitása nem sikerült. - + Library is corrupt. Alkatrész katalógus hibás. - + - - - + + + - + Info Infó - + Default icon not found: %1.png - + -port -csatlakozás @@ -11947,7 +11976,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! A dokumentum tartalmaz mentetlen változásokat! @@ -11955,7 +11984,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Do you want to save the changes before copying? @@ -11995,17 +12024,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Nyitott fájlt nem lehet törölni! - - + + - - + + Warning Figyelmeztetések - + This will delete the file permanently! Continue ? A fájl véglegesen törlődik! Folytatja? @@ -12068,12 +12097,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! A munkakönyvtárat nem tudtam létrehozni! - + Cannot create project directory ! Nem lehet létrehozni a projekt könyvtárat! @@ -12101,41 +12130,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12214,35 +12243,35 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Új kapcsolási rajz létrehozása... - - + + - + - + - + Ready. Kész. - + Creating new text editor... Új szövegszerkesztő készítése... - + Opening file... Fájl nyitása... @@ -12264,12 +12293,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Mentés megszakítva - + Qucs Netlist @@ -12284,12 +12313,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Dokumentum neve @@ -12349,7 +12379,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Eldob - + untitled cím nélkül @@ -12389,22 +12419,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12428,7 +12464,7 @@ Use subcircuit to crete Verilog-A module! Biztosan kilép? - + The document was modified by another program ! A dokumentumot másik program módosította! @@ -12528,7 +12564,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12608,7 +12651,7 @@ Felülírjam? "%1" nem írható! - + Please open project with subcircuits! Nyisson projektet a beágyazott kapcsoláshoz! @@ -12676,7 +12719,7 @@ Have you saved the Verilog-A symbols? - + &New Ú&j @@ -13513,7 +13556,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13555,7 +13629,7 @@ Install Content of a Package Összetevők installálása a csomagból - + Convert data file @@ -13899,7 +13973,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13938,7 +14012,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13955,7 +14029,7 @@ Rotates the selected component by 90° counter-clockwise Elforgatja a kiválasztott komponenst 90°-kal jobbra - + Mirror about X Axis Tükrözés X tengelyre @@ -14368,12 +14442,12 @@ Csillapító méretező program indítása - + Simulate Szimuláció - + Simulates the current schematic Szimuláció futtatása az aktuális kapcsoláson @@ -14426,17 +14500,12 @@ Kiszámítja a DC munkapontokat és megjeleníti - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Jelző beállítása a grafikonon @@ -14455,7 +14524,7 @@ Sets a marker on a diagram's graph Jelző beállítása a diagram grafikonjain - + Show Last Messages Utolsó üzenet megjelenítése @@ -14686,12 +14755,12 @@ Qt a Trolltech-től Sz&imuláció - + &View &Megjelenítés - + &Help &Súgó @@ -14800,7 +14869,7 @@ Open - + Input Bemenet @@ -15462,7 +15531,7 @@ Be vagy Kikapcsolja a tartalomjegyzéket QucsSettingsDialog - + Edit Qucs Properties Qucs tulajdonságainak beéllítása @@ -15471,7 +15540,7 @@ Be vagy Kikapcsolja a tartalomjegyzéket Betűkészlet (beállítva ujratöltés után): - + Large font size: @@ -15481,117 +15550,117 @@ Be vagy Kikapcsolja a tartalomjegyzéket Dokumentum háttér szín: - + Language (set after reload): Nyelv (beállítás után újraindítás után): - + system language rendszer nyelve - + English Angol - + German Német - + French Francia - + Spanish Spanyol - + Italian Olasz - + Polish Lengyel - + Romanian Román - + Japanese Japán - + Swedish Svéd - + Hungarian Magyar - + Hebrew Héber - + Portuguese-BR - + Portuguese-PT - + Turkish Török - + Ukrainian Ukrán - + Russian Orosz - + Czech Cseh - + Catalan Katalán - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15601,12 +15670,12 @@ Be vagy Kikapcsolja a tartalomjegyzéket - + Kazakh - + Maximum undo operations: @@ -15636,7 +15705,7 @@ Be vagy Kikapcsolja a tartalomjegyzéket - + Draw diagrams with anti-aliasing feature: @@ -15651,17 +15720,17 @@ Be vagy Kikapcsolja a tartalomjegyzéket - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15675,6 +15744,26 @@ Be vagy Kikapcsolja a tartalomjegyzéket Settings Beállítások + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15838,7 +15927,7 @@ a fájlt a megfelelő program nyissa meg. Alapértelmezett értékek - + Error Hiba @@ -15848,7 +15937,7 @@ a fájlt a megfelelő program nyissa meg. Ez az utótag már regisztrált! - + Select the home directory @@ -16448,7 +16537,7 @@ a fájlt a megfelelő program nyissa meg. Qucs_S_SPAR_Viewer - + &File &Fájl @@ -16473,7 +16562,7 @@ a fájlt a megfelelő program nyissa meg. - + &Help &Súgó @@ -16489,7 +16578,7 @@ a fájlt a megfelelő program nyissa meg. Qt Névjegy... - + Qucs-S S-parameter Help @@ -16522,24 +16611,24 @@ Copyright (C) 2024 by - - + + Warning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16563,7 +16652,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16614,7 +16703,7 @@ Copyright (C) 2024 by Schematic - + Title Cím @@ -16634,7 +16723,7 @@ Copyright (C) 2024 by Ellenőrizve: - + Edit Schematic @@ -16670,12 +16759,12 @@ Edits the symbol for this schematic Szerkeszti az áramköri szimbólumot a kapcsoláshoz - + generic - + Error Hiba @@ -16693,7 +16782,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16937,7 +17026,7 @@ Rács megjelenítése kötéslista készítés... - + Error Hiba @@ -16949,7 +17038,7 @@ Rács megjelenítése - + ERROR: Simulator is still running! @@ -16975,13 +17064,13 @@ Rács megjelenítése - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16992,7 +17081,7 @@ Rács megjelenítése - + ERROR: Cannot start @@ -17059,12 +17148,12 @@ Rács megjelenítése SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17079,40 +17168,50 @@ Rács megjelenítése - - Extra simulator parameters - - - - + Apply changes - + Cancel Mégsem - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17122,7 +17221,7 @@ Rács megjelenítése - + Select Ngspice executable location @@ -17132,7 +17231,7 @@ Rács megjelenítése - + Select SpiceOpus executable location @@ -17165,7 +17264,24 @@ Rács megjelenítése Fájl: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic fájlnév megjelenítése a kapcsolási rajzon @@ -17220,7 +17336,7 @@ Rács megjelenítése Mégsem - + Select a file Fájl kiválasztás @@ -17290,50 +17406,63 @@ Rács megjelenítése SpiceLibCompDialog - - + + Open Megnyitás - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK Ok - + Apply Alkalmaz - + Cancel Mégsem - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17361,24 +17490,24 @@ No SUBCKT directive found in library - + Error Hiba - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17403,7 +17532,8 @@ No SUBCKT directive found in library - + + Warning @@ -17637,7 +17767,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17812,10 +17942,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Hiba + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_it.ts b/translations/qucs_it.ts index 8cd472da2..25fe8a202 100644 --- a/translations/qucs_it.ts +++ b/translations/qucs_it.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simula @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Modifica Proprietà Componente - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Sweep - - - - - - - - - display in schematic - mostra nello schema + mostra nello schema - Simulation: - Simulazione: + Simulazione: - Sweep Parameter: - Parametro Scansione: + Parametro Scansione: - Type: - Tipo: + Tipo: - linear - lineare + lineare - logarithmic - logaritmico + logaritmico - list - lista + lista - constant - costante + costante - Values: - Valori: + Valori: - Start: - Inizio: + Inizio: - Stop: - Fine: + Fine: - - - Step: - Passo: + Passo: - Number: - Numero: + Numero: - - + + Properties Proprietà - Name: - Nome: + Nome: - + + Name Nome - - Value - Valore + + Simulation + Simulazione - display - mostra + Sweep Parameter + - Description - Descrizione + Type + Tipo - - Edit - Modifica + + Values + - - Browse - Sfoglia + + Start + - - Add - Aggiungi + + Stop + - - Remove - Rimuovi + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Valore + + + + Show - + display + mostra + + + + Description + Descrizione + + + Edit + Modifica + + + Browse + Sfoglia + + + Add + Aggiungi + + + Remove + Rimuovi + + OK - OK + OK - Apply - Applica + Applica - Cancel - Annulla + Annulla - - - - - - - - - yes - sì + sì - - - - - no - no + no - + Select a file Seleziona un file @@ -769,66 +774,65 @@ File Verilog - Points per decade: - Punti per decade: + Punti per decade: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic mostra nello schema - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Applica - + Cancel Annulla - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Modifica Proprietà Diagramma @@ -1367,38 +1371,38 @@ Simula - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1408,12 +1412,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1424,17 +1428,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2183,12 +2187,12 @@ Node name will not be changed. - + Library Name: Nome Libreria: - + Choose subcircuits: Scegli sottocircuiti: @@ -2198,7 +2202,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Seleziona Tutto @@ -2340,7 +2349,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2352,7 +2361,7 @@ Node name will not be changed. - + Error creating library. @@ -2918,7 +2927,7 @@ ma è %1 ! Ngspice - + Problem with SaveNetlist @@ -3661,6 +3670,7 @@ Package estratto con successo! + delay time (SPICE only) @@ -3675,7 +3685,7 @@ Package estratto con successo! Generatore modulato AM - + ideal ac current source generatore ideale di corrente alternata @@ -3684,14 +3694,19 @@ Package estratto con successo! peak current in Ampere corrente di picco in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) fattore di smorzamento (solo simulazione transitorio) - + ac Current Source Generatore di Corrente ac @@ -3706,7 +3721,7 @@ Package estratto con successo! corrente in Ampere - + dc Current Source Generatore di Corrente dc @@ -3985,7 +4000,7 @@ Package estratto con successo! - + transfer function scaling factor @@ -4002,7 +4017,7 @@ Package estratto con successo! - + npn transistor transistor npn @@ -4565,20 +4580,20 @@ Package estratto con successo! tensione del livello alto - + - + - + - + @@ -4593,16 +4608,16 @@ Package estratto con successo! - - + + - + - + Error Errore @@ -5155,7 +5170,7 @@ Formato della linea 'component' errato! area predefinita per il diodo - + Diode Diodo @@ -6050,6 +6065,7 @@ Formato della linea 'component' errato! + put result into dataset metti risultato nell'insieme dati @@ -6336,7 +6352,7 @@ Formato della linea 'component' errato! corrente iniziale per la simulazione del transitorio - + Inductor Induttore @@ -6427,7 +6443,7 @@ Formato della linea 'component' errato! tempo di ritardo iniziale - + Rectangle Current Corrente Rettangolare @@ -6528,7 +6544,7 @@ Formato della linea 'component' errato! area predefinita per JFET - + n-JFET n-JFET @@ -7188,7 +7204,7 @@ Formato della linea 'component' errato! transistore MOS a effetto di campo - + n-MOSFET n-MOSFET @@ -7206,7 +7222,7 @@ Formato della linea 'component' errato! MOSFET a svuotamento - + zero-bias threshold voltage tensione di soglia con polarizzazione zero @@ -7397,8 +7413,8 @@ Formato della linea 'component' errato! - - + + Use global SPICE temperature @@ -8172,7 +8188,7 @@ Formato della linea 'component' errato! - + carrier signal frequency @@ -8387,7 +8403,7 @@ Formato della linea 'component' errato! - + Resistor Resistore @@ -8527,8 +8543,12 @@ Formato della linea 'component' errato! + (available) ac power in dBm + + + (available) ac power in Watts - potenza (disponibile) AC in Watt + potenza (disponibile) AC in Watt @@ -8616,7 +8636,7 @@ Formato della linea 'component' errato! file netlist SPICE - + SPICE netlist netlist SPICE @@ -8631,7 +8651,7 @@ Formato della linea 'component' errato! spice - + ERROR: No file name in SPICE component "%1". ERRORE: Nome file assente nel componente SPICE "%1". @@ -8652,7 +8672,7 @@ Formato della linea 'component' errato! ERRORE: Impossibile aprire il file SPICE convertito "%1". - + Info Informazioni @@ -8713,12 +8733,7 @@ Formato della linea 'component' errato! tipo della porta (solo per simulazione digitale) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Porta Sottocircuito @@ -8786,7 +8801,7 @@ Formato della linea 'component' errato! - + simulation temperature in degree Celsius (Qucsator only) @@ -9236,7 +9251,7 @@ Formato della linea 'component' errato! generatore ideale di tensione dc - + dc Voltage Source Generatore di Tensione dc @@ -9281,7 +9296,7 @@ Formato della linea 'component' errato! tensione dell'impulso - + Voltage Pulse Impulso di Tensione @@ -9301,7 +9316,7 @@ Formato della linea 'component' errato! - + Rectangle Voltage Tensione Rettangolare @@ -9395,7 +9410,7 @@ Formato della linea 'component' errato! Tabella della verità - + ERROR: Cannot open file "%1". ERRORE: Impossibile aprire il file "%1". @@ -9440,13 +9455,13 @@ Sovrascrivere ? - + Successfully exported - + Disk write error! @@ -9465,7 +9480,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9564,16 +9579,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9585,7 +9600,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Modifica proprietà @@ -9595,7 +9610,7 @@ Use PNG, JPEG or SVG graphics! - + power matching adattamento in potenza @@ -9660,7 +9675,7 @@ Use PNG, JPEG or SVG graphics! Testo - + Rectangle Rettangolo @@ -9670,7 +9685,7 @@ Use PNG, JPEG or SVG graphics! Rettangolo riempito - + Edit Rectangle Properties Modifica Proprietà Rettangolo @@ -9689,15 +9704,15 @@ Use PNG, JPEG or SVG graphics! senza titolo - - + + Format Error: 'Painting' field is not closed! Errore di formato: Il campo 'Painting' non è chiuso! - + Wrong document version: Versione documento errata: @@ -9715,7 +9730,7 @@ Campo sconosciuto! - + Cannot open Verilog-A file "%1"! @@ -9736,7 +9751,7 @@ Campo sconosciuto! - + Cannot save document! Impossibile salvare il documento! @@ -9749,7 +9764,7 @@ Wrong property field limiter! Delimitatore del campo della proprietà errato! - + Format Error: Unknown property: Errore di formato: @@ -9865,14 +9880,14 @@ Formato della linea 'painting' errato! - + File Format Error: Unknown field! Errore nel formato del file: Campo sconosciuto! - + ERROR: Component "%1" has no analog model. ERRORE: Il componente "%1" non ha un modello analogico. @@ -9892,7 +9907,7 @@ Campo sconosciuto! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9902,12 +9917,12 @@ Campo sconosciuto! ATTENZIONE: Ignorato componente di simulazione nel sottocircuito "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ERRORE: E' ammessa una sola simulazione digitale. @@ -10129,7 +10144,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10178,7 +10193,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10188,8 +10203,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10600,12 +10615,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10636,12 +10651,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10653,17 +10668,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10698,7 +10713,7 @@ seven line XSPICE specification. - + core @@ -10709,7 +10724,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10721,7 +10736,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10749,7 +10764,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10785,7 +10800,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11057,7 +11072,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11084,7 +11099,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11324,8 +11339,24 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + QucsActiveFilter @@ -11381,29 +11412,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11478,7 +11509,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11513,7 +11544,7 @@ Change parameters and/or topology and try again! {2014, 2015 ?} - + Filter topology @@ -11549,12 +11580,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11564,12 +11595,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11644,12 +11675,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schema - + Data Display Visualizzazione dati @@ -11660,42 +11692,42 @@ Active Filter synthesis program - + VHDL Sources Sorgenti VHDL - - + + Verilog Sources Sorgenti Verilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Qualsiasi file - + The schematic search path has been refreshed. @@ -11710,7 +11742,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11720,7 +11752,7 @@ Active Filter synthesis program - + Open example… @@ -11735,14 +11767,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11752,23 +11784,23 @@ Active Filter synthesis program Schemi - + New Nuovo - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11781,7 +11813,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11791,7 +11823,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11826,13 +11858,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo contenuto del progetto corrente - + Search Components - + Clear @@ -11863,8 +11895,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11875,12 +11908,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11888,7 +11921,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11906,43 +11939,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Errore - + Cannot open "%1". Impossibile aprire "%1". - + Library is corrupt. La Libreria è danneggiata. - + - - - + + + - + Info Informazioni - + Default icon not found: %1.png - + -port -porta @@ -11953,14 +11986,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Il documento contiene modifiche non salvate! - + Do you want to save the changes before copying? @@ -12000,17 +12033,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Impossibile cancellare un file aperto! - - + + - - + + Warning Attenzione - + This will delete the file permanently! Continue ? Questo canceller�definitivamente il file! Continuare? @@ -12073,12 +12106,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Impossibile creare directory di lavoro ! - + Cannot create project directory ! Impossibile creare la directory del progetto ! @@ -12106,41 +12139,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12219,34 +12252,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Creazione nuovo schema... - - + + - + - + - + Ready. Pronto. - + Creating new text editor... Creazione nuovo editor di testo... - + Opening file... Apertura file... @@ -12268,12 +12301,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Salvataggio annullato - + Qucs Netlist @@ -12288,12 +12321,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Inserire un Nome Documento @@ -12353,7 +12387,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Abbandona - + untitled senza titolo @@ -12393,22 +12427,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12432,7 +12472,7 @@ Use subcircuit to crete Verilog-A module! Vuoi davvero uscire? - + The document was modified by another program ! Il documento è stato modificato da un altro programma! @@ -12532,7 +12572,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12612,7 +12659,7 @@ Sovrascrivere ? Impossibile scrivere "%1" ! - + Please open project with subcircuits! Apri progetto con i sottocircuiti! @@ -12679,7 +12726,7 @@ Have you saved the Verilog-A symbols? - + &New &Nuovo @@ -13517,7 +13564,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13559,7 +13637,7 @@ Install Content of a Package Installa il contenuto di un Package - + Convert data file @@ -13905,7 +13983,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13944,7 +14022,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13961,7 +14039,7 @@ Rotates the selected component by 90° counter-clockwise Ruota il componente selezionato di 90° in senso antiorario - + Mirror about X Axis Ribalta sull'asse X @@ -14374,12 +14452,12 @@ Avvia il programma di calcolo attenuatori - + Simulate Simula - + Simulates the current schematic Simula lo schema corrente @@ -14432,17 +14510,12 @@ Calcola la polarizzazione DC e la mostra - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Imposta Marker sul Grafico @@ -14461,7 +14534,7 @@ Sets a marker on a diagram's graph Imposta un marker sul grafico di un diagramma - + Show Last Messages Mostra Ultimi Messaggi @@ -14689,12 +14762,12 @@ Informazioni su Qt di Trolltech &Simulazione - + &View &Visualizza - + &Help &Aiuto @@ -14803,7 +14876,7 @@ Open - + Input Ingresso @@ -15467,7 +15540,7 @@ Abilita/disabilita indice QucsSettingsDialog - + Edit Qucs Properties Modifica proprietà di Qucs @@ -15476,7 +15549,7 @@ Abilita/disabilita indice Font (impostato dopo il reload): - + Large font size: @@ -15486,117 +15559,117 @@ Abilita/disabilita indice Colore di sfondo del documento: - + Language (set after reload): Lingua (effettiva dopo aver rilanciato l'applicazione): - + system language lingua di default - + English Inglese - + German Tedesco - + French Francese - + Spanish Spagnolo - + Italian Italiano - + Polish Polacco - + Romanian Rumeno - + Japanese Giapponese - + Swedish Svedese - + Hungarian Ungherese - + Hebrew Ebraico - + Portuguese-BR - + Portuguese-PT - + Turkish Turco - + Ukrainian Ucraino - + Russian Russo - + Czech Ceco - + Catalan Catalano - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15606,12 +15679,12 @@ Abilita/disabilita indice - + Kazakh - + Maximum undo operations: @@ -15641,7 +15714,7 @@ Abilita/disabilita indice - + Draw diagrams with anti-aliasing feature: @@ -15656,17 +15729,17 @@ Abilita/disabilita indice - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15680,6 +15753,26 @@ Abilita/disabilita indice Settings Impostazioni + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15843,7 +15936,7 @@ fine di aprirli utilizzando il programma appropriato. Valori predefiniti - + Error Errore @@ -15853,7 +15946,7 @@ fine di aprirli utilizzando il programma appropriato. Questo suffisso è già stato registrato! - + Select the home directory @@ -16453,7 +16546,7 @@ fine di aprirli utilizzando il programma appropriato. Qucs_S_SPAR_Viewer - + &File &File @@ -16478,7 +16571,7 @@ fine di aprirli utilizzando il programma appropriato. - + &Help &Aiuto @@ -16494,7 +16587,7 @@ fine di aprirli utilizzando il programma appropriato. - + Qucs-S S-parameter Help @@ -16527,24 +16620,24 @@ Copyright (C) 2024 by - - + + Warning Attenzione - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16568,7 +16661,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16619,7 +16712,7 @@ Copyright (C) 2024 by Schematic - + Title Titolo @@ -16639,7 +16732,7 @@ Copyright (C) 2024 by Versione: - + Edit Schematic @@ -16675,12 +16768,12 @@ Edits the symbol for this schematic Modifica il simbolo per questo schema - + generic - + Error Errore @@ -16698,7 +16791,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16942,7 +17035,7 @@ Set the admsXml location on the application settings. creazione netlist... - + Error Errore @@ -16954,7 +17047,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16980,13 +17073,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16997,7 +17090,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17062,12 +17155,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17082,40 +17175,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Annulla - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17125,7 +17228,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17135,7 +17238,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17168,7 +17271,24 @@ Set the admsXml location on the application settings. File: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic mostra nome file nello schema @@ -17223,7 +17343,7 @@ Set the admsXml location on the application settings. Annulla - + Select a file Seleziona un file @@ -17293,50 +17413,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Apri - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply Applica - + Cancel Annulla - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17364,24 +17497,24 @@ No SUBCKT directive found in library - + Error Errore - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17406,7 +17539,8 @@ No SUBCKT directive found in library - + + Warning Attenzione @@ -17640,7 +17774,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17815,10 +17949,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Errore + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_ja.ts b/translations/qucs_ja.ts index a7940072e..0f0f5fcf5 100644 --- a/translations/qucs_ja.ts +++ b/translations/qucs_ja.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate シミュレート @@ -545,195 +550,195 @@ ComponentDialog - + Edit Component Properties 部品プロパティー編集 - + + Equation Editor + + + + + Put result in dataset + + + + Sweep スイープ - - - - - - - - - display in schematic - 回路図に表示 + 回路図に表示 - Simulation: - シミュレーション: + シミュレーション: - Sweep Parameter: - スイープパラメータ: + スイープパラメータ: - Type: - タイプ: + タイプ: - linear - リニア + リニア - logarithmic - ログ + ログ - list - リスト + リスト - constant - コンスタント + コンスタント - Values: - 値: + 値: - Start: - スタート: + スタート: - Stop: - ストップ: + ストップ: - - - Step: - ステップ: + ステップ: - Number: - ステップ数: + ステップ数: - - + + Properties プロパティー - Name: - 名前 : + 名前 : - + + Name 名前 - - Value - 値 + + Simulation + シミュレーション - display - 表示 + Sweep Parameter + - Description - 説明 + Type + タイプ - - Edit - 編集 + + Values + - - Browse - 参照 + + Start + - - Add - 追加 + + Stop + - - Remove - 削除 + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + 値 + + + + Show - + display + 表示 + + + + Description + 説明 + + + Edit + 編集 + + + Browse + 参照 + + + Add + 追加 + + + Remove + 削除 + + OK - OK + OK - Apply - 適用 + 適用 - Cancel - キャンセル + キャンセル - - - - - - - - - yes - はい + はい - - - - - no - いいえ + いいえ - + Select a file 選択されたファイル @@ -768,66 +773,65 @@ Verilog ファイル - Points per decade: - ポイント数: + ポイント数: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic 回路図に表示 - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply 適用 - + Cancel キャンセル - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +839,7 @@ DiagramDialog - + Edit Diagram Properties グラフプロパティー編集 @@ -1358,38 +1362,38 @@ シミュレート - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1399,12 +1403,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1415,17 +1419,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2159,12 +2163,12 @@ Node name will not be changed. - + Library Name: ライブラリ名: - + Choose subcircuits: サブサーキットを選択: @@ -2174,7 +2178,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All 全て選択 @@ -2316,7 +2325,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2328,7 +2337,7 @@ Node name will not be changed. - + Error creating library. @@ -2893,7 +2902,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3634,6 +3643,7 @@ but is %1 ! + delay time (SPICE only) @@ -3648,7 +3658,7 @@ but is %1 ! AM変調ソース - + ideal ac current source 理想AC電流源 @@ -3657,14 +3667,19 @@ but is %1 ! peak current in Ampere ピーク電流(A) + + + offset current (SPICE only) + + - + damping factor (transient simulation only) ダンピングファクター（トランジェント解析のみ） - + ac Current Source AC電流源 @@ -3679,7 +3694,7 @@ but is %1 ! 電流(A) - + dc Current Source DC電流源 @@ -3958,7 +3973,7 @@ but is %1 ! - + transfer function scaling factor @@ -3975,7 +3990,7 @@ but is %1 ! - + npn transistor NPNトランジスタ @@ -4538,20 +4553,20 @@ but is %1 ! HI信号レベル - + - + - + - + @@ -4566,16 +4581,16 @@ but is %1 ! - - + + - + - + Error エラー @@ -5128,7 +5143,7 @@ Wrong 'component' line format! - + Diode ダイオード @@ -6035,6 +6050,7 @@ Wrong 'component' line format! + put result into dataset 結果をデータセットに入力 @@ -6321,7 +6337,7 @@ Wrong 'component' line format! トランジェントシミュレーション初期電流 - + Inductor インダクタ @@ -6412,7 +6428,7 @@ Wrong 'component' line format! 初期遅延時間 - + Rectangle Current 矩形波電流 @@ -6513,7 +6529,7 @@ Wrong 'component' line format! - + n-JFET n-JFET @@ -7173,7 +7189,7 @@ Wrong 'component' line format! MOS-FET - + n-MOSFET @@ -7191,7 +7207,7 @@ Wrong 'component' line format! - + zero-bias threshold voltage ゼロバイアス スレッショルド電圧 @@ -7382,8 +7398,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8157,7 +8173,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8372,7 +8388,7 @@ Wrong 'component' line format! - + Resistor 抵抗 @@ -8512,8 +8528,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (有効)交流電力[W] + (有効)交流電力[W] @@ -8601,7 +8621,7 @@ Wrong 'component' line format! SPICEネットリストファイル - + SPICE netlist SPICEネットリスト @@ -8616,7 +8636,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". エラー:SPICE部品"%1"というファイル名がありません. @@ -8637,7 +8657,7 @@ Wrong 'component' line format! エラー;　変換済みスパイスファイル"%1"を開けません. - + Info 情報 @@ -8698,12 +8718,7 @@ Wrong 'component' line format! ポートタイプ（ディジタルシミュレーションのみ） - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port サブサーキットポート @@ -8771,7 +8786,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9221,7 +9236,7 @@ Wrong 'component' line format! 理想DC電圧源 - + dc Voltage Source DC電圧源 @@ -9266,7 +9281,7 @@ Wrong 'component' line format! パルスの電圧 - + Voltage Pulse 電圧パルス @@ -9286,7 +9301,7 @@ Wrong 'component' line format! - + Rectangle Voltage 矩形電圧 @@ -9380,7 +9395,7 @@ Wrong 'component' line format! 真値テーブル - + ERROR: Cannot open file "%1". エラー;　ファイル"%1"を開けません. @@ -9422,13 +9437,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9447,7 +9462,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9546,16 +9561,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9567,7 +9582,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties プロパティ編集 @@ -9577,7 +9592,7 @@ Use PNG, JPEG or SVG graphics! - + power matching 電力マッチング @@ -9642,7 +9657,7 @@ Use PNG, JPEG or SVG graphics! テキスト - + Rectangle 長方形 @@ -9652,7 +9667,7 @@ Use PNG, JPEG or SVG graphics! 塗りつぶし長方形 - + Edit Rectangle Properties 長方形プロパティー編集 @@ -9671,15 +9686,15 @@ Use PNG, JPEG or SVG graphics! タイトル無し - - + + Format Error: 'Painting' field is not closed! フォーマットエラー: 'Painting’ フィールドが閉じられていません! - + Wrong document version: ドキュメントのバージョンが違います: @@ -9697,7 +9712,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9718,7 +9733,7 @@ Unknown field! - + Cannot save document! ドキュメントをセーブできません! @@ -9731,7 +9746,7 @@ Wrong property field limiter! 誤ったプロパティーフィールドリミットです! - + Format Error: Unknown property: フォーマットエラー: @@ -9847,14 +9862,14 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! ファイルフォーマットエラー: 未知のフィールドです! - + ERROR: Component "%1" has no analog model. エラー:部品"%1"はアナログモデルがありません. @@ -9874,7 +9889,7 @@ Unknown field! 警告:　ライブラリ部品"%1"をスキップしています. - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9884,12 +9899,12 @@ Unknown field! 警告:サブサーキット中の部品"%1"のシミュレーションは無視されます. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. エラー:ディジタルシミュレーションのみ許可されています. @@ -10091,7 +10106,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10140,7 +10155,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10150,8 +10165,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10562,12 +10577,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10598,12 +10613,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10615,17 +10630,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10660,7 +10675,7 @@ seven line XSPICE specification. - + core @@ -10671,7 +10686,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10683,7 +10698,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10711,7 +10726,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10747,7 +10762,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11019,7 +11034,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11046,7 +11061,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11286,6 +11301,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11343,29 +11374,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11440,7 +11471,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11474,7 +11505,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11510,12 +11541,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11525,12 +11556,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11605,12 +11636,13 @@ Active Filter synthesis program QucsApp - + + Schematic 回路図 - + Data Display データ表示 @@ -11621,42 +11653,42 @@ Active Filter synthesis program - + VHDL Sources VHDLソース - - + + Verilog Sources Verilogソース - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File いずれかのファイル - + The schematic search path has been refreshed. @@ -11671,7 +11703,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11681,7 +11713,7 @@ Active Filter synthesis program - + Open example… @@ -11696,14 +11728,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11713,23 +11745,23 @@ Active Filter synthesis program 回路図 - + New 新規 - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11742,7 +11774,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11752,7 +11784,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11787,13 +11819,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 現在のプロジェクトの内容 - + Search Components - + Clear @@ -11824,8 +11856,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11836,12 +11869,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11849,7 +11882,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11867,43 +11900,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo エラー - + Cannot open "%1". 開けません"%1". - + Library is corrupt. ライブラリが壊れています. - + - - - + + + - + Info 情報 - + Default icon not found: %1.png - + -port -port @@ -11914,13 +11947,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! ドキュメントに保存されていない変更があります! - + Do you want to save the changes before copying? @@ -11960,17 +11993,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo ファイルを削除できません! - - + + - - + + Warning 注意 - + This will delete the file permanently! Continue ? 完全にファイルを削除します! 続けますか? @@ -12033,12 +12066,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! ワークディレクトリを作成できません ! - + Cannot create project directory ! プロジェクトディレクトリを作成できません ! @@ -12066,41 +12099,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12179,34 +12212,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 新しい回路図を作成しています... - - + + - + - + - + Ready. 準備完了. - + Creating new text editor... 新しいテキストエディタを作成しています... - + Opening file... ファイルを開いています... @@ -12228,12 +12261,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted 保存を中断しました - + Qucs Netlist @@ -12248,12 +12281,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name ドキュメント名を入力 @@ -12312,7 +12346,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 破棄(&D) - + untitled タイトル無し @@ -12352,22 +12386,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12391,7 +12431,7 @@ Use subcircuit to crete Verilog-A module! 本当に終了しますか? - + The document was modified by another program ! このドキュメントは他のプログラムによって変更されています! @@ -12491,7 +12531,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12571,7 +12618,7 @@ Overwrite ? "%1"を書き込みできません! - + Please open project with subcircuits! サブサーキットと共にプロジェクトを開いてください! @@ -12638,7 +12685,7 @@ Have you saved the Verilog-A symbols? - + &New 新規(&N) @@ -13477,7 +13524,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13525,7 +13603,7 @@ Install Content of a Package データインポート/エクスポート(&I) - + Convert data file データファイル変換 @@ -13873,7 +13951,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13912,7 +13990,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13929,7 +14007,7 @@ Rotates the selected component by 90° counter-clockwise 選択された部品を時計周りに90°回転 - + Mirror about X Axis X軸で反転 @@ -14340,12 +14418,12 @@ Starts attenuator calculation program - + Simulate シミュレート - + Simulates the current schematic 現在の回路図をシミュレートする @@ -14397,17 +14475,12 @@ DCバイアス計算 - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph グラフにマーカをセットします @@ -14426,7 +14499,7 @@ Sets a marker on a diagram's graph グラフ上にマーカをセットします - + Show Last Messages 最後のメッセージを見る @@ -14656,12 +14729,12 @@ TrolltechによるQtについて シミュレーション(&S) - + &View ビュー(&V) - + &Help ヘルプ(&H) @@ -14770,7 +14843,7 @@ Open - + Input 入力 @@ -15412,7 +15485,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties Qucsプロパティー編集 @@ -15421,7 +15494,7 @@ Enables/disables the table of contents フォント (再起動時に有効): - + Large font size: @@ -15431,117 +15504,117 @@ Enables/disables the table of contents バックグラウンド色 : - + Language (set after reload): 言語(再起動後に有効になります）: - + system language システム言語 - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese 日本語 - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15551,12 +15624,12 @@ Enables/disables the table of contents - + Kazakh - + Maximum undo operations: @@ -15586,7 +15659,7 @@ Enables/disables the table of contents - + Draw diagrams with anti-aliasing feature: @@ -15601,17 +15674,17 @@ Enables/disables the table of contents - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15625,6 +15698,26 @@ Enables/disables the table of contents Settings 設定 + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15787,7 +15880,7 @@ open files with an appropriate program. デフォルトに戻す - + Error エラー @@ -15797,7 +15890,7 @@ open files with an appropriate program. このサフィックスは既に登録されています! - + Select the home directory @@ -16391,7 +16484,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File ファイル(&F) @@ -16416,7 +16509,7 @@ open files with an appropriate program. - + &Help ヘルプ(&H) @@ -16432,7 +16525,7 @@ open files with an appropriate program. Qtについて... - + Qucs-S S-parameter Help @@ -16465,24 +16558,24 @@ Copyright (C) 2024 by - - + + Warning 注意 - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16506,7 +16599,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16557,7 +16650,7 @@ Copyright (C) 2024 by Schematic - + Title タイトル @@ -16577,7 +16670,7 @@ Copyright (C) 2024 by リビジョン: - + Edit Schematic @@ -16613,12 +16706,12 @@ Edits the symbol for this schematic この回路図の為のシンボルを編集 - + generic - + Error エラー @@ -16636,7 +16729,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16879,7 +16972,7 @@ Set the admsXml location on the application settings. ネットリストを作成中... - + Error エラー @@ -16891,7 +16984,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16917,13 +17010,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16934,7 +17027,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16999,12 +17092,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17019,40 +17112,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel キャンセル - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17062,7 +17165,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17072,7 +17175,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17105,7 +17208,24 @@ Set the admsXml location on the application settings. ファイル: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic 回路図にファイル名を表示 @@ -17160,7 +17280,7 @@ Set the admsXml location on the application settings. キャンセル - + Select a file 選択されたファイル @@ -17230,50 +17350,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open 開く - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply 適用 - + Cancel キャンセル - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17301,24 +17434,24 @@ No SUBCKT directive found in library - + Error エラー - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17343,7 +17476,8 @@ No SUBCKT directive found in library - + + Warning 注意 @@ -17575,7 +17709,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17750,10 +17884,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 エラー + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_kk.ts b/translations/qucs_kk.ts index f9e67566e..f6360c021 100644 --- a/translations/qucs_kk.ts +++ b/translations/qucs_kk.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Модельдеу @@ -545,195 +550,195 @@ ComponentDialog - + Edit Component Properties Компоненттердің қасиетін өзгерту - + + Equation Editor + + + + + Put result in dataset + + + + Sweep бұрап ашу - - - - - - - - - display in schematic - сұлбада көрсету + сұлбада көрсету - Simulation: - Моделдеу: + Моделдеу: - Sweep Parameter: - Бұрап ашу параметрлері: + Бұрап ашу параметрлері: - Type: - Тип: + Тип: - linear - сызықтық + сызықтық - logarithmic - логарифмдік + логарифмдік - list - мәндер тізімі + мәндер тізімі - constant - тұрақты + тұрақты - Values: - Мағыналар: + Мағыналар: - Start: - Бастау: + Бастау: - Stop: - Тоқта: + Тоқта: - - - Step: - Қадам: + Қадам: - Number: - Сан: + Сан: - - + + Properties Қасиеті - Name: - Аты: + Аты: - + + Name Аты - - Value - Мағына + + Simulation + Моделдеу - display - көрсету + Sweep Parameter + - Description - бейнелеу + Type + Тип - - Edit - Өзгерту + + Values + - - Browse - Көріп шығу + + Start + - - Add - Қосу + + Stop + - - Remove - Жою + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Мағына + + + + Show - + display + көрсету + + + + Description + бейнелеу + + + Edit + Өзгерту + + + Browse + Көріп шығу + + + Add + Қосу + + + Remove + Жою + + OK - ИЯ + ИЯ - Apply - Қолдану + Қолдану - Cancel - Жоқ + Жоқ - - - - - - - - - yes - ия + ия - - - - - no - жоқ + жоқ - + Select a file Файлды таңдау @@ -768,66 +773,65 @@ Verilog файлдары - Points per decade: - Бір ондыққа шақ келетін нүктелер саны: + Бір ондыққа шақ келетін нүктелер саны: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic сұлбада көрсету - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Қолдану - + Cancel - + OK ИЯ - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +839,7 @@ DiagramDialog - + Edit Diagram Properties Диаграмма қасиетін өзгерту @@ -1366,38 +1370,38 @@ Модельдеу - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1407,12 +1411,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1423,17 +1427,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2185,12 +2189,12 @@ Node name will not be changed. - + Library Name: Кітапхана аты: - + Choose subcircuits: Ішіндегі сұлбаны таңдау: @@ -2200,7 +2204,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Бәрін таңдау @@ -2342,7 +2351,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2354,7 +2363,7 @@ Node name will not be changed. - + Error creating library. @@ -2918,7 +2927,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3659,6 +3668,7 @@ but is %1 ! + delay time (SPICE only) @@ -3673,7 +3683,7 @@ but is %1 ! АМ модуляцияның қорек көзі - + ideal ac current source айнымалы тоқтың идеалды қорек көзі @@ -3682,14 +3692,19 @@ but is %1 ! peak current in Ampere шыңдық ток Ампермен + + + offset current (SPICE only) + + - + damping factor (transient simulation only) өшу коэффициенті (тек қана өтпелі моделдеу үшін) - + ac Current Source айнымалы тоқтың қорек көзі @@ -3704,7 +3719,7 @@ but is %1 ! тоқ Ампермен - + dc Current Source тұрақты тоқтың қорек көзі @@ -3983,7 +3998,7 @@ but is %1 ! - + transfer function scaling factor масштаб коэффициентінің беріліс функциясы @@ -4000,7 +4015,7 @@ but is %1 ! - + npn transistor npn транзистор @@ -4563,20 +4578,20 @@ but is %1 ! жоғары деңгейдегі кернеу - + - + - + - + @@ -4591,16 +4606,16 @@ but is %1 ! - - + + - + - + Error Қате @@ -5152,7 +5167,7 @@ Wrong 'component' line format! Диод үшін үндестік бойынша берілген аумақ - + Diode Диод @@ -6243,6 +6258,7 @@ Wrong 'component' line format! + put result into dataset мәліметтер қорынан нәтижені алу @@ -6529,7 +6545,7 @@ Wrong 'component' line format! өтпелі процесті моделдеу үшін бастапқы ток - + Inductor Индуктивтілік катушка @@ -6620,7 +6636,7 @@ Wrong 'component' line format! бастапқы кідіріс уақыты - + Rectangle Current Тікбұрышты формалы ток көзі @@ -6721,7 +6737,7 @@ Wrong 'component' line format! п-н өткелімен басқарылатын өрістік транзистор үшін үндестік бойынша берілген аумақ - + n-JFET n-JFET @@ -7385,7 +7401,7 @@ Wrong 'component' line format! МОП өрістік транзистор - + n-MOSFET n-МОП @@ -7403,7 +7419,7 @@ Wrong 'component' line format! МОП кедейленген өрістік транзистор типі - + zero-bias threshold voltage нөлдік ығысу кезіндегі табалдырықтық кернеу @@ -7594,8 +7610,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8369,7 +8385,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8584,7 +8600,7 @@ Wrong 'component' line format! - + Resistor Резистор @@ -8724,8 +8740,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (қол жетерлік) айнымалы токтағы қуат ватпен өлшегенде + (қол жетерлік) айнымалы токтағы қуат ватпен өлшегенде @@ -8813,7 +8833,7 @@ Wrong 'component' line format! SPICE сұлбасының файлы - + SPICE netlist SPICE сұлбасы @@ -8828,7 +8848,7 @@ Wrong 'component' line format! SPICE - + ERROR: No file name in SPICE component "%1". ҚАТЕ: "%1"SPICE компонентінің аты жоқ. @@ -8849,7 +8869,7 @@ Wrong 'component' line format! Қате: Түрлендірілген SPICE "%1" файлды ашу мүмкін емес . - + Info Ақпарат @@ -8910,12 +8930,7 @@ Wrong 'component' line format! порттың типі (тек қана цифрлық моделдеу үшін) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Сұлбаның порты @@ -8983,7 +8998,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9433,7 +9448,7 @@ Wrong 'component' line format! тұрақты кернеудің әмбебап қорек көзі - + dc Voltage Source Тұрақты токтағы кернеудің қорек көзі @@ -9478,7 +9493,7 @@ Wrong 'component' line format! импульс кезіндегі кернеу - + Voltage Pulse Импульстік кернеудің қорек көзі @@ -9498,7 +9513,7 @@ Wrong 'component' line format! - + Rectangle Voltage Тікбұрышты формалы кернеу көзі @@ -9592,7 +9607,7 @@ Wrong 'component' line format! Ақиқаттық кесте - + ERROR: Cannot open file "%1". ҚАТЕ: Файлды "%1" ашу мүмкін емес. @@ -9633,13 +9648,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9658,7 +9673,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9757,16 +9772,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9778,7 +9793,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Қасиеттерін Өзгерту @@ -9788,7 +9803,7 @@ Use PNG, JPEG or SVG graphics! - + power matching қуатты сәйкестендіру @@ -9853,7 +9868,7 @@ Use PNG, JPEG or SVG graphics! Мәтін - + Rectangle Тіктөртбұрыш @@ -9863,7 +9878,7 @@ Use PNG, JPEG or SVG graphics! іші толтырылған тіктөртбұрыш - + Edit Rectangle Properties Тіктөртбұрыш қасиеттерін өзгерту @@ -9882,15 +9897,15 @@ Use PNG, JPEG or SVG graphics! аты жоқ - - + + Format Error: 'Painting' field is not closed! Пішімде қате бар: 'Painting' өрісі жабық емес! - + Wrong document version: Құжаттың нұсқасы дұрыс емес: @@ -9908,7 +9923,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9929,7 +9944,7 @@ Unknown field! - + Cannot save document! Құжатты сақтау мүмкін емес! @@ -9942,7 +9957,7 @@ Wrong property field limiter! Өріс шектеуінің қасиеті дұрыс емес! - + Format Error: Unknown property: Пішімде қате бар: @@ -10058,13 +10073,13 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! Файл пішімінде қате бар: Белгісіз өріс! - + ERROR: Component "%1" has no analog model. ҚАТЕ: "%1" компонентінің аналогтық моделі жоқ. @@ -10084,7 +10099,7 @@ Unknown field! ЕСКЕРТУ:"%1" кітапхананың компонентасы жетіспейді. - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -10094,12 +10109,12 @@ Unknown field! ЕСКЕРТУ:"%1" сұлбадағы моделдеу компонентасы қабылданбайды. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ҚАТЕ: Тек қана бір цифрлық моделдеуге рұқсат етіледі. @@ -10320,7 +10335,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10369,7 +10384,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10379,8 +10394,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10791,12 +10806,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10827,12 +10842,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10844,17 +10859,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10889,7 +10904,7 @@ seven line XSPICE specification. - + core @@ -10900,7 +10915,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10912,7 +10927,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10940,7 +10955,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10976,7 +10991,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11248,7 +11263,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11275,7 +11290,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11515,6 +11530,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11572,29 +11603,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11669,7 +11700,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11703,7 +11734,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 by {2014, 2015 ?} - + Filter topology @@ -11739,12 +11770,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11754,12 +11785,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11834,12 +11865,13 @@ Active Filter synthesis program QucsApp - + + Schematic Сұлба - + Data Display Мәліметтерді көру терезесі @@ -11850,42 +11882,42 @@ Active Filter synthesis program - + VHDL Sources VHDL қорек көздері - - + + Verilog Sources Verilog қорек көздері - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Басқа файл - + The schematic search path has been refreshed. @@ -11900,7 +11932,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11910,7 +11942,7 @@ Active Filter synthesis program - + Open example… @@ -11925,14 +11957,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11942,23 +11974,23 @@ Active Filter synthesis program Сұлбалар - + New Құру - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11971,7 +12003,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11981,7 +12013,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -12016,13 +12048,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo қолданыстағы проекттің мазмұны - + Search Components - + Clear @@ -12053,8 +12085,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -12065,12 +12098,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -12078,7 +12111,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -12096,43 +12129,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Қате - + Cannot open "%1". Ашуға мүмкіндік болмады"%1". - + Library is corrupt. Кітапхана бұзылған. - + - - - + + + - + Info Ақпарат - + Default icon not found: %1.png - + -port -порттық @@ -12143,14 +12176,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Құжатта сақталмаған өзгертулер бар! - + Do you want to save the changes before copying? @@ -12190,17 +12223,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Ашық файлды жою мүмкін емес! - - + + - - + + Warning Ескерту - + This will delete the file permanently! Continue ? Файлды жою қайтарылмайды! Жалғастырасыз ба? @@ -12263,12 +12296,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Жұмыс папкасы құрылмады ! - + Cannot create project directory ! Проект папкасын құру мүмкін емес ! @@ -12296,41 +12329,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12409,34 +12442,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Жаңа сұлбаны құру... - - + + - + - + - + Ready. Дайын. - + Creating new text editor... Жаңа мәтіндік редакторды құру... - + Opening file... Файлды ашу... @@ -12458,12 +12491,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Сақтауды үзү - + Qucs Netlist @@ -12478,12 +12511,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Құжат атын енгізіңіз @@ -12543,7 +12577,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Сақтаусыз жабу - + untitled аты жоқ @@ -12583,22 +12617,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12622,7 +12662,7 @@ Use subcircuit to crete Verilog-A module! Бағдарламалық қамтамадан шыққыңыз келеді ма? - + The document was modified by another program ! Бұл құжат басқа бағдарламалық қамтамамен өзгертілген! @@ -12722,7 +12762,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12801,7 +12848,7 @@ Overwrite ? Жазу мүмкін емес"%1"! - + Please open project with subcircuits! Сұлбасы бар проектті ашыңыз! @@ -12868,7 +12915,7 @@ Have you saved the Verilog-A symbols? - + &New &Құру @@ -13709,7 +13756,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13755,7 +13833,7 @@ Install Content of a Package &Мәліметтерді импорттау/экспорттау ... - + Convert data file Мәліметтер файлын түрлендіру @@ -14103,7 +14181,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -14142,7 +14220,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -14159,7 +14237,7 @@ Rotates the selected component by 90° counter-clockwise Ерекшеленген компонентті сағат тіліне қарсы 90°-қа бұрады - + Mirror about X Axis X өсіне байланысты бейнелеу @@ -14572,12 +14650,12 @@ Starts attenuator calculation program - + Simulate Модельдеу - + Simulates the current schematic Қоданыстағы сұлбаны моделдейді @@ -14630,17 +14708,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Диаграммада маркерді орналастыру @@ -14659,7 +14732,7 @@ Sets a marker on a diagram's graph Диаграмма графигінде маркерді орналастырады - + Show Last Messages Соңғы хабарды көрсету @@ -14889,12 +14962,12 @@ Trolltech Qt жайлы &Моделдеу - + &View &Түр - + &Help &Көмек @@ -15003,7 +15076,7 @@ Open - + Input Кіріс @@ -15659,7 +15732,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties Qucs қасиеттерін өзгерту @@ -15668,7 +15741,7 @@ Enables/disables the table of contents Шрифт (қайта қосудан кейін іске қосылады): - + Large font size: @@ -15678,117 +15751,117 @@ Enables/disables the table of contents Құжат фонының түсі: - + Language (set after reload): Тіл (қайта қосудан кейін іске қосылады): - + system language жүйелік тіл - + English Ағылшынша - + German Немісше - + French Французша - + Spanish Испандық - + Italian Италиандық - + Polish Польшалық - + Romanian Румынша - + Japanese Жапондық - + Swedish Шведтық - + Hungarian Венгерлік - + Hebrew Івріттік - + Portuguese-BR - + Portuguese-PT - + Turkish Түрікше - + Ukrainian Украиндық - + Russian Орысша - + Czech Чехтық - + Catalan Каталондық - + Arabic Арабша - + Chinese - + Schematic font (set after reload): @@ -15798,12 +15871,12 @@ Enables/disables the table of contents - + Kazakh - + Maximum undo operations: @@ -15833,7 +15906,7 @@ Enables/disables the table of contents - + Draw diagrams with anti-aliasing feature: @@ -15848,17 +15921,17 @@ Enables/disables the table of contents - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15872,6 +15945,26 @@ Enables/disables the table of contents Settings Реттемелер + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -16034,7 +16127,7 @@ open files with an appropriate program. Үндестік бойынша берілген мән - + Error Қате @@ -16044,7 +16137,7 @@ open files with an appropriate program. Бұл кеңейту тіркелген! - + Select the home directory @@ -16638,7 +16731,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Файл @@ -16663,7 +16756,7 @@ open files with an appropriate program. - + &Help &Көмек @@ -16679,7 +16772,7 @@ open files with an appropriate program. Qt жайлы... - + Qucs-S S-parameter Help @@ -16712,24 +16805,24 @@ Copyright (C) 2024 by - - + + Warning Ескерту - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16753,7 +16846,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16804,7 +16897,7 @@ Copyright (C) 2024 by Schematic - + Title Аты @@ -16824,7 +16917,7 @@ Copyright (C) 2024 by Тексерген: - + Edit Schematic @@ -16860,12 +16953,12 @@ Edits the symbol for this schematic Бұл сұлбаның белгісін өзгерту - + generic - + Error Қате @@ -16883,7 +16976,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -17126,7 +17219,7 @@ Set the admsXml location on the application settings. сұлбаны құру... - + Error Қате @@ -17138,7 +17231,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -17164,13 +17257,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -17181,7 +17274,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17246,12 +17339,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17266,40 +17359,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17309,7 +17412,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17319,7 +17422,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17352,7 +17455,24 @@ Set the admsXml location on the application settings. Файл: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic файл атын сұлбада көрсету @@ -17407,7 +17527,7 @@ Set the admsXml location on the application settings. Жоқ - + Select a file Файлды таңдау @@ -17477,50 +17597,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Ашу - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK ИЯ - + Apply Қолдану - + Cancel - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17548,24 +17681,24 @@ No SUBCKT directive found in library - + Error Қате - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17590,7 +17723,8 @@ No SUBCKT directive found in library - + + Warning Ескерту @@ -17824,7 +17958,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17999,10 +18133,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Қате + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_pl.ts b/translations/qucs_pl.ts index 8d9eb4331..9930c4a31 100644 --- a/translations/qucs_pl.ts +++ b/translations/qucs_pl.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Sumuluj @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Edytuj właściwości elementu - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Przemiatanie - - - - - - - - - display in schematic - wyświetlaj na schemacie + wyświetlaj na schemacie - Simulation: - Symulacja: + Symulacja: - Sweep Parameter: - Parametr przemiatany: + Parametr przemiatany: - Type: - Typ: + Typ: - linear - liniowo + liniowo - logarithmic - logarytmicznie + logarytmicznie - list - lista wartości + lista wartości - constant - stała + stała - Values: - Wartości: + Wartości: - Start: - Start: + Start: - Stop: - Stop: + Stop: - - - Step: - Krok: + Krok: - Number: - Liczba: + Liczba: - - + + Properties Właściwości - Name: - Nazwa: + Nazwa: - + + Name Nazwa - - Value - Wartość + + Simulation + - display - wyświetlaj + Sweep Parameter + - Description - Opis + Type + Typ - - Edit - Edycja + + Values + - - Browse - Pokaż + + Start + - - Add - Dodaj + + Stop + - - Remove - Usuń + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Wartość + + + + Show - + display + wyświetlaj + + + + Description + Opis + + + Edit + Edycja + + + Browse + Pokaż + + + Add + Dodaj + + + Remove + Usuń + + OK - OK + OK - Apply - Zastosuj + Zastosuj - Cancel - Porzuć + Porzuć - - - - - - - - - yes - tak + tak - - - - - no - nie + nie - + Select a file Wybierz plik @@ -769,66 +774,65 @@ Plik Verilog - Points per decade: - Liczba punktów w dekadzie: + Liczba punktów w dekadzie: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic wyświetlaj na schemacie - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Zastosuj - + Cancel Porzuć - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Edycja właściwości wykresu @@ -1363,38 +1367,38 @@ Sumuluj - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1404,12 +1408,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1420,17 +1424,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2179,12 +2183,12 @@ Node name will not be changed. - + Library Name: Nazwa biblioteki: - + Choose subcircuits: Wybierz podukład: @@ -2194,7 +2198,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Zaznacz wszystko @@ -2336,7 +2345,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2348,7 +2357,7 @@ Node name will not be changed. - + Error creating library. @@ -2913,7 +2922,7 @@ a jest %1 ! Ngspice - + Problem with SaveNetlist @@ -3654,6 +3663,7 @@ a jest %1 ! + delay time (SPICE only) @@ -3668,7 +3678,7 @@ a jest %1 ! źródło modulowane AM - + ideal ac current source idealne źródło prądowe ac @@ -3677,14 +3687,19 @@ a jest %1 ! peak current in Ampere prąd szczytowy w Amperach + + + offset current (SPICE only) + + - + damping factor (transient simulation only) - + ac Current Source Źródło prądowe ac @@ -3699,7 +3714,7 @@ a jest %1 ! prąd w Amperach - + dc Current Source Źródło prądowe dc @@ -3978,7 +3993,7 @@ a jest %1 ! - + transfer function scaling factor @@ -3995,7 +4010,7 @@ a jest %1 ! - + npn transistor tranzystor npn @@ -4558,20 +4573,20 @@ a jest %1 ! napięcie stanu wysokiego - + - + - + - + @@ -4586,16 +4601,16 @@ a jest %1 ! - - + + - + - + Error Błąd @@ -5148,7 +5163,7 @@ Błędny format lini 'component'! domyślny obszar diody - + Diode Dioda @@ -6043,6 +6058,7 @@ Błędny format lini 'component'! + put result into dataset wstaw rezultaty do zbioru wyników @@ -6329,7 +6345,7 @@ Błędny format lini 'component'! prąd początkowy dla symulacji czasowej - + Inductor Cewka @@ -6420,7 +6436,7 @@ Błędny format lini 'component'! początkowe opóźnienie - + Rectangle Current Źródło prądowego przebiegu prostokątnego @@ -6521,7 +6537,7 @@ Błędny format lini 'component'! domyślny obszar transystora JFET - + n-JFET n-JFET @@ -7181,7 +7197,7 @@ Błędny format lini 'component'! tranzystor polowy MOS - + n-MOSFET n-MOSFET @@ -7199,7 +7215,7 @@ Błędny format lini 'component'! zubażany MOSFET - + zero-bias threshold voltage napięcie progowe (zero-bias) @@ -7390,8 +7406,8 @@ Błędny format lini 'component'! - - + + Use global SPICE temperature @@ -8165,7 +8181,7 @@ Błędny format lini 'component'! - + carrier signal frequency @@ -8380,7 +8396,7 @@ Błędny format lini 'component'! - + Resistor Opornik @@ -8520,8 +8536,12 @@ Błędny format lini 'component'! + (available) ac power in dBm + + + (available) ac power in Watts - moc dysponowana ac w Wattach + moc dysponowana ac w Wattach @@ -8609,7 +8629,7 @@ Błędny format lini 'component'! plik netlisty SPICE - + SPICE netlist netlista w formacie SPICE @@ -8624,7 +8644,7 @@ Błędny format lini 'component'! spice - + ERROR: No file name in SPICE component "%1". BŁĄD: Komponent SPICE "%1" nie ma nazwy pliku. @@ -8645,7 +8665,7 @@ Błędny format lini 'component'! BŁĄD: Nie można otworzyć przekonwertowanego pliku "%1". - + Info Informacja @@ -8706,12 +8726,7 @@ Błędny format lini 'component'! typ portu (tylko dla symulacji cyfrowej) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Port podukładu @@ -8779,7 +8794,7 @@ Błędny format lini 'component'! - + simulation temperature in degree Celsius (Qucsator only) @@ -9230,7 +9245,7 @@ Błędny format lini 'component'! idealne źródło napięciowe dc - + dc Voltage Source Źródło napięciowe dc @@ -9275,7 +9290,7 @@ Błędny format lini 'component'! napięcie impulsu - + Voltage Pulse Impuls Napięcia @@ -9295,7 +9310,7 @@ Błędny format lini 'component'! - + Rectangle Voltage Źródło napięciowego przebiegu prostokątnego @@ -9389,7 +9404,7 @@ Błędny format lini 'component'! Tabela prawdy - + ERROR: Cannot open file "%1". BŁĄD: Nie mogę otworzyć pliku "%1"!. @@ -9434,13 +9449,13 @@ Nadpisać ? - + Successfully exported - + Disk write error! @@ -9459,7 +9474,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9558,16 +9573,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9579,7 +9594,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Edytuj właściwości @@ -9589,7 +9604,7 @@ Use PNG, JPEG or SVG graphics! - + power matching dopasowanie mocy @@ -9654,7 +9669,7 @@ Use PNG, JPEG or SVG graphics! Tekst - + Rectangle Prostokąt @@ -9664,7 +9679,7 @@ Use PNG, JPEG or SVG graphics! wypełniony prostokąt - + Edit Rectangle Properties Zmień właściwości kwadratu @@ -9683,15 +9698,15 @@ Use PNG, JPEG or SVG graphics! bez nazwy - - + + Format Error: 'Painting' field is not closed! Błąd formatu: Pole 'Painting' nie zostało zamknięte! - + Wrong document version: Nieodpowiednia wersja dokumentu: @@ -9709,7 +9724,7 @@ Nieznane pole! - + Cannot open Verilog-A file "%1"! @@ -9730,7 +9745,7 @@ Nieznane pole! - + Cannot save document! Nie można zapisać pliku! @@ -9743,7 +9758,7 @@ Wrong property field limiter! Błędny ogranicznik pola właściwości! - + Format Error: Unknown property: Błąd formatu: @@ -9859,14 +9874,14 @@ Błędny format lini 'painting'! - + File Format Error: Unknown field! Błąd formatu pliku: Nieznane pole! - + ERROR: Component "%1" has no analog model. BŁĄD: Komponent "%1" nie ma modelu analogowego. @@ -9886,7 +9901,7 @@ Nieznane pole! OSTRZEŻENIE: Pominięto elelemnt biblioteczny "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9896,12 +9911,12 @@ Nieznane pole! OSTRZEŻENIE: Pomijam element w podukładzie "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. BŁĄD: Tylko jedna symulacja cyfrowa dozwolona. @@ -10125,7 +10140,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10174,7 +10189,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10184,8 +10199,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10596,12 +10611,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10632,12 +10647,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10649,17 +10664,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10694,7 +10709,7 @@ seven line XSPICE specification. - + core @@ -10705,7 +10720,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10717,7 +10732,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10745,7 +10760,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10781,7 +10796,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11053,7 +11068,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11080,7 +11095,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11320,6 +11335,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11377,29 +11408,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11474,7 +11505,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11508,7 +11539,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 by {2014, 2015 ?} - + Filter topology @@ -11544,12 +11575,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11559,12 +11590,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11639,12 +11670,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schemat - + Data Display Prezentacja wyników @@ -11655,42 +11687,42 @@ Active Filter synthesis program - + VHDL Sources Źródła VHDL - - + + Verilog Sources Źródła Verilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Dowolny Plik - + The schematic search path has been refreshed. @@ -11705,7 +11737,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11715,7 +11747,7 @@ Active Filter synthesis program - + Open example… @@ -11730,14 +11762,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11747,23 +11779,23 @@ Active Filter synthesis program Schematy - + New Nowy - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11776,7 +11808,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11786,7 +11818,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11821,13 +11853,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo zawartość aktaualnego projektu - + Search Components - + Clear @@ -11858,8 +11890,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11870,12 +11903,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11883,7 +11916,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11901,43 +11934,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Błąd - + Cannot open "%1". Nie można otworzyć "%1". - + Library is corrupt. Biblioteka jest uszkodzona. - + - - - + + + - + Info Informacja - + Default icon not found: %1.png - + -port -wrota @@ -11948,14 +11981,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Dokument zawiera niezapisane zmiany! - + Do you want to save the changes before copying? @@ -11995,17 +12028,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Nie mogę usunąć otwartego pliku ! - - + + - - + + Warning Ostrzeżenia - + This will delete the file permanently! Continue ? Ta operacja usunie bezpowrotnie plik! Czy chcesz kontynuować ? @@ -12068,12 +12101,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Nie mogę stworzyć katalogu roboczego! - + Cannot create project directory ! Nie mogę utworzyć katalogu projektowego ! @@ -12101,41 +12134,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12214,34 +12247,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Tworzenie nowego schematu... - - + + - + - + - + Ready. Gotowy. - + Creating new text editor... Tworzenie nowego tekstu... - + Opening file... Otwieranie pliku... @@ -12263,12 +12296,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Zapisywanie przerwane - + Qucs Netlist @@ -12283,12 +12316,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Podaj nazwę dokumentu @@ -12348,7 +12382,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Zaniechaj - + untitled bez nazwy @@ -12388,22 +12422,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12427,7 +12467,7 @@ Use subcircuit to crete Verilog-A module! Czy rzeczywiście chcesz zakończyć? - + The document was modified by another program ! Dokument został zmodyfikowany przez inny program ! @@ -12527,7 +12567,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12607,7 +12654,7 @@ Nadpisać ? Nie można pisać do "%1" ! - + Please open project with subcircuits! Proszę otworzyć projekt z podukładami! @@ -12674,7 +12721,7 @@ Have you saved the Verilog-A symbols? - + &New &Nowy @@ -13513,7 +13560,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13555,7 +13633,7 @@ Install Content of a Package instaluje zawartość paczki - + Convert data file @@ -13901,7 +13979,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13940,7 +14018,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13957,7 +14035,7 @@ Rotates the selected component by 90° counter-clockwise Obraca wybrany elelement o 90 stopni zgodnie z ruchem wskazówek zegara - + Mirror about X Axis Odbicie wzdłuż osi X @@ -14371,12 +14449,12 @@ Uruchamia program syntezy tłumików - + Simulate Sumuluj - + Simulates the current schematic Symuluje bieżący schemat @@ -14428,17 +14506,12 @@ Oblicza punkt pracy i wyświetla go - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Ustaw znacznik na wykresie @@ -14457,7 +14530,7 @@ Sets a marker on a diagram's graph Ustawia znacznik na wykresie - + Show Last Messages Pokaż ostatnie komunikaty @@ -14687,12 +14760,12 @@ O bibliotece QT firmy Trolltech &Symulacja - + &View &Widok - + &Help &Pomoc @@ -14801,7 +14874,7 @@ Open - + Input Wejście @@ -15464,7 +15537,7 @@ włącza/wyłącza wyświetlanie spisu treści QucsSettingsDialog - + Edit Qucs Properties Edytuj właściwości Qucs @@ -15473,7 +15546,7 @@ włącza/wyłącza wyświetlanie spisu treści Font (zmiana aktywna po ponownym uruchmieniu programu): - + Large font size: @@ -15483,117 +15556,117 @@ włącza/wyłącza wyświetlanie spisu treści Kolor tła dokumentu: - + Language (set after reload): Język (zmiana po ponowmym uruchomieniu): - + system language język systemowy - + English angielski - + German niemiecki - + French francuski - + Spanish hiszpański - + Italian włoski - + Polish polski - + Romanian rumuński - + Japanese japoński - + Swedish szwedzki - + Hungarian węgierski - + Hebrew hebrajski - + Portuguese-BR - + Portuguese-PT - + Turkish turecki - + Ukrainian ukraiński - + Russian rosyjski - + Czech czeski - + Catalan kataloński - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15603,12 +15676,12 @@ włącza/wyłącza wyświetlanie spisu treści - + Kazakh - + Maximum undo operations: @@ -15638,7 +15711,7 @@ włącza/wyłącza wyświetlanie spisu treści - + Draw diagrams with anti-aliasing feature: @@ -15653,17 +15726,17 @@ włącza/wyłącza wyświetlanie spisu treści - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15677,6 +15750,26 @@ włącza/wyłącza wyświetlanie spisu treści Settings Ustawienia + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15840,7 +15933,7 @@ otworzyć ten plik odpowiednim programem. Wartości domyślne - + Error Błąd @@ -15850,7 +15943,7 @@ otworzyć ten plik odpowiednim programem. Ten typ pliku jest już zarejestrowany! - + Select the home directory @@ -16450,7 +16543,7 @@ otworzyć ten plik odpowiednim programem. Qucs_S_SPAR_Viewer - + &File &Plik @@ -16475,7 +16568,7 @@ otworzyć ten plik odpowiednim programem. - + &Help &Pomoc @@ -16491,7 +16584,7 @@ otworzyć ten plik odpowiednim programem. O bibliotece QT... - + Qucs-S S-parameter Help @@ -16524,24 +16617,24 @@ Copyright (C) 2024 by - - + + Warning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16565,7 +16658,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16616,7 +16709,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -16636,7 +16729,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -16672,12 +16765,12 @@ Edits the symbol for this schematic Edytuj szmbol dla tego schematu - + generic - + Error Błąd @@ -16695,7 +16788,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16938,7 +17031,7 @@ Set the admsXml location on the application settings. - + Error Błąd @@ -16950,7 +17043,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16976,13 +17069,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16993,7 +17086,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17058,12 +17151,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17078,40 +17171,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Porzuć - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17121,7 +17224,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17131,7 +17234,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17164,7 +17267,24 @@ Set the admsXml location on the application settings. - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic @@ -17219,7 +17339,7 @@ Set the admsXml location on the application settings. Porzuć - + Select a file Wybierz plik @@ -17289,50 +17409,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Otwórz - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply Zastosuj - + Cancel Porzuć - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17360,24 +17493,24 @@ No SUBCKT directive found in library - + Error Błąd - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17402,7 +17535,8 @@ No SUBCKT directive found in library - + + Warning @@ -17636,7 +17770,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17811,10 +17945,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Błąd + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_pt_BR.ts b/translations/qucs_pt_BR.ts index bc266c8b4..17a6cccb8 100644 --- a/translations/qucs_pt_BR.ts +++ b/translations/qucs_pt_BR.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs Sobre Qucs @@ -26,7 +26,7 @@ Programador da GUI, Verilog-A carregador dinâmico - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -368,7 +373,7 @@ AbstractSpiceKernel - + Simulate Simular @@ -578,195 +583,203 @@ ComponentDialog - + Edit Component Properties Editar Propriedades do Componente - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Varrer - - - - - - - - - display in schematic - mostrar no esquemático + mostrar no esquemático - Simulation: - Simulação: + Simulação: - Sweep Parameter: - Varrer Parâmetro: + Varrer Parâmetro: - Type: - Tipo: + Tipo: - linear - linear + linear - logarithmic - logarítmico + logarítmico - list - lista + lista - constant - constante + constante - Values: - Valores: + Valores: - Start: - Início: + Início: - Stop: - Parar: + Parar: - - - Step: - Passo: + Passo: - Number: - Número: + Número: - - + + Properties Propriedades - Name: - Nome: + Nome: - + + Name Nome + + + Simulation + Simulação + + + + Sweep Parameter + + + + + Type + Tipo + + + + Values + + + + + Start + + + + + Stop + + + + + Step + + + Number + + + + + Populate parameters from SPICE file... + + + + Value Valor - + + Show + + + display - mostrar + mostrar - + Description Descrição - Edit - Editar + Editar - Browse - Procurar + Procurar - Add - Adicionar + Adicionar - Remove - Remover + Remover - Move Up - Mover para cima + Mover para cima - Move Down - Mover para baixo + Mover para baixo - - Fill from SPICE .MODEL - - - - OK - OK + OK - Apply - Aplicar + Aplicar - Cancel - Cancelar + Cancelar - - - - - - - - - yes - sim + sim - - - - - no - não + não - + Select a file Selecione um arquivo @@ -801,66 +814,65 @@ Arquivos VHDL - Points per decade: - Pontos por década: + Pontos por década: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic mostrar no esquemático - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Aplicar - + Cancel Cancelar - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -868,7 +880,7 @@ DiagramDialog - + Edit Diagram Properties Editar Propriedades do Diagrama @@ -1399,38 +1411,38 @@ Simular - + Stop - - + + Save netlist - + Exit Sair - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1440,12 +1452,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1456,17 +1468,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2356,12 +2368,12 @@ Node name will not be changed. - + Library Name: Nome da Biblioteca: - + Choose subcircuits: Escolher subcircuitos: @@ -2371,7 +2383,12 @@ Node name will not be changed. Adicionar descrição ao subcircuito - + + Analog models only + + + + Select All Selecionar Tudo @@ -2513,7 +2530,7 @@ Node name will not be changed. - + Creating Verilog netlist. Criando Verilog netlist. @@ -2525,7 +2542,7 @@ Node name will not be changed. Criando VHDL netlist. - + Error creating library. ERRO criando biblioteca. @@ -3110,7 +3127,7 @@ Programa de computação de código de cores de resistor Ngspice - + Problem with SaveNetlist @@ -3855,6 +3872,7 @@ Programa de computação de código de cores de resistor + delay time (SPICE only) @@ -3869,7 +3887,7 @@ Programa de computação de código de cores de resistor Fonte modulada AM - + ideal ac current source fonte de corrente ca ideal @@ -3878,14 +3896,19 @@ Programa de computação de código de cores de resistor peak current in Ampere corrente pico em Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) fator de amortecimento (simulação transitória apenas) - + ac Current Source Fonte de Corrente ca @@ -3900,7 +3923,7 @@ Programa de computação de código de cores de resistor corrente em Amperes - + dc Current Source Fonte de Corrente dc @@ -4179,7 +4202,7 @@ Programa de computação de código de cores de resistor - + transfer function scaling factor fator de escala função de transferência @@ -4196,7 +4219,7 @@ Programa de computação de código de cores de resistor - + npn transistor transistor npn @@ -4759,20 +4782,20 @@ Programa de computação de código de cores de resistor tensão no nível alto - + - + - + - + @@ -4787,16 +4810,16 @@ Programa de computação de código de cores de resistor - - + + - + - + Error Erro @@ -5356,7 +5379,7 @@ Formato da linha 'componente' errado! - + Diode Diodo @@ -6303,6 +6326,7 @@ Formato da linha 'componente' errado! + put result into dataset colocar resultado no conjunto de dados @@ -6589,7 +6613,7 @@ Formato da linha 'componente' errado! corrente inicial para simulação transiente - + Inductor Indutor @@ -6680,7 +6704,7 @@ Formato da linha 'componente' errado! tempo de atraso inicial - + Rectangle Current @@ -6781,7 +6805,7 @@ Formato da linha 'componente' errado! - + n-JFET JFET tipo n @@ -7437,7 +7461,7 @@ Formato da linha 'componente' errado! transistor MOS de efeito de campo - + n-MOSFET n-MOSFET @@ -7455,7 +7479,7 @@ Formato da linha 'componente' errado! MOSFET depleção - + zero-bias threshold voltage @@ -7646,8 +7670,8 @@ Formato da linha 'componente' errado! - - + + Use global SPICE temperature @@ -8421,7 +8445,7 @@ Formato da linha 'componente' errado! - + carrier signal frequency @@ -8636,7 +8660,7 @@ Formato da linha 'componente' errado! - + Resistor Resistor @@ -8776,7 +8800,7 @@ Formato da linha 'componente' errado! - (available) ac power in Watts + (available) ac power in dBm @@ -8865,7 +8889,7 @@ Formato da linha 'componente' errado! - + SPICE netlist SPICE netlist @@ -8880,7 +8904,7 @@ Formato da linha 'componente' errado! - + ERROR: No file name in SPICE component "%1". ERRO: Sem nome de arquivo no componente SPICE %1". @@ -8901,7 +8925,7 @@ Formato da linha 'componente' errado! ERRO: Não é possível abrir arquivo SPICE convertido "%1". - + Info Informação @@ -8962,12 +8986,7 @@ Formato da linha 'componente' errado! tipo de porta (para simulação digital apenas) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Porta do Subcircuito @@ -9035,7 +9054,7 @@ Formato da linha 'componente' errado! - + simulation temperature in degree Celsius (Qucsator only) @@ -9485,7 +9504,7 @@ Formato da linha 'componente' errado! fonte ideal de tensão cc - + dc Voltage Source Fonte de Tensão cc @@ -9530,7 +9549,7 @@ Formato da linha 'componente' errado! - + Voltage Pulse Pulso de Tensão @@ -9550,7 +9569,7 @@ Formato da linha 'componente' errado! - + Rectangle Voltage @@ -9644,7 +9663,7 @@ Formato da linha 'componente' errado! Tabela Verdade - + ERROR: Cannot open file "%1". ERRO: Não é possível abrir "%1". @@ -9686,13 +9705,13 @@ Sobrescrever? - + Successfully exported - + Disk write error! @@ -9712,7 +9731,7 @@ Use gráficos PNG, JPEG ou SVG! - + verilog-a user devices @@ -9811,16 +9830,16 @@ Use gráficos PNG, JPEG ou SVG! - + - + diagrams diagramas - + paintings @@ -9832,7 +9851,7 @@ Use gráficos PNG, JPEG ou SVG! - + Edit Properties Editar Propriedades @@ -9842,7 +9861,7 @@ Use gráficos PNG, JPEG ou SVG! Exportar como imagem - + power matching casamento de potência @@ -9914,7 +9933,7 @@ Defina a localização do Octave nas configurações do aplicativo.Texto - + Rectangle Retângulo @@ -9924,7 +9943,7 @@ Defina a localização do Octave nas configurações do aplicativo.Retangulo preenchido - + Edit Rectangle Properties Editar Propriedades de Retângulo @@ -9943,15 +9962,15 @@ Defina a localização do Octave nas configurações do aplicativo.Sem título - - + + Format Error: 'Painting' field is not closed! Erro de formato: Campo 'Descrição' não está fechado! - + Wrong document version: Versão incorreta de documento: @@ -9969,7 +9988,7 @@ Campo desconhecido! - + Cannot open Verilog-A file "%1"! @@ -9990,7 +10009,7 @@ Campo desconhecido! - + Cannot save document! Não é possível salvar o documento! @@ -10003,7 +10022,7 @@ Wrong property field limiter! Propriedade do limitador de campo errada! - + Format Error: Unknown property: Erro de formato: @@ -10121,14 +10140,14 @@ Formato de linha 'descrição' errado! - + File Format Error: Unknown field! Erro de formato de arquivo: Campo desconhecido! - + ERROR: Component "%1" has no analog model. ERRO: Componente "%1" não possui modelo analógico. @@ -10148,7 +10167,7 @@ Campo desconhecido! AVISO: Pulando componente de biblioteca "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -10158,12 +10177,12 @@ Campo desconhecido! AVISO: Ignorar componente de simulação no subcircuito "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ERRO: Apenas uma simulação digital é permitida. @@ -10342,7 +10361,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10391,7 +10410,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10401,8 +10420,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10813,12 +10832,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10849,12 +10868,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10866,17 +10885,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10911,7 +10930,7 @@ seven line XSPICE specification. - + core @@ -10922,7 +10941,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10934,7 +10953,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10962,7 +10981,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10998,7 +11017,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11270,7 +11289,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11297,7 +11316,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11537,16 +11556,32 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter - - &File - Arquivo + + .CSPARAM section + - + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter + + + &File + Arquivo + + + E&xit Sair @@ -11594,29 +11629,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11691,7 +11726,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11725,7 +11760,7 @@ Change parameters and/or topology and try again! Copyright (C) 2014, 2015 por - + Filter topology Topologia do filtro @@ -11761,12 +11796,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11776,12 +11811,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11858,12 +11893,13 @@ Programa de síntese de filtro ativo QucsApp - + + Schematic Esquema elétrico - + Data Display Exibição de Dados @@ -11874,42 +11910,42 @@ Programa de síntese de filtro ativo - + VHDL Sources Fontes VHDL - - + + Verilog Sources Fontes Verilog - - + + Verilog-A Sources Fontes Verilog-A - - + + Octave Scripts Scripts Octave: - + Spice Files Arquivos Spice - + Any File Qualquer Arquivo - + The schematic search path has been refreshed. @@ -11924,7 +11960,7 @@ Programa de síntese de filtro ativo VHDL - + Open file @@ -11934,7 +11970,7 @@ Programa de síntese de filtro ativo - + Open example… @@ -11949,14 +11985,14 @@ Programa de síntese de filtro ativo - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11966,23 +12002,23 @@ Programa de síntese de filtro ativo Esquema elétrico - + New Novo - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11995,7 +12031,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -12005,7 +12041,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -12040,13 +12076,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo conteúdo do projeto atual - + Search Components Buscar Componentes - + Clear Limpar @@ -12081,8 +12117,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -12093,12 +12130,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -12106,7 +12143,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -12124,43 +12161,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Erro - + Cannot open "%1". Não é possível abrir "%1". - + Library is corrupt. Biblioteca corrupta. - + - - - + + + - + Info Informação - + Default icon not found: %1.png - + -port -porta @@ -12171,13 +12208,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Este documento contém modificações a salvar! - + Do you want to save the changes before copying? @@ -12217,17 +12254,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Não é possível apagar um arquivo aberto! - - + + - - + + Warning Aviso - + This will delete the file permanently! Continue ? Isto irá apagar o arquivo permanentemente! Continuar? @@ -12290,12 +12327,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo configuração - + Cannot create work directory ! Não pôde criar diretório de trabalho! - + Cannot create project directory ! Não pôde criar diretório de projeto! @@ -12323,41 +12360,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12436,34 +12473,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Criando novo esquemático... - - + + - + - + - + Ready. Pronto. - + Creating new text editor... Criando novo editor de texto... - + Opening file... Abrindo arquivo... @@ -12485,12 +12522,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Abortando salvar - + Qucs Netlist @@ -12505,12 +12542,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Inserir um Nome de Documento @@ -12574,7 +12612,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Abrir diretório de exemplos - + untitled Sem título @@ -12614,22 +12652,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12653,7 +12697,7 @@ Use subcircuit to crete Verilog-A module! Você realmente quer sair? - + The document was modified by another program ! O documento foi modificado por outro programa! @@ -12753,7 +12797,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12833,7 +12884,7 @@ Sobrescrever? Não é possível escrever "%1"! - + Please open project with subcircuits! Por favor abra um projeto com subcircuitos! @@ -12900,7 +12951,7 @@ Have you saved the Verilog-A symbols? - + &New &Novo @@ -13749,7 +13800,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13795,7 +13877,7 @@ Instala o Contúdo de um Pacote &Importar/Exportar Dados... - + Convert data file Converter arquivo de dados @@ -14143,7 +14225,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -14182,7 +14264,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -14199,7 +14281,7 @@ Rotates the selected component by 90° counter-clockwise Gira o componente selecionado 90° anti-horário - + Mirror about X Axis Inverter Verticalmente @@ -14628,12 +14710,12 @@ inicia programa de computação de código de cor resistor padrão - + Simulate Simular - + Simulates the current schematic Simula o esquemático atual @@ -14685,17 +14767,12 @@ Calcular polarização CC e mostrar - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Definir Marcador no Gráfico @@ -14714,7 +14791,7 @@ Sets a marker on a diagram's graph Define um marcador em um diagrama gráfico - + Show Last Messages Mostrar Últimas Mensagens @@ -14946,12 +15023,12 @@ Sobre Qt da Trolltech &Simulação - + &View &Visualização - + &Help &Ajuda @@ -15060,7 +15137,7 @@ Open - + Input Entrada @@ -15723,12 +15800,12 @@ Ativar/desativar o sumário QucsSettingsDialog - + Edit Qucs Properties Editar Propriedades de Qucs - + Large font size: @@ -15738,117 +15815,117 @@ Ativar/desativar o sumário - + Language (set after reload): Idioma (definido após reiniciar): - + system language idioma do sistema - + English Inglês - + German Alemão - + French Franês - + Spanish Espanhol - + Italian Italiano - + Polish Polaco - + Romanian Romeno - + Japanese Japonês - + Swedish Sueco - + Hungarian Húngaro - + Hebrew Hebreu - + Portuguese-BR Português-BR - + Portuguese-PT Português-PT - + Turkish Turco - + Ukrainian Ucraniano - + Russian Russo - + Czech Checo - + Catalan Catalão - + Arabic Árabe - + Chinese Chinês - + Schematic font (set after reload): @@ -15858,12 +15935,12 @@ Ativar/desativar o sumário - + Kazakh Cazaque - + Maximum undo operations: @@ -15893,7 +15970,7 @@ Ativar/desativar o sumário - + Draw diagrams with anti-aliasing feature: @@ -15908,17 +15985,17 @@ Ativar/desativar o sumário - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15932,6 +16009,26 @@ Ativar/desativar o sumário Settings Configurações + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -16094,7 +16191,7 @@ open files with an appropriate program. Valores Padrão - + Error Erro @@ -16104,7 +16201,7 @@ open files with an appropriate program. Este sufixo já foi registrado! - + Select the home directory @@ -16701,7 +16798,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File @@ -16726,7 +16823,7 @@ open files with an appropriate program. - + &Help @@ -16742,7 +16839,7 @@ open files with an appropriate program. Sobre Qt... - + Qucs-S S-parameter Help @@ -16775,24 +16872,24 @@ Copyright (C) 2024 by - - + + Warning Aviso - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16816,7 +16913,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16867,7 +16964,7 @@ Copyright (C) 2024 by Schematic - + Title Título @@ -16903,7 +17000,7 @@ Edits the text file Edita o arquivo de texto - + Edit Schematic Editar Esquemático @@ -16941,12 +17038,12 @@ Edits the symbol for this schematic Edita o símbolo para este esquemático - + generic genérico - + Error Erro @@ -16966,7 +17063,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. Status - + Netlist error @@ -17209,7 +17306,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. criando netlist... - + Error Erro @@ -17221,7 +17318,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. Não pode ler netlist! - + ERROR: Simulator is still running! ERRO: Simulador ainda está funcionando! @@ -17247,14 +17344,14 @@ Definir o local de admsXml sobre as configurações do aplicativo. - + done. terminado. - + ERROR: Cannot create VHDL directory "%1"! ERRO: Não é possível criar diretório VHDL "%1"! @@ -17265,7 +17362,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. ERRO: Não é possível criar "%1"! - + ERROR: Cannot start ERRO: Não é possível iniciar @@ -17331,12 +17428,12 @@ Definir o local de admsXml sobre as configurações do aplicativo. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17351,40 +17448,50 @@ Definir o local de admsXml sobre as configurações do aplicativo. - - Extra simulator parameters - - - - + Apply changes - + Cancel Cancelar - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17394,7 +17501,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. - + Select Ngspice executable location @@ -17404,7 +17511,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. - + Select SpiceOpus executable location @@ -17437,7 +17544,24 @@ Definir o local de admsXml sobre as configurações do aplicativo. Arquivo: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic mostrar nome do arquivo no esquemático @@ -17492,7 +17616,7 @@ Definir o local de admsXml sobre as configurações do aplicativo. Cancelar - + Select a file Selecione um arquivo @@ -17562,50 +17686,63 @@ Definir o local de admsXml sobre as configurações do aplicativo. SpiceLibCompDialog - - + + Open Abrir - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply Aplicar - + Cancel Cancelar - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17633,24 +17770,24 @@ No SUBCKT directive found in library - + Error Erro - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17675,7 +17812,8 @@ No SUBCKT directive found in library - + + Warning Aviso @@ -17915,7 +18053,7 @@ Isere o esqueleto de uma função do Octave TunerDialog - + Add component @@ -18090,10 +18228,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Erro + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_pt_PT.ts b/translations/qucs_pt_PT.ts index 9405a1bd5..a4176599d 100644 --- a/translations/qucs_pt_PT.ts +++ b/translations/qucs_pt_PT.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simular @@ -545,195 +550,195 @@ ComponentDialog - + Edit Component Properties Editar Propriedades do Componente - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Varrer - - - - - - - - - display in schematic - mostrar no esquemático + mostrar no esquemático - Simulation: - Simulação: + Simulação: - Sweep Parameter: - Varrer Parâmetro: + Varrer Parâmetro: - Type: - Tipo: + Tipo: - linear - linear + linear - logarithmic - logarítmico + logarítmico - list - lista + lista - constant - constante + constante - Values: - Valores: + Valores: - Start: - Início: + Início: - Stop: - Fim: + Fim: - - - Step: - Passo: + Passo: - Number: - Número de passos: + Número de passos: - - + + Properties Propriedades - Name: - Nome: + Nome: - + + Name Nome - - Value - Valor + + Simulation + Simulação - display - Mostrar + Sweep Parameter + - Description - Descrição + Type + Tipo - - Edit - Editar + + Values + - - Browse - Procurar + + Start + - - Add - Adicionar + + Stop + - - Remove - Remover + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Valor + + + + Show - + display + Mostrar + + + + Description + Descrição + + + Edit + Editar + + + Browse + Procurar + + + Add + Adicionar + + + Remove + Remover + + OK - Ok + Ok - Apply - Aplicar + Aplicar - Cancel - Cancelar + Cancelar - - - - - - - - - yes - sim + sim - - - - - no - não + não - + Select a file Escolher ficheiro @@ -768,66 +773,65 @@ Ficheiros Verilog - Points per decade: - Pontos por década: + Pontos por década: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic mostrar no esquemático - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Aplicar - + Cancel Cancelar - + OK Ok - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +839,7 @@ DiagramDialog - + Edit Diagram Properties Editar as Propriedades do Diagrama @@ -1362,38 +1366,38 @@ Simular - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1403,12 +1407,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1419,17 +1423,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2149,12 +2153,12 @@ Node name will not be changed. - + Library Name: Nome da biblioteca: - + Choose subcircuits: Escolher sub-circuitos: @@ -2164,7 +2168,12 @@ Node name will not be changed. Acrescentar descrição ao sub-circuito - + + Analog models only + + + + Select All Selecionar Todos @@ -2306,7 +2315,7 @@ Node name will not be changed. - + Creating Verilog netlist. Criando netlist Verilog. @@ -2318,7 +2327,7 @@ Node name will not be changed. Criando netlist de VHDL. - + Error creating library. Erro a criar biblioteca. @@ -2826,7 +2835,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3571,6 +3580,7 @@ but is %1 ! + delay time (SPICE only) @@ -3585,7 +3595,7 @@ but is %1 ! Fonte modulada em amplitude - + ideal ac current source Fonte de corrente AC ideal @@ -3594,14 +3604,19 @@ but is %1 ! peak current in Ampere Corrente de pico em Ampère + + + offset current (SPICE only) + + - + damping factor (transient simulation only) Factor de amortecimento (apenas sim. transiente) - + ac Current Source Fonte de corrente AC @@ -3616,7 +3631,7 @@ but is %1 ! Corrente em Ampère - + dc Current Source Fonte de corrente DC @@ -3895,7 +3910,7 @@ but is %1 ! - + transfer function scaling factor @@ -3912,7 +3927,7 @@ but is %1 ! - + npn transistor Transístor NPN @@ -4475,20 +4490,20 @@ but is %1 ! - + - + - + - + @@ -4503,16 +4518,16 @@ but is %1 ! - - + + - + - + Error Erro @@ -5059,7 +5074,7 @@ Wrong 'component' line format! - + Diode Díodo @@ -5954,6 +5969,7 @@ Wrong 'component' line format! + put result into dataset Guardar resultado no dataset @@ -6241,7 +6257,7 @@ Externo Corrente inicial para simulação transiente - + Inductor Inductor @@ -6332,7 +6348,7 @@ Externo - + Rectangle Current Fonte de Corrente Rectangular @@ -6433,7 +6449,7 @@ Externo - + n-JFET @@ -7089,7 +7105,7 @@ Externo - + n-MOSFET @@ -7107,7 +7123,7 @@ Externo - + zero-bias threshold voltage @@ -7298,8 +7314,8 @@ Externo - - + + Use global SPICE temperature @@ -8073,7 +8089,7 @@ Externo - + carrier signal frequency @@ -8288,7 +8304,7 @@ Externo - + Resistor Resistência @@ -8428,8 +8444,12 @@ Externo + (available) ac power in dBm + + + (available) ac power in Watts - potência AC (disponível) em Watt + potência AC (disponível) em Watt @@ -8517,7 +8537,7 @@ Externo - + SPICE netlist Netlist SPICE @@ -8532,7 +8552,7 @@ Externo - + ERROR: No file name in SPICE component "%1". @@ -8553,7 +8573,7 @@ Externo - + Info Info @@ -8614,12 +8634,7 @@ Externo - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port @@ -8687,7 +8702,7 @@ Externo - + simulation temperature in degree Celsius (Qucsator only) @@ -9137,7 +9152,7 @@ Externo Fonte Ideal de Tensão DC - + dc Voltage Source Fonte de Tensão DC @@ -9182,7 +9197,7 @@ Externo Tensão do pulso - + Voltage Pulse Pulso de Tensão @@ -9202,7 +9217,7 @@ Externo - + Rectangle Voltage Tensão Rectangular @@ -9296,7 +9311,7 @@ Externo Tabela de Verdade - + ERROR: Cannot open file "%1". @@ -9337,13 +9352,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9362,7 +9377,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9461,16 +9476,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams Diagramas - + paintings @@ -9482,7 +9497,7 @@ Use PNG, JPEG or SVG graphics! Componentes Externos - + Edit Properties Editar Propriedades @@ -9492,7 +9507,7 @@ Use PNG, JPEG or SVG graphics! Exportar como Imagem - + power matching Adaptação para Potência @@ -9565,7 +9580,7 @@ Defina a localização do Octave nas Definições do Programa. Texto - + Rectangle Rectângulo @@ -9575,7 +9590,7 @@ Defina a localização do Octave nas Definições do Programa. Rectângulo Preenchido - + Edit Rectangle Properties Editar Propriedades do Rectângulo @@ -9594,14 +9609,14 @@ Defina a localização do Octave nas Definições do Programa. SemNome - - + + Format Error: 'Painting' field is not closed! - + Wrong document version: Versão de documento errada: @@ -9618,7 +9633,7 @@ Unknown field! Impossível gravar ficheiro C++ "%1"! - + Cannot open Verilog-A file "%1"! @@ -9639,7 +9654,7 @@ Unknown field! Impossível gravar ficheiro de símbolos JSON "%1"! - + Cannot save document! Impossível gravar documento! @@ -9652,7 +9667,7 @@ Wrong property field limiter! Delimitador do campo 'property' errado! - + Format Error: Unknown property: Erro no formato: @@ -9768,14 +9783,14 @@ Campo 'paiting' com formato de linha inválido! - + File Format Error: Unknown field! Erro no Formato do Ficheiro: Campo desconhecido! - + ERROR: Component "%1" has no analog model. ERRO: O componente "%1" não tem um modelo analógico. @@ -9795,7 +9810,7 @@ Campo desconhecido! AVISO: Saltando o componente da biblioteca: "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9805,12 +9820,12 @@ Campo desconhecido! AVISO: Ignorando componente de simulação no sub-circuito "%1". - + WARNING: Equations in "%1" are 'time' typed. AVISO: Equações em %1" são do tipo 'time'. - + ERROR: Only one digital simulation allowed. ERRO: Apenas é permitida uma simulação digital. @@ -9968,7 +9983,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10017,7 +10032,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10027,8 +10042,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10439,12 +10454,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10475,12 +10490,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10492,17 +10507,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10537,7 +10552,7 @@ seven line XSPICE specification. - + core @@ -10548,7 +10563,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10560,7 +10575,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10588,7 +10603,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10624,7 +10639,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10896,7 +10911,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -10923,7 +10938,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11163,9 +11178,25 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter &File @@ -11220,29 +11251,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11317,7 +11348,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11351,7 +11382,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11387,12 +11418,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11402,12 +11433,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11482,12 +11513,13 @@ Active Filter synthesis program QucsApp - + + Schematic Esquemático - + Data Display Exibição de Dados @@ -11498,42 +11530,42 @@ Active Filter synthesis program - + VHDL Sources Fontes VHDL - - + + Verilog Sources Fontes Verilog - - + + Verilog-A Sources Fontes Verilog-A - - + + Octave Scripts Scripts de Octave - + Spice Files Ficheiros SPICE - + Any File Qualquer ficheiro - + The schematic search path has been refreshed. @@ -11548,7 +11580,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11558,7 +11590,7 @@ Active Filter synthesis program - + Open example… @@ -11573,14 +11605,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11590,23 +11622,23 @@ Active Filter synthesis program Esquemáticos - + New Novo - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11619,7 +11651,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11629,7 +11661,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11664,13 +11696,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Conteúdo do projecto actual - + Search Components - + Clear @@ -11705,8 +11737,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11717,12 +11750,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11730,7 +11763,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11748,44 +11781,44 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Erro - + Cannot open "%1". Impossível abrir "%1". - + Library is corrupt. A biblioteca está corrompida. - + - - - + + + - + Info Info - + Default icon not found: %1.png Impossível encontrar icon por defeito: %1.png - + -port -portos @@ -11796,13 +11829,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! O documento contém alterações por guardar! - + Do you want to save the changes before copying? Deseja guardar as alterações antes de copiar? @@ -11846,17 +11879,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Impossível apagar um ficheiro aberto! - - + + - - + + Warning Aviso - + This will delete the file permanently! Continue ? O ficheiro será apagado de forma irreversível! Continuar? @@ -11919,12 +11952,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Configuração - + Cannot create work directory ! Impossível criar directório de trabalho! - + Cannot create project directory ! Impossível criar directório de projecto! @@ -11952,41 +11985,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12065,34 +12098,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Criando novo esquemático... - - + + - + - + - + Ready. Pronto. - + Creating new text editor... A criar novo editor de texto... - + Opening file... Abrindo ficheiro... @@ -12114,12 +12147,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Operação de guardar ficheiro cancelada - + Qucs Netlist Netlist do Qucs @@ -12134,12 +12167,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Texto simples - + + Subcircuit symbol - + Enter a Document Name Introduza um nome para o documento @@ -12202,7 +12236,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Abrir directório de exemplos... - + untitled SemNome @@ -12242,22 +12276,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12281,7 +12321,7 @@ Use subcircuit to crete Verilog-A module! Deseja mesmo sair? - + The document was modified by another program ! O documento foi alterado por outro programa! @@ -12381,7 +12421,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12460,7 +12507,7 @@ Overwrite ? Impossível escrever "%1"! - + Please open project with subcircuits! Por favor abra um projecto com sub-circuitos! @@ -12530,7 +12577,7 @@ Gravou os símbolos de Verilog-A? - + &New &Novo @@ -13382,7 +13429,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13428,7 +13506,7 @@ Instala o Conteúdo de um Pacote &Importar/Exportar Dados... - + Convert data file Permite importar e exportar os dados para outros formatos @@ -13776,7 +13854,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13815,7 +13893,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13832,7 +13910,7 @@ Rotates the selected component by 90° counter-clockwise Roda a selecção por 90º - + Mirror about X Axis Espelhar em torno do Eixo do X @@ -14245,12 +14323,12 @@ Inicia o programa de síntese de atenuadores QucsAttenuator - + Simulate Simular - + Simulates the current schematic Simula o esquemático actual @@ -14303,17 +14381,12 @@ Calcula o ponto de polarização DC e exibe-a - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Inserir marcador num gráfico @@ -14332,7 +14405,7 @@ Sets a marker on a diagram's graph Coloca um marcador num gráfico - + Show Last Messages Mostrar Últimas Mensagens @@ -14564,12 +14637,12 @@ Acerca do Qt, da Trolltech &Simulação - + &View &Ver - + &Help &Ajuda @@ -14678,7 +14751,7 @@ Open - + Input @@ -15144,7 +15217,7 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties Editar as definições do Qucs @@ -15153,7 +15226,7 @@ Filter synthesis program Tipo de letra (definido depois de reiniciar): - + Large font size: @@ -15163,117 +15236,117 @@ Filter synthesis program Cor de fundo dos documentos: - + Language (set after reload): Linguagem (definido depois de reiniciar): - + system language Linguagem do sistema - + English Inglês - + German Alemão - + French Françês - + Spanish Espanhol - + Italian Italiano - + Polish Polaco - + Romanian Romeno - + Japanese Japonês - + Swedish Sueco - + Hungarian Húngaro - + Hebrew Herbraico - + Portuguese-BR - + Portuguese-PT - + Turkish Turco - + Ukrainian Ucraniano - + Russian Russo - + Czech Checo - + Catalan Catalão - + Arabic Árabe - + Chinese - + Schematic font (set after reload): @@ -15283,12 +15356,12 @@ Filter synthesis program - + Kazakh Cossaco - + Maximum undo operations: @@ -15318,7 +15391,7 @@ Filter synthesis program - + Draw diagrams with anti-aliasing feature: @@ -15333,17 +15406,17 @@ Filter synthesis program - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15357,6 +15430,26 @@ Filter synthesis program Settings Definições + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15519,7 +15612,7 @@ open files with an appropriate program. Valores por defeito - + Error Erro @@ -15529,7 +15622,7 @@ open files with an appropriate program. Este sufixo já está registado! - + Select the home directory Selecione o directório home @@ -16127,7 +16220,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Ficheiro @@ -16152,7 +16245,7 @@ open files with an appropriate program. - + &Help &Ajuda @@ -16168,7 +16261,7 @@ open files with an appropriate program. Acerca do Qt... - + Qucs-S S-parameter Help @@ -16201,24 +16294,24 @@ Copyright (C) 2024 by - - + + Warning Aviso - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16242,7 +16335,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16293,7 +16386,7 @@ Copyright (C) 2024 by Schematic - + Title Título @@ -16329,7 +16422,7 @@ Edits the text file Permite editar o ficheiro de texto - + Edit Schematic Editar Esquemático @@ -16367,12 +16460,12 @@ Edits the symbol for this schematic Permite editar o símbolo para este esquemático - + generic genérico - + Error Erro @@ -16392,7 +16485,7 @@ Defina a localização do admsXml nas definições da aplicação. Estado - + Netlist error @@ -16635,7 +16728,7 @@ Defina a localização do admsXml nas definições da aplicação. criando netlist... - + Error Erro @@ -16647,7 +16740,7 @@ Defina a localização do admsXml nas definições da aplicação. Impossível ler netlist! - + ERROR: Simulator is still running! @@ -16673,13 +16766,13 @@ Defina a localização do admsXml nas definições da aplicação. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16690,7 +16783,7 @@ Defina a localização do admsXml nas definições da aplicação. - + ERROR: Cannot start @@ -16756,12 +16849,12 @@ Defina a localização do admsXml nas definições da aplicação. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16776,40 +16869,50 @@ Defina a localização do admsXml nas definições da aplicação. - - Extra simulator parameters - - - - + Apply changes - + Cancel Cancelar - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16819,7 +16922,7 @@ Defina a localização do admsXml nas definições da aplicação. - + Select Ngspice executable location @@ -16829,7 +16932,7 @@ Defina a localização do admsXml nas definições da aplicação. - + Select SpiceOpus executable location @@ -16862,7 +16965,24 @@ Defina a localização do admsXml nas definições da aplicação. Ficheiro: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic mostrar nome do ficheiro no esquemático @@ -16917,7 +17037,7 @@ Defina a localização do admsXml nas definições da aplicação. Cancelar - + Select a file Selecionar um ficheiro @@ -16987,50 +17107,63 @@ Defina a localização do admsXml nas definições da aplicação. SpiceLibCompDialog - - + + Open Abrir - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK Ok - + Apply Aplicar - + Cancel Cancelar - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17058,24 +17191,24 @@ No SUBCKT directive found in library - + Error Erro - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17100,7 +17233,8 @@ No SUBCKT directive found in library - + + Warning Aviso @@ -17340,7 +17474,7 @@ Insere um esqueleto de função do Octave TunerDialog - + Add component @@ -17515,10 +17649,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Erro + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_ro.ts b/translations/qucs_ro.ts index 859ebfff8..e44e31930 100644 --- a/translations/qucs_ro.ts +++ b/translations/qucs_ro.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate @@ -545,195 +550,147 @@ ComponentDialog - + Edit Component Properties Editează Proprietăţile Componentei - + + Equation Editor + + + + + Put result in dataset + + + + Sweep - - - - - - - - - display in schematic - afişează in schemă + afişează in schemă - - Simulation: - + + + Properties + Proprietăţi - - Sweep Parameter: - + Name: + Nume: - - Type: - + + + Name + Nume - - linear - + + Simulation + Simulare - logarithmic + Sweep Parameter - list + Type - constant + Values - - Values: + + Start - - Start: + + Stop - - Stop: + + Step - - - - Step: + + Number - - Number: + + Populate parameters from SPICE file... - - - Properties - Proprietăţi - - - - Name: - Nume: - - - - Name - Nume - - - + Value Valoare - + + Show + + + display - afişează + afişează - + Description Descriere - Edit - Editează + Editează - Browse - Căutare + Căutare - Add - Adaugă + Adaugă - Remove - Îndepărtează - - - - Move Up - - - - - Move Down - - - - - Fill from SPICE .MODEL - + Îndepărtează - OK - OK + OK - Apply - Aplică + Aplică - Cancel - Revocare + Revocare - - - - - - - - - yes - da + da - - - - - no - nu + nu - + Select a file Selectează un fişier @@ -767,67 +724,62 @@ Verilog files - - - Points per decade: - - CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic afişează in schemă - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Aplică - + Cancel Revocare - + OK OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -835,7 +787,7 @@ DiagramDialog - + Edit Diagram Properties Editează Propietăţile Diagramei @@ -1346,38 +1298,38 @@ ExternSimDialog - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1387,12 +1339,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1403,17 +1355,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2109,12 +2061,12 @@ Node name will not be changed. - + Library Name: - + Choose subcircuits: @@ -2124,7 +2076,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All @@ -2258,7 +2215,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2270,7 +2227,7 @@ Node name will not be changed. - + Error creating library. @@ -2746,7 +2703,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3359,6 +3316,7 @@ but is %1 ! + delay time (SPICE only) @@ -3373,7 +3331,7 @@ but is %1 ! - + ideal ac current source sursă de curent ideală ac @@ -3382,14 +3340,19 @@ but is %1 ! peak current in Ampere + + + offset current (SPICE only) + + - + damping factor (transient simulation only) - + ac Current Source Sursă de Curent ac @@ -3404,7 +3367,7 @@ but is %1 ! curent în Amperi - + dc Current Source Sursă de Curent dc @@ -3683,7 +3646,7 @@ but is %1 ! - + transfer function scaling factor @@ -3700,7 +3663,7 @@ but is %1 ! - + npn transistor Tranzistor npn @@ -4263,20 +4226,20 @@ but is %1 ! - + - + - + - + @@ -4291,16 +4254,16 @@ but is %1 ! - - + + - + - + Error Eroare @@ -4849,7 +4812,7 @@ Fals format de linie a 'component'! - + Diode Diodă @@ -5744,6 +5707,7 @@ Fals format de linie a 'component'! + put result into dataset pune rezultatul într-un set de date @@ -6030,7 +5994,7 @@ Fals format de linie a 'component'! - + Inductor Inductor @@ -6121,7 +6085,7 @@ Fals format de linie a 'component'! - + Rectangle Current Curent Rectangular @@ -6222,7 +6186,7 @@ Fals format de linie a 'component'! - + n-JFET n-JFET @@ -6878,7 +6842,7 @@ Fals format de linie a 'component'! tranzistor cu efect de câmp MOS - + n-MOSFET n-MOSFET @@ -6896,7 +6860,7 @@ Fals format de linie a 'component'! MOSFET cu depleţie - + zero-bias threshold voltage tensiunea de prag la bias nul @@ -7087,8 +7051,8 @@ Fals format de linie a 'component'! - - + + Use global SPICE temperature @@ -7862,7 +7826,7 @@ Fals format de linie a 'component'! - + carrier signal frequency @@ -8077,7 +8041,7 @@ Fals format de linie a 'component'! - + Resistor Rezistor @@ -8217,7 +8181,7 @@ Fals format de linie a 'component'! - (available) ac power in Watts + (available) ac power in dBm @@ -8306,7 +8270,7 @@ Fals format de linie a 'component'! - + SPICE netlist @@ -8321,7 +8285,7 @@ Fals format de linie a 'component'! - + ERROR: No file name in SPICE component "%1". @@ -8342,7 +8306,7 @@ Fals format de linie a 'component'! - + Info Info @@ -8403,12 +8367,7 @@ Fals format de linie a 'component'! - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Port Subcircuit @@ -8476,7 +8435,7 @@ Fals format de linie a 'component'! - + simulation temperature in degree Celsius (Qucsator only) @@ -8926,7 +8885,7 @@ Fals format de linie a 'component'! sursă ideala de tensiune dc - + dc Voltage Source Sursa de Tensiune dc @@ -8971,7 +8930,7 @@ Fals format de linie a 'component'! tensiunea pulsului - + Voltage Pulse Pulsul de Tensiune @@ -8991,7 +8950,7 @@ Fals format de linie a 'component'! - + Rectangle Voltage Tensiune Rectangulară @@ -9085,7 +9044,7 @@ Fals format de linie a 'component'! - + ERROR: Cannot open file "%1". @@ -9126,13 +9085,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9151,7 +9110,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9250,16 +9209,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9271,7 +9230,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties @@ -9281,7 +9240,7 @@ Use PNG, JPEG or SVG graphics! - + power matching @@ -9346,7 +9305,7 @@ Use PNG, JPEG or SVG graphics! - + Rectangle @@ -9356,7 +9315,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Rectangle Properties Editează Proprietăţile Rectanglului @@ -9375,15 +9334,15 @@ Use PNG, JPEG or SVG graphics! fara titlu - - + + Format Error: 'Painting' field is not closed! Eroare de format: Câmpul 'Painting' nu este închis! - + Wrong document version: Versiune greşită a documentului: @@ -9401,7 +9360,7 @@ Câmp nedefinit! - + Cannot open Verilog-A file "%1"! @@ -9422,7 +9381,7 @@ Câmp nedefinit! - + Cannot save document! Documentul nu poate fi salvat! @@ -9435,7 +9394,7 @@ Wrong property field limiter! Fals limitator de cîmp! - + Format Error: Unknown property: Eroare de format: @@ -9551,14 +9510,14 @@ Fals format al liniei 'painting'! - + File Format Error: Unknown field! Eroare de format: Câmp necunoscut! - + ERROR: Component "%1" has no analog model. @@ -9578,7 +9537,7 @@ Câmp necunoscut! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9588,12 +9547,12 @@ Câmp necunoscut! - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. @@ -9811,7 +9770,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -9860,7 +9819,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -9870,8 +9829,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10282,12 +10241,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10318,12 +10277,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10335,17 +10294,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10380,7 +10339,7 @@ seven line XSPICE specification. - + core @@ -10391,7 +10350,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10403,7 +10362,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10431,7 +10390,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10467,7 +10426,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10739,7 +10698,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -10766,7 +10725,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11006,18 +10965,34 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter - - &File + + .CSPARAM section - - E&xit - + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter + + + &File + + + + + E&xit + @@ -11063,29 +11038,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11160,7 +11135,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11194,7 +11169,7 @@ Change parameters and/or topology and try again! - + Filter topology @@ -11230,12 +11205,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11245,12 +11220,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11325,12 +11300,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schemă - + Data Display Afişaj de Date @@ -11341,42 +11317,42 @@ Active Filter synthesis program - + VHDL Sources - - + + Verilog Sources - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Orice Fişier - + The schematic search path has been refreshed. @@ -11391,7 +11367,7 @@ Active Filter synthesis program - + Open file @@ -11401,7 +11377,7 @@ Active Filter synthesis program - + Open example… @@ -11416,14 +11392,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11433,23 +11409,23 @@ Active Filter synthesis program Scheme - + New Nou - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11462,7 +11438,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11472,7 +11448,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11507,13 +11483,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Search Components - + Clear @@ -11544,8 +11520,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11556,12 +11533,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11569,7 +11546,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11587,43 +11564,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Eroare - + Cannot open "%1". - + Library is corrupt. - + - - - + + + - + Info Info - + Default icon not found: %1.png - + -port -port @@ -11634,14 +11611,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Documentul conţine modificări nesalvate! - + Do you want to save the changes before copying? @@ -11681,17 +11658,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Fişierul deschis nu poate fi şters! - - + + - - + + Warning Avertisment - + This will delete the file permanently! Continue ? Fişierul va fii şters definitiv! Continuaţi? @@ -11754,12 +11731,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Nou director de lucru nu poate fi creat! - + Cannot create project directory ! Directorul de proiect nu poate fi creat! @@ -11787,41 +11764,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -11900,34 +11877,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Crează schemă nouă... - - + + - + - + - + Ready. Terminat. - + Creating new text editor... - + Opening file... Deschide fişier... @@ -11949,12 +11926,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Salvare întreruptă - + Qucs Netlist @@ -11969,12 +11946,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Introdu un Nume de Document @@ -12034,7 +12012,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Renunţare - + untitled fara titlu @@ -12074,22 +12052,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12113,7 +12097,7 @@ Use subcircuit to crete Verilog-A module! Doriţi să terminaţi? - + The document was modified by another program ! @@ -12205,7 +12189,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12284,7 +12275,7 @@ Overwrite ? - + Please open project with subcircuits! @@ -12347,7 +12338,7 @@ Have you saved the Verilog-A symbols? - + &New @@ -13111,12 +13102,43 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qt - + Convert data file @@ -13444,7 +13466,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13483,12 +13505,12 @@ Resets the limits for all axis to auto. - + Simulators Settings... - + Mirror about X Axis @@ -13853,12 +13875,12 @@ Starts attenuator calculation program - + Simulate - + Simulates the current schematic @@ -13899,17 +13921,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph @@ -13926,7 +13943,7 @@ Sets a marker on a diagram's graph - + Show Last Messages @@ -14107,12 +14124,12 @@ About Qt by Trolltech - + &View - + &Help @@ -14221,7 +14238,7 @@ Open - + Input @@ -14709,7 +14726,7 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties Editează Proprietăţile Qucs @@ -14718,7 +14735,7 @@ Filter synthesis program Font (setat după reâncărcare): - + Large font size: @@ -14728,117 +14745,117 @@ Filter synthesis program Culoare Fundal Document: - + Language (set after reload): - + system language - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -14848,12 +14865,12 @@ Filter synthesis program - + Kazakh - + Maximum undo operations: @@ -14883,7 +14900,7 @@ Filter synthesis program - + Draw diagrams with anti-aliasing feature: @@ -14898,17 +14915,17 @@ Filter synthesis program - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -14922,6 +14939,26 @@ Filter synthesis program Settings Setări + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15084,7 +15121,7 @@ open files with an appropriate program. Valori Predefinite - + Error Eroare @@ -15094,7 +15131,7 @@ open files with an appropriate program. - + Select the home directory @@ -15688,7 +15725,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File @@ -15713,7 +15750,7 @@ open files with an appropriate program. - + &Help @@ -15729,7 +15766,7 @@ open files with an appropriate program. - + Qucs-S S-parameter Help @@ -15762,24 +15799,24 @@ Copyright (C) 2024 by - - + + Warning Avertisment - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -15803,7 +15840,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -15854,7 +15891,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -15874,7 +15911,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -15910,12 +15947,12 @@ Edits the symbol for this schematic Editează simbolul pentru aceasta schemă - + generic - + Error Eroare @@ -15933,7 +15970,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16176,7 +16213,7 @@ Set the admsXml location on the application settings. - + Error Eroare @@ -16188,7 +16225,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16214,13 +16251,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16231,7 +16268,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16296,12 +16333,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16316,40 +16353,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Revocare - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16359,7 +16406,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -16369,7 +16416,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -16402,7 +16449,24 @@ Set the admsXml location on the application settings. - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic @@ -16457,7 +16521,7 @@ Set the admsXml location on the application settings. Revocare - + Select a file Selectează un fişier @@ -16527,50 +16591,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Deschis - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK OK - + Apply Aplică - + Cancel Revocare - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -16598,24 +16675,24 @@ No SUBCKT directive found in library - + Error Eroare - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -16640,7 +16717,8 @@ No SUBCKT directive found in library - + + Warning Avertisment @@ -16872,7 +16950,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17047,10 +17125,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Eroare + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_ru.ts b/translations/qucs_ru.ts index a35727e26..0fa6a6140 100644 --- a/translations/qucs_ru.ts +++ b/translations/qucs_ru.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs О Qucs @@ -26,7 +26,7 @@ разработчик графического интерфейса, динамический загрузчик Verilog-A - + project maintainer, simulator interface and GUI design сопровождающий проекта, интерфейс симулятора и дизайн графического интерфейса @@ -60,6 +60,11 @@ CI setup, build system, MacOS support Настройка CI, система сборки, поддержка MacOS + + + Documentation + + testing, general bugfixes @@ -101,13 +106,13 @@ рефакторинг, модульность - - + + RF design tools радиочастотные средства проектирования - + Schematic rendering engine, refactoring Движок схематической визуализации, рефакторинг @@ -116,7 +121,7 @@ Настройка CI, система сборки - + Refactoring, general improvements Рефакторинг, общие улучшения @@ -372,7 +377,7 @@ AbstractSpiceKernel - + Simulate Моделировать @@ -582,195 +587,207 @@ ComponentDialog - + Edit Component Properties Изменение свойств компонента - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Развёртка - - - - - - - - - display in schematic - показывать на схеме + показывать на схеме - Simulation: - Моделирование: + Моделирование: - Sweep Parameter: - Параметр для развёртки: + Параметр для развёртки: - Type: - Тип: + Тип: - linear - линейный + линейный - logarithmic - логарифмический + логарифмический - list - список значений + список значений - constant - константа + константа - Values: - Значения: + Значения: - Start: - Начало: + Начало: - Stop: - Конец: + Конец: - - - Step: - Шаг: + Шаг: - Number: - Количество: + Количество: - - + + Properties Свойства - Name: - Имя: + Имя: - + + Name Имя + + + Simulation + Моделирование + + + + Sweep Parameter + + + + + Type + Тип + + + + Values + + + Start + + + + + Stop + Остановить + + + + Step + Шаг + + + + Number + + + + + Populate parameters from SPICE file... + + + + Value Значение - + + Show + Показать + + display - показывать + показывать - + Description Описание - Edit - Изменить + Изменить - Browse - Просмотр + Просмотр - Add - Добавить + Добавить - Remove - Удалить + Удалить - Move Up - Перейти наверх + Перейти наверх - Move Down - Перейти вниз + Перейти вниз - Fill from SPICE .MODEL - Использовать данные .MODEL SPICE + Использовать данные .MODEL SPICE - OK - OK + OK - Apply - Применить + Применить - Cancel - Отменить + Отменить - - - - - - - - - yes - да + да - - - - - no - нет + нет - + Select a file Выбрать файл @@ -805,31 +822,30 @@ Файлы Verilog - Points per decade: - Число точек на декаду: + Число точек на декаду: CustomSimDialog - - + + Edit SPICE code Редактировать код SPICE - + Component: Компонент: - + display in schematic показывать на схеме - + Variables to plot (semicolon separated) Переменные для построения (через точку с запятой) @@ -838,37 +854,37 @@ Дополнительные форматы вывода (через точку с запятой; необработанный формат SPICE или STD XYCE - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) Дополнительные форматы вывода (через точку с запятой; необработанный формат SPICE или STD XYCE или скалярный формат) - + Apply Применить - + Cancel Отменить - + OK OK - + Find all variables Найти все переменные - + Find all outputs Найти все форматы вывода - + SPICE code editor Редактор кода SPICE @@ -876,7 +892,7 @@ DiagramDialog - + Edit Diagram Properties Изменить свойства диаграммы @@ -1407,38 +1423,38 @@ Моделировать - + Stop Остановить - - + + Save netlist Сохранить список цепей - + Exit Выход - + Simulation console Консоль моделирования - + Simulate with external simulator Моделировать с помощью внешнего симулятора - + There were simulation errors. Please check log. Были ошибки моделирования. Пожалуйста, проверьте журнал. - + There were simulation warnings. Please check log. Были предупреждения при моделировании. Пожалуйста, проверьте журнал. @@ -1448,12 +1464,12 @@ Моделировние завершено. Теперь поместите диаграмму на схему, чтобы отобразить результат. - + Simulation successful. Now place diagram on schematic to plot the result. Моделирование прошло успешно. Теперь поместите диаграмму на схему, чтобы отобразить результат. - + started... запущено… @@ -1465,17 +1481,17 @@ Моделирование началось: - + Failed to start simulator! Не удалось запустить симулятор! - + Simulator crashed! Сбой симулятора! - + Simulator error! Ошибка симулятора! @@ -2374,12 +2390,12 @@ Node name will not be changed. - + Library Name: Имя библиотеки: - + Choose subcircuits: Выбор подсхем: @@ -2389,7 +2405,12 @@ Node name will not be changed. Добавить описание подсхемы - + + Analog models only + + + + Select All Выделить все @@ -2535,7 +2556,7 @@ Node name will not be changed. - + Creating Verilog netlist. Создание списка цепей Verilog. @@ -2549,7 +2570,7 @@ Node name will not be changed. - + Error creating library. Ошибка создания библиотеки. @@ -3140,7 +3161,7 @@ Resistor color code computation program Ngspice - + Problem with SaveNetlist Проблема с SaveNetlist @@ -3889,6 +3910,7 @@ Resistor color code computation program + delay time (SPICE only) время задержки (только SPICE) @@ -3903,7 +3925,7 @@ Resistor color code computation program Источник с АМ-модуляцией - + ideal ac current source идеальный источник переменного тока @@ -3912,14 +3934,19 @@ Resistor color code computation program peak current in Ampere пиковая величина тока в амперах + + + offset current (SPICE only) + + - + damping factor (transient simulation only) коэффициент затухания (только для переходного моделирования) - + ac Current Source источник переменного тока @@ -3934,7 +3961,7 @@ Resistor color code computation program ток в амперах - + dc Current Source источник постоянного тока @@ -4213,7 +4240,7 @@ Resistor color code computation program - + transfer function scaling factor масштабный коэффициент передаточной функции @@ -4230,7 +4257,7 @@ Resistor color code computation program - + npn transistor npn транзистор @@ -4793,20 +4820,20 @@ Resistor color code computation program напряжение высокого уровня - + - + - + - + @@ -4821,16 +4848,16 @@ Resistor color code computation program - - + + - + - + Error Ошибка @@ -5401,7 +5428,7 @@ Wrong 'component' line format! площадь по умолчанию для диода - + Diode Диод @@ -6492,6 +6519,7 @@ Wrong 'component' line format! + put result into dataset поместить результат в набор данных @@ -6782,7 +6810,7 @@ Wrong 'component' line format! начальный ток для моделирования переходных процессов - + Inductor Катушка индуктивности @@ -6873,7 +6901,7 @@ Wrong 'component' line format! начальное время задержки - + Rectangle Current Источник тока прямоугольной формы @@ -6974,7 +7002,7 @@ Wrong 'component' line format! площадь по умолчанию для полевого транзистора с управляющим pn-переходом - + n-JFET n-JFET @@ -7638,7 +7666,7 @@ Wrong 'component' line format! МОП полевой транзистор - + n-MOSFET МОП полевой транзистор с n-каналом @@ -7656,7 +7684,7 @@ Wrong 'component' line format! МОП полевой транзистор обеднённого типа - + zero-bias threshold voltage пороговое напряжение при нулевом смещении @@ -7847,8 +7875,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature Использовать глобальную температуру SPICE @@ -8622,7 +8650,7 @@ Wrong 'component' line format! - + carrier signal frequency несущая частота сигнала @@ -8837,7 +8865,7 @@ Wrong 'component' line format! температура, при которой были извлечены параметры (только Qucsator) - + Resistor Резистор @@ -8977,8 +9005,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (доступная) AC мощность в ваттах + (доступная) AC мощность в ваттах @@ -9066,7 +9098,7 @@ Wrong 'component' line format! файл списка цепей SPICE - + SPICE netlist список цепей SPICE @@ -9081,7 +9113,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". ОШИБКА: Нет имени файла в компоненте SPICE "%1". @@ -9102,7 +9134,7 @@ Wrong 'component' line format! ОШИБКА: Не удаётся открыть преобразованный SPICE-файл "%1". - + Info Информация @@ -9163,12 +9195,11 @@ Wrong 'component' line format! тип порта (только для цифрового моделирования) - Conjugated port for XSPICE differential ports - Связанный порт для дифференциальных портов XSPICE + Связанный порт для дифференциальных портов XSPICE - + Subcircuit Port Порт подсхемы @@ -9236,7 +9267,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9691,7 +9722,7 @@ Wrong 'component' line format! идеальный источник постоянного напряжения - + dc Voltage Source источник напряжения постоянного тока @@ -9736,7 +9767,7 @@ Wrong 'component' line format! напряжение во время импульса - + Voltage Pulse Источник импульсного напряжения @@ -9756,7 +9787,7 @@ Wrong 'component' line format! напряжение низины импульса (только SPICE) - + Rectangle Voltage Источник напряжения прямоугольной формы @@ -9850,7 +9881,7 @@ Wrong 'component' line format! Таблица истинности - + ERROR: Cannot open file "%1". ОШИБКА: Не удаётся открыть файл "%1". @@ -9895,13 +9926,13 @@ Overwrite ? Ошибка запуска Inkscape! - + Successfully exported Успешно экспортировано - + Disk write error! Ошибка записи на диск! @@ -9921,7 +9952,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices пользовательские модели verilog-a @@ -10024,16 +10055,16 @@ Use PNG, JPEG or SVG graphics! устаревшие устройства Qucs - + - + diagrams диаграммы - + paintings @@ -10045,7 +10076,7 @@ Use PNG, JPEG or SVG graphics! внешние компоненты моделирования - + Edit Properties Изменить свойства @@ -10055,7 +10086,7 @@ Use PNG, JPEG or SVG graphics! Сохранить как изображение - + power matching согласование мощности @@ -10128,7 +10159,7 @@ Set the Octave location on the application settings. Текст - + Rectangle Прямоугольник @@ -10138,7 +10169,7 @@ Set the Octave location on the application settings. заполненный прямоугольник - + Edit Rectangle Properties Изменение свойств прямоугольника @@ -10157,15 +10188,15 @@ Set the Octave location on the application settings. без названия - - + + Format Error: 'Painting' field is not closed! Ошибка формата: Поле 'Painting' не закрыто! - + Wrong document version: Неправильная версия документа: @@ -10183,7 +10214,7 @@ Unknown field! Невозможно сохранить C++ файл "%1"! - + Cannot open Verilog-A file "%1"! Невозможно открыть файл Verilog-A «%1»! @@ -10204,7 +10235,7 @@ Unknown field! Невозможно сохранить файл обозначений JSON "%1"! - + Cannot save document! Не удаётся сохранить документ! @@ -10217,7 +10248,7 @@ Wrong property field limiter! Неправильный ограничитель поля свойства! - + Format Error: Unknown property: Ошибка формата: @@ -10334,14 +10365,14 @@ Wrong 'painting' line format! Всё равно попытаться открыть? - + File Format Error: Unknown field! Ошибка формата файла: Неизвестное поле! - + ERROR: Component "%1" has no analog model. ОШИБКА: У компонента "%1" нет аналоговой модели. @@ -10361,7 +10392,7 @@ Unknown field! ПРЕДУПРЕЖДЕНИЕ: Пропускается библиотечный компонент "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" ОШИБКА: "%1": Не удаётся загрузить библиотечный компонент "%2" из "%3" @@ -10371,12 +10402,12 @@ Unknown field! ПРЕДУПРЕЖДЕНИЕ: Моделируемый компонент в подсхеме "%1" будет игнорироваться. - + WARNING: Equations in "%1" are 'time' typed. ПРЕДУПРЕЖДЕНИЕ: уравнения в «%1» имеют тип «время». - + ERROR: Only one digital simulation allowed. ОШИБКА: Разрешается только одно цифровое моделирование. @@ -10611,7 +10642,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) Среднеквадратичная амплитуда шума (Гаусс) @@ -10662,7 +10693,7 @@ Leave continuation lines blank when NOT in use. Оставляйте строки продолжения пустыми, когда НЕ используется. - + V(PWL) V(PWL) @@ -10672,8 +10703,8 @@ Leave continuation lines blank when NOT in use. SPICE V(AM): только ngspice. - - + + voltage amplitude амплитуда напряжения @@ -11094,12 +11125,12 @@ Leave continuation lines blank when NOT in use. Скрипт Nutmeg - + SPICE I(SFFM): SPICE I(SFFM): - + offset current ток смещения @@ -11130,12 +11161,12 @@ Leave continuation lines blank when NOT in use. Скрипт включения - + SPICE I(TRNOISE): SPICE I(TRNOISE): - + I(TRNOISE) I(TRNOISE) @@ -11149,17 +11180,17 @@ Leave continuation lines blank when NOT in use. Оставляйте строки продолжения пустыми, когда НЕ используется. - + I(PWL) I(PWL) - + SPICE I(AM): ngspice only. SPICE I(AM): только ngspice. - + I(AM) I(AM) @@ -11199,7 +11230,7 @@ seven line XSPICE specification. семистрочная спецификация XSPICE. - + core ядро @@ -11211,7 +11242,7 @@ Seven line XSPICE specification. Семистрочная спецификация XSPICE. - + XAPWL XAPWL @@ -11225,7 +11256,7 @@ Leave continuation lines blank when NOT in use. Оставляйте строки продолжения пустыми, когда НЕ используется. - + U(URC) U(URC) @@ -11256,7 +11287,7 @@ Leave continuation lines blank when NOT in use. W(CSW) - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11298,7 +11329,7 @@ Leave continuation lines blank when NOT in use. B-источник (I) - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11600,7 +11631,7 @@ Leave continuation lines blank when NOT in use. Q(PNP) 5 выводов - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11629,7 +11660,7 @@ Leave continuation lines blank when NOT in use. Открыть документ - + Not Specified Не указан @@ -11877,6 +11908,22 @@ Leave continuation lines blank when NOT in use. Spiral inductor Спиральный индуктор + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter @@ -11936,29 +11983,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) Затухание в полосе пропускания, Ap (дБ) - + Stopband attenuation, As (dB) Затухание в полосе задерживания, As (дБ) - + Cutoff frequency, Fc (Hz) Частота среза, Fc (Гц) - - + + Stopband frequency, Fs (Hz) Частота полосы задерживания, Fs (Гц) - + Passband ripple Rp(dB) Пульсация в полосе пропускания, Rp (дБ) @@ -12033,7 +12080,7 @@ Enables/disables the filter calculation console Амплитудно-частотная характеристика фильтра общего вида - + Unable to implement filter with such parameters and topology @@ -12068,7 +12115,7 @@ Change parameters and/or topology and try again! Copyright (C) 2014, 2015 - + Filter topology Схемотехника фильтра @@ -12104,12 +12151,12 @@ Change parameters and/or topology and try again! - + Cauer section Звено фильтра Кауэра - + Filter parameters Параметры фильтра @@ -12119,12 +12166,12 @@ Change parameters and/or topology and try again! Передаточная функция и схемотехника - + Filter topology preview Просмотр схемы звена фильтра - + Filter calculation console Результаты расчётов фильтра @@ -12201,12 +12248,13 @@ Active Filter synthesis program QucsApp - + + Schematic Схема - + Symbol only Только символ @@ -12222,42 +12270,42 @@ Active Filter synthesis program - + VHDL Sources Исходные тексты VHDL - - + + Verilog Sources Исходные тексты Verilog - - + + Verilog-A Sources Исходные тексты Verilog-A - - + + Octave Scripts Скрипты Octave - + Spice Files Файлы Spice - + Any File Любой файл - + The schematic search path has been refreshed. Путь для поиска файла схемы был обновлён. @@ -12272,13 +12320,13 @@ Active Filter synthesis program VHDL - - + + QucsatorRF found at: QucsatorRF найден в: - + You can specify another location later using Simulation->Simulators Setings @@ -12294,12 +12342,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo ПРИМЕЧАНИЕ: Обнаружен только движок QucsatorRF. Этот симулятор не рекомендуется использовать для схем общего назначения. Установите Ngspice. - + No simulators found automatically. Please specify simulators in the next dialog window. Симуляторы не найдены автоматически. Пожалуйста, укажите симуляторы в следующем диалоговом окне. - + Open file Открыть файл @@ -12309,7 +12357,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Документ открыт в режиме только для чтения! Моделирование не будет работать. Скопируйте документ в каталог, для которого у вас есть права на запись! - + Open example… Открыть пример… @@ -12324,14 +12372,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Открытие примера отменено - - - + + + Simulate schematic Моделировать схему - + DC bias simulation mode is not supported for digital schematic! Режим симуляции рабочей точки по постоянному току не поддерживается для цифровой схемы! @@ -12341,12 +12389,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Схемы - + New Создать - + Qucs Qucs @@ -12363,7 +12411,7 @@ and simple press Apply button и просто нажмите кнопку «Применить» - + Main Dock Главное прикрепляемое окно @@ -12398,13 +12446,13 @@ and simple press Apply button содержимое текущего проекта - + Search Components Компоненты для поиска - + Clear Очистить @@ -12439,8 +12487,9 @@ and simple press Apply button Прикрепляемое окно Octave - - + + + @@ -12451,12 +12500,12 @@ and simple press Apply button - + - + @@ -12464,7 +12513,7 @@ and simple press Apply button - + @@ -12482,44 +12531,44 @@ and simple press Apply button Ошибка - + Cannot open "%1". Не удаётся открыть "%1". - + Library is corrupt. Библиотека повреждена. - + - - - + + + - + Info Информация - + Default icon not found: %1.png Значок по умолчанию не найден: %1.png - + -port -портовый @@ -12530,14 +12579,14 @@ and simple press Apply button - + The document contains unsaved changes! В документе есть несохранённые изменения! - + Do you want to save the changes before copying? Хотите сохранить изменения перед копированием? @@ -12581,17 +12630,17 @@ and simple press Apply button Невозможно удалить открытый файл! - - + + - - + + Warning Предупреждение - + This will delete the file permanently! Continue ? Это безвозвратно удалит файл! Продолжить ? @@ -12654,12 +12703,12 @@ and simple press Apply button конфигурация - + Cannot create work directory ! Не удаётся создать рабочий каталог! - + Cannot create project directory ! Не удаётся создать каталог проекта! @@ -12691,10 +12740,10 @@ and simple press Apply button Не удалось удалить файл: %1 - - + + - + Search results Результаты поиска @@ -12705,7 +12754,7 @@ and simple press Apply button Установить симулятор - + Ngspice found at: Ngspice найден в: @@ -12718,7 +12767,7 @@ and simple press Apply button Ngspice не найден автоматически. Пожалуйста, укажите симуляторы в следующем диалоговом окне. - + Search Lib Components Поиск библиотечных компонентов @@ -12728,12 +12777,12 @@ and simple press Apply button Показать модель - + verilog-a user devices пользовательские модели verilog-a - + Cannot copy file to identical name: %1 Нельзя копировать файл в идентичное имя: %1 @@ -12816,34 +12865,34 @@ and simple press Apply button Создание новой схемы... - - + + - + - + - + Ready. Готово. - + Creating new text editor... Создание нового текстового редактора... - + Opening file... Открытие файла... @@ -12865,12 +12914,12 @@ and simple press Apply button - + Saving aborted Сохранение прервано - + Qucs Netlist Схема Qucs @@ -12885,12 +12934,13 @@ and simple press Apply button Простой текст - + + Subcircuit symbol Символ подсхемы - + Enter a Document Name Введите имя документа @@ -12954,7 +13004,7 @@ and simple press Apply button Отрыть каталог с примерами... - + untitled без названия @@ -12994,22 +13044,28 @@ and simple press Apply button Функция добавления символов к исходным текстам Verilog-A устарела и не рекомендуется к использованию в новых проектах. Воспользуйтесь типовым устройством SPICE. Подробные сведения доступны в документации. - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! Схема не сохранена! Невозможно смоделировать несохранённую схему. Сначала выполните сохранение схемы! - + Simulation of text document is not possible! Моделирование текстового документа невозможно! - + This action is supported only for SPICE simulators! Это действие поддерживается только для симуляторов SPICE! - + + + Save CDL netlist failed! + + + + Save Verilog-A module Сохранить модуль Verilog-A @@ -13034,7 +13090,7 @@ Use subcircuit to crete Verilog-A module! Действительно хотите выйти из приложения? - + The document was modified by another program ! Этот документ изменён другой программой! @@ -13136,7 +13192,14 @@ Use subcircuit to crete Verilog-A module! Не является вкладкой схемы! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -13219,7 +13282,7 @@ Overwrite ? Не удаётся записать файл "%1" ! - + Please open project with subcircuits! Откройте проект с подсхемами! @@ -13289,7 +13352,7 @@ Have you saved the Verilog-A symbols? Прикрепляемое окно OpenVAF - + &New &Создать @@ -14145,7 +14208,38 @@ Starts S-parameter viewer Запускает просмотрщик S-параметров - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S &О программе Qucs-S @@ -14203,7 +14297,7 @@ Install Content of a Package Ctrl+Shift+I - + Convert data file Преобразовать файл данных @@ -14563,7 +14657,7 @@ Changes to data display or schematic page Переход между просмотром данных или схемы - + Set Diagram Limits Установить пределы диаграммы @@ -14606,7 +14700,7 @@ Resets the limits for all axis to auto. Сбрасывает пределы для всех осей на автоматические. - + Simulators Settings... Настройка симуляторов... @@ -14627,7 +14721,7 @@ Rotates the selected component by 90° counter-clockwise Поворачивает выделенный компонент на 90° против часовой стрелки - + Mirror about X Axis Развернуть по оси X @@ -15062,12 +15156,12 @@ Starts standard resistor color code computation program - + Simulate Моделировать - + Simulates the current schematic Моделирует текущую схему @@ -15120,17 +15214,16 @@ Calculates DC bias and shows it - + Save netlist Сохранить список цепей - Save netlist to file - Сохранить список цепей в файл + Сохранить список цепей в файл - + Set Marker on Graph Установить маркер на диаграмме @@ -15149,7 +15242,7 @@ Sets a marker on a diagram's graph Устанавливает маркер на графике диаграммы - + Show Last Messages Показать последние сообщения @@ -15385,12 +15478,12 @@ About Qt by Trolltech &Моделирование - + &View &Вид - + &Help &Справка @@ -15501,7 +15594,7 @@ Open - + Input Ввод @@ -16201,7 +16294,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties Настройки Qucs @@ -16210,7 +16303,7 @@ Enables/disables the table of contents Шрифт (вступит в действие после перезагрузки): - + Large font size: Крупный размер шрифта: @@ -16220,117 +16313,117 @@ Enables/disables the table of contents Цвет фона документа: - + Language (set after reload): Язык (вступит в действие после перезагрузки): - + system language системный язык - + English Английский - + German Немецкий - + French Французский - + Spanish Испанский - + Italian Итальянский - + Polish Польский - + Romanian Румынский - + Japanese Японский - + Swedish Шведский - + Hungarian Венгерский - + Hebrew Иврит - + Portuguese-BR Португальский (Бразилия) - + Portuguese-PT Португальский (Португалия) - + Turkish Турецкий - + Ukrainian Украинский - + Russian Русский - + Czech Чешский - + Catalan Каталанский - + Arabic Арабский - + Chinese Китайский - + Schematic font (set after reload): Шрифт схемы (устанавливается после перезагрузки): @@ -16345,12 +16438,12 @@ Enables/disables the table of contents Шрифт текстового документа (устанавливается после перезагрузки): - + Kazakh Казахский - + Maximum undo operations: Максимум операций отмены: @@ -16380,7 +16473,7 @@ Enables/disables the table of contents Попробуйте также загрузить документы, созданные в более новых версиях Qucs. - + Draw diagrams with anti-aliasing feature: Нарисовать диаграммы с функцией сглаживания: @@ -16408,7 +16501,7 @@ Enables/disables the table of contents Использовать сглаживание для текста для улучшения внешнего вида. - + Show trace name prefix on diagrams: Показывать префикс имени трассировки на диаграммах: @@ -16430,6 +16523,26 @@ Enables/disables the table of contents Settings Настройки + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -16592,7 +16705,7 @@ open files with an appropriate program. Значения по умолчанию - + Error Ошибка @@ -16602,7 +16715,7 @@ open files with an appropriate program. Это расширение уже зарегистрировано! - + Select the home directory Выбрать домашний каталог @@ -17205,7 +17318,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Файл @@ -17230,7 +17343,7 @@ open files with an appropriate program. &Cохранить сеанс - + &Help &Справка @@ -17246,7 +17359,7 @@ open files with an appropriate program. О Qt... - + Qucs-S S-parameter Help Помощь по S-параметрам Qucs-S @@ -17281,24 +17394,24 @@ Copyright (C) 2024 - - + + Warning Предупреждение - + This file is already in the dataset. Этот файл уже есть в наборе данных. - + This trace is already shown Эта трассировка уже показана - + The display contains no traces. Экран не содержит трассировок. @@ -17322,7 +17435,7 @@ Copyright (C) 2024 - + Qucs-S snp viewer session (*.spar); Сеанс просмотра Qucs-S snp (*.spar); @@ -17373,7 +17486,7 @@ Copyright (C) 2024 Schematic - + Title Название @@ -17408,7 +17521,7 @@ Edits the text file Редактируется текстовый файл - + Edit Schematic Изменить схему @@ -17446,12 +17559,12 @@ Edits the symbol for this schematic Правка обозначения для этой схемы - + generic обобщённый - + Error Ошибка @@ -17471,7 +17584,7 @@ Set the admsXml location on the application settings. Статус - + Netlist error Ошибка списка цепей @@ -17714,7 +17827,7 @@ Set the admsXml location on the application settings. создание схемы... - + Error Ошибка @@ -17726,7 +17839,7 @@ Set the admsXml location on the application settings. Невозможно прочитать список цепей! - + ERROR: Simulator is still running! ОШИБКА: Симулятор всё ещё запущен! @@ -17752,14 +17865,14 @@ Set the admsXml location on the application settings. - + done. готово. - + ERROR: Cannot create VHDL directory "%1"! ОШИБКА: Не удаётся создать VHDL каталог "%1"! @@ -17770,7 +17883,7 @@ Set the admsXml location on the application settings. ОШИБКА: Не удаётся создать "%1"! - + ERROR: Cannot start ОШИБКА: Невозможно запустить @@ -17841,12 +17954,12 @@ Set the admsXml location on the application settings. Симулятор по умолчанию - + Ngspice executable location Расположение исполняемого файла Ngspice - + Xyce executable location Расположение исполняемого файла Xyce @@ -17873,40 +17986,54 @@ Set the admsXml location on the application settings. Каталог для сохранения выходных файлов списка цепей и симулятора - Extra simulator parameters - Дополнительные параметры симулятора + Дополнительные параметры симулятора - + Apply changes Применить изменения - + Cancel Отменить - - - - + + + + Select ... Выбрать… - + Ngspice compatibility mode Режим совместимости Ngspice - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings Параметры SPICE - + Qucsator settings Параметры Qucsator @@ -17926,7 +18053,7 @@ Please restart Qucs to affect changes! Перезапустите Qucs, чтобы применить изменения! - + Select Ngspice executable location Выбрать расположение исполняемого файла Ngspice @@ -17940,7 +18067,7 @@ Please restart Qucs to affect changes! Выбрать расположение исполняемого файла Xyce Parallel - + Select SpiceOpus executable location Выбрать расположение исполняемого файла SpiceOpus @@ -17977,7 +18104,24 @@ Please restart Qucs to affect changes! Файл: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + Показать + + + + SPICE parameters: + + + + show file name in schematic показать имя файла в схеме @@ -18032,7 +18176,7 @@ Please restart Qucs to affect changes! Отменить - + Select a file Выбор файла @@ -18102,50 +18246,63 @@ Please restart Qucs to affect changes! SpiceLibCompDialog - - + + Open Открыть - + Automatic symbol Автоматический символ - + Symbol from template Символ из шаблона - + Symbol from file Символ из файла - - - + + + Show Показать - + OK OK - + Apply Применить - + Cancel Отменить - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model Модель SPICE @@ -18174,24 +18331,24 @@ No SUBCKT directive found in library - + Error Ошибка - + Failed to open file: Не удаётся открыть файл: - + No symbol loaded Символ не загружен - + Failed to load symbol file! Не удаётся загрузить символьный файл! @@ -18216,7 +18373,8 @@ No SUBCKT directive found in library Схемное обозначение (*.sym) - + + Warning Предупреждение @@ -18458,7 +18616,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component Добавить компонент @@ -18637,10 +18795,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Ошибка + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: Макс.: diff --git a/translations/qucs_sv.ts b/translations/qucs_sv.ts index 3e7ce0204..0dfade1f8 100644 --- a/translations/qucs_sv.ts +++ b/translations/qucs_sv.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Simulera @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Redigera komponentegenskaper - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Svep - - - - - - - - - display in schematic - visa schema + visa schema - Simulation: - Simulering: + Simulering: - Sweep Parameter: - Svepparameter: + Svepparameter: - Type: - Typ: + Typ: - linear - linjär + linjär - logarithmic - logaritmisk + logaritmisk - list - lista + lista - constant - konstant + konstant - Values: - Värden: + Värden: - Start: - Början: + Början: - Stop: - Slut: + Slut: - - - Step: - Steg: + Steg: - Number: - Antal: + Antal: - - + + Properties Egenskaper - Name: - Namn: + Namn: - + + Name Namn - - Value - Värde + + Simulation + Simulering - display - visa + Sweep Parameter + - Description - Beskrivning + Type + Typ - - Edit - Redigera + + Values + - - Browse - Bläddra + + Start + - - Add - Lägg till + + Stop + - - Remove - Ta bort + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Värde + + + + Show - + display + visa + + + + Description + Beskrivning + + + Edit + Redigera + + + Browse + Bläddra + + + Add + Lägg till + + + Remove + Ta bort + + OK - OK + OK - Apply - Verkställ + Verkställ - Cancel - Avbryt + Avbryt - - - - - - - - - yes - ja + ja - - - - - no - nej + nej - + Select a file Välj en fil @@ -769,66 +774,65 @@ - Points per decade: - Punkter per dekad: + Punkter per dekad: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic visa schema - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Verkställ - + Cancel Avbryt - + OK - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Redigera diagramegenskaper @@ -1359,38 +1363,38 @@ Simulera - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1400,12 +1404,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1416,17 +1420,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2170,12 +2174,12 @@ Node name will not be changed. - + Library Name: - + Choose subcircuits: @@ -2185,7 +2189,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Välj allt @@ -2319,7 +2328,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2331,7 +2340,7 @@ Node name will not be changed. - + Error creating library. @@ -2844,7 +2853,7 @@ men är nu %1 ! Ngspice - + Problem with SaveNetlist @@ -3505,6 +3514,7 @@ men är nu %1 ! + delay time (SPICE only) @@ -3519,7 +3529,7 @@ men är nu %1 ! AM-modulationskälla - + ideal ac current source ideal växelströmskälla @@ -3528,14 +3538,19 @@ men är nu %1 ! peak current in Ampere toppström i A + + + offset current (SPICE only) + + - + damping factor (transient simulation only) dämpningsfaktor (endast transient simulering) - + ac Current Source växelströmskälla @@ -3550,7 +3565,7 @@ men är nu %1 ! ström i A - + dc Current Source dc-strömkälla @@ -3829,7 +3844,7 @@ men är nu %1 ! - + transfer function scaling factor @@ -3846,7 +3861,7 @@ men är nu %1 ! - + npn transistor npn-transistor @@ -4409,20 +4424,20 @@ men är nu %1 ! spänning av hög nivå - + - + - + - + @@ -4437,16 +4452,16 @@ men är nu %1 ! - - + + - + - + Error Fel @@ -4995,7 +5010,7 @@ Felaktigt komponentsradsformat! standardyta för diod - + Diode Diod @@ -5894,6 +5909,7 @@ Felaktigt komponentsradsformat! + put result into dataset skriv resultat till datamängden @@ -6180,7 +6196,7 @@ Felaktigt komponentsradsformat! - + Inductor Induktans @@ -6271,7 +6287,7 @@ Felaktigt komponentsradsformat! - + Rectangle Current Rektangelström @@ -6372,7 +6388,7 @@ Felaktigt komponentsradsformat! standardyta för JFET - + n-JFET n-JFET @@ -7029,7 +7045,7 @@ Felaktigt komponentsradsformat! MOS fälteffektransistor - + n-MOSFET n-MOSFET @@ -7047,7 +7063,7 @@ Felaktigt komponentsradsformat! - + zero-bias threshold voltage @@ -7238,8 +7254,8 @@ Felaktigt komponentsradsformat! - - + + Use global SPICE temperature @@ -8013,7 +8029,7 @@ Felaktigt komponentsradsformat! - + carrier signal frequency @@ -8228,7 +8244,7 @@ Felaktigt komponentsradsformat! - + Resistor Motstånd @@ -8368,7 +8384,7 @@ Felaktigt komponentsradsformat! - (available) ac power in Watts + (available) ac power in dBm @@ -8457,7 +8473,7 @@ Felaktigt komponentsradsformat! SPICE nätlistfil - + SPICE netlist SPICE nätlista @@ -8472,7 +8488,7 @@ Felaktigt komponentsradsformat! spice - + ERROR: No file name in SPICE component "%1". FEL: Inget filnamn i SPICE-komponent "%1". @@ -8493,7 +8509,7 @@ Felaktigt komponentsradsformat! - + Info Information @@ -8554,12 +8570,7 @@ Felaktigt komponentsradsformat! porttyp (endast för digital simulering) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Delkretsport @@ -8627,7 +8638,7 @@ Felaktigt komponentsradsformat! - + simulation temperature in degree Celsius (Qucsator only) @@ -9077,7 +9088,7 @@ Felaktigt komponentsradsformat! ideal likströmsspänningskälla - + dc Voltage Source likströmsspänningskälla @@ -9122,7 +9133,7 @@ Felaktigt komponentsradsformat! pulsens spänning - + Voltage Pulse Spänningspuls @@ -9142,7 +9153,7 @@ Felaktigt komponentsradsformat! - + Rectangle Voltage Rektangelspänning @@ -9236,7 +9247,7 @@ Felaktigt komponentsradsformat! Sanningstabell - + ERROR: Cannot open file "%1". @@ -9278,13 +9289,13 @@ Skriva över? - + Successfully exported - + Disk write error! @@ -9303,7 +9314,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9402,16 +9413,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9423,7 +9434,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Redigera egenskaper @@ -9433,7 +9444,7 @@ Use PNG, JPEG or SVG graphics! - + power matching effektmatchning @@ -9498,7 +9509,7 @@ Use PNG, JPEG or SVG graphics! Text - + Rectangle Rektangel @@ -9508,7 +9519,7 @@ Use PNG, JPEG or SVG graphics! fylld rektangel - + Edit Rectangle Properties Redigera rektangelegenskaper @@ -9527,14 +9538,14 @@ Use PNG, JPEG or SVG graphics! Namnlös - - + + Format Error: 'Painting' field is not closed! Formatfel: Färgläggningsfält är ej stängt! - + Wrong document version: Fel dokumentversion: @@ -9552,7 +9563,7 @@ Okänt fält! - + Cannot open Verilog-A file "%1"! @@ -9573,7 +9584,7 @@ Okänt fält! - + Cannot save document! Kan ej spara dokument! @@ -9586,7 +9597,7 @@ Wrong property field limiter! Felaktig begränsare i egenskapsfält! - + Format Error: Unknown property: Formatfel: @@ -9702,14 +9713,14 @@ Felaktig 'färgläggnings'-radsformat! - + File Format Error: Unknown field! Filformatfel: Okänt fält! - + ERROR: Component "%1" has no analog model. FEL: Komponent "%1" har ingen analog modell. @@ -9729,7 +9740,7 @@ Okänt fält! - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9739,12 +9750,12 @@ Okänt fält! VARNING: Ignorera simuleringskomponent i delkrets "%1". - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. FEL: Endast en digital simulering tillåts. @@ -9964,7 +9975,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10013,7 +10024,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10023,8 +10034,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10435,12 +10446,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10471,12 +10482,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10488,17 +10499,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10533,7 +10544,7 @@ seven line XSPICE specification. - + core @@ -10544,7 +10555,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10556,7 +10567,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10584,7 +10595,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10620,7 +10631,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10892,7 +10903,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -10919,7 +10930,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11159,11 +11170,27 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - - QucsActiveFilter - + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + + QucsActiveFilter + + &File &Fil @@ -11216,29 +11243,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11313,7 +11340,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11347,7 +11374,7 @@ Change parameters and/or topology and try again! Copyright (C) 2005, 2006 by {2014, 2015 ?} - + Filter topology @@ -11383,12 +11410,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11398,12 +11425,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11478,12 +11505,13 @@ Active Filter synthesis program QucsApp - + + Schematic Schema - + Data Display Datavisning @@ -11494,42 +11522,42 @@ Active Filter synthesis program - + VHDL Sources VHDL-källor - - + + Verilog Sources - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Alla filer - + The schematic search path has been refreshed. @@ -11544,7 +11572,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11554,7 +11582,7 @@ Active Filter synthesis program - + Open example… @@ -11569,14 +11597,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11586,23 +11614,23 @@ Active Filter synthesis program Scheman - + New Ny - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11615,7 +11643,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11625,7 +11653,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11660,13 +11688,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo innehål i aktuellt projekt - + Search Components - + Clear @@ -11697,8 +11725,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11709,12 +11738,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11722,7 +11751,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11740,43 +11769,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Fel - + Cannot open "%1". Kan ej öppna "%1". - + Library is corrupt. Bibliotek är förstört. - + - - - + + + - + Info Information - + Default icon not found: %1.png - + -port -port @@ -11787,14 +11816,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! Dokumentet innehåller osparade ändringr! - + Do you want to save the changes before copying? @@ -11838,17 +11867,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Kan ej ta bort en öppen fil! - - + + - - + + Warning Varning - + This will delete the file permanently! Continue ? Detta kommer att ta bort filen för gott! Fortsätta? @@ -11911,12 +11940,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Kan ej skapa arbetsmapp! - + Cannot create project directory ! Kan ej skapa projektmapp! @@ -11944,41 +11973,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12057,34 +12086,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Skapar nytt schema... - - + + - + - + - + Ready. Klar. - + Creating new text editor... Skapar ny textredigerare... - + Opening file... Öppnar fil... @@ -12106,12 +12135,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Spara avbrutet - + Qucs Netlist @@ -12126,12 +12155,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Skriv in ett dokumentnamn @@ -12191,7 +12221,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Kasta - + untitled Namnlös @@ -12231,22 +12261,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12270,7 +12306,7 @@ Use subcircuit to crete Verilog-A module! Vill du verkligen avsluta? - + The document was modified by another program ! Dokumentet har ändrats av ett annat program! @@ -12370,7 +12406,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12450,7 +12493,7 @@ Skriva över? Kan ej skriva "%1" ! - + Please open project with subcircuits! @@ -12513,7 +12556,7 @@ Have you saved the Verilog-A symbols? - + &New &Ny @@ -13343,7 +13386,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13353,7 +13427,7 @@ Starts S-parameter viewer - + Convert data file @@ -13693,7 +13767,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13732,12 +13806,12 @@ Resets the limits for all axis to auto. - + Simulators Settings... - + Mirror about X Axis Spegla i X-axel @@ -14146,12 +14220,12 @@ Starts attenuator calculation program - + Simulate Simulera - + Simulates the current schematic Simulerar aktuellt schema @@ -14204,17 +14278,12 @@ Beräknar DC-förspänning och visar den - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Sätt markör i kurva @@ -14233,7 +14302,7 @@ Sets a marker on a diagram's graph Sätter en markör i ett diagrams kurva - + Show Last Messages Visa senaste meddelande @@ -14461,12 +14530,12 @@ Om Qt från Trolltech &Simulering - + &View &Vy - + &Help &Hjälp @@ -14575,7 +14644,7 @@ Open - + Input @@ -15155,7 +15224,7 @@ Filtersyntesprogram QucsSettingsDialog - + Edit Qucs Properties Redigera Qucs egenskaper @@ -15164,7 +15233,7 @@ Filtersyntesprogram Font (satt efter omladdning): - + Large font size: @@ -15174,117 +15243,117 @@ Filtersyntesprogram Dokumentbakgrundsfärg: - + Language (set after reload): Språk (satt efter omstart): - + system language systemspråk - + English Engelska - + German Tyska - + French Franska - + Spanish Spanska - + Italian Italienska - + Polish Polska - + Romanian Rumänska - + Japanese Japanska - + Swedish Svenska - + Hungarian Ungerska - + Hebrew Hebreiska - + Portuguese-BR - + Portuguese-PT - + Turkish Turkiska - + Ukrainian Ukrainska - + Russian Ryska - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15294,12 +15363,12 @@ Filtersyntesprogram - + Kazakh - + Maximum undo operations: @@ -15329,7 +15398,7 @@ Filtersyntesprogram - + Draw diagrams with anti-aliasing feature: @@ -15344,17 +15413,17 @@ Filtersyntesprogram - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15368,6 +15437,26 @@ Filtersyntesprogram Settings Inställningar + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15531,7 +15620,7 @@ open files with an appropriate program. Standardvärden - + Error Fel @@ -15541,7 +15630,7 @@ open files with an appropriate program. Detta suffix är redan registrerat! - + Select the home directory @@ -16139,7 +16228,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Fil @@ -16164,7 +16253,7 @@ open files with an appropriate program. - + &Help &Hjälp @@ -16180,7 +16269,7 @@ open files with an appropriate program. Om Qt... - + Qucs-S S-parameter Help @@ -16213,24 +16302,24 @@ Copyright (C) 2024 by - - + + Warning Varning - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16254,7 +16343,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16305,7 +16394,7 @@ Copyright (C) 2024 by Schematic - + Title @@ -16325,7 +16414,7 @@ Copyright (C) 2024 by - + Edit Schematic @@ -16361,12 +16450,12 @@ Edits the symbol for this schematic Redigerar symbolen för detta schema - + generic - + Error Fel @@ -16384,7 +16473,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16627,7 +16716,7 @@ Set the admsXml location on the application settings. skapar nätlista... - + Error Fel @@ -16639,7 +16728,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16665,13 +16754,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16682,7 +16771,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -16747,12 +16836,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -16767,40 +16856,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Avbryt - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -16810,7 +16909,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -16820,7 +16919,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -16853,7 +16952,24 @@ Set the admsXml location on the application settings. Fil: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic visa filnamn på schema @@ -16908,7 +17024,7 @@ Set the admsXml location on the application settings. Avbryt - + Select a file Välj en fil @@ -16978,50 +17094,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Öppna - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK - + Apply Verkställ - + Cancel Avbryt - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17049,24 +17178,24 @@ No SUBCKT directive found in library - + Error Fel - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17091,7 +17220,8 @@ No SUBCKT directive found in library - + + Warning Varning @@ -17323,7 +17453,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17498,10 +17628,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Fel + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_tr.ts b/translations/qucs_tr.ts index f5a2f71cb..ce3d1bd94 100644 --- a/translations/qucs_tr.ts +++ b/translations/qucs_tr.ts @@ -4,331 +4,336 @@ AboutDialog - + About Qucs Qucs Hakkında - + Version Versiyon - - - + + + Copyright (C) Telif hakkı - + GUI programmer, Verilog-A dynamic loader GUI programcısı, Verilog-A dinamik yükleyici - + project maintainer, simulator interface and GUI design proje yürütücüsü, simülatör arayüzü ve GUI tasarımı - + component models, documentation komponent modelleri, dokümantasyon - + Xyce integration Xyce entegrasyonu - + Testing, examples Testler, örnekler - + Qt6 support, general improvements Qt6 desteği, genel iyileştirmeler - + Digital simulation, general improvements Dijital simülasyon, genel iyileştirmeler - + CI setup, build system, MacOS support CI kurulumu, derleme sistemi, MacOS desteği - + testing, general bugfixes testler, genel hata düzeltmeleri - + testing, modelling and documentation, tutorial contributor test, modelleme ve dokümantasyon, eğitici katılımcı - + testing, modelling, Octave. test, modelleme, Octave. - + bondwire and rectangular waveguide model implementation bondwire ve dikdörtgen dalga kılavuzu modeli uygulaması - + GUI programmer, release GUI programcısı, sürüm - + filter synthesis (qucs-activefilter), SPICE integration (NGSPICE, Xyce) filtre sentezi (qucs-activefilter), SPICE entegrasyonu (NGSPICE, Xyce) - + testing, general fixes testler, genel düzeltmeler - + refactoring, modularity yeniden kodlama, modülerlik - - + + RF design tools RF tasarım araçları - + Schematic rendering engine, refactoring Şematik oluşturma motoru, yeniden düzenleme - + + Documentation + + + + Refactoring, general improvements Yeniden kodlama, genel iyileştirmeler - + founder of the project, GUI programmer projenin kurucusu, GUI programcısı - + Programmer of simulator Benzetim programcısı - + webpages and translator web sayfaları ve çevirmen - + tester and applyer of Stefan's patches, author of documentation Stefan'ın yamalarının test edicisi ve uygulayıcısı, dokümantasyon yazarı - + coplanar line and filter synthesis code, documentation contributor eş düzlemli hat ve filtre sentez kodu, dokümantasyon katılımcısı - + some filter synthesis code and attenuator synthesis bazı filtre sentez kodları ve zayıflatıcı sentezi - - + + GUI programmer, Qt4 porter GUI programcısı, Qt4 uyarlayıcısı - + programmer of the Verilog-AMS interface Verilog-AMS arayüzünün programcısı - + equation solver contributions, exponential sources, author of documentation denklem çözücü katkıları, üstel kaynaklar, dokümantasyon yazarı - + temperature model for rectangular waveguide dikdörtgen dalga kılavuzu için sıcaklık modeli - + GUI programmer GUI programcısı - + German by Almanca'ya çeviren - + Polish by Lehçe'ye çeviren - + Romanian by Romence'ye çeviren - + French by Fransızca'ya çeviren - + Portuguese by Portekizce'ye çeviren - + Spanish by İspanyolca'ya çeviren - + Japanese by Japonca'ya çeviren - + Italian by İtalyanca'ya çeviren - + Hebrew by İbranice'ye çeviren - + Swedish by İsveçce'ye çeviren - + Turkish by Türkçe'ye çeviren - + Hungarian by Macarca'ya çeviren - + Russian by Rusça'ya çeviren - + Czech by Çekçe'ye çeviren - + Catalan by Katalanca'ya çeviren - + Ukrainian by Ukraynaca'ya çeviren - + Arabic by Arapça'ya çeviren - + Kazakh by Kazakça'ya çeviren - + Chinese by Çince'ye çeviren - + Home Page Ana Sayfa - + Documentation start page Dokümantasyon başlangıç sayfası - + Bugtracker page Bugtracker sayfası - + Forum Forum - + Qucs-S project team: Qucs-S proje ekibi: - + Based on Qucs project developed by: Qucs projesine dayanmaktadır ve geliştiren: - + Authors Yazarlar - + Translations Çeviriler - + Support Destek - + License Lisans - + &OK &Tamam - + Previous Developers Önceki Geliştiriciler - + GUI translations : GUI çevirileri : @@ -336,17 +341,17 @@ AbstractSpiceKernel - + Simulate Benzetimi Başlat - + Failed to create dataset file Veri kümesi dosyası oluşturulamadı - + Check write permission of the directory Dizinin yazma iznini kontrol edin @@ -354,82 +359,82 @@ ArrowDialog - + Edit Arrow Properties Ok Özelliklerini Değiştir - + Head Length: Kafa Uzunluğu: - + Head Width: Kafa Genişliği: - + Line color: Çizgi kalınlığı: - + Line Width: Çizgi Kalınlığı: - + Line style: Çizgi biçimi: - + solid line katı çizgi - + dash line kesikli çizgi - + dot line noktalı çizgi - + dash dot line kesikli ve noktalı çizgi - + dash dot dot line kesik ve nokta nokta çizgi - + Arrow head: Ok ucu: - + two lines çift çizgi - + filled dolu - + OK Tamam - + Cancel İptal @@ -437,12 +442,12 @@ AuxFilesDialog - + Select Seç - + Cancel İptal @@ -450,95 +455,95 @@ ChangeDialog - + Change Component Properties Bileşen Özelliklerini Değiştir - + Components: Bileşenler: - + all components tüm bileşenler - + resistors dirençler - + capacitors kapasitörler - + inductors indüktörler - + transistors transistörler - + Component Names: Bileşen Adları: - + Property Name: Özellik İsmi: - + New Value: Yeni Değer: - + Replace Yerine Koy - - + + Cancel İptal - + Error Hata - + Regular expression for component name is invalid. Bileşen adı için düzenli ifade geçersiz. - + Found Components Bulunan Bileşenler - + Change properties of Özelliklerini değiştir - + these components ? bu bileşenler mi ? - + Yes Evet @@ -546,289 +551,300 @@ ComponentDialog - + Edit Component Properties Bileşen Özelliklerini Değiştir - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Tara - - - - - - - - - display in schematic - Şematikte göster + Şematikte göster - Simulation: - Benzetim: + Benzetim: - Sweep Parameter: - Tarama Parametresi: + Tarama Parametresi: - Type: - Çeşit: + Çeşit: - linear - doğrusal + doğrusal - logarithmic - logaritmik + logaritmik - list - liste + liste - constant - sabit + sabit - Values: - Değerler: + Değerler: - Start: - Başla: + Başla: - Stop: - Dur: + Dur: - - - Step: - Adım: + Adım: - Number: - Sayı: + Sayı: - - + + Properties Özelliler - Name: - İsim: + İsim: - + + Name İsim - + + Simulation + Benzetim + + + + Sweep Parameter + + + + + Type + + + + + Values + + + + + Start + + + + + Stop + Dur + + + + Step + Adım + + + + Number + + + + + Populate parameters from SPICE file... + + + + Value Değer - + + Show + Göster + + display - gösterge + gösterge - + Description Açıklama - Edit - Değiştir + Değiştir - Browse - Gözat + Gözat - Add - Ekle + Ekle - Remove - Kaldır + Kaldır - Move Up - Yukarı + Yukarı - Move Down - Aşağı + Aşağı - Fill from SPICE .MODEL - SPICE .MODEL'den doldurun + SPICE .MODEL'den doldurun - OK - Tamam + Tamam - Apply - Uygula + Uygula - Cancel - İptal + İptal - - - - - - - - - yes - evet + evet - - - - - no - hayır + hayır - + Select a file Dosya seç - + All Files Tüm Dosyalar - + Touchstone files Touchstone dosyaları - + CSV files CVS dosyaları - + SPICE files SPICE dosyaları - + VHDL files VHDL dosyaları - + Verilog files Verilog dosyaları - Points per decade: - Ters üstel (log) için nokta sayısı: + Ters üstel (log) için nokta sayısı: CustomSimDialog - - + + Edit SPICE code SPICE kodunu düzenle - + Component: Bileşen: - + display in schematic Şematikte göster - + Variables to plot (semicolon separated) Çizilecek değişkenler (noktalı virgülle ayrılmış) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) Ekstra çıktılar (noktalı virgülle ayrılmış; raw-SPICE veya XYCE-STD veya scalars yazdırma formatı) - + Apply Uygula - + Cancel İptal - + OK Tamam - + Find all variables Tüm değişkenleri bulun - + Find all outputs Tüm çıktıları bulun - + SPICE code editor SPICE kod editörü @@ -836,240 +852,240 @@ DiagramDialog - + Edit Diagram Properties Diyagram Özelliklerini Değiştir - + left Axis sol Eksen - + right Axis sağ Eksen - - - + + + y-Axis y-Ekseni - - + + smith Axis smith Ekseni - - + + polar Axis kutupsal Eksen - + z-Axis z-Ekseni - + Graph Input Grafik Girişi - + Plot Vs. Plot Vs. - + Number Notation: Sayı Gösterimi: - + real/imaginary gerçel/sanal - + magnitude/angle (degree) genlik/açı (derece) - + magnitude/angle (radian) genlik/açı (radyan) - + Precision: Hassaslık: - + Color: Renk: - + Style: Biçim: - - + + solid line katı çizgi - - + + dash line kesik çizgi - - + + dot line nokta çizgi - + long dash line uzun kesikli çizgi - + stars yıldızlar - + circles çemberler - + arrows oklar - + Thickness: Kalınlık: - + y-Axis: y-Ekseni: - + Dataset Veri Kümesi - + Data from simulator: Simülatörden alınan veriler: - + Name İsim - + Type Biçim - + Size Büyüklük - + Graph Grafik - + New Graph Yeni Grafik - + Delete Graph Grafiği Sil - + Data Veri - + x-Axis Label: x-Ekseni Adı: - - + + Label: Etiket: - + <b>Label text</b>: Use LaTeX style for special characters, e.g. \tau <b>Etiket</b>: LaTeX özel harflerini kullan, mesela \tau - + show Grid Izgarayı göster - + Grid Color: Izgara rengi: - + Grid Style: Izgara Biçimi: - + dash dot line kesikli noktalı çizgi - + dash dot dot line kesikli nokta nokta çizgi - + Number notation: Sayı gösterimi: - + scientific notation bilimsel gösterim - + engineering notation mühendislik notasyonu - + logarithmic X Axis Grid logaritmik X Ekseni Izgarası @@ -1082,103 +1098,103 @@ ters üstel (log) - - + + Grid Izgara - - + + logarithmic logaritmik - + hide invisible lines görünmez çizgileri sakla - + Rotation around x-Axis: x-Ekseni etrafında çevir: - + Rotation around y-Axis: y-Ekseni etrafında çevir: - + Rotation around z-Axis: z-Ekseni etrafında çevir: - + 2D-projection: 2B-İzdüşüm: - + Properties Özellikler - + x-Axis x-Ekseni - - - + + + manual kılavuz - - - + + + start başla - - - + + + step adım - - - + + + stop dur - - + + number sayı - + Limits Sınırlar - + OK Tamam - + Apply Uygula - + Cancel İptal @@ -1186,53 +1202,53 @@ DigiSettingsDialog - - + + Document Settings Belge Ayarları - + Digital Simulation Settings Dijital Simülasyon Ayarları - + Simulation Benzetim - + Duration of Simulation: Benzetim Süresi: - + Precompile Module Ön Derleme Modülü - + Library Name: Kütüphane Adı: - + Libraries: Kütüphaneler: - + Ok Tamam - + Cancel İptal - + Error Hata @@ -1252,17 +1268,17 @@ Verilog - + SPICE SPICE - + Qucs Qucs - + Close Kapat @@ -1270,92 +1286,92 @@ ExportDialog - + Export graphics Grafikleri dışa aktarma - + Save to file (Graphics format by extension) Dosyaya kaydet (Uzantıya göre grafik formatı) - + Height in pixels Piksel cinsinden yükseklik - + Scale factor: Ölçek faktörü: - + Image format: Görüntü formatı: - + Export Dışa Aktar - + Cancel İptal Et - + Width in pixels Piksel cinsinden genişlik - + Browse Gözat - + Colour Renk - + Monochrome tekrenkli - + Grayscale Gri Tonlama - + Original width to height ratio Orijinal genişlik/yükseklik oranı - + Original size Orijinal boyut - + Export selected only Seçilileri dışa aktar - + Export schematic to raster or vector image Şemayı raster veya vektör görüntüsüne aktarma - + Export Schematic to Image Şemayı Görüntüye Aktarma - + Export diagram to raster or vector image Diyagramı raster veya vektör görüntüsüne aktarma @@ -1367,80 +1383,80 @@ Benzetimi Başlat - + Stop Dur - - + + Save netlist Net listesini kaydet - + Exit Çıkış - + Simulation console Simülasyon uçbirimi - + Simulate with external simulator Harici simülatör ile simüle edin - + There were simulation errors. Please check log. Simülasyon hataları oluştu. Lütfen günlüğü kontrol edin. - + There were simulation warnings. Please check log. Simülasyon hataları oluştu. Lütfen günlüğü kontrol edin. - + Simulation finished. Now place diagram on schematic to plot the result. Simülasyon tamamlandı. Şimdi sonucu çizmek için diyagramı şematik üzerine yerleştirin. - + Simulation successful. Now place diagram on schematic to plot the result. Simülasyon başarılı. Şimdi sonucu çizmek için diyagramı şematik üzerine yerleştirin. - + started... başladı... - + Simulation started on: Simülasyon başladı: - + Failed to start simulator! Simülatör başlatılamadı! - + Simulator crashed! Simülatör çöktü! - + Simulator error! Simülatör hatası! - + error... Hata. @@ -1448,152 +1464,152 @@ FillDialog - + Line Width: Çizgi Kalınlığı: - + Line Color: Çizgi Rengi: - + Line Style: Çizgi Biçimi: - + solid line katı çizgi - + dash line kesikli çizgi - + dot line noktalı çizgi - + dash dot line kesikli ve noktalı çizgi - + dash dot dot line kesik ve nokta nokta çizgi - + Line Style Çizgi Biçimi - + enable filling dolguyu etkinleştir - + Fill Color: Dolgu Rengi: - + Fill Style: Dolgu Biçimi: - + no filling dolgu yok - + solid katı - + dense 1 (densest) 1 derece yoğun (en çok) - + dense 2 2 derece yoğun - + dense 3 3 derece yoğun - + dense 4 4 derece yoğun - + dense 5 5 derece yoğun - + dense 6 6 derece yoğun - + dense 7 (least dense) 7 derece yoğun (en az) - + horizontal line yatay çizgi - + vertical line dikey çizgi - + crossed lines kesişen çizgiler - + hatched backwards h-geri - + hatched forwards h-ileri - + diagonal crossed dikey kesişen - + Filling Style Dolgu Biçimi - + OK Tamam - + Cancel İptal @@ -1656,52 +1672,52 @@ Süzgeç tasarım yazılımı GraphicTextDialog - + Edit Text Properties Yazı Özelliklerini Değiştir - + Use LaTeX style for special characters, e.g. \tau LaTeX özel harfleri kullanılabilir, mesela \tau - + Use _{..} and ^{..} for sub- and super-positions. Üst ve alt metin konumu için _{..} ve ^{..} kullanɪn. - + &OK &Tamam - + &Cancel &İptal - + Text color: Yazı rengi: - + Text size: Metin boyutu: - + Rotation angle: Dönme açısı: - + Error Hata - + The text must not be empty! Metin boş olmamalı! @@ -1709,13 +1725,13 @@ Süzgeç tasarım yazılımı HelpDialog - + QucsFilter is a filter synthesis program. To create a filter, simply enter all parameters and press the big button at the bottom of the main window. Immediately, the schematic of the filter is calculated and put into the clipboard. Now go to Qucs, open an empty schematic and press CTRL-V (paste from clipboard). The filter schematic can now be inserted and simulated. Have lots of fun! QucsFilter bir filtre sentez programıdır. Bir filtre oluşturmak için tüm parametreleri girmeniz ve ana pencerenin altındaki büyük düğmeye basmanız yeterlidir. Hemen, filtrenin şeması hesaplanır ve panoya yerleştirilir. Şimdi Qucs'a gidin, boş bir şema açın ve CTRL-V'ye (panodan yapıştır) basın. Filtre şeması artık eklenebilir ve simüle edilebilir. İyi eğlenceler! - - + + Close Kapat @@ -1724,27 +1740,27 @@ Süzgeç tasarım yazılımı QucsFilter bir süzgeç tasarım yazılımıdır. Bir süzgeç oluşturmak için, sadece tüm değişkenleri girmek ve ana pencerenin altındaki büyük düğmeye basmak yeterli. Süzgecin tasarısı hemen hesaplanır ve not tahtasına konur. Şimdi Qucs' ta bir boş tasarı girdi penceresi açın ve CTRL-V' ye basın (not tahtasından çogalt). Bundan sonra süzgeç tasarısı başka bir devre içine konabilir ve benzetime tabi tutulabilir. Tadını çıkarın ! - + Help Yardım - + QucsTranscalc is an analysis and synthesis tool for calculating the electrical and physical properties of different kinds of RF and microwave transmission lines. QucsTranscalc, farklı tipteki RF ve mikro dalga iletim hatlarının elektriksel ve fiziksel hesaplarını yapmak için geliştirilmiş bir çözümleme (analiz) ve tasarım (dizayn) yazılımıdır. - + For each type of transmission line, using dialog boxes, you can enter values for the various parameters, and either calculate its electrical properties, or use the given electrical requirements to synthesize physical parameters of the required transmission line. Her bir çeşit iletim hattı için -iletişim pencerelerini kullanmak yolu ile- çeşitli değişkenler için değerler girebilir, elektriksel özelliklerini hesaplayabilir ya da verilen elektriksel gereksinimlere göre istenen iletim hattının fiziksel özelliklerini hesaplayabilir/tasarlayabilirsiniz. - + Dismiss Gözardı et - + QucsActiveFilter is a active filter synthesis program. Butterworth, Chebyshev, Inverse Chebyshev, Cauer, Bessel and User defined transfer function are supported.To create a filter, simply enter all parameters and press the big button at the bottom of the main window. Immediately, the schematic of the filter is calculated and put into the clipboard. Now go to Qucs, open an empty schematic and press CTRL-V (paste from clipboard). The filter schematic can now be inserted and simulated. Have lots of fun! QucsActiveFilter aktif bir filtre sentez programıdır. Butterworth, Chebyshev, Inverse Chebyshev, Cauer, Bessel ve Kullanıcı tanımlı transfer fonksiyonu desteklenir. Bir filtre oluşturmak için tüm parametreleri girin ve ana pencerenin altındaki büyük düğmeye basın. Hemen filtrenin şeması hesaplanır ve panoya yerleştirilir. Şimdi Qucs'a gidin, boş bir şema açın ve CTRL-V'ye basın (panodan yapıştır). Filtre şeması artık eklenebilir ve simüle edilebilir. İyi eğlenceler! @@ -1752,344 +1768,344 @@ Süzgeç tasarım yazılımı ID_Dialog - + Edit Subcircuit Properties Alt-devre Özelliklerini Değiştir - + Prefix: Ön Ek: - + Parameters Değişkenler - + display gösterge - + Name İsim - + Default Öntanımlı - + Description Açıklama - + Type Çeşit - - - - - + + + + + yes evet - - - + + + no hayır - + display in schematic Şematikte göster - + Name: İsim: - + Default Value: Öntanımlı Değer: - + Description: Açıklama: - + Type: Çeşit: - + Add Ekle - + Remove Kaldır - + OK Tamam - + Apply Uygula - + Cancel İptal - - + + Error Hata - - Parameter must not be named "File"! - Değişkenin ismi "File" olmamalı! + + Parameter must not be named "File"! + Değişkenin ismi "File" olmamalı! - - Parameter "%1" already in list! - "%1" değişkeni dizgede zaten var! + + Parameter "%1" already in list! + "%1" değişkeni dizgede zaten var! ImportDialog - + Convert Data File... Veri Dosyasını Dönüştür... - + File specification Dosya özellikleri - + Input File: Girdi Dosyası: - - + + Browse Gözat - + Output File: Çıktı Kütügü: - + Output Data: Çıktı Verileri: - - + + Qucs dataset Qucs veri kümesi - - + + Touchstone Touchstone - - + + CSV CSV - + Input Format: Giriş Biçimi: - + SPICE netlist SPICE bağlantı listesi - + VCD dataset VCD veri kümesi - + Citi Citi - + ZVR ZVR - + MDL MDL - + Output Format: Çıktı Formatı: - - + + Qucs library Qucs kütüphanesi - + Qucs netlist Qucs net listesi - + Matlab Matlab - + Library Name: Kütüphane Adı: - + Messages iletiler - + Convert Dönüştür - + Abort iptal - + Close Kapat - - + + All known Tamamı bilinen - - + + Touchstone files Touchstone dosyaları - - + + CSV files CVS dosyaları - + CITI files CITI dosyaları - + ZVR ASCII files ZVR ASCII dosyaları - + IC-CAP model files IC-CAP model dosyaları - + VCD files VCD dosyaları - - + + Qucs dataset files Qucs veri kümesi dosyaları - - + + SPICE files SPICE dosyaları - - + + Any file Herhangi bir dosya - + Error Hata - + Cannot open file: Dosya açılamıyor: - - + + Enter a Data File Name Veri Kütügünün Adını Girin - + Qucsator netlist Qucsator net listesi - + Info Bilgi - + Output file already exists! Çıktı dosyası zaten var! - + Overwrite it? Üzerine yazılsın mı? @@ -2106,22 +2122,22 @@ Süzgeç tasarım yazılımı HATA: Bilinmeyen dosya biçimi! Lütfen dosya uzantısını denetleyin! - + Running command line: Komut satırını çalıştırıyorum: - + ERROR: Cannot start converter! HATA: Çevirici açılamıyor ! - + Successfully converted file! Dosya başarıyla dönüştürüldü! - + Converter ended with errors! Çevirici, hata ile sonlandı! @@ -2129,53 +2145,53 @@ Süzgeç tasarım yazılımı LabelDialog - + Insert Nodename Düğüm Adı Girin - + Enter the label: Yaftayı (Etiket) Girin: - + Initial node voltage: Düğümün ilk gerilimi: - - + + Less... Az... - + Ok Tamam - + Cancel İptal - - + + More... Daha fazla... - + SPICE checker SPICE denetleyicisi - - Node name "%1" is Nutmeg reserved keyword! + + Node name "%1" is Nutmeg reserved keyword! Please select another node name! Node name will not be changed. - Düğüm adı "%1" Nutmeg için ayrılmış anahtar sözcük! + Düğüm adı "%1" Nutmeg için ayrılmış anahtar sözcük! Lütfen başka bir düğüm adı seçin! Düğüm adı değiştirilmeyecektir. @@ -2183,113 +2199,118 @@ Düğüm adı değiştirilmeyecektir. LibraryDialog - + Create Library Kütüphane Olustur - - + + Library Name: Kütüphane Adı: - + Choose subcircuits: Alt devreleri seçiniz: - + Add subcircuit description Alt devre açıklaması ekleyin - + + Analog models only + + + + Select All Tümünü Seç - + Deselect All Tümünü Seçme - - + + Cancel İptal - - + + Next >> Devam>> - + Enter description for: Şunun için açıklama girin: - + Description: Açıklama: - + Previous Önceki - - + + Create Oluştur - + Message: Mesaj: - + Close Kapat - + No projects! Tasarım yok! - - - + + + Error Hata - + Please insert a library name! Lütfen kütüphanenin ismini girin! - + Please choose at least one subcircuit! Lütfen en azından bir altdevre seçiniz! - + Warning Uyarı - + Cannot create user library directory ! Kullanıcı kütüphanesi için dizin olusturulamıyor ! - + A library with this name already exists! Rewrite? Bu isimde bir kütüphane zaten var! Yeniden yazalım mı? @@ -2302,74 +2323,74 @@ Düğüm adı değiştirilmeyecektir. Bu isimde bir kütüphane zaten var! - + Next... Sıradaki... - + Saving library... Kütüphaneyi kurtarmak... - + Error: Cannot create library! Hara: Kütüphane olusturulamıyor! - - Loading subcircuit "%1". + + Loading subcircuit "%1". - "%1" alt devresi yükleniyor. + "%1" alt devresi yükleniyor. - - Error: Cannot load subcircuit "%1". - Hata: "%1" altdevresi yüklenemiyor. + + Error: Cannot load subcircuit "%1". + Hata: "%1" altdevresi yüklenemiyor. - + Creating Qucs netlist. Qucs net listesi oluşturma. - - Error: Cannot create netlist for "%1". + + Error: Cannot create netlist for "%1". - Hata: "%1" için netlist oluşturulamıyor. + Hata: "%1" için netlist oluşturulamıyor. - + Creating SPICE netlist. SPICE netlisti oluşturma. - + Creating Verilog netlist. Verilog netlisti oluşturma. - + Creating VHDL netlist. VHDL netlist oluşturma. - + Error creating library. Kütüphane oluşturulurken hata oluştu. - + Successfully created library. Kütüphane başarılı bir biçimde oluşturuldu. @@ -2426,90 +2447,90 @@ Düğüm adı değiştirilmeyecektir. Kütüphane dosyası bozuk! - No permission to delete library "%1". - "%1" kütüphanesini silmek için izin yok. + No permission to delete library "%1". + "%1" kütüphanesini silmek için izin yok. - No permission to delete library subdirectory "%1". - "%1" kütüphane altdizinini silmek için izin yok. + No permission to delete library subdirectory "%1". + "%1" kütüphane altdizinini silmek için izin yok. LoadDialog - + Load Verilog-A symbols Verilog-A sembollerini yükle - + Choose Verilog-A symbol files: Verilog-A sembol dosyalarını seçin: - + Select All Tümünü Seç - + Deselect All Tümünü Seçme - + Cancel İptal Et - + Ok Tamam - + Change Icon Simge Değiştir - + auto-load selected otomatik yükleme seçili - + Load the selected symbols when opening the project. Projeyi açarken seçilen sembolleri yükleyin. - + Info Bilgi - + Icon not found: %1.png Simge bulunamadı: 1.png - + Open File Dosya Aç - + Icon image (*.png) Simge görüntüsü (*.png) - + Error Hata - + File not found: %1 Dosya bulunamadı: %1 @@ -2517,77 +2538,77 @@ Düğüm adı değiştirilmeyecektir. MarkerDialog - + Edit Marker Properties İşaretleyici Özelliklerini Değiştir - + Precision: Hassaslık: - + real/imaginary gerçel/sanal - + magnitude/angle (degree) genlik/açı (derece) - + magnitude/angle (radian) genlik/açı (radyan) - + Number Notation: Sayı Gösterimi: - + X-axis position: X ekseni konumu: - + Off Kapalı - + Square Kare - + Triangle Üçgen - + Marker Indicator İşaretleyici Göstergesi - + Z0: Z0: - + transparent saydam - + OK Tamam - + Cancel İptal @@ -2595,7 +2616,7 @@ Düğüm adı değiştirilmeyecektir. MatchDialog - + Create Matching Circuit Karşılık Gelen Devreyi Oluştur @@ -2604,12 +2625,12 @@ Düğüm adı değiştirilmeyecektir. karşılıklı iki-uç hesabı yap - + Reference Impedance Referans Sanal Direnç - + Port 1 1. Uç @@ -2618,17 +2639,17 @@ Düğüm adı değiştirilmeyecektir. ohm - + Port 2 2. Uç - + S Parameter S Degişkeni - + Input format Giriş biçimi @@ -2637,189 +2658,189 @@ Düğüm adı değiştirilmeyecektir. gerçel/sanal - + Implementation Uygulama - + Microstrip Substrate Mikroşerit Substrat - + Relative Permitivity Göreceli İzin Verilebilirlik - + Substrate height Alt tabaka yüksekliği - + Metal thickness Metal kalınlığı - + Minimum width Minimum genişlik - + Maximum width Maksimum genişlik - + tanD tanD - + Resistivity Dirençlilik - + Method Yöntem - + L-section L bölümü - + Single stub Tek saplama - + Double stub Çift saplama - + Multistage Çok Kademeli - + Open stub Açık koçan - + Short circuit stub Kısa devre saplaması - + Number of sections Bölüm sayısı - + Weighting Ağırlıklandırma - + Binomial Binom - + Chebyshev Chebyshev - + Maximum ripple Maksimum dalgalanma - + Use balanced stubs Dengeli saplamalar kullanın - + Calculate two-port matching İki port eşleşmesini hesaplayın - + Add S-Parameter simulation S-Parametresi simülasyonu ekleyin - + Synthesize microstrip lines Mikroşerit hatları sentezleme - + Real/Imag Real/Imag - + mag/deg genlik/derece - - + + S11 S11 - - + + S21 S21 - + S12 S12 - + S22 S22 - + Frequency: Sıklık: - + Create Oluştur - + Cancel İptal - + Reflexion Coefficient Yansıma Katsayısı - + Impedance (Ohms) Empedans (Ohm) - + The device is not unconditionally stable: K = %1 @@ -2838,7 +2859,7 @@ Eşleşen bir ağ sentezlemek mümkün değildir. Koşulsuz kararlılığa ulaşmak için direnç kayıpları ve/veya geri besleme eklemeyi düşünün (K > 1 ve |%2| < 1) - + It is not possible to match this load using the double stub method Bu yükü çift saplama yöntemini kullanarak eşleştirmek mümkün değildir @@ -2847,14 +2868,14 @@ Koşulsuz kararlılığa ulaşmak için direnç kayıpları ve/veya geri besleme Sanal Direnç (ohm) - - - + + + Error Hata - + Real part of impedance must be greater zero, but is %1 ! Sanal direncin gerçel kısmı sıfırdan büyük @@ -2864,17 +2885,17 @@ olmalı fakat şu anda %1 ! MessageDock - + admsXml admsXml - + Compiler Derleyici - + admsXml Dock admsXml Dock @@ -2909,27 +2930,27 @@ olmalı fakat şu anda %1 ! NewProjDialog - + Create new project Yeni proje oluştur - + Project name: Proje Adı: - + open new project yeni proje aç - + Create Oluştur - + Cancel İptal @@ -2937,7 +2958,7 @@ olmalı fakat şu anda %1 ! Ngspice - + Problem with SaveNetlist SaveNetlist ile ilgili sorun @@ -2945,359 +2966,359 @@ olmalı fakat şu anda %1 ! OctaveWindow - - ERROR: Failed to execute "%1" - HATA: "%1" çalıştırılamadı + + ERROR: Failed to execute "%1" + HATA: "%1" çalıştırılamadı OptimizeDialog - + Edit Optimization Properties Iyilestirme Özelliklerini Düzenle - - - + + + Name: İsim: - + Simulation: Benzetim: - + General Genel - + Method: Yöntem: - + Maximum number of iterations: En yüksek deneme sayısı: - + Output refresh cycle: Çıktı tazeleme sıklığı: - + Number of parents: Ana sayısı: - + Constant F: Sabit F: - + Crossing over factor: Çaprazlama çarpanı: - + Pseudo random number seed: Rastlantısal sayı üreteci için kök değer: - + Minimum cost variance: En az eder değişimi: - + Cost objectives: Eder nesneleri: - + Cost constraints: Eder sınırlamaları: - + Algorithm Cebir - - + + Name İsim - - + + active etkin - + initial Baslangıç - + min En düsük - + max En yüksek - - + + Type Çeşit - + initial: Baslangıç: - + min: En düsük: - + max: En yüksek: - - - + + + linear double doğrusal çift duyarlıklı - - - + + + logarithmic double üstel çift duyarlıklı - - - + + + linear integer doğrusal tam sayı - - + + logarithmic integer üstel tam sayı - - - + + + E3 series E3 serisi - - - + + + E6 series E6 serisi - - - + + + E12 series E12 serisi - - - + + + E24 series E24 serisi - - - + + + E48 series E48 serisi - - - + + + E96 series E96 serisi - - - + + + E192 series E192 serisi - - + + Add Ekle - - + + Delete Sil - + Type: Çeşit: - + Copy current values to equation Mevcut değerleri denkleme kopyala - + Variables Degiskenler - + Value Değer - + Value: Değer: - - - + + + minimize en küçüğü bul - - - + + + maximize en büyüğü bul - - - + + + less az - - - + + + greater daha büyük - - - + + + equal eşit - - + + monitor izle - + Goals Amaçlar - + OK Tamam - + Apply Uygula - + Cancel İptal - - - - - + + + + + yes evet - - - + + + no hayır - - - - + + + + Error Hata - - + + Every text field must be non-empty! Tüm metin kutuları dolmalı! - - Variable "%1" aleardy in list! - "%1" değişkeni listede yok! + + Variable "%1" aleardy in list! + "%1" değişkeni listede yok! - - Goal "%1" already in list! - "%1" isimli amaç dizgede zaten var! + + Goal "%1" already in list! + "%1" isimli amaç dizgede zaten var! - + Set precision Hassasiyeti ayarlayın - + Precision: Hassaslık: @@ -3305,42 +3326,42 @@ olmalı fakat şu anda %1 ! OptionsDialog - + Options Seçenekler - + Units Birimler - + Frequency Sıklık - + Length Uzunluk - + Resistance Direnç - + Angle Açı - + Save as Default Varsayılan olarak kaydet - + Dismiss Gözardı et @@ -3404,8 +3425,8 @@ olmalı fakat şu anda %1 ! Hata - Cannot open "%1"! - "%1" açılamıyor! + Cannot open "%1"! + "%1" açılamıyor! Please insert a package name! @@ -3460,8 +3481,8 @@ olmalı fakat şu anda %1 ! HATA: Saglama toplamı uyusmazlıgı! - Leave directory "%1" - "%1" dizininden çık + Leave directory "%1" + "%1" dizininden çık ERROR: Package is corrupt! @@ -3472,102 +3493,102 @@ olmalı fakat şu anda %1 ! Bohça basarıyla açıldı! - ERROR: Project directory "%1" already exists! - HATA: "%1" Projesi zaten var! + ERROR: Project directory "%1" already exists! + HATA: "%1" Projesi zaten var! - ERROR: Cannot create directory "%1"! - HATA: "%1" dizini olusturulamıyor! + ERROR: Cannot create directory "%1"! + HATA: "%1" dizini olusturulamıyor! - Create and enter directory "%1" - "%1" dizinini olustur ve gir + Create and enter directory "%1" + "%1" dizinini olustur ve gir - ERROR: Cannot create file "%1"! - HATA: "%1" dosyası olusturulamıyor! + ERROR: Cannot create file "%1"! + HATA: "%1" dosyası olusturulamıyor! - Create file "%1" - "%1" kütügünü olustur + Create file "%1" + "%1" kütügünü olustur - ERROR: User library "%1" already exists! - Kullanıcı kütüphanesi "%1" zaten var! + ERROR: User library "%1" already exists! + Kullanıcı kütüphanesi "%1" zaten var! - ERROR: Cannot create library "%1"! - HATA: "%1" kütüphanesi olusturulamıyor! + ERROR: Cannot create library "%1"! + HATA: "%1" kütüphanesi olusturulamıyor! - Create library "%1" - "%1" kütüphanesini olustur + Create library "%1" + "%1" kütüphanesini olustur ProjectView - + Content of %1 1'in içeriği - + Note Not - + Datasets Veri toplulukları - + Data Displays Veri Göstergeleri - + Verilog Verilog - + Verilog-A Verilog-A - + VHDL VHDL - + Octave Octave - + Schematics Tasarılar - + Symbols Semboller - + SPICE SPICE - + Others Diğerleri - + -port -uç @@ -3575,1064 +3596,1070 @@ olmalı fakat şu anda %1 ! QObject - - + + ac simulation ac benzetimi - - + + AC sensitivity simulation AC duyarlılık simülasyonu - - + + Output variable Çıktı değişkeni - - - - - - - + + + + + + + sweep type süpürüm çeşidi - - - - - + + + + + start frequency in Hertz Hertz cinsinden başlangıç sıklığı - - - - - + + + + + stop frequency in Hertz Hertz cinsinden bitiş sıklığı - - - - - - + + + + + + number of simulation steps benzetim adım sayısı - + calculate noise voltages gürültü gerilimini hesapla - + ac voltage source with amplitude modulator genlik değişimli gerilim kaynağı - + AM GM (AM) - - - + + + peak voltage in Volts Volt cinsinden en yüksek gerilim değeri - - - - - - + + + + + + frequency in Hertz Hertz cinsinden sıklık - - - - + + + + initial phase in degrees derece cinsinden başlangıç açısı - + offset voltage (SPICE only) ofset gerilimi (yalnızca SPICE) - + + delay time (SPICE only) gecikme süresi (yalnızca SPICE) - + modulation level degisim (modülasyon) seviyesi - + AM modulated Source Genlik degisimli (modülasyonlu) Kaynak - + ideal ac current source ideal ac akım kaynağı - + peak current in Ampere Amper cinsinden en yüksek akım değeri - - + + offset current (SPICE only) + + + + + damping factor (transient simulation only) sönüm çarpanı (sadece kalımsız benzetim) - + ac Current Source ac Akım Kaynağı - + ideal dc current source fikirsel dc akım kaynağı - + current in Ampere Amper cinsinden akım - + dc Current Source dc Akım Kaynağı - + noise current source gürültü akım kaynağı - + current power spectral density in A^2/Hz akım gücü yelpaze yoğunluğu A^2/Hz - - - - - + + + + + frequency exponent sıklık üsteli - - - - - + + + + + frequency coefficient sıklık sabiti - - - - - + + + + + additive frequency term eklenecek sıklık terimi - + Noise Current Source Gürültü Akım Kaynağı - + ideal amplifier fikirsel yükselteç - - - + + + voltage gain gerilim kazancı - - + + reference impedance of input port giriş ucu referans empedansı - - + + reference impedance of output port çıkış ucu referans empedansı - + noise figure gürültü rakamı - + Amplifier Yükselteç - + 4x2 andor verilog device 4x2 andor verilog cihazı - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + transfer function high scaling factor transfer fonksiyonu yüksek ölçekleme faktörü - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + output delay çıkış gecikmesi - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + s s - + 4x2 AndOr 4x2 VeYa - + 4x3 andor verilog device 4x3 andor verilog cihazı - + 4x3 AndOr 4x3 VeYa - + 4x4 andor verilog device 4x4 andor verilog cihazı - + 4x4 AndOr 4x4 AndOr - + attenuator zayıflatıcı - + power attenuation güç zayıflaması - - - - - + + + + + reference impedance referans sanal direnci - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + simulation temperature in degree Celsius Santigrad cinsinden benzetim sıcaklığı - + Attenuator Zayıflatıcı - + bias t kutuplama t - - + + for transient simulation: inductance in Henry kalımsız benzetim için: Henri cinsinden sargı etkisi - - + + for transient simulation: capacitance in Farad kalımsız benzetim için: Farad cinsinden sığa - + Bias T Kutuplama T - + 4bit binary to Gray converter verilog device 4bit ikiliden griye dönüştürücü verilog cihazı - - - - - - + + + + + + transfer function scaling factor transfer fonksiyonu ölçekleme faktörü - + 4Bit Bin2Gray 4Bit Bin2Gray - + bipolar junction transistor çift kutuplu eklem transistör (bjt) - - + + npn transistor npn transistör - - + + pnp transistor pnp transistör - - - + + + polarity kutuplanma - - - - - + + + + + saturation current doyum akımı - - + + forward emission coefficient düz yayım katsayısı - - + + reverse emission coefficient ters yayım katsayısı - - + + high current corner for forward beta düz beta için yüksek akım köşesi - - + + high current corner for reverse beta ters beta için yüksek akım köşesi - - + + forward early voltage forward early voltage - - + + reverse early voltage reverse early voltage - + base-emitter leakage saturation current baz-emetör kaçak akım doyumu - + base-emitter leakage emission coefficient baz-emetör kaçak yayım sabiti - + base-collector leakage saturation current baz-kollektör kaçak akım doyumu - + base-collector leakage emission coefficient baz-emetör kaçak yayım sabiti - - + + forward beta düz/ileri beta - - + + reverse beta ters/geri beta - + minimum base resistance for high currents yüksek akımlar için en küçük baz direnci - + current for base resistance midpoint baz direnci orta-noktası için akım - + collector ohmic resistance Kollektör omik (Shotky etkisi yok) direnç - + emitter ohmic resistance emetör omik (Shotky etkisi yok) direnç - + zero-bias base resistance (may be high-current dependent) sıfır-kutuplama baz direnci (yüksek-akıma bağlı olabilir) - - + + base-emitter zero-bias depletion capacitance baz-emetör sıfır-kutuplama tüketim sığası - - + + base-emitter junction built-in potential baz-emetör eklem gerilimi - - + + base-emitter junction exponential factor baz-emetör eklemi üstel çarpanı - - + + base-collector zero-bias depletion capacitance baz-kollektör sıfır-kutuplama tüketim sığası - - + + base-collector junction built-in potential baz-kollektör eklem gerilimi - - + + base-collector junction exponential factor baz-kollektör eklemi üstel çarpanı - + fraction of Cjc that goes to internal base pin baz ucuna giden Cjc oranı - + zero-bias collector-substrate capacitance sıfır-kutuplama kollektör-alttabaka sığası - + substrate junction built-in potential alttabaka eklem gerilimi - + substrate junction exponential factor alttabaka eklem üstel çarpanı - - - - + + + + forward-bias depletion capacitance coefficient düz-kutuplanma tüketim bölgesi sığa sabiti - - + + ideal forward transit time fikirsel düz geçis zamanı - + coefficient of bias-dependence for Tf Tf için kutuplama-bağımlılığı sabiti - + voltage dependence of Tf on base-collector voltage Tf' nin baz-kollektör gerilimine olan gerilim bağımlılığı - + high-current effect on Tf Tf üzerindeki yüksek gerilim etkisi - - + + ideal reverse transit time fikirsel ters geçis zamanı - - - - - - - - + + + + + + + + flicker noise coefficient flicker gürültü sabiti - - - - - - - + + + + + + + flicker noise exponent flicker gürültü üsteli - - - - - + + + + + flicker noise frequency exponent flicker gürültü sıklık üsteli - + burst noise coefficient ani gürültü sabiti - + burst noise exponent ani gürültü üsteli - + burst noise corner frequency in Hertz Hertz cinsinden ani gürültü köşe sıklığı - + excess phase in degrees derece cinsinden aşkın açı - + temperature exponent for forward- and reverse beta düz ve ters beta için sıcaklık üsteli - - - - + + + + saturation current temperature exponent doyum akımı sıcaklık üsteli - - + + energy bandgap in eV eV cinsinden enerji aralığı - - - + + + temperature at which parameters were extracted değişkenlerin elde edildiği sıcaklık - + default area for bipolar transistor çift kutuplu eklem transistör (bjt) için varsayılan alan - + bipolar junction transistor with substrate alttabakalı çift kutuplu eklem transistör - + bond wire lehim teli - + length of the wire tel uzunluğu - + diameter of the wire tel çapı - + height above ground plane toprak tabakası üzerinde yükseklik - + specific resistance of the metal metal özdirenci - + relative permeability of the metal metalin göreceli geçirgenliği - + bond wire model lehim teli modeli - - - - - - - + + + + + + + substrate substrat (alt tabaka) - + Bond Wire Lehim Teli - - - - - - - - - - + + + + + + + + + + simulation temperature benzetim sıcaklığı - + capacitor kapasitör - + capacitance in Farad Farad cinsinden kapasitans - + initial voltage for transient simulation Kalımsız benzetim için ilk gerilim degeri - - - - - - + + + + + + schematic symbol şematik simgesi - + Capacitor Kapasitör - + current controlled current source akımla denetlenen akım kaynağı - - - + + + forward transfer factor düz geçirme çarpanı - - - - + + + + delay time (Qucsator only) gecikme süresi (sadece Qucsator) - - - - - - - - + + + + + + + + delay time gecikme zamanı - + Current Controlled Current Source Akım Denetimli Akım Kaynağı - + current controlled voltage source akım denetimli gerilim kaynağı - + Current Controlled Voltage Source Akım Denetimli Gerilim Kaynağı - + circulator devrettirici - + reference impedance of port 1 1. ucun sanal direnci - + reference impedance of port 2 2. ucun sanal direnci - + reference impedance of port 3 3. ucun sanal direnci - + Circulator Devrettirici - + coaxial transmission line koaksiyel iletim hattı - - + + relative permittivity of dielectric dielektriğin bağıl geçirgenliği - - - + + + specific resistance of conductor iletkenin özgül direnci - - - + + + relative permeability of conductor iletkenin bağıl geçirgenliği - + inner diameter of shield kalkanın iç çapı - + diameter of inner conductor içteki iletkenin çapı - - + + mechanical length of the line hattın mekanik uzunluğu - - - - + + + + loss tangent loss tangent - + Coaxial Line Eşeksenli Hat - + 1bit comparator verilog device 1bit karşılaştırıcı verilog cihazı - + 1Bit Comparator 1Bit Karşılaştırıcı - + 2bit comparator verilog device 2bit karşılaştırıcı verilog cihazı - + 2Bit Comparator 2Bit Karşılaştırıcı - + 4bit comparator verilog device 4bit karşılaştırıcı verilog cihazı - + 4Bit Comparator 4Bit Karşılaştırıcı - + number of input ports giriş uçlarının sayısı - - - - + + + + voltage of high level yüksek seviyenin gerilimi - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Error Hata - + Format Error: Wrong line start! Biçim Hatası: Yanlış satır başlangıcı! - + Format Error: Unknown component! %1 @@ -4649,212 +4676,212 @@ Bilinmeyen bileşenler değiştirilecek kukla alt devre yer tutucuları tarafından. - + Format Error: Wrong 'component' line format! Biçim Hatası: -Yanlış "bileşen-component" satır biçimi! +Yanlış "bileşen-component" satır biçimi! - + coplanar line eşyüzey hattı - - - - - - - - - - - + + + + + + + + + + + name of substrate definition alttabaka tanımının adı - - - - - - - - + + + + + + + + width of the line çizgi kalınlığı - - - - + + + + width of a gap aralığın genişliği - - - - + + + + length of the line çizgi uzunluğu - - - - + + + + material at the backside of the substrate alttabakanın arka yüzündeki malzeme - + use approximation instead of precise equation hassas eşitlik yerine yaklaşım kullan - + Coplanar Line Eşyüzey Çizgisi - + ideal coupler fikirsel çiftleyici (kuplör) - + coupling factor çiftlenim faktörü - + phase shift of coupling path in degree derece cinsinden, çiftlenim yolunun açı kayması - + Coupler Çiftleyici (Kuplör) - + coplanar gap eşyüzey aralık - + width of gap between the two lines iki çizgi arasındaki aralığın genişliği - + Coplanar Gap Eşyüzey Aralık - + coplanar open essyüzey açıklık - + width of gap at end of line çizginin sonundaki aralığın genişliği - + Coplanar Open Esyüzey Açık - + coplanar short eşyüzey kısa devre - + Coplanar Short Eşyüzey Kısa Devre - + coplanar step eşyüzey adım - - - + + + width of line 1 1. çizginin genişliği - - - + + + width of line 2 2. çizginin genişliği - + distance between ground planes toprak yüzeyleri arasındaki mesafe - + Coplanar Step Eşyüzey Adım - + coupled transmission lines kuplajlı iletim hatları - + characteristic impedance of even mode çift modun karakteristik empedansı - + characteristic impedance of odd mode tek modun karakteristik empedansı - - - - + + + + electrical length of the line hattın elektriksel uzunluğu - + relative dielectric constant of even mode çift modun bağıl dielektrik sabiti - + relative dielectric constant of odd mode tek modun bağıl dielektrik sabiti - + attenuation factor per length of even mode çift modun uzunluğu başına zayıflama faktörü - + attenuation factor per length of odd mode tek modun uzunluğu başına zayıflama faktörü - + Coupled Transmission Line Kuplajlı İletim Hattı @@ -4863,462 +4890,462 @@ Yanlış "bileşen-component" satır biçimi! Eşzamanlı Olmayan resetli D tipi tetik devresi - + D flip flop with asynchronous reset Asenkron sıfırlamalı D flip flop - + D-FlipFlop D-TetikDevresi - - + + dc simulation dc benzetim - - - - + + + + relative tolerance for convergence yakınsama için göreli hoşgörü - - - - + + + + absolute tolerance for currents akımlar için mutlak hoşgörü - - - - + + + + absolute tolerance for voltages gerilimler için mutlak hoşgörü - + put operating points into dataset çalışma noktaları bilgisini veri topluluguna koy - - - - + + + + maximum number of iterations until error hataya kadar en çok deneme sayısı - + save subcircuit nodes into dataset alt-devre düğümlerini veri topluluguna kaydet - + preferred convergence algorithm tercih edilen yakınsama cebri - - - + + + method for solving the circuit matrix devre tablosu çözüm yöntemi - + dc block dc kalıp - + dc Block dc Kalıp - + dc feed dc besleme - + dc Feed dc Besleme - + D flip flop with set and reset verilog device Set ve sıfırlamalı D flip flop verilog cihazı - - - - + + + + cross coupled gate transfer function high scaling factor çapraz bağlı kapı transfer fonksiyonu yüksek ölçekleme faktörü - - - - + + + + cross coupled gate transfer function low scaling factor çapraz bağlı kapı transfer fonksiyonu düşük ölçekleme faktörü - - - - + + + + cross coupled gate delay çapraz bağlı kapı gecikmesi - + D-FlipFlop w/ SR SR ile D-FlipFlop - + diac (bidirectional trigger diode) diyak (çift-yön tetiklemeli diyot) - - + + (bidirectional) breakover voltage (çift-yön) kɪrɪlma gerilimi - + (bidirectional) breakover current (çift-yön) kɪrɪlma akɪmɪ - - - + + + parasitic capacitance asalak sığa - - - - + + + + emission coefficient yayım katsayısı - - - + + + intrinsic junction resistance asıl eklem direnci - + Diac Diyak - - + + digital simulation dijital benzetim - + type of simulation benzetim çeşidi - + duration of TimeList simulation ZamanDizelgesi-TimeList benzetim süresi - + netlist format bağlantı dizgesi biçimi - - + + digital source dijital kaynak - - + + number of the port uç numarası - + initial output value ilk çıkış değeri - + list of times for changing output value Degisen çıkıs degeri için zaman dizelgesi - + diode diyot - - + + zero-bias junction capacitance sıfır-kutuplama eklem sığası - - - - + + + + grading coefficient değişim katsayısı - - - + + + junction potential eklem gerilimi - + linear capacitance doğrusal sığa - + recombination current parameter tekrar birleşim akımı değişkeni - + emission coefficient for Isr Isr için yayım katsayısı - + ohmic series resistance omik (Shotky etkisi yok) seri direnç - - + + transit time geçis süresi - + high-injection knee current (0=infinity) yüksek-enjeksiyon bükülme akımı (0=sonsuz) - - + + reverse breakdown voltage ters kırılma gerilimi - - + + current at reverse breakdown voltage ters kırılma geriliminde akım - + Bv linear temperature coefficient Bv doğrusal sıcaklık katsayısı - + Rs linear temperature coefficient Rs doğrusal sıcaklık katsayısı - + Tt linear temperature coefficient Tt doğrusal sıcaklık katsayısı - + Tt quadratic temperature coefficient Tt ikinci dereceden sıcaklık katsayısı - + M linear temperature coefficient M doğrusal sıcaklık katsayısı - + M quadratic temperature coefficient M ikinci dereceden sıcaklık katsayısı - - + + default area for diode diyot için varsayılan alan - + Diode Diyot - + data voltage level shifter (digital to analogue) verilog device veri voltaj seviye kaydırıcı (dijitalden analoğa) verilog cihazı - - + + voltage level voltaj seviyesi - - + + time delay zaman gecikmesi - + D2A Level Shifter D2A Seviye Değiştirici - + data voltage level shifter (analogue to digital) verilog device veri voltaj seviye kaydırıcı (analogdan dijitale) verilog cihazı - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + V V - + A2D Level Shifter A2D Seviye Değiştirici - + 2to4 demultiplexer verilog device 2to4 demultiplexer verilog cihazı - + 2to4 Demux 2to4 Demux - + 3to8 demultiplexer verilog device 3to8 demultiplexer verilog cihazı - + 3to8 Demux 3to8 Demux - + 4to16 demultiplexer verilog device 4to16 demultiplexer verilog cihazı - + 4to16 Demux 4to16 Demux - + externally controlled voltage source harici kontrollü gerilim kaynağı - - + + voltage in Volts Volt cinsinden gerilim - + Externally Controlled Voltage Source Harici Kontrollü Voltaj Kaynağı - + m m - - + + transconductance parameter ters iletkenlik (transconductance) değişkeni - + A/V**2 A/V**2 - - - - - + + + + + 1/V 1/V @@ -5327,1240 +5354,1241 @@ Yanlış "bileşen-component" satır biçimi! V/K - + HICUM Level 2 v2.22 verilog device HICUM Seviye 2 v2.22 verilog cihazı - + GICCR constant GICCR sabiti - + A^2s A^2s - + Zero-bias hole charge Sıfır önyargılı delik yükü - - + + Coul Coul - + High-current correction for 2D and 3D effects 2D ve 3D efektler için yüksek akım düzeltmesi - + Emitter minority charge weighting factor in HBTs HBT'lerde yayıcı azınlık yükü ağırlıklandırma faktörü - + Collector minority charge weighting factor in HBTs HBT'lerde kollektör azınlık yükü ağırlıklandırma faktörü - + B-E depletion charge weighting factor in HBTs HBT'lerde B-E tükenme yükü ağırlıklandırma faktörü - + B-C depletion charge weighting factor in HBTs HBT'lerde B-C tükenme yükü ağırlıklandırma faktörü - + Internal B-E saturation current Dahili B-E doyma akımı - + Internal B-E current ideality factor Dahili B-E akım idealite faktörü - + Internal B-E recombination saturation current Dahili B-E rekombinasyon doygunluk akımı - + Internal B-E recombination current ideality factor Dahili B-E rekombinasyon akımı idealite faktörü - + Peripheral B-E saturation current Çevresel B-E doyma akımı - + Peripheral B-E current ideality factor Periferik B-E akım idealite faktörü - + Peripheral B-E recombination saturation current Çevresel B-E rekombinasyon doygunluk akımı - + Peripheral B-E recombination current ideality factor Çevresel B-E rekombinasyon akımı idealite faktörü - + Non-ideality factor for III-V HBTs III-V HBT'ler için ideal olmayan faktör - + Base current recombination time constant at B-C barrier for high forward injection Yüksek ileri enjeksiyon için B-C bariyerinde baz akım rekombinasyon zaman sabiti - + Internal B-C saturation current Dahili B-C doyma akımı - + Internal B-C current ideality factor Dahili B-C akım idealite faktörü - + External B-C saturation current Harici B-C doyma akımı - + External B-C current ideality factor Harici B-C akım idealite faktörü - + B-E tunneling saturation current B-E tünelleme doygunluk akımı - + Exponent factor for tunneling current Tünelleme akımı için üs faktörü - + Specifies the base node connection for the tunneling current Tünelleme akımı için temel düğüm bağlantısını belirtir - + Avalanche current factor Çığ akım faktörü - + Exponent factor for avalanche current Çığ akımı için üs faktörü - + Relative TC for FAVL FAVL için Bağıl TC - - - - - - + + + + + + 1/K 1/K - + Relative TC for QAVL QAVL için Göreceli TC - + Zero bias internal base resistance Sıfır önyargı dahili baz direnci - + External base series resistance Harici baz seri direnci - + Factor for geometry dependence of emitter current crowding Yayıcı akım kalabalığının geometri bağımlılığı faktörü - + Correction factor for modulation by B-E and B-C space charge layer B-E ve B-C uzay yükü katmanı tarafından modülasyon için düzeltme faktörü - + Ratio of HF shunt to total internal capacitance (lateral NQS effect) HF şöntünün toplam dahili kapasitansa oranı (yanal NQS etkisi) - + Ration of internal to total minority charge İçsel azınlık payının toplam azınlık payına oranı - + Emitter series resistance Verici seri direnci - + External collector series resistance Harici kolektör seri direnci - + Substrate transistor transfer saturation current Substrat transistör transfer doygunluk akımı - + Forward ideality factor of substrate transfer current Substrat transfer akımının ileri idealite faktörü - + C-S diode saturation current C-S diyot doyma akımı - + Ideality factor of C-S diode current C-S diyot akımının idealite faktörü - + Transit time for forward operation of substrate transistor Alt tabaka transistörünün ileri çalışması için geçiş süresi - + Substrate series resistance Substrat seri direnci - + Substrate shunt capacitance Substrat şönt kapasitansı - + Internal B-E zero-bias depletion capacitance Dahili B-E sıfır-bias tükenme kapasitansı - + Internal B-E built-in potential Dahili B-E yerleşik potansiyel - + Internal B-E grading coefficient Dahili B-E derecelendirme katsayısı - + Ratio of maximum to zero-bias value of internal B-E capacitance Dahili B-E kapasitansının maksimum değerinin sıfır-bias değerine oranı - + Peripheral B-E zero-bias depletion capacitance Çevresel B-E sıfır önyargılı tükenme kapasitansı - + Peripheral B-E built-in potential Çevresel B-E yerleşik potansiyel - + Peripheral B-E grading coefficient Periferik B-E derecelendirme katsayısı - + Ratio of maximum to zero-bias value of peripheral B-E capacitance Çevresel B-E kapasitansının maksimum değerinin sıfır-bias değerine oranı - + Internal B-C zero-bias depletion capacitance Dahili B-C sıfır-bias tükenme kapasitansı - + Internal B-C built-in potential Dahili B-C yerleşik potansiyel - + Internal B-C grading coefficient Dahili B-C derecelendirme katsayısı - + Internal B-C punch-through voltage Dahili B-C delme gerilimi - + External B-C zero-bias depletion capacitance Harici B-C sıfır-bias tükenme kapasitansı - + External B-C built-in potential Harici B-C yerleşik potansiyel - + External B-C grading coefficient Dış B-C derecelendirme katsayısı - + External B-C punch-through voltage Harici B-C delme gerilimi - + Partitioning factor of parasitic B-C cap Parazitik B-C başlığının bölme faktörü - + Partitioning factor of parasitic B-E cap Parazitik B-E başlığının bölme faktörü - + C-S zero-bias depletion capacitance C-S sıfır-bias tükenme kapasitansı - + C-S built-in potential C-S yerleşik potansiyel - + C-S grading coefficient C-S derecelendirme katsayısı - + C-S punch-through voltage C-S delme gerilimi - + Low current forward transit time at VBC=0V VBC=0V'de düşük akım ileri geçiş süresi - + Time constant for base and B-C space charge layer width modulation Baz ve B-C uzay yük katmanı genişlik modülasyonu için zaman sabiti - + Time constant for modelling carrier jam at low VCE Düşük VCE'de taşıyıcı sıkışmasını modellemek için zaman sabiti - + Neutral emitter storage time Nötr yayıcı depolama süresi - + Exponent factor for current dependence of neutral emitter storage time Nötr yayıcı depolama süresinin akıma bağımlılığı için üs faktörü - + Saturation time constant at high current densities Yüksek akım yoğunluklarında doygunluk zaman sabiti - + Smoothing factor for current dependence of base and collector transit time Baz ve kolektör geçiş süresinin akıma bağımlılığı için yumuşatma faktörü - + Partitioning factor for base and collector portion Taban ve kolektör kısmı için bölme faktörü - + Internal collector resistance at low electric field Düşük elektrik alanında dahili kolektör direnci - + Voltage separating ohmic and saturation velocity regime Omik ve doygunluk hızı rejimini ayıran voltaj - + Internal C-E saturation voltage Dahili C-E doyma gerilimi - + Collector punch-through voltage Kollektör delme gerilimi - + Storage time for inverse operation Ters işlem için depolama süresi - + Total parasitic B-E capacitance Toplam parazitik B-E kapasitansı - + Total parasitic B-C capacitance Toplam parazitik B-C kapasitansı - + Factor for additional delay time of minority charge Azınlık ücretinin ek gecikme süresi için faktör - + Factor for additional delay time of transfer current Aktarım akımının ek gecikme süresi için faktör - + Flag for turning on and off of vertical NQS effect Dikey NQS etkisinin açılması ve kapatılması için bayrak - + Flicker noise coefficient Titreşim gürültü katsayısı - + Flicker noise exponent factor Titreşim gürültüsü üs faktörü - + Flag for determining where to tag the flicker noise source Titreşim gürültüsü kaynağının nerede etiketleneceğini belirleyen bayrak - + Scaling factor for collector minority charge in direction of emitter width Yayıcı genişliği yönünde kolektör azınlık yükü için ölçeklendirme faktörü - + Scaling factor for collector minority charge in direction of emitter length Yayıcı uzunluğu yönünde kolektör azınlık yükü için ölçekleme faktörü - + Bandgap voltage extrapolated to 0 K Bant aralığı voltajı 0 K'ye ekstrapole edilmiştir - + First order relative TC of parameter T0 T0 parametresinin birinci dereceden göreli TC'si - + Second order relative TC of parameter T0 T0 parametresinin ikinci dereceden göreli TC'si - + Temperature exponent for RCI0 RCI0 için sıcaklık üssü - + Relative TC of saturation drift velocity Doygunluk sürüklenme hızının bağıl TC'si - + Relative TC of VCES VCES'in Göreceli TC'si - + Temperature exponent of internal base resistance Dahili baz direncinin sıcaklık üssü - + Temperature exponent of external base resistance Harici baz direncinin sıcaklık üssü - + Temperature exponent of external collector resistance Harici kolektör direncinin sıcaklık üssü - + Temperature exponent of emitter resistance Verici direncinin sıcaklık üssü - + Temperature exponent of mobility in substrate transistor transit time Alt tabaka transistör geçiş süresindeki hareketliliğin sıcaklık üssü - + Effective emitter bandgap voltage Etkin yayıcı bant aralığı gerilimi - + Effective collector bandgap voltage Etkin kolektör bant aralığı gerilimi - + Effective substrate bandgap voltage Etkin alt tabaka bant aralığı gerilimi - + Coefficient K1 in T-dependent band-gap equation T'ye bağlı bant aralığı denkleminde K1 katsayısı - + Coefficient K2 in T-dependent band-gap equation T'ye bağlı bant aralığı denkleminde K2 katsayısı - + Exponent coefficient in transfer current temperature dependence Transfer akımı sıcaklık bağımlılığında üs katsayısı - + Exponent coefficient in B-E junction current temperature dependence B-E bağlantı akımı sıcaklık bağımlılığında üs katsayısı - + Relative TC of forward current gain for V2.1 model V2.1 modeli için ileri akım kazancının bağıl TC'si - + Flag for turning on and off self-heating effect Kendinden ısıtma etkisini açmak ve kapatmak için bayrak - + Thermal resistance Termal direnç - + K/W K/W - + Thermal capacitance Termal kapasitans - + J/W J/W - + Flag for compatibility with v2.1 model (0=v2.1) v2.1 modeli ile uyumluluk için bayrak (0=v2.1) - + Temperature at which parameters are specified Parametrelerin belirtildiği sıcaklık - + C C - + Temperature change w.r.t. chip temperature for particular transistor Belirli bir transistör için çip sıcaklığına göre sıcaklık değişimi - + K K - + HICUM L2 v2.22 HICUM L2 v2.22 - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + Ohm Ohm - + F/m F/m - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + A A - - - - - - - - - - - - - - + + + + + + + + + + + + + + F F - + diode relative area diyot bağıl alanı - - - - - - + + + + + + parameter measurement temperature değişken ölçüm sıcaklığı - - - - - - + + + + + + Celsius Celsius - + equation defined device eşitlikle tanımlanmış cihaz - + type of equations eşitliklerin çeşidi - + number of branches kol sayısı - - + + current equation akım eşitliği - - + + charge equation yük eşitliği - + Equation Defined Device Eşitlikle Tanımlanmış Cihaz - + equation eşitlik - - + + Equation Eşitlik - + + put result into dataset sonucu veri topluluğuna koy - + Qucsator equation Qucsator denklemi - + externally driven transient simulation harici tahrikli geçici simülasyon - - + + integration method sürekli toplam yöntemi - - + + order of integration method sürekli toplam yönteminin mertebesi - - + + initial step size in seconds saniye cinsinden ilk adım - - + + minimum step size in seconds saniye cinsinden en küçük adım - - + + relative tolerance of local truncation error yerel kesme hatasının göreli hoşgörüsü - - + + absolute tolerance of local truncation error yerel kesme hatasının mutlak hoşgörüsü - - + + overestimation of local truncation error yerel kesme hatasının abartısı - - + + relax time step raster gevşeme zamanı adım uzunluğu - - + + perform an initial DC analysis Baslangıç için bir DC çözümlemesi gerçeklestir - - + + maximum step size in seconds saniye cinsinden en büyük adım büyüklüğü - + External transient simulation Harici geçici simülasyon - + 1bit full adder verilog device 1bit tam toplayıcı verilog cihazı - + 1Bit FullAdder 1Bit FullAdder - + 2bit full adder verilog device 2bit tam toplayıcı verilog cihazı - + 2Bit FullAdder 2Bit FullAdder - + gated D latch verilog device kapılı D mandalı verilog cihazı - + Gated D-Latch Gated D-Latch - + 4bit Gray to binary converter verilog device 4bit Griden ikiliye dönüştürücü verilog cihazı - + 4Bit Gray2Bin 4Bit Gray2Bin - + ground (reference potential) toprak (referans gerilimi) - + Ground Toprak - + gyrator (impedance inverter) jiratör (sanal direnç değilleyici) - + gyrator ratio jiratör oranı - + Gyrator Jiratör - + 1bit half adder verilog device 1bit yarım toplayıcı verilog cihazı - + 1Bit HalfAdder 1Bit HalfAdder - + Harmonic balance simulation Katsıklık (Harmonik) denge benzetimi - + number of harmonics Katsıklık (harmonik) sayısı - + Harmonic balance Harmonic (harmonik) denge - + 4bit highest priority encoder (binary form) verilog device 4bit en yüksek öncelikli kodlayıcı (ikili form) verilog cihazı - + 4Bit HPRI-Bin 4Bit HPRI-Bin - + hybrid (unsymmetrical 3dB coupler) hibrit (simetrik olmayan 3dB bağlayıcı) - - + + phase shift in degree derece cinsinden açı kayması - + Hybrid Hibrit - + exponential current source üstel akım kaynağı - + current before rising edge yükselen kenardan önceki akım - + maximum current of the pulse atma' nın en yüksek akım değeri - - + + start time of the exponentially rising edge üstel olarak yükselen kenarın başlangıç zamanı - - + + start of exponential decay üstel düşüşün başlangıcı - + time constant of the rising edge yükselen kenarın zaman sabiti - + time constant of the falling edge düşen kenarın zaman sabiti - + Exponential Current Pulse Üstel Akım Darbesi - + file based current source dosya tabanlı akım kaynağı - - + + name of the sample file örnek dosyanın ismi - - - + + + interpolation type interpolasyon çeşidi - - + + repeat waveform dalga şeklini tekrarla - + current gain akım kazancı - + File Based Current Source Dosya Tabanlı Akım Kaynağı - + inductor indüktör - + inductance in Henry Henry cinsinden endüktans - + initial current for transient simulation Geçici hal benzetim için başlangıç akım degeri - + Inductor İnduktör - + current probe akım algılama ucu - + Current Probe Akım Algılama Ucu - + ideal current pulse source ideal akım darbe kaynağı - + current before and after the pulse darbeden önce ve sonraki akım - + current of the pulse darbe akımı - - + + start time of the pulse darbenin başlangıç zamanı - - + + ending time of the pulse darbenin bitiş zamanı - - - - + + + + rise time of the leading edge yükselen kenarın yükselme zamanı - - - - + + + + fall time of the trailing edge düşen kenarın düşme süresi - + Current Pulse Akım Darbesi - + ideal rectangle current source ideak diktörgen akım kaynağı - + current at high pulse yüksek darbenin akımı - - + + duration of high pulses yüksek darbelerin süresi - - + + duration of low pulses düşük darbelerin süresi - - + + initial delay time başlangıç gecikme zamanı - + Rectangle Current Diktörgen Akım - + isolator yalıtkan - + Isolator Yalıtkan - + junction field-effect transistor jonksiyon alan etkili transistör - - + + threshold voltage eşik gerilimi - + channel-length modulation parameter kanal uzunluğu modülasyon parametresi - + parasitic drain resistance parazitik drain direnci - + parasitic source resistance parazitik drain direnci - + gate-junction saturation current kapı-eklem doyum akımı - + gate-junction emission coefficient kapı-eklem yayım kaysayısı - + gate-junction recombination current parameter kapı-eklem tekrar birleşim akım değişkeni - + Isr emission coefficient Isr yayım katsayısı - + zero-bias gate-source junction capacitance sıfır-kutuplama kapı-kaynak eklem sığası - + zero-bias gate-drain junction capacitance sıfır-kutuplama kapı-oluk eklem sığası - + gate-junction potential kapı-eklem gerilimi - + forward-bias junction capacitance coefficient ileri-kutuplama eklem sığa katsayısı - + gate P-N grading coefficient kapı P-N değişim katsayısı - + Vt0 temperature coefficient Vt0 sıcaklık katsayısı - + Beta exponential temperature coefficient Beta üstel sıcaklık katsayısı - + default area for JFET JFET için varsayılan alan - + n-JFET n-JFET - + p-JFET p-JFET @@ -6569,3147 +6597,3150 @@ Yanlış "bileşen-component" satır biçimi! Eşzamanlı Olmayan set ve resetli JK tipi tetik devresi - + JK flip flop with asynchronous set and reset Asenkron set ve reset özellikli JK flip flop - + JK-FlipFlop JK-TetikDevresi - + jk flip flop with set and reset verilog device set ve reset i̇le jk flip flop verilog ci̇hazi - + JK-FlipFlop w/ SR JK-FlipFlop w/ SR - + Component taken from Qucs library Qucs kütüphanesinden alınan bileşen - + name of qucs library file Qucs kütüphane dosyasının adı - + name of component in library kütüphanedeki bileşenin adı - + Logarithmic Amplifier verilog device Üstel yükseltici verilog devre elemanı - + scale factor boyutlama çarpanı - + scale factor error boyutlama çarpan hatası - - - - - + + + + + % % - + input I1 bias current I1 giriş kutuplama akımı - + input reference bias current giriş göreceli dayanak (referans) kutuplama akımı - + number of decades onluk sayısı - - + + conformity error uygunluk hatası - + output offset error çıkış fark (offset) hatası - + amplifier input resistance yükseltici giriş direnci - + amplifier 3dB frequency yükseltici 3dB sıklığı - + Hz Hz - + amplifier output resistance yükseltici çıkış direnci - + conformity error temperature coefficient uygunluk hatası sıcaklık katsayısı - - - - - + + + + + %/Celsius %/Celsius - + offset temperature coefficient fark (offset) sıcaklık sabiti - + V/Celsius V/Celsius - + scale factor error temperature coefficient boyutlandırma çarpan hatası sıcaklık sabiti - + input I1 bias current temperature coefficient giriş I1 akımı sıcaklık sabiti - - + + A/Celsius A/Celsius - + input reference bias current temperature coefficient giriş göreceli-dayanak kutuplama-akımı sıcaklık sabiti - + Logarithmic Amplifier Üstel Yükselteç - - + + I I - + R R - + logic 0 verilog device mantık 0 verilog cihazı - + logic 0 voltage level mantık 0 gerilim seviyesi - + Logic 0 Mantık 0 - + logic 1 verilog device mantık 1 verilog cihazı - + logic 1 voltage level lojik 1 gerilim seviyesi - + Logic 1 Mantık 1 - + logical AND mantıksal VE - + n-port AND n-girişli VE - + logical buffer mantıksal tampon - + Buffer Tampon - + logical inverter mantıksal değilleyici - + Inverter Değilleyici - + logical NAND mantıksal VE-DEĞİL - + n-port NAND n-girişli VE-DEĞİL - + logical NOR mantıksal VEYA-DEĞİL - + n-port NOR n-girişli VEYA-DEĞİL - + logical OR mantıksal VEYA - + n-port OR n-girişli VEYA - + logical XNOR mantıksal X-VEYA-DEĞİL (XNOR) - + n-port XNOR n-girişli X-VEYA-DEĞİL - + logical XOR mantıksal X-VEYA (XOR) - + n-port XOR n-girişli X-VEYA - + MESFET verilog device MESFET verilog cihazı - + model selector model seçi̇ci̇ - + pinch-off voltage pinch-off voltajı - + A/(V*V) A/(V*V) - + saturation voltage parameter doyma gerilimi parametresi - + channel length modulation parameter kanal uzunluğu modülasyon parametresi - + doping profile parameter doping profil parametresi - + power law exponent parameter güç yasası üs parametresi - + power feedback parameter güç geri besleme parametresi - + 1/W 1/W - + maximum junction voltage limit before capacitance limiting Kapasitans sınırlamasından önce maksimum bağlantı gerilimi sınırı - + capacitance saturation transition voltage kapasitans doygunluk geçiş gerilimi - + capacitance threshold transition voltage kapasitans eşik geçiş gerilimi - + dc drain pull coefficient dc drenaj çekme katsayısı - + subthreshold conductance parameter eşik altı iletkenlik parametresi - + diode saturation current diyot doyma akımı - + diode emission coefficient diyot emisyon katsayısı - + built-in gate potential yerleşik kapı potansiyeli - + gate-drain junction reverse bias breakdown voltage geçit-boşaltma kavşağı ters öngerilim kırılma gerilimi - + diode saturation current temperature coefficient diyot doyma akımı sıcaklık katsayısı - + transit time under gate kapı altından geçiş süresi - + channel resistance kanal direnci - + area factor alan faktörü - + gate reverse breakdown current kapı ters kırılma akımı - - + + energy gap enerji boşluğu - - + + eV eV - + zero bias gate-drain junction capacitance sıfır öngerilim geçit-boşaltma bağlantı kapasitansı - + zero bias gate-source junction capacitance sıfır öngerilim geçit-kaynak bağlantı kapasitansı - + zero bias drain-source junction capacitance sıfır öngerilim drenaj-kaynak bağlantı kapasitansı - + Beta temperature coefficient Beta sıcaklık katsayısı - + Alpha temperature coefficient Alfa sıcaklık katsayısı - + Gamma temperature coefficient Gama sıcaklık katsayısı - + Subthreshold slope gate parameter Eşik altı eğim kapısı parametresi - + subthreshold drain pull parameter eşik altı boşaltma çekme parametresi - + gate-source current equation selector kapı-kaynak akım denklemi seçici - + gate-drain current equation selector kapı-boşaltma akım denklemi seçici - + gate-source charge equation selector kapı-kaynak yük denklemi seçici - + gate-drain charge equation selector kapı-boşaltma yük denklemi seçicisi - + drain-source charge equation selector drenaj-kaynak şarj denklemi seçici - + Vto temperature coefficient Vto sıcaklık katsayısı - - - + + + gate resistance kapı direnci - - - - - + + + + + Ohms Ohm - + drain resistance drenaj direnci - + source resistance kaynak direnci - + gate resistance temperature coefficient kapı direnci sıcaklık katsayısı - - - + + + 1/Celsius 1/Celsius - + drain resistance temperature coefficient drenaj direnci sıcaklık katsayısı - + source resistance temperature coefficient kaynak direnci sıcaklık katsayısı - + forward bias slope resistance ileri öngerilim eğim direnci - + breakdown slope resistance arıza eğim direnci - + shot noise coefficient atış gürültü katsayısı - + MESFET MESFET - + Modular Operational Amplifier verilog device Parçalı işlemsel yükselteç verilog cihazı - + Gain bandwidth product (Hz) Kazanç band genişliği çarpımı (Hz) - + Open-loop differential gain at DC (dB) DC' de açık-döngü diferansiyel kazanç (dB) - + Second pole frequency (Hz) İkinci kutup sıklığı (Hz) - + Output resistance (Ohm) Çıkış direnci (Ohm) - + Differential input capacitance (F) Diferansiyel giriş sığası (F) - + Differential input resistance (Ohm) Diferansiyel giriş direnci (Ohm) - + Input offset current (A) Giriş fark (offset) akımı (A) - + Input bias current (A) Giriş kutuplama akımı (A) - + Input offset voltage (V) Giriş fark (offset) gerilimi (V) - + Common-mode rejection ratio at DC (dB) DC' de CM (ortalama değer) red oranı (dB) - + Common-mode zero corner frequency (Hz) CM (ortalama değer) sıfır köşe sıklığı (Hz) - + Positive slew rate (V/s) Pozitif tırmanma hızı (slew-rate) (V/s) - + Negative slew rate (V/s) Negatif tırmanma hızı (slew-rate) (V/s) - + Positive output voltage limit (V) Pozitif çıkış gerilimi sınırı (V) - + Negative output voltage limit (V) Negatif çıkış gerilimi sınırı (V) - + Maximum DC output current (A) En yüksek DC çıkış akımı (A) - + Current limit scale factor Akım sınırı boyutlama çarpanı - + Modular OpAmp Parçalı OpAmp - + MOS field-effect transistor MOS alan etkili transistör - - + + n-MOSFET n-MOSFET - - + + p-MOSFET p-MOSFET - - + + depletion MOSFET bosaltım MOSFET - + zero-bias threshold voltage sıfır-kutuplama eşik gerilimi - + transconductance coefficient in A/V^2 A/V^2 cinsinden tersiletkenlik katsayısı - + bulk threshold in sqrt(V) sqrt(V) cinsinden alttabaka eşiği - + surface potential yüzey gerilimi - + channel-length modulation parameter in 1/V 1/V cinsinden olukl-uzunluğu degisim (modülasyon) değişkeni - + drain ohmic resistance oluk omik (Shotky etkisi yok) direnci - + source ohmic resistance kaynak omik (Shotky etkisi yok) direnç - + gate ohmic resistance kapı omik (Shotky etkisi yok) direnç - + bulk junction saturation current alttabaka eklem doyum akımı - + bulk junction emission coefficient alttabaka eklem yayım katsayısı - + channel width oluk genişliği - + channel length oluk uzunluğu - + lateral diffusion length yanal yayılma uzunluğu - + oxide thickness oksit (pas) kalınlığı - + gate-source overlap capacitance per meter of channel width in F/m metre cinsinden oluk genişliği başına kapı-kaynak kesişim sığası [F/m] - + gate-drain overlap capacitance per meter of channel width in F/m metre cinsinden oluk genişliği başına kapı-oluk kesişim sığası [F/m] - + gate-bulk overlap capacitance per meter of channel length in F/m metre cinsinden oluk uzunluğu başına kapı-alttabaka kesişim sığası [F/m] - + zero-bias bulk-drain junction capacitance sıfır-kutuplama alttabaka-oluk eklem sığası - + zero-bias bulk-source junction capacitance sıfır-kutuplama alttabaka-kaynak eklem sığası - + bulk junction potential alttabaka eklem gerilimi - + bulk junction bottom grading coefficient alttabaka eklem taban dereceleme katsayısı - + bulk junction forward-bias depletion capacitance coefficient alttabaka eklem düz kutuplama bosaltım bölgesi sığa katsayısı - + zero-bias bulk junction periphery capacitance per meter of junction perimeter in F/m F/m cinsinden sıfır-kutuplama alttabaka eklem çevresel sığası - + bulk junction periphery grading coefficient alttabaka eklem çevresi dereceleme katsayısı - + bulk transit time alttabaka geçis zamanı - + substrate bulk doping density in 1/cm^3 1/cm^3 cinsinden alttabaka katkılama yoğunluğu - + surface state density in 1/cm^2 1/cm^2 cinsinden yüzey durum yoğunluğu - + gate material type: 0 = alumina; -1 = same as bulk; 1 = opposite to bulk kapı malzeme çeşidi: 0 = alüminyum; -1 = alttabakayla aynı; 1 = alttabakanın tersi - + surface mobility in cm^2/Vs cm^2/Vs cinsinden yüzey hareketliligi - + drain and source diffusion sheet resistance in Ohms/square birim kare başına Ohm cinsinden oluk ve kaynak yayılım tabaka direnci - + number of equivalent drain squares number of equivalent drain squares - + number of equivalent source squares number of equivalent source squares - + zero-bias bulk junction bottom capacitance per square meter of junction area in F/m^2 F/m^2 cinsinden, sıfır-kutuplama alttabaka eklem taban sığası - + bulk junction saturation current per square meter of junction area in A/m^2 A/m^2 cinsinden, metre kare eklem alanı basına, alt tabaka eklem doyum akımı - + drain diffusion area in m^2 m^2 cinsinden oluk yayılım alanı - + source diffusion area in m^2 m^2 cinsinden kaynak yayılım alanı - + drain junction perimeter oluk eklemi çevresi - + source junction perimeter kaynak eklemi çevresi - - - - + + + + Use global SPICE temperature Global SPICE sıcaklığı kullanın - + MOS field-effect transistor with substrate Alt tabakalı MOS alan etkili transistör - + microstrip corner mikrostrip köşe - - + + width of line hattın kalınlığı - + Microstrip Corner Mikrostrip Köşe - + coupled microstrip line çiftlenmiş mikrostrip hat - - + + spacing between the lines hatlar arasındaki aralık - - + + microstrip model mikrostrip modeli - - - - - - - - + + + + + + + + microstrip dispersion model mikrostrip dagılım (dispersiyon) modeli - + Coupled Microstrip Line Çiftlenmiş Mikrostrip Hat - + microstrip cross mikrostrip çapraz - - + + width of line 3 3. hattın genişliği - + width of line 4 4. hattın genişliği - - - - - - + + + + + + quasi-static microstrip model yarı-durgun mikrostrip model - - + + show port numbers in symbol or not simgede uç numaralarını göster ya da gösterme - + Microstrip Cross Mikrostrip Çapraz - + microstrip gap mikrostrip aralık - + width of the line 1 1. hattın genişliği - + width of the line 2 2. hattın genişliği - + spacing between the microstrip ends microstrip uçları arasındaki aralık - + Microstrip Gap Microstrip Aralık - + microstrip lange coupler mikroşerit lange kuplör - + Microstrip Lange Coupler Mikroşerit Lange Kuplör - + microstrip line mikrostrip hat - + Microstrip Line Mikrostrip Hat - + microstrip mitered bend mikrostrip destekli kırım - + Microstrip Mitered Bend Mikrostrip Destekli Kıvrım - + microstrip open mikrostrip açık - + microstrip open end model mikrostrip açık uç modeli - + Microstrip Open Mikrostrip Açık - + microstrip radial stub mikroşerit radyal saplama - + inner radius iç yarıçap - + outer radius dış yarıçap - + feeding line width besleme hattı genişliği - + stub angle saplama açısı - + Effective dimension Etkili boyut - + Model Model - - - + + + degrees derece - + Microstrip Radial Stub Mikroşerit Radyal Saplama - + microstrip impedance step miktrostrip sanal direnç adımı - + width 1 of the line hattın 1. kalınlığı - + width 2 of the line hattın 2. kalınlığı - + Microstrip Step Mikrostrip Adım - + microstrip tee mikrostrip baslangıcı - + temperature in degree Celsius Derece cinsinden sıcaklık - + Microstrip Tee Mikrostrip baslangıcı - + microstrip via mikrostrip via - + diameter of round via conductor yuvarlak via iletkeninin çapı - + Microstrip Via Mikrostrip Via - + two mutual inductors karşılıklı iki sargı - - + + inductance of coil 1 sargı 1' in dogusturu etkisi (endüktans) - - + + inductance of coil 2 sargı 2' nin dogusturu etkisi (endüktansı) - - + + coupling factor between coil 1 and 2 sargı 1 ve 2 arasındaki çiftlenim çarpanı - + Mutual Inductors Karşılıklı Sargılar - + three mutual inductors karşılıklı üç sargı - + inductance of coil 3 sargı 3' ün dogusturu etkisi (endüktansı) - + coupling factor between coil 1 and 3 sargı 1 ve 3 arasındaki çiftlenim çarpanı - + coupling factor between coil 2 and 3 sargı 2 ve 3 arasındaki çiftlenim çarpanı - + 3 Mutual Inductors 3 Karşılıklı Sargılar - + several mutual inductors birkaç karşılıklı indüktör - + number of mutual inductances karşılıklı endüktans sayısı - - - + + + inductance of coil bobin endüktansı - - + + coupling factor between coil %1 and coil %2 bobin %1 ve bobin %2 arasındaki kuplaj faktörü - + N Mutual Inductors N Karşılıklı İndüktörler - + 2to1 multiplexer verilog device 2to1 çoklayıcı verilog cihazı - + 2to1 Mux 2to1 Mux - + 4to1 multiplexer verilog device 4to1 çoklayıcı verilog cihazı - + 4to1 Mux 4to1 Mux - + 8to1 multiplexer verilog device 8to1 çoklayıcı verilog cihazı - + 8to1 Mux 8to1 Mux - + NIGBT verilog device NIGBT verilog cihazı - + gate-drain overlap area gate-drain örtüşme alanı - - + + m**2 m**2 - + area of the device cihazın alanı - + MOS transconductance MOS transkondüktansı - + ambipolar recombination lifetime ambipolar rekombinasyon ömrü - + metallurgical base width metalurji̇k taban geni̇şli̇ği̇ - + avalanche uniformity factor çığ tekdüzelik faktörü - + avalanche multiplication exponent çığ çarpma üssü - + gate-source capacitance per unit area birim alan başına gate-source kapasitansı - - + + F/cm**2 F/cm**2 - + gate-drain oxide capacitance per unit area birim alan başına gate-drain oksit kapasitansı - + emitter saturation current density yayıcı doygunluk akım yoğunluğu - + A/cm**2 A/cm**2 - + triode region factor triyot bölge faktörü - + electron mobility elektron hareketliliği - - + + cm**2/Vs cm**2/Vs - + hole mobility delik hareketliliği - + base doping baz katkısı - + 1/cm**3 1/cm**3 - + transverse field factor enine alan faktörü - + gate-drain overlap depletion threshold gate-drain örtüşmesi tükenme eşiği - + NIGBT NIGBT - - - + + + correlated current sources Bağlantılı/ilişkili akım kaynakları - - + + current power spectral density of source 1 1. kaynağın akım gücü yelpaze yoğunluğu - + current power spectral density of source 2 2. kaynağın akım gücü yelpaze yoğunluğu - - - + + + normalized correlation coefficient düzgeleme (normalize) ilişki sabiti - - - + + + Correlated Noise Sources Bağlantılı/ilişkili Gürültü Kaynakları - - + + voltage power spectral density of source 2 kaynak 2 deki gerilim gücü yelpaze yoğunluğu - + voltage power spectral density of source 1 kaynak 1 deki gerilim gücü yelpaze yoğunluğu - + operational amplifier işlemsel yükselteç (opamp) - + absolute value of maximum and minimum output voltage en büyük ve en küçük çıkış gerilimi mutlak değerleri - + OpAmp OpAmp - + Optimization iyilestirme - + optimization iyilestirme - + 2bit pattern generator verilog device 2bit desen üreteci verilog cihazı - - - + + + pad output value ped çıkış değeri - + 2Bit Pattern 2Bit Desen - + 3bit pattern generator verilog device 3bit desen üreteci verilog cihazı - + 3Bit Pattern 3Bit Desen - + 4bit pattern generator verilog device 4bit desen üreteci verilog cihazı - + 4Bit Pattern 4Bit Desen - - + + Parameter sweep Değişken Süpürüm - + simulation to perform parameter sweep on üzerinde değişken süpürümünün uygulanacağı benzetim - - + + parameter to sweep süpürülecek değişken - - + + start value for sweep süpürüm için başlangıç değeri - - + + stop value for sweep süpürüm için başlangıç değeri - + Simulation step Simülasyon adımı - + phase shifter açı kaydırıcı - + Phase Shifter Açı Kaydırıcı - + Photodiode verilog device Fotodiyot verilog cihazı - + photodiode emission coefficient fotodiyot emisyon katsayısı - + series lead resistance seri kurşun direnci - + diode dark current diyot karanlık akımı - + responsivity duyarlılık - - + + A/W A/W - + shunt resistance şönt direnci - + quantum efficiency kuantum verimliliği - + light wavelength ışık dalga boyu - + nm nm - + responsivity calculator selector duyarlılık hesaplayıcı seçici - + Photodiode Fotodiyot - + Phototransistor verilog device Fototransistör verilog cihazı - + dark current karanlık akım - + collector series resistance kolektör seri direnci - + emitter series resistance yayıcı seri direnci - + base series resistance baz seri direnci - + responsivity at relative selectivity=100% bağıl seçicilik=%100'de yanıt verebilirlik - - - - - + + + + + relative selectivity polynomial coefficient bağıl seçicilik polinom katsayısı - + Phototransistor Fototransistör - + ac voltage source with phase modulator Açı değiştiricili değişken gerilim kaynağı - + PM AM - + SPICE V(SFFM): SPICE V(SFFM): - + offset volage ofset hacmi - + carrier amplitude taşıyıcı genliği - - + + carrier signal frequency taşıyıcı sinyal frekansı - - - + + + modulation index değişim (modülasyon) indisi - - + + modulating signal frequency modüle edici sinyal frekansı - + V(SFFM) V(SFFM) - + PM modulated Source Açı degisimli Kaynak - + Potentiometer verilog device Potansiyometre verilog devre elemanı - + nominal device resistance varsayılan devre elemanı direnci - + shaft/wiper arm rotation gövde/silecek kol dönmesi - + resistive law taper coefficient resistive law taper coefficient - + device type selector devre elemanı çeşidi seçici - + maximum shaft/wiper rotation en yüksek gövde/silecek dönmesi - + linearity error doğrusallık hatası - + wiper arm contact resistance silici kol bağlantı direnci - + resistance temperature coefficient direnç sıcaklık katsayısı - + PPM/Celsius PPM/Celsius - + Potentiometer Potansiyometre - + B B - + SPICE T: SPICE T: - + Characteristic impedance Karakteristik empedans - + Transmission delay İletim gecikmesi - + Frequency Frekans - + Normalised length at given frequency Verilen frekansta normalleştirilmiş uzunluk - + Initial voltage at end 1 Son 1'deki ilk voltaj - + Initial current at end 1 Son 1'deki ilk akım - + Initial voltage at end 2 Uç 2'deki ilk voltaj - + Initial current at end 2 Son 2'deki ilk akım - - + + T T - - + + Rectangular Waveguide Dikdörtgen Dalga Kılavuzu - + widest side en geniş taraf - + shortest side en kısa kenar - + material parameter for temperature model sıcaklık modeli için malzeme parametresi - + relay gecikme - + threshold voltage in Volts Volt cinsinden eşik gerilimi - + hysteresis voltage in Volts Volt cinsinden gecikme gerilimi - - resistance of "on" state in Ohms - "açık" durumunun Ohm cinsinden direnci + + resistance of "on" state in Ohms + "açık" durumunun Ohm cinsinden direnci - - resistance of "off" state in Ohms - "kapalı" durumunun Ohm cinsinden direnci + + resistance of "off" state in Ohms + "kapalı" durumunun Ohm cinsinden direnci - + Relay Gecikme - + resistor direnç - + ohmic resistance in Ohms Ohm cinsinden omik direnç - + first order temperature coefficient birinci derece sıcaklık katsayısı - + second order temperature coefficient ikinci derece sıcaklık katsayısı - + temperature at which parameters were extracted (Qucsator only) parametrelerin çıkarıldığı sıcaklık (yalnızca Qucsator) - + Resistor Direnç (EU) - + Resistor US Direnç (TR) - + equation defined RF device eşitlikle tanımlanmış RF devre elemanı - - + + type of parameters değişkenlerin çeşidi - - + + number of ports giriş/çıkış uç sayısı - - - + + + representation during DC analysis DC hesabı süresince gösterim - - - - - - - - - - - + + + + + + + + + + + parameter equation değişken eşitliği - + Equation Defined RF Device Eşitlikle Tanımlanmış RF Devre Elemanı - + RF RF - + equation defined 2-port RF device eşitlikle tanımlanmış 2-uçlu RF devre elemanı - + Equation Defined 2-port RF Device Eşitlikle Tanımlanmış 2-Uçlu RF Devre Elemanı - + RLCG transmission line RLCG iletim hattı - + RLCG RLCG - + resistive load dirençli yük - + Ohm/m Ohm/m - + inductive load endüktif yük - + H/m H/m - + capacitive load kapasitif yük - + conductive load iletken yük - + S/m S/m - + RLCG Transmission Line RLCG İletim Hattı - + RS flip flop RS tetik devresi - + RS-FlipFlop RS-TetikDevresi - + ac power source ac güç kaynağı - + port impedance port/ayak/uç sanal direnci - + + (available) ac power in dBm + + + (available) ac power in Watts - (Olanaklı) AC güç, W + (Olanaklı) AC güç, W - + enable transient model as sine source [true,false] sinüs kaynağı olarak geçici modeli etkinleştir [true,false] - + Power Source Güç Kaynağı - + S parameter simulation S değişken benzetimi - + calculate noise parameters gürültü değişkenlerini hesapla - + input port for noise figure gürültü biçimleme için giriş ucu - + output port for noise figure gürültü biçimleme için çıkış ucu - + put characteristic values into dataset karakteristik değerleri veri topluluguna koy - + save subcircuit characteristic values into dataset alt devre karakteristik değerlerini veri topluluguna kaydet - + S-parameter simulation S-değişken benzetimi - + S parameter file S değişken dosyası - + name of the s parameter file s değişken dosyasının ismi - + data type veri çeşidi - + n-port S parameter file n-uçlu S değişken dosyası - + 1-port S parameter file 1-port S değişken dosyası - + 2-port S parameter file 2 girişli S değişken dosyası - + file dosya - + SPICE netlist file SPICE bağlantı dizelgesi dosyası - + SPICE netlist SPICE bağlantı dizelgesi - + sim bnz - + spice spice - - - ERROR: No file name in SPICE component "%1". - HATA: SPICE bileşeni "%1" de dosya ismi yok. + + + ERROR: No file name in SPICE component "%1". + HATA: SPICE bileşeni "%1" de dosya ismi yok. - - ERROR: Cannot open SPICE file "%1". - HATA: SPICE dosyası "%1" açılamıyor. + + ERROR: Cannot open SPICE file "%1". + HATA: SPICE dosyası "%1" açılamıyor. - - ERROR: Cannot save converted SPICE file "%1". - HATA: "%1" çevrilmiş SPICE dosyası kaydedilemiyor. + + ERROR: Cannot save converted SPICE file "%1". + HATA: "%1" çevrilmiş SPICE dosyası kaydedilemiyor. - - ERROR: Cannot open converted SPICE file "%1". - HATA: Çevrilmiş SPICE dosyası "%1" açılamıyor. + + ERROR: Cannot open converted SPICE file "%1". + HATA: Çevrilmiş SPICE dosyası "%1" açılamıyor. - - + + Info Bilgi - - Preprocessing SPICE file "%1". - "%1" SPICE dosyası işleniyor. + + Preprocessing SPICE file "%1". + "%1" SPICE dosyası işleniyor. - - ERROR: Cannot save preprocessed SPICE file "%1". - HATA: "%1" önişlenmiş SPICE dosyası kaydedilemiyor. + + ERROR: Cannot save preprocessed SPICE file "%1". + HATA: "%1" önişlenmiş SPICE dosyası kaydedilemiyor. - - ERROR: Cannot execute "%1". - HATA: "%1" çalıştırılamıyor. + + ERROR: Cannot execute "%1". + HATA: "%1" çalıştırılamıyor. - + COMP ERROR: Cannot start QucsConv! COMP HATASI: QucsConv başlatılamıyor! - - Converting SPICE file "%1". - "%1" SPICE dosyası çevriliyor. + + Converting SPICE file "%1". + "%1" SPICE dosyası çevriliyor. - + subcircuit alt-devre - + name of qucs schematic file qucs şematik dosyasının adı - + Subcircuit Altdevre - + port of a subcircuit bir alt-devre ucu (port/ayak) - + number of the port within the subcircuit alt-devredeki ucun (ayak/port) numarası - + type of the port (for digital simulation only) uç çeşidi (sadece dijital/kesikli benzetim için) - Conjugated port for XSPICE differential ports - XSPICE diferansiyel portları için konjuge port + XSPICE diferansiyel portları için konjuge port - + Subcircuit Port Alt-devre Ucu - + substrate definition substrat (alt tabaka) tanımlaması - + relative permittivity göreli geçirgenlik - + thickness in meters metre cinsinden kalınlık - + thickness of metalization metalleme kalınlığı - + specific resistance of metal metalin özdirenci - + rms substrate roughness rms alttabaka kabalığı/pürüzlülügü - - - + + + Substrate Substrat (alt tabaka) - + switch (time controlled) anahtar (zaman denetimli) - + initial state ilk durum - + time when state changes (semicolon separated list possible, even numbered lists are repeated) durumun değiştiği zaman (noktalı virgülle ayrılmış liste mümkün, çift numaralı listeler tekrarlanır) - - resistance of "on" state in ohms - "açık" durumunun ohm cinsinden direnci + + resistance of "on" state in ohms + "açık" durumunun ohm cinsinden direnci - - resistance of "off" state in ohms - "kapalı" durumunun ohm cinsinden direnci + + resistance of "off" state in ohms + "kapalı" durumunun ohm cinsinden direnci - - - - + + + + simulation temperature in degree Celsius (Qucsator only) Santigrat derece cinsinden simülasyon sıcaklığı (yalnızca Qucsator) - + Max possible switch transition time (transition time 1/100 smallest value in 'time', or this number) Mümkün olan maksimum anahtar geçiş süresi (geçiş süresi 1/100 'zaman'daki en küçük değer veya bu sayı) - + Resistance transition shape (Qucsator only) Direnç geçiş şekli (sadece Qucsator) - + Switch Anahtar - + ideal symmetrical transformer fikirsel benzeşimli dönüştürücü (transformatör) - + voltage transformation ratio of coil 1 1. sargının gerilim dönüşüm oranı - + voltage transformation ratio of coil 2 2. sargının gerilim dönüşüm oranı - + symmetric Transformer benzeşimli dönüştürücü (transformatör) - + T flip flop with set and reset verilog device Set ve sıfırlamalı T flip flop verilog cihazı - + T-FlipFlop w/ SR SR ile T-FlipFlop - + silicon controlled rectifier (SCR) silikon denetimli doğrultucu (SCR) - + breakover voltage kırılma gerilimi - + gate trigger current kapı tetikleme akımı - + Thyristor Tristör - + ideal transmission line fikirsel iletim hattı - - + + characteristic impedance kendine has (karakteristik) özdirenç - - - + + + attenuation factor per length in 1/m 1/m cinsinden uzunluk başına zayıflama katsayısı - + Transmission Line İletim Hattı - + ideal 4-terminal transmission line mükemmel 4-uçlu iletim hattı - + 4-Terminal Transmission Line 4-Uçlu İletim Hattı - + transient simulation kalımsız benzetim - + Transient .SENS analysis with Xyce Xyce ile geçici .SENS analizi - + Analysis mode Analiz modu - - + + start time in seconds saniye cinsinden başlangıç zamanı - - + + stop time in seconds saniye cinsinden durma zamanı - + simulation time step simülasyon zaman adımı - + Transient sensitivity analysis Geçici duyarlılık analizi - + number of simulation time steps benzetim zaman adımlarının sayısı - - perform initial DC (set "no" to activate UIC) - ilk DC'yi gerçekleştirin (UIC'yi etkinleştirmek için "hayır" olarak ayarlayın) + + perform initial DC (set "no" to activate UIC) + ilk DC'yi gerçekleştirin (UIC'yi etkinleştirmek için "hayır" olarak ayarlayın) - + Transient simulation Kalımsız benzetim - + ideal transformer fikirsel dönüştürücü (transformatör) - + voltage transformation ratio gerilim dönüşüm oranı - + Transformer Dönüştürücü (transformatör) - + triac (bidirectional thyristor) triyak (çift yönlü tristör) - + (bidirectional) gate trigger current (çift-yön) kapı tetikleme akɪmɪ - + Triac Triyak - + resonance tunnel diode rezonans tünel diyot - + peak current tepe akım - + valley current vadi̇ akimi - + valley voltage vadi̇ geri̇li̇mi̇ - + resonance energy in Ws Ws cinsinden rezonans enerjisi - + Fermi energy in Ws Ws cinsinden Fermi enerjisi - + resonance width in Ws Ws cinsinden rezonans genişliği - + maximum of transmission maksimum iletim - + fitting factor for electron density elektron yoğunluğu için uydurma faktörü - + fitting factor for voltage drop gerilim düşümü için uydurma faktörü - + fitting factor for diode current diyot akımı için uydurma faktörü - + zero-bias depletion capacitance sıfır-bias tükenme kapasitansı - + life-time of electrons elektronların yaşam süresi - + Tunnel Diode Tünel Diyot - + twisted pair transmission line burgulu çift iletim hattı - + diameter of conductor iletkenin çapı - + diameter of wire (conductor and insulator) tel çapı (iletken ve yalıtkan) - + physical length of the line hattın fiziksel uzunluğu - + twists per length in 1/m uzunluk başına burgu, 1/m - + dielectric constant of insulator yalıtkanın dielektrik katsayısı - + Twisted-Pair Burgulu-Çift - - + + Symbol file not found: %1 Sembol dosyası bulunamadı: %1 - + voltage controlled current source gerilim denetimli akım kaynağı - + forward transconductance ileri tersiletkenlik - + Voltage Controlled Current Source Gerilim Denetimli Akım Kaynağı - + voltage controlled voltage source gerilim denetimli gerilim kaynağı - + voltage controlled resistor voltaj kontrollü direnç - + resistance gain direnç kazancı - + Voltage Controlled Resistor Gerilim Kontrollü Direnç - + Voltage Controlled Voltage Source Gerilim Denetimli Gerilim Kaynağı - - + + Verilog file Verilog dosyası - + Name of Verilog file Verilog Dosyasının ismi - + verilog verilog - - - - ERROR: No file name in %1 component "%2". - HATA: %1 bileşeni "%2" de dosya ismi yok. + + + + ERROR: No file name in %1 component "%2". + HATA: %1 bileşeni "%2" de dosya ismi yok. - - - ERROR: Cannot open %1 file "%2". - HATA: %1 dosyası "%2" açılamıyor. + + + ERROR: Cannot open %1 file "%2". + HATA: %1 dosyası "%2" açılamıyor. - + exponential voltage source üstel gerilim kaynağı - + voltage before rising edge yükselen kenardan önceki gerilim - + maximum voltage of the pulse darbenin maksimum voltajı - + rise time of the rising edge yükselen kenarın yükselme zamanı - + fall time of the falling edge düşen kenarın düşme süresi - + Exponential Voltage Pulse Üstel Gerilim Darbesi - + file based voltage source Dosya tabanlı gerilim kaynağı - + File Based Voltage Source Dosya Tabanlı Gerilim Kaynağı - - + + VHDL file VHDL dosyası - + Name of VHDL file VHDL dosyasının ismi - + vhdl vhdl - - + + generic variable jenerik değişken - + ideal ac voltage source fikirsel ac gerilim kaynağı - + AC voltage source (SPICE) AC gerilim kaynağı (SPICE) - - + + ac Voltage Source ac Gerilim Kaynağı - + ideal dc voltage source fikirsel dc gerilim kaynağı - + dc Voltage Source dc Gerilim Kaynağı - + noise voltage source gürültü gerilim kaynağı - + voltage power spectral density in V^2/Hz V^2/Hz cinsinden gerilim gücü tayf yoğunluğu - + Noise Voltage Source Gürültü Gerilim Kaynağı - + voltage probe gerilim algılayıcı uç - + Voltage Probe Gerilim Algılayıcı Uç - + ideal voltage pulse source ideal voltaj darbe kaynağı - + voltage before and after the pulse darbeden önceki ve sonraki voltaj - + voltage of the pulse darbenin gerilimi - + Voltage Pulse Gerilim Darbesi - + ideal rectangle voltage source ideal dikdörtgen gerilim kaynağı - + voltage of high signal yüksek sinyal gerilimi - + voltage of low signal (SPICE only) düşük sinyal gerilimi (yalnızca SPICE) - + Rectangle Voltage Dikdörtgen Dalga Gerilim - + Locus Curve Yer Eğrisi - + <invalid> <geçersiz> - - + + invalid geçersiz - + Polar Kutupsal - + Polar-Smith Combi Kutupsal-Smith Bilesimi - + Smith-Polar Combi Smith-Kutupsal Bilesimi - + 3D-Cartesian 3B-Kartezyen - + Cartesian Kartezyen - + Smith Chart Smith Çartı - + Admittance Smith Smith Geçirgenlik - - - + + + no variables değişken yok - - - - + + + + wrong dependency hatalı bağımlılık - - - - + + + + no data veri yok - + Tabular Tablo - + Timing Diagram Zamanlama Diyagramı - + Truth Table Doğruluk Tablosu - - ERROR: Cannot open file "%1". + + ERROR: Cannot open file "%1". - HATA: "%1" dosyası açılamıyor. + HATA: "%1" dosyası açılamıyor. - + ERROR: Cannot create user library subdirectory ! HATA: Kullanıcı kütüphanesi alt-dizini oluşturulamıyor ! - - ERROR: Cannot create file "%1". + + ERROR: Cannot create file "%1". - HATA: "%1" Dosya oluşturulamıyor. + HATA: "%1" Dosya oluşturulamıyor. - + Overwrite Üzerine yaz - - File "%1" already exists. + + File "%1" already exists. Overwrite ? - "%1" dosyası zaten var. + "%1" dosyası zaten var. Üzerine yazılsın mı ? - - - + + + Export to image Görüntüye aktar - + Inkscape start error! Inkscape başlatma hatası! - + Successfully exported Başarıyla dışa aktarıldı - - + + Disk write error! Disk yazma hatası! - + Unsupported format of graphics file. Use PNG, JPEG or SVG graphics! Desteklenmeyen grafik dosyası biçimi. PNG, JPEG veya SVG grafiklerini kullanın! - - - Error: Wrong time format in "%1". Use positive number with units - Hata: "%1" de zaman biçimi yanlış. Birimi olan artı değerlikli sayı kulanın + + + Error: Wrong time format in "%1". Use positive number with units + Hata: "%1" de zaman biçimi yanlış. Birimi olan artı değerlikli sayı kulanın - - - - + + + + verilog-a user devices verilog-a kullanıcı cihazları - - + + lumped components topaklanmış bileşenler - + sources kaynaklar - + probes problar - + RF components RF bileşenleri - + transmission lines i̇leti̇m hatlari - - - + + + nonlinear components doğrusal olmayan bileşenler - - + + microelectronics mi̇kroelektroni̇k - - + + verilog-a devices verilog-a cihazları - + digital components di̇ji̇tal bi̇leşenleri̇ - - + + file components dosya bileşenleri - + simulations simülasyonlar - + equations denklemler - + SPICE components SPICE bileşenleri - + SPICE netlist sections SPICE netlist bölümleri - + SPICE simulations SPICE simülasyonları - + XSPICE devices XSPICE cihazları - - - + + + Qucs legacy devices Qucs eski cihazlar - - - - - + + + + + diagrams diyagramlar - - - + + + paintings tablolar - + external sim components harici sim bileşenleri - + Edit Properties Özellikleri Düzenle - + Export as image Görüntü olarak dışa aktar - + power matching güç uyumu - + noise matching gürültü uyumu - + 2-port matching 2-uç uyumu - + The ground potential cannot be labeled! Toprak gerilimi yaftalanamaz! - + Arrow Ok - + Ellipse Elips - + filled Ellipse içi dolu elips - + Edit Ellipse Properties Elips Özelliklerini Değiştir - + Elliptic Arc Elips şeklinde yay - + Edit Arc Properties Yay Özelliklerini Değiştir - + Line Hat - + Edit Line Properties Hat Özelliklerini Değiştir - + Text Metin - + Rectangle Dik Dörtgen - + filled Rectangle içi dolu dik dörtgen - + Edit Rectangle Properties Dik dörtgen özelliklerini değiştir - + Print Document Belge Yazdır - + Cannot create output file! Çıktı dosyası oluşturulamıyor! @@ -9718,261 +9749,261 @@ PNG, JPEG veya SVG grafiklerini kullanın! isimsiz - - + + Format Error: 'Painting' field is not closed! Biçim Hatası: 'Boyama-Painting' alanı kapalı değil! - + Wrong document version: Belge sürümü yanlış: - - + + Clipboard Format Error: Unknown field! Not tahtası biçim hatası: Bilinmeyen alan! - - Cannot save C++ file "%1"! - C++ dosyası "%1" kaydedilemiyor! + + Cannot save C++ file "%1"! + C++ dosyası "%1" kaydedilemiyor! - - Cannot open Verilog-A file "%1"! - Verilog-A dosyası "%1" açılamıyor! + + Cannot open Verilog-A file "%1"! + Verilog-A dosyası "%1" açılamıyor! - - - Cannot save JSON props file "%1"! - JSON prop dosyası "%1" kaydedilemiyor! + + + Cannot save JSON props file "%1"! + JSON prop dosyası "%1" kaydedilemiyor! - + No valid osdi file. Re-compile verilog-a file first! Geçerli osdi dosyası yok. Önce verilog-a dosyasını yeniden derleyin! - - Cannot save JSON symbol file "%1"! - JSON sembol dosyası "%1" kaydedilemiyor! + + Cannot save JSON symbol file "%1"! + JSON sembol dosyası "%1" kaydedilemiyor! - + Cannot save document! Belge kaydedilemiyor! - - + + Format Error: Wrong property field limiter! Biçim Hatası: yanlış özellik alan sınırı! - + Format Error: Unknown property: Biçim Hatası: Bilinmeyen özellik: - + Format Error: Number expected in property field! Biçim Hatası: Sayı yazılması beklendi! - + Format Error: 'Property' field is not closed! Biçim Hatası: 'Özellik-Property' alanı kapatılmadı! - + Format Error: 'Component' field is not closed! Biçim Hatası: 'Bileşen-Component' alanı kapatılmadı! - + Format Error: Wrong 'wire' line format! Biçim Hatası: Yanlış 'bağlantı - wire' satırı! - + Format Error: 'Wire' field is not closed! Biçim Hatası: 'Bağlantı-Wire' alanı kapalı değil! - + Format Error: Unknown diagram! Biçim Hatası: Bilinmeyen diyagram! - + Format Error: Wrong 'diagram' line format! Biçim Hatası: Yanlış 'çizge - diagram' satırı hatası! - + Format Error: 'Diagram' field is not closed! Biçim Hatası: 'Diyagram-diagram' alanı kapatılmadı! - + Format Error: Wrong 'painting' line delimiter! Biçim Hatası: Yanlış 'boyama - painting' satır ayıracı! - + Format Error: Unknown painting! Biçim Hatası: Bilinmeyen boyama! - + Format Error: Wrong 'painting' line format! Biçim Hatası: Yanlış 'boyama - painting' satır biçimi! - - + + Cannot load document: Belge yüklenemiyor: - + Wrong document type: Yanlış belge çeşidi: - - - - - - + + + + + + Warning Uyarı - + Wrong document version Yanlış belge sürümü - + Try to open it anyway? Yine de açmayı denedin mi? - + File Format Error: Unknown field! Dosya Biçim Hatası: Bilinmeyen alan! - - ERROR: Component "%1" has no analog model. - HATA: Bileşen "%1" in analog bir modeli yok. + + ERROR: Component "%1" has no analog model. + HATA: Bileşen "%1" in analog bir modeli yok. - - ERROR: Component "%1" has no digital model. - HATA: Bileşen "%1" için dijital model yok. + + ERROR: Component "%1" has no digital model. + HATA: Bileşen "%1" için dijital model yok. - - ERROR: Cannot load subcircuit "%1". - HATA: "%1" alt-devresi yüklenemiyor. + + ERROR: Cannot load subcircuit "%1". + HATA: "%1" alt-devresi yüklenemiyor. - - WARNING: Skipping library component "%1". - UYARI: "%1" kütüphane bileşeni atlanıyor. + + WARNING: Skipping library component "%1". + UYARI: "%1" kütüphane bileşeni atlanıyor. - - ERROR: "%1": Cannot load library component "%2" from "%3" - HATA: "%1": "%2" kütüphane bileşeni "%3 "ten yüklenemiyor + + ERROR: "%1": Cannot load library component "%2" from "%3" + HATA: "%1": "%2" kütüphane bileşeni "%3 "ten yüklenemiyor - - WARNING: Ignore simulation component in subcircuit "%1". - UYARI: "%1" alt-devresindeki benzetim bileşenini gözardı et. + + WARNING: Ignore simulation component in subcircuit "%1". + UYARI: "%1" alt-devresindeki benzetim bileşenini gözardı et. - - WARNING: Equations in "%1" are 'time' typed. - UYARI: "%1" içindeki denklemler 'zaman' ile yazılmıştır. + + WARNING: Equations in "%1" are 'time' typed. + UYARI: "%1" içindeki denklemler 'zaman' ile yazılmıştır. - + ERROR: Only one digital simulation allowed. HATA: Sadece bir tek dijital benzetim yapılabilir. - + ERROR: Analog and digital simulations cannot be mixed. HATA: Analog ve dijital benzetimler aynı anda kullanılamaz. - + ERROR: Digital simulation needs at least one digital source. HATA: Dijital benzetim için en az bir dijital kaynak gerekli. - + Part list Parça listesi - + Filter order = %1 Filtre sırası = %1 - + Zeros list Pk=Re+j*Im Sıfır listesi Pk=Re+j*Im - + LPF prototype poles list Pk=Re+j*Im LPF prototip kutup listesi Pk=Re+j*Im - + Poles list Pk=Re+j*Im Kutup listesi Pk=Re+j*Im @@ -10039,7 +10070,7 @@ Kullanım: qucsedit [-r] dosya - + High-impedance is %1 ohms, low-impedance is %2 ohms. To get acceptable results it is recommended to use a substrate with lower permittivity and larger height. @@ -10054,1106 +10085,1106 @@ daha düşük geçirgenliğe ve daha büyük yüksekliğe sahip bir alt tabaka. Ayarlar kaydedilemiyor ! - + Quarter wave filters do not allow low-pass nor high-pass masks Çeyrek dalga filtreleri alçak geçiren veya yüksek geçiren maskelere izin vermez - + Cannot save GUI settings in GUI ayarları şuraya kaydedilemiyor - - + + XYCE script XYCE komut dosyası - - + + XSPICE generic device XSPICE jenerik cihaz - + PortsList PortsList - + .MODEL definition reference .MODEL tanım referansı - + XSPICE XSPICE - + XSPICE CodeModel: cfunc.mod and ifspec.ifs files pair XSPICE CodeModel: cfunc.mod ve ifspec.ifs dosya çifti - - - + + + XSPICE CodeModel XSPICE KodModeli - + XSPICE precompiled CodeModel library XSPICE önceden derlenmiş CodeModel kütüphanesi - - + + Precompiled CM-library Önceden derlenmiş CM-kütüphanesi - + XSPICE precompiled CM-library XSPICE önceden derlenmiş CM-kütüphanesi - + SPICE V(TRRANDOM): BAHARAT V(TRRANDOM): - + Distribution selector (1 to 4) Dağıtım seçici (1 ila 4) - + Duration of each random voltage value Her rastgele voltaj değerinin süresi - + Time delay before random voltages output ( for time < Td Vout = 0 V) Rastgele gerilim çıkışından önceki zaman gecikmesi (zaman < Td Vout = 0 V için) - + Changes with different values of Type. Tip'in farklı değerleriyle değişir. - + Changes with different values of Type Tip'in farklı değerleri ile değişir - + V(TRRANDOM) V(TRRANDOM) - + SPICE V(TRNOISE): BAHARAT V(TRNOISE): - - + + Rms noise amplitude Gaussian) Rms gürültü genliği Gauss) - - + + Time step Zaman adımı - - + + 1/f exponent (0 < alpha < 2) 1/f üssü (0 < alfa < 2) - - - - + + + + Amplitude (1/f) Genlik (1/f) - - + + Trap capture time Tuzak yakalama süresi - - + + Trap emission time Tuzak emisyon süresi - + V(TRNOISE) V(TRNOISE) - + SPICE V(PWL): -Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE V(PWL): -Çok satırlı ngspice veya Xyce V spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce V spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + V(PWL) V(PWL) - + SPICE V(AM): ngspice only. SPICE V(AM): sadece ngspice. - - + + voltage amplitude gerilim genliği - - + + offset voltage ofset gerilimi - - + + modulation frequency modülasyon frekansı - - + + carrier frequency taşıyıcı frekansı - - + + signal delay sinyal gecikmesi - + V(AM) V(AM) - + SPICE B (V type): -Multiple line ngspice or Xyce B specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce B specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE B (V tipi): -Çok satırlı ngspice veya Xyce B spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce B spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + B source (V) B kaynağı (V) - + SPICE library device. You can attach symbol patterns to it. SPICE kütüphane cihazı. Sembol kalıplarını ona ekleyebilirsiniz. - + SpiceLibrary file SpiceLibrary dosyası - + Subcircuit entry (.SUBCKT) name Alt devre girişi (.SUBCKT) adı - + Extra parameters list Ekstra parametreler listesi - + Pins assignment Pim atama - + SPICE library device SPICE kütüphane cihazı - - + + SPICE generic device SPICE jenerik cihazı - + Number of pins Pin sayısı - + SPICE device letter SPICE cihaz mektubu - + .MODEL definition reference (optional) .MODEL tanım referansı (isteğe bağlı) - + Parameter string (optional) Parametre dizesi (isteğe bağlı) - + SPICE SPICE - + .spiceinit file .spiceinit dosyası - - + + .spiceinit .spiceinit - + .spiceinit contents .spiceinit içeriği - - + + Spectrum analysis Spektrum analizi - + DC .SENS simulation with Xyce Xyce ile DC .SENS simülasyonu - - + + Output expressions Çıktı ifadeleri - - + + Reference parameter for .SENS analysis SENS analizi için referans parametre - + Parameter for DC sweep DC tarama için parametre - + start value for DC sweep DC taraması için başlangıç değeri - + stop value for DC sweep DC tarama için durdurma değeri - + Simulation step for DC sweep DC taraması için simülasyon adımı - - - + + + DC sensitivity simulation DC duyarlılık simülasyonu - - + + Pole-Zero simulation Kutup-Sıfır simülasyonu - + Two input nodes list (space separated) İki giriş düğümü listesi (boşluk bırakılarak ayrılmış) - + Two output nodes list (space separated) İki çıktı düğümü listesi (boşluk bırakılarak ayrılmış) - + Transfer function type (current/voltage) Transfer fonksiyonu tipi (akım/voltaj) - + Analysis mode (Pole-Zero, Poles only, Zeros only) Analiz modu (Kutup-Sıfır, Yalnızca kutuplar, Yalnızca sıfırlar) - + .PARAM section .PARAM bölümü - - + + .PARAM .PARAM - + .PARAM Section .PARAM Bölüm - + .OPTIONS section .OPTIONS bölümü - - + + .OPTIONS .SEÇENEKLER - + Xyce option package name Xyce seçenek paket adı - + .OPTIONS Section .OPTIONS Bölümü - + Nutmeg equation Küçük hindistan cevizi denklemi - - + + Nutmeg Küçük Hindistan Cevizi - + Nutmeg Equation Küçük Hindistan Cevizi Denklemi - - + + Noise simulation Gürültü simülasyonu - + Node at which the total output is desired Toplam çıktının istendiği düğüm - + Independent source to which input noise is referred. Giriş gürültüsünün referans alındığı bağımsız kaynak. - + .NODESET section .NODESET bölümü - - + + .NODESET .NODESET - + .NODESET Section .NODESET Bölümü - + .MODEL section -Multiple line ngspice or Xyce .MODEL allowed using "+" continuation lines. +Multiple line ngspice or Xyce .MODEL allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. .MODEL bölümü -Çoklu satır ngspice veya Xyce .MODEL "+" devam satırları kullanılarak izin verilir. +Çoklu satır ngspice veya Xyce .MODEL "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - - + + .MODEL .MODEL - + .MODEL Section .MODEL Bölümü - + .LIB directive .LIB yönergesi - - + + .LIB .LIB - + .Lib directive .Lib yönergesi - + .INCLUDE statement .INCLUDE deyimi - - + + .INCLUDE .INCLUDE - + .INCLUDE statement .INCLUDE deyimi - + .IC section .IC bölümü - - + + .IC .IC - + .IC Section .IC Bölümü - + .GLOBAL_PARAM section .GLOBAL_PARAM bölümü - + .GLOBAL_PARAM .GLOBAL_PARAM - + .GLOBAL PARAM .GLOBAL PARAM - + .GLOBAL_PARAM Section .GLOBAL_PARAM Bölüm - + .FUNC new function definition .FUNC yeni fonksiyon tanımı - - + + .FUNC .FUNC - + .FUNC new function .FUNC yeni fonksiyon - - + + Fourier simulation Fourier simülasyonu - - + + Distortion simulation Distorsiyon simülasyonu - + Second frequency parameter İkinci frekans parametresi - - + + Nutmeg script Küçük hindistan cevizi yazısı - + SPICE I(SFFM): SPICE I (SFFM): - + offset current ofset akımı - + carrier current amplitude taşıyıcı akım genliği - + I(SFFM) I(SFFM) - + Include script before simulation Simülasyondan önce komut dosyası ekleyin - - + + .INCLUDE SCRIPT .INCLUDE KOMUT DOSYASI - + Include script Senaryoyu dahil et - + SPICE I(TRNOISE): BAHARAT I(TRNOISE): - + I(TRNOISE) I(TRNOISE) - + SPICE I(PWL): -Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE I(PWL): -Çok satırlı ngspice veya Xyce I spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce I spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + I(PWL) I(PWL) - + SPICE I(AM): ngspice only. SPICE I(AM): sadece ngspice. - + I(AM) I(AM) - + SPICE G (VOL, VALUE, TABLE, POLY): -Multiple line ngspice non-linear G specifications allowed using "+" continuation lines. +Multiple line ngspice non-linear G specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE G (VOL, VALUE, TABLE, POLY): -Çok satırlı ngspice doğrusal olmayan G belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice doğrusal olmayan G belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + G G - + SPICE E (CUR, VALUE, TABLE, POLY): -Multiple line ngspice non-linear E specifications allowed using "+" continuation lines. +Multiple line ngspice non-linear E specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE E (CUR, VALUE, TABLE, POLY): -Çok satırlı ngspice doğrusal olmayan E belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice doğrusal olmayan E belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + E E - + XSPICE core block: seven line XSPICE specification. XSPICE çekirdek bloğu: yedi satırlı XSPICE spesifikasyonu. - + core çekirdek - + PWL controlled voltage source: Seven line XSPICE specification. PWL kontrollü gerilim kaynağı: Yedi satır XSPICE spesifikasyonu. - + XAPWL XAPWL - + SPICE U(URC): -Multiple line ngspice or Xyce U specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce U specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE U (URC): -Çok satırlı ngspice veya Xyce U belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce U belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + U(URC) U(URC) - + S domain transfer function block: Seven line XSPICE specification. S alanı transfer fonksiyonu bloğu: Yedi satırlı XSPICE spesifikasyonu. - + SDTF SDTF - + SPICE W: -Multiple line ngspice or Xyce W specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce W specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE W: -Çok satırlı ngspice veya Xyce W belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce W belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + W(CSW) W(CSW) - + SPICE V: -Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE V: -Çok satırlı ngspice veya Xyce V belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce V belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + V Source V Kaynak - + SPICE S: -Multiple line ngspice or Xyce S specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce S specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE S: -Çok satırlı ngspice veya Xyce S belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce S belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + S(SW) S(SW) - + SPICE B (I type): -Multiple line ngspice or Xyce B specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce B specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE B (I tipi): -Çok satırlı ngspice veya Xyce B spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce B spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + B source (I) B kaynağı (I) - + SPICE I: -Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE I: -Çok satırlı ngspice veya Xyce I spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce I spesifikasyonlarına "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + I Source I Kaynak - + SPICE R: -Multiple line ngspice or Xyce R specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce R specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE R: -Çok satırlı ngspice veya Xyce R belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce R belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + R Resistor R Direnç - + R Resistor 3 pin R Direnç 3 pin - + Q(PNP) BJT: -Multiple line ngspice or Xyce Q model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce Q model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. Q(PNP) BJT: -Çok satırlı ngspice veya Xyce Q model özelliklerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce Q model özelliklerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + Q(PNP) BJT Q(PNP) BJT - + M(PMOS) MOS: -Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. M(PMOS) MOS: -"+" devam satırları kullanılarak çoklu satır ngspice veya Xyce M model özelliklerine izin verilir. +"+" devam satırları kullanılarak çoklu satır ngspice veya Xyce M model özelliklerine izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + M(PMOS) M(PMOS) - + Z(PMF) MESFET: -Multiple line ngspice or Xyce Z model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce Z model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. Z(PMF) MESFET: -"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce Z model özelliklerine izin verilir. +"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce Z model özelliklerine izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + Z(PMF) Z(PMF) - + J(PJF) JFET: -Multiple line ngspice or Xyce J model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce J model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. J(PJF) JFET: -Çok satırlı ngspice veya Xyce J model özelliklerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce J model özelliklerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + J(PJF) JFET J(PJF) JFET - - + + Q(NPN) BJT: -Multiple line ngspice or Xyce Q model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce Q model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. Q(NPN) BJT: -Çok satırlı ngspice veya Xyce Q model özelliklerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce Q model özelliklerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - - + + Q(NPN) BJT Q(NPN) BJT - + M(NMOS) MOS: -Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. M(NMOS) MOS: -"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce M model özelliklerine izin verilir. +"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce M model özelliklerine izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + M(NMOS) M(NMOS) - + J(NJF) JFET: -Multiple line ngspice or Xyce J model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce J model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. J(NJF) JFET: -Çok satırlı ngspice veya Xyce J model özelliklerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce J model özelliklerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + J(NJF) JFET J(NJF) JFET - + Unified (M,X,3-,4-pin) MOS: -Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce M model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. Birleşik (M,X,3-,4-pin) MOS: -Çok satırlı ngspice veya Xyce M model özelliklerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce M model özelliklerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + unified MOSFET (3-4 pin) birleşik MOSFET (3-4 pin) - + M(NMOS 3 pin) M (NMOS 3 pin) - + M(PMOS 3 pin) M (PMOS 3 pin) - + X(NMOS 3 pin) X (NMOS 3 pin) - + X(PMOS 3 pin) X (PMOS 3 pin) - + X(NMOS 4 pin) X (NMOS 4 pin) - + X(PMOS 4 pin) X (PMOS 4 pin) - + Z(NMF) MESFET: -Multiple line ngspice or Xyce Z model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce Z model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. Z(NMF) MESFET: -"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce Z model özelliklerine izin verilir. +"+" devam satırları kullanılarak birden fazla satır ngspice veya Xyce Z model özelliklerine izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + Z(NMF) Z(NMF) - + SPICE L: -Multiple line ngspice or Xyce L specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce L specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE L: -Çok satırlı ngspice veya Xyce L belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce L belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + L Inductor L İndüktör - + SPICE O(LTRA): SPICE O(LTRA): - + O(LTRA) O(LTRA) - + SPICE K: Enter the names of the coupled inductances and their coupling factor. SPICE K: Kuplajlı endüktansların adlarını ve kuplaj faktörlerini girin. - + Coupling factor ( 0 < K <= 1) Bağlantı faktörü ( 0 < K <= 1) - + K coupling K kaplin - + XSPICE coupled inductor block: two line XSPICE specification. XSPICE kuplajlı indüktör bloğu: iki satır XSPICE spesifikasyonu. - + Icouple Icouple - + SPICE D: -Multiple line ngspice or Xyce D model specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce D model specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE D: -"+" devam satırları kullanılarak çok satırlı ngspice veya Xyce D model özelliklerine izin verilir. +"+" devam satırları kullanılarak çok satırlı ngspice veya Xyce D model özelliklerine izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + D Diode D Diyot - + D Diode 3 pin D Diyot 3 pin - + SPICE C: -Multiple line ngspice or Xyce C specifications allowed using "+" continuation lines. +Multiple line ngspice or Xyce C specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. SPICE C: -Çok satırlı ngspice veya Xyce C belirtimlerine "+" devam satırları kullanılarak izin verilir. +Çok satırlı ngspice veya Xyce C belirtimlerine "+" devam satırları kullanılarak izin verilir. Kullanılmadığında devam satırlarını boş bırakın. - + C Capacitor C Kondansatör - + C Capacitor 3 pin C Kondansatör 3 pin - + Q(NPN) 4 pin Q (NPN) 4 pin - + Q(PNP) 4 pin Q(PNP) 4 pin - + Q(NPN) 5 pin Q (NPN) 5 pin - + Q(PNP) 5 pin Q(PNP) 5 pin - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11162,296 +11193,312 @@ Kullanılmadığında devam satırlarını boş bırakın. - + Schematic file: Şematik dosya: - + Dataset file: Veri seti dosyası: - + Display file: Dosyayı göster: - + Open document Açık belge - + Not Specified Belirtilmemiş - - + + Qucsator Qucsator - + Ngspice Ngspice - + SpiceOpus SpiceOpus - + Xyce Xyce - + Save netlist Netlisti kaydet - + Lossy inductor Kayıplı indüktör - + Inductance Endüktans - - + + Quality factor Kalite faktörü - - + + Frequency at which Q is measured Q'nun ölçüldüğü frekans - - + + Q frequency profile Q frekans profili - + Inductor with Q Q ile İndüktör - + Lossy capacitor Kayıplı kondansatör - + Capacitance Kapasitans - + Capacitor with Q Q ile Kondansatör - + The load has not resistive part. It cannot be matched using the quarter wavelength method Yükün dirençli kısmı yoktur. Çeyrek dalga boyu yöntemi kullanılarak eşleştirilemez - - + + Reactive loads cannot be matched. Only the real part will be matched Reaktif yükler eşleştirilemez. Sadece gerçek kısım eşleştirilecektir - - + + Chebyshev weighting for N>7 is not available N>7 için Chebyshev ağırlıklandırma mevcut değildir - + The load is reactive. It cannot be matched using the quarter wavelength method Yük reaktiftir. Çeyrek dalga boyu yöntemi kullanılarak eşleştirilemez - + Exponential Tapered line Üstel Konik çizgi - + Characteristic impedance at port 1 Port 1'de karakteristik empedans - + Characteristic impedance at port 2 Port 2'de karakteristik empedans - + Line length Hat uzunluğu - + Taper weighting Konik ağırlıklandırma - + Maximum ripple (Klopfenstein taper only) Maksimum dalgalanma (sadece Klopfenstein konikliği) - + Tapered line Konik hat - - + + Circular Waveguide Dairesel Dalga Kılavuzu - + Printed loop inductor Baskılı döngü indüktörü - - + + Radius Yarıçap - + Circular loop Dairesel döngü - + Mechanical length of the line Hattın mekanik uzunluğu - + Relative permittivity of dielectric Dielektriğin bağıl geçirgenliği - + Relative permeability of conductor İletkenin bağıl geçirgenliği - + Loss tangent Kayıp tanjantı - + Specific resistance of conductor İletkenin özgül direnci - + Simulation temperature in degree Celsius Santigrat derece cinsinden simülasyon sıcaklığı - + Material parameter for temperature model Sıcaklık modeli için malzeme parametresi - - + + Port name Liman adı - - + + Input port name: Giriş bağlantı noktası adı: - + Planar spiral inductor Düzlemsel spiral indüktör - + Spiral type Spiral tip - - + + Width of line Çizgi genişliği - + Inner diameter İç çap - + Spacing between turns Dönüşler arasındaki boşluk - + Number of turns Dönüş sayısı - + Spiral inductor Spiral indüktör + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + QucsActiveFilter - + &File &Dosya - + E&xit &Çıkış - + &View &Görünüm - + &Console &Konsol - + Enables/disables the filter calculation console Filtre hesaplama konsolunu etkinleştirir/devre dışı bırakır - + Console Enables/disables the filter calculation console @@ -11460,227 +11507,227 @@ Enables/disables the filter calculation console Filtre hesaplama konsolunu etkinleştirir/devre dışı bırakır - + &Help &Yardım - + Help... Yardım... - + &About QucsActiveFilter... &QucsActiveFilter Hakkında... - + About Qt... Qt Hakkında... - - + + Passband attenuation, Ap (dB) Geçiş bandı zayıflaması, Ap (dB) - + Stopband attenuation, As (dB) Durdurma bandı zayıflaması, As (dB) - - + + Cutoff frequency, Fc (Hz) Kesme frekansı, Fc (Hz) - - + + Stopband frequency, Fs (Hz) Durdurma bandı frekansı, Fs (Hz) - + Passband ripple Rp(dB) Geçiş bandı dalgalanması Rp(dB) - + Passband gain, Kv (dB) Geçiş bandı kazancı, Kv (dB) - + Filter order Filtre sırası - + Approximation type: Yaklaşım türü: - + Butterworth Butterworth - + Chebyshev Chebyshev - + Inverse Chebyshev Ters Chebyshev - + Cauer (Elliptic) Cauer (Eliptik) - + Bessel Bessel - + Legendre Legendre - + User defined Kullanıcı tanımlı - + Manually define transfer function Transfer fonksiyonunu manuel olarak tanımlama - + Calculate and copy to clipboard Hesapla ve panoya kopyala - + Low Pass Düşük Geçiş - + General filter amplitude-frequency response Genel filtre genlik-frekans yanıtı - - - + + + Unable to implement filter with such parameters and topology Change parameters and/or topology and try again! Bu tür parametreler ve topoloji ile filtre uygulanamıyor Parametreleri ve/veya topolojiyi değiştirin ve tekrar deneyin! - - + + Filter calculation was successful Filtre hesaplaması başarılı oldu - + Filter calculation terminated with error! Filtre hesaplaması hata ile sonlandırıldı! - + Filter calculation terminated with error Filtre hesaplaması hata ile sonlandırıldı - + Lower cutoff frequency, Fl (Hz) Alt kesim frekansı, Fl (Hz) - + Copyright (C) 2014, 2015 by Telif hakkı 2005, 2006 {2014, 2015 ?} - + Filter topology Filtre topolojisi - + Filter type: Süzgeç çeşidi: - + High Pass Yüksek Geçiş - + Band Pass Bant Geçişi - + Band Stop Grup Durağı - + Multifeedback (MFB) Multifeedback (MFB) - + Sallen-Key (S-K) Sallen-Key (S-K) - - + + Cauer section Cauer bölümü - + Filter parameters Filtre parametreleri - + Transfer function and Topology Transfer fonksiyonu ve Topoloji - + Filter topology preview Filtre topolojisi önizlemesi - + Filter calculation console Filtre hesaplama konsolu - - + + Ready. Hazır. - + Upper cutoff frequency of band-pass/band-stop filter is less than lower. Unable to implement such filter. Change parameters and try again. @@ -11689,51 +11736,51 @@ düşükten daha az. Böyle bir filtre uygulanamıyor. Parametreleri değiştirin ve tekrar deneyin. - + Unable to use Cauer section for Chebyshev or Butterworth frequency response. Try to use another topology. Chebyshev veya Butterworth için Cauer bölümü kullanılamıyor frekans tepkisi. Başka bir topoloji kullanmayı deneyin. - + Unable to use MFB filter for Cauer or Inverse Chebyshev frequency response. Try to use another topology. Cauer veya Ters Chebyshev için MFB filtresi kullanılamıyor frekans tepkisi. Başka bir topoloji kullanmayı deneyin. - + Function will be implemented in future version İşlev gelecek sürümde uygulanacaktır - + Upper cutoff frequency, Fu (Hz) Üst kesim frekansı, Fu (Hz) - + Transient bandwidth, TW (Hz) Geçici bant genişliği, TW (Hz) - + Error! Hata! - + Active filter design Aktif filtre tasarımı - + About... Hakkında... - + Active Filter synthesis program @@ -11742,7 +11789,7 @@ Aktif Filtre sentez programı - + About Qt Qt Hakkında @@ -11750,131 +11797,132 @@ Aktif Filtre sentez programı QucsApp - + + Schematic Tasarım - + Data Display Veri Göstergesi - + Qucs Documents Qucs Belgeleri - - + + VHDL Sources VHDL Kaynakları - - + + Verilog Sources Verilog Kaynakları - - + + Verilog-A Sources Verilog-A Kaynakları - - + + Octave Scripts Octave Komut Dosyaları - + Spice Files Baharat Dosyaları - - - + + + Any File Herhangi Bir Dosya - + The schematic search path has been refreshed. Şematik arama yolu yenilendi. - + Verilog Verilog - + VHDL VHDL - + Open file Dosya aç - + Document opened in read-only mode! Simulation will not work. Please copy the document to the directory where you have write permission! Belge salt okunur modda açıldı! Simülasyon çalışmayacaktır. Lütfen belgeyi yazma izninizin olduğu dizine kopyalayın! - + Open example… Açık örnek... - + Select example schematic Örnek şemayı seçin - + Open example canceled Açık örnek iptal edildi - - - + + + Simulate schematic Şematik simülasyon - + DC bias simulation mode is not supported for digital schematic! DC bias simülasyon modu dijital şematik için desteklenmez! - + Schematics Tasarılar - + New Yeni - + Symbol only Yalnızca sembol - - + + QucsatorRF found at: QucsatorRF'de bulundu: - + You can specify another location later using Simulation->Simulators Setings @@ -11883,244 +11931,245 @@ Daha sonra Simülasyon->Simülatör Ayarları'nı kullanarak başka bir - + NOTE: Only QucsatorRF found. This simulator is not recommended for general purpose schematics. Please install Ngspice. NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için önerilmez. Lütfen Ngspice yükleyin. - + Qucs Qucs - + No simulators found automatically. Please specify simulators in the next dialog window. Otomatik olarak simülatör bulunamadı. Lütfen bir sonraki iletişim penceresinde simülatörleri belirtin. - + Main Dock Ana İskele - + Open Aç - + Delete Sil - + Projects Tasarımlar - + content of project directory Tasarı dizininin içeriği - + Content İçerik - + content of current project geçerli tasarının içeriği - + Search Components Arama Bileşenleri - - + + Clear Temiz - + Components Bileşenler - + components and diagrams bileşenler ve çizgeler - - + + Libraries Kütüphaneler - + system and user component libraries sistem ve kullanıcı bileşen kütüphaneleri - + Octave Dock Octave Dock - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Error Hata - - Cannot open "%1". - "%1" açılamıyor. + + Cannot open "%1". + "%1" açılamıyor. - - - + + + Library is corrupt. Kütüphane bozuk. - - - - - - - - - - - - - - + + + + + + + + + + + + + + Info Bilgi - + Default icon not found: %1.png Varsayılan simge bulunamadı: 1.png - + -port -uç - + Copying Qucs document Qucs belgesini kopyalama - - + + The document contains unsaved changes! Belge kaydedilmemiş değişiklikler içeriyor! - + Do you want to save the changes before copying? Kopyalamadan önce değişiklikleri kaydetmek istiyor musunuz? - + &Save &Kaydet - + Copy file Dosya kopyalama - + Enter new name: Yeni bir ad gir: - + error hata - + Cannot rename an open file! Açık bir dosya yeniden adlandırılamaz! - + Rename file Dosyayı yeniden adlandır - + Cannot delete an open file! Açık bir dosya silinemez! - - - - - - + + + + + + Warning Uyarı - + This will delete the file permanently! Continue ? Dosya kalıcı olarak silinecek! Devam ? @@ -12133,62 +12182,62 @@ NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için ön Evet - + unknown Bilinmiyor - + Verilog source Verilog kaynağı - + Verilog-A source Verilog-A kaynağı - + VHDL source VHDL kaynağı - + data file veri dosyası - + data display veri ekranı - + schematic Şematik - + symbol sembolü - + VHDL configuration VHDL yapılandırması - + configuration yapılandırma - + Cannot create work directory ! Çalışma dizini oluşturulamıyor ! - + Cannot create project directory ! Tasarım dizini oluşturulamıyor ! @@ -12201,101 +12250,101 @@ NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için ön - Tasarım: - + Choose Project Directory for Opening Açılacak Tasarım Dizinini Seçin - + No project is selected ! Seçili Tasarım yok ! - + Cannot delete file: %1 Dosya silinemiyor: %1 - - - - - + + + + + Search results Arama sonuçları - + Search Lib Components Lib Bileşenlerini Ara - + Set simulator Simülatörü ayarla - + Ngspice found at: Ngspice'de bulundu: - + Show model Modeli göster - + verilog-a user devices verilog-a kullanıcı cihazları - + Cannot copy file to identical name: %1 Dosya aynı ada kopyalanamıyor: %1 - + Cannot copy schematic: %1 Şematik kopyalanamıyor: %1 - + Enter new filename: Yeni dosya adını girin: - + Cannot rename file: %1 Dosya yeniden adlandırılamıyor: %1 - + Cannot access project directory: %1 Proje dizinine erişilemiyor: %1 - + Project directory name does not end in '_prj'(%1) Proje dizini adı '_prj'(%1) ile bitmiyor - + Project: Proje: - + Project directory name does not end in '_prj' (%1) Proje dizini adı '_prj' ile bitmiyor (%1) - + Cannot delete an open project ! Açık bir tasarım silinemez ! - + This will destroy all the project files permanently ! Continue ? Bu, tüm tasarım dosyalarını kalıcı olarak silecek ! Devam mı ? @@ -12308,119 +12357,120 @@ NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için ön &Hayır - + Cannot remove project directory! Proje dizini kaldırılamıyor! - + Choose Project Directory for Deleting Silinecek Tasarım Dizinini Seçin - + No project is selected! Hiçbir proje seçilmedi! - - + + Creating new schematic... Yeni tasarı oluşturuluyor... - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + Ready. Hazır. - + Creating new text editor... Yeni metin düzenleyici oluşturuluyor... - - + + Opening file... Dosya açılıyor... - + Enter a Schematic Name Tasarı Adı Giriniz - + Opening aborted Açma işlemi iptal edildi - + Saving file... Dosya kaydediliyor... - - + + Saving aborted Kayıt iptal edildi - + Qucs Netlist Qucs Net Listesi - + SPICE Netlist SPICE Net Listesi - + Plain Text Düz Metin - + + Subcircuit symbol Alt devre sembolü - + Enter a Document Name Belge Adı Giriniz - + The file ' Dosya ' - + ' already exists! ' zaten mevcut! - + Saving will overwrite the old one! Continue? Kayıt eskisinin üzerine yazacak! Devam? @@ -12429,32 +12479,32 @@ NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için ön İptal - + Cannot overwrite an open document Açık bir belge üzerine yazılamaz - + Saving file under new filename... Dosya yeni ad ile kaydediliyor... - + Saving all files... Tüm Dosyalar kaydediliyor... - + Closing file... Dosya kapatılıyor... - + Closing Qucs document Qucs belgesi kapatılıyor - + Do you want to save the changes before closing? Kapatmadan önce değişiklikleri kaydetmek istiyor musunuz ? @@ -12463,72 +12513,78 @@ NOT: Sadece QucsatorRF bulundu. Bu simülatör genel amaçlı şemalar için ön &Gözardı et - + untitled isimsiz - + Printing... Yazılıyor... - + Exiting application... Uygulamadan çıkılıyor... - + No simulations found. Tuning not possible. Please add at least one simulation. Simülasyon bulunamadı. Ayarlama mümkün değil. Lütfen en az bir simülasyon ekleyin. - + Tuning not possible for digital simulation. Only analog simulation supported. Dijital simülasyon için ayarlama mümkün değildir. Sadece analog simülasyon desteklenir. - + Tuning has no effect without diagrams. Add at least one diagram on schematic. Diyagramlar olmadan ayarlamanın hiçbir etkisi yoktur. Şematik üzerine en az bir diyagram ekleyin. - + Symbol editing supported only for schematics and Verilog-A documents! Sembol düzenleme yalnızca şemalar ve Verilog-A belgeleri için desteklenir! - + Attaching symbols to Verilog-A sources is deprecated and not recommended for new designs. Use SPICE generic device instead. See the documentation for more details. Sembollerin Verilog-A kaynaklarına eklenmesi kullanımdan kaldırılmıştır ve yeni tasarımlar için önerilmez. Bunun yerine SPICE jenerik cihazını kullanın. Daha fazla ayrıntı için belgelere bakın. - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! Şematik kaydedilmedi! Kaydedilmemiş şemanın simülasyonu mümkün değil. Önce şemayı kaydedin! - + Simulation of text document is not possible! Metin belgesinin simülasyonu mümkün değildir! - + This action is supported only for SPICE simulators! Bu eylem yalnızca SPICE simülatörleri için desteklenir! - + + + Save CDL netlist failed! + + + + Save Verilog-A module Verilog-A modülünü kaydet - + Build Verilog-A module Verilog-A modülü oluşturun - + This schematic is not a subcircuit! Use subcircuit to crete Verilog-A module! Bu şematik bir alt devre değildir! @@ -12543,12 +12599,12 @@ Verilog-A modülünü oluşturmak için alt devre kullanın! Uygulamadan gerçekten çıkmak mı istiyorsunuz? - + The document was modified by another program ! Belge başka bir yazılım tarafından değiştirilmiş ! - + Do you want to reload or keep this version ? Bu sürümü tekrar yüklemek mi yoksa tutmak mı istiyorsunuz ? @@ -12561,72 +12617,72 @@ Verilog-A modülünü oluşturmak için alt devre kullanın! Tut - + Cannot create Oluşturulamıyor - + No page set ! Kurulu sayfa yok ! - - Cannot start "%1"! - "%1" başlatılamıyor! + + Cannot start "%1"! + "%1" başlatılamıyor! - + Could not load S[1,1]. Yüklenemiyor S(1.1). - + Could not load S[1,2]. Yüklenemiyor S(1.2). - + Could not load S[2,1]. Yüklenemiyor S(2.1). - + Could not load S[2,2]. Yüklenemiyor S(2.2). - + Wrong dependency! Yanlış dayanak! - + Cutting selection... Seçili kesiliyor... - + Copying selection to clipboard... Seçili not tahtasına çoğaltılıyor... - - - - - - + + + + + + At least two elements must be selected ! En az iki eleman seçilmeli ! - + Opening aborted, file not found. Açılış iptal edildi, dosya bulunamadı. - + Cannot start text editor! %1 @@ -12635,17 +12691,24 @@ Verilog-A modülünü oluşturmak için alt devre kullanın! %1 - + Show netlist Net listeyi göster - + Not a schematic tab! Şematik sekme değil! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12654,81 +12717,81 @@ Verilog-A modülünü oluşturmak için alt devre kullanın! (%2) - + Layouting of display pages is not supported! Ekran sayfalarının düzenlenmesi desteklenmiyor! - + Cannot write netlist! Netlist yazılamıyor! - + Digital schematic not supported! Dijital şematik desteklenmiyor! - + Layouting of text documents is not supported! Metin belgelerinin düzenlenmesi desteklenmiyor! - + Cannot start Qucs-RFLayout: %1 Qucs-RFLayout başlatılamıyor: %1 - + No project open! Açık tasarım yok! - + Select files to copy Çogaltılacak dosyaları seçin - + No files copied. Hiçbir dosya kopyalanmadı. - - Cannot open "%1" ! - "%1" açılamıyor ! + + Cannot open "%1" ! + "%1" açılamıyor ! - + Overwrite Üzerine yaz - - File "%1" already exists. + + File "%1" already exists. Overwrite ? - "%1" dosyası zaten var. + "%1" dosyası zaten var. Üzerine yazılsın mı ? - - Cannot create "%1" ! - "%1" oluşturulamıyor ! + + Cannot create "%1" ! + "%1" oluşturulamıyor ! - - Cannot read "%1" ! - "%1" okunamıyor ! + + Cannot read "%1" ! + "%1" okunamıyor ! - - Cannot write "%1" ! - "%1" yazılamıyor ! + + Cannot write "%1" ! + "%1" yazılamıyor ! - + Please open project with subcircuits! Lütfen alt devre tasarımını açın! @@ -12737,32 +12800,32 @@ Overwrite ? Önce tasarımı açın lütfen! - + Please select a diagram graph! Lütfen bir çizge grafigi seçin! - + Enter an Output File Name Çıktı Kütügünün Adını Girin - + CSV file CVS dosyası - + Output file already exists! Çıktı dosyası zaten var! - + Overwrite it? Üzerine yazılsın mı? - + Symbol files not found in: %1 Is the project open? @@ -12773,42 +12836,42 @@ Proje açık mı? Verilog-A sembollerini kaydettiniz mi? - + admsXml admsXml - + Compiler Derleyici - + admsXml Dock admsXml Dock - + OpenVAF OpenVAF - + OpenVAF Dock OpenVAF Dock - + &New &Yeni - + Creates a new document Yeni belge oluşturur - + New Creates a new schematic or data display document @@ -12817,22 +12880,22 @@ Creates a new schematic or data display document Veri görüntüleme ya da tasarı belgesi oluşturur - + New &Text Yeni &Metin - + Ctrl+Shift+V Ctrl+Shift+V - + Creates a new text document Yeni bir metin belgesi oluşturur - + New Text Creates a new text document @@ -12841,17 +12904,17 @@ Creates a new text document Yeni bir metin belgesi oluşturur - + &Open... &Aç... - + Opens an existing document Varolan bir belgeyi açar - + Open File Opens an existing document @@ -12860,12 +12923,12 @@ Opens an existing document Varolan bir belgeyi açar - + Saves the current document Geçerli belgeyi kaydeder - + Save File Saves the current document @@ -12874,17 +12937,17 @@ Saves the current document Geçerli belgeyi kaydeder - + Save as... Farklı kaydet... - + Saves the current document under a new filename Geçerli belgeyi yeni adı altında kaydet - + Save As Saves the current document under a new filename @@ -12893,22 +12956,22 @@ Saves the current document under a new filename Geçerli belgeyi yeni bir ad altında kaydeder - + Save &All Tümünü &Kaydet - + Ctrl+Shift+S Ctrl+Shift+S - + Saves all open documents Tüm açık belgeleri kaydeder - + Save All Files Saves all open documents @@ -12917,17 +12980,17 @@ Saves all open documents Tüm açık belgeleri kaydeder - + &Close &Kapat - + Closes the current document Geçerli belgeyi kapatır - + Close File Closes the current document @@ -12936,27 +12999,27 @@ Closes the current document Geçerli belgeyi kapatır - + Clear Recent Güncel Haberleri Temizle - + &Examples &Örnekler - + &Edit Circuit Symbol Devre &Simgesini Değiştir - + Edits the symbol for this schematic Bu tasarının simgesini düzenler - + Edit Circuit Symbol Edits the symbol for this schematic @@ -12965,22 +13028,22 @@ Edits the symbol for this schematic Bu tasarının simgesini düzenler - + &Document Settings... &Belge Ayarları... - + Ctrl+. Ctrl+. - + Document Settings Belge Ayarları - + Settings Sets properties of the file @@ -12989,17 +13052,17 @@ Sets properties of the file Dosya ayarlarını yapar - + &Print... &Yazdır... - + Prints the current document Geçerli belgeyi yazdır - + Print File Prints the current document @@ -13008,22 +13071,22 @@ Prints the current document Geçerli belgeyi yazdırır - + Print Fit to Page... Sıgdırarak Yazdır... - + Ctrl+Shift+P Ctrl+Shift+P - + Print Fit to Page Sayfaya Sığdırarak Yazdır - + Print Fit to Page Print and fit content to the page size @@ -13032,17 +13095,17 @@ Print and fit content to the page size içerigi sayfa büyüklügüne sıgdırır ve öyle yazdırır - + E&xit Ç&ık - + Quits the application Uygulamadan çık - + Exit Quits the application @@ -13051,22 +13114,22 @@ Quits the application Uygulamadan çıkar - + Application Settings... Uygulama Ayarları ... - + Ctrl+, Ctrl+, - + Application Settings Uygulama Ayarları - + Qucs Settings Sets properties of the application @@ -13075,17 +13138,17 @@ Sets properties of the application Uygulama ayarlarını yapar - + Refresh Search Path... Arama Yolunu Yenile... - + Refresh Search Path Arama Yolunu Yenile - + Refresh Path Rechecks the list of paths for subcircuit files. @@ -13094,22 +13157,22 @@ Rechecks the list of paths for subcircuit files. Alt devre dosyaları için yol listesini yeniden kontrol eder. - + Align top Yukarı hizala - + Ctrl+T Ctrl+T - + Align top selected elements Seçili bilesenleri yukarı hizala - + Align top Align selected elements to their upper edge @@ -13118,17 +13181,17 @@ Align selected elements to their upper edge Seçili bilesenleri üst köşelerine hizala - + Align bottom Alta hizala - + Align bottom selected elements Seçili bilesenleri alta hizala - + Align bottom Align selected elements to their lower edge @@ -13137,17 +13200,17 @@ Align selected elements to their lower edge Seçili bilesenleri alt köşelerine hizala - + Align left Sola hizala - + Align left selected elements Seçili bilesenleri sola hizala - + Align left Align selected elements to their left edge @@ -13156,17 +13219,17 @@ Align selected elements to their left edge Seçili bilesenleri sol köşelerine hizala - + Align right Sağa hizala - + Align right selected elements Seçili bilesenleri sağa hizala - + Align right Align selected elements to their right edge @@ -13175,17 +13238,17 @@ Align selected elements to their right edge Seçili öğeleri sağ köşelerine hizala - + Distribute horizontally Yatay Dağıt - + Distribute equally horizontally Yatay ve eşit dağıt - + Distribute horizontally Distribute horizontally selected elements @@ -13194,17 +13257,17 @@ Distribute horizontally selected elements Seçili bilesenleri yatay dağıt - + Distribute vertically Dikey dağıt - + Distribute equally vertically Dikey ve eşit dağıt - + Distribute vertically Distribute vertically selected elements @@ -13213,17 +13276,17 @@ Distribute vertically selected elements Seçili bilesenleri dikey dağıt - + Center horizontally Yatay ortala - + Center horizontally selected elements Seçili bileşenleri yatay olarak ortala - + Center horizontally Center horizontally selected elements @@ -13232,17 +13295,17 @@ Center horizontally selected elements Seçili bileşenleri yatay olarak ortala - + Center vertically Dikey ortala - + Center vertically selected elements Seçili bileşenleri dikey olarak ortala - + Center vertically Center vertically selected elements @@ -13251,22 +13314,22 @@ Center vertically selected elements Seçili bileşenleri dikey olarak ortala - + Set on Grid Izgaranın üzerine kur - + Ctrl+U Ctrl+U - + Sets selected elements on grid Seçili bilesenleri ızgaranın üzerine kurar - + Set on Grid Sets selected elements on grid @@ -13275,22 +13338,22 @@ Sets selected elements on grid Seçili bilesenleri ızgaranın üzerine kurar - + Move Component Text Bileşen Metnini Taşı - + Ctrl+K Ctrl+K - + Moves the property text of components Bileşenlerin özellik metnini taşır - + Move Component Text Moves the property text of components @@ -13299,17 +13362,17 @@ Moves the property text of components Bileşenlerin özellik yazısını taşır - + Replace... Yer degistir... - + Replace component properties or VHDL code Bileşen özelliklerini ya da VHDL metnini yer değiştir - + Replace Change component properties @@ -13323,22 +13386,22 @@ VHDL kodundaki metni degistir - + Cu&t K&es - + Ctrl+X Ctrl+X - + Cuts out the selection and puts it into the clipboard Seçili kısmı keser ve not tahtasına koyar - + Cut Cuts out the selection and puts it into the clipboard @@ -13347,17 +13410,17 @@ Cuts out the selection and puts it into the clipboard Seçili kısmı keser ve not tahtasına koyar - + &Copy &Çoğalt - + Copies the selection into the clipboard Seçili kısmı not tahtasına çoğaltır - + Copy Copies the selection into the clipboard @@ -13366,17 +13429,17 @@ Copies the selection into the clipboard Seçili kısmı not tahtasına çoğaltır - + &Paste &Yapıştır - + Pastes the clipboard contents to the cursor position Not tahtası içeriğini işaretleyicinin bulunduğu yere yapıştırır - + Paste Pastes the clipboard contents to the cursor position @@ -13385,17 +13448,17 @@ Pastes the clipboard contents to the cursor position Not tahtası içeriğini işaretleyicinin bulunduğu yere yapıştırır - + &Delete &Sil - + Deletes the selected components Seçili bilşenleri siler - + Delete Deletes the selected components @@ -13404,17 +13467,17 @@ Deletes the selected components Seçili bilşenleri siler - + Find... Ara... - + Find a piece of text Bir metin parçasını ara - + Find Searches for a piece of text @@ -13423,17 +13486,17 @@ Searches for a piece of text Bir metin parçasını arar - + Export as image... Görüntü olarak dışa aktar... - + Exports the current document to an image file Geçerli belgeyi bir görüntü dosyasına aktarır - + Export as image Exports the current document to an image file @@ -13442,17 +13505,17 @@ Exports the current document to an image file Geçerli belgeyi bir görüntü dosyasına aktarır - + &Undo &Geri Al - + Undoes the last command Son komutu geri alır - + Undo Makes the last action undone @@ -13461,17 +13524,17 @@ Makes the last action undone Son komutu geri alır - + &Redo &Tekrarla - + Redoes the last command Son komutu tekrarlar - + Redo Repeats the last action once more @@ -13480,22 +13543,22 @@ Repeats the last action once more Son komutu tekrarlar - + &New Project... &Yeni Tasarım... - + Ctrl+Shift+N Ctrl+Shift+N - + Creates a new project Yeni bir tasarım oluşturur - + New Project Creates a new project @@ -13504,22 +13567,22 @@ Creates a new project Yeni bir tasarım oluşturur - + &Open Project... &Tasarımı Aç... - + Ctrl+Shift+O Ctrl+Shift+O - + Opens an existing project Varolan bir tasarımı açar - + Open Project Opens an existing project @@ -13528,22 +13591,22 @@ Opens an existing project Varolan bir tasarımı açar - + &Delete Project... Tasarımı &Sil... - + Ctrl+Shift+D Ctrl+Shift+D - + Deletes an existing project Varolan bir tasarımı siler - + Delete Project Deletes an existing project @@ -13552,22 +13615,22 @@ Deletes an existing project Varolan bir tasarımı siler - + &Close Project Tasarımı &Kapat - + Ctrl+Shift+W Ctrl+Shift+W - + Closes the current project Geçerli tasarımı kapatır - + Close Project Closes the current project @@ -13576,22 +13639,22 @@ Closes the current project Geçerli olan tasarımı kapatır - + &Add Files to Project... &Dosyaları Tasarıma Ekle... - + Ctrl+Shift+A Ctrl+Shift+A - + Copies files to project directory Dosyaları tasarım dizinine kopyalar - + Add Files to Project Copies files to project directory @@ -13600,22 +13663,22 @@ Copies files to project directory Dosyaları proje dizinine kopyalar - + Create &Library... Kütüphane &Olustur... - + Ctrl+Shift+L Ctrl+Shift+L - + Create Library from Subcircuits Alt devrelerden bir kütüphane olusturur - + Create Library Create Library from Subcircuits @@ -13624,17 +13687,17 @@ Create Library from Subcircuits Alt devrelerden bir kütüphane olusturur - + S-parameter Viewer S-parametre Görüntüleyici - + Starts S-parameter viewer S-parametre görüntüleyiciyi başlatır - + S-parameter Viewer Starts S-parameter viewer @@ -13643,12 +13706,43 @@ Starts S-parameter viewer S-parametre görüntüleyiciyi başlatır - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S &Qucs-S Hakkında - + &About Qt &Qt hakkında @@ -13685,12 +13779,12 @@ Install Content of a Package Bohça içerigini yükle - + Convert data file Veri dosyasını dönüştür - + Import/Export Data Convert data file to various file formats @@ -13699,22 +13793,22 @@ Convert data file to various file formats Veri dosyasını çeşitli dosya formatlarına dönüştürme - + Export to &CSV... &CVS'e aktar... - + New symbol Yeni sembol - + Creates a new symbol Yeni bir sembol oluşturur - + New Creates a new schematic symbol document @@ -13723,12 +13817,12 @@ Creates a new schematic symbol document Yeni bir şematik sembol belgesi oluşturur - + Starts file chooser dialog to open one of example schematics Örnek şemalardan birini açmak için dosya seçici iletişim kutusunu başlatır - + Examples Start file chooser dialog and open one of example schematics @@ -13737,17 +13831,17 @@ Start file chooser dialog and open one of example schematics Dosya seçici iletişim kutusunu başlatın ve örnek şemalardan birini açın - + Ctrl+Shift+C Ctrl+Shift+C - + Convert graph data to CSV file Grafik verisini CVS kütügüne çevirir - + Export to CSV Convert graph data to CSV file @@ -13756,51 +13850,51 @@ Convert graph data to CSV file Grafik verisini CVS kütügüne çevirir - + Build Verilog-A module... Verilog-A modülü oluşturun... - + Run admsXml and C++ compiler admsXml ve C++ derleyicisini çalıştırın - + Build Verilog-A module Runs amdsXml and C++ compiler Verilog-A modülü oluşturun amdsXml ve C++ derleyicisini çalıştırır - + Load Verilog-A module... Verilog-A modülünü yükle... - + Select Verilog-A symbols to be loaded Yüklenecek Verilog-A sembollerini seçin - + Load Verilog-A module Let the user select and load symbols Verilog-A modülünü yükle Kullanıcının sembolleri seçmesine ve yüklemesine izin verin - + View All Tümünü Görüntüle - + Show the whole page Tüm sayfayı göster - + View All Shows the whole page content @@ -13809,22 +13903,22 @@ Shows the whole page content Tüm sayfa içeriğini görüntüler - + Zoom to selection Seçime yakınlaştır - + Z Z - + Zoom to selected components Seçili bileşenlere yakınlaştırma - + Zoom to selection Zoom to selected components @@ -13833,17 +13927,17 @@ Zoom to selected components Seçili bileşenlere yakınlaştırma - + View 1:1 Görüntüle 1:1 - + Views without magnification Büyütme olmaksızın görüntüler - + View 1:1 Shows the page content without magnification @@ -13852,17 +13946,17 @@ Shows the page content without magnification Sayfa içeriğini büyütme olmaksızın görüntüler - + Zoom in Büyüt - + Zooms into the current view Geçerli görünümü büyütür - + Zoom in Zooms the current view @@ -13871,17 +13965,17 @@ Zooms the current view Geçerli görünümü büyütür - + Zoom out Küçült - + Zooms out the current view Geçerli görünümü küçültür - + Zoom out Zooms out the current view @@ -13890,17 +13984,17 @@ Zooms out the current view Geçerli manzarayı uzaklaştırır - + Select Seç - + Activate select mode Seçme durumunu etkinleştirir - + Select Activates select mode @@ -13909,22 +14003,22 @@ Activates select mode Seçme durumunu etkinleştirir - + Select All Tümünü Seç - + Ctrl+A Ctrl+A - + Selects all elements Tüm bilesenleri seçer - + Select All Selects all elements of the document @@ -13933,22 +14027,22 @@ Selects all elements of the document Belgenin tüm bilesenlerini seçer - + Select Markers Isaretleyicileri Seç - + Ctrl+Shift+M Ctrl+Shift+M - + Selects all markers Tüm isaretleyicileri seçer - + Select Markers Selects all diagram markers of the document @@ -13957,22 +14051,22 @@ Selects all diagram markers of the document Belgedeki tüm çizge isaretleyicilerini seçer - + Rotate Döndür - + Ctrl+R Ctrl+R - + Rotates the selected component by 90� Seçili bilşeni 90° çevirir {90�?} - + Rotate Rotates the selected component by 90� counter-clockwise @@ -13981,28 +14075,28 @@ Rotates the selected component by 90� counter-clockwise Seçili bileşeni saatin tersi yönde 90° çevirir {90�?} - + Ctrl+W Ctrl+W - + Power combining Güç birleştirme - + Ctrl+7 Ctrl+7 - + Starts QucsPowerCombining QucsPowerCombining'i başlatır - - + + Power combining Starts power combining calculation program @@ -14011,32 +14105,32 @@ Starts power combining calculation program Güç birleştirme hesaplama programını başlatır - + Data files converter Veri dosyaları dönüştürücü - + Ctrl+8 Ctrl+8 - + RF Layout RF Düzeni - + Ctrl+9 Ctrl+9 - + Starts Qucs-RFLayout Qucs-RFLayout'u başlatır - + View Data Display/Schematic Changes to data display or schematic page @@ -14045,17 +14139,17 @@ Changes to data display or schematic page Veri ekranında veya şematik sayfada değişiklikler - + Set Diagram Limits Diyagram Sınırlarını Ayarlama - + Pick the diagram limits using the mouse. Right click for default. Fareyi kullanarak diyagram sınırlarını seçin. Varsayılan için sağ tıklayın. - + Set Diagram Limits Pick the diagram limits using the mouse. Right click for default. @@ -14064,22 +14158,22 @@ Pick the diagram limits using the mouse. Right click for default. Fareyi kullanarak diyagram sınırlarını seçin. Varsayılan için sağ tıklayın. - + Reset Diagram Limits Diyagram Sınırlarını Sıfırla - + Ctrl+Shift+E Ctrl+Shift+E - + Resets the limits for all axis to auto. Tüm eksenler için limitleri otomatik olarak sıfırlar. - + Reset Diagram Limits Resets the limits for all axis to auto. @@ -14088,7 +14182,7 @@ Resets the limits for all axis to auto. Tüm eksenler için limitleri otomatik olarak sıfırlar. - + Simulators Settings... Simülatör Ayarları... @@ -14105,22 +14199,22 @@ Rotates the selected component by 90° counter-clockwise Seçili bileşeni saatin tersi yönde 90° çevirir - + Mirror about X Axis X Ekseni Etrafında Aynala - + Ctrl+J Ctrl+J - + Mirrors the selected item about X Axis Seçili elemanın x ekseni etrafında ayna görüntüsünü alır - + Mirror about X Axis Mirrors the selected item about X Axis @@ -14129,22 +14223,22 @@ Mirrors the selected item about X Axis Seçili elemanı x ekseni etrafında aynalar - + Mirror about Y Axis Y Ekseni Etrafında Aynala - + Ctrl+M Ctrl+M - + Mirrors the selected item about Y Axis Seçili elemanın y ekseni etrafında ayna görüntüsünü alır - + Mirror about Y Axis Mirrors the selected item about Y Axis @@ -14153,22 +14247,22 @@ Mirrors the selected item about Y Axis Seçili elemanı y ekseni etrafında aynalar - + Go into Subcircuit Alt-Devreye Git - + Ctrl+I Ctrl+I - + Goes inside the selected subcircuit Seçili alt-devrenin içine girer - + Go into Subcircuit Goes inside the selected subcircuit @@ -14177,22 +14271,22 @@ Goes inside the selected subcircuit Alt-devrenin içine girer - + Pop out Bir Üst Katmana - + Ctrl+H Ctrl+H - + Pop outside subcircuit Bir üst katmana çık - + Pop out Goes up one hierarchy level, i.e. leaves subcircuit @@ -14201,22 +14295,22 @@ Goes up one hierarchy level, i.e. leaves subcircuit Devre sıradüzeninde (hiyerarsi) bir üst katmana çıkar, yani alt-devreyi terkeder - + Deactivate/Activate Kapat/Etkinleştir - + Ctrl+D Ctrl+D - + Deactivate/Activate selected components Seçili bilşenleri Kapatır/Etkinlestirir - + Deactivate/Activate Deactivate/Activate the selected components @@ -14225,22 +14319,22 @@ Deactivate/Activate the selected components Seçili bilesenleri Kapatır/Etkinlestirir - + Insert Equation Eşitlik Ekle - + Ctrl+< Ctrl+< - + Inserts an equation Eşitlik ekler - + Insert Equation Inserts a user defined equation @@ -14249,22 +14343,22 @@ Inserts a user defined equation Kullanıcı tarafından belirlenen bit eşitlik ekler - + Insert Ground Toprak Ekle - + Ctrl+G Ctrl+G - + Inserts a ground symbol Toprak simgesi ekler - + Insert Ground Inserts a ground symbol @@ -14273,17 +14367,17 @@ Inserts a ground symbol Toprak simgesi ekler - + Insert Port Uç Ekle - + Inserts a port symbol Giriş/çıkış ayak (uç/port) simgesi ekler - + Insert Port Inserts a port symbol @@ -14292,17 +14386,17 @@ Inserts a port symbol Giriş/çıkış ayak(uç/port) simgesi ekler - + Wire Bağlantı Hattı - + Inserts a wire Bağlantı teli ekler - + Wire Inserts a wire @@ -14311,22 +14405,22 @@ Inserts a wire Bağlantı hattı ekler - + Wire Label Bağlantı Hattı Yaftası - + Ctrl+L Ctrl+L - + Inserts a wire or pin label Bağlantı Hattı ya da Ayak Yaftası Ekler - + Wire Label Inserts a wire or pin label @@ -14335,22 +14429,22 @@ Inserts a wire or pin label Bağlantı Hattı veya Ayak Yaftası Ekler - + VHDL entity VHDL varlığı - + Ctrl+Space Ctrl+Boşluk - + Inserts skeleton of VHDL entity - Bir "VHDL varlığı" iskeleti koyar + Bir "VHDL varlığı" iskeleti koyar - + VHDL entity Inserts the skeleton of a VHDL entity @@ -14359,22 +14453,22 @@ Inserts the skeleton of a VHDL entity Bir VHDL varlığı iskeleti koyar - + Text Editor Metin düzenleyici - + Ctrl+1 Ctrl+1 - + Starts the Qucs text editor Qucs metin düzenleyiciyisini başlatır - + Text editor Starts the Qucs text editor @@ -14383,22 +14477,22 @@ Starts the Qucs text editor Qucs metin düzenleyicisini başlatır - + Filter synthesis Süzgeç tasarımı - + Ctrl+2 Ctrl+2 - + Starts QucsFilter QucsFilter uygulamasını başlatır - + Filter synthesis Starts QucsFilter @@ -14407,22 +14501,22 @@ Starts QucsFilter QucsFilter uygulamasını başlatır - + Active filter synthesis Aktif filtre sentezi - + Ctrl+3 Ctrl+3 - + Starts QucsActiveFilter QucsActiveFilter'ı başlatır - + Active filter synthesis Starts QucsActiveFilter @@ -14431,22 +14525,22 @@ Starts QucsActiveFilter QucsActiveFilter'ı başlatır - + Line calculation iletim hattı hesabı - + Ctrl+4 Ctrl+4 - + Starts QucsTrans QucsTrans uygulamasını başlatır - + Line calculation Starts transmission line calculator @@ -14471,22 +14565,22 @@ Starts component library program Bileşen Kütüphanesi uygulamasını başlatır - + Matching Circuit Karşılaştırma Devresi - + Ctrl+5 Ctrl+5 - + Creates Matching Circuit Karşılaştırma Devresi Oluşturur - + Matching Circuit Dialog for Creating Matching Circuit @@ -14495,22 +14589,22 @@ Dialog for Creating Matching Circuit Karşılaştırma Devresi Oluşturma İletişim Penceresi - + Attenuator synthesis Zayıflatıcı olusturma - + Ctrl+6 Ctrl+6 - + Starts QucsAttenuator QucsAttenuator'ı baslatır - + Attenuator synthesis Starts attenuator calculation program @@ -14519,18 +14613,18 @@ Starts attenuator calculation program Zayıflatıcı olusturma yazılımını baslatır - - + + Simulate Benzetimi Başlat - + Simulates the current schematic Geçerli tasarıyı benzetime tabi tutar - + Simulate Simulates the current schematic @@ -14539,12 +14633,12 @@ Simulates the current schematic Geçerli tasarıyı benzetime tabi tutar - + View Data Display/Schematic Veri Göstergesi/Tasarı Görüntüle - + Changes to data display or schematic page Veri göstergesi veya tasarı sayfasına yapılan değişiklikler @@ -14557,17 +14651,17 @@ Geçerli tasarıyı benzetime tabi tutar - + Calculate DC bias DC kutuplama hesapla - + Calculates DC bias and shows it DC kutuplanma durumunu hesaplar ve gösterir - + Calculate DC bias Calculates DC bias and shows it @@ -14576,29 +14670,28 @@ Calculates DC bias and shows it DC kutuplanma durumunu hesaplar ve gösterir - - - + + + Save netlist Netlisti kaydet - Save netlist to file - Netlisti dosyaya kaydet + Netlisti dosyaya kaydet - + Set Marker on Graph Grafik Üzerine İşaretçi Koy - + Sets a marker on a diagram's graph Çizgenin grafiği üzerine bir işaretçi koyar - + Set Marker Sets a marker on a diagram's graph @@ -14607,17 +14700,17 @@ Sets a marker on a diagram's graph Çizgenin grafiği üzerine işaretçi koyar - + Show Last Messages Son îletileri Göster - + Shows last simulation messages Son benzetim iletilerini gösterir - + Show Last Messages Shows the messages of the last simulation @@ -14626,17 +14719,17 @@ Shows the messages of the last simulation Son benzetimden olan iletileri gösterir - + Show Last Netlist Son Bağlantı Dizelgesini Göster - + Shows last simulation netlist Son benzetim bağlantı dizelgesini gösterir - + Show Last Netlist Shows the netlist of the last simulation @@ -14645,7 +14738,7 @@ Shows the netlist of the last simulation Son benzetimde hazırlanan son bağlantı dizelgesini gösterir - + Build Verilog-A module from subcircuit Alt devreden Verilog-A modülü oluşturma @@ -14682,17 +14775,17 @@ Enables/disables the statusbar Durumçubuğunu Etkinleştirir/kapatır - + &Dock Window &Gözlem Penceresi - + Enables/disables the browse dock window Gözlem Penceresini açar/kapar - + Browse Window Enables/disables the browse dock window @@ -14701,17 +14794,17 @@ Enables/disables the browse dock window Gözlem Penceresini açar/kapar - + &Octave Window &Oktav Penceresi - + Shows/hides the Octave dock window Octave dock penceresini gösterir/gizler - + Octave Window Shows/hides the Octave dock window @@ -14720,17 +14813,17 @@ Shows/hides the Octave dock window Octave dock penceresini gösterir/gizler - + Help Index... Yardım - İçindekiler... - + Index of Qucs Help İçindekiler - Qucs Yardım - + Help Index Index of intern Qucs help @@ -14739,17 +14832,17 @@ Index of intern Qucs help Qucs uygulamasındaki gömülü yardım hizmetinin içindekiler bölümü - + Getting Started... Başlarken... - + Getting Started with Qucs Qucs İle Başlarken - + Getting Started Short introduction into Qucs @@ -14762,12 +14855,12 @@ Qucs hakkında kısa tanıtım &Qucs Hakkında... - + About the application Uygulama hakkında - + About About the application @@ -14780,12 +14873,12 @@ Uygulama hakkında Qt Hakkında... - + About Qt Qt Hakkında - + About Qt About Qt by Trolltech @@ -14794,76 +14887,76 @@ About Qt by Trolltech Trolltech tarafından Qt hakkında - + &File &Dosya - + Open Recent Açık Güncel - + &Edit &Düzen - + P&ositioning &Hizalama - + &Insert &Ekle - + &Project &Tasarım - + &Tools &Araçlar - + Compact modelling Kompakt modelleme - + &Simulation &Benzetim - + &View &Görünüm - + &Help &Yardım - + &Technical Papers &Teknik Makaleler - - - + + + Open Açık - - - + + + Open @@ -14872,43 +14965,43 @@ Open Açık - + Technical &Reports Teknik &Raporlar - + T&utorials T&eğitimler - + File Dosya - + Edit Düzenle - + View Görünüm - + Work İş - - + + no warnings uyarı yok - + Warnings in last simulation! Press F5 Son benzetimdeki uyarılar ! için F5'e basınız @@ -14916,82 +15009,82 @@ Açık QucsAttenuator - - + + &File &Dosya - - + + &Quit &Çıkış - - - - + + + + &Help &Yardım - - + + &About &Hakkında - - + + About Qt... Qt Hakkında... - - + + Topology Topoloji - - + + Input Giris - - + + Attenuation: Zayıflama çarpanı: - - + + Pin: Pim: - - + + Freq: Frekans: - - + + Put into Clipboard Panoya yerleştir - - + + R4: R4: - - + + Copyright (C) 2024 by Telif Hakkı (C) 2024 tarafından @@ -15000,14 +15093,14 @@ Açık 1 - - + + dB dB - - + + Zin: Zin: @@ -15020,8 +15113,8 @@ Açık Ohm - - + + Zout: Zout: @@ -15030,46 +15123,46 @@ Açık Hesapla ve not tahtasına koy - - + + Output Çıkıs - - + + R1: R1: - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + -- -- - - + + R2: R2: - - + + R3: R3: @@ -15078,32 +15171,32 @@ Açık Sonuç: - - + + Qucs Attenuator Help Qucs Zayıflatıcı Yardım - - + + QucsAttenuator is an attenuator synthesis program. To create a attenuator, simply enter all the input parameters and press the calculation button. Immediately, the schematic of the attenuator is calculated and put into the clipboard. Now go to Qucs, open an schematic and press CTRL-V (paste from clipboard). The attenuator schematic can now be inserted. Have lots of fun! QucsAttenuator bir zayıflatıcı sentez programıdır. Bir zayıflatıcı oluşturmak için, tüm giriş parametrelerini girmeniz ve hesaplama düğmesine basmanız yeterlidir. Hemen, zayıflatıcının şeması hesaplanır ve panoya yerleştirilir. Şimdi Qucs'a gidin, bir şematik açın ve CTRL-V'ye (panodan yapıştır) basın. Zayıflatıcı şeması artık eklenebilir. İyi eğlenceler! - - + + About Qt Qt Hakkında - - + + About... Hakkında... - - + + Attenuator synthesis program @@ -15112,10 +15205,10 @@ Zayıflatıcı tasarım yazılımı - - - - + + + + Copyright (C) 2006 by Çoğaltma hakkı/Telif (Ç) 2006 @@ -15124,8 +15217,8 @@ Zayıflatıcı tasarım yazılımı Basarılı! - - + + Error: Set Attenuation less than %1 dB Hata: Zayıflamayı %1 dB'den daha az ayarlayın @@ -15216,155 +15309,155 @@ Qucs için çok basit bit metin düzenleyici QucsFilter - + &File &Dosya - + E&xit &Çıkış - + &Help &Yardım - + Help... Yardım... - + &About QucsFilter... &QucsFilter hakkında... - + About Qt... Qt Hakkında... - + Filter Filtre - + Realization: Gerçekleşme: - + Filter type: Süzgeç çeşidi: - + Filter class: Süzgeç sınıfı: - + Low pass Alçak geçiren - + High pass Yüksek geçiren - + Band pass Aralık geçiren - + Band stop Aralık bitimi - + Order: Mertebe: - - + + Corner frequency: Köşe sıklığı: - + Stop frequency: Bitiş sıklığı: - - + + Stop band frequency: Durdurma aralığı için sıklık: - - + + Pass band ripple: Geçen aralık dalgalılıgı: - + Stop band attenuation: Aralık sonu zayıflama miktarı: - + Impedance: Sanal Direnç: - + Microstrip Substrate Mikroşerit Substrat - + Relative permittivity: Bağıl geçirgenlik: - + Substrate height: Alt tabaka yüksekliği: - + metal thickness: metal kalınlığı: - + minimum width: minimum genişlik: - + maximum width: maksimum genişlik: - + Calculate and put into Clipboard Hesapla ve not tahtasına koy - + About... Hakkında... - + Filter synthesis program @@ -15373,66 +15466,66 @@ Süzgeç tasarım yazılımı - + Copyright (C) 2005, 2006 by Çoğaltma hakkı/Telif (Ç) 2005, 2006 - + About Qt Qt Hakkında - - - + + + Result: Sonuç: - - + + Error Hata - + Stop frequency must be greater than start frequency. Bitiş sıklığı başlangıç sıklığından büyük olmadı. - + Filter order must not be less than two. Süzgeç derecesi 2' den az olmamalı. - + Bessel filter order must not be greater than 19. Bessel süzgeç derecesi 19' dan büyük olmamalı. - - + + Successful Başarılı - + Result: -- Sonuç: -- - + Start frequency: Başlangıç sıklık (frekans) değeri: - + Pass band frequency: Geçecek olan aralığın sıklık değeri: - + Pass band attenuation: Geçecek olan aralığın zayıflama miktarı: @@ -15567,8 +15660,8 @@ Enables/disables the table of contents QucsLib Yardım - QucsLib is a program to manage Qucs component libraries. On the left side of the application window the available libraries can be browsed to find the wanted component. By clicking on the component name its description can be seen on the right side. The selected component is transported to the Qucs application by clicking on the button "Copy to Clipboard". Being back in the schematic window the component can be inserted by pressing CTRL-V (paste from clipboard). - QucsLib, Qucs bileşen kütüphanesi için bir düzenleyicidir. Uygulama penceresinin sol tarafında, istenen kütüphaneye gözatılabilir ve gerekli bileşen seçilebilir. Seçilen bileşenin özellikleri sağ tarafta görülebilir. Seçili bileşen Qucs uygulama ortamına "Not Tahtasına Çogalt" komutu ile alınabilir. Tasarı penceresine gelinerek CTRL-V (not tahtasından çogalt) ile kullanıma sokulabilir. + QucsLib is a program to manage Qucs component libraries. On the left side of the application window the available libraries can be browsed to find the wanted component. By clicking on the component name its description can be seen on the right side. The selected component is transported to the Qucs application by clicking on the button "Copy to Clipboard". Being back in the schematic window the component can be inserted by pressing CTRL-V (paste from clipboard). + QucsLib, Qucs bileşen kütüphanesi için bir düzenleyicidir. Uygulama penceresinin sol tarafında, istenen kütüphaneye gözatılabilir ve gerekli bileşen seçilebilir. Seçilen bileşenin özellikleri sağ tarafta görülebilir. Seçili bileşen Qucs uygulama ortamına "Not Tahtasına Çogalt" komutu ile alınabilir. Tasarı penceresine gelinerek CTRL-V (not tahtasından çogalt) ile kullanıma sokulabilir. A more comfortable way: The component can also be placed onto the schematic by using Drag n'Drop. @@ -15583,8 +15676,8 @@ Enables/disables the table of contents Hata - Cannot open "%1". - "%1" açılamıyor. + Cannot open "%1". + "%1" açılamıyor. Library is corrupt. @@ -15594,22 +15687,22 @@ Enables/disables the table of contents QucsPowerCombiningTool - + Ready! Use CTRL+V to paste the schematic Hazır! Şemayı yapıştırmak için CTRL+V tuşlarını kullanın - + Error! The network could not be generated Hata! Ağ oluşturulamadı - + Bagley Bagley - + Tree combiner Ağaç birleştirici @@ -15617,7 +15710,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties Qucs Özelliklerini Değiştir @@ -15626,415 +15719,435 @@ Enables/disables the table of contents Harf (tekrar yüklendikten sonra atanmak üzere): - + Large font size: Büyük yazı tipi boyutu: - + Document Background Color: Belge Ardalan Rengi: - + Language (set after reload): Dil (tekrar yüklemeden sonra etkinleşmek üzere): - + system language sistem dili - + English İngilizce - + German Almanca - + French Fransızca - + Spanish İspanyolca - + Italian İtalyanca - + Polish Polonyaca - + Romanian Rumence - + Japanese Japonca - + Swedish İsveççe - + Hungarian Macarca - + Hebrew İbranice - + Portuguese-BR Portekizce-BR - + Portuguese-PT Portekizce-PT - + Turkish Türkçe - + Ukrainian Ukraynaca - + Russian Rusça - + Czech Çekçe - + Catalan Katalan - + Arabic Arapça - + Chinese Çince - + Schematic font (set after reload): Şematik yazı tipi (yeniden yüklemeden sonra ayarlanır): - + Application font (set after reload): Uygulama yazı tipi (yeniden yüklemeden sonra ayarlanır): - + Kazakh Kazakça - + Maximum undo operations: Maksimum geri alma işlemi: - + Text editor: Metin düzenleyici: - + Set to qucs, qucsedit or the path to your favorite text editor. qucs, qucsedit veya favori metin düzenleyicinizin yolunu ayarlayın. - + Start wiring when clicking open node: Açık düğüme tıklandığında kablolamayı başlatın: - + Load documents from future versions: Gelecek sürümlerdeki belgeleri yükleyin: - + Try to load also documents created with newer versions of Qucs. Qucs'un daha yeni sürümleriyle oluşturulmuş belgeleri de yüklemeyi deneyin. - + Draw diagrams with anti-aliasing feature: Kenar yumuşatma özelliği ile diyagramlar çizin: - + Draw text with anti-aliasing feature: Kenar yumuşatma özelliği ile metin çizin: - + Use anti-aliasing for graphs for a smoother appearance. Daha pürüzsüz bir görünüm için grafiklerde kenar yumuşatma kullanın. - + Text document font (set after reload): Metin belgesi yazı tipi (yeniden yüklemeden sonra ayarlanır): - + Use anti-aliasing for text for a smoother appearance. Daha pürüzsüz bir görünüm için metin için kenar yumuşatma kullanın. - + Show trace name prefix on diagrams: Diyagramlarda iz adı önekini gösterin: - - Show prefixes for trace names on diagrams like "ngspice/" - Diyagramlardaki iz adları için "ngspice/" gibi önekleri gösterin + + Show prefixes for trace names on diagrams like "ngspice/" + Diyagramlardaki iz adları için "ngspice/" gibi önekleri gösterin - + Settings Ayarlar - + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + + + Colors for Syntax Highlighting: Metin Renklendirmesi için Renkler: - + Comment Yorum - + String Harf Katarı - + Integer Number Tam sayı - + Real Number Gerçel Sayı - + Character Harf - + Data Type Veri Çesidi - + Attribute Nitelik - + Directive Direktif - + Task Görev - + Source Code Editor Kaynak Kod Editörü - + Register filename extensions here in order to open files with an appropriate program. Dosya uzantılarını burada kaydedin ki uygun bir uygulama ile açılabilsinler. - + Suffix Ek - + Program Yazılım - + Suffix: Ek: - + Program: Yazılım: - + Set Ata - + Remove Kaldır - + File Types Dosya Çeşitleri - + Edit the standard paths and external applications Standart yolları ve harici uygulamaları düzenleme - + Qucs Home: Qucs Home: - + AdmsXml Path: AdmsXml Yolu: - + ASCO Path: ASCO Yolu: - + Octave Path: Octave Yolu: - + OpenVAF Path: OpenVAF Yolu: - + RF Layout Path: RF Yerleşim Yolu: - + Subcircuit Search Path List Alt Devre Arama Yolu Listesi - + Locations Konumlar - + OK Tamam - + Apply Uygula - + Cancel İptal - + Default Values Varsayılan Değerler - + Error Hata - + This suffix is already registered! Bu ek zaten kayıtlı! - + Select the home directory Ev dizinini seçin - + Select the admsXml bin directory admsXml bin dizinini seçin - + Select the ASCO bin directory ASCO bin dizinini seçin - + Select the octave executable Octave çalıştırılabilir dosyasını seçin - + Select the OpenVAF executable OpenVAF yürütülebilir dosyasını seçin - + Select the Qucs-RFLayout executable Qucs-RFLayout yürütülebilir dosyasını seçin - - + + Select a directory Bir dizin seçin @@ -16042,559 +16155,559 @@ uygun bir uygulama ile açılabilsinler. QucsTranscalc - + &File &Dosya - + &Load &Yükle - + Ctrl+L Ctrl+L - + &Save &Kaydet - + Ctrl+S Ctrl+S - + &Options &Seçenekler - + Ctrl+O Ctrl+O - + &Quit &Çıkış - + &Execute &Çalıştır - + &Copy to Clipboard &Not tahtasına çoğalt - + &Analyze &Ayrıştır - + &Synthesize &Olustur - - + + &Help &Yardım - + About Hakkında - + Transmission Line Type İletim Hat Çeşidi - + Microstrip Line Mikrostrip Tel - + Coplanar Waveguide Eş-yüzey Dalga-kılavuzu - + Grounded Coplanar Topraklanmış Eş-Yüzey - + Rectangular Waveguide Dikdörtgen Dalga Kılavuzu - + Coaxial Line Eşeksenli Hat - + Coupled Microstrip Çiftlenmiş Mikrostrip - + Stripline Stripline - + Substrate Parameters Alttabaka Değişkenleri - + Component Parameters Bileşen Değişkenleri - + Physical Parameters Fiziksel Değişkenler - + Analyze Ayrıştır - + Derive Electrical Parameters Elektriksel Değiskenleri Türet - + Synthesize Olustur - + Compute Physical Parameters Fiziksel Değişkenleri Hesapla - + Electrical Parameters Elektriksel Değişkenler - + Calculated Results Hesaplanmış Sonuçlar - - - - + + + + Ready. Hazır. - - - - + + + + ErEff ErEff - - - - - - + + + + + + Conductor Losses İletken Kayıpları - - - - - - + + + + + + Dielectric Losses Dielektrik Kayıpları - - - - - + + + + + Skin Depth Yüzey Derinliği - - + + TE-Modes TE-Modlar - - + + TM-Modes TM-Modlar - + ErEff Even ErEff Çift - + ErEff Odd EfEff Tek - + Conductor Losses Even İletken Kayıpları Çift - + Conductor Losses Odd İletken Kayıpları Tek - + Dielectric Losses Even Dielektrik Kayıpları Çift - + Dielectric Losses Odd Dielektrik Kayıpları Tek - - - - - - - + + + + + + + Relative Permittivity Göreceli Geçirgenlik - - - - - + + + + + Relative Permeability Göreceli Geçirgenlik - - - - + + + + Height of Substrate Alttabakanın Yüksekliği - - + + Height of Box Top Height of Box Top - - - - + + + + Strip Thickness Serit Kalınlığı - - - - + + + + Strip Conductivity Serit İletkenliği - - - - - - - + + + + + + + Dielectric Loss Tangent Dielectric Kayıp Tegeti - - + + Conductor Roughness İletken Kabalığı/Pürüzlülügü - - - - - - - + + + + + + + Frequency Sıklık (Frekans) - - - - + + + + Line Width Çizgi Genişliği - - - + + + Line Length Çizgi Uzunlu - - - - - - + + + + + + Characteristic Impedance Kendine Has Sanal Direnç - - - - - - - + + + + + + + Electrical Length Elektriksel Uzunluk - - - + + + Gap Width Aralık Genişliği - - - + + + Conductivity of Metal Metalin İletkenliği - + Magnetic Loss Tangent Magnetic Kayıp Tegeti - + Width of Waveguide Dalga Kılavuzunun Genişliği - + Height of Waveguide Dalga Kılavuzunun Yüksekliği - + Waveguide Length Dalga Kılavuzunun Uzunluğu - + Inner Diameter İç Yarıçap - + Outer Diameter Dış Yarıçap - - - + + + Length Uzunluk - + Even-Mode Impedance Çift-Durum Sanal Direnci - + Odd-Mode Impedance Tek-Durum Sanal Direnci - + Conductor thickness İletken kalınlığı - + Substrate height Alt tabaka yüksekliği - + Width Genişlik - + Selected for Calculation Hesaplama için Seçilmiş - + Check item for Calculation Kalemi hesaplama için işaretle - + About... Hakkında... - + Transmission Line Calculator for Qucs Qucs için iletim hattı hesaplayıcısı - + Copyright (C) 2001 by Gopal Narayanan Çoğaltma hakkı/Telif (K) 2001, Gopal Narayanan - + Copyright (C) 2002 by Claudio Girardi Çoğaltma hakkı/Telif (K) 2002, Claudio Girardi - + Copyright (C) 2005 by Stefan Jahn Çoğaltma hakkı/Telif (K) 2005, Stefan Jahn - + Copyright (C) 2008 by Michael Margraf Çoğaltma hakkı/Telif (Ç) 2008, Michael Margraf - - + + Values are consistent. Değerler tutarlı. - + Failed to converge! Yakınlaşamadı! - + Values are inconsistent. Değerler tutarlı değil. - + Loading file... Dosya Yükleniyor... - - + + Enter a Filename Dosya Adı Giriniz - - + + Transcalc File Transcalc dosyası - - + + Error Hata - + Cannot load file: Dosya yüklenemiyor: - + Loading aborted. Yükleme iptal edildi. - + Saving file... Dosya kaydediliyor... - + Cannot save file: Dosya kaydedilemiyor: - + Saving aborted. Kaydetme iptal edildi. - + Schematic copied into clipboard. Tasarı not tahtasına çoğaltıldı. - + Transmission line type not available. İletim hattı çeşidi kullanılabilir değil. @@ -16602,129 +16715,129 @@ uygun bir uygulama ile açılabilsinler. Qucs_S_SPAR_Viewer - + &File &Dosya - + &Quit &Çıkış - + &Open session file &Oturum dosyasını aç - + &Save session as ... &Oturumu farklı kaydet ... - + &Save session &Oturumu kaydet - - + + &Help &Yardım - + &About &Hakkında - + About Qt... Qt Hakkında... - + Qucs-S S-parameter Help Qucs-S S-parametre Yardımı - + This is a simple viewer for S-parameter data. It can show several .snp files at a time in the same diagram. Trace markers can also be added so that the user can read the trace value at at an specific frequency. Bu, S-parametre verileri için basit bir görüntüleyicidir. Aynı anda birkaç .snp dosyasını aynı diyagramda gösterebilir. İz işaretleyicileri de eklenebilir, böylece kullanıcı belirli bir frekanstaki iz değerini okuyabilir. - + About Qt Qt Hakkında - + About... Hakkında... - + Copyright (C) 2024 by Telif Hakkı (C) 2024 tarafından - + S-Parameter Files (*.s1p *.s2p *.s3p *.s4p);;All Files (*.*) S-Parametre Dosyaları (*.s1p *.s2p *.s3p *.s4p);;Tüm Dosyalar (*.*) - - - - + + + + Warning Uyarı - + This file is already in the dataset. Bu dosya zaten veri kümesinde bulunmaktadır. - + This trace is already shown Bu iz zaten gösterilmiştir - - + + The display contains no traces. Ekran hiçbir iz içermez. - - + + Error Hata - - + + Nothing to save: No data was loaded. Kaydedilecek bir şey yok: Hiçbir veri yüklenmedi. - + Save session Oturumu kaydet - - + + Qucs-S snp viewer session (*.spar); Qucs-S snp görüntüleyici oturumu (*.spar); - + Open S-parameter Viewer Session S-parametre Görüntüleyici Oturumunu Açın @@ -16732,37 +16845,37 @@ Telif Hakkı (C) 2024 tarafından SaveDialog - + Save the modified files Değiştirilmiş dosyaları kaydet - + Select files to be saved Kaydilecek kükleri seç - + Modified Files Değiştirilmiş Dosyalar - + Abort Closing Kapatmaktan Vazgeç - + Don't Save Kaydetme - + Save Selected Seçilileri Kaydet - + Untitled İisimsiz @@ -16770,37 +16883,37 @@ Telif Hakkı (C) 2024 tarafından Schematic - + Title Baslık - + Drawn By: Çizer: - + Date: Tarih: - + Revision: Düzeltme: - + Edit Schematic Şemayı Düzenle - + Edits the schematic Şemayı düzenler - + Edit Schematic Edits the schematic @@ -16809,17 +16922,17 @@ Edits the schematic Şemayı düzenler - + Edit Circuit Symbol Devre Sembolünü Düzenle - + Edits the symbol for this schematic Bu tasarının simgesini düzenler - + Edit Circuit Symbol Edits the symbol for this schematic @@ -16828,18 +16941,18 @@ Edits the symbol for this schematic Bu tasarının simgesini düzenler - + generic jenerik - - + + Error Hata - + Program admsXml not found: %1 Set the admsXml location on the application settings. @@ -16848,80 +16961,80 @@ Set the admsXml location on the application settings. Uygulama ayarlarında admsXml konumunu ayarlayın. - + Status Durum - + Netlist error Netlist hatası - + S2Spice warning S2Spice uyarısı - - ERROR: Cannot create library file "%s". - HATA: "%s" kütüphanesi oluşturulamıyor. + + ERROR: Cannot create library file "%s". + HATA: "%s" kütüphanesi oluşturulamıyor. SearchDialog - + Dialog Diyalog - + Text to search for Aranacak metin - + Text to replace with Yer degistirilecek metin - + Ask before replacing Yer degistirmeden önce sor - + Case sensitive Büyük/Küçük harfe hassas - + Whole words only Yalnızca tüm kelimeler - + Search backwards Geriye doğru ara - + Next Sonraki - + Close Kapat - + Replace Text Metnin Yerini Degistir - + Search Text Metin Ara @@ -16929,129 +17042,129 @@ Uygulama ayarlarında admsXml konumunu ayarlayın. SettingsDialog - + Edit File Properties Dosya Özelliklerini Düzenle - + Data Set: Veri Toplulugu: - - - + + + Browse Gözat - + Data Display: Veri Göstergesi: - + open data display after simulation benzetimden sonra veri göstericiyi aç - + Octave Script: Octave Script: - + run script after simulation simülasyondan sonra komut dosyasını çalıştır - + Simulation Benzetim - + show Grid Izgarayı göster - + horizontal Grid: yatay Izgara: - + vertical Grid: dikey Izgara: - + Grid Izgara - + no Frame Penceresiz - + DIN A5 landscape DIN A5 yatay - + DIN A5 portrait DIN A5 dikey - + DIN A4 landscape DIN A4 yatay - + DIN A4 portrait DIN A4 dikey - + DIN A3 landscape DIN A3 yatay - + DIN A3 portrait DIN A3 dikey - + Letter landscape Manzara mektubu - + Letter portrait Mektup portresi - + Frame Pencereli - + OK Tamam - + Apply Uygula - + Cancel İptal Et @@ -17059,159 +17172,159 @@ Uygulama ayarlarında admsXml konumunu ayarlayın. SimMessage - + Qucs Simulation Messages Qucs benzetim iletileri - - + + Progress: İlerleme: - + Errors and Warnings: Hatalar ve Uyarılar: - + Goto display page Gösterge sayfasına git - - + + Abort simulation Benzetimi İptal Et - + Starting new simulation on %1 at %2 %1 üzerinde %2 de yeni benzetim başlatılıyor - + creating netlist... bağlantı dizelgesi oluşturuluyor... - - + + Error Hata - - + + Cannot read netlist! Netlist okunamıyor! - + ERROR: Simulator is still running! HATA: Simülatör hala çalışıyor! - + ERROR: Cannot write netlist file! HATA: Netlist dosyası yazılamıyor! - + ERROR: Cannot simulate a text file! HATA: Bir metin dosyası simüle edilemiyor! - - ERROR: Cannot open SPICE file "%1". - HATA: SPICE dosyası "%1" açılamıyor. + + ERROR: Cannot open SPICE file "%1". + HATA: SPICE dosyası "%1" açılamıyor. - + SIM ERROR: Cannot start QucsConv! SIM HATASI: QucsConv başlatılamıyor! - - + + done. Bitti. - - - ERROR: Cannot create VHDL directory "%1"! - HATA: VHDL dizini "%1" oluşturulamıyor! + + + ERROR: Cannot create VHDL directory "%1"! + HATA: VHDL dizini "%1" oluşturulamıyor! - - ERROR: Cannot create "%1"! - HATA: "%1" oluşturulamıyor! + + ERROR: Cannot create "%1"! + HATA: "%1" oluşturulamıyor! - + ERROR: Cannot start HATA: Başlatılamıyor - + Starting Başlangıç - + ERROR: Simulator crashed! HATA: Simülatör çöktü! - + Please report this error to qucs-bugs@lists.sourceforge.net Lütfen bu hatayı qucs-bugs@lists.sourceforge.net adresine bildirin. - + Close window Pencereyi kapat - + Simulation ended on %1 at %2 %1 üzerindeki benzetim %2 de bitti - + Ready. Hazır. - + Errors occurred during simulation on %1 at %2 %1 üzerindeki %2 deki benzetim süresince hatalar oluştu - + Aborted. İptal edildi. - + Output: ------- Çıktı: ------- - + Errors and Warnings: -------------------- Hatalar ve Uyarılar: -------------------- - + Simulation aborted by the user! Simülasyon kullanıcı tarafından iptal edildi! @@ -17219,85 +17332,99 @@ Uygulama ayarlarında admsXml konumunu ayarlayın. SimSettingsDialog - + Ngspice executable location Ngspice çalıştırılabilir konumu - + Xyce executable location Xyce çalıştırılabilir konumu - + SpiceOpus executable location SpiceOpus çalıştırılabilir konumu - + Qucsator executable location Qucsator çalıştırılabilir konumu - Extra simulator parameters - Ekstra simülatör parametreleri + Ekstra simülatör parametreleri - + Apply changes Değişiklikleri uygula - + Cancel İptal - - - - + + + + Select ... Seçin ... - + Ngspice compatibility mode Ngspice uyumluluk modu - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings SPICE ayarları - + Qucsator settings Qucsator ayarları - + Setup simulators executable location Simülatörlerin çalıştırılabilir konumunu ayarlama - + Select Ngspice executable location Ngspice çalıştırılabilir konumunu seçin - + Select Xyce executable location Xyce çalıştırılabilir konumunu seçin - + Select SpiceOpus executable location SpiceOpus çalıştırılabilir konumunu seçin - + Select Qucsator executable location Qucsator çalıştırılabilir konumunu seçin @@ -17305,136 +17432,153 @@ Uygulama ayarlarında admsXml konumunu ayarlayın. SpiceDialog - + Edit SPICE Component Properties SPICE Bileşen Özelliklerini Düzenle - + Name: İsim: - + Browse Gözat - + File: Dosya: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + Göster + + + + SPICE parameters: + + + + show file name in schematic dosya ismini projede göster - + Edit Düzenle - + include SPICE simulations SPICE benzetimlerini kapsa - + preprocessor önişlemci - + SPICE net nodes: SPICE bağlantı düğümleri: - + Component ports: Bileşen Ayakları : - + Add >> Ekle >> - + << Remove << Çıkar - + OK Tamam - + Apply Uygula - + Cancel İptal Et - + Select a file Bir dosya seç - + SPICE netlist SPICE bağlantı dizelgesi - + All Files Tüm Dosyalar - - + + Info Bilgi - - Preprocessing SPICE file "%1". - "%1" SPICE dosyası işleniyor. + + Preprocessing SPICE file "%1". + "%1" SPICE dosyası işleniyor. - - - + + + Error Hata - - Cannot save preprocessed SPICE file "%1". - "%1" önişlenmiş SPICE dosyası kaydedilemiyor. + + Cannot save preprocessed SPICE file "%1". + "%1" önişlenmiş SPICE dosyası kaydedilemiyor. - - - Cannot execute "%1". - "%1" çalıştırılamıyor. + + + Cannot execute "%1". + "%1" çalıştırılamıyor. - + SPICE Preprocessor Error SPICE Önişlemci Hatası - - Converting SPICE file "%1". - "%1" SPICE dosyası çevriliyor. + + Converting SPICE file "%1". + "%1" SPICE dosyası çevriliyor. - + QucsConv Error QucsConv Hatası @@ -17442,146 +17586,160 @@ Uygulama ayarlarında admsXml konumunu ayarlayın. SpiceFile - - Converting SPICE file "%1". - "%1" SPICE dosyası çevriliyor. + + Converting SPICE file "%1". + "%1" SPICE dosyası çevriliyor. SpiceLibCompDialog - - + + Open Aç - + Automatic symbol Otomatik sembol - + Symbol from template Şablondan sembol - + Symbol from file Dosyadan sembol - - - + + + Show Göster - + OK Tamam - + Apply Uygula - + Cancel İptal - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model SPICE modeli - + Edit SPICE library device SPICE kütüphane cihazını düzenleme - + Failed open file: Dosya açılamadı: - + SPICE library parse error. No SUBCKT directive found in library SPICE kitaplığı ayrıştırma hatası. Kütüphanede SUBCKT yönergesi bulunamadı - + SPICE library parse error SPICE kütüphanesi ayrıştırma hatası - - - - - + + + + + Error Hata - + Failed to open file: - + - + No symbol loaded Sembol yüklenmemiş - + Failed to load symbol file! Sembol dosyası yüklenemedi! - + Open SPICE library SPICE kütüphanesini açın - + SPICE files (*.cir +.ckt *.sp *.lib) SPICE dosyaları (*.cir +.ckt *.sp *.lib) - + Open symbol file Sembol dosyasını aç - + Schematic symbol (*.sym) Şematik sembol (*.sym) - - + + + Warning Uyarı - + All pins must be assigned Tüm pinler atanmalıdır - + Set a valid symbol file name Geçerli bir sembol dosyası adı ayarlama - - + + There were library file parse error! Cannot apply changes. Kütüphane dosyası ayrıştırma hatası vardı! Değişiklikler uygulanamıyor. @@ -17589,12 +17747,12 @@ Kütüphanede SUBCKT yönergesi bulunamadı SweepDialog - + Bias Points Kutuplama Noktaları - + Close Kapat @@ -17602,18 +17760,18 @@ Kütüphanede SUBCKT yönergesi bulunamadı SymbolWidget - + Symbol: Simge: - - + + ! Drag n'Drop me ! !Beni Sürükle Ve Bırak! - + Warning: Symbol '%1' missing in Qucs Library. Drag and Drop may still work. Please contact the developers. @@ -17622,18 +17780,18 @@ Sürükle ve Bırak hala çalışabilir. Lütfen geliştiricilerle iletişime geçin. - - + + Error Hata - - Cannot open "%1". - "%1" açılamıyor. + + Cannot open "%1". + "%1" açılamıyor. - + Library is corrupt. Kütüphane bozuk. @@ -17641,27 +17799,27 @@ Lütfen geliştiricilerle iletişime geçin. TextBoxDialog - + Component: Bileşen: - + Apply Uygula - + Cancel İptal - + OK Tamam - + Editor Editör @@ -17669,17 +17827,17 @@ Lütfen geliştiricilerle iletişime geçin. TextDoc - + Edit Text Symbol Metin Sembolünü Düzenle - + Edits the symbol for this text document Bu metin belgesi için sembolü düzenler - + Edit Text Symbol Edits the symbol for this text document @@ -17688,17 +17846,17 @@ Edits the symbol for this text document Bu metin belgesi için sembolü düzenler - + VHDL entity VHDL varlığı - + Inserts skeleton of VHDL entity - Bir "VHDL varlığı" iskeleti koyar + Bir "VHDL varlığı" iskeleti koyar - + VHDL entity Inserts the skeleton of a VHDL entity @@ -17707,17 +17865,17 @@ Inserts the skeleton of a VHDL entity Bir VHDL varlığı iskeleti koyar - + Verilog module Verilog modülü - + Inserts skeleton of Verilog module Verilog modülünün iskeletini ekler - + Verilog module Inserts the skeleton of a Verilog module @@ -17726,17 +17884,17 @@ Inserts the skeleton of a Verilog module Bir Verilog modülünün iskeletini ekler - + Octave function Oktav fonksiyonu - + Inserts skeleton of Octave function Octave fonksiyonunun iskeletini ekler - + Octave function Inserts the skeleton of a Octave function @@ -17745,22 +17903,22 @@ Inserts the skeleton of a Octave function Bir Octave fonksiyonunun iskeletini ekler - + Find... Ara... - + Cannot find target: %1 Hedef bulunamıyor: %1 - + Replace... Yer degistir... - + Replace occurrence ? Oluşumu değiştirelim mi? @@ -17768,37 +17926,37 @@ Bir Octave fonksiyonunun iskeletini ekler TransferFuncDialog - + Define filter transfer function Filtre transfer fonksiyonunu tanımlayın - + Numerator b[i]= Numeratör b[i]= - + Denominator a[i]= Payda a[i]= - + a[i] a[i] - + b[i] b[i] - + Accept Kabul et - + Cancel İptal Et @@ -17806,12 +17964,12 @@ Bir Octave fonksiyonunun iskeletini ekler TunerDialog - + Add component Bileşen ekleme - + Adding components from different schematics is not supported! Farklı şemalardan bileşen ekleme desteklenmez! @@ -17819,92 +17977,92 @@ Bir Octave fonksiyonunun iskeletini ekler VASettingsDialog - + Document Settings Belge Ayarları - + Code Creation Settings Kod Oluşturma Ayarları - + Browse Gözat - + Output file: Çıktı dosyası: - + Recreate Yeniden Yarat - + Icon description: Simge açıklaması: - + Description: Açıklama: - + unspecified device belirtilmemiş cihaz - + NPN/PNP polarity NPN/PNP polaritesi - + NMOS/PMOS polarity NMOS/PMOS polaritesi - + analog only sadece analog - + digital only sadece dijital - + both her ikisi de - + Ok Tamam - + Cancel İptal Et - + PNG files PNG dosyaları - + Any file Herhangi bir dosya - + Enter an Icon File Name Bir Simge Dosyası Adı Girin @@ -17912,66 +18070,66 @@ Bir Octave fonksiyonunun iskeletini ekler fillFromSpiceDialog - + Insert .MODEL text here .MODEL metnini buraya ekleyin - + OK Tamam - + Cancel İptal - + Convert number notation Sayı gösterimini dönüştürme - + Import SPICE model SPICE modelini içe aktarma - + No .MODEL directive found .MODEL yönergesi bulunamadı - + Device type doesn't match the model type. Cihaz tipi model tipiyle eşleşmiyor. - + Model found: Model bulundu: - + Models expected: Modeller bekleniyor: - + SPICE model parse error SPICE modeli ayrıştırma hatası - + Subcircuit model (.SUBCKT) found Modelcard (.MODEL) expected Alt devre modeli (.SUBCKT) bulundu Modelcard (.MODEL) bekleniyor - + Model LEVEL=%1 is not allowed for unified MOS device Use red SPICE device from Microelectronics group Allowed LEVELS are: 1,2,3,4,5,6,9 @@ -17980,30 +18138,125 @@ Mikroelektronik grubundan kırmızı SPICE cihazı kullanın İzin verilen SEVİYELER şunlardır: 1,2,3,4,5,6,9 - + Error Hata + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: Maks.: - + Min.: Min.: - + Val.: Val.: - + Step Adım diff --git a/translations/qucs_uk.ts b/translations/qucs_uk.ts index 029978b06..acb4d69db 100644 --- a/translations/qucs_uk.ts +++ b/translations/qucs_uk.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate Моделювати @@ -546,195 +551,195 @@ ComponentDialog - + Edit Component Properties Зміна властивостей компоненту - + + Equation Editor + + + + + Put result in dataset + + + + Sweep Розгортка - - - - - - - - - display in schematic - показувати на схемі + показувати на схемі - Simulation: - Моделювання: + Моделювання: - Sweep Parameter: - Параметр розгортки: + Параметр розгортки: - Type: - Тип: + Тип: - linear - лінійний + лінійний - logarithmic - логарифмічний + логарифмічний - list - список + список - constant - константа + константа - Values: - Значення: + Значення: - Start: - Запустити: + Запустити: - Stop: - Спинити: + Спинити: - - - Step: - Крок: + Крок: - Number: - Кількість: + Кількість: - - + + Properties Властивості - Name: - Ім'я: + Ім'я: - + + Name Ім'я - - Value - Значення + + Simulation + Моделювання - display - показати + Sweep Parameter + - Description - Опис + Type + Тип - - Edit - Редагувати + + Values + - - Browse - Перегляд + + Start + - - Add - Додати + + Stop + - - Remove - Видалити + + Step + - - Move Up + + Number - - Move Down + + Populate parameters from SPICE file... - - Fill from SPICE .MODEL + + Value + Значення + + + + Show - + display + показати + + + + Description + Опис + + + Edit + Редагувати + + + Browse + Перегляд + + + Add + Додати + + + Remove + Видалити + + OK - Гаразд + Гаразд - Apply - Застосувати + Застосувати - Cancel - Скасувати + Скасувати - - - - - - - - - yes - так + так - - - - - no - ні + ні - + Select a file Вибрати файл @@ -769,66 +774,65 @@ Файли Verilog - Points per decade: - Кількість точок на декаду: + Кількість точок на декаду: CustomSimDialog - - + + Edit SPICE code - + Component: - + display in schematic - + Variables to plot (semicolon separated) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply Застосувати - + Cancel Скасувати - + OK Гаразд - + Find all variables - + Find all outputs - + SPICE code editor @@ -836,7 +840,7 @@ DiagramDialog - + Edit Diagram Properties Редагувати властивості діаграми @@ -1367,38 +1371,38 @@ Моделювати - + Stop - - + + Save netlist - + Exit - + Simulation console - + Simulate with external simulator - + There were simulation errors. Please check log. - + There were simulation warnings. Please check log. @@ -1408,12 +1412,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. - + started... @@ -1424,17 +1428,17 @@ - + Failed to start simulator! - + Simulator crashed! - + Simulator error! @@ -2182,12 +2186,12 @@ Node name will not be changed. - + Library Name: Ім'я бібліотеки: - + Choose subcircuits: Вибір підсхем: @@ -2197,7 +2201,12 @@ Node name will not be changed. - + + Analog models only + + + + Select All Виділити все @@ -2339,7 +2348,7 @@ Node name will not be changed. - + Creating Verilog netlist. @@ -2351,7 +2360,7 @@ Node name will not be changed. - + Error creating library. @@ -2916,7 +2925,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist @@ -3657,6 +3666,7 @@ but is %1 ! + delay time (SPICE only) @@ -3671,7 +3681,7 @@ but is %1 ! Джерело з АМ-модуляцією - + ideal ac current source ідеальний джерело змінного струму @@ -3680,14 +3690,19 @@ but is %1 ! peak current in Ampere пікова величина струму в амперах + + + offset current (SPICE only) + + - + damping factor (transient simulation only) коефіцієнт загасання (лише перехідного моделювання) - + ac Current Source джерело змінного струму @@ -3702,7 +3717,7 @@ but is %1 ! струм в амперах - + dc Current Source джерело постійного струму @@ -3981,7 +3996,7 @@ but is %1 ! - + transfer function scaling factor @@ -3998,7 +4013,7 @@ but is %1 ! - + npn transistor npn транзистор @@ -4561,20 +4576,20 @@ but is %1 ! напруга високого рівня - + - + - + - + @@ -4589,16 +4604,16 @@ but is %1 ! - - + + - + - + Error Помилка @@ -5151,7 +5166,7 @@ Wrong 'component' line format! площа за замовчуванням для діода - + Diode Діод @@ -6046,6 +6061,7 @@ Wrong 'component' line format! + put result into dataset помістити результат в набір даних @@ -6332,7 +6348,7 @@ Wrong 'component' line format! початковий струм для моделювання перехідних процесів - + Inductor Катушка індуктивності @@ -6423,7 +6439,7 @@ Wrong 'component' line format! початковий час затримки - + Rectangle Current Джерело струму прямокутної форми @@ -6524,7 +6540,7 @@ Wrong 'component' line format! площа за замовчуванням для польового транзистора із керуючим pn-переходом - + n-JFET n-JFET @@ -7184,7 +7200,7 @@ Wrong 'component' line format! МОП польовий транзистор - + n-MOSFET n-МОП @@ -7202,7 +7218,7 @@ Wrong 'component' line format! МОП польовий транзистор збідненого типу - + zero-bias threshold voltage гранична напруга при нульовому зміщенні @@ -7393,8 +7409,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8168,7 +8184,7 @@ Wrong 'component' line format! - + carrier signal frequency @@ -8383,7 +8399,7 @@ Wrong 'component' line format! - + Resistor Опір @@ -8523,8 +8539,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (доступна) AC потужність в ваттах + (доступна) AC потужність в ваттах @@ -8612,7 +8632,7 @@ Wrong 'component' line format! схемний файл SPICE - + SPICE netlist схема SPICE @@ -8627,7 +8647,7 @@ Wrong 'component' line format! Spice - + ERROR: No file name in SPICE component "%1". ПОМИЛКА: Немає імені файла в компоненті SPICE "%1". @@ -8648,7 +8668,7 @@ Wrong 'component' line format! ПОМИЛКА: Неможливо відкрити конвертований SPICE-файл "%1". - + Info Інформація @@ -8709,12 +8729,7 @@ Wrong 'component' line format! тип виводу (лише цифрового моделювання) - - Conjugated port for XSPICE differential ports - - - - + Subcircuit Port Вивід підсхеми @@ -8782,7 +8797,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9232,7 +9247,7 @@ Wrong 'component' line format! ідеальне джерело постійної напруги - + dc Voltage Source джерело напруги постійного струму @@ -9277,7 +9292,7 @@ Wrong 'component' line format! напруга під час імпульсу - + Voltage Pulse Джерело імпульсної напруги @@ -9297,7 +9312,7 @@ Wrong 'component' line format! - + Rectangle Voltage Джерело напруги прямокутної форми @@ -9391,7 +9406,7 @@ Wrong 'component' line format! Таблиця істинності - + ERROR: Cannot open file "%1". ПОМИЛКА: Неможливо відкритифайл "%1". @@ -9436,13 +9451,13 @@ Overwrite ? - + Successfully exported - + Disk write error! @@ -9461,7 +9476,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices @@ -9560,16 +9575,16 @@ Use PNG, JPEG or SVG graphics! - + - + diagrams - + paintings @@ -9581,7 +9596,7 @@ Use PNG, JPEG or SVG graphics! - + Edit Properties Змінити властивості @@ -9591,7 +9606,7 @@ Use PNG, JPEG or SVG graphics! - + power matching узгодження живлення @@ -9656,7 +9671,7 @@ Use PNG, JPEG or SVG graphics! Текст - + Rectangle Прямокутник @@ -9666,7 +9681,7 @@ Use PNG, JPEG or SVG graphics! заповнений прямокутник - + Edit Rectangle Properties Зміна властивостей прямокутника @@ -9685,15 +9700,15 @@ Use PNG, JPEG or SVG graphics! без назви - - + + Format Error: 'Painting' field is not closed! Помилка формату: Поле 'Painting' не закрито! - + Wrong document version: Неправильна версія документа: @@ -9711,7 +9726,7 @@ Unknown field! - + Cannot open Verilog-A file "%1"! @@ -9732,7 +9747,7 @@ Unknown field! - + Cannot save document! Неможливо зберегти документ! @@ -9745,7 +9760,7 @@ Wrong property field limiter! Невірний обмежувач властивості поля! - + Format Error: Unknown property: Помилка формату: @@ -9861,14 +9876,14 @@ Wrong 'painting' line format! - + File Format Error: Unknown field! Помилка формату файла: Невідоме поле! - + ERROR: Component "%1" has no analog model. ПОМИЛКА: У компонента "%1" немає аналогової моделі. @@ -9888,7 +9903,7 @@ Unknown field! ЗАУВАЖЕННЯ: Пропускається бібліотечний компонент "%1". - + ERROR: "%1": Cannot load library component "%2" from "%3" @@ -9898,12 +9913,12 @@ Unknown field! ПОПЕРЕДЖЕННЯ: Модельований компонент в підсхемі "%1" ігноруватимуть. - + WARNING: Equations in "%1" are 'time' typed. - + ERROR: Only one digital simulation allowed. ПОМИЛКА: Дозволяється лише одне цифрове моделювання. @@ -10127,7 +10142,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) @@ -10176,7 +10191,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) @@ -10186,8 +10201,8 @@ Leave continuation lines blank when NOT in use. - - + + voltage amplitude @@ -10598,12 +10613,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(SFFM): - + offset current @@ -10634,12 +10649,12 @@ Leave continuation lines blank when NOT in use. - + SPICE I(TRNOISE): - + I(TRNOISE) @@ -10651,17 +10666,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) @@ -10696,7 +10711,7 @@ seven line XSPICE specification. - + core @@ -10707,7 +10722,7 @@ Seven line XSPICE specification. - + XAPWL @@ -10719,7 +10734,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) @@ -10747,7 +10762,7 @@ Leave continuation lines blank when NOT in use. - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10783,7 +10798,7 @@ Leave continuation lines blank when NOT in use. - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11055,7 +11070,7 @@ Leave continuation lines blank when NOT in use. - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11082,7 +11097,7 @@ Leave continuation lines blank when NOT in use. - + Not Specified @@ -11322,7 +11337,23 @@ Leave continuation lines blank when NOT in use. Spiral inductor - + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + QucsActiveFilter @@ -11379,29 +11410,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) - + Stopband attenuation, As (dB) - + Cutoff frequency, Fc (Hz) - - + + Stopband frequency, Fs (Hz) - + Passband ripple Rp(dB) @@ -11476,7 +11507,7 @@ Enables/disables the filter calculation console - + Unable to implement filter with such parameters and topology @@ -11510,7 +11541,7 @@ Change parameters and/or topology and try again! Copyright (С) 2005, 2006 {2014, 2015 ?} - + Filter topology @@ -11546,12 +11577,12 @@ Change parameters and/or topology and try again! - + Cauer section - + Filter parameters @@ -11561,12 +11592,12 @@ Change parameters and/or topology and try again! - + Filter topology preview - + Filter calculation console @@ -11641,12 +11672,13 @@ Active Filter synthesis program QucsApp - + + Schematic Схема - + Data Display Вікно перегляду даних @@ -11657,42 +11689,42 @@ Active Filter synthesis program - + VHDL Sources Вихідні тексти VHDL - - + + Verilog Sources Вихідний код Verilog - - + + Verilog-A Sources - - + + Octave Scripts - + Spice Files - + Any File Будь-який файл - + The schematic search path has been refreshed. @@ -11707,7 +11739,7 @@ Active Filter synthesis program VHDL - + Open file @@ -11717,7 +11749,7 @@ Active Filter synthesis program - + Open example… @@ -11732,14 +11764,14 @@ Active Filter synthesis program - - - + + + Simulate schematic - + DC bias simulation mode is not supported for digital schematic! @@ -11749,23 +11781,23 @@ Active Filter synthesis program Схеми - + New Створити - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11778,7 +11810,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs @@ -11788,7 +11820,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock @@ -11823,13 +11855,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo вміст поточного проекту - + Search Components - + Clear @@ -11860,8 +11892,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + + @@ -11872,12 +11905,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11885,7 +11918,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11903,43 +11936,43 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Помилка - + Cannot open "%1". Неможливо відкрити файл "%1". - + Library is corrupt. Бібліотечний файл пошкоджений. - + - - - + + + - + Info Інформація - + Default icon not found: %1.png - + -port -виводи @@ -11950,14 +11983,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! У документі є незбережені зміни! - + Do you want to save the changes before copying? @@ -11997,17 +12030,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Неможливо видалити відкритий файл! - - + + - - + + Warning Попередження - + This will delete the file permanently! Continue ? Це безповоротно видалить файл! Продовжити ? @@ -12070,12 +12103,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Cannot create work directory ! Неможливо створити робочу теку ! - + Cannot create project directory ! Неможливо створити теку проекту ! @@ -12103,41 +12136,41 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - - + + - + Search results - + Search Lib Components - + Set simulator - + Ngspice found at: - + Show model - + verilog-a user devices - + Cannot copy file to identical name: %1 @@ -12216,34 +12249,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Створення нової схеми... - - + + - + - + - + Ready. Готово. - + Creating new text editor... Створення нового текстового редактора... - + Opening file... Відкриття файлу... @@ -12265,12 +12298,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted Збереження перервано - + Qucs Netlist @@ -12285,12 +12318,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + + Subcircuit symbol - + Enter a Document Name Введіть ім'я документа @@ -12350,7 +12384,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo &Закрити без збереження - + untitled без назви @@ -12390,22 +12424,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! - + Simulation of text document is not possible! - + This action is supported only for SPICE simulators! - + + + Save CDL netlist failed! + + + + Save Verilog-A module @@ -12429,7 +12469,7 @@ Use subcircuit to crete Verilog-A module! Справді хочете вийти з програми? - + The document was modified by another program ! Документ змінено іншою програмою! @@ -12529,7 +12569,14 @@ Use subcircuit to crete Verilog-A module! - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12609,7 +12656,7 @@ Overwrite ? Неможливо записати файл "%1" ! - + Please open project with subcircuits! Відкрийте проект з підсхемами! @@ -12676,7 +12723,7 @@ Have you saved the Verilog-A symbols? - + &New &Створити @@ -13515,7 +13562,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qucs-S @@ -13557,7 +13635,7 @@ Install Content of a Package Встановити вміст архіву - + Convert data file @@ -13903,7 +13981,7 @@ Changes to data display or schematic page - + Set Diagram Limits @@ -13942,7 +14020,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... @@ -13959,7 +14037,7 @@ Rotates the selected component by 90° counter-clockwise Повертає виділений компонент на 90° проти годинникової стрілки - + Mirror about X Axis Віддзеркалити щодо осі X @@ -14372,12 +14450,12 @@ Starts attenuator calculation program - + Simulate Моделювати - + Simulates the current schematic Моделює поточну схему @@ -14430,17 +14508,12 @@ Calculates DC bias and shows it - + Save netlist - - Save netlist to file - - - - + Set Marker on Graph Встановити маркер з діаграми @@ -14459,7 +14532,7 @@ Sets a marker on a diagram's graph Встановлює маркер на графіці діаграми - + Show Last Messages Показати останні повідомлення @@ -14689,12 +14762,12 @@ About Qt by Trolltech &Моделювання - + &View &Вид - + &Help &Довідка @@ -14803,7 +14876,7 @@ Open - + Input Вхід @@ -15465,7 +15538,7 @@ Enables/disables the table of contents QucsSettingsDialog - + Edit Qucs Properties Редагувати налаштування Qucs @@ -15474,7 +15547,7 @@ Enables/disables the table of contents Шрифт (набере чинності після перезавантаження): - + Large font size: @@ -15484,117 +15557,117 @@ Enables/disables the table of contents Колір фону документа: - + Language (set after reload): Мова (набере чинності після перезавантаження): - + system language системна мова - + English Англійський - + German Німецький - + French Французький - + Spanish Іспанський - + Italian Італійський - + Polish Польський - + Romanian Румунський - + Japanese Японський - + Swedish Шведський - + Hungarian Угорський - + Hebrew Єврит - + Portuguese-BR - + Portuguese-PT - + Turkish Турецький - + Ukrainian Український - + Russian Російський - + Czech Чеський - + Catalan Каталанский - + Arabic - + Chinese - + Schematic font (set after reload): @@ -15604,12 +15677,12 @@ Enables/disables the table of contents - + Kazakh - + Maximum undo operations: @@ -15639,7 +15712,7 @@ Enables/disables the table of contents - + Draw diagrams with anti-aliasing feature: @@ -15654,17 +15727,17 @@ Enables/disables the table of contents - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. - + Show trace name prefix on diagrams: @@ -15678,6 +15751,26 @@ Enables/disables the table of contents Settings Налаштування + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15840,7 +15933,7 @@ open files with an appropriate program. Значення за замовчуванням - + Error Помилка @@ -15850,7 +15943,7 @@ open files with an appropriate program. Це розширення вже зареєстровано! - + Select the home directory @@ -16449,7 +16542,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File &Файл @@ -16474,7 +16567,7 @@ open files with an appropriate program. - + &Help &Довідка @@ -16490,7 +16583,7 @@ open files with an appropriate program. Про програму Qt... - + Qucs-S S-parameter Help @@ -16523,24 +16616,24 @@ Copyright (C) 2024 by - - + + Warning Попередження - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16564,7 +16657,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16615,7 +16708,7 @@ Copyright (C) 2024 by Schematic - + Title Назва @@ -16635,7 +16728,7 @@ Copyright (C) 2024 by Версія: - + Edit Schematic @@ -16671,12 +16764,12 @@ Edits the symbol for this schematic Правка позначення для цієї схеми - + generic - + Error Помилка @@ -16694,7 +16787,7 @@ Set the admsXml location on the application settings. - + Netlist error @@ -16937,7 +17030,7 @@ Set the admsXml location on the application settings. створення схеми... - + Error Помилка @@ -16949,7 +17042,7 @@ Set the admsXml location on the application settings. - + ERROR: Simulator is still running! @@ -16975,13 +17068,13 @@ Set the admsXml location on the application settings. - + done. - + ERROR: Cannot create VHDL directory "%1"! @@ -16992,7 +17085,7 @@ Set the admsXml location on the application settings. - + ERROR: Cannot start @@ -17058,12 +17151,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location - + Xyce executable location @@ -17078,40 +17171,50 @@ Set the admsXml location on the application settings. - - Extra simulator parameters - - - - + Apply changes - + Cancel Скасувати - - - - + + + + Select ... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings - + Qucsator settings @@ -17121,7 +17224,7 @@ Set the admsXml location on the application settings. - + Select Ngspice executable location @@ -17131,7 +17234,7 @@ Set the admsXml location on the application settings. - + Select SpiceOpus executable location @@ -17164,7 +17267,24 @@ Set the admsXml location on the application settings. Файл: - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic показати ім'я файла у схемі @@ -17219,7 +17339,7 @@ Set the admsXml location on the application settings. Скасувати - + Select a file Вибір файла @@ -17289,50 +17409,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open Відкрити - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK Гаразд - + Apply Застосувати - + Cancel Скасувати - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17360,24 +17493,24 @@ No SUBCKT directive found in library - + Error Помилка - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17402,7 +17535,8 @@ No SUBCKT directive found in library - + + Warning Попередження @@ -17636,7 +17770,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component @@ -17811,10 +17945,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Помилка + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: diff --git a/translations/qucs_zh_CN.ts b/translations/qucs_zh_CN.ts index d5076e9fe..67612e604 100644 --- a/translations/qucs_zh_CN.ts +++ b/translations/qucs_zh_CN.ts @@ -4,7 +4,7 @@ AboutDialog - + About Qucs @@ -26,7 +26,7 @@ - + project maintainer, simulator interface and GUI design @@ -61,7 +61,7 @@ - + testing, general bugfixes @@ -101,18 +101,23 @@ - - + + RF design tools - + Schematic rendering engine, refactoring + Documentation + + + + Refactoring, general improvements @@ -336,7 +341,7 @@ AbstractSpiceKernel - + Simulate 仿真 @@ -546,195 +551,203 @@ ComponentDialog - + Edit Component Properties 编辑元件属性 - + + Equation Editor + + + + + Put result in dataset + + + + Sweep 扫描 - - - - - - - - - display in schematic - 在原理图中显示 + 在原理图中显示 - Simulation: - 仿真 + 仿真 - Sweep Parameter: - 参数扫描 + 参数扫描 - Type: - 类型 + 类型 - linear - 线型 + 线型 - logarithmic - 指数型 + 指数型 - list - 列表 + 列表 - constant - 常数 + 常数 - Values: - 值 + 值 - Start: - 开始值 + 开始值 - Stop: - 结束值 + 结束值 - - - Step: - 步进值 + 步进值 - Number: - 点数 + 点数 - - + + Properties 属性 - Name: - 名称： + 名称： - + + Name 名称 + + + Simulation + 仿真 + + Sweep Parameter + + + + + Type + 类型 + + + + Values + + + + + Start + + + + + Stop + 停止 + + + + Step + Step + + + + Number + + + + + Populate parameters from SPICE file... + + + + Value 值 - + + Show + + + display - 显示 + 显示 - + Description 描述 - Edit - 编辑 + 编辑 - Browse - 浏览 + 浏览 - Add - 添加 + 添加 - Remove - 删除 + 删除 - Move Up - 上移 + 上移 - Move Down - 下移 - - - - Fill from SPICE .MODEL - + 下移 - OK - 确定 + 确定 - Apply - 应用 + 应用 - Cancel - 取消 + 取消 - - - - - - - - - yes - 是 + 是 - - - - - no - 否 + 否 - + Select a file 选择文件 @@ -769,31 +782,30 @@ Verilog文件 - Points per decade: - 每十倍频程的点数： + 每十倍频程的点数： CustomSimDialog - - + + Edit SPICE code 编辑SPICE代码 - + Component: 元件： - + display in schematic 在原理图中显示 - + Variables to plot (semicolon separated) 要绘制的变量(以分号作为分隔符) @@ -802,37 +814,37 @@ 额外输出(分号分隔;raw-SPICE或XYCE-STD格式) - + Extra outputs (semicolon separated; raw-SPICE or XYCE-STD or scalars print format) - + Apply 应用 - + Cancel 取消 - + OK 确定 - + Find all variables 查找所有变量 - + Find all outputs 查找所有输出 - + SPICE code editor SPICE代码编辑器 @@ -840,7 +852,7 @@ DiagramDialog - + Edit Diagram Properties 编辑图表属性 @@ -1367,38 +1379,38 @@ ExternSimDialog - + Stop 停止 - - + + Save netlist 保存网表 - + Exit 退出 - + Simulation console 在控制台中仿真 - + Simulate with external simulator 使用外部仿真器仿真 - + There were simulation errors. Please check log. 仿真出错，请检查日志 - + There were simulation warnings. Please check log. @@ -1408,12 +1420,12 @@ - + Simulation successful. Now place diagram on schematic to plot the result. 仿真成功，请将图表放在原理图上以绘制结果 - + started... 启动... @@ -1425,17 +1437,17 @@ 仿真开始于： - + Failed to start simulator! 无法启动仿真器！ - + Simulator crashed! 仿真器崩溃！ - + Simulator error! 仿真器错误！ @@ -2257,12 +2269,12 @@ Node name will not be changed. - + Library Name: 元件库名 - + Choose subcircuits: 选择子电路 @@ -2272,7 +2284,12 @@ Node name will not be changed. 添加子电路描述 - + + Analog models only + + + + Select All 全选 @@ -2418,7 +2435,7 @@ Node name will not be changed. - + Creating Verilog netlist. 创建Verilog网表. @@ -2432,7 +2449,7 @@ Node name will not be changed. - + Error creating library. 创建库时遇到了错误 @@ -2934,7 +2951,7 @@ but is %1 ! Ngspice - + Problem with SaveNetlist 保存网表时出现了位图 @@ -3671,6 +3688,7 @@ but is %1 ! + delay time (SPICE only) @@ -3685,7 +3703,7 @@ but is %1 ! AM调置源 - + ideal ac current source 理想交流电流源 @@ -3694,14 +3712,19 @@ but is %1 ! peak current in Ampere 峰值电流(A) + + + offset current (SPICE only) + + - + damping factor (transient simulation only) 阻尼系数(仅限瞬态模拟) - + ac Current Source 交流电流源 @@ -3716,7 +3739,7 @@ but is %1 ! 电流(A) - + dc Current Source 直流电流源 @@ -3995,7 +4018,7 @@ but is %1 ! - + transfer function scaling factor 传递函数比例因子 @@ -4012,7 +4035,7 @@ but is %1 ! - + npn transistor npn三极管 @@ -4575,20 +4598,20 @@ but is %1 ! 高电平电压 - + - + - + - + @@ -4603,16 +4626,16 @@ but is %1 ! - - + + - + - + Error 错误 @@ -5167,7 +5190,7 @@ Wrong 'component' line format! 二极管的默认面积 - + Diode 二极管 @@ -6062,6 +6085,7 @@ Wrong 'component' line format! + put result into dataset 将结果放入数据集 @@ -6352,7 +6376,7 @@ Wrong 'component' line format! 瞬态仿真的初始电流 - + Inductor 电感 @@ -6443,7 +6467,7 @@ Wrong 'component' line format! 初始延迟时间 - + Rectangle Current 矩形电流 @@ -6544,7 +6568,7 @@ Wrong 'component' line format! JFET的默认面积 - + n-JFET n-JFET @@ -7200,7 +7224,7 @@ Wrong 'component' line format! MOS场效应晶体管 - + n-MOSFET n-MOSFET @@ -7218,7 +7242,7 @@ Wrong 'component' line format! 耗尽型MOSFET - + zero-bias threshold voltage 零偏置阈值电压 @@ -7409,8 +7433,8 @@ Wrong 'component' line format! - - + + Use global SPICE temperature @@ -8184,7 +8208,7 @@ Wrong 'component' line format! - + carrier signal frequency 载波频率 @@ -8399,7 +8423,7 @@ Wrong 'component' line format! - + Resistor 电阻 @@ -8539,8 +8563,12 @@ Wrong 'component' line format! + (available) ac power in dBm + + + (available) ac power in Watts - (可用)交流功率(W) + (可用)交流功率(W) @@ -8628,7 +8656,7 @@ Wrong 'component' line format! SPICE网表文件 - + SPICE netlist SPICE网表 @@ -8643,7 +8671,7 @@ Wrong 'component' line format! spice - + ERROR: No file name in SPICE component "%1". 错误：SPICE元件中没有文件名"%1" @@ -8664,7 +8692,7 @@ Wrong 'component' line format! 错误：无法转换SPICE文件"%1" - + Info 信息 @@ -8725,12 +8753,11 @@ Wrong 'component' line format! 端口类型(仅用于数字模拟) - Conjugated port for XSPICE differential ports - XSPICE差分端口的关联端口 + XSPICE差分端口的关联端口 - + Subcircuit Port 子电路端口 @@ -8798,7 +8825,7 @@ Wrong 'component' line format! - + simulation temperature in degree Celsius (Qucsator only) @@ -9252,7 +9279,7 @@ Wrong 'component' line format! 理想直流电压源 - + dc Voltage Source 直流电压源 @@ -9297,7 +9324,7 @@ Wrong 'component' line format! 脉冲的电压 - + Voltage Pulse 电压脉冲 @@ -9317,7 +9344,7 @@ Wrong 'component' line format! 低信号电压(仅限SPICE) - + Rectangle Voltage 方波电压 @@ -9411,7 +9438,7 @@ Wrong 'component' line format! 真值表 - + ERROR: Cannot open file "%1". 错误：无法打开文件"%1" @@ -9456,13 +9483,13 @@ Overwrite ? Inkscape启动错误！ - + Successfully exported Successfully exported - + Disk write error! 磁盘写入错误！ @@ -9482,7 +9509,7 @@ Use PNG, JPEG or SVG graphics! - + verilog-a user devices verilog-a用户元件 @@ -9585,16 +9612,16 @@ Use PNG, JPEG or SVG graphics! Qucslegacy设备 - + - + diagrams 图表 - + paintings @@ -9606,7 +9633,7 @@ Use PNG, JPEG or SVG graphics! 外部信号元件 - + Edit Properties 编辑属性 @@ -9616,7 +9643,7 @@ Use PNG, JPEG or SVG graphics! 导出为图像 - + power matching 功率匹配 @@ -9681,7 +9708,7 @@ Use PNG, JPEG or SVG graphics! 文本 - + Rectangle 矩形 @@ -9691,7 +9718,7 @@ Use PNG, JPEG or SVG graphics! 矩形(实心) - + Edit Rectangle Properties 编辑矩形属性 @@ -9706,15 +9733,15 @@ Use PNG, JPEG or SVG graphics! 无法创建输出文件！ - - + + Format Error: 'Painting' field is not closed! 格式错误： '绘画'字段没有关闭！ - + Wrong document version: 错误的文档版本： @@ -9732,7 +9759,7 @@ Unknown field! 无法保存C++文件"%1"！ - + Cannot open Verilog-A file "%1"! 无法打开Verilog-A文件"%1"！ @@ -9753,7 +9780,7 @@ Unknown field! 无法保存JSON符号文件"%1"！ - + Cannot save document! 无法保存文档！ @@ -9766,7 +9793,7 @@ Wrong property field limiter! 错误的属性字段限制！ - + Format Error: Unknown property: 格式错误： @@ -9883,14 +9910,14 @@ Wrong 'painting' line format! 尝试继续打开它吗？ - + File Format Error: Unknown field! 文件格式错误： 未知的字段！ - + ERROR: Component "%1" has no analog model. 错误：组件"%1"没有模拟模型 @@ -9910,7 +9937,7 @@ Unknown field! 警告：跳过库元件"%1" - + ERROR: "%1": Cannot load library component "%2" from "%3" 错误："%1"：无法从"%3"中加载库元件"%2" @@ -9920,12 +9947,12 @@ Unknown field! 警告：警告：忽略子电路中的仿真元件"%1" - + WARNING: Equations in "%1" are 'time' typed. 警告："%1"中的等式是'时间'类型的 - + ERROR: Only one digital simulation allowed. 错误：只允许进行一个数字仿真 @@ -10086,7 +10113,7 @@ a substrate with lower permittivity and larger height. - + Rms noise amplitude Gaussian) Rms 噪声幅度 Gaussian) @@ -10135,7 +10162,7 @@ Leave continuation lines blank when NOT in use. - + V(PWL) V(PWL) @@ -10145,8 +10172,8 @@ Leave continuation lines blank when NOT in use. SPICE V(AM)：仅ngspice可用 - - + + voltage amplitude 电压振幅 @@ -10563,12 +10590,12 @@ Leave continuation lines blank when NOT in use. Nutmeg脚本 - + SPICE I(SFFM): SPICE I(SFFM)： - + offset current 偏移电流 @@ -10599,12 +10626,12 @@ Leave continuation lines blank when NOT in use. 包含脚本 - + SPICE I(TRNOISE): SPICE I(TRNOISE)： - + I(TRNOISE) I(TRNOISE) @@ -10616,17 +10643,17 @@ Leave continuation lines blank when NOT in use. - + I(PWL) I(PWL) - + SPICE I(AM): ngspice only. - + I(AM) I(AM) @@ -10661,7 +10688,7 @@ seven line XSPICE specification. - + core 核心 @@ -10672,7 +10699,7 @@ Seven line XSPICE specification. - + XAPWL XAPWL @@ -10684,7 +10711,7 @@ Leave continuation lines blank when NOT in use. - + U(URC) U(URC) @@ -10712,7 +10739,7 @@ Leave continuation lines blank when NOT in use. W(CSW) - + SPICE V: Multiple line ngspice or Xyce V specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -10748,7 +10775,7 @@ Leave continuation lines blank when NOT in use. B 源 (I) - + SPICE I: Multiple line ngspice or Xyce I specifications allowed using "+" continuation lines. Leave continuation lines blank when NOT in use. @@ -11020,7 +11047,7 @@ Leave continuation lines blank when NOT in use. Q(PNP) 5 pin - + The schematic name and dataset/display file name is not matching! This may happen if schematic was copied using the file manager instead of using File->SaveAs. Correct dataset and display names automatically? @@ -11049,7 +11076,7 @@ Leave continuation lines blank when NOT in use. 打开文档 - + Not Specified 未指定 @@ -11289,8 +11316,24 @@ Leave continuation lines blank when NOT in use. Spiral inductor - - + + + .CSPARAM section + + + + + + .CSPARAM + + + + + .CSPARAM Section + + + + QucsActiveFilter @@ -11348,29 +11391,29 @@ Enables/disables the filter calculation console - + Passband attenuation, Ap (dB) 通带衰减, Ap (dB) - + Stopband attenuation, As (dB) 阻带衰减, As (dB) - + Cutoff frequency, Fc (Hz) 截止频率, Fc (Hz) - - + + Stopband frequency, Fs (Hz) 阻带频率, Fs (Hz) - + Passband ripple Rp(dB) 通带纹波, Rp (dB) @@ -11445,7 +11488,7 @@ Enables/disables the filter calculation console 一般滤波器的幅频响应 - + Unable to implement filter with such parameters and topology @@ -11480,7 +11523,7 @@ Change parameters and/or topology and try again! Copyright (C) 2014, 2015 by - + Filter topology 滤波器拓扑 @@ -11516,12 +11559,12 @@ Change parameters and/or topology and try again! - + Cauer section Cauer section - + Filter parameters 滤波器参数 @@ -11531,12 +11574,12 @@ Change parameters and/or topology and try again! 传递函数和拓扑 - + Filter topology preview 滤波器拓扑预览 - + Filter calculation console 滤波器计算控制台 @@ -11617,12 +11660,13 @@ Active Filter synthesis program QucsApp - + + Schematic 原理图 - + Data Display 数据显示器 @@ -11633,42 +11677,42 @@ Active Filter synthesis program - + VHDL Sources VHDL源代码 - - + + Verilog Sources Verilog源代码 - - + + Verilog-A Sources Verilog-A源代码 - - + + Octave Scripts Octave脚本 - + Spice Files SPICE文件 - + Any File 任何文件 - + The schematic search path has been refreshed. 原理图搜索路径已刷新 @@ -11683,7 +11727,7 @@ Active Filter synthesis program VHDL - + Open file 打开文件 @@ -11693,14 +11737,14 @@ Active Filter synthesis program 文档以只读模式打开！仿真器将无法工作。请将文档复制到您有写入权限的目录！ - - - + + + Simulate schematic 仿真原理图 - + DC bias simulation mode is not supported for digital schematic! 数字原理图不支持直流偏置仿真模式！ @@ -11710,23 +11754,23 @@ Active Filter synthesis program 原理图 - + New 新建 - + Symbol only - - + + QucsatorRF found at: - + You can specify another location later using Simulation->Simulators Setings @@ -11739,7 +11783,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Qucs Qucs @@ -11749,7 +11793,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Main Dock 主窗口 @@ -11784,13 +11828,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 当前项目内容 - + Search Components 搜索元件 - + Clear 清除 @@ -11821,8 +11865,9 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo Octave窗口 - - + + + @@ -11833,12 +11878,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + - + @@ -11846,7 +11891,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + @@ -11864,44 +11909,44 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 错误 - + Cannot open "%1". 无法打开"%1" - + Library is corrupt. 库已损坏 - + - - - + + + - + Info 信息 - + Default icon not found: %1.png 默认图标未找到： %1.png - + -port -端口 @@ -11912,14 +11957,14 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + The document contains unsaved changes! 文档包含未保存的更改！ - + Do you want to save the changes before copying? 是否要在复制之前保存更改？ @@ -11959,17 +12004,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 无法删除一个打开的文件！ - - + + - - + + Warning 警告 - + This will delete the file permanently! Continue ? 这将永久删除该文件！继续吗？ @@ -12028,12 +12073,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 配置 - + Cannot create work directory ! 无法创建工作目录！ - + Cannot create project directory ! 无法创建项目目录！ @@ -12053,26 +12098,26 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 无法删除文件：%1 - - + + - + Search results 搜索结果 - + Search Lib Components 搜索库元件 - + Set simulator 设置仿真器 - + Ngspice found at: 找到Ngspice位于： @@ -12085,17 +12130,17 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 未找到Ngspice。请在指定仿真器的位置 - + Show model 显示模型 - + verilog-a user devices verilog-a用户设备 - + Cannot copy file to identical name: %1 无法将文件复制到相同的名称：%1 @@ -12170,34 +12215,34 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 创建新的原理图... - - + + - + - + - + Ready. 准备 - + Creating new text editor... 创建新的文本编辑器... - + Opening file... 打开文件... @@ -12219,12 +12264,12 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Saving aborted 中止保存 - + Qucs Netlist Qucs网表 @@ -12239,12 +12284,13 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 纯文本 - + + Subcircuit symbol - + Enter a Document Name 输入文件名 @@ -12304,7 +12350,7 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo 打开示例目录... - + untitled untitled @@ -12344,22 +12390,28 @@ NOTE: Only QucsatorRF found. This simulator is not recommended for general purpo - + Schematic not saved! Simulation of unsaved schematic not possible. Save schematic first! 原理图未保存！无法仿真未保存的原理图。请先保存原理图！ - + Simulation of text document is not possible! 无法仿真文本文档！ - + This action is supported only for SPICE simulators! 此操作仅支持SPICE仿真器！ - + + + Save CDL netlist failed! + + + + Save Verilog-A module 保存Verilog-A模块 @@ -12376,12 +12428,12 @@ Use subcircuit to crete Verilog-A module! 使用子电路来构建Verilog-A模块！ - + The document was modified by another program ! 该文档被另一个程序修改了！ - + Open example… @@ -12396,7 +12448,7 @@ Use subcircuit to crete Verilog-A module! - + Do you want to reload or keep this version ? 重新加载还是保留此版本？ @@ -12485,7 +12537,14 @@ Use subcircuit to crete Verilog-A module! 不是原理图的选项卡！ - + + Executable %1 not found! + +(%2) + + + + Cannot start %1 program! (%2) @@ -12567,7 +12626,7 @@ Overwrite ? 无法写入"%1"！ - + Please open project with subcircuits! 请打开带有子电路的项目！ @@ -12637,7 +12696,7 @@ Have you saved the Verilog-A symbols? OpenVAF窗口 - + &New 新建 @@ -13491,7 +13550,38 @@ Starts S-parameter viewer - + + + + + + Save CDL netlist + + + + + Show Grid (current document) + + + + + Alt+G + + + + + Show or hide the grid for the current document. + + + + + Show / Hide Grid + +Show or hide the grid for the current document. + + + + &About Qt @@ -13544,7 +13634,7 @@ Install Content of a Package Ctrl+Shift+I - + Convert data file 转换数据文件 @@ -13899,7 +13989,7 @@ Changes to data display or schematic page 切换数据显示器视图或原理图页面 - + Set Diagram Limits @@ -13938,7 +14028,7 @@ Resets the limits for all axis to auto. - + Simulators Settings... 仿真器设置... @@ -13947,7 +14037,7 @@ Resets the limits for all axis to auto. 关于Qucs-S... - + Mirror about X Axis 垂直翻转 @@ -14350,12 +14440,12 @@ Starts attenuator calculation program - + Simulate 仿真 - + Simulates the current schematic 仿真当前原理图 @@ -14400,17 +14490,16 @@ Calculates DC bias and shows it - + Save netlist 保存网表 - Save netlist to file - 保存网表到文件 + 保存网表到文件 - + Set Marker on Graph 在图表上设置标记 @@ -14429,7 +14518,7 @@ Sets a marker on a diagram's graph 在图表上设置标记 - + Show Last Messages 显示最后一次信息 @@ -14662,12 +14751,12 @@ About Qt by Trolltech 仿真 - + &View 视图 - + &Help 帮助 @@ -14778,7 +14867,7 @@ Open - + Input 输入 @@ -15232,12 +15321,12 @@ Filter synthesis program QucsSettingsDialog - + Edit Qucs Properties 编辑Qucs属性 - + Large font size: 大字体字号： @@ -15247,117 +15336,117 @@ Filter synthesis program 文档背景颜色： - + Language (set after reload): 语言(重启后生效)： - + system language 系统语言 - + English - + German - + French - + Spanish - + Italian - + Polish - + Romanian - + Japanese - + Swedish - + Hungarian - + Hebrew - + Portuguese-BR - + Portuguese-PT - + Turkish - + Ukrainian - + Russian - + Czech - + Catalan - + Arabic - + Chinese - + Schematic font (set after reload): 原理图字体(重启后生效)： @@ -15367,12 +15456,12 @@ Filter synthesis program 应用程序字体(重启后生效)： - + Kazakh - + Maximum undo operations: 最大撤消操作次数： @@ -15402,7 +15491,7 @@ Filter synthesis program 尝试加载使用较新版本的Qucs创建的文档 - + Draw diagrams with anti-aliasing feature: 绘制具有抗锯齿功能的图表： @@ -15417,17 +15506,17 @@ Filter synthesis program 对图形使用抗锯齿以获得更平滑的外观。 - + Text document font (set after reload): - + Use anti-aliasing for text for a smoother appearance. 对文本使用抗锯齿以获得更平滑的外观。 - + Show trace name prefix on diagrams: 在图表上显示跟踪名称前缀： @@ -15449,6 +15538,26 @@ Filter synthesis program Settings 设置 + + + Grid Color (set after reload): + + + + + Default graph line thickness: + + + + + App Style: + + + + + Appearance + + Colors for Syntax Highlighting: @@ -15612,7 +15721,7 @@ open files with an appropriate program. 默认值 - + Error 错误 @@ -15622,7 +15731,7 @@ open files with an appropriate program. 此后缀已经被注册！ - + Select the home directory 选择主目录 @@ -16221,7 +16330,7 @@ open files with an appropriate program. Qucs_S_SPAR_Viewer - + &File 文件 @@ -16246,7 +16355,7 @@ open files with an appropriate program. - + &Help 帮助 @@ -16262,7 +16371,7 @@ open files with an appropriate program. 关于Qt - + Qucs-S S-parameter Help @@ -16295,24 +16404,24 @@ Copyright (C) 2024 by - - + + Warning 警告 - + This file is already in the dataset. - + This trace is already shown - + The display contains no traces. @@ -16336,7 +16445,7 @@ Copyright (C) 2024 by - + Qucs-S snp viewer session (*.spar); @@ -16387,7 +16496,7 @@ Copyright (C) 2024 by Schematic - + Title 标题 @@ -16423,7 +16532,7 @@ Edits the text file 编辑文本文件 - + Edit Schematic 编辑原理图 @@ -16461,12 +16570,12 @@ Edits the symbol for this schematic 编辑此原理图的电路符号 - + generic 通用 - + Error 错误 @@ -16486,7 +16595,7 @@ Set the admsXml location on the application settings. 状态 - + Netlist error 网表错误 @@ -16729,7 +16838,7 @@ Set the admsXml location on the application settings. 创建网表... - + Error 错误 @@ -16741,7 +16850,7 @@ Set the admsXml location on the application settings. 无法读取网表 - + ERROR: Simulator is still running! 错误：仿真器仍在运行！ @@ -16767,14 +16876,14 @@ Set the admsXml location on the application settings. - + done. 结束 - + ERROR: Cannot create VHDL directory "%1"! 错误：无法创建 VHDL 目录"%1"！ @@ -16785,7 +16894,7 @@ Set the admsXml location on the application settings. 错误：无法创建"%1"！ - + ERROR: Cannot start 错误：无法启动 @@ -16852,12 +16961,12 @@ Set the admsXml location on the application settings. SimSettingsDialog - + Ngspice executable location Ngspice可执行文件位置 - + Xyce executable location Xyce可执行文件位置 @@ -16876,40 +16985,54 @@ Set the admsXml location on the application settings. 用于存储网表和模拟器输出的目录 - Extra simulator parameters - 额外的仿真器参数 + 额外的仿真器参数 - + Apply changes 应用变更 - + Cancel 取消 - - - - + + + + Select ... 选择... - + Ngspice compatibility mode - + + Ngspice CLI parameters + + + + + Xyce CLI parameters + + + + + SpiceOpus CLI parameters + + + + SPICE settings SPICE设置 - + Qucsator settings Qucsator设置 @@ -16919,7 +17042,7 @@ Set the admsXml location on the application settings. 设置仿真器可执行文件位置 - + Select Ngspice executable location 选择Ngspice可执行文件位置 @@ -16929,7 +17052,7 @@ Set the admsXml location on the application settings. 选择Xyce可执行文件位置 - + Select SpiceOpus executable location 选择SpiceOpus可执行文件位置 @@ -16966,7 +17089,24 @@ Set the admsXml location on the application settings. 文件： - + + Set SPICE parameters string as a plain text. +Example: +V0=1.0 I0=2.0 + + + + + Show + + + + + SPICE parameters: + + + + show file name in schematic 在原理图中显示文件名 @@ -17021,7 +17161,7 @@ Set the admsXml location on the application settings. 取消 - + Select a file 选择文件 @@ -17091,50 +17231,63 @@ Set the admsXml location on the application settings. SpiceLibCompDialog - - + + Open 打开 - + Automatic symbol - + Symbol from template - + Symbol from file - - - + + + Show - + OK 确定 - + Apply - + Cancel 取消 - + + No symbol files found at the following path: + + + + + + +Check you installation! + + + + + SPICE model @@ -17162,24 +17315,24 @@ No SUBCKT directive found in library - + Error 错误 - + Failed to open file: - + No symbol loaded - + Failed to load symbol file! @@ -17204,7 +17357,8 @@ No SUBCKT directive found in library - + + Warning 警告 @@ -17446,7 +17600,7 @@ Inserts the skeleton of a Octave function TunerDialog - + Add component 添加元件 @@ -17621,10 +17775,105 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 错误 + + main + + + display this help and exit + + + + + convert Qucs schematic into netlist + + + + + print Qucs schematic to file (eps needs inkscape) + + + + + set print page size (default A4) + + + + + set dpi value (default 96) + + + + + set color mode (default RGB) + + + + + set orientation (default portraid) + + + + + use file as input schematic + + + + + use file as output netlist + + + + + create Ngspice netlist + + + + + create CDL netlist + + + + + Xyce netlist + + + + + execute Ngspice/Xyce immediately + + + + + create component icons under ./bitmaps_generated + + + + + dump data for documentation: +* file with of categories: categories.txt +* one directory per category (e.g. ./lumped + components/) + - CSV file with component data + ([comp#]_data.csv) + - CSV file with component properties. + ([comp#]_props.csv) + + + + + list component entry formats for schematic and netlist + + + + + write netlist to console + + + tunerElement - + Max.: Max.: From 3a4056880a479573cd14d942b0bd13898f18e379 Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Thu, 20 Feb 2025 20:34:31 +0300 Subject: [PATCH 2/6] Update Russian translation Signed-off-by: Anton Midyukov --- translations/qucs_ru.ts | 126 ++++++++++++++++++++++------------------ 1 file changed, 71 insertions(+), 55 deletions(-) diff --git a/translations/qucs_ru.ts b/translations/qucs_ru.ts index 0fa6a6140..5e78805f0 100644 --- a/translations/qucs_ru.ts +++ b/translations/qucs_ru.ts @@ -63,7 +63,7 @@ Documentation - + Документация @@ -594,12 +594,12 @@ Equation Editor - + Редактор формул Put result in dataset - + Поместить результат в набор данных @@ -677,47 +677,47 @@ Simulation - Моделирование + Моделирование Sweep Parameter - + Параметр развертки Type - Тип + Тип Values - + Значение Start - + Запустить Stop - Остановить + Остановить Step - Шаг + Шаг Number - + Номер Populate parameters from SPICE file... - + Заполнить параметры из файла SPICE... @@ -727,7 +727,7 @@ Show - Показать + Показать display @@ -2407,7 +2407,7 @@ Node name will not be changed. Analog models only - + Аналоговое моделирование только @@ -3937,7 +3937,7 @@ Resistor color code computation program offset current (SPICE only) - + ток смещения (только SPICE) @@ -9006,7 +9006,7 @@ Wrong 'component' line format! (available) ac power in dBm - + (доступная) мощность переменного тока в дБм (available) ac power in Watts @@ -11911,18 +11911,18 @@ Leave continuation lines blank when NOT in use. .CSPARAM section - + Раздел .CSPARAM .CSPARAM - + .CSPARAM .CSPARAM Section - + Раздел .CSPARAM @@ -13062,7 +13062,7 @@ and simple press Apply button Save CDL netlist failed! - + Не удалось сохранить список соединений CDL! @@ -13196,7 +13196,9 @@ Use subcircuit to crete Verilog-A module! Executable %1 not found! (%2) - + Исполняемый файл %1 не найден! + +(%2) @@ -14214,29 +14216,31 @@ Starts S-parameter viewer Save CDL netlist - + Сохранить список соединений CDL Show Grid (current document) - + Показать сетку (текущий документ) Alt+G - + Alt+G Show or hide the grid for the current document. - + Показать или скрыть сетку для текущего документа. Show / Hide Grid Show or hide the grid for the current document. - + Показать/скрыть сетку + +Показать или скрыть сетку для текущего документа. @@ -16526,22 +16530,22 @@ Enables/disables the table of contents Grid Color (set after reload): - + Цвет сетки (устанавливается после перезагрузки): Default graph line thickness: - + Толщина линии графика по умолчанию: App Style: - + Стиль приложения: Appearance - + Внешний вид @@ -18015,17 +18019,17 @@ Set the admsXml location on the application settings. Ngspice CLI parameters - + Параметры CLI Ngspice Xyce CLI parameters - + Параметры CLI Xyce SpiceOpus CLI parameters - + Параметры CLI SpiceOpus @@ -18108,17 +18112,19 @@ Please restart Qucs to affect changes! Set SPICE parameters string as a plain text. Example: V0=1.0 I0=2.0 - + Установите строку параметров SPICE как обычный текст. +Пример: +V0=1.0 I0=2.0 Show - Показать + Показать SPICE parameters: - + Параметры SPICE: @@ -18292,14 +18298,17 @@ V0=1.0 I0=2.0 No symbol files found at the following path: - + По следующему пути не найдено ни одного файла символов: + Check you installation! - + +Проверьте установку! + @@ -18800,72 +18809,72 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 display this help and exit - + отобразить эту справку и выйти convert Qucs schematic into netlist - + преобразовать схему Qucs в список соединений print Qucs schematic to file (eps needs inkscape) - + распечатать схему Qucs в файл (для eps нужен inkscape) set print page size (default A4) - + установить размер страницы печати (по умолчанию A4) set dpi value (default 96) - + установить значение dpi (по умолчанию 96) set color mode (default RGB) - + установить цветовой режим (по умолчанию RGB) set orientation (default portraid) - + установить ориентацию (по умолчанию портретная) use file as input schematic - + использовать файл как входную схему use file as output netlist - + использовать файл как выходной список соединений create Ngspice netlist - + создать список соединений Ngspice create CDL netlist - + создать список соединений CDL Xyce netlist - + Список соединений Xyce execute Ngspice/Xyce immediately - + немедленно выполнить Ngspice/Xyce create component icons under ./bitmaps_generated - + создать значки компонентов в ./bitmaps_generated @@ -18877,17 +18886,24 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 ([comp#]_data.csv) - CSV file with component properties. ([comp#]_props.csv) - + дамп данных для документации: +* файл с категориями: categories.txt +* один каталог на категорию (например, ./lumped +components/) +- CSV-файл с данными компонентов +([comp#]_data.csv) +- CSV-файл со свойствами компонентов. +([comp#]_props.csv) list component entry formats for schematic and netlist - + форматы записи компонентов списка для схемы и списка соединений write netlist to console - + записать список соединений на консоль From e317aa50dccca351cf2965e6fa7a07572496012d Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Fri, 21 Feb 2025 09:08:15 +0300 Subject: [PATCH 3/6] Improvement of internationalization Signed-off-by: Anton Midyukov --- qucs/dialogs/qucssettingsdialog.cpp | 18 +++++++++--------- qucs/dialogs/tuner.cpp | 16 ++++++++-------- qucs/qucs_init.cpp | 6 +++--- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/qucs/dialogs/qucssettingsdialog.cpp b/qucs/dialogs/qucssettingsdialog.cpp index 416266170..24471c804 100644 --- a/qucs/dialogs/qucssettingsdialog.cpp +++ b/qucs/dialogs/qucssettingsdialog.cpp @@ -380,42 +380,42 @@ QucsSettingsDialog::QucsSettingsDialog(QucsApp *parent) locationsGrid->addWidget(new QLabel(tr("Qucs Home:"), locationsTab) ,1,0); homeEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(homeEdit,1,1); - QPushButton *HomeButt = new QPushButton("Browse"); + QPushButton *HomeButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(HomeButt, 1, 2); connect(HomeButt, SIGNAL(clicked()), SLOT(slotHomeDirBrowse())); locationsGrid->addWidget(new QLabel(tr("AdmsXml Path:"), locationsTab) ,2,0); admsXmlEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(admsXmlEdit,2,1); - QPushButton *AdmsXmlButt = new QPushButton("Browse"); + QPushButton *AdmsXmlButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(AdmsXmlButt, 2, 2); connect(AdmsXmlButt, SIGNAL(clicked()), SLOT(slotAdmsXmlDirBrowse())); locationsGrid->addWidget(new QLabel(tr("ASCO Path:"), locationsTab) ,3,0); ascoEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(ascoEdit,3,1); - QPushButton *ascoButt = new QPushButton("Browse"); + QPushButton *ascoButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(ascoButt, 3, 2); connect(ascoButt, SIGNAL(clicked()), SLOT(slotAscoDirBrowse())); locationsGrid->addWidget(new QLabel(tr("Octave Path:"), locationsTab) ,4,0); octaveEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(octaveEdit,4,1); - QPushButton *OctaveButt = new QPushButton("Browse"); + QPushButton *OctaveButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(OctaveButt, 4, 2); connect(OctaveButt, SIGNAL(clicked()), SLOT(slotOctaveDirBrowse())); locationsGrid->addWidget(new QLabel(tr("OpenVAF Path:"), locationsTab) ,5,0); OpenVAFEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(OpenVAFEdit,5,1); - QPushButton *OpenVAFButt = new QPushButton("Browse"); + QPushButton *OpenVAFButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(OpenVAFButt, 5, 2); connect(OpenVAFButt, SIGNAL(clicked()), SLOT(slotOpenVAFDirBrowse())); locationsGrid->addWidget(new QLabel(tr("RF Layout Path:"), locationsTab) ,6,0); RFLayoutEdit = new QLineEdit(locationsTab); locationsGrid->addWidget(RFLayoutEdit,6,1); - QPushButton *RFLButt = new QPushButton("Browse"); + QPushButton *RFLButt = new QPushButton(tr("Browse")); locationsGrid->addWidget(RFLButt, 6, 2); connect(RFLButt, SIGNAL(clicked()), SLOT(slotRFLayoutDirBrowse())); @@ -441,15 +441,15 @@ QucsSettingsDialog::QucsSettingsDialog(QucsApp *parent) connect(pathsTableWidget, SIGNAL(itemSelectionChanged()), SLOT(slotPathSelectionChanged())); locationsGrid->addWidget(pathsTableWidget,7,0,3,2); - QPushButton *AddPathButt = new QPushButton("Add Path"); + QPushButton *AddPathButt = new QPushButton(tr("Add Path")); locationsGrid->addWidget(AddPathButt, 7, 2); connect(AddPathButt, SIGNAL(clicked()), SLOT(slotAddPath())); - QPushButton *AddPathSubFolButt = new QPushButton("Add Path With SubFolders"); + QPushButton *AddPathSubFolButt = new QPushButton(tr("Add Path With SubFolders")); locationsGrid->addWidget(AddPathSubFolButt, 8, 2); connect(AddPathSubFolButt, SIGNAL(clicked()), SLOT(slotAddPathWithSubFolders())); - RemovePathButt = new QPushButton("Remove Path"); + RemovePathButt = new QPushButton(tr("Remove Path")); // disable button if no paths in the table are selected RemovePathButt->setEnabled(false); locationsGrid->addWidget(RemovePathButt , 9, 2); diff --git a/qucs/dialogs/tuner.cpp b/qucs/dialogs/tuner.cpp index b5118143d..9b9d5e154 100644 --- a/qucs/dialogs/tuner.cpp +++ b/qucs/dialogs/tuner.cpp @@ -450,7 +450,7 @@ void tunerElement::slotStepChanged() if (!ok) { - QMessageBox::warning(this, "ERROR", "Entered step is not correct", QMessageBox::Ok); + QMessageBox::warning(this, tr("ERROR"), tr("Entered step is not correct"), QMessageBox::Ok); //Restore previous step QString val = misc::num2str(stepValue); int index = 5;//By default, no scaling @@ -507,7 +507,7 @@ void tunerElement::slotValueChanged(bool simulate) ValueUnitsCombobox->blockSignals(true); if (!ok || (v < 0)) { - QMessageBox::warning(this, "ERROR", "Value not correct", QMessageBox::Ok); + QMessageBox::warning(this, tr("ERROR"), tr("Value not correct"), QMessageBox::Ok); //Restore values QString val = misc::num2str(numValue); int index = 5;//By default, no scaling @@ -663,8 +663,8 @@ TunerDialog::TunerDialog(QWidget *_w, QWidget *parent) : { setAttribute(Qt::WA_DeleteOnClose);//This attribute forces the widget to be destroyed after closing qDebug() << "Tuner::TunerDialog"; - this->setObjectName("Tuner"); - this->setWindowTitle("Tuner"); + this->setObjectName(tr("Tuner")); + this->setWindowTitle(tr("Tuner")); gbox = new QGridLayout(); this->setLayout(gbox); @@ -673,10 +673,10 @@ TunerDialog::TunerDialog(QWidget *_w, QWidget *parent) : QGridLayout * buttonsLayout = new QGridLayout(); ButtonsPanel->setLayout(buttonsLayout); - closeButton = new QPushButton("Close", this); - updateValues = new QPushButton("Update Values", this); + closeButton = new QPushButton(tr("Close"), this); + updateValues = new QPushButton(tr("Update Values"), this); updateValues->setEnabled(false);//It doesn't make sense to activate it at first... only when at least a tuning element is active... - resetValues = new QPushButton("Reset Values", this); + resetValues = new QPushButton(tr("Reset Values"), this); resetValues->setEnabled(false); //When pressing the Enter key at the Maxium lineedit focus is automatically set to the reset button leading to @@ -700,7 +700,7 @@ TunerDialog::TunerDialog(QWidget *_w, QWidget *parent) : progressBar->setVisible(false); gbox->addWidget(progressBar, 2, 0); - info->showMessage("Please select a component to tune"); + info->showMessage(tr("Please select a component to tune")); setMinimumWidth(300);//Otherwise, it won't fit the "help" text... valuesUpdated = false; connect(closeButton, SIGNAL(released()), this, SLOT(close())); diff --git a/qucs/qucs_init.cpp b/qucs/qucs_init.cpp index 161894dd3..59009b451 100644 --- a/qucs/qucs_init.cpp +++ b/qucs/qucs_init.cpp @@ -553,10 +553,10 @@ void QucsApp::initActions() simulate->setWhatsThis(tr("Simulate\n\nSimulates the current schematic")); connect(simulate, SIGNAL(triggered()), SLOT(slotSimulate())); - tune = new QAction(QIcon((":/bitmaps/svg/tune.svg")),"Tune", this); + tune = new QAction(QIcon((":/bitmaps/svg/tune.svg")),tr("Tune"), this); tune->setShortcut(Qt::Key_F3); - tune->setStatusTip("Tuner"); - tune->setWhatsThis("Allows to live tune variables and show the result in the dataview"); + tune->setStatusTip(tr("Tuner")); + tune->setWhatsThis(tr("Allows to live tune variables and show the result in the dataview")); tune->setCheckable(true); connect(tune, SIGNAL(toggled(bool)), SLOT(slotTune(bool))); From 0cabe22a1c2278169cca84d2ce0495bb91fe101c Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Fri, 21 Feb 2025 10:55:24 +0300 Subject: [PATCH 4/6] translations: Update source strings in TS files Signed-off-by: Anton Midyukov --- translations/qucs_ar.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_ca.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_cs.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_de.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_en.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_es.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_fr.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_he.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_hu.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_it.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_ja.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_kk.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_pl.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_pt_BR.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_pt_PT.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_ro.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_ru.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_sv.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_tr.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_uk.ts | 88 ++++++++++++++++++++++++++++++++++++-- translations/qucs_zh_CN.ts | 88 ++++++++++++++++++++++++++++++++++++-- 21 files changed, 1785 insertions(+), 63 deletions(-) diff --git a/translations/qucs_ar.ts b/translations/qucs_ar.ts index a562557dd..e7bd10618 100644 --- a/translations/qucs_ar.ts +++ b/translations/qucs_ar.ts @@ -13760,7 +13760,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16066,7 +16081,17 @@ open files with an appropriate program. + + + + + + Browse + تصفح + + + AdmsXml Path: @@ -16096,7 +16121,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17957,7 +17997,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + غلق + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18249,5 +18315,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_ca.ts b/translations/qucs_ca.ts index d65c89f5a..0aa686e87 100644 --- a/translations/qucs_ca.ts +++ b/translations/qucs_ca.ts @@ -13798,7 +13798,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16065,7 +16080,17 @@ abrir els fitxers amb el programa apropiado. + + + + + + Browse + Examinar + + + AdmsXml Path: @@ -16095,7 +16120,22 @@ abrir els fitxers amb el programa apropiado. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17960,7 +18000,33 @@ Insereix l'esquelet d'una funció dOctave TunerDialog - + + + Tuner + + + + + Close + Tancar + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18252,5 +18318,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_cs.ts b/translations/qucs_cs.ts index d662c34f0..41274c4cd 100644 --- a/translations/qucs_cs.ts +++ b/translations/qucs_cs.ts @@ -13546,7 +13546,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15858,7 +15873,17 @@ soubory automaticky otevírat s odpovídajícími programy. + + + + + + Browse + + + + AdmsXml Path: @@ -15888,7 +15913,22 @@ soubory automaticky otevírat s odpovídajícími programy. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17751,7 +17791,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18043,5 +18109,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_de.ts b/translations/qucs_de.ts index b6878bd16..5e16a66a9 100644 --- a/translations/qucs_de.ts +++ b/translations/qucs_de.ts @@ -13596,7 +13596,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15606,7 +15621,17 @@ open files with an appropriate program. + + + + + + Browse + Durchsuchen + + + AdmsXml Path: @@ -15636,7 +15661,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17489,7 +17529,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Schließen + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -17781,5 +17847,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_en.ts b/translations/qucs_en.ts index 818d7de11..da17b4c9d 100644 --- a/translations/qucs_en.ts +++ b/translations/qucs_en.ts @@ -12863,7 +12863,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -14732,7 +14747,17 @@ open files with an appropriate program. + + + + + + Browse + + + + AdmsXml Path: @@ -14762,7 +14787,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -16614,7 +16654,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -16906,5 +16972,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_es.ts b/translations/qucs_es.ts index 8af9fdd81..d33392a73 100644 --- a/translations/qucs_es.ts +++ b/translations/qucs_es.ts @@ -13571,7 +13571,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15887,7 +15902,17 @@ abrir los archivos con el programa apropiado. + + + + + + Browse + Examinar + + + AdmsXml Path: @@ -15917,7 +15942,22 @@ abrir los archivos con el programa apropiado. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17779,7 +17819,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Cerrar + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18071,5 +18137,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_fr.ts b/translations/qucs_fr.ts index 29b348a62..e1820e3c4 100644 --- a/translations/qucs_fr.ts +++ b/translations/qucs_fr.ts @@ -13566,7 +13566,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15879,7 +15894,17 @@ ouvrir ceux-ci avec le programme ad-hoc. + + + + + + Browse + Choisir + + + AdmsXml Path: @@ -15909,7 +15934,22 @@ ouvrir ceux-ci avec le programme ad-hoc. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17771,7 +17811,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Fermer + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18063,5 +18129,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_he.ts b/translations/qucs_he.ts index 1b1ad6b9a..61872cf1f 100644 --- a/translations/qucs_he.ts +++ b/translations/qucs_he.ts @@ -13159,7 +13159,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15132,7 +15147,17 @@ open files with an appropriate program. + + + + + + Browse + סייר + + + AdmsXml Path: @@ -15162,7 +15187,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17017,7 +17057,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -17309,5 +17375,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_hu.ts b/translations/qucs_hu.ts index e6b2904cd..33e6f13b8 100644 --- a/translations/qucs_hu.ts +++ b/translations/qucs_hu.ts @@ -13556,7 +13556,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15872,7 +15887,17 @@ a fájlt a megfelelő program nyissa meg. + + + + + + Browse + Kiválasztás + + + AdmsXml Path: @@ -15902,7 +15927,22 @@ a fájlt a megfelelő program nyissa meg. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17767,7 +17807,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Bezár + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18059,5 +18125,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_it.ts b/translations/qucs_it.ts index 25fe8a202..dcfac8831 100644 --- a/translations/qucs_it.ts +++ b/translations/qucs_it.ts @@ -13564,7 +13564,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15881,7 +15896,17 @@ fine di aprirli utilizzando il programma appropriato. + + + + + + Browse + Sfoglia + + + AdmsXml Path: @@ -15911,7 +15936,22 @@ fine di aprirli utilizzando il programma appropriato. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17774,7 +17814,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Chiudi + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18066,5 +18132,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_ja.ts b/translations/qucs_ja.ts index 0f0f5fcf5..a248997eb 100644 --- a/translations/qucs_ja.ts +++ b/translations/qucs_ja.ts @@ -13524,7 +13524,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15825,7 +15840,17 @@ open files with an appropriate program. + + + + + + Browse + 参照 + + + AdmsXml Path: @@ -15855,7 +15880,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17709,7 +17749,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + 閉じる + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18001,5 +18067,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_kk.ts b/translations/qucs_kk.ts index f6360c021..3c6f66833 100644 --- a/translations/qucs_kk.ts +++ b/translations/qucs_kk.ts @@ -13756,7 +13756,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16072,7 +16087,17 @@ open files with an appropriate program. + + + + + + Browse + Көріп шығу + + + AdmsXml Path: @@ -16102,7 +16127,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17958,7 +17998,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Жабу + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18250,5 +18316,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_pl.ts b/translations/qucs_pl.ts index 9930c4a31..f88fae057 100644 --- a/translations/qucs_pl.ts +++ b/translations/qucs_pl.ts @@ -13560,7 +13560,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15878,7 +15893,17 @@ otworzyć ten plik odpowiednim programem. + + + + + + Browse + Pokaż + + + AdmsXml Path: @@ -15908,7 +15933,22 @@ otworzyć ten plik odpowiednim programem. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17770,7 +17810,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Zamknij + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18062,5 +18128,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_pt_BR.ts b/translations/qucs_pt_BR.ts index 17a6cccb8..246349fea 100644 --- a/translations/qucs_pt_BR.ts +++ b/translations/qucs_pt_BR.ts @@ -13800,7 +13800,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16136,7 +16151,17 @@ open files with an appropriate program. Qucs Home: + + + + + + Browse + Procurar + + + AdmsXml Path: Caminho para AdmsXml: @@ -16166,7 +16191,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -18053,7 +18093,33 @@ Isere o esqueleto de uma função do Octave TunerDialog - + + + Tuner + + + + + Close + Fechar + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18345,5 +18411,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_pt_PT.ts b/translations/qucs_pt_PT.ts index a4176599d..73eabf100 100644 --- a/translations/qucs_pt_PT.ts +++ b/translations/qucs_pt_PT.ts @@ -13429,7 +13429,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15557,7 +15572,17 @@ open files with an appropriate program. Home do Qucs: + + + + + + Browse + Procurar + + + AdmsXml Path: Caminho do AdmsXml: @@ -15587,7 +15612,22 @@ open files with an appropriate program. Lista de caminhos para procurar subcircuitos - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations Locais @@ -17474,7 +17514,33 @@ Insere um esqueleto de função do Octave TunerDialog - + + + Tuner + + + + + Close + Fechar + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -17766,5 +17832,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_ro.ts b/translations/qucs_ro.ts index e44e31930..695f7949f 100644 --- a/translations/qucs_ro.ts +++ b/translations/qucs_ro.ts @@ -13102,7 +13102,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15066,7 +15081,17 @@ open files with an appropriate program. + + + + + + Browse + Căutare + + + AdmsXml Path: @@ -15096,7 +15121,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -16950,7 +16990,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -17242,5 +17308,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_ru.ts b/translations/qucs_ru.ts index 5e78805f0..754efa2ad 100644 --- a/translations/qucs_ru.ts +++ b/translations/qucs_ru.ts @@ -14210,7 +14210,22 @@ Starts S-parameter viewer Запускает просмотрщик S-параметров - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16654,7 +16669,17 @@ open files with an appropriate program. Начало Qucs: + + + + + + Browse + Просмотр + + + AdmsXml Path: Путь AdmsXml: @@ -16684,7 +16709,22 @@ open files with an appropriate program. Список путей поиска подсхемы - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations Пути к внешним приложениям @@ -18625,7 +18665,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Закрыть + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component Добавить компонент @@ -18928,6 +18994,22 @@ components/) Step Шаг + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_sv.ts b/translations/qucs_sv.ts index 0dfade1f8..8ce390096 100644 --- a/translations/qucs_sv.ts +++ b/translations/qucs_sv.ts @@ -13386,7 +13386,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15565,7 +15580,17 @@ open files with an appropriate program. + + + + + + Browse + Bläddra + + + AdmsXml Path: @@ -15595,7 +15620,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17453,7 +17493,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Stäng + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -17745,5 +17811,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_tr.ts b/translations/qucs_tr.ts index ce3d1bd94..9ffb24501 100644 --- a/translations/qucs_tr.ts +++ b/translations/qucs_tr.ts @@ -13706,7 +13706,22 @@ Starts S-parameter viewer S-parametre görüntüleyiciyi başlatır - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -16051,7 +16066,17 @@ uygun bir uygulama ile açılabilsinler. Qucs Home: + + + + + + Browse + Gözat + + + AdmsXml Path: AdmsXml Yolu: @@ -16081,7 +16106,22 @@ uygun bir uygulama ile açılabilsinler. Alt Devre Arama Yolu Listesi - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations Konumlar @@ -17964,7 +18004,33 @@ Bir Octave fonksiyonunun iskeletini ekler TunerDialog - + + + Tuner + + + + + Close + Kapat + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component Bileşen ekleme @@ -18260,5 +18326,21 @@ Mikroelektronik grubundan kırmızı SPICE cihazı kullanın Step Adım + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_uk.ts b/translations/qucs_uk.ts index acb4d69db..66ed58847 100644 --- a/translations/qucs_uk.ts +++ b/translations/qucs_uk.ts @@ -13562,7 +13562,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15878,7 +15893,17 @@ open files with an appropriate program. + + + + + + Browse + Перегляд + + + AdmsXml Path: @@ -15908,7 +15933,22 @@ open files with an appropriate program. - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations @@ -17770,7 +17810,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + Закрити + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component @@ -18062,5 +18128,21 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + diff --git a/translations/qucs_zh_CN.ts b/translations/qucs_zh_CN.ts index 67612e604..fb8be0c9b 100644 --- a/translations/qucs_zh_CN.ts +++ b/translations/qucs_zh_CN.ts @@ -13550,7 +13550,22 @@ Starts S-parameter viewer - + + Tune + + + + + Tuner + + + + + Allows to live tune variables and show the result in the dataview + + + + @@ -15666,7 +15681,17 @@ open files with an appropriate program. Qucs Home： + + + + + + Browse + 浏览 + + + AdmsXml Path: AdmsXml路径： @@ -15696,7 +15721,22 @@ open files with an appropriate program. 子电路搜索路径列表 - + + Add Path + + + + + Add Path With SubFolders + + + + + Remove Path + + + + Locations 位置 @@ -17600,7 +17640,33 @@ Inserts the skeleton of a Octave function TunerDialog - + + + Tuner + + + + + Close + 关闭 + + + + Update Values + + + + + Reset Values + + + + + Please select a component to tune + + + + Add component 添加元件 @@ -17892,6 +17958,22 @@ Allowed LEVELS are: 1,2,3,4,5,6,9 Step Step + + + + ERROR + + + + + Entered step is not correct + + + + + Value not correct + + From 702e5dac0dd49e4eefdeb65d606aab47d1d91d73 Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Fri, 21 Feb 2025 11:02:09 +0300 Subject: [PATCH 5/6] Update Russian translation Signed-off-by: Anton Midyukov --- translations/qucs_ru.ts | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/translations/qucs_ru.ts b/translations/qucs_ru.ts index 754efa2ad..018776537 100644 --- a/translations/qucs_ru.ts +++ b/translations/qucs_ru.ts @@ -14212,17 +14212,17 @@ Starts S-parameter viewer Tune - + Тюнинг Tuner - + Тюнинг Allows to live tune variables and show the result in the dataview - + Позволяет настраивать переменные в реальном времени и отображать результат в представлении данных @@ -16676,7 +16676,7 @@ open files with an appropriate program. Browse - Просмотр + Просмотр @@ -16711,17 +16711,17 @@ open files with an appropriate program. Add Path - + Добавить путь Add Path With SubFolders - + Добавить путь с подпапками Remove Path - + Удалить путь @@ -18668,27 +18668,27 @@ Inserts the skeleton of a Octave function Tuner - + Тюнер Close - Закрыть + Закрыть Update Values - + Обновить значения Reset Values - + Сбросить значения Please select a component to tune - + Пожалуйста, выберите компонент для тюнинга @@ -18998,17 +18998,17 @@ components/) ERROR - + ОШИБКА Entered step is not correct - + Введенный шаг некорректен Value not correct - + Значение некорректно From c377135f7fc450b4a74b76a20cad18b1874213e0 Mon Sep 17 00:00:00 2001 From: Anton Midyukov Date: Fri, 21 Feb 2025 11:13:23 +0300 Subject: [PATCH 6/6] translations/qucs_ru.ts: shorten the inscription so it fits --- translations/qucs_ru.ts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/translations/qucs_ru.ts b/translations/qucs_ru.ts index 018776537..300703cf8 100644 --- a/translations/qucs_ru.ts +++ b/translations/qucs_ru.ts @@ -18688,7 +18688,7 @@ Inserts the skeleton of a Octave function Please select a component to tune - Пожалуйста, выберите компонент для тюнинга + Выберите компонент для тюнинга