-
Notifications
You must be signed in to change notification settings - Fork 4
/
Copy pathAddMulSgn.sv
81 lines (72 loc) · 2.42 KB
/
AddMulSgn.sv
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
////////////////////////////////////////////////////////////////////////////////
// Title : Signed adder-multiplier
// Project : VHDL Library of Arithmetic Units
////////////////////////////////////////////////////////////////////////////////
// File : AddMulSgn.sv
// Author : Reto Zimmermann <zimmi@iis.ee.ethz.ch>
// Company : Integrated Systems Laboratory, ETH Zurich
// Date : 1997/11/19
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1998 Integrated Systems Laboratory, ETH Zurich
////////////////////////////////////////////////////////////////////////////////
// Description :
// Adder-multiplier for signed numbers (Brown). First adds two numbers, then
// multiplies the result with the multiplicand. Can be used for multiplication
// with an input operand in carry-save number format. Result is only valid if
// sum does not overflow.
// P = (XS+XC)*Y
////////////////////////////////////////////////////////////////////////////////
module AddMulSgn #(
parameter int widthX = 8, // word width of XS, XC (<= widthY)
parameter int widthY = 8, // word width of Y
parameter lau_pkg::speed_e speed = lau_pkg::FAST // performance parameter
) (
input logic [widthX-1:0] XS, // multipliers
input logic [widthX-1:0] XC,
input logic [widthY-1:0] Y, // multiplicand
output logic [widthX+widthY-1:0] P // product
);
logic [(widthX+1)*(widthX+widthY)-1:0] PP; // partial products
logic [widthX+widthY-1:0] ST, CT; // intermediate sum/carry bits
// generation of partial products
AddMulPPGenSgn #(
.widthX(widthX),
.widthY(widthY)
) ppGen (
.XS(XS),
.XC(XC),
.Y (Y),
.PP(PP)
);
// carry-save addition of partial products
AddMopCsv #(
.width(widthX + widthY),
.depth(widthX + 1),
.speed(speed)
) csvAdd (
.A(PP),
.S(ST),
.C(CT)
);
// final carry-propagate addition
Add #(
.width(widthX + widthY),
.speed(speed)
) cpAdd (
.A(ST),
.B(CT),
.S(P)
);
endmodule
module behavioural_AddMulSgn #(
parameter int widthX = 8, // word width of XS, XC (<= widthY)
parameter int widthY = 8, // word width of Y
parameter lau_pkg::speed_e speed = lau_pkg::FAST // performance parameter
) (
input logic signed [widthX-1:0] XS, // multipliers
input logic signed [widthX-1:0] XC,
input logic signed [widthY-1:0] Y, // multiplicand
output logic signed [widthX+widthY-1:0] P // product
);
assign P = (XS + XC) * Y;
endmodule