From 5bbef0bd862e8a8f553fff97216965149472684d Mon Sep 17 00:00:00 2001 From: srningap Date: Sat, 16 Sep 2023 01:39:28 +0530 Subject: [PATCH] Added time unit and fix for soc ble range issue --- src/platform/silabs/rs911x/rsi_ble_config.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/platform/silabs/rs911x/rsi_ble_config.h b/src/platform/silabs/rs911x/rsi_ble_config.h index bb75266c14b712..0e11a76065a2be 100644 --- a/src/platform/silabs/rs911x/rsi_ble_config.h +++ b/src/platform/silabs/rs911x/rsi_ble_config.h @@ -65,7 +65,7 @@ #define DELETE_DEVICE_FROM_ACCEPTLIST (0x02) #define RSI_BLE_TX_OCTETS 251 -#define RSI_BLE_TX_TIME 2120 +#define RSI_BLE_TX_TIME 2120 // microseconds #define RSI_BLE_CS_DATA_LENGTH 240 #define ALL_PHYS (0x00) @@ -271,7 +271,7 @@ #define RSI_CUSTOM_FEATURE_BIT_MAP SL_SI91X_FEAT_CUSTOM_FEAT_EXTENTION_VALID //! To set custom feature select bit map #ifdef CHIP_9117 #define RSI_EXT_CUSTOM_FEATURE_BIT_MAP \ - (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(1) | RAM_LEVEL_NWP_BASIC_MCU_ADV | FRONT_END_SWITCH_SEL2) + (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(1) | RAM_LEVEL_NWP_BASIC_MCU_ADV | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0) #else #define RSI_EXT_CUSTOM_FEATURE_BIT_MAP (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(2)) #endif