From 08562cdcb45a20ab1538a806868ce0cc6102fd35 Mon Sep 17 00:00:00 2001 From: zhergarvi Date: Thu, 17 Oct 2024 15:07:43 +0500 Subject: [PATCH 1/2] added setup_lec_sim in axi_lite_ip_litex --- .../axi_lite_ip_litex/raptor_run.sh | 5 +++++ .../axi_lite_ip_litex/rtl/sim.v | 10 +++++----- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/raptor_run.sh b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/raptor_run.sh index e520bcf5d..ba0880603 100755 --- a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/raptor_run.sh +++ b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/raptor_run.sh @@ -259,6 +259,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim 10 2">>raptor_tcl.tcl + echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl @@ -272,6 +275,8 @@ parse_cga exit 1; } fi fi + [ -f rtl/sim.v ] && sed -i -e "s|MEM_FILE_PATH|$PWD/rtl|g" rtl/sim.v + cd results_dir echo "Device: $device">>results.log echo "Strategy: $strategy">>results.log diff --git a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/rtl/sim.v b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/rtl/sim.v index c08da5351..c4bc4f18d 100644 --- a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/rtl/sim.v +++ b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_lite_ip_litex/rtl/sim.v @@ -2816,7 +2816,7 @@ end // Port 0 | Read: Sync | Write: ---- | reg [31:0] mem[0:5393]; initial begin - $readmemh("mem.init", mem); + $readmemh("MEM_FILE_PATH/mem.init", mem); end reg [31:0] mem_dat0; always @(posedge sys_clk_1) begin @@ -2831,7 +2831,7 @@ assign main_simsoc_dat_r = mem_dat0; // Port 0 | Read: Sync | Write: Sync | Mode: Write-First | Write-Granularity: 8 reg [31:0] mem_1[0:874]; initial begin - $readmemh("mem_1.init", mem_1); + $readmemh("MEM_FILE_PATH/mem_1.init", mem_1); end reg [9:0] mem_1_adr0; always @(posedge sys_clk_1) begin @@ -2854,7 +2854,7 @@ assign main_ram_dat_r = mem_1[mem_1_adr0]; // Port 0 | Read: Sync | Write: ---- | reg [7:0] mem_2[0:36]; initial begin - $readmemh("mem_2.init", mem_2); + $readmemh("MEM_FILE_PATH/mem_2.init", mem_2); end reg [5:0] mem_2_adr0; always @(posedge sys_clk_1) begin @@ -2869,8 +2869,8 @@ assign builder_csr_bankarray_dat_r = mem_2[mem_2_adr0]; // Port 0 | Read: Sync | Write: Sync | Mode: Read-First | Write-Granularity: 10 // Port 1 | Read: Sync | Write: ---- | reg [9:0] storage[0:15]; -reg [9:0] storage_dat0; -reg [9:0] storage_dat1; +reg [9:0] storage_dat0=10'd0; +reg [9:0] storage_dat1=10'd0; always @(posedge sys_clk_1) begin if (main_uart_tx_fifo_wrport_we) storage[main_uart_tx_fifo_wrport_adr] <= main_uart_tx_fifo_wrport_dat_w; From c7116caf6f5391c7d08fb4e14b98b14a4b1dff98 Mon Sep 17 00:00:00 2001 From: zhergarvi Date: Thu, 17 Oct 2024 15:31:11 +0500 Subject: [PATCH 2/2] added setup_lec_sim in axi_st_d256_gen2_only --- .../axi_st_d256_gen2_only/raptor_run.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_st_d256_gen2_only/raptor_run.sh b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_st_d256_gen2_only/raptor_run.sh index 4c8ffd5f7..e0d686da9 100755 --- a/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_st_d256_gen2_only/raptor_run.sh +++ b/RTL_testcases/RTL_Benchmarks_Gap_Analysis/axi_st_d256_gen2_only/raptor_run.sh @@ -275,6 +275,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim 10 2">>raptor_tcl.tcl + echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl