From 951d3d6c36a025fb6a45392f28eb24c6aa21c613 Mon Sep 17 00:00:00 2001
From: Matthias Geier <Matthias.Geier@gmail.com>
Date: Sun, 29 Dec 2024 19:38:37 +0100
Subject: [PATCH] Add a comment about CPU-dependent performance w.r.t. caching

---
 src/lib.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/lib.rs b/src/lib.rs
index 465a5ff..cd6f216 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -289,6 +289,8 @@ pub struct Producer<T> {
     /// A copy of `buffer.tail` for quick access.
     ///
     /// This value is always in sync with `buffer.tail`.
+    // NB: Caching the tail seems to have little effect on Intel CPUs, but it seems to
+    //     improve performance on AMD CPUs, see https://github.com/mgeier/rtrb/pull/132
     cached_tail: Cell<usize>,
 }
 
@@ -496,6 +498,8 @@ pub struct Consumer<T> {
     /// A copy of `buffer.head` for quick access.
     ///
     /// This value is always in sync with `buffer.head`.
+    // NB: Caching the head seems to have little effect on Intel CPUs, but it seems to
+    //     improve performance on AMD CPUs, see https://github.com/mgeier/rtrb/pull/132
     cached_head: Cell<usize>,
 
     /// A copy of `buffer.tail` for quick access.