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Copy pathimx6q-sabresd.dts
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imx6q-sabresd.dts
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/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "Freescale i.MX6 Quad SABRE Smart Device Board";
compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
chosen {
};
aliases {
gpio0 = "/soc/aips-bus@02000000/gpio@0209c000";
gpio1 = "/soc/aips-bus@02000000/gpio@020a0000";
gpio2 = "/soc/aips-bus@02000000/gpio@020a4000";
gpio3 = "/soc/aips-bus@02000000/gpio@020a8000";
gpio4 = "/soc/aips-bus@02000000/gpio@020ac000";
gpio5 = "/soc/aips-bus@02000000/gpio@020b0000";
gpio6 = "/soc/aips-bus@02000000/gpio@020b4000";
ipu0 = "/soc/ipu@02400000";
mmc0 = "/soc/aips-bus@02100000/usdhc@02190000";
mmc1 = "/soc/aips-bus@02100000/usdhc@02194000";
mmc2 = "/soc/aips-bus@02100000/usdhc@02198000";
mmc3 = "/soc/aips-bus@02100000/usdhc@0219c000";
serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000";
serial1 = "/soc/aips-bus@02100000/serial@021e8000";
serial2 = "/soc/aips-bus@02100000/serial@021ec000";
serial3 = "/soc/aips-bus@02100000/serial@021f0000";
serial4 = "/soc/aips-bus@02100000/serial@021f4000";
usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000";
usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000";
ipu1 = "/soc/ipu@02800000";
mxcfb0 = "/fb@0";
mxcfb1 = "/fb@1";
mxcfb2 = "/fb@2";
mxcfb3 = "/fb@3";
};
memory {
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x3>;
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-controller;
reg = <0xa01000 0x1000 0xa00100 0x100>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
clock-frequency = <0x8000>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
clock-frequency = <0x0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
clock-frequency = <0x16e3600>;
};
};
pudummy_reg {
compatible = "fsl,imx6-dummy-pureg";
linux,phandle = <0xb>;
phandle = <0xb>;
};
mxs_viim {
compatible = "fsl,mxs_viim";
reg = <0x2098000 0x1000 0x21bc000 0x1000>;
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
interrupt-parent = <0x1>;
ranges;
caam-sm@00100000 {
compatible = "fsl,imx6q-caam-sm";
reg = <0x100000 0x3fff>;
};
dma-apbh@00110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x110000 0x2000>;
interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>;
interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <0x1>;
dma-channels = <0x4>;
clocks = <0x2 0x6a>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
caam_secvio {
compatible = "fsl,imx6q-caam-secvio";
interrupts = <0x0 0x14 0x4>;
secvio_src = <0x8000001d>;
};
gpmi-nand@00112000 {
compatible = "fsl,imx6q-gpmi-nand";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x112000 0x2000 0x114000 0x2000>;
reg-names = "gpmi-nand", "bch";
interrupts = <0x0 0xf 0x4>;
interrupt-names = "bch";
clocks = <0x2 0x98 0x2 0x99 0x2 0x97 0x2 0x96 0x2 0x95>;
clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch";
dmas = <0x3 0x0>;
dma-names = "rx-tx";
status = "disabled";
};
timer@00a00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xa00600 0x20>;
interrupts = <0x1 0xd 0xf01>;
clocks = <0x2 0xf>;
};
l2-cache@00a02000 {
compatible = "arm,pl310-cache";
reg = <0xa02000 0x1000>;
interrupts = <0x0 0x5c 0x4>;
cache-unified;
cache-level = <0x2>;
arm,tag-latency = <0x4 0x2 0x3>;
arm,data-latency = <0x4 0x2 0x3>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
pcie@0x01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x1ffc000 0x4000>;
#address-cells = <0x3>;
#size-cells = <0x2>;
device_type = "pci";
ranges = <0x800 0x0 0x1f00000 0x1f00000 0x0 0x80000 0x81000000 0x0 0x0 0x1f80000 0x0 0x10000 0x82000000 0x0 0x1000000 0x1000000 0x0 0xf00000>;
num-lanes = <0x1>;
interrupts = <0x0 0x7b 0x4>;
clocks = <0x2 0xbd 0x2 0xbb 0x2 0x90 0x2 0xd4>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "pcie_axi", "lvds_gate";
status = "okay";
power-on-gpio = <0x4 0x13 0x0>;
reset-gpio = <0x5 0xc 0x0>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0x0 0x5e 0x4>;
};
aips-bus@02000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x2000000 0x100000>;
ranges;
spba-bus@02000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x2000000 0x40000>;
ranges;
spdif@02004000 {
compatible = "fsl,imx6q-spdif", "fsl,imx35-spdif";
reg = <0x2004000 0x4000>;
interrupts = <0x0 0x34 0x4>;
dmas = <0x6 0xe 0x12 0x0 0x6 0xf 0x12 0x0>;
dma-names = "rx", "tx";
clocks = <0x2 0xc5 0x2 0x3 0x2 0xc5 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x3e 0x2 0x0 0x2 0x0 0x2 0x9c>;
clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "dma";
status = "disabled";
};
ecspi@02008000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x2008000 0x4000>;
interrupts = <0x0 0x1f 0x4>;
clocks = <0x2 0x70 0x2 0x70>;
clock-names = "ipg", "per";
status = "okay";
dmas = <0x6 0x3 0x7 0x1 0x6 0x4 0x7 0x2>;
dma-names = "rx", "tx";
fsl,spi-num-chipselects = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <0x7>;
mcp3008@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "mcpadc,mcp3008";
spi-max-frequency = <0x1312d00>;
reg = <0x0>;
};
};
ecspi@0200c000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x200c000 0x4000>;
interrupts = <0x0 0x20 0x4>;
clocks = <0x2 0x71 0x2 0x71>;
clock-names = "ipg", "per";
status = "disabled";
dmas = <0x6 0x5 0x7 0x1 0x6 0x6 0x7 0x2>;
dma-names = "rx", "tx";
};
ecspi@02010000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x2010000 0x4000>;
interrupts = <0x0 0x21 0x4>;
clocks = <0x2 0x72 0x2 0x72>;
clock-names = "ipg", "per";
status = "disabled";
dmas = <0x6 0x7 0x7 0x1 0x6 0x8 0x7 0x2>;
dma-names = "rx", "tx";
};
ecspi@02014000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x2014000 0x4000>;
interrupts = <0x0 0x22 0x4>;
clocks = <0x2 0x73 0x2 0x73>;
clock-names = "ipg", "per";
status = "disabled";
dmas = <0x6 0x9 0x7 0x1 0x6 0xa 0x7 0x2>;
dma-names = "rx", "tx";
};
serial@02020000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x2020000 0x4000>;
interrupts = <0x0 0x1a 0x4>;
clocks = <0x2 0xa0 0x2 0xa1>;
clock-names = "ipg", "per";
dmas = <0x6 0x19 0x4 0x0 0x6 0x1a 0x4 0x0>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x8>;
};
esai@02024000 {
compatible = "fsl,imx35-esai";
reg = <0x2024000 0x4000>;
interrupts = <0x0 0x33 0x4>;
clocks = <0x2 0xe4 0x2 0xe5 0x2 0x76 0x2 0xe4 0x2 0x9c>;
clock-names = "core", "mem", "extal", "fsys", "dma";
fsl,esai-dma-events = <0x18 0x17>;
fsl,flags = <0x1>;
status = "disabled";
};
ssi@02028000 {
compatible = "fsl,imx6q-ssi", "fsl,imx21-ssi";
reg = <0x2028000 0x4000>;
interrupts = <0x0 0x2e 0x4>;
clocks = <0x2 0xb2 0x2 0x9d>;
clock-names = "ipg", "baud";
dmas = <0x6 0x25 0x1 0x0 0x6 0x26 0x1 0x0>;
dma-names = "rx", "tx";
status = "disabled";
};
ssi@0202c000 {
compatible = "fsl,imx6q-ssi", "fsl,imx21-ssi";
reg = <0x202c000 0x4000>;
interrupts = <0x0 0x2f 0x4>;
clocks = <0x2 0xb3 0x2 0x9e>;
clock-names = "ipg", "baud";
dmas = <0x6 0x29 0x1 0x0 0x6 0x2a 0x1 0x0>;
dma-names = "rx", "tx";
status = "okay";
fsl,mode = "i2s-slave";
linux,phandle = <0x35>;
phandle = <0x35>;
};
ssi@02030000 {
compatible = "fsl,imx6q-ssi", "fsl,imx21-ssi";
reg = <0x2030000 0x4000>;
interrupts = <0x0 0x30 0x4>;
clocks = <0x2 0xb4 0x2 0x9f>;
clock-names = "ipg", "baud";
dmas = <0x6 0x2d 0x1 0x0 0x6 0x2e 0x1 0x0>;
dma-names = "rx", "tx";
status = "disabled";
};
asrc@02034000 {
compatible = "fsl,imx53-asrc";
reg = <0x2034000 0x4000>;
interrupts = <0x0 0x32 0x4>;
clocks = <0x2 0xe3 0x2 0xe2 0x2 0xe1 0x2 0x9c>;
clock-names = "mem", "ipg", "asrck", "dma";
dmas = <0x6 0x11 0x14 0x1 0x6 0x12 0x14 0x1 0x6 0x13 0x14 0x1 0x6 0x14 0x14 0x1 0x6 0x15 0x14 0x1 0x6 0x16 0x14 0x1>;
dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";
status = "okay";
};
asrc_p2p {
compatible = "fsl,imx6q-asrc-p2p";
fsl,p2p-rate = <0xbb80>;
fsl,p2p-width = <0x10>;
fsl,asrc-dma-rx-events = <0x11 0x12 0x13>;
fsl,asrc-dma-tx-events = <0x14 0x15 0x16>;
status = "okay";
};
spba@0203c000 {
reg = <0x203c000 0x4000>;
};
ecspi@02018000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x2018000 0x4000>;
interrupts = <0x0 0x23 0x4>;
clocks = <0x2 0x74 0x2 0x74>;
clock-names = "ipg", "per";
status = "disabled";
};
};
vpu@02040000 {
compatible = "fsl,imx6-vpu";
reg = <0x2040000 0x3c000>;
reg-names = "vpu_regs";
interrupts = <0x0 0x3 0x1 0x0 0xc 0x4>;
interrupt-names = "vpu_jpu_irq", "vpu_ipi_irq";
clocks = <0x2 0xa8 0x2 0x8c 0x2 0x8e>;
clock-names = "vpu_clk", "mmdc_ch0_axi", "ocram";
iramsize = <0x21000>;
iram = <0x9>;
resets = <0xa 0x1>;
pu-supply = <0xb>;
status = "okay";
};
aipstz@0207c000 {
reg = <0x207c000 0x4000>;
};
pwm@02080000 {
#pwm-cells = <0x2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x2080000 0x4000>;
interrupts = <0x0 0x53 0x4>;
clocks = <0x2 0x3e 0x2 0x91>;
clock-names = "ipg", "per";
pinctrl-names = "default";
pinctrl-0 = <0xc>;
status = "okay";
linux,phandle = <0x39>;
phandle = <0x39>;
};
pwm@02084000 {
#pwm-cells = <0x2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x2084000 0x4000>;
interrupts = <0x0 0x54 0x4>;
clocks = <0x2 0x3e 0x2 0x92>;
clock-names = "ipg", "per";
};
pwm@02088000 {
#pwm-cells = <0x2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x2088000 0x4000>;
interrupts = <0x0 0x55 0x4>;
clocks = <0x2 0x3e 0x2 0x93>;
clock-names = "ipg", "per";
};
pwm@0208c000 {
#pwm-cells = <0x2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x208c000 0x4000>;
interrupts = <0x0 0x56 0x4>;
clocks = <0x2 0x3e 0x2 0x94>;
clock-names = "ipg", "per";
};
can@02090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x2090000 0x4000>;
interrupts = <0x0 0x6e 0x4>;
clocks = <0x2 0x6c 0x2 0x6d>;
clock-names = "ipg", "per";
stop-mode = <0xd 0x34 0x1c 0x10 0x11>;
status = "disabled";
};
can@02094000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x2094000 0x4000>;
interrupts = <0x0 0x6f 0x4>;
clocks = <0x2 0x6e 0x2 0x6f>;
clock-names = "ipg", "per";
stop-mode = <0xd 0x34 0x1d 0x10 0x12>;
status = "disabled";
};
gpt@02098000 {
compatible = "fsl,imx6q-gpt";
reg = <0x2098000 0x4000>;
interrupts = <0x0 0x37 0x4>;
clocks = <0x2 0x77 0x2 0x78>;
clock-names = "ipg", "per";
};
gpio@0209c000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x209c000 0x4000>;
interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
gpio@020a0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20a0000 0x4000>;
interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
gpio@020a4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20a4000 0x4000>;
interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
gpio@020a8000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20a8000 0x4000>;
interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
gpio@020ac000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20ac000 0x4000>;
interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
gpio@020b0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20b0000 0x4000>;
interrupts = <0x0 0x4c 0x4 0x0 0x4d 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x29>;
phandle = <0x29>;
};
gpio@020b4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x20b4000 0x4000>;
interrupts = <0x0 0x4e 0x4 0x0 0x4f 0x4>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
kpp@020b8000 {
reg = <0x20b8000 0x4000>;
interrupts = <0x0 0x52 0x4>;
};
wdog@020bc000 {
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x20bc000 0x4000>;
interrupts = <0x0 0x50 0x4>;
clocks = <0x2 0x0>;
status = "disabled";
};
wdog@020c0000 {
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x20c0000 0x4000>;
interrupts = <0x0 0x51 0x4>;
clocks = <0x2 0x0>;
status = "okay";
};
ccm@020c4000 {
compatible = "fsl,imx6q-ccm";
reg = <0x20c4000 0x4000>;
interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>;
#clock-cells = <0x1>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
anatop@020c8000 {
compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
reg = <0x20c8000 0x1000>;
interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>;
linux,phandle = <0xe>;
phandle = <0xe>;
regulator-1p1@110 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x14fb18>;
regulator-always-on;
anatop-reg-offset = <0x110>;
anatop-vol-bit-shift = <0x8>;
anatop-vol-bit-width = <0x5>;
anatop-min-bit-val = <0x4>;
anatop-min-voltage = <0xc3500>;
anatop-max-voltage = <0x14fb18>;
};
regulator-3p0@120 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <0x2ab980>;
regulator-max-microvolt = <0x3010b0>;
regulator-always-on;
anatop-reg-offset = <0x120>;
anatop-vol-bit-shift = <0x8>;
anatop-vol-bit-width = <0x5>;
anatop-min-bit-val = <0x0>;
anatop-min-voltage = <0x280de8>;
anatop-max-voltage = <0x33e140>;
};
regulator-2p5@130 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <0x1e8480>;
regulator-max-microvolt = <0x29f630>;
regulator-always-on;
anatop-reg-offset = <0x130>;
anatop-vol-bit-shift = <0x8>;
anatop-vol-bit-width = <0x5>;
anatop-min-bit-val = <0x0>;
anatop-min-voltage = <0x1e8480>;
anatop-max-voltage = <0x29f630>;
};
regulator-vddcore@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "cpu";
regulator-min-microvolt = <0xb1008>;
regulator-max-microvolt = <0x162010>;
regulator-always-on;
anatop-reg-offset = <0x140>;
anatop-vol-bit-shift = <0x0>;
anatop-vol-bit-width = <0x5>;
anatop-delay-reg-offset = <0x170>;
anatop-delay-bit-shift = <0x18>;
anatop-delay-bit-width = <0x2>;
anatop-min-bit-val = <0x1>;
anatop-min-voltage = <0xb1008>;
anatop-max-voltage = <0x162010>;
};
regulator-vddpu@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpu";
regulator-min-microvolt = <0xb1008>;
regulator-max-microvolt = <0x162010>;
anatop-reg-offset = <0x140>;
anatop-vol-bit-shift = <0x9>;
anatop-vol-bit-width = <0x5>;
anatop-delay-reg-offset = <0x170>;
anatop-delay-bit-shift = <0x1a>;
anatop-delay-bit-width = <0x2>;
anatop-min-bit-val = <0x1>;
anatop-min-voltage = <0xb1008>;
anatop-max-voltage = <0x162010>;
};
regulator-vddsoc@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <0xb1008>;
regulator-max-microvolt = <0x162010>;
regulator-always-on;
anatop-reg-offset = <0x140>;
anatop-vol-bit-shift = <0x12>;
anatop-vol-bit-width = <0x5>;
anatop-delay-reg-offset = <0x170>;
anatop-delay-bit-shift = <0x1c>;
anatop-delay-bit-width = <0x2>;
anatop-min-bit-val = <0x1>;
anatop-min-voltage = <0xb1008>;
anatop-max-voltage = <0x162010>;
};
};
tempmon {
compatible = "fsl,imx6q-tempmon";
interrupts = <0x0 0x31 0x4>;
fsl,tempmon = <0xe>;
fsl,tempmon-data = <0xf>;
clocks = <0x2 0xac>;
};
usbphy@020c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x20c9000 0x1000>;
interrupts = <0x0 0x2c 0x4>;
clocks = <0x2 0xb6>;
fsl,anatop = <0xe>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
usbphy@020ca000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x20ca000 0x1000>;
interrupts = <0x0 0x2d 0x4>;
clocks = <0x2 0xb7>;
fsl,anatop = <0xe>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
usbphy_nop1 {
compatible = "usb-nop-xceiv";
clocks = <0x2 0xb6>;
clock-names = "main_clk";
linux,phandle = <0x19>;
phandle = <0x19>;
};
usbphy_nop2 {
compatible = "usb-nop-xceiv";
clocks = <0x2 0xb6>;
clock-names = "main_clk";
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
caam-snvs@020cc000 {
compatible = "fsl,imx6q-caam-snvs";
reg = <0x20cc000 0x4000>;
};
snvs@020cc000 {
compatible = "fsl,sec-v4.0-mon", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x20cc000 0x4000>;
snvs-rtc-lp@34 {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
reg = <0x34 0x58>;
interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>;
};
};
epit@020d0000 {
reg = <0x20d0000 0x4000>;
interrupts = <0x0 0x38 0x4>;
};
epit@020d4000 {
reg = <0x20d4000 0x4000>;
interrupts = <0x0 0x39 0x4>;
};
src@020d8000 {
compatible = "fsl,imx6q-src", "fsl,imx51-src";
reg = <0x20d8000 0x4000>;
interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>;
#reset-cells = <0x1>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
gpc@020dc000 {
compatible = "fsl,imx6q-gpc";
reg = <0x20dc000 0x4000>;
interrupts = <0x0 0x59 0x4 0x0 0x5a 0x4>;
clocks = <0x2 0x7a 0x2 0x4a 0x2 0x79 0x2 0x1a 0x2 0x8f 0x2 0xa8 0x2 0x3e>;
clock-names = "gpu3d_core", "gpu3d_shader", "gpu2d_core", "gpu2d_axi", "openvg_axi", "vpu_axi", "ipg";
pu-supply = <0xb>;
fsl,cpu_pupscr_sw2iso = <0xf>;
fsl,cpu_pupscr_sw = <0xf>;
fsl,cpu_pdnscr_iso2sw = <0x1>;
fsl,cpu_pdnscr_iso = <0x1>;
fsl,ldo-bypass = <0x1>;
fsl,wdog-reset = <0x2>;
};
iomuxc-gpr@020e0000 {
compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x20e0000 0x38>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
iomuxc@020e0000 {
reg = <0x20e0000 0x4000>;
compatible = "fsl,imx6q-iomuxc";
pinctrl-names = "default";
pinctrl-0 = <0x10>;
audmux {
audmux-1 {
fsl,pins = <0x54 0x368 0x7b4 0x3 0x0 0x130b0 0x35c 0x744 0x7c4 0x3 0x1 0x130b0 0x50 0x364 0x7b8 0x3 0x0 0x110b0 0x4c 0x360 0x7c8 0x3 0x0 0x130b0>;
};
audmux-2 {
fsl,pins = <0x274 0x644 0x0 0x4 0x0 0x130b0 0x268 0x638 0x0 0x4 0x0 0x130b0 0x26c 0x63c 0x0 0x4 0x0 0x110b0 0x270 0x640 0x0 0x4 0x0 0x130b0>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
audmux-3 {
fsl,pins = <0x1b0 0x4c4 0x7dc 0x3 0x0 0x130b0 0x1b8 0x4cc 0x7e0 0x3 0x0 0x130b0 0x1bc 0x4d0 0x7cc 0x3 0x0 0x130b0>;
};
};
ecspi1 {
ecspi1_cs_grp-1 {
fsl,pins = <0x9c 0x3b0 0x0 0x5 0x0 0x80000000>;
};
ecspi1grp-1 {
fsl,pins = <0x94 0x3a8 0x7f8 0x1 0x0 0x100b1 0x98 0x3ac 0x7fc 0x1 0x0 0x100b1 0x90 0x3a4 0x7f4 0x1 0x0 0x100b1>;
};
ecspi1grp-2 {
fsl,pins = <0x200 0x5d0 0x7f8 0x0 0x2 0x100b1 0x1fc 0x5cc 0x7fc 0x0 0x2 0x100b1 0x1f8 0x5c8 0x7f4 0x0 0x2 0x100b1>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
};
ecspi3 {
ecspi3grp-1 {
fsl,pins = <0x178 0x48c 0x0 0x2 0x0 0x100b1 0x174 0x488 0x0 0x2 0x0 0x100b1 0x170 0x484 0x0 0x2 0x0 0x100b1>;
};
};
enet {
enetgrp-1 {
fsl,pins = <0x1d0 0x4e4 0x840 0x1 0x0 0x1b0b0 0x1f4 0x508 0x0 0x1 0x0 0x1b0b0 0x58 0x36c 0x0 0x1 0x0 0x1b0b0 0x5c 0x370 0x0 0x1 0x0 0x1b0b0 0x60 0x374 0x0 0x1 0x0 0x1b0b0 0x64 0x378 0x0 0x1 0x0 0x1b0b0 0x68 0x37c 0x0 0x1 0x0 0x1b0b0 0x74 0x388 0x0 0x1 0x0 0x1b0b0 0x1d4 0x4e8 0x0 0x1 0x0 0x1b0b0 0x84 0x398 0x844 0x1 0x0 0x1b0b0 0x70 0x384 0x848 0x1 0x0 0x1b0b0 0x78 0x38c 0x84c 0x1 0x0 0x1b0b0 0x7c 0x390 0x850 0x1 0x0 0x1b0b0 0x80 0x394 0x854 0x1 0x0 0x1b0b0 0x6c 0x380 0x858 0x1 0x0 0x1b0b0 0x248 0x618 0x83c 0x2 0x1 0x4001b0a8>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
enetgrp-2 {
fsl,pins = <0x200 0x5d0 0x840 0x1 0x1 0x1b0b0 0x208 0x5d8 0x0 0x4 0x0 0x1b0b0 0x58 0x36c 0x0 0x1 0x0 0x1b0b0 0x5c 0x370 0x0 0x1 0x0 0x1b0b0 0x60 0x374 0x0 0x1 0x0 0x1b0b0 0x64 0x378 0x0 0x1 0x0 0x1b0b0 0x68 0x37c 0x0 0x1 0x0 0x1b0b0 0x74 0x388 0x0 0x1 0x0 0x1b0b0 0x1d4 0x4e8 0x0 0x1 0x0 0x1b0b0 0x84 0x398 0x844 0x1 0x0 0x1b0b0 0x70 0x384 0x848 0x1 0x0 0x1b0b0 0x78 0x38c 0x84c 0x1 0x0 0x1b0b0 0x7c 0x390 0x850 0x1 0x0 0x1b0b0 0x80 0x394 0x854 0x1 0x0 0x1b0b0 0x6c 0x380 0x858 0x1 0x0 0x1b0b0 0x248 0x618 0x83c 0x2 0x1 0x4001b0a8>;
};
enetgrp-3 {
fsl,pins = <0x1d0 0x4e4 0x840 0x1 0x0 0x1b0b0 0x1f4 0x508 0x0 0x1 0x0 0x1b0b0 0x58 0x36c 0x0 0x1 0x0 0x1b0b0 0x5c 0x370 0x0 0x1 0x0 0x1b0b0 0x60 0x374 0x0 0x1 0x0 0x1b0b0 0x64 0x378 0x0 0x1 0x0 0x1b0b0 0x68 0x37c 0x0 0x1 0x0 0x1b0b0 0x74 0x388 0x0 0x1 0x0 0x1b0b0 0x1d4 0x4e8 0x0 0x1 0x0 0x1b0b0 0x84 0x398 0x844 0x1 0x0 0x1b0b0 0x70 0x384 0x848 0x1 0x0 0x1b0b0 0x78 0x38c 0x84c 0x1 0x0 0x1b0b0 0x7c 0x390 0x850 0x1 0x0 0x1b0b0 0x80 0x394 0x854 0x1 0x0 0x1b0b0 0x6c 0x380 0x858 0x1 0x0 0x1b0b0 0x1e8 0x4fc 0x0 0x1 0x0 0x1b0b0>;
};
enetirqgrp {
fsl,pins = <0x230 0x600 0x3c 0x11 0xff000609 0xb1>;
};
};
esai {
esaigrp-1 {
fsl,pins = <0x1e4 0x4f8 0x868 0x2 0x0 0x1b030 0x1dc 0x4f0 0x870 0x2 0x0 0x1b030 0x1e0 0x4f4 0x860 0x2 0x0 0x1b030 0x1e8 0x4fc 0x880 0x2 0x0 0x1b030 0x1ec 0x500 0x87c 0x2 0x0 0x1b030 0x1f0 0x504 0x884 0x2 0x0 0x1b030 0x1f4 0x508 0x888 0x2 0x0 0x1b030 0x2ec 0x6d4 0x874 0x2 0x1 0x1b030 0x2f0 0x6d8 0x878 0x2 0x1 0x1b030>;
};
};
flexcan1 {
flexcan1grp-1 {
fsl,pins = <0x20c 0x5dc 0x7e4 0x2 0x0 0x80000000 0x208 0x5d8 0x0 0x2 0x0 0x80000000>;
};
flexcan1grp-2 {
fsl,pins = <0x240 0x610 0x0 0x3 0x0 0x80000000 0x20c 0x5dc 0x7e4 0x2 0x0 0x80000000>;
};
};
flexcan2 {
flexcan2grp-1 {
fsl,pins = <0x218 0x5e8 0x0 0x0 0x0 0x80000000 0x21c 0x5ec 0x7e8 0x0 0x0 0x80000000>;
};
};
gpmi-nand {
gpmi-nand-1 {
fsl,pins = <0x2d4 0x6bc 0x0 0x0 0x0 0xb0b1 0x2d8 0x6c0 0x0 0x0 0x0 0xb0b1 0x2dc 0x6c4 0x0 0x0 0x0 0xb0b1 0x2e0 0x6c8 0x0 0x0 0x0 0xb000 0x2e4 0x6cc 0x0 0x0 0x0 0xb0b1 0x2f4 0x6dc 0x0 0x1 0x0 0xb0b1 0x2f8 0x6e0 0x0 0x1 0x0 0xb0b1 0x2fc 0x6e4 0x0 0x0 0x0 0xb0b1 0x300 0x6e8 0x0 0x0 0x0 0xb0b1 0x304 0x6ec 0x0 0x0 0x0 0xb0b1 0x308 0x6f0 0x0 0x0 0x0 0xb0b1 0x30c 0x6f4 0x0 0x0 0x0 0xb0b1 0x310 0x6f8 0x0 0x0 0x0 0xb0b1 0x314 0x6fc 0x0 0x0 0x0 0xb0b1 0x318 0x700 0x0 0x0 0x0 0xb0b1 0x31c 0x704 0x0 0x2 0x0 0xb1>;
};
};
hdmi_hdcp {
hdmihdcpgrp-1 {
fsl,pins = <0x210 0x5e0 0x890 0x2 0x1 0x4001b8b1 0x214 0x5e4 0x894 0x2 0x1 0x4001b8b1>;
};
hdmihdcpgrp-2 {
fsl,pins = <0x8c 0x3a0 0x890 0x4 0x0 0x4001b8b1 0x90 0x3a4 0x894 0x4 0x0 0x4001b8b1>;
};
hdmihdcpgrp-3 {
fsl,pins = <0x8c 0x3a0 0x890 0x4 0x0 0x4001b8b1 0x214 0x5e4 0x894 0x2 0x1 0x4001b8b1>;
};
};
hdmi_cec {
hdmicecgrp-1 {
fsl,pins = <0x88 0x39c 0x88c 0x6 0x0 0x1f8b0>;
};
hdmicecgrp-2 {
fsl,pins = <0x20c 0x5dc 0x88c 0x6 0x1 0x1f8b0>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
};
i2c1 {
i2c1grp-1 {
fsl,pins = <0xa4 0x3b8 0x898 0x6 0x0 0x4001b8b1 0xc4 0x3d8 0x89c 0x1 0x0 0x4001b8b1>;
};
i2c1grp-2 {
fsl,pins = <0x278 0x648 0x89c 0x4 0x1 0x4001b8b1 0x27c 0x64c 0x898 0x4 0x1 0x4001b8b1>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
};
i2c2 {
i2c2grp-1 {
fsl,pins = <0x8c 0x3a0 0x8a0 0x6 0x0 0x4001b8b1 0x90 0x3a4 0x8a4 0x6 0x0 0x4001b8b1>;
};
i2c2grp-2 {
fsl,pins = <0x210 0x5e0 0x8a0 0x4 0x1 0x4001b8b1 0x214 0x5e4 0x8a4 0x4 0x1 0x4001b8b1>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
i2c2grp-3 {
fsl,pins = <0x8c 0x3a0 0x8a0 0x6 0x0 0x4001b8b1 0x214 0x5e4 0x8a4 0x4 0x1 0x4001b8b1>;
};
};
i2c3 {
i2c3grp-1 {
fsl,pins = <0x94 0x3a8 0x8a8 0x6 0x0 0x4001b8b1 0x98 0x3ac 0x8ac 0x6 0x0 0x4001b8b1>;
};
i2c3grp-2 {
fsl,pins = <0x22c 0x5fc 0x8a8 0x2 0x1 0x4001b8b1 0x230 0x600 0x8ac 0x2 0x1 0x4001b8b1>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
i2c3grp-4 {
fsl,pins = <0x22c 0x5fc 0x8a8 0x2 0x1 0x4001b8b1 0x98 0x3ac 0x8ac 0x6 0x0 0x4001b8b1>;
};
};
ipu1 {
ipu1grp-1 {
fsl,pins = <0x15c 0x470 0x0 0x0 0x0 0x10 0x160 0x474 0x0 0x0 0x0 0x10 0x164 0x478 0x0 0x0 0x0 0x10 0x168 0x47c 0x0 0x0 0x0 0x10 0x16c 0x480 0x0 0x0 0x0 0x80000000 0x170 0x484 0x0 0x0 0x0 0x10 0x174 0x488 0x0 0x0 0x0 0x10 0x178 0x48c 0x0 0x0 0x0 0x10 0x17c 0x490 0x0 0x0 0x0 0x10 0x180 0x494 0x0 0x0 0x0 0x10 0x184 0x498 0x0 0x0 0x0 0x10 0x188 0x49c 0x0 0x0 0x0 0x10 0x18c 0x4a0 0x0 0x0 0x0 0x10 0x190 0x4a4 0x0 0x0 0x0 0x10 0x194 0x4a8 0x0 0x0 0x0 0x10 0x198 0x4ac 0x0 0x0 0x0 0x10 0x19c 0x4b0 0x0 0x0 0x0 0x10 0x1a0 0x4b4 0x0 0x0 0x0 0x10 0x1a4 0x4b8 0x0 0x0 0x0 0x10 0x1a8 0x4bc 0x0 0x0 0x0 0x10 0x1ac 0x4c0 0x0 0x0 0x0 0x10 0x1b0 0x4c4 0x0 0x0 0x0 0x10 0x1b4 0x4c8 0x0 0x0 0x0 0x10 0x1b8 0x4cc 0x0 0x0 0x0 0x10 0x1bc 0x4d0 0x0 0x0 0x0 0x10 0x1c0 0x4d4 0x0 0x0 0x0 0x10 0x1c4 0x4d8 0x0 0x0 0x0 0x10 0x1c8 0x4dc 0x0 0x0 0x0 0x10 0x1cc 0x4e0 0x0 0x0 0x0 0x10>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
ipu1grp-2 {
fsl,pins = <0x288 0x658 0x0 0x0 0x0 0x80000000 0x28c 0x65c 0x0 0x0 0x0 0x80000000 0x290 0x660 0x0 0x0 0x0 0x80000000 0x294 0x664 0x0 0x0 0x0 0x80000000 0x298 0x668 0x0 0x0 0x0 0x80000000 0x29c 0x66c 0x0 0x0 0x0 0x80000000 0x2a0 0x670 0x0 0x0 0x0 0x80000000 0x2a4 0x674 0x0 0x0 0x0 0x80000000 0x260 0x630 0x0 0x0 0x0 0x80000000 0x258 0x628 0x0 0x0 0x0 0x80000000 0x25c 0x62c 0x0 0x0 0x0 0x80000000 0x264 0x634 0x0 0x0 0x0 0x80000000>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
ipu1grp-3 {
fsl,pins = <0x268 0x638 0x0 0x0 0x0 0x80000000 0x26c 0x63c 0x0 0x0 0x0 0x80000000 0x270 0x640 0x0 0x0 0x0 0x80000000 0x274 0x644 0x0 0x0 0x0 0x80000000 0x278 0x648 0x0 0x0 0x0 0x80000000 0x27c 0x64c 0x0 0x0 0x0 0x80000000 0x280 0x650 0x0 0x0 0x0 0x80000000 0x284 0x654 0x0 0x0 0x0 0x80000000 0x288 0x658 0x0 0x0 0x0 0x80000000 0x28c 0x65c 0x0 0x0 0x0 0x80000000 0x290 0x660 0x0 0x0 0x0 0x80000000 0x294 0x664 0x0 0x0 0x0 0x80000000 0x298 0x668 0x0 0x0 0x0 0x80000000 0x29c 0x66c 0x0 0x0 0x0 0x80000000 0x2a0 0x670 0x0 0x0 0x0 0x80000000 0x2a4 0x674 0x0 0x0 0x0 0x80000000 0x258 0x628 0x0 0x0 0x0 0x80000000 0x25c 0x62c 0x0 0x0 0x0 0x80000000 0x264 0x634 0x0 0x0 0x0 0x80000000>;
};
};
mlb {
mlbgrp-1 {
fsl,pins = <0x22c 0x5fc 0x900 0x7 0x1 0x71 0x230 0x600 0x908 0x7 0x1 0x71 0x234 0x604 0x904 0x7 0x1 0x71>;
};
mlbgrp-2 {
fsl,pins = <0x1ec 0x500 0x900 0x0 0x0 0x80000000 0x230 0x600 0x908 0x7 0x1 0x80000000 0x234 0x604 0x904 0x7 0x1 0x80000000>;
};
};
pwm1 {
pwm1grp-1 {
fsl,pins = <0x190 0x4a4 0x0 0x2 0x0 0x1b0b1>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
};
pwm3 {
pwm3grp-1 {
fsl,pins = <0x320 0x708 0x0 0x2 0x0 0x1b0b1>;
};
};
spdif {
spdifgrp-1 {
fsl,pins = <0x210 0x5e0 0x914 0x6 0x2 0x1b0b0>;
};
spdifgrp-2 {
fsl,pins = <0x248 0x618 0x914 0x4 0x3 0x1b0b0 0x24c 0x61c 0x0 0x4 0x0 0x1b0b0>;
};
};
uart1 {
uart1grp-1 {
fsl,pins = <0x280 0x650 0x0 0x3 0x0 0x1b0b1 0x284 0x654 0x920 0x3 0x1 0x1b0b1>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
};