diff --git a/.gitignore b/.gitignore index 5f21c69b3072c..35ba9286c2d2b 100644 --- a/.gitignore +++ b/.gitignore @@ -65,3 +65,7 @@ tools/gdb/__pycache__ /build .ccls-cache compile_commands.json +hello.S +Image +init.S +initrd diff --git a/arch/risc-v/src/bl808/Make.defs b/arch/risc-v/src/bl808/Make.defs index 61a4f41280e7a..4368b3d935950 100644 --- a/arch/risc-v/src/bl808/Make.defs +++ b/arch/risc-v/src/bl808/Make.defs @@ -27,4 +27,4 @@ HEAD_ASRC = bl808_head.S # Specify our C code within this directory to be included CHIP_CSRCS = bl808_start.c bl808_irq_dispatch.c bl808_irq.c CHIP_CSRCS += bl808_timerisr.c bl808_allocateheap.c -CHIP_CSRCS += bl808_mm_init.c bl808_pgalloc.c bl808_serial.c +CHIP_CSRCS += bl808_gpio.c bl808_mm_init.c bl808_pgalloc.c bl808_serial.c diff --git a/arch/risc-v/src/bl808/bl808_gpio.c b/arch/risc-v/src/bl808/bl808_gpio.c new file mode 100644 index 0000000000000..41efeb59bfe5a --- /dev/null +++ b/arch/risc-v/src/bl808/bl808_gpio.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * arch/risc-v/src/bl808/bl808_gpio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "riscv_internal.h" +#include "hardware/bl808_glb.h" +#include "bl808_gpio.h" + +////TODO +////#define BL808_GLB_BASE 0x20000000ul /* glb */ +#define BL808_GPIO_BASE 0x200008c4ul /* gpio */ +#define BL808_NGPIOS 45 +#define reg_gpio_xx_o 24 +#define reg_gpio_xx_i 28 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bl808_configgpio + * + * Description: + * Configure a GPIO pin based on encoded pin attributes. + * + ****************************************************************************/ + +int bl808_configgpio(int pin, gpio_pinattr_t attr) +{ + uintptr_t regaddr; + uint32_t cfg = 0; + + DEBUGASSERT(pin >= 0 && pin <= BL808_NGPIOS); + + //// TODO: Change GPIO_CFGCTL0_GPIO_0_IE to GPIO_CFG_GPIO_IE + if (attr & GPIO_INPUT) + { + cfg |= GPIO_CFGCTL0_GPIO_0_IE; + } + else + { + cfg |= GPIO_CFGCTL0_GPIO_0_OE; + } + + if (attr & GPIO_PULLUP) + { + cfg |= GPIO_CFGCTL0_GPIO_0_PU; + } + + if (attr & GPIO_PULLDOWN) + { + cfg |= GPIO_CFGCTL0_GPIO_0_PD; + } + + if (attr & GPIO_DRV_MASK) + { + cfg |= ((attr & GPIO_DRV_MASK) >> GPIO_DRV_SHIFT) << + GPIO_CFGCTL0_GPIO_0_DRV_SHIFT; + } + + if (attr & GPIO_SMT_EN) + { + cfg |= GPIO_CFGCTL0_GPIO_0_SMT; + } + + if (attr & GPIO_FUNC_MASK) + { + cfg |= ((attr & GPIO_FUNC_MASK) >> GPIO_FUNC_SHIFT) << + GPIO_CFGCTL0_GPIO_0_FUNC_SEL_SHIFT; + } + + regaddr = BL808_GPIO_BASE + (pin * 4); + // _info("regaddr=%p, cfg=0x%x\n", regaddr, cfg);//// + putreg32(cfg, regaddr); + return OK; +} + +/**************************************************************************** + * Name: bl808_gpiowrite + * + * Description: + * Write one or zero to the selected GPIO pin + * + ****************************************************************************/ + +void bl808_gpiowrite(int pin, bool value) +{ + uintptr_t regaddr; + + DEBUGASSERT(pin >= 0 && pin <= BL808_NGPIOS); + + regaddr = BL808_GPIO_BASE + (pin * 4); + if (value) + { + up_putc('\n'); _info("regaddr=%p, set=0x%x\n", regaddr, (1 << reg_gpio_xx_o));//// + modifyreg32(regaddr, 0, (1 << reg_gpio_xx_o)); + } + else + { + up_putc('\n'); _info("regaddr=%p, clear=0x%x\n", regaddr, (1 << reg_gpio_xx_o));//// + modifyreg32(regaddr, (1 << reg_gpio_xx_o), 0); + } +} + +/**************************************************************************** + * Name: bl808_gpioread + * + * Description: + * Read one or zero from the selected GPIO pin + * + ****************************************************************************/ + +bool bl808_gpioread(int pin) +{ + uintptr_t regaddr; + uint32_t regval; + + DEBUGASSERT(pin >= 0 && pin <= BL808_NGPIOS); + + regaddr = BL808_GPIO_BASE + (pin * 4); + regval = getreg32(regaddr); + return (regval & (1 << reg_gpio_xx_i)) != 0; +} diff --git a/arch/risc-v/src/bl808/bl808_gpio.h b/arch/risc-v/src/bl808/bl808_gpio.h new file mode 100644 index 0000000000000..45dbc8e474d05 --- /dev/null +++ b/arch/risc-v/src/bl808/bl808_gpio.h @@ -0,0 +1,188 @@ +/**************************************************************************** + * arch/risc-v/src/bl808/bl808_gpio.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_BL808_BL808_GPIO_H +#define __ARCH_RISCV_SRC_BL808_BL808_GPIO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Pre-Processor Declarations + ****************************************************************************/ + +/* Encoded GPIO Attributes + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... ..MU UDDS FFFF + */ + +/* Mode: + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... ..M. .... .... + */ + +#define GPIO_MODE_SHIFT (9) /* Bit 9: Port Mode */ +#define GPIO_MODE_MASK (1 << GPIO_MODE_SHIFT) +# define GPIO_INPUT (1 << GPIO_MODE_SHIFT) /* Input Enable */ +# define GPIO_OUTPUT (0 << GPIO_MODE_SHIFT) /* Output Enable */ + +/* Input/Output pull-ups/downs: + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... ...U U... .... + */ + +#define GPIO_PUPD_SHIFT (7) /* Bits 7-8: Pull-up/down */ +#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT) +#define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */ +#define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */ +#define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */ + +/* Drive: + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... .... .DD. .... + */ + +#define GPIO_DRV_SHIFT (5) /* Bits 5-6: Drive */ +#define GPIO_DRV_MASK (3 << GPIO_DRV_SHIFT) +#define GPIO_DRV_0 (0 << GPIO_DRV_SHIFT) +#define GPIO_DRV_1 (1 << GPIO_DRV_SHIFT) +#define GPIO_DRV_2 (2 << GPIO_DRV_SHIFT) +#define GPIO_DRV_3 (3 << GPIO_DRV_SHIFT) + +/* Input Schmitt trigger: + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... .... ...S .... + */ + +#define GPIO_SMT_SHIFT (4) /* Bit 4: SMT Enable */ +#define GPIO_SMT_MASK (3 << GPIO_SMT_SHIFT) +#define GPIO_SMT_DIS (0 << GPIO_SMT_SHIFT) +#define GPIO_SMT_EN (1 << GPIO_SMT_SHIFT) + +/* GPIO type selection: + * + * 1111 1100 0000 0000 + * 5432 1098 7654 3210 + * ---- ---- ---- ---- + * .... .... .... FFFF + */ + +#define GPIO_FUNC_SHIFT (0) /* Bits 0-3: GPIO Type */ +#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT) +#define GPIO_FUNC_SDIO (1 << GPIO_FUNC_SHIFT) /* SDIO */ +#define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */ +#define GPIO_FUNC_SPI (4 << GPIO_FUNC_SHIFT) /* SPI */ +#define GPIO_FUNC_I2C (6 << GPIO_FUNC_SHIFT) /* I2C */ +#define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */ +#define GPIO_FUNC_PWM (8 << GPIO_FUNC_SHIFT) /* PWM */ +#define GPIO_FUNC_EXT_PA (9 << GPIO_FUNC_SHIFT) /* Analog */ +#define GPIO_FUNC_ANA (10 << GPIO_FUNC_SHIFT) /* Analog */ +#define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */ +#define GPIO_FUNC_JTAG (14 << GPIO_FUNC_SHIFT) /* JTAG */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Must be big enough to hold the above encodings */ + +typedef uint16_t gpio_pinattr_t; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: bl808_configgpio + * + * Description: + * Configure a GPIO pin based on encoded pin attributes. + * + ****************************************************************************/ + +int bl808_configgpio(int pin, gpio_pinattr_t attr); + +/**************************************************************************** + * Name: bl808_gpiowrite + * + * Description: + * Write one or zero to the selected GPIO pin + * + ****************************************************************************/ + +void bl808_gpiowrite(int pin, bool value); + +/**************************************************************************** + * Name: bl808_gpioread + * + * Description: + * Read one or zero from the selected GPIO pin + * + ****************************************************************************/ + +bool bl808_gpioread(int pin); + +#ifdef __cplusplus +} +#endif +#undef EXTERN + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RISCV_SRC_BL808_BL808_GPIO_H */ diff --git a/arch/risc-v/src/bl808/hardware/bl808_glb.h b/arch/risc-v/src/bl808/hardware/bl808_glb.h new file mode 100644 index 0000000000000..6ad09a374eb5b --- /dev/null +++ b/arch/risc-v/src/bl808/hardware/bl808_glb.h @@ -0,0 +1,147 @@ +/**************************************************************************** + * arch/risc-v/src/bl808/hardware/bl808_glb.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_GLB_H +#define __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_GLB_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "bl808_memorymap.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Register offsets *********************************************************/ + +#define BL808_GPIO_CFG0_OFFSET 0x0008c4 /* gpio_cfg0 */ +#define BL808_GPIO_CFG1_OFFSET 0x0008c8 /* gpio_cfg1 */ +#define BL808_GPIO_CFG2_OFFSET 0x0008cc /* gpio_cfg2 */ +#define BL808_GPIO_CFG3_OFFSET 0x0008d0 /* gpio_cfg3 */ +#define BL808_GPIO_CFG4_OFFSET 0x0008d4 /* gpio_cfg4 */ +#define BL808_GPIO_CFG5_OFFSET 0x0008d8 /* gpio_cfg5 */ +#define BL808_GPIO_CFG6_OFFSET 0x0008dc /* gpio_cfg6 */ +#define BL808_GPIO_CFG7_OFFSET 0x0008e0 /* gpio_cfg7 */ +#define BL808_GPIO_CFG8_OFFSET 0x0008e4 /* gpio_cfg8 */ +#define BL808_GPIO_CFG9_OFFSET 0x0008e8 /* gpio_cfg9 */ +#define BL808_GPIO_CFG10_OFFSET 0x0008ec /* gpio_cfg10 */ +#define BL808_GPIO_CFG11_OFFSET 0x0008f0 /* gpio_cfg11 */ +#define BL808_GPIO_CFG12_OFFSET 0x0008f4 /* gpio_cfg12 */ +#define BL808_GPIO_CFG13_OFFSET 0x0008f8 /* gpio_cfg13 */ +#define BL808_GPIO_CFG14_OFFSET 0x0008fc /* gpio_cfg14 */ +#define BL808_GPIO_CFG15_OFFSET 0x000900 /* gpio_cfg15 */ +#define BL808_GPIO_CFG16_OFFSET 0x000904 /* gpio_cfg16 */ +#define BL808_GPIO_CFG17_OFFSET 0x000908 /* gpio_cfg17 */ +#define BL808_GPIO_CFG18_OFFSET 0x00090c /* gpio_cfg18 */ +#define BL808_GPIO_CFG19_OFFSET 0x000910 /* gpio_cfg19 */ +#define BL808_GPIO_CFG20_OFFSET 0x000914 /* gpio_cfg20 */ +#define BL808_GPIO_CFG21_OFFSET 0x000918 /* gpio_cfg21 */ +#define BL808_GPIO_CFG22_OFFSET 0x00091c /* gpio_cfg22 */ +#define BL808_GPIO_CFG23_OFFSET 0x000920 /* gpio_cfg23 */ +#define BL808_GPIO_CFG24_OFFSET 0x000924 /* gpio_cfg24 */ +#define BL808_GPIO_CFG25_OFFSET 0x000928 /* gpio_cfg25 */ +#define BL808_GPIO_CFG26_OFFSET 0x00092c /* gpio_cfg26 */ +#define BL808_GPIO_CFG27_OFFSET 0x000930 /* gpio_cfg27 */ +#define BL808_GPIO_CFG28_OFFSET 0x000934 /* gpio_cfg28 */ +#define BL808_GPIO_CFG29_OFFSET 0x000938 /* gpio_cfg29 */ +#define BL808_GPIO_CFG30_OFFSET 0x00093c /* gpio_cfg30 */ +#define BL808_GPIO_CFG31_OFFSET 0x000940 /* gpio_cfg31 */ +#define BL808_GPIO_CFG32_OFFSET 0x000944 /* gpio_cfg32 */ +#define BL808_GPIO_CFG33_OFFSET 0x000948 /* gpio_cfg33 */ +#define BL808_GPIO_CFG34_OFFSET 0x00094c /* gpio_cfg34 */ +#define BL808_GPIO_CFG35_OFFSET 0x000950 /* gpio_cfg35 */ +#define BL808_GPIO_CFG36_OFFSET 0x000954 /* gpio_cfg36 */ +#define BL808_GPIO_CFG37_OFFSET 0x000958 /* gpio_cfg37 */ +#define BL808_GPIO_CFG38_OFFSET 0x00095c /* gpio_cfg38 */ +#define BL808_GPIO_CFG39_OFFSET 0x000960 /* gpio_cfg39 */ +#define BL808_GPIO_CFG40_OFFSET 0x000964 /* gpio_cfg40 */ +#define BL808_GPIO_CFG41_OFFSET 0x000968 /* gpio_cfg41 */ +#define BL808_GPIO_CFG42_OFFSET 0x00096c /* gpio_cfg42 */ +#define BL808_GPIO_CFG43_OFFSET 0x000970 /* gpio_cfg43 */ +#define BL808_GPIO_CFG44_OFFSET 0x000974 /* gpio_cfg44 */ +#define BL808_GPIO_CFG45_OFFSET 0x000978 /* gpio_cfg45 */ + +/* Register definitions *****************************************************/ + +#define BL808_GPIO_CFG0 (BL808_GLB_BASE + BL808_GPIO_CFG0_OFFSET) +#define BL808_GPIO_CFG1 (BL808_GLB_BASE + BL808_GPIO_CFG1_OFFSET) +#define BL808_GPIO_CFG2 (BL808_GLB_BASE + BL808_GPIO_CFG2_OFFSET) +#define BL808_GPIO_CFG3 (BL808_GLB_BASE + BL808_GPIO_CFG3_OFFSET) +#define BL808_GPIO_CFG4 (BL808_GLB_BASE + BL808_GPIO_CFG4_OFFSET) +#define BL808_GPIO_CFG5 (BL808_GLB_BASE + BL808_GPIO_CFG5_OFFSET) +#define BL808_GPIO_CFG6 (BL808_GLB_BASE + BL808_GPIO_CFG6_OFFSET) +#define BL808_GPIO_CFG7 (BL808_GLB_BASE + BL808_GPIO_CFG7_OFFSET) +#define BL808_GPIO_CFG8 (BL808_GLB_BASE + BL808_GPIO_CFG8_OFFSET) +#define BL808_GPIO_CFG9 (BL808_GLB_BASE + BL808_GPIO_CFG9_OFFSET) +#define BL808_GPIO_CFG10 (BL808_GLB_BASE + BL808_GPIO_CFG10_OFFSET) +#define BL808_GPIO_CFG11 (BL808_GLB_BASE + BL808_GPIO_CFG11_OFFSET) +#define BL808_GPIO_CFG12 (BL808_GLB_BASE + BL808_GPIO_CFG12_OFFSET) +#define BL808_GPIO_CFG13 (BL808_GLB_BASE + BL808_GPIO_CFG13_OFFSET) +#define BL808_GPIO_CFG14 (BL808_GLB_BASE + BL808_GPIO_CFG14_OFFSET) +#define BL808_GPIO_CFG15 (BL808_GLB_BASE + BL808_GPIO_CFG15_OFFSET) +#define BL808_GPIO_CFG16 (BL808_GLB_BASE + BL808_GPIO_CFG16_OFFSET) +#define BL808_GPIO_CFG17 (BL808_GLB_BASE + BL808_GPIO_CFG17_OFFSET) +#define BL808_GPIO_CFG18 (BL808_GLB_BASE + BL808_GPIO_CFG18_OFFSET) +#define BL808_GPIO_CFG19 (BL808_GLB_BASE + BL808_GPIO_CFG19_OFFSET) +#define BL808_GPIO_CFG20 (BL808_GLB_BASE + BL808_GPIO_CFG20_OFFSET) +#define BL808_GPIO_CFG21 (BL808_GLB_BASE + BL808_GPIO_CFG21_OFFSET) +#define BL808_GPIO_CFG22 (BL808_GLB_BASE + BL808_GPIO_CFG22_OFFSET) +#define BL808_GPIO_CFG23 (BL808_GLB_BASE + BL808_GPIO_CFG23_OFFSET) +#define BL808_GPIO_CFG24 (BL808_GLB_BASE + BL808_GPIO_CFG24_OFFSET) +#define BL808_GPIO_CFG25 (BL808_GLB_BASE + BL808_GPIO_CFG25_OFFSET) +#define BL808_GPIO_CFG26 (BL808_GLB_BASE + BL808_GPIO_CFG26_OFFSET) +#define BL808_GPIO_CFG27 (BL808_GLB_BASE + BL808_GPIO_CFG27_OFFSET) +#define BL808_GPIO_CFG28 (BL808_GLB_BASE + BL808_GPIO_CFG28_OFFSET) +#define BL808_GPIO_CFG29 (BL808_GLB_BASE + BL808_GPIO_CFG29_OFFSET) +#define BL808_GPIO_CFG30 (BL808_GLB_BASE + BL808_GPIO_CFG30_OFFSET) +#define BL808_GPIO_CFG31 (BL808_GLB_BASE + BL808_GPIO_CFG31_OFFSET) +#define BL808_GPIO_CFG32 (BL808_GLB_BASE + BL808_GPIO_CFG32_OFFSET) +#define BL808_GPIO_CFG33 (BL808_GLB_BASE + BL808_GPIO_CFG33_OFFSET) +#define BL808_GPIO_CFG34 (BL808_GLB_BASE + BL808_GPIO_CFG34_OFFSET) +#define BL808_GPIO_CFG35 (BL808_GLB_BASE + BL808_GPIO_CFG35_OFFSET) +#define BL808_GPIO_CFG36 (BL808_GLB_BASE + BL808_GPIO_CFG36_OFFSET) +#define BL808_GPIO_CFG37 (BL808_GLB_BASE + BL808_GPIO_CFG37_OFFSET) +#define BL808_GPIO_CFG38 (BL808_GLB_BASE + BL808_GPIO_CFG38_OFFSET) +#define BL808_GPIO_CFG39 (BL808_GLB_BASE + BL808_GPIO_CFG39_OFFSET) +#define BL808_GPIO_CFG40 (BL808_GLB_BASE + BL808_GPIO_CFG40_OFFSET) +#define BL808_GPIO_CFG41 (BL808_GLB_BASE + BL808_GPIO_CFG41_OFFSET) +#define BL808_GPIO_CFG42 (BL808_GLB_BASE + BL808_GPIO_CFG42_OFFSET) +#define BL808_GPIO_CFG43 (BL808_GLB_BASE + BL808_GPIO_CFG43_OFFSET) +#define BL808_GPIO_CFG44 (BL808_GLB_BASE + BL808_GPIO_CFG44_OFFSET) +#define BL808_GPIO_CFG45 (BL808_GLB_BASE + BL808_GPIO_CFG45_OFFSET) + +/* Register bit definitions *************************************************/ + +//// Check every bit +#define GPIO_CFGCTL0_GPIO_0_FUNC_SEL_SHIFT (8) +#define GPIO_CFGCTL0_GPIO_0_FUNC_SEL_MASK (0x0f << GPIO_CFGCTL0_GPIO_0_FUNC_SEL_SHIFT) +#define GPIO_CFGCTL0_GPIO_0_OE (1 << 6) +#define GPIO_CFGCTL0_GPIO_0_PD (1 << 5) +#define GPIO_CFGCTL0_GPIO_0_PU (1 << 4) +#define GPIO_CFGCTL0_GPIO_0_DRV_SHIFT (2) +#define GPIO_CFGCTL0_GPIO_0_DRV_MASK (0x03 << GPIO_CFGCTL0_GPIO_0_DRV_SHIFT) +#define GPIO_CFGCTL0_GPIO_0_SMT (1 << 1) +#define GPIO_CFGCTL0_GPIO_0_IE (1 << 0) +//// + +#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_GLB_H */ diff --git a/boards/Kconfig b/boards/Kconfig index efef741db0306..2c54074948350 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -423,7 +423,7 @@ config ARCH_BOARD_FRANZININHO_WIFI config ARCH_BOARD_ESP32S3_DEVKIT bool "Espressif ESP32-S3 DevKit" - depends on ARCH_CHIP_ESP32S3WROOM1 || ARCH_CHIP_ESP32S3MINI1 || ARCH_CHIP_ESP32S3WROOM2 || ARCH_CHIP_ESP32S3WROOM2_32M + depends on ARCH_CHIP_ESP32S3WROOM1 || ARCH_CHIP_ESP32S3MINI1 || ARCH_CHIP_ESP32S3WROOM2 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS if ESP32S3_GPIO_IRQ @@ -447,7 +447,7 @@ config ARCH_BOARD_ESP32S3_EYE config ARCH_BOARD_ESP32S3_LCD_EV bool "Espressif ESP32-S3-LCD-EV Board" - depends on ARCH_CHIP_ESP32S3WROOM2 || ARCH_CHIP_ESP32S3WROOM2_32M + depends on ARCH_CHIP_ESP32S3WROOM2 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS if ESP32S3_GPIO_IRQ @@ -465,7 +465,7 @@ config ARCH_BOARD_ESP32S3_LCD_EV config ARCH_BOARD_ESP32S3_BOX bool "Espressif ESP32-S3-BOX" - depends on ARCH_CHIP_ESP32S3WROOM2 || ARCH_CHIP_ESP32S3WROOM2_32M + depends on ARCH_CHIP_ESP32S3WROOM2 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS if ESP32S3_GPIO_IRQ @@ -487,21 +487,13 @@ config ARCH_BOARD_ESP32S3_MEADOW The ESP32-S3-Meadow is a small-sized board produced by WildernessLabs featuring the ESP32-S3 CPU with 32MiB Octal SPI PSRAM and 64 MiB flash. -config ARCH_BOARD_ESP32C6_DEVKITC - bool "Espressif ESP32-C6-DevKitC-1" - depends on ARCH_CHIP_ESP32C6WROOM1 +config ARCH_BOARD_ESP32C6_DEVKIT + bool "Espressif ESP32-C6 Generic DevKit" + depends on ESPRESSIF_ESP32C6 select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS ---help--- - The ESP32-C6 DevKitC-1 features the ESP32-C6 CPU with a RISC-V core. - -config ARCH_BOARD_ESP32C6_DEVKITM - bool "Espressif ESP32-C6 DevKitM-1" - depends on ARCH_CHIP_ESP32C6MINI1 - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - The ESP32-C6 DevKitM-1 features the ESP32-C6 CPU with a RISC-V core. + The ESP32-C6 DevKit features the ESP32-C6 CPU with a RISC-V core. config ARCH_BOARD_ESP32H2_DEVKIT bool "Espressif ESP32-H2 Generic DevKit" @@ -646,25 +638,6 @@ config ARCH_BOARD_GD32F450ZK_EVAL ---help--- GD32 MCU GD32F450ZK-EVAL board based on the GD32F4 GD32F450ZKT6 MCU. -config ARCH_BOARD_GD32F450ZK_AIOTBOX - bool "GD32 MCU GD32F450ZK-AIOTBOX" - depends on ARCH_CHIP_GD32F450ZK - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - GD32 MCU GD32F450ZK-AIOTBOX board based on the GD32F4 GD32F450ZKT6 MCU. - -config ARCH_BOARD_GD32F470ZK_AIOTBOX - bool "GD32 MCU GD32F470ZK-AIOTBOX" - depends on ARCH_CHIP_GD32F470ZK - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - GD32 MCU GD32F470ZK-AIOTBOX board based on the GD32F4 GD32F470ZKT6 MCU. - - config ARCH_BOARD_GD32F470ZK_EVAL bool "GD32 MCU GD32F470ZK" depends on ARCH_CHIP_GD32F470ZK @@ -1716,15 +1689,6 @@ config ARCH_BOARD_NUCLEO_G071RB This is a minimal configuration that supports low-level test of the Nucleo G071RB in the NuttX source tree. -config ARCH_BOARD_WEACT_STM32H743 - bool "WeAct Studio STM32H743" - depends on ARCH_CHIP_STM32H743VI - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - This is WeAct MiniSTM32H7xx (STM32H743VIT6) board. - config ARCH_BOARD_NUCLEO_H743ZI bool "STM32H743 Nucleo H743ZI" depends on ARCH_CHIP_STM32H743ZI @@ -1747,7 +1711,6 @@ config ARCH_BOARD_NUCLEO_H745ZI depends on ARCH_CHIP_STM32H745ZI select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS - select STM32H7_HAVE_PWR_DIRECT_SMPS_SUPPLY ---help--- STMicro Nucleo H745ZI board based on the STMicro STM32H745ZI MCU. @@ -1768,12 +1731,6 @@ config ARCH_BOARD_LINUM_STM32H753BI ---help--- The Linum board is based on the STMicro STM32H753BI MCU. -config ARCH_BOARD_OPENH743I - bool "Waveshare OpenH743I board" - depends on ARCH_CHIP_STM32H743II - ---help--- - Waveshare OpenH743I board based on the STMicro STM32H743II MCU. - config ARCH_BOARD_NUCLEO_L152RE bool "STM32L152 Nucleo L152RE" depends on ARCH_CHIP_STM32L152RE @@ -1862,7 +1819,7 @@ config ARCH_BOARD_QEMU_I486 config ARCH_BOARD_INTEL64_QEMU bool "Intel64 for Qemu simulator" - depends on ARCH_CHIP_INTEL64_QEMU + depends on ARCH_X86_64 || ARCH_INTEL64 ---help--- Port of NuttX to QEMU in intel64 mode. This port will also run on real generic Intel64 hardware. @@ -1870,9 +1827,6 @@ config ARCH_BOARD_INTEL64_QEMU config ARCH_BOARD_RASPBERRYPI_PICO bool "Raspberry Pi Pico board (not W)" depends on ARCH_CHIP_RP2040 - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS ---help--- This is a port to the Raspberry Pi Pico board. @@ -1925,16 +1879,6 @@ config ARCH_BOARD_WAVESHARE_RP2040_LCD_1_28 This is a port to the Waveshare RP2040 LCD 1.28 board. Support is derived from Raspberry Pi Pico support. -config ARCH_BOARD_W5500_EVB_PICO - bool "WIZnet W5500-EVB-Pico board" - depends on ARCH_CHIP_RP2040 - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - This is a port to the WIZnet W5500-EVB-Pico board. - Support is derived from Raspberry Pi Pico support. - config ARCH_BOARD_RX65N bool "RX65N renesas board" depends on ARCH_CHIP_R5F565NEDDFC @@ -2003,17 +1947,11 @@ config ARCH_BOARD_K230_CANMV config ARCH_BOARD_BL808_OX64 bool "PINE64 Ox64" depends on ARCH_CHIP_BL808 + select ARCH_HAVE_LEDS ---help--- This options selects support for NuttX on PINE64 Ox64 based on Bouffalo Lab BL808 SoC. -config ARCH_BOARD_SG2000_MILKV_DUOS - bool "Milk-V Duo S" - depends on ARCH_CHIP_SG2000 - ---help--- - This options selects support for NuttX on Milk-V Duo S based - on SOPHGO SG2000 SoC. - config ARCH_BOARD_S32K118EVB bool "NXP S32K118EVB" depends on ARCH_CHIP_S32K118 @@ -2092,14 +2030,6 @@ config ARCH_BOARD_MR_CANHUBK3 This options selects support for NuttX on the NXP MR-CANHUBK3 board featuring the S32K344 Cortex-M7. -config ARCH_BOARD_MPS3_AN547 - bool "Arm MPS3 AN547" - depends on ARCH_CHIP_MPS3_AN547 - select ARCH_HAVE_IRQBUTTONS - ---help--- - This options selects support for NuttX on the MPS3 AN547 - board featuring the Cortex-M55. - config ARCH_BOARD_SABRE_6QUAD bool "NXP/Freescale i.MX6 Sabre-6Quad board" depends on ARCH_CHIP_IMX6_6QUAD @@ -2110,12 +2040,6 @@ config ARCH_BOARD_SABRE_6QUAD This options selects support for NuttX on the NXP/Freescale Sabre board featuring the iMX 6Quad CPU. -config ARCH_BOARD_TC397 - bool "Infineon's AURIX TC397 board: KIT_A2G_TC397_5V_TFT" - ---help--- - This options selects support for NuttX on the Infineon's AURIX board - board featuring the TC397 6Quad CPU. - config ARCH_BOARD_QEMU_ARMV7A bool "Qemu ARMv7a CPUs board" depends on ARCH_CHIP_QEMU_ARM @@ -2183,14 +2107,6 @@ config ARCH_BOARD_IMX8QM_MEK This options selects support for NuttX on the NXP i.MX8 QuadMax CPUs MEK configure board with ARM Cortex-A53. -config ARCH_BOARD_IMX93_EVK - bool "NXP i.MX93 CPUs EVK board" - depends on ARCH_CHIP_IMX93 - select ARCH_HAVE_IRQBUTTONS - ---help--- - This options selects support for NuttX on the NXP i.MX93 CPUs EVK - board with ARM Cortex-A55. - config ARCH_BOARD_SAMA5D2_XULT bool "Atmel SAMA5D2 Xplained Ultra development board" depends on ARCH_CHIP_ATSAMA5D27 @@ -2596,7 +2512,6 @@ config ARCH_BOARD_STM32H747I_DISCO select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS - select STM32H7_HAVE_PWR_DIRECT_SMPS_SUPPLY ---help--- STMicro STM32H747I-DISCO development board featuring the STM32H747XIH6 MCU. The STM32H747XIH6 is a dual core (480MHz Cortex-M7, 240MHz Cortex-M4) @@ -3062,14 +2977,6 @@ config ARCH_BOARD_S698PM_DKIT ---help--- none -config ARCH_BOARD_HPM6360EVK - bool "Hpmicro hpm6360evk" - depends on ARCH_CHIP_HPM6360IPA - select ARCH_HAVE_LEDS - ---help--- - This is the board configuration for the port of NuttX to the Hpmicro hpm6750evk2 - board. This board features the RISC-V hpm6340. - config ARCH_BOARD_HPM6750EVK2 bool "Hpmicro hpm6750evk2" depends on ARCH_CHIP_HPM6750 @@ -3208,9 +3115,8 @@ config ARCH_BOARD default "esp32s3-meadow" if ARCH_BOARD_ESP32S3_MEADOW default "esp32s3-lcd-ev" if ARCH_BOARD_ESP32S3_LCD_EV default "esp32s3-box" if ARCH_BOARD_ESP32S3_BOX - default "esp32c6-devkitc" if ARCH_BOARD_ESP32C6_DEVKITC - default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM - default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT + default "esp32c6-devkit" if ARCH_BOARD_ESP32C6_DEVKIT + default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG @@ -3225,9 +3131,7 @@ config ARCH_BOARD default "freedom-kl25z" if ARCH_BOARD_FREEDOM_KL25Z default "freedom-kl26z" if ARCH_BOARD_FREEDOM_KL26Z default "gd32f450zk-eval" if ARCH_BOARD_GD32F450ZK_EVAL - default "gd32f450zk-aiotbox" if ARCH_BOARD_GD32F450ZK_AIOTBOX default "gd32f470zk-eval" if ARCH_BOARD_GD32F470ZK_EVAL - default "gd32f470zk-aiotbox" if ARCH_BOARD_GD32F470ZK_AIOTBOX default "gd32f470ik-eval" if ARCH_BOARD_GD32F470IK_EVAL default "hifive1-revb" if ARCH_BOARD_HIFIVE1_REVB default "hymini-stm32v" if ARCH_BOARD_HYMINI_STM32V @@ -3305,13 +3209,11 @@ config ARCH_BOARD default "stm32g071b-disco" if ARCH_BOARD_STM32G071B_DISCO default "nucleo-g070rb" if ARCH_BOARD_NUCLEO_G070RB default "nucleo-g071rb" if ARCH_BOARD_NUCLEO_G071RB - default "weact-stm32h743" if ARCH_BOARD_WEACT_STM32H743 default "nucleo-h743zi" if ARCH_BOARD_NUCLEO_H743ZI default "nucleo-h743zi2" if ARCH_BOARD_NUCLEO_H743ZI2 default "nucleo-h745zi" if ARCH_BOARD_NUCLEO_H745ZI default "stm32h745i-disco" if ARCH_BOARD_STM32H745I_DISCO default "linum-stm32h753bi" if ARCH_BOARD_LINUM_STM32H753BI - default "openh743i" if ARCH_BOARD_OPENH743I default "nucleo-l073rz" if ARCH_BOARD_NUCLEO_L073RZ default "nucleo-l152re" if ARCH_BOARD_NUCLEO_L152RE default "nucleo-l432kc" if ARCH_BOARD_NUCLEO_L432KC @@ -3347,7 +3249,7 @@ config ARCH_BOARD default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT default "qemu-i486" if ARCH_BOARD_QEMU_I486 - default "qemu-intel64" if ARCH_BOARD_INTEL64_QEMU + default "intel64-qemu" if ARCH_BOARD_INTEL64_QEMU default "raspberrypi-pico" if ARCH_BOARD_RASPBERRYPI_PICO default "raspberrypi-pico-w" if ARCH_BOARD_RASPBERRYPI_PICO_W default "pimoroni-tiny2040" if ARCH_BOARD_PIMORONI_TINY2040 @@ -3356,7 +3258,6 @@ config ARCH_BOARD default "adafruit-kb2040" if ARCH_BOARD_ADAFRUIT_KB2040 default "adafruit-qt-py-rp2040" if ARCH_BOARD_ADAFRUIT_QT_PY_RP2040 default "waveshare-rp2040-lcd-1.28" if ARCH_BOARD_WAVESHARE_RP2040_LCD_1_28 - default "w5500-evb-pico" if ARCH_BOARD_W5500_EVB_PICO default "rx65n" if ARCH_BOARD_RX65N default "rx65n-rsk1mb" if ARCH_BOARD_RX65N_RSK1MB default "rx65n-rsk2mb" if ARCH_BOARD_RX65N_RSK2MB @@ -3369,15 +3270,12 @@ config ARCH_BOARD default "s32k148evb" if ARCH_BOARD_S32K148EVB default "s32k344evb" if ARCH_BOARD_S32K344EVB default "mr-canhubk3" if ARCH_BOARD_MR_CANHUBK3 - default "mps3-an547" if ARCH_BOARD_MPS3_AN547 default "rv32m1-vega" if ARCH_BOARD_RV32M1_VEGA default "rv-virt" if ARCH_BOARD_QEMU_RV_VIRT default "star64" if ARCH_BOARD_JH7110_STAR64 default "canmv230" if ARCH_BOARD_K230_CANMV default "ox64" if ARCH_BOARD_BL808_OX64 - default "milkv_duos" if ARCH_BOARD_SG2000_MILKV_DUOS default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD - default "tc397" if ARCH_BOARD_TC397 default "qemu-armv7a" if ARCH_BOARD_QEMU_ARMV7A default "qemu-armv8a" if ARCH_BOARD_QEMU_ARMV8A default "pinephone" if ARCH_BOARD_PINEPHONE @@ -3386,7 +3284,6 @@ config ARCH_BOARD default "fvp-armv8r" if ARCH_BOARD_FVP_ARMV8R default "fvp-armv8r-aarch32" if ARCH_BOARD_FVP_ARMV8R_AARCH32 default "imx8qm-mek" if ARCH_BOARD_IMX8QM_MEK - default "imx93-evk" if ARCH_BOARD_IMX93_EVK default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT default "giant-board" if ARCH_BOARD_GIANT_BOARD default "jupiter-nano" if ARCH_BOARD_JUPITER_NANO @@ -3483,7 +3380,6 @@ config ARCH_BOARD default "xx3803" if ARCH_BOARD_XX3803 default "xx3823" if ARCH_BOARD_XX3823 default "s698pm-dkit" if ARCH_BOARD_S698PM_DKIT - default "hpm6360evk" if ARCH_BOARD_HPM6360EVK default "hpm6750evk2" if ARCH_BOARD_HPM6750EVK2 default "at32f437-mini" if ARCH_BOARD_AT32F437_MINI @@ -3581,12 +3477,6 @@ endif if ARCH_BOARD_SABRE_6QUAD source "boards/arm/imx6/sabre-6quad/Kconfig" endif -if ARCH_BOARD_TC397 -source "boards/tricore/tc3xx/tc397/Kconfig" -endif -if ARCH_BOARD_MPS3_AN547 -source "boards/arm/mps/mps3-an547/Kconfig" -endif if ARCH_BOARD_QEMU_ARMV7A source "boards/arm/qemu/qemu-armv7a/Kconfig" endif @@ -3608,9 +3498,6 @@ endif if ARCH_BOARD_IMX8QM_MEK source "boards/arm64/imx8/imx8qm-mek/Kconfig" endif -if ARCH_BOARD_IMX93_EVK -source "boards/arm64/imx9/imx93-evk/Kconfig" -endif if ARCH_BOARD_IMXRT1020_EVK source "boards/arm/imxrt/imxrt1020-evk/Kconfig" endif @@ -3659,15 +3546,9 @@ endif if ARCH_BOARD_GD32F450ZK_EVAL source "boards/arm/gd32f4/gd32f450zk-eval/Kconfig" endif -if ARCH_BOARD_GD32F450ZK_AIOTBOX -source "boards/arm/gd32f4/gd32f450zk-aiotbox/Kconfig" -endif if ARCH_BOARD_GD32F470ZK_EVAL source "boards/arm/gd32f4/gd32f470zk-eval/Kconfig" endif -if ARCH_BOARD_GD32F470ZK_AIOTBOX -source "boards/arm/gd32f4/gd32f470zk-aiotbox/Kconfig" -endif if ARCH_BOARD_GD32F470IK_EVAL source "boards/arm/gd32f4/gd32f470ik-eval/Kconfig" endif @@ -3770,15 +3651,6 @@ endif if ARCH_BOARD_NRF52840_DK source "boards/arm/nrf52/nrf52840-dk/Kconfig" endif -if ARCH_BOARD_THINGY52 -source "boards/arm/nrf52/thingy52/Kconfig" -endif -if ARCH_BOARD_THINGY91_NRF52 -source "boards/arm/nrf52/thingy91-nrf52/Kconfig" -endif -if ARCH_BOARD_NRF9160_DK_NRF52 -source "boards/arm/nrf52/nrf9160-dk-nrf52/Kconfig" -endif if ARCH_BOARD_NUTINY_NUC120 source "boards/arm/nuc1xx/nutiny-nuc120/Kconfig" endif @@ -3941,9 +3813,6 @@ endif if ARCH_BOARD_STM32H747I_DISCO source "boards/arm/stm32h7/stm32h747i-disco/Kconfig" endif -if ARCH_BOARD_WEACT_STM32H743 -source "boards/arm/stm32h7/weact-stm32h743/Kconfig" -endif if ARCH_BOARD_NUCLEO_H743ZI source "boards/arm/stm32h7/nucleo-h743zi/Kconfig" endif @@ -3959,9 +3828,6 @@ endif if ARCH_BOARD_LINUM_STM32H753BI source "boards/arm/stm32h7/linum-stm32h753bi/Kconfig" endif -if ARCH_BOARD_OPENH743I -source "boards/arm/stm32h7/openh743i/Kconfig" -endif if ARCH_BOARD_B_L475E_IOT01A source "boards/arm/stm32l4/b-l475e-iot01a/Kconfig" endif @@ -4310,9 +4176,6 @@ endif if ARCH_BOARD_BL808_OX64 source "boards/risc-v/bl808/ox64/Kconfig" endif -if ARCH_BOARD_SG2000_MILKV_DUOS -source "boards/risc-v/sg2000/milkv_duos/Kconfig" -endif if ARCH_BOARD_ESP32C3_DEVKIT source "boards/risc-v/esp32c3-legacy/esp32c3-devkit/Kconfig" endif @@ -4346,11 +4209,8 @@ endif if ARCH_BOARD_ESP32S3_BOX source "boards/xtensa/esp32s3/esp32s3-box/Kconfig" endif -#if ARCH_BOARD_ESP32C6_DEVKITC -#source "boards/risc-v/esp32c6/esp32c6-devkitc/Kconfig" -#endif -#if ARCH_BOARD_ESP32C6_DEVKITM -#source "boards/risc-v/esp32c6/esp32c6-devkitm/Kconfig" +#if ARCH_BOARD_ESP32C6_DEVKIT +#source "boards/risc-v/esp32c6/esp32c6-devkit/Kconfig" #endif if ARCH_BOARD_ESP32H2_DEVKIT source "boards/risc-v/esp32h2/esp32h2-devkit/Kconfig" @@ -4457,9 +4317,6 @@ endif if ARCH_BOARD_TLSR8278ADK80D source "boards/arm/tlsr82/tlsr8278adk80d/Kconfig" endif -if ARCH_BOARD_HPM6360EVK -source "boards/risc-v/hpm6000/hpm6360evk/Kconfig" -endif if ARCH_BOARD_HPM6750EVK2 source "boards/risc-v/hpm6750/hpm6750evk2/Kconfig" endif @@ -4752,13 +4609,6 @@ config BOARDCTL_TESTSET Enables support for the BOARDIOC_SPINLOCK boardctl() command. Architecture specific logic must provide up_testset() interface. -config BOARDCTL_IRQ_AFFINITY - bool "Set an IRQ affinity to CPUs by software" - default n - depends on SMP - ---help--- - Enables support for Set an IRQ affinity to CPUs by software. - config BOARDCTL_IOCTL bool "Board-specific boardctl() commands" default n @@ -4774,12 +4624,6 @@ config BOARD_USBDEV_SERIALSTR ---help--- Use board unique serial number to iSerialNumber in the device descriptor. -config BOARD_USBDEV_PIDVID - bool "Board-specific usbdev pid/vid" - default n - ---help--- - Use board unique pid/vid. - config BOARD_MEMORY_RANGE string "Board memory range" default "" diff --git a/boards/risc-v/bl808/ox64/configs/nsh/defconfig b/boards/risc-v/bl808/ox64/configs/nsh/defconfig index f17bf326b7b8b..605921abb438a 100644 --- a/boards/risc-v/bl808/ox64/configs/nsh/defconfig +++ b/boards/risc-v/bl808/ox64/configs/nsh/defconfig @@ -44,6 +44,7 @@ CONFIG_DEBUG_SYMBOLS=y CONFIG_DEV_ZERO=y CONFIG_ELF=y CONFIG_EXAMPLES_HELLO=m +CONFIG_EXAMPLES_LEDS=y CONFIG_FS_PROCFS=y CONFIG_FS_ROMFS=y CONFIG_IDLETHREAD_STACKSIZE=3072 @@ -66,11 +67,11 @@ CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_FILE_APPS=y CONFIG_NSH_READLINE=y CONFIG_PATH_INITIAL="/system/bin" +CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=65536 CONFIG_RAM_SIZE=1048576 CONFIG_RAM_START=0x50200000 CONFIG_READLINE_CMD_HISTORY=y CONFIG_RR_INTERVAL=200 -CONFIG_SCHED_HAVE_PARENT=y CONFIG_SCHED_LPWORK=y CONFIG_SCHED_WAITPID=y CONFIG_STACK_COLORATION=y @@ -81,6 +82,9 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH_PROGNAME="init" CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y +CONFIG_TLS_LOG2_MAXSTACK=16 CONFIG_UART3_BAUD=2000000 CONFIG_UART3_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 +CONFIG_USERLED=y +CONFIG_USERLED_LOWER=y diff --git a/boards/risc-v/bl808/ox64/include/board.h b/boards/risc-v/bl808/ox64/include/board.h index 59546c4c72f01..de6e2201f7767 100644 --- a/boards/risc-v/bl808/ox64/include/board.h +++ b/boards/risc-v/bl808/ox64/include/board.h @@ -31,6 +31,26 @@ * Pre-processor Definitions ****************************************************************************/ +/* LED definitions **********************************************************/ + +/* LED index values for use with board_userled() */ + +typedef enum +{ + BOARD_LED1 = 0, /* Green LED */ + BOARD_LED2 = 1, /* Red LED */ + BOARD_LED3 = 2, /* Blue LED */ + BOARD_LEDS /* Number of LEDs */ +} led_typedef_enum; + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) + +/* Auto LEDs */ + #define LED_STARTED 0 /* N/A */ #define LED_HEAPALLOCATE 1 /* N/A */ #define LED_IRQSENABLED 2 /* N/A */ @@ -39,7 +59,7 @@ #define LED_SIGNAL 5 /* N/A */ #define LED_ASSERTION 6 /* N/A */ #define LED_PANIC 7 /* N/A */ -#define LED_CPU 8 /* LED */ +#define LED_IDLE 8 /* LED */ /**************************************************************************** * Public Types diff --git a/boards/risc-v/bl808/ox64/scripts/gnu-elf.ld b/boards/risc-v/bl808/ox64/scripts/gnu-elf.ld new file mode 100644 index 0000000000000..f550c54f3de27 --- /dev/null +++ b/boards/risc-v/bl808/ox64/scripts/gnu-elf.ld @@ -0,0 +1,131 @@ +/**************************************************************************** + * boards/risc-v/qemu-rv/rv-virt/scripts/gnu-elf.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +SECTIONS +{ + . = 0x80000000; + .text : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + . = 0x80101000; + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + . = ALIGN(4); + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP(*(.init_array .ctors)) + _ectors = . ; + } + + .dtors : + { + _sdtors = . ; + KEEP (*(.dtors)) /* Old ABI: Unallocated */ + KEEP (*(.fini_array)) /* New ABI: Allocated */ + KEEP (*(SORT(.fini_array.*))) + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Thread local storage support */ + .tdata : { + _stdata = ABSOLUTE(.); + KEEP (*(.tdata .tdata.* .gnu.linkonce.td.*)); + _etdata = ABSOLUTE(.); + } + + .tbss : { + _stbss = ABSOLUTE(.); + KEEP (*(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon)); + _etbss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/risc-v/bl808/ox64/scripts/ld.script b/boards/risc-v/bl808/ox64/scripts/ld.script index e47b594ff0ab1..7a251a5d2c099 100644 --- a/boards/risc-v/bl808/ox64/scripts/ld.script +++ b/boards/risc-v/bl808/ox64/scripts/ld.script @@ -23,7 +23,7 @@ MEMORY kflash (rx) : ORIGIN = 0x50200000, LENGTH = 2048K /* w/ cache */ ksram (rwx) : ORIGIN = 0x50400000, LENGTH = 2048K /* w/ cache */ pgram (rwx) : ORIGIN = 0x50600000, LENGTH = 4096K /* w/ cache */ - ramdisk (rwx) : ORIGIN = 0x50A00000, LENGTH = 16M /* w/ cache */ + ramdisk (rwx) : ORIGIN = 0x50A00000, LENGTH = 40M /* w/ cache */ } OUTPUT_ARCH("riscv") @@ -116,7 +116,6 @@ SECTIONS *(.sbss.*) *(.gnu.linkonce.b*) *(COMMON) - . = ALIGN(32); _ebss = . ; } > ksram diff --git a/boards/risc-v/bl808/ox64/src/Makefile b/boards/risc-v/bl808/ox64/src/Makefile index 0131625ea2434..3b072df342723 100644 --- a/boards/risc-v/bl808/ox64/src/Makefile +++ b/boards/risc-v/bl808/ox64/src/Makefile @@ -22,6 +22,6 @@ include $(TOPDIR)/Make.defs RCSRCS = etc/init.d/rc.sysinit etc/init.d/rcS -CSRCS = bl808_appinit.c +CSRCS = bl808_appinit.c bl808_autoleds.c bl808_userleds.c include $(TOPDIR)/boards/Board.mk diff --git a/boards/risc-v/bl808/ox64/src/bl808_appinit.c b/boards/risc-v/bl808/ox64/src/bl808_appinit.c index d960bc7f4c5ec..2ac2f9d32dcb2 100644 --- a/boards/risc-v/bl808/ox64/src/bl808_appinit.c +++ b/boards/risc-v/bl808/ox64/src/bl808_appinit.c @@ -28,12 +28,14 @@ #include #include #include +#include //// #include #include #include #include #include +#include "bl808_gpio.h" //// /**************************************************************************** * Pre-processor Definitions @@ -164,4 +166,30 @@ void board_late_initialize(void) mount(NULL, "/proc", "procfs", 0, NULL); #endif + +#ifdef CONFIG_USERLED + ////TODO: Move to bringup.c + /* Register the LED driver */ + + int ret = userled_lower_initialize("/dev/userleds"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + } +#endif + + ////TODO + #define GPIO_PIN 29 + #define GPIO_ATTR (GPIO_OUTPUT | GPIO_FUNC_SWGPIO) + + // _info("Config GPIO: pin=%d, attr=0x%x\n", GPIO_PIN, GPIO_ATTR); + int ret2 = bl808_configgpio(GPIO_PIN, GPIO_ATTR); + DEBUGASSERT(ret2 == OK); + + // _info("Set GPIO: pin=%d\n", GPIO_PIN); + bl808_gpiowrite(GPIO_PIN, true); + up_mdelay(1000); + + // _info("Clear GPIO: pin=%d\n", GPIO_PIN); + bl808_gpiowrite(GPIO_PIN, false); } diff --git a/boards/risc-v/bl808/ox64/src/bl808_autoleds.c b/boards/risc-v/bl808/ox64/src/bl808_autoleds.c new file mode 100644 index 0000000000000..65d004d8214f7 --- /dev/null +++ b/boards/risc-v/bl808/ox64/src/bl808_autoleds.c @@ -0,0 +1,252 @@ +/**************************************************************************** + * boards/arm64/a64/pinephone/src/pinephone_autoleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include +#include + +#include "chip.h" +////#include "arm64_internal.h" +////#include "pinephone.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LED index */ + +// static const uint32_t g_led_map[BOARD_LEDS] = +// { +// LED1, +// LED2, +// LED3 +// }; + +static bool g_initialized; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Turn on selected led */ + +static void bl808_led_on(led_typedef_enum led_num) +{ + ////TODO: gpio_write(g_led_map[led_num], true); +} + +/* Turn off selected led */ + +static void bl808_led_off(led_typedef_enum led_num) +{ + ////TODO: gpio_write(g_led_map[led_num], false); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * This function is called very early in initialization to perform board- + * specific initialization of LED-related resources. This includes such + * things as, for example, configure GPIO pins to drive the LEDs and also + * putting the LEDs in their correct initial state. + * + * NOTE: In most architectures, board_autoled_initialize() is called from + * board-specific initialization logic. But there are a few architectures + * where this initialization function is still called from common chip + * architecture logic. This interface is not, however, a common board + * interface in any event and, hence, the usage of the name + * board_autoled_initialize is deprecated. + * + * WARNING: This interface name will eventually be removed; do not use it + * in new board ports. New implementations should use the naming + * conventions for "Microprocessor-Specific Interfaces" or the "Board- + * Specific Interfaces" as described above. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + int i; + + /* Configure the LED GPIO for output. */ + + for (i = 0; i < BOARD_LEDS; i++) + { + ////TODO: int ret = gpio_config(g_led_map[i]); + ////TODO: DEBUGASSERT(ret == OK); + } +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Set the LED configuration into the ON condition for the state provided + * by the led parameter. This may be one of: + * + * LED_STARTED NuttX has been started + * LED_HEAPALLOCATE Heap has been allocated + * LED_IRQSENABLED Interrupts enabled + * LED_STACKCREATED Idle stack created + * LED_INIRQ In an interrupt + * LED_SIGNAL In a signal handler + * LED_ASSERTION An assertion failed + * LED_PANIC The system has crashed + * LED_IDLE MCU is in sleep mode + * + * Where these values are defined in a board-specific way in the standard + * board.h header file exported by every architecture. + * + * Input Parameters: + * led - Identifies the LED state to put in the ON state (which may or may + * not equate to turning an LED on) + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_HEAPALLOCATE: + bl808_led_on(BOARD_LED1); + break; + + case LED_IRQSENABLED: + bl808_led_on(BOARD_LED2); + break; + + case LED_STACKCREATED: + bl808_led_on(BOARD_LED3); + g_initialized = true; + break; + + case LED_INIRQ: + bl808_led_on(BOARD_LED1); + bl808_led_on(BOARD_LED2); + break; + + case LED_SIGNAL: + bl808_led_on(BOARD_LED1); + bl808_led_on(BOARD_LED3); + break; + + case LED_ASSERTION: + bl808_led_on(BOARD_LED2); + bl808_led_on(BOARD_LED3); + break; + + case LED_PANIC: + bl808_led_on(BOARD_LED1); + break; + + case LED_IDLE: + bl808_led_on(BOARD_LED2); + break; + + default: + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Set the LED configuration into the OFF condition for the state provided + * by the led parameter. This may be one of: + * + * LED_INIRQ Leaving an interrupt + * LED_SIGNAL Leaving a signal handler + * LED_ASSERTION Recovering from an assertion failure + * LED_PANIC The system has crashed (blinking). + * LED_IDLE MCU is not in sleep mode + * + * Where these values are defined in a board-specific way in the standard + * board.h header file exported by every architecture. + * + * Input Parameters: + * led - Identifies the LED state to put in the OFF state (which may or may + * not equate to turning an LED off) + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_SIGNAL: + bl808_led_off(BOARD_LED1); + bl808_led_off(BOARD_LED3); + break; + + case LED_INIRQ: + bl808_led_off(BOARD_LED1); + bl808_led_off(BOARD_LED2); + break; + + case LED_ASSERTION: + bl808_led_off(BOARD_LED2); + bl808_led_off(BOARD_LED3); + break; + + case LED_PANIC: + bl808_led_off(BOARD_LED1); + break; + + case LED_IDLE: + bl808_led_off(BOARD_LED2); + break; + + default: + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/risc-v/bl808/ox64/src/bl808_userleds.c b/boards/risc-v/bl808/ox64/src/bl808_userleds.c new file mode 100644 index 0000000000000..4f017441a448a --- /dev/null +++ b/boards/risc-v/bl808/ox64/src/bl808_userleds.c @@ -0,0 +1,203 @@ +/**************************************************************************** + * boards/arm64/a64/pinephone/src/pinephone_userleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include +#include + +#include "chip.h" +#include "bl808_gpio.h" + +////TODO +#define GPIO_PIN 29 +#define GPIO_ATTR (GPIO_OUTPUT | GPIO_FUNC_SWGPIO) + +#ifdef CONFIG_USERLED + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LED index */ + +// static const uint32_t g_led_map[BOARD_LEDS] = +// { +// LED1, +// LED2, +// LED3 +// }; + +static const uint32_t g_led_setmap[BOARD_LEDS] = +{ + BOARD_LED1_BIT, + BOARD_LED2_BIT, + BOARD_LED3_BIT +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * This function may called from application-specific logic during its + * to perform board-specific initialization of LED resources. This + * includes such things as, for example, configure GPIO pins to drive the + * LEDs and also putting the LEDs in their correct initial state. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be + * available to control the LEDs directly from user board logic or + * indirectly user applications (via the common LED character driver). + * + * Most boards have only a few LEDs and in those cases all LEDs may be + * used by the NuttX LED logic exclusively and may not be available for + * use by user logic if CONFIG_ARCH_LEDS=y. + * + * NOTE: The LED number is returned. + * + * Input Parameters: + * None + * + * Returned Value: + * Number of LEDs on board + * + ****************************************************************************/ + +uint32_t board_userled_initialize(void) +{ + int i; + + //// TODO + int ret = bl808_configgpio(GPIO_PIN, GPIO_ATTR); + DEBUGASSERT(ret == OK); + + /* Configure the LED GPIO for output. */ + + for (i = 0; i < BOARD_LEDS; i++) + { + ////TODO: int ret = gpio_config(g_led_map[i]); + ////TODO: DEBUGASSERT(ret == OK); + } + + return BOARD_LEDS; +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * This interface may be used by application specific logic to set the + * state of a single LED. Definitions for the led identification are + * provided in the board-specific board.h header file that may be included + * like: + * + * #included + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be + * available to control the LEDs directly from user board logic or + * indirectly user applications (via the common LED character driver). + * + * Most boards have only a few LEDs and in those cases all LEDs may be + * used by the NuttX LED logic exclusively and may not be available for + * use by user logic if CONFIG_ARCH_LEDS=y. + * + * Input Parameters: + * led - LED number + * ledon - True if LED should be turned on; False to turn off + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + // _info("led=%d, ledon=%d\n", led, ledon);//// + if ((unsigned)led < BOARD_LEDS) + { + ////TODO: gpio_write(g_led_map[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * This interface may be used by application specific logic to set the + * state of all board LED. Definitions for the led set member + * identification is provided in the board-specific board.h header file + * that may be includedlike: + * + * #included + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be + * available to control the LEDs directly from user board logic or + * indirectly user applications (via the common LED character driver). + * + * Most boards have only a few LEDs and in those cases all LEDs may be + * used by the NuttX LED logic exclusively and may not be available for + * use by user logic if CONFIG_ARCH_LEDS=y. + * + * Input Parameters: + * ledset - Bitset of LEDs to be turned on and off + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_userled_all(uint32_t ledset) +{ + // _info("ledset=0x%x\n", ledset);//// + int i; + + // For LED 0 to 2... + for (i = 0; i < BOARD_LEDS; i++) + { + // Get the desired state of the LED + bool val = ((ledset & g_led_setmap[i]) != 0); + // _info("led=%d, val=%d\n", i, val);//// + + // If this is LED 0... + if (i == 0) + { + bl808_gpiowrite(GPIO_PIN, val); + } + ////TODO: gpio_write(g_led_map[i], (ledset & g_led_setmap[i]) != 0); + } +} + +#endif /* CONFIG_USERLED */