harness.qsf

#============================================================
# Altera DE1-SoC board settings
#============================================================


set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEMA5F31C6
set_global_assignment -name TOP_LEVEL_ENTITY "harness"
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"

set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"


set_instance_assignment -name VIRTUAL_PIN ON -to i_*
set_instance_assignment -name VIRTUAL_PIN ON -to o_*

set_global_assignment -name SYSTEMVERILOG_FILE regfile.sv
set_global_assignment -name SYSTEMVERILOG_FILE fetch.sv
set_global_assignment -name SYSTEMVERILOG_FILE execute.sv
set_global_assignment -name SYSTEMVERILOG_FILE decode.sv
set_global_assignment -name SYSTEMVERILOG_FILE datapath.sv
set_global_assignment -name SYSTEMVERILOG_FILE cpu.sv
set_global_assignment -name SYSTEMVERILOG_FILE control.sv
set_global_assignment -name SYSTEMVERILOG_FILE access.sv
set_global_assignment -name SYSTEMVERILOG_FILE harness.sv
set_global_assignment -name SDC_FILE harness.sdc
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top