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driver-avalon.c
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driver-avalon.c
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/*
* Copyright 2013 Con Kolivas <kernel@kolivas.org>
* Copyright 2012-2013 Xiangfu <xiangfu@openmobilefree.com>
* Copyright 2012 Luke Dashjr
* Copyright 2012 Andrew Smith
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version. See COPYING for more details.
*/
#include "config.h"
#include <limits.h>
#include <pthread.h>
#include <stdio.h>
#include <sys/time.h>
#include <sys/types.h>
#include <dirent.h>
#include <unistd.h>
#ifndef WIN32
#include <sys/select.h>
#include <termios.h>
#include <sys/stat.h>
#include <fcntl.h>
#ifndef O_CLOEXEC
#define O_CLOEXEC 0
#endif
#else
#include "compat.h"
#include <windows.h>
#include <io.h>
#endif
#include "elist.h"
#include "miner.h"
#include "usbutils.h"
#include "driver-avalon.h"
#include "hexdump.c"
#include "util.h"
int opt_avalon_temp = AVALON_TEMP_TARGET;
int opt_avalon_overheat = AVALON_TEMP_OVERHEAT;
int opt_avalon_fan_min = AVALON_DEFAULT_FAN_MIN_PWM;
int opt_avalon_fan_max = AVALON_DEFAULT_FAN_MAX_PWM;
int opt_avalon_freq_min = AVALON_MIN_FREQUENCY;
int opt_avalon_freq_max = AVALON_MAX_FREQUENCY;
bool opt_avalon_auto;
static int option_offset = -1;
struct device_drv avalon_drv;
static int avalon_init_task(struct avalon_task *at,
uint8_t reset, uint8_t ff, uint8_t fan,
uint8_t timeout, uint8_t asic_num,
uint8_t miner_num, uint8_t nonce_elf,
uint8_t gate_miner, int frequency)
{
uint16_t *lefreq16;
uint8_t *buf;
static bool first = true;
if (unlikely(!at))
return -1;
if (unlikely(timeout <= 0 || asic_num <= 0 || miner_num <= 0))
return -1;
memset(at, 0, sizeof(struct avalon_task));
if (unlikely(reset)) {
at->reset = 1;
at->fan_eft = 1;
at->timer_eft = 1;
first = true;
}
at->flush_fifo = (ff ? 1 : 0);
at->fan_eft = (fan ? 1 : 0);
if (unlikely(first && !at->reset)) {
at->fan_eft = 1;
at->timer_eft = 1;
first = false;
}
at->fan_pwm_data = (fan ? fan : AVALON_DEFAULT_FAN_MAX_PWM);
at->timeout_data = timeout;
at->asic_num = asic_num;
at->miner_num = miner_num;
at->nonce_elf = nonce_elf;
at->gate_miner_elf = 1;
at->asic_pll = 1;
if (unlikely(gate_miner)) {
at-> gate_miner = 1;
at->asic_pll = 0;
}
buf = (uint8_t *)at;
buf[5] = 0x00;
buf[8] = 0x74;
buf[9] = 0x01;
buf[10] = 0x00;
buf[11] = 0x00;
lefreq16 = (uint16_t *)&buf[6];
*lefreq16 = htole16(frequency * 8);
return 0;
}
static inline void avalon_create_task(struct avalon_task *at,
struct work *work)
{
memcpy(at->midstate, work->midstate, 32);
memcpy(at->data, work->data + 64, 12);
}
static int avalon_write(struct cgpu_info *avalon, char *buf, ssize_t len, int ep)
{
int err, amount;
err = usb_write(avalon, buf, len, &amount, ep);
applog(LOG_DEBUG, "%s%i: usb_write got err %d", avalon->drv->name,
avalon->device_id, err);
if (unlikely(err != 0)) {
applog(LOG_WARNING, "usb_write error on avalon_write");
return AVA_SEND_ERROR;
}
if (amount != len) {
applog(LOG_WARNING, "usb_write length mismatch on avalon_write");
return AVA_SEND_ERROR;
}
return AVA_SEND_OK;
}
static int avalon_send_task(const struct avalon_task *at, struct cgpu_info *avalon)
{
uint8_t buf[AVALON_WRITE_SIZE + 4 * AVALON_DEFAULT_ASIC_NUM];
int delay, ret, i, ep = C_AVALON_TASK;
struct avalon_info *info;
uint32_t nonce_range;
size_t nr_len;
if (at->nonce_elf)
nr_len = AVALON_WRITE_SIZE + 4 * at->asic_num;
else
nr_len = AVALON_WRITE_SIZE;
memcpy(buf, at, AVALON_WRITE_SIZE);
if (at->nonce_elf) {
nonce_range = (uint32_t)0xffffffff / at->asic_num;
for (i = 0; i < at->asic_num; i++) {
buf[AVALON_WRITE_SIZE + (i * 4) + 3] =
(i * nonce_range & 0xff000000) >> 24;
buf[AVALON_WRITE_SIZE + (i * 4) + 2] =
(i * nonce_range & 0x00ff0000) >> 16;
buf[AVALON_WRITE_SIZE + (i * 4) + 1] =
(i * nonce_range & 0x0000ff00) >> 8;
buf[AVALON_WRITE_SIZE + (i * 4) + 0] =
(i * nonce_range & 0x000000ff) >> 0;
}
}
#if defined(__BIG_ENDIAN__) || defined(MIPSEB)
uint8_t tt = 0;
tt = (buf[0] & 0x0f) << 4;
tt |= ((buf[0] & 0x10) ? (1 << 3) : 0);
tt |= ((buf[0] & 0x20) ? (1 << 2) : 0);
tt |= ((buf[0] & 0x40) ? (1 << 1) : 0);
tt |= ((buf[0] & 0x80) ? (1 << 0) : 0);
buf[0] = tt;
tt = (buf[4] & 0x0f) << 4;
tt |= ((buf[4] & 0x10) ? (1 << 3) : 0);
tt |= ((buf[4] & 0x20) ? (1 << 2) : 0);
tt |= ((buf[4] & 0x40) ? (1 << 1) : 0);
tt |= ((buf[4] & 0x80) ? (1 << 0) : 0);
buf[4] = tt;
#endif
info = avalon->device_data;
delay = nr_len * 10 * 1000000;
delay = delay / info->baud;
if (at->reset) {
ep = C_AVALON_RESET;
nr_len = 1;
}
if (opt_debug) {
applog(LOG_DEBUG, "Avalon: Sent(%u):", (unsigned int)nr_len);
hexdump(buf, nr_len);
}
ret = avalon_write(avalon, (char *)buf, nr_len, ep);
delay += 4000;
nusleep(delay);
applog(LOG_DEBUG, "Avalon: Sent: Buffer delay: %dus", delay);
return ret;
}
static bool avalon_decode_nonce(struct thr_info *thr, struct cgpu_info *avalon,
struct avalon_info *info, struct avalon_result *ar,
struct work *work)
{
uint32_t nonce;
info = avalon->device_data;
info->matching_work[work->subid]++;
nonce = htole32(ar->nonce);
applog(LOG_DEBUG, "Avalon: nonce = %0x08x", nonce);
return submit_nonce(thr, work, nonce);
}
/* Wait until the ftdi chip returns a CTS saying we can send more data. */
static void wait_avalon_ready(struct cgpu_info *avalon)
{
while (avalon_buffer_full(avalon)) {
nmsleep(40);
}
}
#define AVALON_CTS (1 << 4)
static inline bool avalon_cts(char c)
{
return (c & AVALON_CTS);
}
static int avalon_read(struct cgpu_info *avalon, unsigned char *buf,
size_t bufsize, int timeout, int ep)
{
struct avalon_info *info = avalon->device_data;
size_t total = 0, readsize = bufsize + 2;
char readbuf[AVALON_READBUF_SIZE];
int err, amount, ofs = 2, cp;
err = usb_read_once_timeout(avalon, readbuf, readsize, &amount, timeout, ep);
applog(LOG_DEBUG, "%s%i: Get avalon read got err %d",
avalon->drv->name, avalon->device_id, err);
if (amount < 2)
goto out;
/* Use the fact that we're reading the status with the buffer to tell
* the write thread it should send more work without needing to call
* avalon_buffer_full directly. */
if (avalon_cts(buf[0]))
cgsem_post(&info->write_sem);
/* The first 2 of every 64 bytes are status on FTDIRL */
while (amount > 2) {
cp = amount - 2;
if (cp > 62)
cp = 62;
memcpy(&buf[total], &readbuf[ofs], cp);
total += cp;
amount -= cp + 2;
ofs += 64;
}
out:
return total;
}
static int avalon_reset(struct cgpu_info *avalon, bool initial)
{
struct avalon_result ar;
int ret, i, spare;
struct avalon_task at;
uint8_t *buf, *tmp;
struct timespec p;
/* Send reset, then check for result */
avalon_init_task(&at, 1, 0,
AVALON_DEFAULT_FAN_MAX_PWM,
AVALON_DEFAULT_TIMEOUT,
AVALON_DEFAULT_ASIC_NUM,
AVALON_DEFAULT_MINER_NUM,
0, 0,
AVALON_DEFAULT_FREQUENCY);
wait_avalon_ready(avalon);
ret = avalon_send_task(&at, avalon);
if (unlikely(ret == AVA_SEND_ERROR))
return -1;
if (!initial) {
applog(LOG_ERR, "AVA%d reset sequence sent", avalon->device_id);
return 0;
}
ret = avalon_read(avalon, (unsigned char *)&ar, AVALON_READ_SIZE,
AVALON_RESET_TIMEOUT, C_GET_AVALON_RESET);
/* What do these sleeps do?? */
p.tv_sec = 0;
p.tv_nsec = AVALON_RESET_PITCH;
nanosleep(&p, NULL);
/* Look for the first occurrence of 0xAA, the reset response should be:
* AA 55 AA 55 00 00 00 00 00 00 */
spare = ret - 10;
buf = tmp = (uint8_t *)&ar;
if (opt_debug) {
applog(LOG_DEBUG, "AVA%d reset: get:", avalon->device_id);
hexdump(tmp, AVALON_READ_SIZE);
}
for (i = 0; i <= spare; i++) {
buf = &tmp[i];
if (buf[0] == 0xAA)
break;
}
i = 0;
if (buf[0] == 0xAA && buf[1] == 0x55 &&
buf[2] == 0xAA && buf[3] == 0x55) {
for (i = 4; i < 11; i++)
if (buf[i] != 0)
break;
}
if (i != 11) {
applog(LOG_ERR, "AVA%d: Reset failed! not an Avalon?"
" (%d: %02x %02x %02x %02x)", avalon->device_id,
i, buf[0], buf[1], buf[2], buf[3]);
/* FIXME: return 1; */
} else
applog(LOG_WARNING, "AVA%d: Reset succeeded",
avalon->device_id);
return 0;
}
static bool get_options(int this_option_offset, int *baud, int *miner_count,
int *asic_count, int *timeout, int *frequency)
{
char buf[BUFSIZ+1];
char *ptr, *comma, *colon, *colon2, *colon3, *colon4;
size_t max;
int i, tmp;
if (opt_avalon_options == NULL)
buf[0] = '\0';
else {
ptr = opt_avalon_options;
for (i = 0; i < this_option_offset; i++) {
comma = strchr(ptr, ',');
if (comma == NULL)
break;
ptr = comma + 1;
}
comma = strchr(ptr, ',');
if (comma == NULL)
max = strlen(ptr);
else
max = comma - ptr;
if (max > BUFSIZ)
max = BUFSIZ;
strncpy(buf, ptr, max);
buf[max] = '\0';
}
if (!(*buf))
return false;
colon = strchr(buf, ':');
if (colon)
*(colon++) = '\0';
tmp = atoi(buf);
switch (tmp) {
case 115200:
*baud = 115200;
break;
case 57600:
*baud = 57600;
break;
case 38400:
*baud = 38400;
break;
case 19200:
*baud = 19200;
break;
default:
quit(1, "Invalid avalon-options for baud (%s) "
"must be 115200, 57600, 38400 or 19200", buf);
}
if (colon && *colon) {
colon2 = strchr(colon, ':');
if (colon2)
*(colon2++) = '\0';
if (*colon) {
tmp = atoi(colon);
if (tmp > 0 && tmp <= AVALON_DEFAULT_MINER_NUM) {
*miner_count = tmp;
} else {
quit(1, "Invalid avalon-options for "
"miner_count (%s) must be 1 ~ %d",
colon, AVALON_DEFAULT_MINER_NUM);
}
}
if (colon2 && *colon2) {
colon3 = strchr(colon2, ':');
if (colon3)
*(colon3++) = '\0';
tmp = atoi(colon2);
if (tmp > 0 && tmp <= AVALON_DEFAULT_ASIC_NUM)
*asic_count = tmp;
else {
quit(1, "Invalid avalon-options for "
"asic_count (%s) must be 1 ~ %d",
colon2, AVALON_DEFAULT_ASIC_NUM);
}
if (colon3 && *colon3) {
colon4 = strchr(colon3, ':');
if (colon4)
*(colon4++) = '\0';
tmp = atoi(colon3);
if (tmp > 0 && tmp <= 0xff)
*timeout = tmp;
else {
quit(1, "Invalid avalon-options for "
"timeout (%s) must be 1 ~ %d",
colon3, 0xff);
}
if (colon4 && *colon4) {
tmp = atoi(colon4);
if (tmp < AVALON_MIN_FREQUENCY || tmp > AVALON_MAX_FREQUENCY) {
quit(1, "Invalid avalon-options for frequency, must be %d <= frequency <= %d",
AVALON_MIN_FREQUENCY, AVALON_MAX_FREQUENCY);
}
*frequency = tmp;
}
}
}
}
return true;
}
char *set_avalon_fan(char *arg)
{
int val1, val2, ret;
ret = sscanf(arg, "%d-%d", &val1, &val2);
if (ret < 1)
return "No values passed to avalon-fan";
if (ret == 1)
val2 = val1;
if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
return "Invalid value passed to avalon-fan";
opt_avalon_fan_min = val1 * AVALON_PWM_MAX / 100;
opt_avalon_fan_max = val2 * AVALON_PWM_MAX / 100;
return NULL;
}
char *set_avalon_freq(char *arg)
{
int val1, val2, ret;
ret = sscanf(arg, "%d-%d", &val1, &val2);
if (ret < 1)
return "No values passed to avalon-freq";
if (ret == 1)
val2 = val1;
if (val1 < AVALON_MIN_FREQUENCY || val1 > AVALON_MAX_FREQUENCY ||
val2 < AVALON_MIN_FREQUENCY || val2 > AVALON_MAX_FREQUENCY ||
val2 < val1)
return "Invalid value passed to avalon-freq";
opt_avalon_freq_min = val1;
opt_avalon_freq_max = val2;
return NULL;
}
static void avalon_idle(struct cgpu_info *avalon, struct avalon_info *info)
{
int i;
wait_avalon_ready(avalon);
/* Send idle to all miners */
for (i = 0; i < info->miner_count; i++) {
struct avalon_task at;
if (unlikely(avalon_buffer_full(avalon)))
break;
info->idle++;
avalon_init_task(&at, 0, 0, info->fan_pwm, info->timeout,
info->asic_count, info->miner_count, 1, 1,
info->frequency);
avalon_send_task(&at, avalon);
}
applog(LOG_WARNING, "AVA%i: Idling %d miners", avalon->device_id, i);
wait_avalon_ready(avalon);
}
static void avalon_initialise(struct cgpu_info *avalon)
{
int err, interface;
if (avalon->usbinfo.nodev)
return;
interface = avalon->usbdev->found->interface;
// Reset
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_RESET,
FTDI_VALUE_RESET, interface, C_RESET);
applog(LOG_DEBUG, "%s%i: reset got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set latency
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_LATENCY,
AVALON_LATENCY, interface, C_LATENCY);
applog(LOG_DEBUG, "%s%i: latency got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set data
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_DATA,
FTDI_VALUE_DATA_AVA, interface, C_SETDATA);
applog(LOG_DEBUG, "%s%i: data got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set the baud
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, FTDI_VALUE_BAUD_AVA,
(FTDI_INDEX_BAUD_AVA & 0xff00) | interface,
C_SETBAUD);
applog(LOG_DEBUG, "%s%i: setbaud got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set Modem Control
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
FTDI_VALUE_MODEM, interface, C_SETMODEM);
applog(LOG_DEBUG, "%s%i: setmodemctrl got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set Flow Control
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
FTDI_VALUE_FLOW, interface, C_SETFLOW);
applog(LOG_DEBUG, "%s%i: setflowctrl got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
/* Avalon repeats the following */
// Set Modem Control
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
FTDI_VALUE_MODEM, interface, C_SETMODEM);
applog(LOG_DEBUG, "%s%i: setmodemctrl 2 got err %d",
avalon->drv->name, avalon->device_id, err);
if (avalon->usbinfo.nodev)
return;
// Set Flow Control
err = usb_transfer(avalon, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
FTDI_VALUE_FLOW, interface, C_SETFLOW);
applog(LOG_DEBUG, "%s%i: setflowctrl 2 got err %d",
avalon->drv->name, avalon->device_id, err);
}
static bool avalon_detect_one(libusb_device *dev, struct usb_find_devices *found)
{
int baud, miner_count, asic_count, timeout, frequency = 0;
int this_option_offset = ++option_offset;
struct avalon_info *info;
struct cgpu_info *avalon;
bool configured;
int ret;
avalon = usb_alloc_cgpu(&avalon_drv, AVALON_MINER_THREADS);
configured = get_options(this_option_offset, &baud, &miner_count,
&asic_count, &timeout, &frequency);
if (!usb_init(avalon, dev, found))
goto shin;
/* Even though this is an FTDI type chip, we want to do the parsing
* all ourselves so set it to std usb type */
avalon->usbdev->usb_type = USB_TYPE_STD;
avalon->usbdev->PrefPacketSize = AVALON_USB_PACKETSIZE;
/* We have a real Avalon! */
avalon_initialise(avalon);
avalon->device_data = calloc(sizeof(struct avalon_info), 1);
if (unlikely(!(avalon->device_data)))
quit(1, "Failed to calloc avalon_info data");
info = avalon->device_data;
if (configured) {
info->baud = baud;
info->miner_count = miner_count;
info->asic_count = asic_count;
info->timeout = timeout;
info->frequency = frequency;
} else {
info->baud = AVALON_IO_SPEED;
info->miner_count = AVALON_DEFAULT_MINER_NUM;
info->asic_count = AVALON_DEFAULT_ASIC_NUM;
info->timeout = AVALON_DEFAULT_TIMEOUT;
info->frequency = AVALON_DEFAULT_FREQUENCY;
}
info->fan_pwm = AVALON_DEFAULT_FAN_MIN_PWM;
info->temp_max = 0;
/* This is for check the temp/fan every 3~4s */
info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
if (info->temp_history_count <= 0)
info->temp_history_count = 1;
info->temp_history_index = 0;
info->temp_sum = 0;
info->temp_old = 0;
if (!add_cgpu(avalon))
goto unshin;
ret = avalon_reset(avalon, true);
if (ret && !configured)
goto unshin;
update_usb_stats(avalon);
avalon_idle(avalon, info);
applog(LOG_DEBUG, "Avalon Detected: %s "
"(miner_count=%d asic_count=%d timeout=%d frequency=%d)",
avalon->device_path, info->miner_count, info->asic_count, info->timeout,
info->frequency);
return true;
unshin:
usb_uninit(avalon);
shin:
free(avalon->device_data);
avalon->device_data = NULL;
avalon = usb_free_cgpu(avalon);
return false;
}
static void avalon_detect(void)
{
usb_detect(&avalon_drv, avalon_detect_one);
}
static void avalon_init(struct cgpu_info *avalon)
{
applog(LOG_INFO, "Avalon: Opened on %s", avalon->device_path);
}
static struct work *avalon_valid_result(struct cgpu_info *avalon, struct avalon_result *ar)
{
return find_queued_work_bymidstate(avalon, (char *)ar->midstate, 32,
(char *)ar->data, 64, 12);
}
static void avalon_update_temps(struct cgpu_info *avalon, struct avalon_info *info,
struct avalon_result *ar);
static void avalon_inc_nvw(struct avalon_info *info, struct thr_info *thr)
{
applog(LOG_INFO, "%s%d: No matching work - HW error",
thr->cgpu->drv->name, thr->cgpu->device_id);
inc_hw_errors(thr);
info->no_matching_work++;
}
static void avalon_parse_results(struct cgpu_info *avalon, struct avalon_info *info,
struct thr_info *thr, char *buf, int *offset)
{
int i, spare = *offset - AVALON_READ_SIZE;
bool found = false;
for (i = 0; i <= spare; i++) {
struct avalon_result *ar;
struct work *work;
ar = (struct avalon_result *)&buf[i];
work = avalon_valid_result(avalon, ar);
if (work) {
bool gettemp = false;
found = true;
if (avalon_decode_nonce(thr, avalon, info, ar, work)) {
mutex_lock(&info->lock);
if (!info->nonces++)
gettemp = true;
info->auto_nonces++;
mutex_unlock(&info->lock);
} else if (opt_avalon_auto) {
mutex_lock(&info->lock);
info->auto_hw++;
mutex_unlock(&info->lock);
}
if (gettemp)
avalon_update_temps(avalon, info, ar);
break;
}
}
if (!found) {
spare = *offset - AVALON_READ_SIZE;
/* We are buffering and haven't accumulated one more corrupt
* work result. */
if (spare < (int)AVALON_READ_SIZE)
return;
avalon_inc_nvw(info, thr);
} else {
spare = AVALON_READ_SIZE + i;
if (i) {
if (i >= (int)AVALON_READ_SIZE)
avalon_inc_nvw(info, thr);
else
applog(LOG_WARNING, "Avalon: Discarding %d bytes from buffer", i);
}
}
*offset -= spare;
memmove(buf, buf + spare, *offset);
}
static void avalon_running_reset(struct cgpu_info *avalon,
struct avalon_info *info)
{
avalon_reset(avalon, false);
avalon_idle(avalon, info);
avalon->results = 0;
info->reset = false;
}
static void *avalon_get_results(void *userdata)
{
struct cgpu_info *avalon = (struct cgpu_info *)userdata;
struct avalon_info *info = avalon->device_data;
int offset = 0, read_delay = 0, ret = 0;
const int rsize = AVALON_FTDI_READSIZE;
char readbuf[AVALON_READBUF_SIZE];
struct thr_info *thr = info->thr;
struct timeval tv_start, tv_end;
char threadname[24];
snprintf(threadname, 24, "ava_recv/%d", avalon->device_id);
RenameThread(threadname);
while (likely(!avalon->shutdown)) {
unsigned char buf[rsize];
struct timeval tv_diff;
int us_diff;
if (offset >= (int)AVALON_READ_SIZE)
avalon_parse_results(avalon, info, thr, readbuf, &offset);
if (unlikely(offset + rsize >= AVALON_READBUF_SIZE)) {
/* This should never happen */
applog(LOG_ERR, "Avalon readbuf overflow, resetting buffer");
offset = 0;
}
if (unlikely(info->reset)) {
avalon_running_reset(avalon, info);
/* Discard anything in the buffer */
offset = 0;
}
/* As the usb read returns after just 1ms, sleep long enough
* to leave the interface idle for writes to occur, but do not
* sleep if we have been receiving data as more may be coming. */
if (ret < 1) {
cgtime(&tv_end);
timersub(&tv_end, &tv_start, &tv_diff);
/* Assume it has not been > 1 second so ignore tv_sec */
us_diff = tv_diff.tv_usec;
read_delay = AVALON_READ_TIMEOUT * 1000 - us_diff;
if (likely(read_delay >= 1000))
nusleep(read_delay);
}
cgtime(&tv_start);
ret = avalon_read(avalon, buf, rsize, AVALON_READ_TIMEOUT,
C_AVALON_READ);
if (ret < 1)
continue;
if (opt_debug) {
applog(LOG_DEBUG, "Avalon: get:");
hexdump((uint8_t *)buf, ret);
}
memcpy(&readbuf[offset], &buf, ret);
offset += ret;
}
return NULL;
}
static void avalon_rotate_array(struct cgpu_info *avalon)
{
avalon->queued = 0;
if (++avalon->work_array >= AVALON_ARRAY_SIZE)
avalon->work_array = 0;
}
static void avalon_set_timeout(struct avalon_info *info)
{
info->timeout = AVALON_TIMEOUT_FACTOR / info->frequency;
}
static void avalon_inc_freq(struct avalon_info *info)
{
info->frequency += 2;
if (info->frequency > opt_avalon_freq_max)
info->frequency = opt_avalon_freq_max;
avalon_set_timeout(info);
applog(LOG_NOTICE, "Avalon increasing frequency to %d, timeout %d",
info->frequency, info->timeout);
}
static void avalon_dec_freq(struct avalon_info *info)
{
info->frequency -= 1;
if (info->frequency < opt_avalon_freq_min)
info->frequency = opt_avalon_freq_min;
avalon_set_timeout(info);
applog(LOG_NOTICE, "Avalon decreasing frequency to %d, timeout %d",
info->frequency, info->timeout);
}
static void avalon_reset_auto(struct avalon_info *info)
{
info->auto_queued =
info->auto_nonces =
info->auto_hw = 0;
}
static void *avalon_send_tasks(void *userdata)
{
struct cgpu_info *avalon = (struct cgpu_info *)userdata;
struct avalon_info *info = avalon->device_data;
const int avalon_get_work_count = info->miner_count;
char threadname[24];
snprintf(threadname, 24, "ava_send/%d", avalon->device_id);
RenameThread(threadname);
while (likely(!avalon->shutdown)) {
int start_count, end_count, i, j, ret;
struct avalon_task at;
bool idled = false;
while (avalon_buffer_full(avalon))
cgsem_wait(&info->write_sem);
if (opt_avalon_auto && info->auto_queued >= AVALON_AUTO_CYCLE) {
mutex_lock(&info->lock);
if (!info->optimal) {
if (info->fan_pwm >= opt_avalon_fan_max) {
applog(LOG_WARNING,
"AVA%i: Above optimal temperature, throttling",
avalon->device_id);
avalon_dec_freq(info);
}
} else if (info->auto_nonces >= (AVALON_AUTO_CYCLE * 19 / 20) &&
info->auto_nonces <= (AVALON_AUTO_CYCLE * 21 / 20)) {
int total = info->auto_nonces + info->auto_hw;
/* Try to keep hw errors < 2% */
if (info->auto_hw * 100 < total)
avalon_inc_freq(info);
else if (info->auto_hw * 66 > total)
avalon_dec_freq(info);
}
avalon_reset_auto(info);
mutex_unlock(&info->lock);
}
mutex_lock(&info->qlock);
start_count = avalon->work_array * avalon_get_work_count;
end_count = start_count + avalon_get_work_count;
for (i = start_count, j = 0; i < end_count; i++, j++) {
if (avalon_buffer_full(avalon)) {
applog(LOG_INFO,
"AVA%i: Buffer full after only %d of %d work queued",
avalon->device_id, j, avalon_get_work_count);
break;
}
if (likely(j < avalon->queued && !info->overheat && avalon->works[i])) {
avalon_init_task(&at, 0, 0, info->fan_pwm,
info->timeout, info->asic_count,
info->miner_count, 1, 0, info->frequency);
avalon_create_task(&at, avalon->works[i]);
info->auto_queued++;
} else {
int idle_freq = info->frequency;
if (!info->idle++)
idled = true;
if (unlikely(info->overheat && opt_avalon_auto))
idle_freq = AVALON_MIN_FREQUENCY;
avalon_init_task(&at, 0, 0, info->fan_pwm,
info->timeout, info->asic_count,
info->miner_count, 1, 1, idle_freq);
/* Reset the auto_queued count if we end up
* idling any miners. */
avalon_reset_auto(info);
}
ret = avalon_send_task(&at, avalon);
if (unlikely(ret == AVA_SEND_ERROR)) {
applog(LOG_ERR, "AVA%i: Comms error(buffer)",
avalon->device_id);
dev_error(avalon, REASON_DEV_COMMS_ERROR);
info->reset = true;
break;
}
}
avalon_rotate_array(avalon);
pthread_cond_signal(&info->qcond);
mutex_unlock(&info->qlock);
if (unlikely(idled)) {
applog(LOG_WARNING, "AVA%i: Idled %d miners",
avalon->device_id, idled);
}
}
return NULL;
}
static bool avalon_prepare(struct thr_info *thr)
{
struct cgpu_info *avalon = thr->cgpu;
struct avalon_info *info = avalon->device_data;
struct timeval now;
free(avalon->works);
avalon->works = calloc(info->miner_count * sizeof(struct work *),
AVALON_ARRAY_SIZE);
if (!avalon->works)
quit(1, "Failed to calloc avalon works in avalon_prepare");
info->thr = thr;
mutex_init(&info->lock);
mutex_init(&info->qlock);
if (unlikely(pthread_cond_init(&info->qcond, NULL)))
quit(1, "Failed to pthread_cond_init avalon qcond");