cvideo_sync.pio

;
; Title:	        Pico-mposite PIO code
; Description:		Generate a PAL(ish) video signal scaffold
; Author:	        Dean Belfield
; Created:	        26/01/2021
; Last Updated:	    24/02/2022
;
; Modinfo:
; 15/02/2021:       Refactored to use wrap
; 31/01/2022:		Modified to use 32 byte sync tables
; 05/02/2022:       Modified to use 16 bit values in sync tables, tweaked timings
; 24/02/2022:       Removed sm_config_set_set_pins

.program cvideo_sync

.wrap_target				; This loop needs to last ~64us

 loop_1:
    out X, 16       [15]	; Get 16 bits from DMA via Output Shift Register (OSR) to X
    jmp !X skip_1			; If the data byte is 0, then skip to the next loop
    mov pins, X     [14]	; Move data to pins as set up in cvideo_initialise_pio
    jmp loop_1      [15]	; Loop

 skip_1:
    irq set 4       [30]	; Set the IRQ to trigger the state machine cvideo_data

 loop_2:
    out X, 16       [15]	; Get 16 bits from DMA
    nop             [15]	; Just padding to time this out
    jmp !X loop_2   [15]	; Loop until we hit data again

.wrap						; Loop back to wrap_target

% c-sdk {
//
// Initialise the PIO
// Parameters:
// - pio: The PIO to attach this to
// - sm: The state machine number
// - offset: The instruction memory offset the program is loaded at
// - pin_base: The number of the first GPIO pin to use in the PIO
// - pin_count: The number of consecutive GPIO pins to write to
// - freq: The frequency of the PIO state machine
// 
void cvideo_sync_initialise_pio(PIO pio, uint sm, uint offset, uint pin_base, uint pin_count, double freq) {
    for(uint i=pin_base; i<pin_base+pin_count; i++) {
        pio_gpio_init(pio, i);
    }
    pio_sm_set_consecutive_pindirs(pio, sm, pin_base, pin_count, true);
    pio_sm_config c = cvideo_sync_program_get_default_config(offset);
    sm_config_set_out_pins(&c, pin_base, pin_count);
    sm_config_set_out_shift(&c, false, true, 8);
    pio_sm_init(pio, sm, offset, &c);
    pio->sm[sm].clkdiv = (uint32_t) (freq * (1 << 16));
}
%}