pif_rom.lpc

[Device]
Family=machxo2
PartType=LCMXO2-2000HC
PartName=LCMXO2-2000HC-4TG100C
SpeedGrade=4
Package=TQFP100
OperatingCondition=COM
Status=S

[IP]
VendorName=Lattice Semiconductor Corporation
CoreType=LPM
CoreStatus=Demo
CoreName=ROM
CoreRevision=5.4
ModuleName=pif_rom
SourceFormat=VHDL
ParameterFileVersion=1.0
Date=06/28/2017
Time=19:30:53

[Parameters]
Verilog=0
VHDL=1
EDIF=1
Destination=Synplicity
Expression=BusA(0 to 7)
Order=Big Endian [MSB:LSB]
IO=0
Address=512
Data=32
enByte=0
ByteSize=9
OutputEn=1
ClockEn=0
Optimization=Speed
Reset=Sync
Reset1=Sync
Init=0
MemFile=e:/programming/vhdl/lattice/machxo2_breakout/pif_test/pifrom_pal.mem
MemFormat=hex
EnECC=0
Pipeline=0
Write=Normal
init_data=0

[FilesGenerated]
e:/programming/vhdl/lattice/machxo2_breakout/pif_test/pifrom_pal.mem=mem

[Command]
cmd_line= -w -n pif_rom -lang vhdl -synth lse -bus_exp 7 -bb -arch xo2c00 -type romblk -device LCMXO2-2000HC -addr_width 9 -data_width 32 -num_words 512 -outdata REGISTERED -cascade -1 -resetmode SYNC -sync_reset -memfile "e:/programming/vhdl/lattice/machxo2_breakout/pif_test/pifrom_pal.mem" -memformat hex