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simpler pdk init #363

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1 change: 1 addition & 0 deletions docs/components.rst
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@ Cells summary
ring_with_crossing
spiral
straight
straight_heater_metal
straight_one_pin
taper
terminator_short
Expand Down
23 changes: 19 additions & 4 deletions docs/components_plot.rst
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@ bend_s

import ubcpdk

c = ubcpdk.components.bend_s(size=(11.0, 1.8), npoints=99, cross_section='xs_sc', with_bbox=True, add_pins=True)
c = ubcpdk.components.bend_s(size=(11.0, 1.8), npoints=99, cross_section='xs_sc')
c.plot()


Expand Down Expand Up @@ -707,7 +707,7 @@ mmi1x2

import ubcpdk

c = ubcpdk.components.mmi1x2(width_taper=1.0, length_taper=10.0, length_mmi=5.5, width_mmi=2.5, gap_mmi=0.25, with_bbox=True)
c = ubcpdk.components.mmi1x2(width_taper=1.0, length_taper=10.0, length_mmi=5.5, width_mmi=2.5, gap_mmi=0.25)
c.plot()


Expand Down Expand Up @@ -902,7 +902,22 @@ straight

import ubcpdk

c = ubcpdk.components.straight(length=10.0, npoints=2, add_pins=True, cross_section='xs_sc')
c = ubcpdk.components.straight(length=10.0, npoints=2, cross_section='xs_sc', post_process=(functools.partial(<function add_padding at 0x7f87372dd440>, layers=((68, 0),), default=0, top=0.5, bottom=0.5),))
c.plot()



straight_heater_metal
----------------------------------------------------

.. autofunction:: ubcpdk.components.straight_heater_metal

.. plot::
:include-source:

import ubcpdk

c = ubcpdk.components.straight_heater_metal(length=320.0, length_undercut_spacing=6.0, length_undercut=30.0, length_straight=0.1, length_straight_input=15.0, cross_section='xs_sc', cross_section_heater='xs_heater_metal', cross_section_waveguide_heater='xs_sc_heater_metal', cross_section_heater_undercut='xs_sc_heater_metal_undercut', with_undercut=False, via_stack='via_stack_heater_mtop', heater_taper_length=5.0)
c.plot()


Expand Down Expand Up @@ -932,7 +947,7 @@ taper

import ubcpdk

c = ubcpdk.components.taper(length=10.0, width1=0.5, with_bbox=True, with_two_ports=True, cross_section='xs_sc', port_order_name=('o1', 'o2'), port_order_types=('optical', 'optical'), add_pins=True)
c = ubcpdk.components.taper(length=10.0, width1=0.5, with_two_ports=True, cross_section='xs_sc', port_order_name=('o1', 'o2'), port_order_types=('optical', 'optical'))
c.plot()


Expand Down
1 change: 0 additions & 1 deletion docs/notebooks/00_layout.ipynb
Original file line number Diff line number Diff line change
Expand Up @@ -343,7 +343,6 @@
" radius=radius,\n",
" y_straight_inner_top=0,\n",
" x_inner_length_cutback=0,\n",
" info=dict(does=[\"spiral\", \"te1550\"]),\n",
" )\n",
" )\n",
" ]\n",
Expand Down
8 changes: 8 additions & 0 deletions docs/notebooks/12_sim_plugins_tidy3d.ipynb
Original file line number Diff line number Diff line change
Expand Up @@ -240,6 +240,14 @@
"metadata": {},
"outputs": [],
"source": []
},
{
"cell_type": "code",
"execution_count": null,
"id": "c5e44e25",
"metadata": {},
"outputs": [],
"source": []
}
],
"metadata": {
Expand Down
4 changes: 2 additions & 2 deletions pyproject.toml
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,8 @@ classifiers = [
"Operating System :: OS Independent"
]
dependencies = [
"gdsfactory==7.18.0",
"gplugins[tidy3d,sax,schematic]>=0.10.2,<0.11"
"gdsfactory==7.22.2",
"gplugins[tidy3d,sax,schematic]>=0.11,<0.12"
]
description = "ubcpdk pdk"
keywords = ["python"]
Expand Down
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2 changes: 2 additions & 0 deletions tests/test_components.py
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,8 @@
"add_pins_bbox_siepic",
"add_pads",
"add_pins_bbox_siepic_remove_layers",
"import_gds",
"mzi",
}
cell_names = set(cells.keys()) - set(skip_test)
dirpath_ref = pathlib.Path(__file__).absolute().parent / "ref"
Expand Down
36 changes: 4 additions & 32 deletions tests/test_components/test_pdk_settings_add_fiber_array_.yml
Original file line number Diff line number Diff line change
@@ -1,29 +1,16 @@
function: add_fiber_array
info:
length: 10.0
route_info_length: 10.0
length: 1.0
route_info_length: 1.0
route_info_type: xs_sc
route_info_weight: 10.0
route_info_xs_sc_length: 10.0
route_info_weight: 1.0
route_info_xs_sc_length: 1.0
width: 0.5
module: ubcpdk.components
name: add_fiber_array_add_fiber_array
settings:
component:
function: straight
module: gdsfactory.components.straight
settings:
cross_section: xs_sc
post_process:
- function: add_padding
module: gdsfactory.add_padding
settings:
bottom: 0.5
default: 0
layers:
- - 68
- 0
top: 0.5
component_name: null
cross_section: xs_sc
fanout_length: 0.0
Expand All @@ -32,25 +19,10 @@ settings:
function: get_input_labels
grating_coupler:
function: gc_te1550
info: null
layer_label:
- 10
- 0
optical_routing_type: 0
post_process: null
straight:
function: straight
module: gdsfactory.components.straight
settings:
cross_section: xs_sc
post_process:
- function: add_padding
module: gdsfactory.add_padding
settings:
bottom: 0.5
default: 0
layers:
- - 68
- 0
top: 0.5
with_loopback: false
12 changes: 1 addition & 11 deletions tests/test_components/test_pdk_settings_add_pads_dc_.yml
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
function: add_electrical_pads_top_dc
info: {}
module: gdsfactory.routing.add_electrical_pads_top_dc
name: ring_single_heater_add_electrical_pads_top_dc_cc2475fe
name: ring_single_heater_add_electrical_pads_top_dc_984bbf2d
settings:
component: ring_single_heater
get_bundle_function:
Expand All @@ -11,7 +11,6 @@ settings:
bend:
function: wire_corner
cross_section: xs_metal_routing
info: null
pad_array:
function: pad_array
module: gdsfactory.components.pad
Expand All @@ -28,22 +27,13 @@ settings:
layer:
- 12
- 0
post_process:
function: add_pins_siepic
module: ubcpdk.tech
settings:
layer_pin:
- 1
- 11
port_type: placement
size:
- 75
- 75
spacing:
- 125
- 125
port_names: null
post_process: null
select_ports:
function: select_ports
module: gdsfactory.port
Expand Down
12 changes: 1 addition & 11 deletions tests/test_components/test_pdk_settings_add_pads_rf_.yml
Original file line number Diff line number Diff line change
@@ -1,11 +1,10 @@
function: add_electrical_pads_top
info: {}
module: gdsfactory.routing.add_electrical_pads_top
name: ring_single_heater_add_electrical_pads_top_cc2475fe
name: ring_single_heater_add_electrical_pads_top_984bbf2d
settings:
component: ring_single_heater
direction: top
info: null
layer: MTOP
pad_array:
function: pad_array
Expand All @@ -23,22 +22,13 @@ settings:
layer:
- 12
- 0
post_process:
function: add_pins_siepic
module: ubcpdk.tech
settings:
layer_pin:
- 1
- 11
port_type: placement
size:
- 75
- 75
spacing:
- 125
- 125
port_names: null
post_process: null
select_ports:
function: select_ports
module: gdsfactory.port
Expand Down
2 changes: 0 additions & 2 deletions tests/test_components/test_pdk_settings_bend_s_.yml
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,7 @@ module: gdsfactory.components.bend_s
name: bend_s
settings:
cross_section: xs_sc
info: null
npoints: 99
post_process: null
size:
- 11.0
- 1.8
39 changes: 2 additions & 37 deletions tests/test_components/test_pdk_settings_coupler_.yml
Original file line number Diff line number Diff line change
Expand Up @@ -3,49 +3,14 @@ info:
length: 10.186
min_bend_radius: 11.857
module: gdsfactory.components.coupler
name: coupler_4abc60df
name: coupler
settings:
coupler_straight:
function: coupler_straight
coupler_symmetric:
function: coupler_symmetric
cross_section:
add_pins_function_module: ubcpdk.tech
add_pins_function_name: add_pins_siepic
auto_widen: false
auto_widen_minimum_length: 200.0
bbox_layers: null
bbox_offsets: null
components_along_path: []
end_straight_length: 0.01
gap: 3.0
info: {}
min_length: 0.01
radius: 10.0
radius_min: 5.0
sections:
- hidden: false
insets: null
layer: WG
name: _default
offset: 0.0
offset_function: null
port_names:
- o1
- o2
port_types:
- optical
- optical
simplify: null
width: 0.5
width_function: null
start_straight_length: 0.01
taper_length: 10.0
width_wide: null
cross_section: xs_sc
dx: 10.0
dy: 4.0
gap: 0.236
info: null
length: 20.0
post_process:
function: add_pins_bbox_siepic
39 changes: 2 additions & 37 deletions tests/test_components/test_pdk_settings_coupler_ring_.yml
Original file line number Diff line number Diff line change
@@ -1,52 +1,17 @@
function: coupler_ring
info: {}
module: gdsfactory.components.coupler_ring
name: coupler_ring_4abc60df
name: coupler_ring
settings:
bend:
function: bend_euler
coupler90:
function: coupler90
coupler_straight:
function: coupler_straight
cross_section:
add_pins_function_module: ubcpdk.tech
add_pins_function_name: add_pins_siepic
auto_widen: false
auto_widen_minimum_length: 200.0
bbox_layers: null
bbox_offsets: null
components_along_path: []
end_straight_length: 0.01
gap: 3.0
info: {}
min_length: 0.01
radius: 10.0
radius_min: 5.0
sections:
- hidden: false
insets: null
layer: WG
name: _default
offset: 0.0
offset_function: null
port_names:
- o1
- o2
port_types:
- optical
- optical
simplify: null
width: 0.5
width_function: null
start_straight_length: 0.01
taper_length: 10.0
width_wide: null
cross_section: xs_sc
cross_section_bend: null
gap: 0.2
info: null
length_extension: 3
length_x: 4.0
post_process:
function: add_pins_bbox_siepic
radius: 5.0
37 changes: 0 additions & 37 deletions tests/test_components/test_pdk_settings_dbr_cavity_.yml
Original file line number Diff line number Diff line change
Expand Up @@ -5,42 +5,5 @@ name: dbr_cavity
settings:
coupler:
function: coupler
module: gdsfactory.components.coupler
settings:
cross_section:
add_pins_function_module: ubcpdk.tech
add_pins_function_name: add_pins_siepic
auto_widen: false
auto_widen_minimum_length: 200.0
bbox_layers: null
bbox_offsets: null
components_along_path: []
end_straight_length: 0.01
gap: 3.0
info: {}
min_length: 0.01
radius: 10.0
radius_min: 5.0
sections:
- hidden: false
insets: null
layer: WG
name: _default
offset: 0.0
offset_function: null
port_names:
- o1
- o2
port_types:
- optical
- optical
simplify: null
width: 0.5
width_function: null
start_straight_length: 0.01
taper_length: 10.0
width_wide: null
post_process:
function: add_pins_bbox_siepic
dbr:
function: dbr
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