diff --git a/ChangeLog b/ChangeLog index 55fedd0b48593..3e0631117ef85 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,27 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-04-22 Iain Sandoe + + Backported from master: + 2022-06-26 Iain Sandoe + + * configure: Regenerate. + * configure.ac: Correct use of $host. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-19 Richard Henderson * MAINTAINERS: Update my email address. diff --git a/c++tools/ChangeLog b/c++tools/ChangeLog index 18338cd497770..3bebeaa81c0d7 100644 --- a/c++tools/ChangeLog +++ b/c++tools/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-03-18 Iain Sandoe * server.cc (accept_from): Use "1" as the dummy port number. diff --git a/config/ChangeLog b/config/ChangeLog index abeeecdb94de8..40932d6a39afd 100644 --- a/config/ChangeLog +++ b/config/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-03-29 Chenghua Xu Lulu Cheng diff --git a/configure b/configure index 5dcaab14ae99c..77638bc84a61b 100755 --- a/configure +++ b/configure @@ -8646,7 +8646,7 @@ fi # Check whether --enable-host-shared was given. if test "${enable_host_shared+set}" = set; then : enableval=$enable_host_shared; host_shared=$enableval - case $target in + case $host in x86_64-*-darwin* | aarch64-*-darwin*) if test x$host_shared != xyes ; then # PIC is the default, and actually cannot be switched off. diff --git a/configure.ac b/configure.ac index 85977482aeeb0..7abd02f8b56d2 100644 --- a/configure.ac +++ b/configure.ac @@ -1918,7 +1918,7 @@ AC_ARG_ENABLE(host-shared, [AS_HELP_STRING([--enable-host-shared], [build host code as shared libraries])], [host_shared=$enableval - case $target in + case $host in x86_64-*-darwin* | aarch64-*-darwin*) if test x$host_shared != xyes ; then # PIC is the default, and actually cannot be switched off. diff --git a/contrib/ChangeLog b/contrib/ChangeLog index c35edcc0e448e..c412d61b5795d 100644 --- a/contrib/ChangeLog +++ b/contrib/ChangeLog @@ -1,3 +1,26 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Jakub Jelinek + + Backported from master: + 2022-05-06 Jakub Jelinek + + * gennews (files): Add files for GCC 12. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-25 Martin Liska * filter-clang-warnings.py: Filter out diff --git a/contrib/gennews b/contrib/gennews index cd773cdfea120..635a79b96f0eb 100755 --- a/contrib/gennews +++ b/contrib/gennews @@ -3,7 +3,7 @@ # Script to generate the NEWS file from online release notes. # Contributed by Joseph Myers . # -# Copyright (C) 2000-2021 Free Software Foundation, Inc. +# Copyright (C) 2000-2022 Free Software Foundation, Inc. # This file is part of GCC. # # GCC is free software; you can redistribute it and/or modify @@ -23,6 +23,7 @@ website=http://gcc.gnu.org/ files=" + gcc-12/index.html gcc-12/changes.html gcc-11/index.html gcc-11/changes.html gcc-10/index.html gcc-10/changes.html gcc-9/index.html gcc-9/changes.html diff --git a/contrib/header-tools/ChangeLog b/contrib/header-tools/ChangeLog index 554f6b52ea779..c834c0a87c16d 100644 --- a/contrib/header-tools/ChangeLog +++ b/contrib/header-tools/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-01-17 Martin Liska * README: Rename .c names to .cc. diff --git a/contrib/reghunt/ChangeLog b/contrib/reghunt/ChangeLog index af27b8f97c4c9..1de203aa1b06f 100644 --- a/contrib/reghunt/ChangeLog +++ b/contrib/reghunt/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2010-06-27 Ralf Wildenhues * bin/gcc-svn-ids: Fix unportable shell quoting. diff --git a/contrib/regression/ChangeLog b/contrib/regression/ChangeLog index a4194276aa329..fbea8904965c2 100644 --- a/contrib/regression/ChangeLog +++ b/contrib/regression/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2012-08-26 Hans-Peter Nilsson * btest-gcc.sh (TESTLOGS): Make gfortran.sum optional. diff --git a/fixincludes/ChangeLog b/fixincludes/ChangeLog index f985d4ae205a6..adf13aed049e0 100644 --- a/fixincludes/ChangeLog +++ b/fixincludes/ChangeLog @@ -1,3 +1,57 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-04-04 Iain Sandoe + + Backported from master: + 2023-01-21 Iain Sandoe + + * fixincl.x: Regenerate. + * inclhack.def (darwin_objc_runtime_1): New hack. + * tests/base/objc/runtime.h: New file. + +2024-04-04 Iain Sandoe + + Backported from master: + 2023-01-21 Iain Sandoe + + PR target/107568 + * fixincl.x: Regenerate. + * inclhack.def: Add a fix for MacOS13 SDK function deprecations + in stdio.h. + * tests/base/stdio.h (__deprecated_msg): New test. + +2023-12-11 Rainer Orth + + * inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard + variant. + * fixincl.x: Regenerate. + * tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-28 Xi Ruoyao + + Backported from master: + 2023-03-28 Xi Ruoyao + + PR other/109293 + * configure.ac (AC_CHECK_DECLS): Add memmem. + * configure: Regenerate. + * config.h.in: Regenerate. + * system.h (memmem): Declare if HAVE_DECL_MEMMEM is zero. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-02-27 John David Anglin * inclhack.def (hpux_math_constexpr): New hack. diff --git a/fixincludes/config.h.in b/fixincludes/config.h.in index 3f6cf1e574eb2..9792fdb2419b5 100644 --- a/fixincludes/config.h.in +++ b/fixincludes/config.h.in @@ -138,6 +138,10 @@ #endif +/* Define to 1 if you have the declaration of `memmem', and to 0 if you don't. + */ +#undef HAVE_DECL_MEMMEM + /* Define to 1 if you have the declaration of `putchar_unlocked', and to 0 if you don't. */ #ifndef USED_FOR_TARGET diff --git a/fixincludes/configure b/fixincludes/configure index 6e2d67b655b2f..0d5cd6967cadc 100755 --- a/fixincludes/configure +++ b/fixincludes/configure @@ -5043,6 +5043,16 @@ fi cat >>confdefs.h <<_ACEOF #define HAVE_DECL_VASPRINTF $ac_have_decl _ACEOF +ac_fn_c_check_decl "$LINENO" "memmem" "ac_cv_have_decl_memmem" "$ac_includes_default" +if test "x$ac_cv_have_decl_memmem" = xyes; then : + ac_have_decl=1 +else + ac_have_decl=0 +fi + +cat >>confdefs.h <<_ACEOF +#define HAVE_DECL_MEMMEM $ac_have_decl +_ACEOF ac_fn_c_check_decl "$LINENO" "clearerr_unlocked" "ac_cv_have_decl_clearerr_unlocked" "$ac_includes_default" if test "x$ac_cv_have_decl_clearerr_unlocked" = xyes; then : diff --git a/fixincludes/configure.ac b/fixincludes/configure.ac index 14813b910f196..ef2227e3c9385 100644 --- a/fixincludes/configure.ac +++ b/fixincludes/configure.ac @@ -88,7 +88,7 @@ define(fixincludes_UNLOCKED_FUNCS, clearerr_unlocked feof_unlocked dnl fread_unlocked fwrite_unlocked getchar_unlocked getc_unlocked dnl putchar_unlocked putc_unlocked) AC_CHECK_FUNCS(fixincludes_UNLOCKED_FUNCS) -AC_CHECK_DECLS([abort, asprintf, basename(char *), errno, vasprintf]) +AC_CHECK_DECLS([abort, asprintf, basename(char *), errno, vasprintf, memmem]) AC_CHECK_DECLS(m4_split(m4_normalize(fixincludes_UNLOCKED_FUNCS))) # Checks for typedefs, structures, and compiler characteristics. diff --git a/fixincludes/fixincl.x b/fixincludes/fixincl.x index bad490453b774..0bc8eb049a38f 100644 --- a/fixincludes/fixincl.x +++ b/fixincludes/fixincl.x @@ -2,11 +2,11 @@ * * DO NOT EDIT THIS FILE (fixincl.x) * - * It has been AutoGen-ed February 27, 2022 at 07:47:03 PM by AutoGen 5.18.16 + * It has been AutoGen-ed March 30, 2024 at 04:03:59 PM by AutoGen 5.18.7 * From the definitions inclhack.def * and the template file fixincl */ -/* DO NOT SVN-MERGE THIS FILE, EITHER Sun Feb 27 19:47:03 UTC 2022 +/* DO NOT SVN-MERGE THIS FILE, EITHER Sat Mar 30 16:03:59 GMT 2024 * * You must regenerate it. Use the ./genfixes script. * @@ -15,7 +15,7 @@ * certain ANSI-incompatible system header files which are fixed to work * correctly with ANSI C and placed in a directory that GNU C will search. * - * This file contains 267 fixup descriptions. + * This file contains 269 fixup descriptions. * * See README for more information. * @@ -2608,6 +2608,46 @@ static const char* apzBsd_Stdio_Attrs_ConflictPatch[] = { int vfscanf(FILE *, const char *, __builtin_va_list) __asm__ (_BSD_STRING(__USER_LABEL_PREFIX__) \"__svfscanf\");", (char*)NULL }; +/* * * * * * * * * * * * * * * * * * * * * * * * * * + * + * Description of Apple_Local_Stdio_Fn_Deprecation fix + */ +tSCC zApple_Local_Stdio_Fn_DeprecationName[] = + "apple_local_stdio_fn_deprecation"; + +/* + * File name selection pattern + */ +tSCC zApple_Local_Stdio_Fn_DeprecationList[] = + "stdio.h\0"; +/* + * Machine/OS name selection pattern + */ +tSCC* apzApple_Local_Stdio_Fn_DeprecationMachs[] = { + "*-*-*darwin2*", + (const char*)NULL }; + +/* + * content selection pattern - do fix if pattern found + */ +tSCC zApple_Local_Stdio_Fn_DeprecationSelect0[] = + "__deprecated_msg([^\n\ +]*)$"; + +#define APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT 1 +static tTestDesc aApple_Local_Stdio_Fn_DeprecationTests[] = { + { TT_EGREP, zApple_Local_Stdio_Fn_DeprecationSelect0, (regex_t*)NULL }, }; + +/* + * Fix Command Arguments for Apple_Local_Stdio_Fn_Deprecation + */ +static const char* apzApple_Local_Stdio_Fn_DeprecationPatch[] = { + "format", + "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n\ +%0\n\ +#endif", + (char*)NULL }; + /* * * * * * * * * * * * * * * * * * * * * * * * * * * * Description of Ctrl_Quotes_Def fix @@ -3044,6 +3084,53 @@ static const char* apzDarwin_Os_Trace_2Patch[] = { #endif", (char*)NULL }; +/* * * * * * * * * * * * * * * * * * * * * * * * * * + * + * Description of Darwin_Objc_Runtime_1 fix + */ +tSCC zDarwin_Objc_Runtime_1Name[] = + "darwin_objc_runtime_1"; + +/* + * File name selection pattern + */ +tSCC zDarwin_Objc_Runtime_1List[] = + "objc/runtime.h\0"; +/* + * Machine/OS name selection pattern + */ +tSCC* apzDarwin_Objc_Runtime_1Machs[] = { + "*-*-darwin2*", + (const char*)NULL }; + +/* + * content selection pattern - do fix if pattern found + */ +tSCC zDarwin_Objc_Runtime_1Select0[] = + "OBJC_EXPORT void.*\n\ +objc_enumerateClasses.*\n\ +.*\n\ +.*\n\ +.*\n\ +.*void \\(\\^ _Nonnull block.*\n\ +.*\n\ +.*\n\ +.*OBJC_REFINED_FOR_SWIFT.*"; + +#define DARWIN_OBJC_RUNTIME_1_TEST_CT 1 +static tTestDesc aDarwin_Objc_Runtime_1Tests[] = { + { TT_EGREP, zDarwin_Objc_Runtime_1Select0, (regex_t*)NULL }, }; + +/* + * Fix Command Arguments for Darwin_Objc_Runtime_1 + */ +static const char* apzDarwin_Objc_Runtime_1Patch[] = { + "format", + "#if __BLOCKS__\n\ +%0\n\ +#endif", + (char*)NULL }; + /* * * * * * * * * * * * * * * * * * * * * * * * * * * * Description of Darwin_Os_Trace_3 fix @@ -3587,7 +3674,7 @@ tSCC* apzDarwin_Flt_Eval_MethodMachs[] = { * content selection pattern - do fix if pattern found */ tSCC zDarwin_Flt_Eval_MethodSelect0[] = - "^#if __FLT_EVAL_METHOD__ == 0$"; + "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$"; #define DARWIN_FLT_EVAL_METHOD_TEST_CT 1 static tTestDesc aDarwin_Flt_Eval_MethodTests[] = { @@ -3598,7 +3685,7 @@ static tTestDesc aDarwin_Flt_Eval_MethodTests[] = { */ static const char* apzDarwin_Flt_Eval_MethodPatch[] = { "format", - "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16", + "%0 || __FLT_EVAL_METHOD__ == 16", (char*)NULL }; /* * * * * * * * * * * * * * * * * * * * * * * * * * @@ -10872,9 +10959,9 @@ static const char* apzX11_SprintfPatch[] = { * * List of all fixes */ -#define REGEX_COUNT 305 +#define REGEX_COUNT 307 #define MACH_LIST_SIZE_LIMIT 187 -#define FIX_COUNT 267 +#define FIX_COUNT 269 /* * Enumerate the fixes @@ -10941,6 +11028,7 @@ typedef enum { BROKEN_CABS_FIXIDX, BROKEN_NAN_FIXIDX, BSD_STDIO_ATTRS_CONFLICT_FIXIDX, + APPLE_LOCAL_STDIO_FN_DEPRECATION_FIXIDX, CTRL_QUOTES_DEF_FIXIDX, CTRL_QUOTES_USE_FIXIDX, CXX_UNREADY_FIXIDX, @@ -10952,6 +11040,7 @@ typedef enum { DARWIN_LONGJMP_NORETURN_FIXIDX, DARWIN_OS_TRACE_1_FIXIDX, DARWIN_OS_TRACE_2_FIXIDX, + DARWIN_OBJC_RUNTIME_1_FIXIDX, DARWIN_OS_TRACE_3_FIXIDX, DARWIN_OS_BASE_1_FIXIDX, DARWIN_DISPATCH_OBJECT_1_FIXIDX, @@ -11455,6 +11544,11 @@ tFixDesc fixDescList[ FIX_COUNT ] = { BSD_STDIO_ATTRS_CONFLICT_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, aBsd_Stdio_Attrs_ConflictTests, apzBsd_Stdio_Attrs_ConflictPatch, 0 }, + { zApple_Local_Stdio_Fn_DeprecationName, zApple_Local_Stdio_Fn_DeprecationList, + apzApple_Local_Stdio_Fn_DeprecationMachs, + APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, + aApple_Local_Stdio_Fn_DeprecationTests, apzApple_Local_Stdio_Fn_DeprecationPatch, 0 }, + { zCtrl_Quotes_DefName, zCtrl_Quotes_DefList, apzCtrl_Quotes_DefMachs, CTRL_QUOTES_DEF_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, @@ -11510,6 +11604,11 @@ tFixDesc fixDescList[ FIX_COUNT ] = { DARWIN_OS_TRACE_2_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, aDarwin_Os_Trace_2Tests, apzDarwin_Os_Trace_2Patch, 0 }, + { zDarwin_Objc_Runtime_1Name, zDarwin_Objc_Runtime_1List, + apzDarwin_Objc_Runtime_1Machs, + DARWIN_OBJC_RUNTIME_1_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, + aDarwin_Objc_Runtime_1Tests, apzDarwin_Objc_Runtime_1Patch, 0 }, + { zDarwin_Os_Trace_3Name, zDarwin_Os_Trace_3List, apzDarwin_Os_Trace_3Machs, DARWIN_OS_TRACE_3_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def index 7605ac89aa2ab..31a21c2a66d80 100644 --- a/fixincludes/inclhack.def +++ b/fixincludes/inclhack.def @@ -1269,6 +1269,18 @@ fix = { test_text = '#define vfscanf __svfscanf'; }; +fix = { + hackname = apple_local_stdio_fn_deprecation; + mach = "*-*-*darwin2*"; + files = stdio.h; + select = "__deprecated_msg([^\n]*)$"; + c_fix = format; + c_fix_arg = "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n" + "%0\n" + "#endif"; + test_text = '__deprecated_msg("This function is provided for compat...")'; +}; + /* * Fix various macros used to define ioctl numbers. * The traditional syntax was: @@ -1479,6 +1491,41 @@ fix = { test_text = "typedef void (^os_trace_payload_t)(xpc_object_t xdict);"; }; +/* + * macOSX 13.0 SDK objc/runtime.h uses Apple Blocks extension without a guard. + */ + +fix = { + hackname = darwin_objc_runtime_1; + mach = "*-*-darwin2*"; + files = objc/runtime.h; + select = <<- _EOSelect_ + OBJC_EXPORT void.* + objc_enumerateClasses.* + .* + .* + .* + .*void \(\^ _Nonnull block.* + .* + .* + .*OBJC_REFINED_FOR_SWIFT.* + _EOSelect_; + c_fix = format; + c_fix_arg = "#if __BLOCKS__\n%0\n#endif"; + test_text = <<- _OBJC_RUNTIME_1 +OBJC_EXPORT void +objc_enumerateClasses(const void * _Nullable image, + const char * _Nullable namePrefix, + Protocol * _Nullable conformingTo, + Class _Nullable subclassing, + void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop) + OBJC_NOESCAPE) +OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0) +OBJC_REFINED_FOR_SWIFT; +_OBJC_RUNTIME_1; +}; + + /* * In Mac OS X 10.1[012] , need to guard users of * os_trace_payload_t typedef, too. @@ -1772,10 +1819,11 @@ fix = { hackname = darwin_flt_eval_method; mach = "*-*-darwin*"; files = math.h; - select = "^#if __FLT_EVAL_METHOD__ == 0$"; + select = "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$"; c_fix = format; - c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16"; - test_text = "#if __FLT_EVAL_METHOD__ == 0"; + c_fix_arg = "%0 || __FLT_EVAL_METHOD__ == 16"; + test_text = "#if __FLT_EVAL_METHOD__ == 0\n" + "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1"; }; /* diff --git a/fixincludes/system.h b/fixincludes/system.h index dca5d57b2e321..687fb2e2025d6 100644 --- a/fixincludes/system.h +++ b/fixincludes/system.h @@ -209,6 +209,10 @@ extern int errno; extern void abort (void); #endif +#if defined (HAVE_DECL_MEMMEM) && !HAVE_DECL_MEMMEM +extern void *memmem (const void *, size_t, const void *, size_t); +#endif + #if HAVE_SYS_STAT_H # include #endif diff --git a/fixincludes/tests/base/math.h b/fixincludes/tests/base/math.h index 29b67579748c5..7b92f29a409f3 100644 --- a/fixincludes/tests/base/math.h +++ b/fixincludes/tests/base/math.h @@ -32,6 +32,7 @@ #if defined( DARWIN_FLT_EVAL_METHOD_CHECK ) #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16 +#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1 || __FLT_EVAL_METHOD__ == 16 #endif /* DARWIN_FLT_EVAL_METHOD_CHECK */ diff --git a/fixincludes/tests/base/objc/runtime.h b/fixincludes/tests/base/objc/runtime.h new file mode 100644 index 0000000000000..8b4855bb8ab0f --- /dev/null +++ b/fixincludes/tests/base/objc/runtime.h @@ -0,0 +1,24 @@ +/* DO NOT EDIT THIS FILE. + + It has been auto-edited by fixincludes from: + + "fixinc/tests/inc/objc/runtime.h" + + This had to be done to correct non-standard usages in the + original, manufacturer supplied header file. */ + + + +#if defined( DARWIN_OBJC_RUNTIME_1_CHECK ) +#if __BLOCKS__ +OBJC_EXPORT void +objc_enumerateClasses(const void * _Nullable image, + const char * _Nullable namePrefix, + Protocol * _Nullable conformingTo, + Class _Nullable subclassing, + void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop) + OBJC_NOESCAPE) +OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0) +OBJC_REFINED_FOR_SWIFT; +#endif +#endif /* DARWIN_OBJC_RUNTIME_1_CHECK */ diff --git a/fixincludes/tests/base/stdio.h b/fixincludes/tests/base/stdio.h index 491c75da6e554..38381bacb2d5a 100644 --- a/fixincludes/tests/base/stdio.h +++ b/fixincludes/tests/base/stdio.h @@ -41,6 +41,13 @@ int vfscanf(FILE *, const char *, __builtin_va_list) __asm__ (_BSD_STRING(__USER #endif /* BSD_STDIO_ATTRS_CONFLICT_CHECK */ +#if defined( APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK ) +#if defined(__APPLE_LOCAL_DEPRECATIONS) +__deprecated_msg("This function is provided for compat...") +#endif +#endif /* APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK */ + + #if defined( HPUX10_STDIO_DECLARATIONS_CHECK ) # define _iob __iob diff --git a/gcc/BASE-VER b/gcc/BASE-VER index b700dc1d471e7..c3b5557716315 100644 --- a/gcc/BASE-VER +++ b/gcc/BASE-VER @@ -1 +1 @@ -12.0.1 +12.4.1 diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a93b56ce00dfa..9b455cc387121 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7644 @@ +2025-01-14 Jan Hubicka + + Backported from master: + 2024-09-04 Jan Hubicka + + * config/i386/x86-tune-costs.h (znver5_cost): Update instruction + costs. + +2025-01-10 Richard Biener + + Backported from master: + 2024-07-24 Richard Biener + + PR tree-optimization/116057 + * tree-ssa-ccp.cc (likely_value): Also walk CTORs in stmt + operands to look for constants. + +2025-01-10 Richard Biener + + Backported from master: + 2024-06-27 Richard Biener + + PR tree-optimization/115669 + * tree-vect-slp.cc (vect_build_slp_tree_2): Do not reassociate + chains that participate in a reduction. + +2025-01-10 Richard Biener + + Backported from master: + 2024-06-26 Richard Biener + + PR tree-optimization/115646 + * tree-call-cdce.cc (check_pow): Check for bit_sz values + as allowed by transform. + +2025-01-10 Sam James + + * doc/cpp.texi (Common Predefined Macros): Fix syntax. + +2025-01-07 Jan Hubicka + + Backported from master: + 2024-09-03 Jan Hubicka + + * config/i386/i386.cc (ix86_reassociation_width): Update for Znver5. + * config/i386/x86-tune-costs.h (znver5_costs): Update reassociation + widths. + +2025-01-07 Jan Hubicka + + Backported from master: + 2024-09-03 Jan Hubicka + + * config/i386/i386.h (TARGET_FUSE_MOV_AND_ALU): New tune. + * config/i386/x86-tune-sched.cc (ix86_issue_rate): Updat for znver5. + (ix86_adjust_cost): Add TODO about znver5 memory latency. + (ix86_fuse_mov_alu_p): New. + (ix86_macro_fusion_pair_p): Use it. + * config/i386/x86-tune.def (X86_TUNE_FUSE_ALU_AND_BRANCH): Add ZNVER5. + (X86_TUNE_FUSE_MOV_AND_ALU): New tune; + +2024-12-05 Georg-Johann Lay + + Backported from master: + 2024-12-05 Georg-Johann Lay + + PR target/64242 + * config/avr/avr.md (nonlocal_goto): Don't restore + hard_frame_pointer_rtx directly, but copy it to local + register, and only set hard_frame_pointer_rtx from it + after emit_stack_restore(). + +2024-12-02 Andre Vieira + + Backported from master: + 2024-12-02 Andre Vieira + + * config/arm/arm_mve.h: Add Runtime Library Exception. + * config/arm/arm_mve_types.h: Likewise. + +2024-11-27 Martin Jambor + + Backported from master: + 2024-11-15 Martin Jambor + + PR tree-optimization/117142 + * tree-sra.cc (scan_function): Disqualify any candidate passed to + a function returning twice. + +2024-11-26 liuhongt + + Backported from master: + 2024-11-25 liuhongt + + PR target/117562 + * config/i386/sse.md (vec_unpacks_hi_v4sf): Initialize + operands[2] with CONST0_RTX. + +2024-11-23 Georg-Johann Lay + + Backported from master: + 2024-11-23 Georg-Johann Lay + + PR target/117744 + * config/avr/avr.cc (out_movqi_r_mr): Fix code when a load + only partially clobbers an address register due to + changing the address register temporally to accommodate for + faked addressing modes. + +2024-11-19 Uros Bizjak + + Backported from master: + 2024-11-18 Uros Bizjak + + PR target/117357 + * config/i386/i386.md (*rsqrtsf2_sse): + Also enable for !TARGET_SSE_MATH. + +2024-11-18 Georg-Johann Lay + + Backported from master: + 2024-11-18 Georg-Johann Lay + + PR target/117659 + * config/avr/avr.cc (avr_out_ashlpsi3) [case 16]: Use %A1 as + input (instead of bogus %A0). + +2024-11-13 John David Anglin + + PR target/117525 + * config/pa/pa.md (fix_truncsfsi2): Remove inner `fix:SF`. + (fix_truncdfsi2, fix_truncsfdi2, fix_truncdfdi2, + fixuns_truncsfsi2, fixuns_truncdfsi2, fixuns_truncsfdi2, + fixuns_truncdfdi2): Likewise. + +2024-11-13 Hu, Lin1 + + Backported from master: + 2024-11-13 Hu, Lin1 + + PR target/117418 + * config/i386/i386-expand.cc (ix86_expand_builtin): Convert + pointer's mode according to Pmode. + +2024-11-12 John David Anglin + + * config/pa/pa.md (decrement_and_branch_until_zero): Fix + constraint. + +2024-11-04 Andrew MacLeod + + PR tree-optimization/117398 + * gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges): + Check for VARYING and don't call invert () on it. + +2024-10-30 liuhongt + + Backported from master: + 2024-10-30 liuhongt + + PR target/117318 + * config/i386/sse.md (*avx512vl_v2div2qi2_mask_store_1): + Rename to .. + (avx512vl_v2div2qi2_mask_store_1): .. this. + (avx512vl_v2div2qi2_mask_store_2): Change to + define_expand. + (*avx512vl_v4qi2_mask_store_1): Rename to .. + (avx512vl_v4qi2_mask_store_1): .. this. + (avx512vl_v4qi2_mask_store_2): Change to + define_expand. + (*avx512vl_v8qi2_mask_store_1): Rename to .. + (avx512vl_v8qi2_mask_store_1): .. this. + (avx512vl_v8qi2_mask_store_2): Change to + define_expand. + (*avx512vl_v4hi2_mask_store_1): Rename to .. + (avx512vl_v4hi2_mask_store_1): .. this. + (avx512vl_v4hi2_mask_store_2): Change to + define_expand. + (*avx512vl_v2div2hi2_mask_store_1): Rename to .. + (avx512vl_v2div2hi2_mask_store_1): .. this. + (avx512vl_v2div2hi2_mask_store_2): Change to + define_expand. + (*avx512vl_v2div2si2_mask_store_1): Rename to .. + (avx512vl_v2div2si2_mask_store_1): .. this. + (avx512vl_v2div2si2_mask_store_2): Change to + define_expand. + (*avx512f_v8div16qi2_mask_store_1): Rename to .. + (avx512f_v8div16qi2_mask_store_1): .. this. + (avx512f_v8div16qi2_mask_store_2): Change to + define_expand. + +2024-10-29 Eric Botcazou + + PR rtl-optimization/117327 + * reorg.cc (find_end_label): Do not return a dangling label at the + end of the function and adjust commentary. + +2024-10-29 Peter Bergner + + Backported from master: + 2024-08-23 Peter Bergner + + PR target/116415 + * config/rs6000/rs6000.h (TI_OR_PTI_MODE): New define. + * config/rs6000/rs6000-p8swap.cc (rs6000_analyze_swaps): Use it to + handle PTImode identically to TImode. + +2024-10-24 liuhongt + + Backported from master: + 2024-10-23 liuhongt + + PR target/117240 + * config/i386/i386-builtin.def: Add avx/avx512f to vaes + ymm/zmm builtins. + +2024-10-21 Jeevitha + + Backported from master: + 2024-10-21 Jeevitha + + * config/rs6000/amo.h (enum _AMO_LD): Correct the function code for + _AMO_LD_DEC_BOUNDED. + +2024-10-21 liuhongt + + Backported from master: + 2024-10-21 liuhongt + + PR target/117159 + * config/i386/sse.md + (*_cmp3_zero_extend): + Change from define_insn_and_split to define_insn. + (*_cmp3_zero_extend): + Ditto. + (*_ucmp3_zero_extend): + Ditto. + (*_ucmp3_zero_extend): + Ditto. + (*_cmp3_zero_extend_2): + Split to the zero_extend pattern. + (*_cmp3_zero_extend_2): + Ditto. + (*_ucmp3_zero_extend_2): + Ditto. + (*_ucmp3_zero_extend_2): + Ditto. + +2024-10-16 Uros Bizjak + + Backported from master: + 2024-10-15 Uros Bizjak + + PR target/117116 + * config/i386/i386-expand.cc (expand_vector_set): Force "val" + into a register before VEC_MERGE/VEC_DUPLICATE RTX is generated + if it doesn't satisfy nonimmediate_operand predicate. + +2024-10-14 Jan Hubicka + + Backported from master: + 2024-07-22 Jan Hubicka + + PR ipa/111613 + * ipa-modref.cc (analyze_parms): Do not preserve EAF_NO_DIRECT_READ and + EAF_NO_INDIRECT_READ from past flags. + +2024-10-14 Jan Hubicka + + Backported from master: + 2024-07-22 Jan Hubicka + + PR ipa/109985 + * ipa-modref.cc (modref_summary::useful_p): Fix handling of ECF_NOVOPS. + (modref_access_analysis::process_fnspec): Likevise. + (modref_access_analysis::analyze_call): Likevise. + (propagate_unknown_call): Likevise. + (modref_propagate_in_scc): Likevise. + (modref_propagate_flags_in_scc): Likewise. + (ipa_merge_modref_summary_after_inlining): Likewise. + +2024-10-14 Jan Hubicka + + Backported from master: + 2024-05-16 Jan Hubicka + + PR ipa/113787 + * ipa-fnsummary.cc (points_to_local_or_readonly_memory_p): Do not + look into TARGET_MEM_REFS with constant opreand 0. + +2024-10-14 Jan Hubicka + + Backported from master: + 2024-07-22 Jan Hubicka + + PR ipa/115033 + * ipa-modref.cc (modref_eaf_analysis::analyze_ssa_name): Fix checking of + EAF flags when analysing values dereferenced as function parameters. + +2024-10-14 Jan Hubicka + + Backported from master: + 2024-07-22 Jan Hubicka + + PR ipa/114207 + * ipa-prop.cc (unadjusted_ptr_and_unit_offset): Fix accounting of offsets in ADDR_EXPR. + +2024-10-14 Aldy Hernandez + + Backported from master: + 2023-05-23 Aldy Hernandez + + PR tree-optimization/109934 + * value-range.cc (irange::invert): Remove buggy special case. + +2024-10-05 John David Anglin + + * config/pa/pa.md: Fix indirect_got constraint. + +2024-10-04 H.J. Lu + + Backported from master: + 2024-10-04 H.J. Lu + + PR target/116962 + * config/i386/i386.cc (ix86_stack_protect_runtime_enabled_p): New + function. + (TARGET_STACK_PROTECT_RUNTIME_ENABLED_P): New. + +2024-10-02 Richard Biener + + Backported from master: + 2024-09-18 Richard Biener + + PR tree-optimization/116585 + * tree-data-ref.cc (split_constant_offset_1): When either + operand is subject to abnormal coalescing do no further + processing. + +2024-09-30 Jan Hubicka + + Backported from master: + 2024-09-03 Jan Hubicka + + * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): Enable for + znver5. + (X86_TUNE_AVOID_256FMA_CHAINS): Likewise. + (X86_TUNE_AVOID_512FMA_CHAINS): Likewise. + +2024-09-28 Richard Biener + + Backported from master: + 2024-07-16 Richard Biener + + * config/i386/x86-tune-costs.h (znver5_cost): Update unaligned + load and store cost from the aligned costs. + +2024-09-28 Jan Hubicka + + Backported from master: + 2024-03-18 Jan Hubicka + Karthiban Anbazhagan + + * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver5. + * common/config/i386/i386-common.cc (processor_names): Add znver5. + (processor_alias_table): Likewise. + * common/config/i386/i386-cpuinfo.h (processor_types): Add new zen + family. + (processor_subtypes): Add znver5. + * config.gcc (x86_64-*-* |...): Likewise. + * config/i386/driver-i386.cc (host_detect_local_cpu): Let + march=native detect znver5 cpu's. + * config/i386/i386-c.cc (ix86_target_macros_internal): Add + znver5. + * config/i386/i386-options.cc (m_ZNVER5): New definition + (processor_cost_table): Add znver5. + * config/i386/i386.cc (ix86_reassociation_width): Likewise. + * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER5 + (PTA_ZNVER5): New definition. + * config/i386/i386.md (define_attr "cpu"): Add znver5. + (Scheduling descriptions) Add znver5.md. + * config/i386/x86-tune-costs.h (znver5_cost): New definition. + * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver5. + (ix86_adjust_cost): Likewise. + * config/i386/x86-tune.def (avx512_move_by_pieces): Add m_ZNVER5. + (avx512_store_by_pieces): Add m_ZNVER5. + * doc/extend.texi: Add znver5. + * doc/invoke.texi: Likewise. + * config/i386/znver4.md: Rename to zn4zn5.md; combine znver4 and znver5 Scheduler. + * config/i386/zn4zn5.md: New file. + +2024-09-28 H.J. Lu + + Backported from master: + 2024-09-25 H.J. Lu + + PR target/116839 + * config/i386/i386.cc (ix86_rewrite_tls_address_1): Make it + static. Return if TLS address is thread register plus an integer + register. + +2024-09-27 Stefan Schulze Frielinghaus + + Backported from master: + 2024-09-13 Stefan Schulze Frielinghaus + + PR target/115860 + * config/s390/s390.cc (print_operand): Remove operand specifier + %V. + * config/s390/s390.md (UNSPEC_TF_TO_FPRX2): New. + * config/s390/vector.md (*tf_to_fprx2_0): Remove. + (*tf_to_fprx2_1): Remove. + (tf_to_fprx2): New. + +2024-09-27 Stefan Schulze Frielinghaus + + Backported from master: + 2024-09-13 Stefan Schulze Frielinghaus + + * config/s390/s390.cc (s390_mem_constraint): Check displacement + for AQ and AR constraints. + +2024-09-20 Eric Botcazou + + * ipa-modref.cc (modref_eaf_analysis::analyze_ssa_name): Always + process both the load and the store of a memory copy operation. + +2024-09-20 Stefan Schulze Frielinghaus + + Backported from master: + 2024-09-12 Stefan Schulze Frielinghaus + + * config/s390/s390-protos.h (s390_gen_lowpart_subreg): Remove. + * config/s390/s390.cc (s390_gen_lowpart_subreg): Remove. + (s390_expand_insv): Use adjust_address() and emit a + strict_low_part only in case of a natural subreg. + * config/s390/s390.md: Use gen_lowpart() instead of + s390_gen_lowpart_subreg(). + +2024-09-19 Haochen Jiang + + * doc/invoke.texi: Add corei7, corei7-avx, core-avx-i, + core-avx2, atom, and slm. Reorder the -march documentation by + splitting them into date-to-now products, P-core, E-core and + Xeon Phi. Refine the product names in documentation. + +2024-09-15 H.J. Lu + + Backported from master: + 2024-09-08 H.J. Lu + + PR target/116621 + * config/i386/i386.cc (ix86_gimplify_va_arg): Don't use temp for + a PARALLEL BLKmode container of an EXPR_LIST expression in a + TImode register. + +2024-09-05 H.J. Lu + + Backported from master: + 2024-09-03 H.J. Lu + + PR ipa/116410 + * ipa-modref.cc (analyze_parms): Always analyze function parameter + for LTO. + +2024-09-03 Haochen Jiang + + * config/i386/avx512fp16intrin.h + (_mm512_mask_fpclass_ph_mask): Correct mask type to __mmask32. + (_mm512_fpclass_ph_mask): Ditto. + +2024-09-02 liuhongt + + Backported from master: + 2024-08-30 liuhongt + + PR target/116512 + * config/i386/i386.cc (ix86_check_avx_upper_register): Iterate + subrtx to scan for avx upper register. + (ix86_check_avx_upper_stores): Inline old + ix86_check_avx_upper_register. + (ix86_avx_u128_mode_needed): Ditto, and replace + FOR_EACH_SUBRTX with call to new + ix86_check_avx_upper_register. + +2024-08-22 liuhongt + + Backported from master: + 2024-08-22 liuhongt + + * config/i386/i386-options.cc (ix86_option_override_internal): + set ix86_{move_max,store_max} to PVW_AVX256 when TARGET_AVX + instead of PVW_AVX128. + +2024-08-16 Richard Sandiford + + Backported from master: + 2024-04-05 Richard Sandiford + + PR target/114603 + * config/aarch64/aarch64-sve.md (@aarch64_pred_cnot): Replace + with... + (@aarch64_ptrue_cnot): ...this, requiring operand 1 to be + a ptrue. + (*cnot): Require operand 1 to be a ptrue. + * config/aarch64/aarch64-sve-builtins-base.cc (svcnot_impl::expand): + Use aarch64_ptrue_cnot for _x operations that are predicated + with a ptrue. Represent other _x operations as fully-defined _m + operations. + +2024-08-16 Richard Sandiford + + Backported from master: + 2024-04-08 Richard Sandiford + + PR target/114607 + * config/aarch64/aarch64-sve-builtins-base.cc + (svusdot_impl::expand): Fix botched attempt to swap the operands + for svsudot. + +2024-08-12 liuhongt + + Backported from master: + 2024-07-30 liuhongt + + PR target/116043 + * config/i386/constraints.md (Bk): Refine to + define_special_memory_constraint. + +2024-08-06 John David Anglin + + PR target/113384 + * config/pa/pa.cc (hppa_legitimize_address): Add check to + ensure constant is an integral multiple of shift the value. + +2024-08-06 Andrew Pinski + + Backported from master: + 2024-08-06 Andrew Pinski + + PR target/116189 + * config/sh/sh.cc (sh_recog_treg_set_expr): Don't call make_insn_raw, + make the insn with a fake uid. + +2024-07-29 Haochen Jiang + + * config/i386/avx512dqintrin.h (_mm_reduce_round_sd): Use + _mm_setzero_pd instead of _mm_avx512_setzero_pd. + (_mm_reduce_round_ss): Use _mm_setzero_ps instead of + _mm_avx512_setzero_ps. + +2024-07-29 Haochen Jiang + + * config/i386/avx512dqintrin.h + (_mm_mask_fpclass_ss_mask): Correct operand order. + (_mm_mask_fpclass_sd_mask): Ditto. + (_mm256_maskz_reduce_round_ss): Use __builtin_ia32_reducess_mask_round + instead of __builtin_ia32_reducesd_mask_round. + (_mm_reduce_round_sd): Use -1 as mask since it is non-mask. + (_mm_reduce_round_ss): Ditto. + * config/i386/avx512vlbwintrin.h + (_mm256_mask_alignr_epi8): Correct operand usage. + (_mm_mask_alignr_epi8): Ditto. + * config/i386/avx512vlintrin.h (_mm_mask_alignr_epi64): Ditto. + +2024-07-24 Peter Bergner + + Backported from master: + 2024-07-17 Peter Bergner + + PR target/114759 + * config/rs6000/rs6000.cc (rs6000_option_override_internal): Disallow + CPUs and ABIs that do no support the ROP protection insns. + * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Remove now + unneeded tests. + (rs6000_emit_prologue): Likewise. + Remove unneeded gcc_assert. + (rs6000_emit_epilogue): Likewise. + * config/rs6000/rs6000.md: Likewise. + +2024-07-24 Peter Bergner + + Backported from master: + 2024-07-17 Peter Bergner + + PR target/114759 + * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Use TARGET_POWER8. + (rs6000_emit_prologue): Likewise. + * config/rs6000/rs6000.md (hashchk): Likewise. + (hashst): Likewise. + Fix whitespace. + +2024-07-24 Peter Bergner + + Backported from master: + 2024-06-17 Peter Bergner + + PR target/115389 + * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Compute + rop_hash_save_offset for non-Altivec compiles. + +2024-07-24 Peter Bergner + + Backported from master: + 2024-06-08 Peter Bergner + + * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Update comment. + +2024-07-23 Richard Biener + + Backported from master: + 2024-07-16 Richard Biener + + PR tree-optimization/115843 + * config/i386/x86-tune-costs.h (znver4_cost): Update unaligned + load and store cost from the aligned costs. + +2024-07-22 Maciej W. Rozycki + + Backported from master: + 2024-06-29 Maciej W. Rozycki + + PR rtl-optimization/115565 + * cse.cc (record_jump_cond): Use INT_MIN rather than -1 for + `comparison_qty' if !REG_P. + +2024-07-20 Siddhesh Poyarekar + + Backported from master: + 2024-07-20 Siddhesh Poyarekar + + * opt-suggestions.cc + (option_proposer::build_option_suggestions): Pull OPTB + definition out of the innermost loop. + +2024-07-20 René Rebe + + Backported from master: + 2024-07-18 René Rebe + Peter Bergner + + PR target/97367 + * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Do not consider + OPTION_MASK_ALTIVEC. + (emit_asm_machine): For Altivec compiles, emit a ".machine altivec". + +2024-07-20 Stefan Schulze Frielinghaus + + * config/s390/3931.md (vlbr, vstbr, vrepi): Remove. + * config/s390/s390.md (xdee): Add FPRX2 mapping. + * config/s390/vector.md (bhfgq): Add TF mapping. + +2024-07-19 LIU Hao + + Backported from master: + 2024-07-18 LIU Hao + + PR rtl-optimization/115049 + * varasm.cc (decl_binds_to_current_def_p): Add a check for COMDAT + declarations too, like weak ones. + +2024-07-18 Uros Bizjak + + Backported from master: + 2024-07-17 Uros Bizjak + + PR target/115526 + * config/alpha/alpha.md (movdi_er_high_g): Add cannot_copy attribute. + (movdi_er_tlsgd): Ditto. + (movdi_er_tlsldm): Ditto. + (call_value_osf_): Ditto. + +2024-07-16 Stefan Schulze Frielinghaus + + Backported from master: + 2024-07-12 Stefan Schulze Frielinghaus + + * config/s390/vector.md (mov): Fix output template for + movv1qi. + +2024-07-16 Stefan Schulze Frielinghaus + + Backported from master: + 2024-07-12 Stefan Schulze Frielinghaus + + * config/s390/s390.md (*icjump_64): Allow raw CC comparisons, + i.e., any constant integer between 0 and 15 for CC comparisons. + +2024-07-15 liuhongt + + Backported from master: + 2024-07-15 liuhongt + + PR target/115872 + * tree-ssa-ccp.cc (convert_atomic_bit_not): Remove use_stmt after use_nop_stmt is removed. + (optimize_atomic_bit_test_and): Ditto. + +2024-07-11 Andre Vieira + + Backported from master: + 2024-07-11 Andre Vieira + + PR target/115611 + * config/arm/mve.md (mve_vec_setv2di_internal): Fix printing of input + scalar register pair when lane = 1. + +2024-07-10 Uros Bizjak + + Backported from master: + 2024-07-10 Uros Bizjak + + PR middle-end/115836 + * expmed.cc (emit_store_flag_1): Move calculation of + scode just before its only usage site. + +2024-07-05 Wilco Dijkstra + + Backported from master: + 2023-11-30 Wilco Dijkstra + + PR target/103100 + * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition. + (setmemdi): Likewise. + * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support + strict-align. Cleanup condition for using MOPS. + (aarch64_expand_setmem): Likewise. + +2024-07-05 Georg-Johann Lay + + Backported from master: + 2024-07-05 Georg-Johann Lay + + PR target/87376 + * config/avr/avr-dimode.md: Use "nop_general_operand" instead + of "general_operand" as predicate for all input operands. + +2024-07-04 Kyrylo Tkachov + + Backported from master: + 2024-07-03 Kyrylo Tkachov + + PR target/115475 + * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): + Define __ARM_FEATURE_SVE_BF16 for TARGET_SVE_BF16. + +2024-07-04 Kyrylo Tkachov + + Backported from master: + 2024-07-03 Kyrylo Tkachov + + PR target/115457 + * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): + Define __ARM_FEATURE_BF16 for TARGET_BF16_FP. + +2024-07-03 John David Anglin + + PR target/115691 + * config/pa/pa.md: Remove incorrect xmpyu patterns. + +2024-07-03 Georg-Johann Lay + + Backported from master: + 2024-07-03 Georg-Johann Lay + + PR target/98762 + * config/avr/avr.cc (avr_out_movqi_r_mr_reg_disp_tiny): Properly + restore the base register when it is partially clobbered. + +2024-07-03 Kewen Lin + + Backported from master: + 2024-06-26 Kewen Lin + Xionghu Luo + + PR target/106069 + PR target/115355 + * config/rs6000/altivec.md (altivec_vmrghh_direct): Rename to ... + (altivec_vmrghh_direct_be): ... this. Add condition BYTES_BIG_ENDIAN. + (altivec_vmrghh_direct_le): New define_insn. + (altivec_vmrglh_direct): Rename to ... + (altivec_vmrglh_direct_be): ... this. Add condition BYTES_BIG_ENDIAN. + (altivec_vmrglh_direct_le): New define_insn. + (altivec_vmrghh): Adjust by calling gen_altivec_vmrghh_direct_be + for BE and gen_altivec_vmrglh_direct_le for LE. + (altivec_vmrglh): Adjust by calling gen_altivec_vmrglh_direct_be + for BE and gen_altivec_vmrghh_direct_le for LE. + (vec_widen_umult_hi_v16qi): Adjust the call to + gen_altivec_vmrghh_direct by gen_altivec_vmrghh for BE + and by gen_altivec_vmrglh for LE. + (vec_widen_smult_hi_v16qi): Likewise. + (vec_widen_umult_lo_v16qi): Adjust the call to + gen_altivec_vmrglh_direct by gen_altivec_vmrglh for BE + and by gen_altivec_vmrghh for LE. + (vec_widen_smult_lo_v16qi): Likewise. + * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace + CODE_FOR_altivec_vmrghh_direct by + CODE_FOR_altivec_vmrghh_direct_be for BE and + CODE_FOR_altivec_vmrghh_direct_le for LE. And replace + CODE_FOR_altivec_vmrglh_direct by + CODE_FOR_altivec_vmrglh_direct_be for BE and + CODE_FOR_altivec_vmrglh_direct_le for LE. + +2024-07-03 Kewen Lin + + Backported from master: + 2024-06-26 Kewen Lin + Xionghu Luo + + PR target/106069 + PR target/115355 + * config/rs6000/altivec.md (altivec_vmrghb_direct): Rename to ... + (altivec_vmrghb_direct_be): ... this. Add condition BYTES_BIG_ENDIAN. + (altivec_vmrghb_direct_le): New define_insn. + (altivec_vmrglb_direct): Rename to ... + (altivec_vmrglb_direct_be): ... this. Add condition BYTES_BIG_ENDIAN. + (altivec_vmrglb_direct_le): New define_insn. + (altivec_vmrghb): Adjust by calling gen_altivec_vmrghb_direct_be + for BE and gen_altivec_vmrglb_direct_le for LE. + (altivec_vmrglb): Adjust by calling gen_altivec_vmrglb_direct_be + for BE and gen_altivec_vmrghb_direct_le for LE. + * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace + CODE_FOR_altivec_vmrghb_direct by + CODE_FOR_altivec_vmrghb_direct_be for BE and + CODE_FOR_altivec_vmrghb_direct_le for LE. And replace + CODE_FOR_altivec_vmrglb_direct by + CODE_FOR_altivec_vmrglb_direct_be for BE and + CODE_FOR_altivec_vmrglb_direct_le for LE. + +2024-07-01 Georg-Johann Lay + + Backported from master: + 2024-07-01 Georg-Johann Lay + + PR target/88236 + PR target/115726 + * config/avr/avr.md (mov) [avr_mem_memx_p]: Expand in such a + way that the destination does not overlap with any hard register + clobbered / used by xload8qi_A resp. xload_A. + * config/avr/avr.cc (avr_out_xload): Avoid early-clobber + situation for Z by executing just one load when the output register + overlaps with Z. + +2024-06-28 Kewen Lin + + Backported from master: + 2024-06-21 Kewen Lin + Xionghu Luo + + PR target/106069 + PR target/115355 + * config/rs6000/altivec.md (altivec_vmrghw_direct_): Rename + to ... + (altivec_vmrghw_direct__be): ... this. Add the condition + BYTES_BIG_ENDIAN. + (altivec_vmrghw_direct__le): New define_insn. + (altivec_vmrglw_direct_): Rename to ... + (altivec_vmrglw_direct__be): ... this. Add the condition + BYTES_BIG_ENDIAN. + (altivec_vmrglw_direct__le): New define_insn. + (altivec_vmrghw): Adjust by calling gen_altivec_vmrghw_direct_v4si_be + for BE and gen_altivec_vmrglw_direct_v4si_le for LE. + (altivec_vmrglw): Adjust by calling gen_altivec_vmrglw_direct_v4si_be + for BE and gen_altivec_vmrghw_direct_v4si_le for LE. + (vec_widen_umult_hi_v8hi): Adjust the call to + gen_altivec_vmrghw_direct_v4si by gen_altivec_vmrghw for BE + and by gen_altivec_vmrglw for LE. + (vec_widen_smult_hi_v8hi): Likewise. + (vec_widen_umult_lo_v8hi): Adjust the call to + gen_altivec_vmrglw_direct_v4si by gen_altivec_vmrglw for BE + and by gen_altivec_vmrghw for LE + (vec_widen_smult_lo_v8hi): Likewise. + * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace + CODE_FOR_altivec_vmrghw_direct_v4si by + CODE_FOR_altivec_vmrghw_direct_v4si_be for BE and + CODE_FOR_altivec_vmrghw_direct_v4si_le for LE. And replace + CODE_FOR_altivec_vmrglw_direct_v4si by + CODE_FOR_altivec_vmrglw_direct_v4si_be for BE and + CODE_FOR_altivec_vmrglw_direct_v4si_le for LE. + * config/rs6000/vsx.md (vsx_xxmrghw_): Adjust by calling + gen_altivec_vmrghw_direct_v4si_be for BE and + gen_altivec_vmrglw_direct_v4si_le for LE. + (vsx_xxmrglw_): Adjust by calling + gen_altivec_vmrglw_direct_v4si_be for BE and + gen_altivec_vmrghw_direct_v4si_le for LE. + +2024-06-27 Kyrylo Tkachov + + * config/aarch64/aarch64-cores.def (grace): New entry. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi (AArch64 Options): Document the above. + +2024-06-24 Kewen Lin + + Backported from master: + 2024-05-29 Kewen Lin + + PR target/114846 + * config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): As + EPILOGUE_TYPE_EH_RETURN would be passed as epilogue_type directly + now, adjust the relevant handlings on it. + * config/rs6000/rs6000.md (eh_return expander): Append by calling + gen_eh_return_internal and emit_barrier. + (eh_return_internal): New define_insn_and_split, call function + rs6000_emit_epilogue with epilogue type EPILOGUE_TYPE_EH_RETURN. + +2024-06-20 Jakub Jelinek + + Backported from master: + 2024-06-17 Jakub Jelinek + + PR driver/115440 + * opts-common.cc (add_misspelling_candidates): If opt1 is non-NULL, + add a space and opt1 to the alternative suggestion text. + +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-06-12 Alex Coplan + + Backported from master: + 2024-05-03 Alex Coplan + + PR rtl-optimization/114924 + * cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs, + don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR. + +2024-06-12 Vladimir N. Makarov + + Backported from master: + 2023-09-25 Vladimir N. Makarov + + PR middle-end/111497 + * lra-constraints.cc (lra_constraints): Copy substituted + equivalence. + * lra.cc (lra): Change comment for calling unshare_all_rtl_again. + +2024-06-12 Richard Biener + + Backported from master: + 2022-12-05 Richard Biener + + PR middle-end/40635 + * tree-into-ssa.cc (rewrite_update_phi_arguments): Only + update the argument when the reaching definition is different + from the current argument. Keep an existing argument + location. + +2024-06-12 Richard Biener + + Backported from master: + 2024-02-19 Richard Biener + + PR rtl-optimization/54052 + * rtl-ssa/blocks.cc (function_info::place_phis): Filter + local defs by LR_OUT. + +2024-06-12 Torbjörn SVENSSON + + Backported from master: + 2024-06-12 Torbjörn SVENSSON + Yvan ROUX + + PR target/115253 + * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear): + Sign extend for Thumb1. + (thumb1_expand_prologue): Add zero/sign extend. + +2024-06-11 Francois-Xavier Coudert + + Backported from master: + 2024-03-07 Francois-Xavier Coudert + + PR middle-end/111632 + * system.h: Include safe-ctype.h after C++ standard headers. + +2024-06-11 Andrew Pinski + + Backported from master: + 2024-05-20 Andrew Pinski + + PR tree-optimization/115143 + * tree-ssa-phiopt.cc (minmax_replacement): Check for empty + phi nodes for middle bbs for the case where middle bb is not empty. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-06-04 Jakub Jelinek + + PR tree-optimization/115337 + * fold-const.cc (tree_call_nonnegative_warnv_p) : + If fn is CFN_CLZ, use CLZ_DEFINED_VALUE_AT. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-06-04 Jakub Jelinek + + PR middle-end/108789 + * builtins.cc (fold_builtin_arith_overflow): For ovf_only, + don't call save_expr and don't build REALPART_EXPR, otherwise + set TREE_SIDE_EFFECTS on call before calling save_expr. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-06-03 Jakub Jelinek + + PR target/115324 + * config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove + GTY markup from struct bifdata and struct ovlddata and remove their + fntype members. Change next member in struct ovlddata and + first_instance member of struct ovldrecord to have int type rather + than struct ovlddata *. Remove GTY markup from rs6000_builtin_info + and rs6000_instance_info arrays, declare new + rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays, + which have GTY markup. + (write_bif_static_init): Adjust for the above changes. + (write_ovld_static_init): Likewise. + (write_init_bif_table): Likewise. + (write_init_ovld_table): Likewise. + * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise. + * config/rs6000/rs6000-c.cc (find_instance): Likewise. Make static. + (altivec_resolve_overloaded_builtin): Adjust for the above changes. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-05-15 Jakub Jelinek + + PR rtl-optimization/114902 + PR rtl-optimization/115092 + * combine.cc (simplify_compare_const): Don't optimize + GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or + EQ op0 const0_rtx. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-05-07 Jakub Jelinek + + PR sanitizer/114956 + * tree-inline.cc: Include asan.h. + (copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan + sanitization disabled. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-30 Jakub Jelinek + + PR tree-optimization/114876 + * gimple-ssa-sprintf.cc (format_character): For min == 0 && max == 0, + set max, likely and unlikely members to 1 rather than 0. Remove + useless res.knownrange = true;. Formatting fixes. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-25 Jakub Jelinek + + PR fortran/114825 + * tree-nested.cc (get_debug_decl): New function. + (get_nonlocal_debug_decl): Use it. + (get_local_debug_decl): Likewise. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-19 Jakub Jelinek + + PR rtl-optimization/114768 + * rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM + sets if src has side-effects or for stores into ZERO_EXTRACT + if ZERO_EXTRACT operand has side-effects. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-18 Jakub Jelinek + + PR middle-end/114753 + * internal-fn.cc (expand_mul_overflow): Save flag_trapv and + temporarily clear it for the duration of the function, then + restore previous value. + (expand_vector_ubsan_overflow): Likewise. + (expand_arith_overflow): Likewise. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-15 Jakub Jelinek + + PR c++/114634 + * attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for + decls with NULL TREE_TYPE. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-11 Jakub Jelinek + + PR middle-end/110027 + * asan.cc (asan_emit_stack_protection): Assert offsets[0] is + zero if there is no stack protect guard, otherwise + -ASAN_RED_ZONE_SIZE. If alignb > ASAN_RED_ZONE_SIZE and there is + stack pointer guard, take the ASAN_RED_ZONE_SIZE bytes allocated at + the top of the stack into account when computing base_align_bias. + Recompute use_after_return_class from asan_frame_size + base_align_bias + and set to -1 if that would overflow to 11. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-05 Jakub Jelinek + + PR tree-optimization/114566 + * tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear + base_misaligned. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-04 Jakub Jelinek + + PR c++/114537 + * fold-const.cc (native_encode_initializer): Look through + NON_LVALUE_EXPR if val is INTEGER_CST. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-03-14 Jakub Jelinek + + PR middle-end/113907 + * ipa-icf.cc (sem_item_optimizer::merge_classes): Reset + SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged + functions. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-03-14 Jakub Jelinek + + PR target/114310 + * config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For + TImode force newval into a register. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-03-07 Jakub Jelinek + + PR rtl-optimization/110079 + * bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust + asm goto. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-03-04 Jakub Jelinek + + PR target/114184 + * config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1 + is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or + register. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-02-12 Jakub Jelinek + + PR c++/113674 + * attribs.cc (extract_attribute_substring): Remove. + (lookup_scoped_attribute_spec): Don't call it. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-02-03 Jakub Jelinek + + * ggc-common.cc (gt_pch_save): Allow addr to be equal to + mmi.preferred_base + mmi.size - sizeof (void *). + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-01-30 Jakub Jelinek + + PR tree-optimization/113603 + * tree-ssa-strlen.cc (strlen_pass::handle_store): After + count_nonzero_bytes call refetch si using get_strinfo in case it + has been unshared in the meantime. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-01-25 Jakub Jelinek + + * doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns. + * doc/rtl.texi (CONST_VECTOR): Likewise. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-01-18 Jakub Jelinek + + PR target/113122 + * config/i386/i386.cc (x86_function_profiler): Add -masm=intel + support. Add missing space after , in emitted assembly in some + cases. Formatting fixes. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-01-16 Jakub Jelinek + + PR tree-optimization/113372 + PR middle-end/90348 + PR middle-end/110115 + PR middle-end/111422 + * cfgexpand.cc (add_scope_conflicts_2): New function. + (add_scope_conflicts_1): Use it. + +2024-06-11 Richard Biener + + Backported from master: + 2023-08-21 Richard Biener + + PR tree-optimization/111070 + * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have + an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI. + +2024-06-07 Jan Hubicka + + Backported from master: + 2023-12-29 Jan Hubicka + + * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS, + X86_TUNE_AVOID_256FMA_CHAINS): Enable for znver4 and Core. + +2024-06-04 Richard Biener + + Backported from master: + 2023-11-28 Richard Biener + + PR middle-end/112732 + * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET + of the newly built type. + +2024-06-04 Richard Biener + + Backported from master: + 2023-06-26 Richard Biener + + PR tree-optimization/110381 + * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts): + Materialize permutes before fold-left reductions. + +2024-06-04 Richard Biener + + Backported from master: + 2024-02-14 Richard Biener + + PR tree-optimization/113910 + * bitmap.cc (bitmap_hash): Mix the full element "hash" to + the hashval_t hash. + +2024-06-04 Richard Sandiford + + Backported from master: + 2024-01-29 Richard Sandiford + + PR target/113281 + * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove + workaround for right shifts. + (vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR. + (vect_determine_precisions_from_range): Be more selective about + which codes can be narrowed based on their input and output ranges. + For shifts, require at least one more bit of precision than the + maximum shift amount. + +2024-06-04 Richard Sandiford + + Backported from master: + 2024-05-24 Richard Sandiford + + PR tree-optimization/115192 + * tree-data-ref.cc (create_intersect_range_checks): Take the + alignment of the access sizes into account. + +2024-06-03 Uros Bizjak + + Backported from master: + 2024-05-31 Uros Bizjak + + PR target/115297 + * config/alpha/alpha.md (si3): Wrap DImode + operands 3 and 4 with truncate:SI RTX. + (*divmodsi_internal_er): Ditto for operands 1 and 2. + (*divmodsi_internal_er_1): Ditto. + (*divmodsi_internal): Ditto. + * config/alpha/constraints.md ("b"): Correct register + number in the description. + +2024-05-30 YunQiang Su + + Backported from master: + 2024-05-29 YunQiang Su + + * config/mips/mips.cc(mips16_gp_pseudo_reg): Mark + MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered. + (mips_emit_call_insn): Mark MIPS16_PIC_TEMP and + MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP. + +2024-05-28 Jakub Jelinek + + Backported from master: + 2024-05-22 Jakub Jelinek + + PR sanitizer/115172 + * ubsan.cc (instrument_bool_enum_load): If rhs is not in generic + address space, use qualified version of utype with the right + address space. Formatting fix. + +2024-05-28 Martin Jambor + + Backported from master: + 2024-05-14 Martin Jambor + + PR ipa/113907 + * ipa-prop.h (ipa_jump_functions_equivalent_p): Declare. + (values_equal_for_ipcp_p): Likewise. + * ipa-prop.cc (ipa_agg_pass_through_jf_equivalent_p): New function. + (ipa_agg_jump_functions_equivalent_p): Likewise. + (ipa_jump_functions_equivalent_p): Likewise. + * ipa-cp.cc (values_equal_for_ipcp_p): Make function public. + * ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h, + ipa-cp.h and ipa-prop.h. + (func_checker::compare_gimple_call): Comapre jump functions. + +2024-05-17 Richard Biener + + Backported from master: + 2024-01-31 Richard Biener + + PR middle-end/110176 + * match.pd (zext (bool) <= (int) 4294967295u): Make sure + to match INTEGER_CST only without outstanding conversion. + +2024-05-17 Richard Biener + + Backported from master: + 2023-08-17 Richard Biener + + PR tree-optimization/111039 + * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for + SSA_NAME_OCCURS_IN_ABNORMAL_PHI. + +2024-05-17 Richard Biener + + Backported from master: + 2023-11-20 Richard Biener + + PR tree-optimization/112281 + * tree-loop-distribution.cc + (loop_distribution::pg_add_dependence_edges): For = in the + innermost common loop record a partition conflict. + +2024-05-17 Richard Biener + + Backported from master: + 2023-11-13 Richard Biener + + PR tree-optimization/112495 + * tree-data-ref.cc (runtime_alias_check_p): Reject checks + between different address spaces. + +2024-05-17 Richard Biener + + Backported from master: + 2024-01-11 Richard Biener + + PR tree-optimization/112505 + * tree-vect-loop.cc (vectorizable_induction): Reject + bit-precision induction. + +2024-05-17 Richard Biener + + Backported from master: + 2024-01-23 Richard Biener + + PR debug/112718 + * dwarf2out.cc (dwarf2out_finish): Reset all type units + for the fat part of an LTO compile. + +2024-05-17 Richard Biener + + Backported from master: + 2023-12-14 Richard Biener + + PR tree-optimization/112793 + * tree-vect-slp.cc (vect_schedule_slp_node): Already + code-generated constant/external nodes are OK. + +2024-05-16 Richard Biener + + Backported from master: + 2024-02-22 Richard Biener + + PR tree-optimization/114027 + * tree-vect-loop.cc (vecctorizable_reduction): Use optimized + condition reduction classification only for single-element + chains. + +2024-05-16 Richard Biener + + Backported from master: + 2024-05-08 Richard Biener + + PR tree-optimization/114375 + * tree-vect-slp.cc (vect_build_slp_tree_2): Compute the + load permutation for masked loads but reject it when any + such is necessary. + * tree-vect-stmts.cc (vectorizable_load): Reject masked + VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not + supported. + +2024-05-16 Richard Biener + + Backported from master: + 2024-03-21 Richard Biener + + PR tree-optimization/114231 + * tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when + processing a BB SLP root. + +2024-05-16 Richard Biener + + Backported from master: + 2024-05-06 Richard Biener + + PR middle-end/114734 + * internal-fn.cc (expand_call_mem_ref): Use + get_gimple_for_ssa_name to get at the def stmt of the address + argument to honor SSA coalescing constraints. + +2024-05-16 Richard Biener + + Backported from master: + 2024-04-09 Richard Biener + + PR lto/114655 + * lto-wrapper.cc (merge_flto_options): Add force argument. + (merge_and_complain): Do not force here. + (run_gcc): But here to make the link-time -flto option override + any compile-time one. + +2024-05-16 Richard Biener + + Backported from master: + 2024-05-03 Richard Biener + + PR gcov-profile/114715 + * gimplify.cc (gimplify_switch_expr): Set the location of the + GIMPLE switch. + +2024-05-15 Martin Jambor + + Backported from master: + 2024-04-08 Martin Jambor + + PR ipa/108007 + PR ipa/112616 + * cgraph.h (cgraph_edge): Add a parameter to + redirect_call_stmt_to_callee. + * ipa-param-manipulation.h (ipa_param_adjustments): Add a + parameter to modify_call. + (ipa_release_ssas_in_hash): Declare. + * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New + parameter killed_ssas, pass it to padjs->modify_call. + * ipa-param-manipulation.cc (purge_all_uses): New function. + (ipa_param_adjustments::modify_call): New parameter killed_ssas. + Instead of substituting uses, invoke purge_all_uses. If + hash of killed SSAs has not been provided, create a temporary one + and release SSAs that have been added to it. + (compare_ssa_versions): New function. + (ipa_release_ssas_in_hash): Likewise. + * tree-inline.cc (redirect_all_calls): Create + id->killed_new_ssa_names earlier, pass it to edge redirection, + adjust a comment. + (copy_body): Release SSAs in id->killed_new_ssa_names. + +2024-05-15 Martin Jambor + + Backported from master: + 2024-04-05 Martin Jambor + + PR ipa/114247 + * ipa-param-manipulation.cc (ipa_param_adjustments::modify_call): + Force values obtined through pass-through maps to the expected + split type. + +2024-05-13 Andrew MacLeod + + PR tree-optimization/111009 + * range-op.cc (operator_addr_expr::op1_range): Be more restrictive. + * value-range.h (contains_zero_p): New. + +2024-05-09 Andrew Pinski + + Backported from master: + 2023-09-25 Andrew Pinski + + PR tree-optimization/110386 + * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR. + +2024-05-08 Andrew Pinski + + Backported from master: + 2024-02-22 Andrew Pinski + + PR tree-optimization/109804 + * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle + DEMANGLE_COMPONENT_UNNAMED_TYPE. + +2024-05-08 Andrew Pinski + + Backported from master: + 2023-09-10 Andrew Pinski + + PR tree-optimization/111331 + * tree-ssa-phiopt.cc (minmax_replacement): + Fix the LE/GE comparison for the + `(a CMP CST1) ? max : a` optimization. + +2024-05-08 Andrew Pinski + + Backported from master: + 2024-03-11 Andrew Pinski + + PR middle-end/95351 + * fold-const.cc (merge_truthop_with_opposite_arm): Use + the type of the operands of the comparison and not the type + of the comparison. + +2024-05-07 Georg-Johann Lay + + * config/avr/avr-mcus.def: Add new MCUs (copy from gcc-13). + * doc/avr-mmcu.texi: Rebuild. + +2024-05-07 Georg-Johann Lay + + Backported from master: + 2024-05-06 Georg-Johann Lay + + PR ipa/92606 + * config/avr/avr.cc (avr_option_override): Set + flag_ipa_icf_variables = 0. + +2024-05-02 Richard Biener + + Backported from master: + 2024-04-10 Richard Biener + + PR tree-optimization/114672 + * tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only + allow mode-precision results. + +2024-05-02 Will Schmidt + + Backported from master: + 2024-04-12 Will Schmidt + Peter Bergner + + PR target/101865 + * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use + TARGET_POWER8. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use + OPTION_MASK_POWER8. + * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8. + (ISA_2_7_MASKS_SERVER): Likewise. + * config/rs6000/rs6000.cc (rs6000_option_override_internal): Update + comment. Use OPTION_MASK_POWER8 and TARGET_POWER8. + * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8. + * config/rs6000/rs6000.md (define_attr "isa"): Add p8. + (define_attr "enabled"): Handle it. + (define_insn "prefetch"): Use TARGET_POWER8. + * config/rs6000/rs6000.opt (mpower8-internal): New. + +2024-05-02 Peter Bergner + + Backported from master: + 2024-04-10 Peter Bergner + + PR target/101865 + * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. + * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace + OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant + OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. + (rs6000_opt_masks): Neuter the "direct-move" option. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace + OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless + comment. + * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete + OPTION_MASK_DIRECT_MOVE. + (OTHER_P8_VECTOR_MASKS): Likewise. + (POWERPC_MASKS): Likewise. + * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var. + +2024-05-01 Jeevitha + + Backported from master: + 2024-03-07 Jeevitha Palanisamy + + PR target/113950 + * config/rs6000/vsx.md (vsx_splat_): Correct assignment to operand1 + and simplify else if with else. + +2024-04-30 Joe Ramsay + + Backported from master: + 2024-03-15 Joe Ramsay + + * match.pd: Fix truncation pattern for -fno-signed-zeroes + +2024-04-30 Yang Yujie + + Backported from master: + 2023-12-12 Yang Yujie + + PR target/114848 + * config/loongarch/loongarch.cc: Do not restore the saved eh_return + data registers ($r4-$r7) for a normal return of a function that calls + __builtin_eh_return elsewhere. + * config/loongarch/loongarch-protos.h: Same. + * config/loongarch/loongarch.md: Same. + +2024-04-26 Richard Ball + + PR target/114272 + * config/aarch64/aarch64-cores.def (AARCH64_CORE): + Change SCHEDULER_IDENT from cortexa55 to cortexa53 + for Cortex-A510. + +2024-04-25 Richard Ball + + Backported from master: + 2024-04-25 Richard Ball + + PR target/114837 + * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear): + Add zero/sign extend. + (arm_expand_prologue): Add zero/sign extend. + +2024-04-25 Kewen Lin + Andrew Pinski + + PR target/88309 + * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix + wrong align passed to function build_aligned_type. + * tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an + assertion to ensure align_unit should be positive. + * tree.cc (build_qualified_type): Update function comments. + +2024-04-23 Jakub Jelinek + + Backported from master: + 2024-03-26 Jakub Jelinek + + PR sanitizer/111736 + * tsan.cc (instrument_expr): Punt on non-generic address space + accesses. + +2024-04-23 Jakub Jelinek + + Backported from master: + 2024-03-22 Jakub Jelinek + + PR sanitizer/111736 + * ubsan.cc (ubsan_expand_null_ifn, instrument_mem_ref): Avoid + SANITIZE_NULL instrumentation for non-generic address spaces + for which targetm.addr_space.zero_address_valid (as) is true. + +2024-04-23 Richard Biener + + Backported from master: + 2024-03-21 Richard Biener + + PR tree-optimization/111736 + * asan.cc (instrument_derefs): Do not instrument accesses + to non-generic address-spaces. + +2024-04-23 Richard Biener + + Backported from master: + 2023-12-05 Richard Biener + + PR sanitizer/111736 + * asan.cc (asan_protect_global): Do not protect globals + in non-generic address-space. + +2024-04-22 Iain Sandoe + + Backported from master: + 2023-09-04 Iain Sandoe + + * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for + all 32b Darwin PowerPC cases. + +2024-04-22 Iain Sandoe + + Backported from master: + 2024-04-02 Iain Sandoe + + * config/darwin.cc (darwin_override_options): Update the + clang major version value in the dsymutil check. + +2024-04-21 Iain Sandoe + + Backported from master: + 2024-04-02 Iain Sandoe + + * config/darwin.cc (darwin_override_options): Reduce the debug + level to 2 if dsymutil cannot handle .macinfo sections. + +2024-04-19 Iain Sandoe + + Backported from master: + 2023-10-25 Iain Sandoe + + * config/darwin.cc (darwin_override_options): Handle fPIE. + +2024-04-19 Iain Sandoe + + * config/darwin.h (LINK_COMMAND_SPEC_A): Handle weak crts + before other objects. (REAL_LIBGCC_SPEC): Remove weak crts + from here. (DARWIN_WEAK_CRTS): New. + +2024-04-19 Iain Sandoe + + Backported from master: + 2024-01-28 Iain Sandoe + + * config/darwin.cc (darwin_build_constant_cfstring): Prevent over- + alignment of CFString constants by setting DECL_USER_ALIGN. + +2024-04-19 Iain Sandoe + + Backported from master: + 2024-01-18 Iain Sandoe + + * config/darwin.cc (darwin_objc1_section): Use the correct + meta-data version for constant strings. + (machopic_select_section): Assert if we fail to handle CFString + sections as Obejctive-C meta-data or drectly. + +2024-04-19 Iain Sandoe + + Backported from master: + 2024-01-18 Iain Sandoe + + PR target/105522 + * config/darwin.cc (machopic_select_section): Handle C and C++ + CFStrings. + (darwin_rename_builtins): Move this out of the CFString code. + (darwin_libc_has_function): Likewise. + (darwin_build_constant_cfstring): Create an anonymous var to + hold each CFString. + * config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant + CFstrings. + +2024-04-19 Iain Sandoe + + Backported from master: + 2023-10-26 Iain Sandoe + + * config/darwin.h + (darwin_label_is_anonymous_local_objc_name): Make metadata names + linker-visibile for GNU objective C. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-10-18 Iain Sandoe + + * config.in: Regenerate. + * config/darwin.cc (darwin_file_start): Add assembler directives + for the target OS version, where these are supported by the + assembler. + (darwin_override_options): Check for building >= macOS 10.14. + * configure: Regenerate. + * configure.ac: Check for assembler support of .build_version + directives. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-09-10 Iain Sandoe + + * config/darwin.cc (darwin_function_section): Place unlikely + executed global init code into the standard cold section. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-09-04 Iain Sandoe + + * config/darwin-sections.def (static_init_section): Add the + __TEXT,__StaticInit section. + * config/darwin.cc (darwin_function_section): Use the static init + section for global initializers, to match other platform toolchains. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-09-04 Iain Sandoe + + * config/darwin-sections.def (darwin_exception_section): Move to + the __TEXT segment. + * config/darwin.cc (darwin_emit_except_table_label): Align before + the exception table label. + * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC- + relative 4byte relocs. + +2024-04-18 Rainer Orth + + Backported from master: + 2023-08-17 Rainer Orth + + * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v + output. + * configure: Regenerate. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-09-18 Iain Sandoe + + * configure: Regenerate. + * configure.ac: Handle explict disable of stdlib option, set + defaults for Darwin. + +2024-04-18 Iain Sandoe + + Backported from master: + 2023-09-20 Iain Sandoe + + * config/darwin.h: + (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same + specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'. + +2024-04-15 Richard Biener + + Backported from master: + 2024-04-05 Richard Biener + + PR middle-end/114599 + PR gcov-profile/114115 + * symtab.cc (ifunc_ref_map): Do not use auto_bitmap. + (is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit + pair. + (symtab_node::check_ifunc_callee_symtab_nodes): Properly + allocate ifunc_ref_map here. + +2024-04-15 H.J. Lu + + Backported from master: + 2024-04-03 H.J. Lu + + PR tree-optimization/114115 + * cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes. + (cgraph_node): Add called_by_ifunc_resolver. + * cgraphunit.cc (symbol_table::compile): Call + symtab_node::check_ifunc_callee_symtab_nodes. + * symtab.cc (check_ifunc_resolver): New. + (ifunc_ref_map): Likewise. + (is_caller_ifunc_resolver): Likewise. + (symtab_node::check_ifunc_callee_symtab_nodes): Likewise. + * tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect + call profiling for IFUNC resolvers and their callees. + +2024-04-15 Tamar Christina + + * config/aarch64/aarch64.h (AARCH64_ARCH): Remove LS64 from + Armv8.7-a. + +2024-04-15 Tamar Christina + + PR tree-optimization/113552 + * config/aarch64/aarch64.cc + (aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1. + +2024-04-12 Iain Sandoe + + Backported from master: + 2023-09-27 Iain Sandoe + + PR target/111610 + * configure: Regenerate. + * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN". + +2024-04-12 Iain Sandoe + + Backported from master: + 2023-09-18 Iain Sandoe + + * config/darwin-protos.h (enum darwin_external_toolchain): New. + * config/darwin.cc (DSYMUTIL_VERSION): New. + (darwin_override_options): Choose the default debug DWARF version + depending on the configured dsymutil version. + +2024-04-12 Iain Sandoe + + Backported from master: + 2022-05-03 Iain Sandoe + + * config/darwin.cc (darwin_label_is_anonymous_local_objc_name): Make + protocol class methods linker-visible. + +2024-04-11 Kito Cheng + + Backported from master: + 2024-02-29 Kito Cheng + + PR target/114130 + * config/riscv/sync.md (atomic_compare_and_swap): Sign + extend the expected value if needed. + +2024-04-04 Iain Sandoe + + Backported from master: + 2023-07-13 Iain Sandoe + + PR target/110624 + * config/darwin.h (DARWIN_PLATFORM_ID): New. + (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version + and SDK data to the static linker. + +2024-04-02 Qing Zhao + + Backported from master: + 2023-09-15 Qing Zhao + + PR tree-optimization/111407 + * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform + when one of the operands is subject to abnormal coalescing. + +2024-04-01 Lulu Cheng + + Backported from master: + 2024-01-11 Lulu Cheng + + PR target/113233 + * config/loongarch/genopts/loongarch.opt.in: Mark options with + the "Save" property. + * config/loongarch/loongarch-opts.cc + (loongarch_update_gcc_opt_status): Update the value of the + la_target to global_options. + * config/loongarch/loongarch-opts.h + (loongarch_update_gcc_opt_status): Add a function declaration. + * config/loongarch/loongarch.cc + (loongarch_option_override_internal): Call the function + loongarch_update_gcc_opt_status. + (loongarch_option_save): New functions. + (loongarch_option_restore): Likewise. + (TARGET_OPTION_SAVE): Define macro. + (TARGET_OPTION_RESTORE): Likewise. + * config/loongarch/loongarch.opt: Regenerate. + +2024-03-27 Richard Sandiford + + Backported from master: + 2024-03-05 Richard Sandiford + + PR sanitizer/97696 + * asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int. + +2024-03-26 Richard Biener + + Backported from master: + 2023-08-04 Richard Biener + + PR tree-optimization/110838 + * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict + the arithmetic right-shift case to non-negative operands. + +2024-03-26 Richard Biener + + Backported from master: + 2023-07-27 Richard Biener + + PR tree-optimization/91838 + * gimple-match-head.cc: Include attribs.h and asan.h. + * generic-match-head.cc: Likewise. + * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern. + +2024-03-17 Iain Sandoe + + Backported from master: + 2023-07-02 Iain Sandoe + + PR target/108743 + * config/darwin.opt: Add fconstant-cfstrings alias to + mconstant-cfstrings. + * doc/invoke.texi: Amend invocation descriptions to reflect + that the fconstant-cfstrings is a target-option alias and to + add the missing mconstant-cfstrings option description to the + Darwin section. + +2024-03-17 Iain Sandoe + + * config/i386/darwin.h (ENDFILE_SPEC): Fix whitespace. + +2024-03-14 liuhongt + + Backported from master: + 2024-03-14 liuhongt + + * config/i386/i386-features.cc + (general_scalar_chain::convert_op): Handle REG_EH_REGION note. + (convert_scalars_to_vector): Ditto. + * config/i386/i386-features.h (class scalar_chain): New + memeber control_flow_insns. + +2024-03-09 Lulu Cheng + + Backported from master: + 2024-03-09 Lulu Cheng + + * config/loongarch/sync.md (atomic_cas_value_strong): + In loongarch64, a sign extension operation is added when + operands[2] is a register operand and the mode is SImode. + +2024-03-03 Oleg Endo + + PR target/101737 + * config/sh/sh.cc (sh_is_nott_insn): Handle case where the input + is not an insn, but e.g. a code label. + +2024-03-01 Richard Biener + + Backported from master: + 2024-02-06 Richard Biener + + PR tree-optimization/110221 + * tree-vect-slp.cc (vect_schedule_slp_node): When loop + masking / len is applied make sure to not schedule + intenal defs outside of the loop. + +2024-02-27 Eric Botcazou + + * tree-ssa-dse.cc (compute_trims): Fix description. Return early + if either ref->offset is not byte aligned or ref->size is not known + to be equal to ref->max_size. + (maybe_trim_complex_store): Fix description. + (maybe_trim_constructor_store): Likewise. + (maybe_trim_partially_dead_store): Likewise. + +2024-02-27 Jeevitha + + Backported from master: + 2023-08-31 Jeevitha Palanisamy + + PR target/110411 + * config/rs6000/mma.md (define_insn_and_split movoo): Disallow + AltiVec address operands. + (define_insn_and_split movxo): Likewise. + * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove + redundant mode size check. + +2024-02-27 H.J. Lu + + Backported from master: + 2024-02-26 H.J. Lu + + PR target/114098 + * config/i386/amxtileintrin.h (_tile_loadconfig): Use + __builtin_ia32_ldtilecfg. + (_tile_storeconfig): Use __builtin_ia32_sttilecfg. + * config/i386/i386-builtin.def (BDESC): Add + __builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg. + * config/i386/i386-expand.cc (ix86_expand_builtin): Handle + IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG. + * config/i386/i386.md (ldtilecfg): New pattern. + (sttilecfg): Likewise. + +2024-02-23 Richard Earnshaw + + Backported from master: + 2024-02-23 Richard Earnshaw + + PR target/108120 + * config/arm/neon.md (div3): Rename from div3. + Gate with ARM_HAVE_NEON__ARITH. + +2024-02-22 Xi Ruoyao + + Backported from master: + 2023-10-31 Xi Ruoyao + + PR target/112299 + * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 + if not defined yet. + +2024-02-22 Xi Ruoyao + + Backported from master: + 2023-11-14 Xi Ruoyao + + PR target/112330 + * config/loongarch/genopts/loongarch.opt.in: Add + -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to + account conditional branch relaxation support status. + * config/loongarch/loongarch.opt: Regenerate. + * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if + the assembler supports conditional branch relaxation. + * configure: Regenerate. + * config.in: Regenerate. Note that there are some unrelated + changes introduced by r14-5424 (which does not contain a + config.in regeneration). + * config/loongarch/loongarch-opts.h + (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined. + * config/loongarch/loongarch.h (ASM_MRELAX_DEFAULT): Define. + (ASM_MRELAX_SPEC): Define. + (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}". + * doc/invoke.texi: Document -m[no-]relax and + -m[no-]pass-mrelax-to-as for LoongArch. + +2024-02-22 Lulu Cheng + + Backported from master: + 2023-09-20 Lulu Cheng + + * config.in: Regenerate. + * config/loongarch/genopts/loongarch.opt.in: Add compilation option + mrelax. And set the initial value of explicit-relocs according to the + detection status. + * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the + --no-relax option to the linker. + * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro. + * config/loongarch/loongarch.opt: Regenerate. + * configure: Regenerate. + * configure.ac: Add detection of support for binutils relax function. + +2024-02-22 Lulu Cheng + + Backported from master: + 2023-10-17 Lulu Cheng + Chenghua Xu + + * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP): + Delete. + +2024-02-19 Andre Vieira + + Backported from master: + 2023-12-20 Andre Vieira + + PR target/112787 + * tree-vect-generic.cc (type_for_widest_vector_mode): Change function to + use original vector type and check widest vector mode has at most the + same number of elements. + (get_compute_type): Pass original vector type rather than the element + type to type_for_widest_vector_mode and remove now obsolete check for + the number of elements. + +2024-02-15 Jakub Jelinek + + Backported from master: + 2024-02-15 Jakub Jelinek + + PR middle-end/113921 + * cfgrtl.h (prepend_insn_to_edge): New declaration. + * cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function + comment. + (prepend_insn_to_edge): New function. + * cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of + insert_insn_on_edge. + +2024-02-14 Alex Coplan + + Backported from master: + 2024-02-07 Alex Coplan + + PR target/111677 + * config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use + V16QImode for the full 16-byte FPR saves in the vector PCS case. + (aarch64_gen_storewb_pair): Handle V16QImode. + (aarch64_gen_loadwb_pair): Likewise. + (aarch64_gen_load_pair): Likewise. + * config/aarch64/aarch64.md (loadwb_pair_): + Rename to ... + (loadwb_pair_): ... this, extending to + V16QImode. + (storewb_pair_): Rename to ... + (storewb_pair_): ... this, extending to + V16QImode. + * config/aarch64/iterators.md (TX_V16QI): New. + +2024-02-14 Richard Biener + + PR tree-optimization/113896 + * tree-vect-slp.cc (vect_optimize_slp): Permute + SLP_TREE_SCALAR_STMTS when eliding a permuation in a + VEC_PERM node we need to preserve because it wraps an + extern vector. + +2024-02-08 Georg-Johann Lay + + Backported from master: + 2024-02-08 Georg-Johann Lay + + PR target/113824 + * config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4. + * doc/avr-mmcu.texi: Rebuild. + +2024-02-05 Jason Merrill + + Backported from master: + 2023-06-02 Jason Merrill + + PR c++/95226 + PR c++/109359 + * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match. + (initializer_constant_valid_p_1): Compare float precision. + +2024-02-05 Xi Ruoyao + + Backported from master: + 2024-02-05 Xi Ruoyao + + * config/mips/mips-msa.md (neg2): Add missing mode for + neg. + +2024-02-05 Xi Ruoyao + + Backported from master: + 2024-02-05 Xi Ruoyao + + * config/mips/mips-msa.md (elmsgnbit): New define_mode_attr. + (neg2): Change the mode iterator from MSA to IMSA because + in FP arithmetic we cannot use (0 - x) for -x. + (neg2): New define_insn to implement FP vector negation, + using a bnegi instruction to negate the sign bit. + +2024-02-02 Martin Jambor + + Backported from master: + 2024-01-24 Martin Jambor + + PR tree-optimization/110422 + * tree-sra.cc (scan_function): Disqualify bases of operands of asm + gotos. + +2024-02-01 John David Anglin + + * config/pa/pa.md (atomic_storedi_1): Fix bug in + alternative 1. + +2024-01-26 Wilco Dijkstra + + Backported from master: + 2024-01-16 Wilco Dijkstra + + * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU. + * config/aarch64/aarch64-tune.md: Regenerated. + * doc/invoke.texi (-mcpu): Add cobalt-100 core. + +2024-01-25 Georg-Johann Lay + + Backported from master: + 2024-01-25 Georg-Johann Lay + + PR target/113601 + * config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start. + +2024-01-16 Georg-Johann Lay + + Backported from master: + 2024-01-15 Georg-Johann Lay + + PR target/107201 + * config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib. + * config/avr/driver-avr.cc (avr_no_devlib): New function. + (avr_devicespecs_file): Use it to remove -nodevicelib from the + options for cores only. + * config/avr/avr-arch.h (avr_get_parch): New prototype. + * config/avr/avr-devices.cc (avr_get_parch): New function. + +2024-01-15 Andrew Pinski + + Backported from master: + 2024-01-15 Andrew Pinski + + PR target/113156 + * config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag. + (-mbranch-cost): Set "Optimization" flag. + +2024-01-12 Georg-Johann Lay + + Backported from master: + 2024-01-12 Georg-Johann Lay + + * config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from + format string to %s argument. + +2024-01-08 Georg-Johann Lay + + Backported from master: + 2024-01-08 Georg-Johann Lay + + PR target/112952 + * config/avr/avr.cc (avr_handle_addr_attribute): Also print valid + range when diagnosing attribute "io" and "io_low" are out of range. + (avr_eval_addr_attrib): Don't ICE on empty address at that place. + (avr_insert_attributes): Reject if attribute "address", "io" or "io_low" + in contexts other than static storage. + (avr_asm_output_aligned_decl_common): Move output of decls with + attribute "address", "io", and "io_low" to... + (avr_output_addr_attrib): ...this new function. + (avr_asm_asm_output_aligned_bss): Remove output for decls with + attribute "address", "io", and "io_low". + (avr_encode_section_info): Rectify handling of decls with attribute + "address", "io", and "io_low". + +2023-12-19 Jakub Jelinek + + Backported from master: + 2023-12-19 Jakub Jelinek + + PR target/112816 + * config/i386/mmx.md (signbitv2sf2): Force operands[1] into a REG. + +2023-12-18 Jakub Jelinek + + Backported from master: + 2023-12-18 Jakub Jelinek + + PR tree-optimization/113013 + * tree-object-size.cc (alloc_object_size): Return size_unknown if + corresponding argument(s) don't have integral type or have integral + type with higher precision than sizetype. Don't check arg1 >= 0 + uselessly. Compare argument indexes against gimple_call_num_args + in unsigned type rather than int. Formatting fixes. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-11-29 Jakub Jelinek + + PR middle-end/112733 + * fold-const.cc (multiple_of_p): Pass SIGNED rather than + UNSIGNED for wi::multiple_of_p on widest_int arguments. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-12-05 Jakub Jelinek + + PR target/112845 + * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL + if the new immediate is ix86_endbr_immediate_operand. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-12-04 Jakub Jelinek + + PR target/112837 + * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking + for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and + SET_DEST macros instead of XEXP, rename vec variable to set. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-12-04 Jakub Jelinek + + PR target/112816 + * config/i386/sse.md (signbit2): Force operands[1] into a REG. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-11-25 Jakub Jelinek + + PR target/111408 + * config/i386/i386.md (*jcc_bt_mask): Add (const_int 0) as + expected second operand of bt_comparison_operator. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-11-13 Jakub Jelinek + + PR tree-optimization/111967 + * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow + m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1. + (block_range_cache::dump): Iterate from 1 rather than 0. Don't use + ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to + m_ssa_ranges.length () rather than num_ssa_names. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-11-09 Jakub Jelinek + + PR c/112339 + * attribs.cc (attribute_ignored_p): Only return true for + attr_namespace_ignored_p if as is NULL. + (decl_attributes): Never add ignored attributes. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-07-19 Jakub Jelinek + + PR tree-optimization/110731 + * wide-int.cc (wi::divmod_internal): Always unpack dividend and + divisor as UNSIGNED regardless of sgn. + +2023-12-15 Richard Biener + + Backported from master: + 2023-08-24 Richard Biener + + PR debug/111080 + * dwarf2out.cc (prune_unused_types_walk): Handle + DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type, + DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type + and DW_TAG_dynamic_type as to only output them when referenced. + +2023-12-15 Richard Biener + + Backported from master: + 2023-08-25 Richard Biener + + PR tree-optimization/111137 + * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences): + Properly handle grouped stores from other SLP instances. + +2023-12-15 Richard Biener + + Backported from master: + 2023-08-25 Richard Biener + + * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences): + Split out from vect_slp_analyze_node_dependences, remove + dead code. + (vect_slp_analyze_load_dependences): Split out from + vect_slp_analyze_node_dependences, adjust comments. Process + queued stores before any disambiguation. + (vect_slp_analyze_node_dependences): Remove. + (vect_slp_analyze_instance_dependence): Adjust. + +2023-12-12 liuhongt + + Backported from master: + 2023-12-12 liuhongt + + PR target/112891 + * config/i386/i386.cc (ix86_avx_u128_mode_after): Return + AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to + align with ix86_avx_u128_mode_needed. + (ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for + sibling_call. + +2023-11-27 Richard Biener + + Backported from master: + 2023-10-23 Richard Biener + + PR tree-optimization/111917 + * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert + new conditional after last stmt. + +2023-11-27 Richard Biener + + Backported from master: + 2023-10-17 Richard Biener + + PR middle-end/111818 + * tree-ssa.cc (maybe_optimize_var): When clearing + DECL_NOT_GIMPLE_REG_P always rewrite into SSA. + +2023-11-27 Richard Biener + + Backported from master: + 2023-09-28 Richard Biener + + PR tree-optimization/111614 + * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly + convert the first vector when required. + +2023-11-27 Richard Biener + + Backported from master: + 2023-10-12 Richard Biener + + PR tree-optimization/111764 + * tree-vect-loop.cc (check_reduction_path): Remove the attempt + to allow x + x via special-casing of assigns. + +2023-11-27 Richard Biener + + Backported from master: + 2023-10-20 Richard Biener + + PR tree-optimization/111445 + * tree-scalar-evolution.cc (simple_iv_with_niters): + Add missing check for a sign-conversion. + +2023-11-27 Richard Biener + + Backported from master: + 2023-08-18 Richard Biener + + PR tree-optimization/111019 + * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing + also scrap base and offset in case the ref is indirect. + +2023-11-27 Richard Biener + + Backported from master: + 2023-08-03 Richard Biener + + PR tree-optimization/110702 + * tree-ssa-loop-ivopts.cc (rewrite_use_address): When + we created a NULL pointer based access rewrite that to + a LEA. + +2023-11-27 Richard Biener + + Backported from master: + 2023-07-06 Richard Biener + + PR tree-optimization/110556 + * tree-ssa-tail-merge.cc (gimple_equal_p): Check + assign code and all operands of non-stores. + +2023-11-27 Richard Biener + + Backported from master: + 2023-07-06 Richard Biener + + PR tree-optimization/110515 + * tree-ssa-pre.cc (compute_avail): Make code dealing + with hoisting loads with different alias-sets more + robust. + +2023-11-27 Richard Biener + + Backported from master: + 2023-06-20 Richard Biener + + PR debug/110295 + * dwarf2out.cc (process_scope_var): Continue processing + the decl after setting a parent in case the existing DIE + was in limbo. + +2023-11-27 Richard Biener + + Backported from master: + 2023-05-31 Richard Biener + + PR ipa/109983 + PR tree-optimization/109143 + * tree-ssa-structalias.cc (struct topo_info): Remove. + (init_topo_info): Likewise. + (free_topo_info): Likewise. + (compute_topo_order): Simplify API, put the component + with ESCAPED last so it's processed first. + (topo_visit): Adjust. + (solve_graph): Likewise. + +2023-11-24 Uros Bizjak + + Backported from master: + 2023-11-23 Uros Bizjak + + PR target/112672 + * config/i386/i386.md (parityhi2): + Use temporary register in the call to gen_parityhi2_cmp. + +2023-11-22 Maciej W. Rozycki + + Backported from master: + 2023-11-22 Maciej W. Rozycki + + PR target/111815 + * config/vax/vax.cc (index_term_p): Only accept the index scaler + as the RHS operand to ASHIFT. + +2023-11-20 Lulu Cheng + + Backported from master: + 2023-11-20 Lulu Cheng + + * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix. + +2023-11-20 Peng Fan + + Backported from master: + 2023-04-21 Peng Fan + + * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine. + +2023-11-16 Xi Ruoyao + + Backported from master: + 2023-11-15 Xi Ruoyao + + * config/loongarch/loongarch.cc + (loongarch_memmodel_needs_release_fence): Remove. + (loongarch_cas_failure_memorder_needs_acquire): New static + function. + (loongarch_print_operand): Redefine 'G' for the barrier on CAS + failure. + * config/loongarch/sync.md (atomic_cas_value_strong): + Remove the redundant barrier before the LL instruction, and + emit an acquire barrier on failure if needed by + failure_memorder. + (atomic_cas_value_cmp_and_7_): Likewise. + (atomic_cas_value_add_7_): Remove the unnecessary barrier + before the LL instruction. + (atomic_cas_value_sub_7_): Likewise. + (atomic_cas_value_and_7_): Likewise. + (atomic_cas_value_xor_7_): Likewise. + (atomic_cas_value_or_7_): Likewise. + (atomic_cas_value_nand_7_): Likewise. + (atomic_cas_value_exchange_7_): Likewise. + +2023-11-15 Kewen Lin + + Backported from master: + 2023-11-06 Kewen Lin + + PR target/111828 + * config.in: Regenerate. + * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard + inline asm handling under !HAVE_AS_POWER10_HTM. + * configure: Regenerate. + * configure.ac: Detect assembler support for HTM insns at power10. + +2023-11-10 liuhongt + + Backported from master: + 2023-11-10 liuhongt + + PR target/112443 + * config/i386/sse.md (*avx2_pcmp3_4): Fix swap condition + from LT to GT since there's not in the pattern. + (*avx2_pcmp3_5): Ditto. + +2023-11-06 John David Anglin + + * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo. + +2023-10-26 Lulu Cheng + + Backported from master: + 2023-10-23 Lulu Cheng + + * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition. + +2023-10-26 chenxiaolong + + Backported from master: + 2023-10-25 chenxiaolong + + * config/loongarch/loongarch.md (get_thread_pointer):Adds the + instruction template corresponding to the __builtin_thread_pointer + function. + * doc/extend.texi:Add the __builtin_thread_pointer function support + description to the documentation. + +2023-10-26 liuhongt + + Backported from master: + 2023-07-06 liuhongt + + PR target/110170 + * config/i386/i386.md (movdf_internal): Disparage slightly for + 2 alternatives (r,v) and (v,r) by adding constraint modifier + '?'. + +2023-10-23 Oleg Endo + + PR target/111001 + * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg): + Skip over nop move insns. + +2023-10-23 Kewen Lin + + Backported from master: + 2023-10-12 Kewen Lin + + PR target/111367 + * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed + instruction emission and incorporate to stack_protect_set. + (stack_protect_setdi): Rename to ... + (stack_protect_set): ... this, adjust constraint. + (stack_protect_testsi): Support prefixed instruction emission and + incorporate to stack_protect_test. + (stack_protect_testdi): Rename to ... + (stack_protect_test): ... this, adjust constraint. + +2023-10-20 Oleg Endo + + PR target/101177 + * config/sh/sh.md (unnamed split pattern): Fix comparison of + find_regno_note result. + +2023-10-19 Richard Sandiford + + Backported from master: + 2023-09-07 Richard Sandiford + + PR target/111528 + * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary + rather than gen_rtx_PLUS. + +2023-10-16 Kewen Lin + + Backported from master: + 2023-09-25 Kewen Lin + + PR target/111380 + * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt + target_option_default_node when the callee has no option + attributes, also simplify the existing code accordingly. + +2023-10-16 Kewen Lin + + Backported from master: + 2023-09-25 Kewen Lin + + PR target/111366 + * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip + empty inline asm. + +2023-10-07 Andrew Pinski + + Backported from master: + 2023-10-06 Andrew Pinski + + PR middle-end/111699 + * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e), + (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE. + +2023-10-02 Pat Haugen + + Backported from master: + 2023-09-19 Pat Haugen + + * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the + modulo instruction is disabled. + * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New. + * config/rs6000/rs6000.md (mod3, *mod3): Check it. + (define_expand umod3): New. + (define_insn umod3): Rename to *umod3 and check if the modulo + instruction is disabled. + (umodti3, modti3): Check if the modulo instruction is disabled. + +2023-09-29 Wilco Dijkstra + + Backported from master: + 2023-09-28 Wilco Dijkstra + + PR target/111121 + * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander. + (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion. + * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support + for memmove. + * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new + function. + +2023-09-26 Eric Botcazou + + * gimple-range-gori.cc (gori_compute::logical_combine): Add missing + return statement in the varying case. + +2023-09-20 Richard Sandiford + + Backported from master: + 2023-09-15 Richard Sandiford + + PR target/111411 + * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require + the lower memory access to a mem-pair operand. + +2023-09-20 Richard Sandiford + + Backported from master: + 2023-08-31 Richard Sandiford + + * config/aarch64/aarch64.md (untyped_call): Emit a call_value + rather than a call. List each possible destination register + in the call pattern. + +2023-09-12 Uros Bizjak + + PR target/111340 + * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT. + Call output_addr_const for CASE_CONST_SCALAR_INT. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): + New function. + (aarch64_layout_frame): Use it to decide whether locals should + go above or below the saved registers. + (aarch64_expand_prologue): Update stack layout comment. + Emit a stack tie after the final adjustment. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) + (aarch64_frame::below_hard_fp_saved_regs_size): Delete. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) + (aarch64_frame::hard_fp_save_and_probe): New fields. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. + Rather than asserting that a leaf function saves LR, instead assert + that a leaf function saves something. + (aarch64_get_separate_components): Prevent the chosen probe + registers from being individually shrink-wrapped. + (aarch64_allocate_and_probe_stack_space): Remove workaround for + probe registers that aren't at the bottom of the previous allocation. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): + Always probe the residual allocation at offset 1024, asserting + that that is in range. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that + the LR save slot is in the first 16 bytes of the register save area. + Only form STP/LDP push/pop candidates if both registers are valid. + (aarch64_allocate_and_probe_stack_space): Remove workaround for + when LR was not in the first 16 bytes. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): + Don't probe final allocations that are exactly 1KiB in size (after + unprobed space above the final allocation has been deducted). + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak + calculation of initial_adjust for frames in which all saves + are SVE saves. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify + the allocation of the top of the frame. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame): Add comment above + reg_offset. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets + from the bottom of the frame, rather than the bottom of the saved + register area. Measure reg_offset from the bottom of the frame + rather than the bottom of the saved register area. + (aarch64_save_callee_saves): Update accordingly. + (aarch64_restore_callee_saves): Likewise. + (aarch64_get_separate_components): Likewise. + (aarch64_process_components): Likewise. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename + to... + (aarch64_frame::bytes_above_hard_fp): ...this. + * config/aarch64/aarch64.cc (aarch64_layout_frame) + (aarch64_expand_prologue): Update accordingly. + (aarch64_initial_elimination_offset): Likewise. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... + (aarch64_frame::bytes_above_locals): ...this. + * config/aarch64/aarch64.cc (aarch64_layout_frame) + (aarch64_initial_elimination_offset): Update accordingly. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the + calculation of chain_offset into the emit_frame_chain block. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove + callee_offset handling. + (aarch64_save_callee_saves): Replace the start_offset parameter + with a bytes_below_sp parameter. + (aarch64_restore_callee_saves): Likewise. + (aarch64_expand_prologue): Update accordingly. + (aarch64_expand_epilogue): Likewise. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New + field. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. + (aarch64_expand_epilogue): Use it instead of + below_hard_fp_saved_regs_size. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New + field. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, + and use it instead of crtl->outgoing_args_size. + (aarch64_get_separate_components): Use bytes_below_saved_regs instead + of outgoing_args_size. + (aarch64_process_components): Likewise. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly + allocate the frame in one go if there are no saved registers. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use + chain_offset rather than callee_offset. + +2023-09-12 Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use + a local shorthand for cfun->machine->frame. + (aarch64_restore_callee_saves, aarch64_get_separate_components): + (aarch64_process_components): Likewise. + (aarch64_allocate_and_probe_stack_space): Likewise. + (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. + (aarch64_layout_frame): Use existing shorthand for one more case. + +2023-09-12 Haochen Gui + + Backported from master: + 2023-08-31 Haochen Gui + + PR target/96762 + * config/rs6000/rs6000-string.cc (expand_block_move): Call vector + load/store with length only on 64-bit Power10. + +2023-09-11 liuhongt + + Backported from master: + 2023-09-11 liuhongt + + PR target/111306 + PR target/111335 + * config/i386/sse.md (int_comm): New int_attr. + (fma__): + Remove % for Complex conjugate operations since they're not + commutative. + (fma___pair): Ditto. + (___mask): Ditto. + (cmul3): Ditto. + +2023-09-01 Tobias Burnus + + Backported from master: + 2023-08-19 Tobias Burnus + + PR middle-end/111017 + * omp-expand.cc (expand_omp_for_init_vars): Pass after=true + to expand_omp_build_cond for 'factor != 0' condition, resulting + in pre-r12-5295-g47de0b56ee455e code for the gimple insert. + +2023-09-01 Lulu Cheng + + Backported from master: + 2023-09-01 Lulu Cheng + Guo Jie + + PR target/110484 + * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the + frame_pointer_needed to determine whether to use the $fp register. + +2023-08-30 Jakub Jelinek + + Backported from master: + 2023-08-30 Jakub Jelinek + + PR tree-optimization/110914 + * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call + adjust_last_stmt unless len is known constant. + +2023-08-30 Jakub Jelinek + + Backported from master: + 2023-08-30 Jakub Jelinek + + PR tree-optimization/111015 + * gimple-ssa-store-merging.cc + (imm_store_chain_info::output_merged_store): Use wi::mask and + wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and + build_int_cst to build BIT_AND_EXPR mask. + +2023-08-19 Guo Jie + + Backported from master: + 2023-08-19 Guo Jie + Lulu Cheng + + * config/loongarch/t-loongarch: Add loongarch-driver.h into + TM_H. Add loongarch-def.h and loongarch-tune.h into + OPTIONS_H_EXTRA. + +2023-08-16 liuhongt + + Backported from master: + 2023-08-16 liuhongt + + * config/i386/i386-builtins.cc + (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts. + * config/i386/i386-options.cc (parse_mtune_ctrl_str): + Set/Clear tune features use_{gather,scatter}_{2parts, 4parts, + 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}. + * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust + for use_scatter_8parts + * config/i386/i386.h (TARGET_USE_GATHER): Rename to .. + (TARGET_USE_GATHER_8PARTS): .. this. + (TARGET_USE_SCATTER): Rename to .. + (TARGET_USE_SCATTER_8PARTS): .. this. + * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to + (X86_TUNE_USE_GATHER_8PARTS): .. this. + (X86_TUNE_USE_SCATTER): Rename to + (X86_TUNE_USE_SCATTER_8PARTS): .. this. + * config/i386/i386.opt: Add new options mgather, mscatter. + +2023-08-16 liuhongt + + Backported from master: + 2023-08-16 liuhongt + + * config/i386/i386-options.cc (m_GDS): New macro. + * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't + enable for m_GDS. + (X86_TUNE_USE_GATHER_4PARTS): Ditto. + (X86_TUNE_USE_GATHER): Ditto. + +2023-08-09 liuhongt + + * common/config/i386/cpuinfo.h (get_available_features): Check + max_subleaf_level for valid subleaf before use CPUID. + +2023-08-01 Kewen Lin + + Backported from master: + 2023-07-26 Kewen Lin + + PR target/110741 + * config/rs6000/vsx.md (define_insn xxeval): Correct vsx + operands output with "x". + +2023-07-14 Uros Bizjak + + Backported from master: + 2023-07-14 Uros Bizjak + + PR target/110206 + * fwprop.cc (contains_paradoxical_subreg_p): Move to ... + * rtlanal.cc (contains_paradoxical_subreg_p): ... here. + * rtlanal.h (contains_paradoxical_subreg_p): Add prototype. + * cprop.cc (try_replace_reg): Do not set REG_EQUAL note + when the original source contains a paradoxical subreg. + +2023-07-14 Oleg Endo + + PR target/101469 + * config/sh/sh.md (peephole2): Handle case where eliminated reg + is also used by the address of the following memory operand. + +2023-07-13 Uros Bizjak + + Backported from master: + 2023-07-13 Uros Bizjak + + PR target/106966 + * config/alpha/alpha.cc (alpha_emit_set_long_const): + Always use DImode when constructing long const. + +2023-07-08 Jonathan Wakely + + Backported from master: + 2023-07-08 Jonathan Wakely + + PR c++/110595 + * doc/invoke.texi (Warning Options): Fix typo. + +2023-07-05 Michael Meissner + + Backported from master: + 2023-06-23 Michael Meissner + Aaron Sawdey + + PR target/105325 + * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that + allowed prefixed lwa to be generated. + * config/rs6000/fusion.md: Regenerate. + * config/rs6000/predicates.md (ds_form_mem_operand): Delete. + * config/rs6000/rs6000.md (prefixed attribute): Add support for load + plus compare immediate fused insns. + (maybe_prefixed): Likewise. + +2023-07-05 Segher Boessenkool + + Backported from master: + 2023-06-06 Segher Boessenkool + + * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and + split out from... + (gen_ld_cmpi_p10): ... this. + +2023-07-04 Cui, Lili + + * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8 + from Rocketlake, remove model value 0xbf from Alderlake. + +2023-06-30 Eric Botcazou + + * gimple-fold.cc (fold_array_ctor_reference): Fix head comment. + (fold_nonarray_ctor_reference): Likewise. Specifically deal + with integral bit-fields. + (fold_ctor_reference): Make sure that the constructor uses the + native storage order. + +2023-06-29 liuhongt + + PR rtl-optimization/110237 + * config/i386/sse.md (_store_mask): Refine with + UNSPEC_MASKMOV. + (maskstore_store_mask): New define_insn, it's renamed + from original _store_mask. + +2023-06-29 liuhongt + + PR target/110309 + * config/i386/sse.md (maskload): + Refine pattern with UNSPEC_MASKLOAD. + (maskload): Ditto. + (*_load_mask): Extend mode iterator to + VI12HF_AVX512VL. + (*_load): Ditto. + +2023-06-29 Hongyu Wang + + Backported from master: + 2023-06-26 Hongyu Wang + + * config/i386/i386-options.cc (ix86_valid_target_attribute_tree): + Override tune_string with arch_string if tune_string is not + explicitly specified. + +2023-06-28 Thomas Schwinge + + Backported from master: + 2023-06-02 Thomas Schwinge + + PR testsuite/66005 + * doc/install.texi: Document (optional) Perl usage for parallel + testing of libgomp. + +2023-06-28 liuhongt + + * config/i386/i386-features.cc (pass_insert_vzeroupper:gate): + Move flag_expensive_optimizations && !optimize_size to .. + * config/i386/i386-options.cc (ix86_option_override_internal): + .. this, it makes -mvzeroupper independent of optimization + level, but still keeps the behavior of architecture + tuning(emit_vzeroupper) unchanged. + +2023-06-27 Andrew Pinski + + Backported from master: + 2023-06-27 Andrew Pinski + + PR middle-end/110420 + PR middle-end/103979 + PR middle-end/98619 + * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile. + +2023-06-23 Richard Biener + + Backported from master: + 2023-06-19 Richard Biener + + PR tree-optimization/110298 + * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely): + Clear number of iterations info before cleaning up the CFG. + +2023-06-23 Richard Biener + + Backported from master: + 2023-06-09 Richard Biener + + PR middle-end/110182 + * match.pd (two conversions in a row): Use element_precision + to DTRT for VECTOR_TYPE. + +2023-06-22 Alex Coplan + + Backported from master: + 2023-06-07 Alex Coplan + + PR target/110132 + * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin): + New. Use it ... + (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE + names for builtins. + (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h + setup if in_lto_p, just like we do for SVE. + * config/aarch64/arm_acle.h: (__arm_ld64b): Delete. + (__arm_st64b): Delete. + (__arm_st64bv): Delete. + (__arm_st64bv0): Delete. + +2023-06-22 Alex Coplan + + Backported from master: + 2023-06-07 Alex Coplan + + PR target/110100 + * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64): + Use input operand for the destination address. + * config/aarch64/aarch64.md (st64b): Fix constraint on address + operand. + +2023-06-22 Alex Coplan + + Backported from master: + 2023-06-07 Alex Coplan + + PR target/110100 + * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types): + Replace eight consecutive spaces with tabs. + (aarch64_init_ls64_builtins): Likewise. + (aarch64_expand_builtin_ls64): Likewise. + * config/aarch64/aarch64.md (ld64b): Likewise. + (st64b): Likewise. + (st64bv): Likewise + (st64bv0): Likewise. + +2023-06-20 Kewen Lin + + Backported from master: + 2023-06-12 Kewen Lin + + PR target/109932 + * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, + __builtin_unpack_vector_int128): Move from stanza power7 to vsx. + +2023-06-20 Kewen Lin + + Backported from master: + 2023-06-12 Kewen Lin + + PR target/110011 + * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit + floating constant itself for real_to_target call. + +2023-06-15 Lulu Cheng + + Backported from master: + 2023-06-15 Lulu Cheng + Andrew Pinski + + PR target/110136 + * config/loongarch/loongarch.md: Modify the register constraints for template + "jumptable" and "indirect_jump" from "r" to "e". + +2023-06-12 Richard Biener + + Backported from master: + 2023-06-12 Richard Biener + + PR middle-end/110200 + * genmatch.cc (expr::gen_transform): Put braces around + the if arm for the (convert ...) short-cut. + +2023-06-10 Georg-Johann Lay + + PR target/109650 + PR target/92729 + Backport from 2023-05-10 master r14-1688. + * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass. + * config/avr/avr.cc (avr_pass_ifelse): New RTL pass. + (avr_pass_data_ifelse): New pass_data for it. + (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost) + (avr_canonicalize_comparison, avr_out_plus_set_ZN) + (avr_out_cmp_ext): New functions. + (compare_condtition): Make sure REG_CC dies in the branch insn. + (avr_rtx_costs_1): Add computation of cbranch costs. + (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]: + [ADJUST_LEN_CMP_SEXT]Handle them. + (TARGET_CANONICALIZE_COMPARISON): New define. + (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern) + (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions. + (TARGET_MACHINE_DEPENDENT_REORG): Remove define. + * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto. + (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx) + (avr_out_cmp_zext): New Protos + * config/avr/avr.md (branch, difficult_branch): Don't split insns. + (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1") + (*swapped_tst, *add.for.eqne.): New insns. + (*cbranch4): Rename to cbranch4_insn. + (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed. + (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed. + Add new RTL peepholes for decrement-and-branch and *swapped_tst. + Rework signtest-and-branch peepholes for *sbrx_branch. + (adjust_len) [add_set_ZN, cmp_zext]: New. + (QIPSI): New mode iterator. + (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators. + (gelt): New code iterator. + (gelt_eqne): New code attribute. + (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch) + (branch_unspec, *negated_tst, *reversed_tst) + (*cmpqi_sign_extend): Remove insns. + (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove. + * config/avr/avr-dimode.md (cbranch4): Canonicalize comparisons. + * config/avr/predicates.md (scratch_or_d_register_operand): New. + * config/avr/constraints.md (Yxx): New constraint. + +2023-06-09 Jeevitha Palanisamy + + Backported from master: + 2023-06-06 Jeevitha Palanisamy + + PR target/106907 + * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove + duplicate expression. + +2023-06-09 Iain Sandoe + + Backported from master: + 2023-06-02 Iain Sandoe + + PR target/110044 + * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align): + Make sure that we do not have a cap on field alignment before altering + the struct layout based on the type alignment of the first entry. + +2023-06-09 liuhongt + + PR target/110108 + * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly + view_convert_expr mask to signed type when folding pblendvb + builtins. + +2023-06-08 Alex Coplan + + Backported from master: + 2023-05-25 Alex Coplan + + PR target/109800 + * config/arm/arm.md (movdf): Generate temporary pseudo in DImode + instead of DFmode. + * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an + lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into + DFmode as an rvalue. + +2023-06-08 Kyrylo Tkachov + + Backported from master: + 2023-05-24 Kyrylo Tkachov + + PR target/109939 + * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use + qualifier_none for the return operand. + +2023-06-02 Georg-Johann Lay + + PR target/110088 + * config/avr/avr.md: Add an RTL peephole to optimize operations on + non-LD_REGS after a move from LD_REGS. + (piaop): New code iterator. + +2023-06-01 Jonathan Wakely + + Backported from master: + 2023-06-01 Jonathan Wakely + + PR target/109954 + * doc/invoke.texi (x86 Options): Fix description of -m32 option. + +2023-05-30 Andreas Schwab + + PR target/110036 + * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to + match libsanitizer. + +2023-05-25 Georg-Johann Lay + + PR target/104327 + * config/avr/avr.cc (avr_can_inline_p): New static function. + (TARGET_CAN_INLINE_P): Define to that function. + +2023-05-25 Georg-Johann Lay + + PR target/82931 + * config/avr/avr.md (*movbitqi.0): Rename to *movbit.0-6. + Handle any bit position and use mode QISI. + * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost + of 2 insns for bit-transfer of respective style. + +2023-05-23 Georg-Johann Lay + + * config/avr/avr.cc (avr_insn_cost): New static function. + (TARGET_INSN_COST): Define to that function. + +2023-05-22 Michael Meissner + + PR target/70243 + * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp. + (vsx_nfmsv4sf4): Do not generate vnmsubfp. Back port from master + 04/10/2023 change. + +2023-05-22 Jakub Jelinek + + Backported from master: + 2023-05-21 Jakub Jelinek + + PR tree-optimization/109505 + * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2), + Combine successive equal operations with constants, + (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A, + CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P + operands. + +2023-05-22 Kewen Lin + + Backported from master: + 2023-05-17 Kewen Lin + + * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with + suggested unroll factor once the previous analysis fails. + +2023-05-20 Triffid Hunter + + PR target/105753 + Backport from 2023-05-20 https://gcc.gnu.org/r14-1016 + * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi): + Remove superfluous "parallel" in insn pattern. + ([u]divmod4): Tidy code. Use gcc_unreachable() instead of + printing error text to assembly. + +2023-05-18 Alexandre Oliva + + * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab + after vmsr and vmrs, and lower the case of P0. + +2023-05-18 Stam Markianos-Wright + + * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types. + (__ARM_mve_coerce1): Remove. + (__ARM_mve_coerce2): Remove. + (__ARM_mve_coerce3): Remove. + (__ARM_mve_coerce_i_scalar): New. + (__ARM_mve_coerce_s8_ptr): New. + (__ARM_mve_coerce_u8_ptr): New. + (__ARM_mve_coerce_s16_ptr): New. + (__ARM_mve_coerce_u16_ptr): New. + (__ARM_mve_coerce_s32_ptr): New. + (__ARM_mve_coerce_u32_ptr): New. + (__ARM_mve_coerce_s64_ptr): New. + (__ARM_mve_coerce_u64_ptr): New. + (__ARM_mve_coerce_f_scalar): New. + (__ARM_mve_coerce_f16_ptr): New. + (__ARM_mve_coerce_f32_ptr): New. + (__arm_vst4q): Change _coerce_ overloads. + (__arm_vbicq): Change _coerce_ overloads. + (__arm_vmulq): Change _coerce_ overloads. + (__arm_vcmpeqq): Change _coerce_ overloads. + (__arm_vcmpneq): Change _coerce_ overloads. + (__arm_vmaxnmavq): Change _coerce_ overloads. + (__arm_vmaxnmvq): Change _coerce_ overloads. + (__arm_vminnmavq): Change _coerce_ overloads. + (__arm_vsubq): Change _coerce_ overloads. + (__arm_vminnmvq): Change _coerce_ overloads. + (__arm_vrshlq): Change _coerce_ overloads. + (__arm_vqsubq): Change _coerce_ overloads. + (__arm_vqdmulltq): Change _coerce_ overloads. + (__arm_vqdmullbq): Change _coerce_ overloads. + (__arm_vqdmulhq): Change _coerce_ overloads. + (__arm_vqaddq): Change _coerce_ overloads. + (__arm_vhaddq): Change _coerce_ overloads. + (__arm_vhsubq): Change _coerce_ overloads. + (__arm_vqdmlashq): Change _coerce_ overloads. + (__arm_vqrdmlahq): Change _coerce_ overloads. + (__arm_vmlasq): Change _coerce_ overloads. + (__arm_vqdmlahq): Change _coerce_ overloads. + (__arm_vmaxnmavq_p): Change _coerce_ overloads. + (__arm_vmaxnmvq_p): Change _coerce_ overloads. + (__arm_vminnmavq_p): Change _coerce_ overloads. + (__arm_vminnmvq_p): Change _coerce_ overloads. + (__arm_vfmasq_m): Change _coerce_ overloads. + (__arm_vld1q): Change _coerce_ overloads. + (__arm_vld1q_z): Change _coerce_ overloads. + (__arm_vld2q): Change _coerce_ overloads. + (__arm_vld4q): Change _coerce_ overloads. + (__arm_vldrhq_gather_offset): Change _coerce_ overloads. + (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads. + (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads. + (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads. + (__arm_vldrwq_gather_offset): Change _coerce_ overloads. + (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads. + (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads. + (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads. + (__arm_vst1q_p): Change _coerce_ overloads. + (__arm_vst2q): Change _coerce_ overloads. + (__arm_vst1q): Change _coerce_ overloads. + (__arm_vstrhq): Change _coerce_ overloads. + (__arm_vstrhq_p): Change _coerce_ overloads. + (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads. + (__arm_vstrhq_scatter_offset): Change _coerce_ overloads. + (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads. + (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads. + (__arm_vstrwq_p): Change _coerce_ overloads. + (__arm_vstrwq): Change _coerce_ overloads. + (__arm_vstrwq_scatter_offset): Change _coerce_ overloads. + (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads. + (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads. + (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads. + (__arm_vsetq_lane): Change _coerce_ overloads. + (__arm_vcmpneq_m): Change _coerce_ overloads. + (__arm_vldrbq_gather_offset): Change _coerce_ overloads. + (__arm_vdwdupq_x_u8): Change _coerce_ overloads. + (__arm_vdwdupq_x_u16): Change _coerce_ overloads. + (__arm_vdwdupq_x_u32): Change _coerce_ overloads. + (__arm_viwdupq_x_u8): Change _coerce_ overloads. + (__arm_viwdupq_x_u16): Change _coerce_ overloads. + (__arm_viwdupq_x_u32): Change _coerce_ overloads. + (__arm_vidupq_x_u8): Change _coerce_ overloads. + (__arm_vddupq_x_u8): Change _coerce_ overloads. + (__arm_vidupq_x_u16): Change _coerce_ overloads. + (__arm_vddupq_x_u16): Change _coerce_ overloads. + (__arm_vidupq_x_u32): Change _coerce_ overloads. + (__arm_vddupq_x_u32): Change _coerce_ overloads. + (__arm_vhaddq_x): Change _coerce_ overloads. + (__arm_vhsubq_x): Change _coerce_ overloads. + (__arm_vldrdq_gather_offset): Change _coerce_ overloads. + (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads. + (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads. + (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads. + (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads. + (__arm_vqrdmlahq_m): Change _coerce_ overloads. + (__arm_vqrdmlashq_m): Change _coerce_ overloads. + (__arm_vqdmlashq_m): Change _coerce_ overloads. + (__arm_vmlaldavaxq_p): Change _coerce_ overloads. + (__arm_vmlasq_m): Change _coerce_ overloads. + (__arm_vqdmulhq_m): Change _coerce_ overloads. + (__arm_vqdmulltq_m): Change _coerce_ overloads. + (__arm_vidupq_u16): Change _coerce_ overloads. + (__arm_vidupq_u32): Change _coerce_ overloads. + (__arm_vidupq_u8): Change _coerce_ overloads. + (__arm_vddupq_u16): Change _coerce_ overloads. + (__arm_vddupq_u32): Change _coerce_ overloads. + (__arm_vddupq_u8): Change _coerce_ overloads. + (__arm_viwdupq_m): Change _coerce_ overloads. + (__arm_viwdupq_u16): Change _coerce_ overloads. + (__arm_viwdupq_u32): Change _coerce_ overloads. + (__arm_viwdupq_u8): Change _coerce_ overloads. + (__arm_vdwdupq_m): Change _coerce_ overloads. + (__arm_vdwdupq_u16): Change _coerce_ overloads. + (__arm_vdwdupq_u32): Change _coerce_ overloads. + (__arm_vdwdupq_u8): Change _coerce_ overloads. + (__arm_vaddlvaq): Change _coerce_ overloads. + (__arm_vaddlvaq_p): Change _coerce_ overloads. + (__arm_vaddvaq): Change _coerce_ overloads. + (__arm_vaddvaq_p): Change _coerce_ overloads. + (__arm_vcmphiq_m): Change _coerce_ overloads. + (__arm_vmladavaq_p): Change _coerce_ overloads. + (__arm_vmladavaxq): Change _coerce_ overloads. + (__arm_vmlaldavaxq): Change _coerce_ overloads. + (__arm_vstrbq): Change _coerce_ overloads. + (__arm_vstrbq_p): Change _coerce_ overloads. + (__arm_vrmlaldavhaq_p): Change _coerce_ overloads. + (__arm_vstrbq_scatter_offset): Change _coerce_ overloads. + (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads. + (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads. + (__arm_vstrdq_scatter_offset): Change _coerce_ overloads. + (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads. + (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads. + +2023-05-18 Stam Markianos-Wright + + * config/arm/arm_mve.h (__arm_vbicq): Change coerce on + scalar constant. + (__arm_vmvnq_m): Likewise. + +2023-05-18 Stam Markianos-Wright + + * config/arm/arm_mve.h (__arm_vorrq): Add _n variant. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2023-05-18 Stam Markianos-Wright + + * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic. + (__arm_vadcq_u32): Likewise. + (__arm_vadcq_m_s32): Likewise. + (__arm_vadcq_m_u32): Likewise. + (__arm_vsbcq_s32): Likewise. + (__arm_vsbcq_u32): Likewise. + (__arm_vsbcq_m_s32): Likewise. + (__arm_vsbcq_m_u32): Likewise. + * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile. + +2023-05-18 Andrea Corallo + + * config/arm/mve.md (mve_vrndq_m_f, mve_vrev64q_f) + (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf) + (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_) + (mve_vrev64q_, mve_vcvtq_from_f_) + (mve_vmovltq_, mve_vmovlbq_) + (mve_vcvtpq_, mve_vcvtnq_) + (mve_vcvtmq_, mve_vcvtaq_) + (mve_vmvnq_n_, mve_vrev16q_v16qi) + (mve_vctpqhi, mve_vbrsrq_n_f) + (mve_vbrsrq_n_, mve_vandq_f, mve_vbicq_f) + (mve_vbicq_n_, mve_vctpq_mhi) + (mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf) + (mve_veorq_f, mve_vmlaldavxq_s, mve_vmlsldavq_s) + (mve_vmlsldavxq_s, mve_vornq_f, mve_vorrq_f) + (mve_vrmlaldavhxq_sv4si, mve_vbicq_m_n_) + (mve_vcvtq_m_to_f_, mve_vshlcq_) + (mve_vmvnq_m_, mve_vpselq_) + (mve_vcvtbq_m_f16_f32v8hf, mve_vcvtbq_m_f32_f16v4sf) + (mve_vcvttq_m_f16_f32v8hf, mve_vcvttq_m_f32_f16v4sf) + (mve_vmlaldavq_p_, mve_vmlsldavaq_s) + (mve_vmlsldavaxq_s, mve_vmlsldavq_p_s) + (mve_vmlsldavxq_p_s, mve_vmvnq_m_n_) + (mve_vorrq_m_n_, mve_vpselq_f) + (mve_vrev32q_m_fv8hf, mve_vrev32q_m_) + (mve_vrev64q_m_f, mve_vrmlaldavhaxq_sv4si) + (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhaxq_sv4si) + (mve_vrmlsldavhq_p_sv4si, mve_vrmlsldavhxq_p_sv4si) + (mve_vrev16q_m_v16qi, mve_vrmlaldavhq_p_v4si) + (mve_vrmlsldavhaq_sv4si, mve_vandq_m_) + (mve_vbicq_m_, mve_veorq_m_) + (mve_vornq_m_, mve_vorrq_m_) + (mve_vandq_m_f, mve_vbicq_m_f, mve_veorq_m_f) + (mve_vornq_m_f, mve_vorrq_m_f) + (mve_vstrdq_scatter_shifted_offset_p_v2di_insn) + (mve_vstrdq_scatter_shifted_offset_v2di_insn) + (mve_vstrdq_scatter_base_wb_p_v2di) : Fix spacing and + capitalization in the emitted asm. + +2023-05-18 Andrea Corallo + + * config/arm/constraints.md (mve_vldrd_immediate): Move it to + predicates.md. + (Ri): Move constraint definition from predicates.md. + (Rl): Define new constraint. + * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_v4si): Add + missing constraint. + (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint + for op 1, use mve_vstrw_immediate predicate and Rl constraint for + op 2. Fix asm output spacing. + (mve_vstrdq_scatter_base_wb_p_v2di): Add missing constraint. + * config/arm/predicates.md (Ri) Move constraint to constraints.md + (mve_vldrd_immediate): Move it from + constraints.md. + (mve_vstrw_immediate): New predicate. + +2023-05-18 Murray Steele + + Backported from master: + 2023-01-18 Murray Steele + + PR target/108442 + * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic + function. + (__arm_vst1q_p_s8): Likewise. + (__arm_vld1q_z_u8): Likewise. + (__arm_vld1q_z_s8): Likewise. + (__arm_vst1q_p_u16): Likewise. + (__arm_vst1q_p_s16): Likewise. + (__arm_vld1q_z_u16): Likewise. + (__arm_vld1q_z_s16): Likewise. + (__arm_vst1q_p_u32): Likewise. + (__arm_vst1q_p_s32): Likewise. + (__arm_vld1q_z_u32): Likewise. + (__arm_vld1q_z_s32): Likewise. + (__arm_vld1q_z_f16): Likewise. + (__arm_vst1q_p_f16): Likewise. + (__arm_vld1q_z_f32): Likewise. + (__arm_vst1q_p_f32): Likewise. + +2023-05-18 Andre Vieira + + Backported from master: + 2023-01-24 Andre Vieira + + PR target/108177 + * config/arm/mve.md (mve_vstrbq_p_, mve_vstrhq_p_fv8hf, + mve_vstrhq_p_, mve_vstrwq_p_v4si): Add memory operand + as input operand. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2023-04-04 Stam Markianos-Wright + + * config/arm/mve.md (mve_vcvtq_n_to_f_): Swap operands. + (mve_vcreateq_f): Swap operands. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2023-01-16 Stam Markianos-Wright + + PR target/96795 + PR target/107515 + * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types. + (__ARM_mve_coerce3): Likewise. + +2023-05-18 Andrea Corallo + + Backported from master: + 2023-01-25 Andrea Corallo + + * config/arm/mve.md (mve_vqnegq_s): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2023-01-25 Andrea Corallo + + * config/arm/mve.md (mve_vqabsq_s): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2023-01-25 Andrea Corallo + + * config/arm/mve.md (mve_vnegq_f, mve_vnegq_s): + Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2023-01-25 Andrea Corallo + + * config/arm/mve.md (@mve_vclzq_s): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2023-01-25 Andrea Corallo + + * config/arm/mve.md (mve_vclsq_s): Fix spacing. + +2023-05-18 Christophe Lyon + + Backported from master: + 2023-02-03 Christophe Lyon + + * config/arm/mve.md (mve_vabavq_p_): Add length + attribute. + (mve_vqshluq_m_n_s): Likewise. + (mve_vshlq_m_): Likewise. + (mve_vsriq_m_n_): Likewise. + (mve_vsubq_m_): Likewise. + +2023-05-18 Christophe Lyon + + Backported from master: + 2022-10-03 Christophe Lyon + + * config/arm/mve.md (mve_vrev64q_m_): Add early + clobber. + (mve_vrev64q_m_f): Likewise. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vrmlaldavhq_v4si, + mve_vrmlaldavhaq_v4si): Fix spacing vs tabs. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vmlaldavaq_) + (mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): Fix + spacing vs tabs. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vsubq_n_f): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vaddlvq_p_v4si) + (mve_vaddq_n_, mve_vaddvaq_) + (mve_vaddlvaq_v4si, mve_vaddq_n_f) + (mve_vaddlvaq_p_v4si, mve_vaddq, mve_vaddq_f): + Fix spacing. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2022-11-28 Stam Markianos-Wright + + * config/arm/arm_mve.h (__arm_vsubq_x FP): New overloads. + (__arm_vsubq_x Integer): New. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2022-11-28 Stam Markianos-Wright + + PR target/107515 + * config/arm/arm_mve.h (__ARM_mve_typeid): Add float types. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2022-11-28 Stam Markianos-Wright + + PR target/96795 + * config/arm/arm_mve.h (__arm_vaddq): Fix Overloading. + (__arm_vmulq): Likewise. + (__arm_vcmpeqq): Likewise. + (__arm_vcmpneq): Likewise. + (__arm_vmaxnmavq): Likewise. + (__arm_vmaxnmvq): Likewise. + (__arm_vminnmavq): Likewise. + (__arm_vsubq): Likewise. + (__arm_vminnmvq): Likewise. + (__arm_vrshlq): Likewise. + (__arm_vqsubq): Likewise. + (__arm_vqdmulltq): Likewise. + (__arm_vqdmullbq): Likewise. + (__arm_vqdmulhq): Likewise. + (__arm_vqaddq): Likewise. + (__arm_vhaddq): Likewise. + (__arm_vhsubq): Likewise. + (__arm_vqdmlashq): Likewise. + (__arm_vqrdmlahq): Likewise. + (__arm_vmlasq): Likewise. + (__arm_vqdmlahq): Likewise. + (__arm_vmaxnmavq_p): Likewise. + (__arm_vmaxnmvq_p): Likewise. + (__arm_vminnmavq_p): Likewise. + (__arm_vminnmvq_p): Likewise. + (__arm_vfmasq_m): Likewise. + (__arm_vsetq_lane): Likewise. + (__arm_vcmpneq_m): Likewise. + (__arm_vhaddq_x): Likewise. + (__arm_vhsubq_x): Likewise. + (__arm_vqrdmlashq_m): Likewise. + (__arm_vqdmlashq_m): Likewise. + (__arm_vmlaldavaxq_p): Likewise. + (__arm_vmlasq_m): Likewise. + (__arm_vqdmulhq_m): Likewise. + (__arm_vqdmulltq_m): Likewise. + (__arm_viwdupq_m): Likewise. + (__arm_viwdupq_u16): Likewise. + (__arm_viwdupq_u32): Likewise. + (__arm_viwdupq_u8): Likewise. + (__arm_vdwdupq_m): Likewise. + (__arm_vdwdupq_u16): Likewise. + (__arm_vdwdupq_u32): Likewise. + (__arm_vdwdupq_u8): Likewise. + (__arm_vaddlvaq): Likewise. + (__arm_vaddlvaq_p): Likewise. + (__arm_vaddvaq): Likewise. + (__arm_vaddvaq_p): Likewise. + (__arm_vcmphiq_m): Likewise. + (__arm_vmladavaq_p): Likewise. + (__arm_vmladavaxq): Likewise. + (__arm_vmlaldavaxq): Likewise. + (__arm_vrmlaldavhaq_p): Likewise. + +2023-05-18 Stam Markianos-Wright + + Backported from master: + 2022-11-28 Stam Markianos-Wright + + PR target/96795 + * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types. + (__arm_vaddq_m_n_s32): Likewise. + (__arm_vaddq_m_n_s16): Likewise. + (__arm_vaddq_m_n_u8): Likewise. + (__arm_vaddq_m_n_u32): Likewise. + (__arm_vaddq_m_n_u16): Likewise. + (__arm_vaddq_m): Fix Overloading. + (__ARM_mve_coerce3): New. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vabsq_f): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (@mve_vcmpq_): Fix + spacing. + * config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m) + (__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vdupq_n_f) + (mve_vdupq_n_, mve_vdupq_m_n_) + (mve_vdupq_m_n_f): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vdwdupq_m_wb_u_insn): Fix spacing. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/mve.md (mve_vddupq_u_insn): Fix 'vddup.u' + spacing. + (mve_vddupq_m_wb_u_insn): Likewise. + +2023-05-18 Andrea Corallo + + Backported from master: + 2022-11-28 Andrea Corallo + + * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix + 'vmsr' spacing and reg capitalization. + +2023-05-15 liuhongt + + * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o + whenever -mdaz-ftz is specified. Don't link crtfastmath.o + when -mno-daz-ftz is specified. + * config/i386/darwin.h (ENDFILE_SPEC): Ditto. + * config/i386/gnu-user-common.h + (GNU_USER_TARGET_MATHFILE_SPEC): Ditto. + * config/i386/mingw32.h (ENDFILE_SPEC): Ditto. + * config/i386/i386.opt (mdaz-ftz): New option. + * doc/invoke.texi (x86 options): Document mftz-daz. + +2023-05-09 Jakub Jelinek + + Backported from master: + 2023-05-09 Jakub Jelinek + + PR tree-optimization/109778 + * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on + wi::zext (x, width) rather than x if width != precision, rather + than using wi::zext (right, width) after the shift. + * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results + of wi::lrotate or wi::rrotate. + +2023-05-09 Kewen Lin + + Backported from master: + 2023-04-26 Kewen Lin + + PR target/108758 + * config/rs6000/rs6000-builtins.def + (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt + __builtin_vsx_scalar_cmp_exp_qp_lt, + __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw + to power9-vector. + +2023-05-09 Kewen Lin + + Backported from master: + 2023-04-26 Kewen Lin + + PR target/109069 + * config/rs6000/altivec.md (sldoi_to_mov): Replace predicate + easy_vector_constant with const_vector_each_byte_same, add + handlings in preparation for !easy_vector_constant, and update + VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P. + * config/rs6000/predicates.md (const_vector_each_byte_same): New + predicate. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-04-27 Jakub Jelinek + + Backported from master: + 2023-04-08 Jakub Jelinek + + PR tree-optimization/109392 + * tree-vect-generic.cc (tree_vec_extract): Handle failure + of maybe_push_res_to_seq better. + +2023-04-27 Richard Biener + + Backported from master: + 2023-02-16 Richard Biener + + PR tree-optimization/108791 + * tree-ssa-forwprop.cc (optimize_vector_load): Build + the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful + type. + +2023-04-27 Roger Sayle + + Backported from master: + 2023-01-10 Roger Sayle + + PR rtl-optimization/106421 + * cprop.cc (bypass_block): Check that DEST is local to this + function (non-NULL) before calling find_edge. + +2023-04-27 H.J. Lu + + Backported from master: + 2023-01-16 H.J. Lu + + PR target/105980 + * config/i386/i386.cc (x86_output_mi_thunk): Disable + -mforce-indirect-call for PIC in 32-bit mode. + +2023-04-27 Jan Hubicka + + Backported from master: + 2022-08-12 Jan Hubicka + + PR middle-end/106057 + * ipa-devirt.cc (type_or_derived_type_possibly_instantiated_p): New + function. + (possible_polymorphic_call_targets): Use it. + +2023-04-26 Martin Jambor + + Backported from master: + 2023-04-17 Martin Jambor + + PR ipa/107769 + PR ipa/109318 + * cgraph.h (symtab_node::find_reference): Add parameter use_type. + * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented. + (ipa_zap_jf_refdesc): New function. + (ipa_get_jf_pass_through_refdesc_decremented): Likewise. + (ipa_set_jf_pass_through_refdesc_decremented): Likewise. + * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for + the new parameter of find_reference. + (adjust_references_in_caller): Likewise. Make sure the constant jump + function is not used to decrement a refdec counter again. Only + decrement refdesc counters when the pass_through jump function allows + it. Added a detailed dump when decrementing refdesc counters. + * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag. + (ipa_set_jf_simple_pass_through): Initialize the new flag. + (ipa_set_jf_unary_pass_through): Likewise. + (ipa_set_jf_arith_pass_through): Likewise. + (remove_described_reference): Provide a value for the new parameter of + find_reference. + (update_jump_functions_after_inlining): Zap refdesc of new jfunc if + the previous pass_through had a flag mandating that we do so. + (propagate_controlled_uses): Likewise. Only decrement refdesc + counters when the pass_through jump function allows it. + (ipa_edge_args_sum_t::duplicate): Provide a value for the new + parameter of find_reference. + (ipa_write_jump_function): Assert the new flag does not have to be + streamed. + * symtab.cc (symtab_node::find_reference): Add parameter use_type, use + it in searching. + +2023-04-26 Jakub Jelinek + + Backported from master: + 2023-04-25 Jakub Jelinek + + PR target/109566 + * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For + !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb) + is larger than signed int maximum. + +2023-04-26 Richard Biener + + Backported from master: + 2023-04-25 Richard Biener + + PR tree-optimization/109609 + * attr-fnspec.h (arg_max_access_size_given_by_arg_p): + Clarify semantics. + * tree-ssa-alias.cc (check_fnspec): Correctly interpret + the size given by arg_max_access_size_given_by_arg_p as + maximum, not exact, size. + +2023-04-26 Richard Biener + + Backported from master: + 2023-04-25 Richard Biener + + PR rtl-optimization/109585 + * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo. + +2023-04-26 Richard Biener + + Backported from master: + 2023-04-21 Richard Biener + + PR tree-optimization/109573 + * tree-vect-loop.cc (vectorizable_live_operation): Allow + unhandled SSA copy as well. Demote assert to checking only. + +2023-04-21 John David Anglin + + PR target/109478 + * config/pa/pa-protos.h (pa_function_arg_size): Update prototype. + * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument + size is zero. + (pa_arg_partial_bytes): Don't call pa_function_arg_size twice. + (pa_function_arg_size): Change return type to int. Return zero + for arguments larger than 1 GB. Update comments. + +2023-04-21 Haochen Gui + + Backported from master: + 2023-04-11 Haochen Gui + + PR target/108812 + * config/rs6000/vsx.md (vsx_sign_extend_qi_): Rename to... + (vsx_sign_extend_v16qi_): ... this. + (vsx_sign_extend_hi_): Rename to... + (vsx_sign_extend_v8hi_): ... this. + (vsx_sign_extend_si_v2di): Rename to... + (vsx_sign_extend_v4si_v2di): ... this. + (vsignextend_qi_): Remove. + (vsignextend_hi_): Remove. + (vsignextend_si_v2di): Remove. + (vsignextend_v2di_v1ti): Remove. + (*xxspltib__split): Replace gen_vsx_sign_extend_qi_v2di with + gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si + with gen_vsx_sign_extend_v16qi_v4si. + * config/rs6000/rs6000.md (split for DI constant generation): + Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si. + (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di + with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si + with gen_vsx_sign_extend_v16qi_si. + * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d): + Set bif-pattern to vsx_sign_extend_v16qi_v2di. + (__builtin_altivec_vsignextsb2w): Set bif-pattern to + vsx_sign_extend_v16qi_v4si. + (__builtin_altivec_visgnextsh2d): Set bif-pattern to + vsx_sign_extend_v8hi_v2di. + (__builtin_altivec_vsignextsh2w): Set bif-pattern to + vsx_sign_extend_v8hi_v4si. + (__builtin_altivec_vsignextsw2d): Set bif-pattern to + vsx_sign_extend_si_v2di. + (__builtin_altivec_vsignext): Set bif-pattern to + vsx_sign_extend_v2di_v1ti. + * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace + gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di, + gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and + gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-04-12 Jakub Jelinek + + PR tree-optimization/109410 + * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry + block if first statement of the function is a call to returns_twice + function. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-28 Jakub Jelinek + + PR middle-end/106190 + * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any + of the IFN_{UB,HWA,A}SAN_* internal fns are lowered. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-28 Jakub Jelinek + + PR target/109276 + * config/i386/i386.cc (assign_386_stack_local): For DImode + with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass + align 32 rather than 0 to assign_stack_local. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-26 Jakub Jelinek + + PR ipa/105685 + * predict.cc (compute_function_frequency): Don't call + warn_function_cold if function already has cold attribute. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-23 Jakub Jelinek + + PR tree-optimization/109176 + * tree-vect-generic.cc (expand_vector_condition): If a has + vector boolean type and is a comparison, also check if both + the comparison and VEC_COND_EXPR could be successfully expanded + individually. + +2023-04-18 Philipp Tomsich + + Backported from master: + 2023-01-31 Philipp Tomsich + + PR target/108589 + * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check + REG_P on SET_DEST. + +2023-04-17 Philipp Tomsich + + Backported from master: + 2023-04-17 Philipp Tomsich + Di Zhao + + * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION): + Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE. + * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): + Check for the above tuning option when processing loads. + +2023-04-17 Richard Sandiford + + Backported from master: + 2023-04-13 Richard Sandiford + + PR target/108910 + * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do + not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead. + +2023-04-17 Richard Biener + + PR tree-optimization/109434 + * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly + handle possibly throwing calls when processing the LHS + and may-defs are not OK. Add mode to initialize a may-def. + (dse_optimize_stmt): Query may-defs. + +2023-04-17 Richard Biener + + Backported from master: + 2023-04-14 Richard Biener + + PR tree-optimization/109502 + * tree-vect-stmts.cc (vectorizable_assignment): Fix + check for conversion between mask and non-mask types. + +2023-04-17 Richard Biener + + Backported from master: + 2023-04-13 Richard Biener + + PR tree-optimization/109491 + * tree-ssa-sccvn.cc (expressions_equal_p): Restore the + NULL operands test. + +2023-04-17 Richard Biener + + Backported from master: + 2023-04-12 Richard Biener + + PR tree-optimization/109473 + * tree-vect-loop.cc (vect_create_epilog_for_reduction): + Convert scalar result to the computation type before performing + the reduction adjustment. + +2023-04-17 Richard Biener + + Backported from master: + 2023-04-12 Richard Biener + + PR tree-optimization/109469 + * tree-vect-slp.cc (vect_slp_function): Skip region starts with + a returns-twice call. + +2023-04-17 Richard Biener + + Backported from master: + 2023-03-27 Richard Biener + + PR lto/109263 + * lto-wrapper.cc (run_gcc): Parse alternate debug options + as well, they always enable debug. + +2023-04-17 Richard Biener + + Backported from master: + 2023-03-21 Richard Biener + + PR tree-optimization/109219 + * tree-vect-loop.cc (vectorizable_reduction): Check + slp_node, not STMT_SLP_TYPE. + * tree-vect-stmts.cc (vectorizable_condition): Likewise. + * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): + Remove assertion on STMT_SLP_TYPE. + +2023-04-17 Richard Biener + + Backported from master: + 2023-03-29 Richard Biener + + PR ipa/106124 + * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN + so we can re-create the DIE for the type if required. + +2023-04-17 Richard Biener + + Backported from master: + 2022-12-07 Richard Biener + + PR ipa/105676 + * ipa-pure-const.cc (ipa_make_function_pure): Skip also + for functions already being const. + +2023-04-17 Kewen Lin + + Backported from master: + 2023-04-04 Kewen Lin + + PR target/108699 + * config/rs6000/altivec.md (*p9v_parity2): Rename to ... + (rs6000_vprtyb2): ... this. + * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with + rs6000_vprtybv2di2. + (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2. + (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2. + * config/rs6000/vector.md (parity2 with VEC_IP): Expand with + popcountv16qi2 and the corresponding rs6000_vprtyb2. + +2023-04-17 Kewen Lin + + Backported from master: + 2023-04-04 Kewen Lin + + PR target/108807 + * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen + function for permutation control vector by considering big endianness. + +2023-04-14 Jan Hubicka + + PR target/109137 + * config/i386/x86-tune.def (X86_TUNE_AVX256_MOVE_BY_PIECES): + Remove znver1-3. + (X86_TUNE_AVX256_STORE_BY_PIECES): Remove znver1-3. + +2023-04-13 Philipp Tomsich + + Backported from master: + 2023-03-27 Philipp Tomsich + Jiangning Liu + Manolis Tsamis + + * config/aarch64/aarch64.cc: Update vector costs for ampere1. + +2023-04-11 Michael Meissner + + PR target/109067 + * config/rs6000/rs6000.cc (create_complex_muldiv): Delete. + (init_float128_ieee): Delete code to switch complex multiply and divide + for long double. Backport from master, 3/20/2023. + (complex_multiply_builtin_code): New helper function. + (complex_divide_builtin_code): Likewise. + (rs6000_mangle_decl_assembler_name): Add support for mangling the name + of complex 128-bit multiply and divide built-in functions. + +2023-04-06 Andrew Pinski + + Backported from master: + 2023-04-06 Andrew Pinski + + PR tree-optimization/109427 + * params.opt (-param=vect-induction-float=): + Fix option attribute typo for IntegerRange. + +2023-04-03 Richard Sandiford + + PR tree-optimization/96373 + PR tree-optimization/108979 + * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping + operations on the loop mask. Reject partial vectors if this isn't + possible. Don't mask operations on invariants. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-03-28 Richard Sandiford + + PR target/109072 + * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare. + * config/aarch64/aarch64.h (machine_function::vector_load_decls): New + variable. + * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg): + New function. + (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until + after inlining. Record which decls are loaded from. Fix handling + of vops for loads and stores. + * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function. + (aarch64_accesses_vector_load_decl_p): Likewise. + (aarch64_vector_costs::m_stores_to_vector_load_decl): New member + variable. + (aarch64_vector_costs::add_stmt_cost): If the function has a vld1 + that loads from a decl, treat vector stores to those decls as + zero cost. + (aarch64_vector_costs::finish_cost): ...and in that case, + if the vector code does nothing more than a store, give the + prologue a zero cost as well. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-02-13 Richard Sandiford + + PR rtl-optimization/108681 + * lra-spills.cc (lra_final_code_change): Extend subreg replacement + code to handle bare uses and clobbers. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-01-31 Richard Sandiford + + PR tree-optimization/108608 + * tree-vect-loop.cc (vect_transform_reduction): Handle single + def-use cycles that involve function calls rather than tree codes. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-03-02 Richard Sandiford + + PR tree-optimization/108603 + * explow.cc (convert_memory_address_addr_space_1): Only wrap + the result of a recursive call in a CONST if no instructions + were emitted. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-02-02 Richard Sandiford + + PR rtl-optimization/108508 + * rtl-ssa/accesses.cc (function_info::split_clobber_group): When + the splay tree search gives the first clobber in the second group, + make sure that the root of the first clobber group is updated + correctly. Enter the new clobber group into the definition splay + tree. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-03-02 Richard Sandiford + + PR tree-optimization/108430 + * tree-vect-stmts.cc (vectorizable_condition): Fix handling + of inverted condition. + +2023-04-03 Richard Sandiford + + Backported from master: + 2023-02-02 Richard Sandiford + + PR rtl-optimization/108086 + * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int. + Adjust size-related commentary accordingly. + +2023-03-31 Vladimir N. Makarov + + * ira-costs.cc: Include print-rtl.h. + (record_reg_classes, scan_one_insn): Add code to print debug info. + (record_operand_costs): Find and use smaller cost for hard reg + move. + +2023-03-29 David Malcolm + + * doc/invoke.texi (Static Analyzer Options): Add notes about + limitations of -fanalyzer. + +2023-03-29 David Malcolm + + * doc/analyzer.texi: Drop out-of-date ideas for other checkers. + +2023-03-28 Eric Botcazou + + PR target/109140 + * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition + on operand #3 to get the final condition code. Use std::swap. + * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander. + (fucmp8_vis): Move around. + (fpcmpu_vis): Likewise. + (vcondu): New VIS 4 expander. + +2023-03-22 Martin Jambor + + Backported from master: + 2023-03-14 Martin Jambor + + PR ipa/107925 + * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to + ipa count, remove assert, lenient_count_portion_handling, dump + also orig_node_count. + +2023-03-20 Peter Bergner + + Backported from master: + 2023-03-20 Peter Bergner + + PR target/109178 + * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-17 Jakub Jelinek + + PR target/105554 + * function.h (push_struct_function): Add ABSTRACT_P argument defaulted + to false. + * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it + to allocate_struct_function instead of false. + * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS + nor DECL_RESULT here. Pass true as ABSTRACT_P to + push_struct_function. Call targetm.target_option.relayout_function + after it. + (tree_function_versioning): Formatting fix. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-17 Jakub Jelinek + + PR middle-end/108685 + * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument, + use its loop_father rather than BODY_BB's loop_father. + (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller. + If broken_loop with ordered > collapse and at least one of those + extra loops aren't guaranteed to have at least one iteration, change + l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's + loop_father to l0_bb's loop_father rather than l1_bb's. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-10 Jakub Jelinek + + PR c/108079 + * cgraphunit.cc (check_global_declaration): Don't warn for unused + variables which have OPT_Wunused_variable warning suppressed. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-04 Jakub Jelinek + + PR testsuite/108973 + * selftest-diagnostic.cc + (test_diagnostic_context::test_diagnostic_context): Set + caret_max_width to 80. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-03 Jakub Jelinek + + PR c/108986 + * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes): + Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is + suppressed on stmt. For [static %E] warning, print access_nelts + rather than access_size. Fix up comment wording. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-02 Jakub Jelinek + + PR c++/108934 + * fold-const.cc (native_interpret_expr) : Before memcmp + comparison copy the bytes from ptr to a temporary buffer and clearing + padding bits in there. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-01 Jakub Jelinek + + PR debug/108967 + * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR + and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-02-24 Jakub Jelinek + + PR middle-end/108854 + * cgraphclones.cc (duplicate_thunk_for_node): If no parameter + changes are needed, copy at least DECL_ARGUMENTS PARM_DECL + nodes and adjust their DECL_CONTEXT. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-02-24 Jakub Jelinek + + PR target/108881 + * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16hi, + __builtin_ia32_cvtne2ps2bf16_v16hi_mask, + __builtin_ia32_cvtne2ps2bf16_v16hi_maskz, + __builtin_ia32_cvtne2ps2bf16_v8hi, + __builtin_ia32_cvtne2ps2bf16_v8hi_mask, + __builtin_ia32_cvtne2ps2bf16_v8hi_maskz, + __builtin_ia32_cvtneps2bf16_v8sf_mask, + __builtin_ia32_cvtneps2bf16_v8sf_maskz, + __builtin_ia32_cvtneps2bf16_v4sf_mask, + __builtin_ia32_cvtneps2bf16_v4sf_maskz, + __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask, + __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf, + __builtin_ia32_dpbf16ps_v4sf_mask, + __builtin_ia32_dpbf16ps_v4sf_maskz): Require also + OPTION_MASK_ISA_AVX512VL. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-02-18 Jakub Jelinek + + PR tree-optimization/108819 + * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-02-09 Jakub Jelinek + + PR target/100758 + * common/config/i386/cpuinfo.h (cpu_indicator_init): Call + get_available_features for all CPUs with max_level >= 1, rather + than just Intel or AMD. + +2023-03-15 Richard Biener + + Backported from master: + 2023-03-01 Richard Biener + + PR tree-optimization/108950 + * tree-vect-patterns.cc (vect_recog_widen_sum_pattern): + Check oprnd0 is defined in the loop. + * tree-vect-loop.cc (vectorizable_reduction): Record all + operands vector types, compute that of invariants and + properly update their SLP nodes. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-17 Richard Biener + + PR tree-optimization/108821 + * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not + move volatile accesses. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-20 Richard Biener + + PR tree-optimization/108816 + * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust + versioning condition split prerequesite, assert required + invariant. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-21 Richard Biener + + PR tree-optimization/108793 + * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap): + Use convert operands to niter_type when computing num. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-10 Richard Biener + + PR tree-optimization/108724 + * tree-vect-stmts.cc (vectorizable_operation): Avoid + using word_mode vectors when vector lowering will + decompose them to elementwise operations. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-02 Richard Biener + + PR middle-end/108625 + * genmatch.cc (expr::gen_transform): Also disallow resimplification + from pushing to lseq with force_leaf. + (dt_simplify::gen_1): Likewise. + +2023-03-15 Richard Biener + + Backported from master: + 2023-02-01 Richard Biener + + PR middle-end/108500 + * dominance.cc (assign_dfs_numbers): Replace recursive DFS + with tree traversal algorithm. + +2023-03-15 Richard Biener + + Backported from master: + 2022-12-22 Richard Biener + + PR tree-optimization/107451 + * tree-vect-stmts.cc (vectorizable_load): Avoid loading + SLP group members from group numbers in excess of the + vectorization factor. + +2023-03-15 Richard Biener + + Backported from master: + 2022-12-11 Richard Biener + + PR tree-optimization/106904 + * tree.h (strip_zero_offset_components): Declare. + * tree.cc (strip_zero_offset_components): Define. + * tree-vect-data-refs.cc (vect_create_addr_base_for_vector_ref): + Strip zero offset components before building the address. + +2023-03-14 Jan Hubicka + + Backported from master: + 2023-03-06 Jan Hubicka + + PR target/108429 + * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for + generic. + (X86_TUNE_USE_SCATTER_4PARTS): Likewise. + (X86_TUNE_USE_SCATTER): Likewise. + +2023-03-14 Jan Hubicka + + Backported from master: + 2023-02-07 Jan Hubicka + + * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off + for znver4. + +2023-03-11 Andrew Pinski + + Backported from master: + 2022-12-21 Andrew Pinski + + PR tree-optimization/105532 + * match.pd (~(X >> Y) -> ~X >> Y): Check if it is an integral + type before calling tree_nonzero_bits. + (popcount(X) + popcount(Y)): Likewise. + (popcount(X&C1)): Likewise. + +2023-03-10 Andrew Pinski + + Backported from master: + 2023-02-10 Andrew Pinski + Andrew Macleod + + PR tree-optimization/108684 + * tree-ssa-dce.cc (simple_dce_from_worklist): + Check all ssa names and not just non-vdef ones + before accepting the inline-asm. + Call unlink_stmt_vdef on the statement before + removing it. + +2023-03-08 Tobias Burnus + + Backported from master: + 2023-03-01 Tobias Burnus + + PR middle-end/108546 + * omp-low.cc (lower_omp_target): Remove optional handling + on the receiver side, i.e. inside target (data), for + use_device_ptr. + +2023-03-06 Xi Ruoyao + + Backported from master: + 2023-03-06 Xi Ruoyao + + PR target/109000 + * config/loongarch/loongarch.h (FP_RETURN): Use + TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT. + (UNITS_PER_FP_ARG): Likewise. + +2023-02-27 Martin Liska + + Backported from master: + 2023-02-24 Martin Liska + + PR sanitizer/108834 + * asan.cc (asan_add_global): Use proper TU name for normal + global variables (and aux_base_name for the artificial one). + +2023-02-24 Sebastian Huber + + Backported from master: + 2023-02-24 Sebastian Huber + + * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs. + Add non-compact 32-bit multilibs. + +2023-02-20 Alex Coplan + + Backported from master: + 2023-02-06 Alex Coplan + + PR target/104921 + * config/aarch64/aarch64-simd.md (aarch64_bfmlal_lanev4sf): + Use correct constraint for operand 3. + +2023-02-18 Xi Ruoyao + + Backported from master: + 2023-02-18 Xi Ruoyao + + * config.gcc (triplet_abi): Set its value based on $with_abi, + instead of $target. + (la_canonical_triplet): Set it after $triplet_abi is set + correctly. + * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the + multiarch tuple for lp64d "loongarch64-linux-gnu" (without + "f64" suffix). + +2023-02-15 Eric Botcazou + + PR target/90458 + * config/i386/i386.cc (ix86_compute_frame_layout): Disable the + effects of -fstack-clash-protection for TARGET_STACK_PROBE. + (ix86_expand_prologue): Likewise. + +2023-02-15 Marek Polacek + + Backported from master: + 2023-02-15 Marek Polacek + + PR middle-end/106080 + * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p + instead. + +2023-02-14 Eric Botcazou + + * gimplify.cc (gimplify_save_expr): Add missing guard. + +2023-02-13 Kewen Lin + + Backported from master: + 2023-01-18 Kewen Lin + Andrew Pinski + + PR target/108396 + * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo + vec_vsubcuqP with vec_vsubcuq. + +2023-02-13 Kewen Lin + + Backported from master: + 2023-01-18 Kewen Lin + + PR target/108348 + * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the + support for invalid uses of MMA opaque type in function arguments. + +2023-02-13 Kewen Lin + + Backported from master: + 2023-01-16 Kewen Lin + + PR target/108272 + * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the + support for invalid uses in inline asm, factor out the checking and + erroring to lambda function check_and_error_invalid_use. + +2023-02-11 John David Anglin + + * config/pa/pa.cc (pa_option_override): Disable -fstack-protector. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-31 Jakub Jelinek + + PR c++/105593 + * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd, + _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps, + _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use + _mm512_undefined_pd () or _mm512_undefined_ps () instead of using + uninitialized automatic variable __W. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-16 Jakub Jelinek + + PR c++/105593 + * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily + disable -Winit-self using pragma GCC diagnostic ignored. + * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128): + Likewise. + * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps, + _mm256_undefined_si256): Likewise. + * config/i386/avx512fintrin.h (_mm512_undefined_pd, + _mm512_undefined_ps, _mm512_undefined_epi32): Likewise. + * config/i386/avx512fp16intrin.h (_mm_undefined_ph, + _mm256_undefined_ph, _mm512_undefined_ph): Likewise. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-19 Jakub Jelinek + + PR tree-optimization/108440 + * tree-ssa-forwprop.cc: Include gimple-range.h. + (simplify_rotate): For the forms with T2 wider than T and shift counts of + Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal + to B. For the forms with T2 wider than T and shift counts of + Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if + range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee + Y < B, also add & (B - 1) masking for the rotate count. Use lazily created + pass specific ranger instead of get_global_range_query. + (pass_forwprop::execute): Disable that ranger at the end of pass if it has + been created. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-17 Jakub Jelinek + + PR tree-optimization/106523 + * tree-ssa-forwprop.cc (simplify_rotate): For the + patterns with (-Y) & (B - 1) in one operand's shift + count and Y in another, if T2 has wider precision than T, + punt if Y could have a value in [B, B2 - 1] range. + +2023-02-10 Andrew Pinski + + Backported from master: + 2023-02-09 Andrew Pinski + + PR tree-optimization/108688 + * match.pd (bit_field_ref [bit_insert]): Avoid generating + BIT_FIELD_REFs of non-mode-precision integral operands. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-02-08 Jakub Jelinek + + PR tree-optimization/108692 + * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is + widened_code which is different from code, don't call + vect_look_through_possible_promotion but instead just check op is + SSA_NAME with integral type for which vect_is_simple_use is true + and call set_op on this_unprom. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-02-02 Jakub Jelinek + + PR middle-end/108435 + * tree-nested.cc (convert_nonlocal_omp_clauses) + : If info->new_local_var_chain and *seq + is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND + before calling declare_vars. + (convert_nonlocal_omp_clauses) : Merge + with the OMP_CLAUSE_LASTPRIVATE handling except for whether + seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause) + or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause). + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-02-01 Jakub Jelinek + + PR debug/108573 + * ree.cc (combine_reaching_defs): Don't return false for paradoxical + subregs in DEBUG_INSNs. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-31 Jakub Jelinek + + PR target/108599 + * config/i386/i386-expand.cc + (ix86_convert_const_wide_int_to_broadcast): Return nullptr if + CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't + equal to bitsize of mode. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-31 Jakub Jelinek + + PR rtl-optimization/108596 + * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb + ends with asm goto and has a crossing fallthrough edge to the same bb + that contains at least one of its labels by restoring EDGE_CROSSING + flag even on possible edge from cur_bb to new_bb successor. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-27 Jakub Jelinek + + PR other/108560 + * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len + from size_t to int. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-25 Jakub Jelinek + + PR tree-optimization/108498 + * gimple-ssa-store-merging.cc (class store_operand_info): + End coment with full stop rather than comma. + (split_group): Likewise. + (merged_store_group::apply_stores): Clear string_concatenation if + start or end aren't on a byte boundary. + +2023-02-10 Eric Biggers + + Backported from master: + 2023-01-24 Eric Biggers + + PR bootstrap/90543 + * optc-save-gen.awk: Fix copy-and-paste error. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-19 Jakub Jelinek + + PR middle-end/108459 + * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather + than fold_unary for NEGATE_EXPR. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-04 Jakub Jelinek + + PR middle-end/108237 + * generic-match-head.cc: Include tree-pass.h. + (canonicalize_math_p, optimize_vectors_before_lowering_p): Define + to false if cfun and cfun->curr_properties has PROP_gimple_opt_math + resp. PROP_gimple_lvec property set. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-03 Jakub Jelinek + + PR middle-end/108264 + * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets + from source which doesn't have scalar integral mode first convert + it to outer_mode. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-23 Jakub Jelinek + + PR tree-optimization/108068 + * tree.h (real_maybe_zerop): Declare. + * tree.cc (real_maybe_zerop): Define. + * tree-ssa-dom.cc (record_edge_info): Use it instead of + real_zerop or TREE_CODE (op1) == SSA_NAME || real_zerop. Always set + can_infer_simple_equiv to false for decimal floating point types. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-22 Jakub Jelinek + + PR tree-optimization/108166 + * tree-ssa-phiopt.cc (value_replacement): For the maybe_equal_p + case turned into equal_p reset SSA_NAME_RANGE_INFO of phi result. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-22 Jakub Jelinek + + PR rtl-optimization/108193 + * cse.cc (compute_const_anchors): Change n type to + unsigned HOST_WIDE_INT, adjust comparison against it to avoid + warnings. Formatting fix. + (insert_const_anchor): Use gen_int_mode instead of GEN_INT. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-16 Jakub Jelinek + + PR rtl-optimization/106751 + * loop-invariant.cc (move_invariant_reg): If preheader bb ends + with a JUMP_INSN, split the preheader edge and emit invariants + into the new preheader basic block. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-15 Jakub Jelinek + + PR tree-optimization/108095 + * tree-into-ssa.cc (maybe_register_def): Insert debug stmt + on all non-EH edges from asm goto if they have a single + predecessor rather than asserting there is at most one such edge. + Test whether there are no PHI nodes next to the single predecessor + test. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-10 Jakub Jelinek + + PR tree-optimization/107997 + * tree-ssa-loop-ivopts.cc: Include cfganal.h. + (create_new_iv) : If ip_end_pos bb is non-empty and ends + with a stmt which ends bb, instead of adding iv update after it split + the latch edge and insert iterator into the new latch bb. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-08 Jakub Jelinek + + PR debug/106719 + * cfgbuild.cc (find_bb_boundaries): If there are NOTEs in between + debug_insn (seen after flow_transfer_insn) and insn, move NOTEs + before all the DEBUG_INSNs and split after NOTEs. If there are + other insns like jump table data, clear debug_insn. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-11-28 Jakub Jelinek + + PR target/106875 + * config/i386/i386.opt (x_ix86_abi): Remove TargetSave. + (ix86_abi): Replace it with TargetVariable. + * config/i386/i386-options.cc (ix86_function_specific_save, + ix86_function_specific_restore): Don't save and restore x_ix86_abi. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-11-24 Jakub Jelinek + + PR middle-end/107317 + * asan.cc: Include diagnostic-core.h. + (asan_emit_stack_protection): Return NULL early if seen_error (). + +2023-02-07 Andrew Pinski + + Backported from master: + 2023-01-30 Andrew Pinski + + PR tree-optimization/108582 + * tree-ssa-phiopt.cc (match_simplify_replacement): Add check + for middlebb to have no phi nodes. + +2023-02-07 Siddhesh Poyarekar + + Backported from master: + 2023-01-26 Siddhesh Poyarekar + + PR tree-optimization/108522 + * tree-object-size.cc (compute_object_offset): Make EXPR + argument non-const. Call component_ref_field_offset. + +2023-02-07 Siddhesh Poyarekar + + Backported from master: + 2023-01-25 Siddhesh Poyarekar + Jakub Jelinek + + PR tree-optimization/108522 + * tree-object-size.cc (compute_object_offset): Use + TREE_OPERAND(ref, 2) for COMPONENT_REF when available. + +2023-02-01 Martin Jambor + + Backported from master: + 2023-01-18 Martin Jambor + + PR ipa/107944 + * cgraph.cc (cgraph_node::remove): Check whether nodes up the + lcone_of chain also do not need the body. + +2023-01-30 Andrew MacLeod + + PR tree-optimization/108306 + * range-op.cc (operator_lshift::fold_range): Return [0, 0] not + varying for shifts that are always out of void range. + (operator_rshift::fold_range): Return [0, 0] not + varying for shifts that are always out of void range. + +2023-01-30 liuhongt + + * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16. + * doc/invoke.texi: Ditto. + +2023-01-29 Jan Hubicka + + Backported from master: + 2023-01-16 Jan Hubicka + + * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter + by TARGET_USE_SCATTER. + * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS, + TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros. + * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS, + TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes. + (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable + for znver4. (X86_TUNE_USE_GATHER): Disable for zen4. + +2023-01-29 Jan Hubicka + + Backported from master: + 2022-12-22 Jan Hubicka + + * config/i386/i386-expand.cc (ix86_expand_set_or_cpymem): Add + TARGET_AVX512_SPLIT_REGS + * config/i386/i386-options.cc (ix86_option_override_internal): + Honor x86_TONE_AVOID_256FMA_CHAINS. + * config/i386/i386.cc (ix86_vec_cost): Honor TARGET_AVX512_SPLIT_REGS. + (ix86_reassociation_width): Likewise. + * config/i386/i386.h (TARGET_AVX512_SPLIT_REGS): New tune. + * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Disable + for znver4. + (X86_TUNE_USE_GATHER_4PARTS): Likewise. + (X86_TUNE_AVOID_256FMA_CHAINS): Set for znver4. + (X86_TUNE_AVOID_512FMA_CHAINS): New utne; set for znver4. + (X86_TUNE_AVX256_OPTIMAL): Add znver4. + (X86_TUNE_AVX512_SPLIT_REGS): New tune. + (X86_TUNE_AVX256_MOVE_BY_PIECES): Add znver1-3. + (X86_TUNE_AVX256_STORE_BY_PIECES): Add znver1-3. + (X86_TUNE_AVX512_MOVE_BY_PIECES): Add znver4. + (X86_TUNE_AVX512_STORE_BY_PIECES): Add znver4. + +2023-01-29 Jan Hubicka + + Backported from master: + 2022-12-22 Jan Hubicka + + * config/i386/x86-tune-costs.h (znver4_cost): Upate costs of FP and SSE + moves, division multiplication, gathers, L2 cache size, and more + complex FP instrutions. + +2023-01-28 Tejas Joshi + + Backported from master: + 2023-01-05 Tejas Joshi + + * common/config/i386/i386-common.cc (processor_alias_table): + Use CPU_ZNVER4 for znver4. + * config/i386/i386.md: Add znver4.md. + * config/i386/znver4.md: New. + +2023-01-28 Tejas Joshi + + Backported from master: + 2022-10-25 Tejas Joshi + + * common/config/i386/i386-common.cc (processor_alias_table): Use + CPU_ZNVER3 for znver4. + * config/i386/znver.md: Remove znver4 reservations. + +2023-01-28 Tejas Joshi + + Backported from master: + 2022-10-21 Tejas Joshi + + * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver4. + * common/config/i386/i386-common.cc (processor_names): Add znver4. + (processor_alias_table): Add znver4 and modularize old znvers. + * common/config/i386/i386-cpuinfo.h (processor_subtypes): + AMDFAM19H_ZNVER4. + * config.gcc (x86_64-*-* |...): Likewise. + * config/i386/driver-i386.cc (host_detect_local_cpu): Let + -march=native recognize znver4 cpus. + * config/i386/i386-c.cc (ix86_target_macros_internal): Add znver4. + * config/i386/i386-options.cc (m_ZNVER4): New definition. + (m_ZNVER): Include m_ZNVER4. + (processor_cost_table): Add znver4. + * config/i386/i386.cc (ix86_reassociation_width): Likewise. + * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER4. + (PTA_ZNVER1): New definition. + (PTA_ZNVER2): Likewise. + (PTA_ZNVER3): Likewise. + (PTA_ZNVER4): Likewise. + * config/i386/i386.md (define_attr "cpu"): Add znver4 and rename + md file. + * config/i386/x86-tune-costs.h (znver4_cost): New definition. + * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver4. + (ix86_adjust_cost): Likewise. + * config/i386/znver1.md: Rename to znver.md. + * config/i386/znver.md: Add new reservations for znver4. + * doc/extend.texi: Add details about znver4. + * doc/invoke.texi: Likewise. + +2023-01-27 Andre Vieira + + Backported from master: + 2022-12-06 Andre Vieira + + PR target/107987 + * config/arm/mve.md (mve_vcmpq_n_, + @mve_vcmpq_n_f): Apply vec_duplicate to scalar + operand. + +2023-01-26 Marek Polacek + + Backported from master: + 2023-01-26 Marek Polacek + + PR middle-end/108543 + * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS + if it was previously set. + +2023-01-26 Dimitar Dimitrov + + Backported from master: + 2023-01-22 Dimitar Dimitrov + + * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI + and HI input modes. + * config/pru/pru.md (clz): Fix generated code for QI and HI + input modes. + +2023-01-25 Christophe Lyon + + Backported from master: + 2023-01-12 Christophe Lyon + Richard Sandiford + + * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix + comment. + (aarch64_layout_arg): Factorize warning conditions. + (aarch64_function_arg_boundary): Fix typo. + * function.cc (currently_expanding_function_start): New variable. + (expand_function_start): Handle + currently_expanding_function_start. + * function.h (currently_expanding_function_start): Declare. + +2023-01-24 Richard Biener + + Backported from master: + 2022-12-19 Richard Biener + + PR tree-optimization/108164 + * tree-vect-loop-manip.cc (vect_update_ivs_after_vectorizer): + Perform vect_step_op_add update in the appropriate type. + +2023-01-24 Richard Biener + + Backported from master: + 2022-12-13 Richard Biener + + PR tree-optimization/108076 + * tree-if-conv.cc (if_convertible_loop_p_1): Reject blocks + with non-local or forced labels that we later remove + labels from. + +2023-01-24 Richard Biener + + Backported from master: + 2022-12-21 Richard Biener + + PR middle-end/107994 + * gimplify.cc (gimplify_expr): Catch errorneous comparison + operand. + +2023-01-24 Richard Biener + + Backported from master: + 2022-11-11 Richard Biener + Nikita Voronov + + PR tree-optimization/107554 + * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): + Use unsigned HOST_WIDE_INT type for the strlen. + +2023-01-24 Sergei Trofimovich + + Backported from master: + 2022-08-16 Sergei Trofimovich + + PR driver/106624 + * gcc.cc (driver::detect_jobserver): Allocate storage xputenv() + argument using xstrdup(). + +2023-01-23 Andreas Krebbel + + Backported from master: + 2022-08-25 Andreas Krebbel + + PR target/106101 + * config/s390/predicates.md (subreg_register_operand): New + predicate. + * config/s390/s390-protos.h (s390_gen_lowpart_subreg): New + function prototype. + * config/s390/s390.cc (s390_gen_lowpart_subreg): New function. + (s390_expand_insv): Use s390_gen_lowpart_subreg instead of + gen_lowpart. + * config/s390/s390.md ("*get_tp_64", "*zero_extendhisi2_31") + ("*zero_extendqisi2_31", "*zero_extendqihi2_31"): Likewise. + ("movstrictqi", "movstricthi", "movstrictsi"): Use the + subreg_register_operand predicate instead of register_operand. + +2023-01-11 Eric Botcazou + + PR tree-optimization/108199 + * tree-sra.cc (sra_modify_expr): Deal with reverse storage order + for bit-field references. + +2023-01-11 Martin Liska + + Backported from master: + 2022-12-28 Martin Liska + + PR tree-optimization/108137 + * tree-ssa-strlen.cc (get_range_strlen_phi): Reject anything + different from INTEGER_CST. + +2023-01-10 Stam Markianos-Wright + + Backported from master: + 2022-12-30 Stam Markianos-Wright + + PR target/107714 + * config/arm/arm-protos.h (mve_struct_mem_operand): New protoype. + * config/arm/arm.cc (mve_struct_mem_operand): New function. + * config/arm/constraints.md (Ug): New constraint. + * config/arm/mve.md (mve_vst4q): Change constraint. + (mve_vst2q): Likewise. + (mve_vld4q): Likewise. + (mve_vld2q): Likewise. + * config/arm/predicates.md (mve_struct_operand): New predicate. + +2023-01-10 Kyrylo Tkachov + + Backported from master: + 2022-12-19 Kyrylo Tkachov + + PR target/108140 + * config/aarch64/aarch64-builtins.cc + (aarch64_expand_builtin_data_intrinsic): Handle NULL target. + +2023-01-05 Kewen Lin + + PR target/106736 + * config/rs6000/mma.md (define_expand movoo): Call function + rs6000_opaque_type_invalid_use_p to check and emit error message for + the invalid use of opaque type. + (define_expand movxo): Likewise. + * config/rs6000/rs6000-protos.h + (rs6000_opaque_type_invalid_use_p): New function declaration. + (currently_expanding_gimple_stmt): New extern declaration. + * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): New + function. + +2022-12-22 Richard Biener + + Backported from master: + 2022-12-22 Richard Biener + + PR bootstrap/106482 + * doc/install.texi (ISO C++11 Compiler): Document GCC version + known to work. + +2022-12-22 Martin Liska + + Backported from master: + 2022-08-10 Martin Liska + + * opts-jobserver.h: Add one member. + * opts-common.cc (jobserver_info::jobserver_info): Parse FIFO + format of --jobserver-auth. + +2022-12-22 Martin Liska + + Backported from master: + 2022-08-10 Martin Liska + + * gcc.cc (driver::detect_jobserver): Remove and move to + jobserver.h. + * lto-wrapper.cc (jobserver_active_p): Likewise. + (run_gcc): Likewise. + * opts-jobserver.h: New file. + * opts-common.cc (jobserver_info::jobserver_info): New function. + +2022-12-20 Richard Biener + + Backported from master: + 2022-12-20 Richard Biener + + PR d/104749 + * doc/install.texi (GDC): Document GDC 9.4 or later is required + to build the D language frontend. + +2022-12-20 Hongyu Wang + + * config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS): Add + m_SAPPHIRERAPIDS, m_ALDERLAKE. + +2022-12-15 Sebastian Pop + + PR target/98776 + * config/aarch64/aarch64-protos.h (aarch64_output_patchable_area): + Declared. + * config/aarch64/aarch64.cc (aarch64_print_patchable_function_entry): + Emit an UNSPECV_PATCHABLE_AREA pseudo instruction. + (aarch64_output_patchable_area): New. + * config/aarch64/aarch64.md (UNSPECV_PATCHABLE_AREA): New. + (patchable_area): Define. + +2022-12-13 Alex Coplan + + Backported from master: + 2022-12-01 Alex Coplan + + * varasm.cc (assemble_variable): Fix type confusion bug when + checking for ".vtable_map_vars" section. + +2022-12-12 Richard Biener + + Backported from master: + 2022-11-29 Richard Biener + + PR tree-optimization/107898 + * gimple-ssa-warn-alloca.cc (alloca_call_type): Check + the type of the alloca argument is compatible with size_t + before querying ranges. + +2022-12-12 Richard Biener + + Backported from master: + 2022-11-25 Richard Biener + + PR tree-optimization/107865 + * tree-cfg.cc (move_sese_region_to_fn): Free the number of + iterations of moved loops. + +2022-12-12 Richard Biener + + Backported from master: + 2022-12-05 Richard Biener + + PR tree-optimization/107833 + PR tree-optimization/107839 + * cfghooks.cc: Include tree.h. + * tree-ssa-loop-im.cc (movement_possibility): Wrap and + make stmts using any ssa_name_maybe_undef_p operand + to preserve execution. + (loop_invariant_motion_in_fun): Call mark_ssa_maybe_undefs + to init maybe-undefined status. + * tree-ssa-loop-ivopts.cc (ssa_name_maybe_undef_p, + ssa_name_set_maybe_undef, ssa_name_any_use_dominates_bb_p, + mark_ssa_maybe_undefs): Move ... + * tree-ssa.cc: ... here. + * tree-ssa.h (ssa_name_any_use_dominates_bb_p, + mark_ssa_maybe_undefs): Declare. + (ssa_name_maybe_undef_p, ssa_name_set_maybe_undef): Define. + +2022-12-12 Richard Biener + + Backported from master: + 2022-11-16 Richard Biener + + PR tree-optimization/107686 + * tree-ssa-forwprop.cc (optimize_vector_load): Restrict + VEC_UNPACK support to integral typed bitfield refs. + +2022-12-12 Richard Biener + + Backported from master: + 2022-11-22 Richard Biener + + PR tree-optimization/107766 + * tree-vect-slp-patterns.cc (complex_mul_pattern::matches): + Use *node to check for FP vector types. + +2022-12-12 Richard Biener + + Backported from master: + 2022-11-18 Richard Biener + + PR tree-optimization/107647 + * tree-vect-slp-patterns.cc (addsub_pattern::recognize): Only + allow FMA generation with -ffp-contract=fast for FP types. + (complex_mul_pattern::matches): Likewise. + +2022-12-12 Richard Biener + + Backported from master: + 2022-10-28 Richard Biener + + PR tree-optimization/107407 + * tree-ssa-dse.cc (dse_classify_store): Perform backedge + varying index check when collecting PHI uses rather than + after optimizing processing of the candidate defs. + +2022-12-12 Richard Biener + + Backported from master: + 2022-12-05 Richard Biener + + PR tree-optimization/106868 + * gimple-ssa-warn-access.cc (pass_waccess::gimple_call_return_arg_ref): + Inline into single user ... + (pass_waccess::check_dangling_uses): ... here and adjust the + call and the PHI case to require that ref.aref is the address + of the decl. + +2022-12-09 Martin Liska + + Backported from master: + 2022-12-09 Martin Liska + + * config/i386/i386-builtins.cc (fold_builtin_cpu): Use same path + as for PR103661. + * doc/extend.texi: Fix "x86-64" use. + +2022-12-09 Martin Liska + + Backported from master: + 2022-05-11 Martin Liska + + * common/config/i386/cpuinfo.h (has_cpu_feature): Directly + compute index in cpu_features2. + (set_cpu_feature): Likewise. + * config/i386/i386-builtins.cc (fold_builtin_cpu): Also remove + loop for cpu_features2 and use NOP_EXPRs. + +2022-12-06 Kyrylo Tkachov + + Backported from master: + 2022-11-30 Kyrylo Tkachov + + * config/aarch64/aarch64.md (aarch64_cpymemdi): Specify clobber of CC reg. + (*aarch64_cpymemdi): Likewise. + (aarch64_movmemdi): Likewise. + (aarch64_setmemdi): Likewise. + (*aarch64_setmemdi): Likewise. + +2022-12-05 Andrew Pinski + + Backported from master: + 2022-12-05 Andrew Pinski + + PR tree-optimization/107956 + * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern): + Check for NULL LHS on masked loads. + +2022-12-01 liuhongt + + PR target/107863 + * config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): + Convert op1 to target mode whenever mode mismatch. + +2022-11-30 Iain Buclaw + + Backported from master: + 2022-09-08 Iain Buclaw + + * config/darwin-d.cc: Include tm.h. + * config/dragonfly-d.cc: Likewise. + * config/freebsd-d.cc: Remove memmodel.h. + * config/glibc-d.cc: Likewise. + * config/netbsd-d.cc: Include tm.h. + * config/openbsd-d.cc: Likewise. + * config/sol2-d.cc: Likewise. + +2022-11-30 Iain Buclaw + + Backported from master: + 2022-09-02 Iain Buclaw + + PR d/105659 + * config.gcc: Set tm_d_file to ${cpu_type}/${cpu_type}-d.h. + * config/aarch64/aarch64-d.cc: Include tm_d.h. + * config/aarch64/aarch64-protos.h (aarch64_d_target_versions): Move to + config/aarch64/aarch64-d.h. + (aarch64_d_register_target_info): Likewise. + * config/aarch64/aarch64.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/arm/arm-d.cc: Include tm_d.h and arm-protos.h instead of + tm_p.h. + * config/arm/arm-protos.h (arm_d_target_versions): Move to + config/arm/arm-d.h. + (arm_d_register_target_info): Likewise. + * config/arm/arm.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/default-d.cc: Remove memmodel.h include. + * config/freebsd-d.cc: Include tm_d.h instead of tm_p.h. + * config/glibc-d.cc: Likewise. + * config/i386/i386-d.cc: Include tm_d.h. + * config/i386/i386-protos.h (ix86_d_target_versions): Move to + config/i386/i386-d.h. + (ix86_d_register_target_info): Likewise. + (ix86_d_has_stdcall_convention): Likewise. + * config/i386/i386.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + (TARGET_D_HAS_STDCALL_CONVENTION): Likewise. + * config/i386/winnt-d.cc: Include tm_d.h instead of tm_p.h. + * config/mips/mips-d.cc: Include tm_d.h. + * config/mips/mips-protos.h (mips_d_target_versions): Move to + config/mips/mips-d.h. + (mips_d_register_target_info): Likewise. + * config/mips/mips.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/netbsd-d.cc: Include tm_d.h instead of tm.h and memmodel.h. + * config/openbsd-d.cc: Likewise. + * config/pa/pa-d.cc: Include tm_d.h. + * config/pa/pa-protos.h (pa_d_target_versions): Move to + config/pa/pa-d.h. + (pa_d_register_target_info): Likewise. + * config/pa/pa.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/riscv/riscv-d.cc: Include tm_d.h. + * config/riscv/riscv-protos.h (riscv_d_target_versions): Move to + config/riscv/riscv-d.h. + (riscv_d_register_target_info): Likewise. + * config/riscv/riscv.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/rs6000/rs6000-d.cc: Include tm_d.h. + * config/rs6000/rs6000-protos.h (rs6000_d_target_versions): Move to + config/rs6000/rs6000-d.h. + (rs6000_d_register_target_info): Likewise. + * config/rs6000/rs6000.h (TARGET_D_CPU_VERSIONS) Likewise.: + (TARGET_D_REGISTER_CPU_TARGET_INFO) Likewise.: + * config/s390/s390-d.cc: Include tm_d.h. + * config/s390/s390-protos.h (s390_d_target_versions): Move to + config/s390/s390-d.h. + (s390_d_register_target_info): Likewise. + * config/s390/s390.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * config/sol2-d.cc: Include tm_d.h instead of tm.h and memmodel.h. + * config/sparc/sparc-d.cc: Include tm_d.h. + * config/sparc/sparc-protos.h (sparc_d_target_versions): Move to + config/sparc/sparc-d.h. + (sparc_d_register_target_info): Likewise. + * config/sparc/sparc.h (TARGET_D_CPU_VERSIONS): Likewise. + (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. + * configure: Regenerate. + * configure.ac (tm_d_file): Remove defaults.h. + (tm_d_include_list): Remove options.h and insn-constants.h. + * config/aarch64/aarch64-d.h: New file. + * config/arm/arm-d.h: New file. + * config/i386/i386-d.h: New file. + * config/mips/mips-d.h: New file. + * config/pa/pa-d.h: New file. + * config/riscv/riscv-d.h: New file. + * config/rs6000/rs6000-d.h: New file. + * config/s390/s390-d.h: New file. + * config/sparc/sparc-d.h: New file. + +2022-11-30 John David Anglin + + * config/pa/pa.md (addvdi3): Force operand 2 to a register. + Remove "addi,tsv,*" instruction from unamed pattern. + (subvdi3): Force operand 1 to a register. + Remove "subi,tsv" instruction from from unamed pattern. + +2022-11-29 Max Filippov + + Backported from master: + 2022-11-08 Max Filippov + + PR rtl-optimization/107482 + * ira-color.cc (assign_hard_reg): Only call + update_costs_from_copies when retry_p is false. + +2022-11-25 Eric Botcazou + + * range-op.cc (operator_bitwise_xor::op1_range): Fix thinko. + +2022-11-25 Eric Botcazou + + * tree-loop-distribution.cc (loop_distribution::classify_builtin_ldst): + Bail out if source and destination do not have the same storage order. + +2022-11-21 Jakub Jelinek + + Backported from master: + 2022-11-21 Jakub Jelinek + + PR target/107748 + * config/i386/avx512fp16intrin.h (_mm512_castph512_ph128, + _mm512_castph512_ph256, _mm512_castph128_ph512, + _mm512_castph256_ph512, _mm512_set1_pch): Uglify names of local + variables and union members. + * config/i386/avx512fp16vlintrin.h (_mm256_castph256_ph128, + _mm256_castph128_ph256, _mm256_set1_pch, _mm_set1_pch): Likewise. + * config/i386/smmintrin.h (_mm_extract_ps): Likewise. + * config/i386/avx512bf16intrin.h (_mm_cvtsbh_ss): Likewise. + +2022-11-20 Jakub Jelinek + + Backported from master: + 2022-11-20 Jakub Jelinek + + PR target/107183 + * reg-stack.cc (next_flags_user): Add DEBUG_SEEN argument. + If >= 0 and a DEBUG_INSN would be otherwise returned, set + DEBUG_SEEN to 1 and ignore it. + (swap_rtx_condition): Add DEBUG_SEEN argument. In >= 0 + mode only set DEBUG_SEEN to 1 if problematic DEBUG_ISNSs + were seen and revert all changes on success in that case. + Don't try to recog_memoized DEBUG_INSNs. + (compare_for_stack_reg): Adjust swap_rtx_condition caller. + If it returns true and debug_seen is 1, call swap_rtx_condition + again with debug_seen -1. + +2022-11-19 Thomas Schwinge + + Backported from master: + 2022-11-19 Thomas Schwinge + + * config/nvptx/nvptx.h (STARTFILE_SPEC): Fix 'crt0.o' for + '-mmainkernel'. + +2022-11-19 Jinyang He + + Backported from master: + 2022-11-18 Jinyang He + + PR target/107713 + * config/loongarch/sync.md + (atomic_cas_value_exchange_7_): New define_insn. + (atomic_exchange): Use atomic_cas_value_exchange_7_si instead of + atomic_cas_value_cmp_and_7_si. + +2022-11-16 Philipp Tomsich + + Backported from master: + 2022-11-14 Philipp Tomsich + + * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere1a. + * config/aarch64/aarch64-cost-tables.h: Add ampere1a_extra_costs. + * config/aarch64/aarch64-fusion-pairs.def (AARCH64_FUSION_PAIR): + Define a new fusion pair for A+B+1/A-B-1 (i.e., add/subtract two + registers and then +1/-1). + * config/aarch64/aarch64-tune.md: Regenerate. + * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement + idiom-matcher for the new fusion pair. + * doc/invoke.texi: Add ampere1a. + +2022-11-16 Martin Jambor + + Backported from master: + 2022-10-19 Martin Jambor + + PR tree-optimization/107206 + * tree-sra.cc (struct access): New field grp_result_of_prop_from_lhs. + (analyze_access_subtree): Do not create replacements for accesses with + this flag when not toally scalarizing. + (propagate_subaccesses_from_lhs): Set the new flag. + +2022-11-09 Eric Botcazou + + * alias.cc (init_alias_analysis): Do not record sets to the hard + frame pointer if the frame pointer has not been eliminated. + +2022-11-08 H.J. Lu + + Backported from master: + 2022-10-25 H.J. Lu + + PR target/107304 + * expr.cc (get_inner_reference): Always use TYPE_MODE for vector + field with vector raw mode. + +2022-11-07 Cui,Lili + + * config/i386/driver-i386.cc (host_detect_local_cpu): + Move sapphirerapids out of AVX512_VP2INTERSECT. + * config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS + * doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS + +2022-11-05 Jonathan Wakely + + Backported from master: + 2022-11-05 Jonathan Wakely + + PR c/41041 + * doc/cppopts.texi: Document -fwide-exec-charset defaults + correctly. + +2022-11-04 Eric Botcazou + + * fold-const.cc (operand_compare::operand_equal_p) : + Do not take into account operand 2. + (operand_compare::hash_operand) : Likewise. + +2022-11-03 Uros Bizjak + + Backported from master: + 2022-11-03 Uroš Bizjak + + PR target/107404 + * config/i386/i386.md (eliminate reg-reg move by inverting the + condition of a cmove #2 peephole2): Check if eliminated move + initialized a register, used in the moved instruction. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-10-02 Jakub Jelinek + + PR tree-optimization/107121 + * tree-cfg.cc (verify_gimple_call): Fix a typo in diagnostics, + DEFFERED_INIT -> DEFERRED_INIT. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-09-24 Jakub Jelinek + + PR c/107001 + * omp-low.cc (lower_omp_taskgroup): Don't add GOMP_RETURN statement + at the end. + * omp-expand.cc (build_omp_regions_1): Clarify GF_OMP_TARGET_KIND_DATA + is not stand-alone directive. For GIMPLE_OMP_TASKGROUP, also don't + update parent. + (omp_make_gimple_edges) : Reset + cur_region back after new_omp_region. + +2022-10-28 Julian Brown + + Backported from master: + 2022-10-28 Julian Brown + Thomas Schwinge + + PR middle-end/90115 + * omp-low.cc (oacc_privatization_candidate_p): Artificial vars are not + privatization candidates. + +2022-10-27 Torbjörn SVENSSON + + Backported from master: + 2022-10-27 Torbjörn SVENSSON + Yvan ROUX + + * ira.cc: Resize array after reg number increased. + +2022-10-26 Philipp Tomsich + + Backported from master: + 2022-10-06 Philipp Tomsich + + * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update + Ampere-1 core entry. + +2022-10-26 Philipp Tomsich + + Backported from master: + 2022-10-06 Philipp Tomsich + + * config/aarch64/driver-aarch64.cc (readline): Fix off-by-one. + +2022-10-25 Eric Botcazou + + * profile.cc (branch_prob): Be prepared for ignored functions with + DECL_SOURCE_LOCATION set to UNKNOWN_LOCATION. + +2022-10-25 Stefan Schulze Frielinghaus + + Backported from master: + 2022-10-19 Stefan Schulze Frielinghaus + + PR target/106355 + * config/s390/s390.cc (s390_call_saved_register_used): For a + parameter with BLKmode fix determining number of consecutive + registers. + +2022-10-25 Martin Liska + + Backported from master: + 2022-10-25 Martin Liska + + PR target/107364 + * common/config/i386/i386-cpuinfo.h (enum processor_vendor): + Fix pedantic warning. + +2022-10-25 Martin Liska + + Backported from master: + 2022-10-24 Martin Liska + + PR target/107364 + * common/config/i386/i386-cpuinfo.h (enum processor_vendor): + Reorder enum values as BUILTIN_VENDOR_MAX should not point + in the middle of the valid enum values. + +2022-10-21 Julian Brown + + Backported from master: + 2022-10-20 Julian Brown + + PR target/105421 + * config/gcn/gcn.cc (gcn_detect_incoming_pointer_arg): Any pointer + argument forces FLAT addressing mode, not just + pointer-to-non-aggregate. + +2022-10-21 Richard Biener + + Backported from master: + 2022-10-21 Richard Biener + + PR tree-optimization/107323 + * tree-loop-distribution.cc (pg_unmark_merged_alias_ddrs): + New function. + (loop_distribution::break_alias_scc_partitions): Revert + postorder save/restore from the PR94125 fix. Instead + make sure to not ignore edges from SCCs we are going to + merge. + +2022-10-20 Thomas Schwinge + + Backported from master: + 2022-05-10 Thomas Schwinge + + PR middle-end/100400 + * omp-oacc-kernels-decompose.cc + (visit_loops_in_gang_single_region) : Explicitly + call 'internal_error'. + +2022-10-20 Richard Sandiford + + Backported from master: + 2022-10-20 Richard Sandiford + + * config/aarch64/aarch64-sve.md (*aarch64_brk_cc): Remove + merging alternative. + (*aarch64_brk_ptest): Likewise. + +2022-10-20 Richard Sandiford + + Backported from master: + 2022-10-20 Richard Sandiford + + * config/aarch64/iterators.md (SVE_BRKP): New iterator. + * config/aarch64/aarch64-sve.md (*aarch64_brkn_cc): New pattern. + (*aarch64_brkn_ptest): Likewise. + (*aarch64_brk_cc): Restrict to SVE_BRKP. + (*aarch64_brk_ptest): Likewise. + +2022-10-20 Richard Sandiford + + * config/aarch64/aarch64.h (AARCH64_FL_FOR_ARCH8_3): Add + AARCH64_FL_RCPC. + (AARCH64_ISA_RCPC): New macro. + * config/aarch64/aarch64-cores.def (thunderx3t110, zeus, neoverse-v1) + (neoverse-512tvb, saphira): Remove RCPC from these Armv8.3-A+ cores. + * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_RCPC when appropriate. + +2022-10-19 Kewen Lin + + Backported from master: + 2022-09-26 Kewen Lin + + PR target/96072 + * config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): Update the + condition for adding REG_CFA_DEF_CFA reg note with + frame_pointer_needed_indeed. + +2022-10-19 Kewen Lin + + Backported from master: + 2022-09-26 Kewen Lin + + PR target/100645 + * config/rs6000/vector.md (vec_shr_): Replace condition + TARGET_ALTIVEC with VECTOR_UNIT_ALTIVEC_OR_VSX_P. + +2022-10-17 Pat Haugen + + Backported from master: + 2022-05-17 Pat Haugen + + PR target/99685 + * config/rs6000/rs6000-call.cc (rs6000_function_arg_advance_1): Bump + register count when not splitting IEEE 128-bit Complex. + +2022-10-17 Richard Biener + + Backported from master: + 2022-10-14 Richard Biener + + PR tree-optimization/107254 + * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): + For permutes also analyze live lanes. + (vect_schedule_slp_node): For permutes also code generate + live lane extracts. + +2022-10-17 Richard Biener + + Backported from master: + 2022-10-11 Richard Biener + + PR tree-optimization/107212 + * tree-vect-loop.cc (vectorizable_reduction): Make sure to + set STMT_VINFO_REDUC_DEF for all live lanes in a SLP + reduction. + (vectorizable_live_operation): Do not pun to the SLP + node representative for reduction epilogue generation. + +2022-10-17 Richard Biener + + Backported from master: + 2022-10-13 Richard Biener + + PR tree-optimization/107160 + * tree-vect-loop.cc (vect_create_epilog_for_reduction): + Do not register accumulator if we failed to reduce it + to a single vector. + +2022-10-17 Richard Biener + + Backported from master: + 2022-10-06 Richard Biener + + PR tree-optimization/107107 + * tree-ssa-sccvn.cc (visit_reference_op_store): Do not + affect value-numbering when doing the tail merging + MODIFY_EXPR lookup. + +2022-10-17 Richard Biener + + Backported from master: + 2022-09-23 Richard Biener + + PR tree-optimization/106922 + * tree-ssa-sccvn.cc (vn_reference_lookup_3): Allow + an arbitrary number of same valued skipped stores. + +2022-10-17 Richard Biener + + Backported from master: + 2022-09-22 Richard Biener + + PR tree-optimization/106922 + * tree-ssa-sccvn.cc (vn_walk_cb_data::same_val): New member. + (vn_walk_cb_data::finish): Perform delayed verification of + a skipped may-alias. + (vn_reference_lookup_pieces): Likewise. + (vn_reference_lookup): Likewise. + (vn_reference_lookup_3): When skipping stores of the same + value also handle constant stores that are more than a + single VDEF away by delaying the verification. + +2022-10-14 Eric Botcazou + + PR target/107248 + * config/sparc/sparc.cc (sparc_expand_prologue): Emit a frame + blockage for leaf functions. + (sparc_flat_expand_prologue): Emit frame instead of full blockage. + (sparc_expand_epilogue): Emit a frame blockage for leaf functions. + (sparc_flat_expand_epilogue): Emit frame instead of full blockage. + +2022-10-13 Tobias Burnus + + Backported from master: + 2022-10-04 Tobias Burnus + + * doc/install.texi (Specific): Add missing items to bullet list. + (amdgcn): Update LLVM requirements, use version not date for newlib. + (nvptx): Use version not git hash for newlib. + +2022-10-11 Christophe Lyon + + * config/arm/mve.md (mve_vqshluq_n_s): Use + MVE_pred/MVE_constraint instead of mve_imm_7/Ra. + (mve_vqshluq_m_n_s): Likewise. + (mve_vqrshrnbq_n_): Use MVE_pred3/MVE_constraint3 + instead of mve_imm_8/Rb. + (mve_vqrshrunbq_n_s): Likewise. + (mve_vqrshrntq_n_): Likewise. + (mve_vqrshruntq_n_s): Likewise. + (mve_vrshrnbq_n_): Likewise. + (mve_vrshrntq_n_): Likewise. + (mve_vqrshrnbq_m_n_): Likewise. + (mve_vqrshrntq_m_n_): Likewise. + (mve_vrshrnbq_m_n_): Likewise. + (mve_vrshrntq_m_n_): Likewise. + (mve_vqrshrunbq_m_n_s): Likewise. + (mve_vsriq_n_): Likewise. + (cherry-picked from c3fb6658c7670e446f2fd00984404d971e416b3c) + +2022-10-11 Richard Biener + + Backported from master: + 2022-09-14 Richard Biener + + PR tree-optimization/106934 + * tree-ssa.cc (non_rewritable_mem_ref_base): Avoid BIT_FIELD_REFs + of bitfields. + (maybe_rewrite_mem_ref_base): Likewise. + +2022-10-11 Richard Biener + + Backported from master: + 2022-09-15 Richard Biener + + PR tree-optimization/106922 + * tree-ssa-pre.cc (translate_vuse_through_block): Only + keep the VUSE if its def dominates PHIBLOCK. + (prune_clobbered_mems): Rewrite logic so we check whether + a value dies in a block when the VUSE def doesn't dominate it. + +2022-10-11 Richard Biener + + Backported from master: + 2022-09-09 Richard Biener + + PR tree-optimization/106892 + * tree-predcom.cc (ref_at_iteration): Do not associate the + constant part of the offset into the MEM_REF offset + operand, across a non-zero offset. + +2022-10-11 Richard Biener + + Backported from master: + 2022-08-22 Richard Biener + + PR tree-optimization/105937 + * tree-ssa-uninit.cc (find_uninit_use): Do not queue PHIs + on backedges. + (execute_late_warn_uninitialized): Mark backedges. + +2022-10-03 Sergei Trofimovich + + Backported from master: + 2022-10-03 Sergei Trofimovich + + PR target/107064 + * config/i386/t-i386: Add build-time dependencies against + i386-builtin-types.inc to i386-builtins.o, i386-expand.o, + i386-features.o. + +2022-09-29 H.J. Lu + + Backported from master: + 2022-09-28 H.J. Lu + + PR target/107061 + * config/i386/predicates.md (encodekey128_operation): Check + XMM4-XMM6 as clobbered. + (encodekey256_operation): Likewise. + * config/i386/sse.md (encodekey128u32): Clobber XMM4-XMM6. + (encodekey256u32): Likewise. + +2022-09-29 Tobias Burnus + + Backported from master: + 2022-09-26 Tobias Burnus + + PR middle-end/106982 + * omp-low.cc (lower_oacc_reductions): Add some unshare_expr. + +2022-09-28 Kyrylo Tkachov + + Backported from master: + 2022-09-23 Kyrylo Tkachov + + * config/aarch64/aarch64-cores.def (neoverse-v2): New entry. + (demeter): Update tunings to neoversev2. + * config/aarch64/aarch64-tune.md: Regenerate. + * config/aarch64/aarch64.cc (demeter_addrcost_table): Rename to + neoversev2_addrcost_table. + (demeter_regmove_cost): Rename to neoversev2_addrcost_table. + (demeter_advsimd_vector_cost): Rename to neoversev2_advsimd_vector_cost. + (demeter_sve_vector_cost): Rename to neoversev2_sve_vector_cost. + (demeter_scalar_issue_info): Rename to neoversev2_scalar_issue_info. + (demeter_advsimd_issue_info): Rename to neoversev2_advsimd_issue_info. + (demeter_sve_issue_info): Rename to neoversev2_sve_issue_info. + (demeter_vec_issue_info): Rename to neoversev2_vec_issue_info. + Update references to above. + (demeter_vector_cost): Rename to neoversev2_vector_cost. + (demeter_tunings): Rename to neoversev2_tunings. + (aarch64_vec_op_count::rename_cycles_per_iter): Use + neoversev2_sve_issue_info instead of demeter_sve_issue_info. + * doc/invoke.texi (AArch64 Options): Document neoverse-v2. + +2022-09-21 Richard Sandiford + + Backported from master: + 2022-09-20 Richard Sandiford + + PR target/106491 + * config/aarch64/aarch64-sve-builtins.cc (scalar_types) + (acle_vector_types, acle_svpattern, acle_svprfop): Add GTY + markup to (new) extern declarations instead of to the main + definition. + +2022-09-21 Kewen Lin + + Backported from master: + 2022-09-13 Kewen Lin + + PR target/104482 + * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Fix + the equality check for argument number, and move this hunk ahead. + +2022-09-21 Kewen.Lin + + Backported from master: + 2022-09-13 Kewen.Lin + + PR target/105485 + * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Add + the handling for unresolved overloaded builtin function. + (rs6000_expand_builtin): Likewise. + +2022-09-09 Richard Biener + + Backported from master: + 2022-09-07 Richard Biener + + PR tree-optimization/106860 + * tree-ssa-loop-split.cc (split_loop): Find the exit to + latch edge from the loop exit edge instead of from the + latch. Verify we're going to find it. + +2022-09-09 Richard Biener + + Backported from master: + 2022-09-06 Richard Biener + + PR tree-optimization/106841 + * tree-vect-slp.cc (vect_detect_hybrid_slp): Also process + scatter/gather offset. + +2022-09-09 Richard Biener + + Backported from master: + 2022-09-02 Richard Biener + + PR tree-optimization/106809 + * tree-ssa-sccvn.cc (dominaged_by_p_w_unex): Check we have + more than one successor before doing extra work. + +2022-09-08 Sebastian Huber + + * config/rs6000/rtems.h (CPP_OS_DEFAULT_SPEC): Define __PPC_VRSAVE__ if + -mvrsave is present. + * config/rs6000/t-rtems: Add -mvrsave multilib variants for + -mcpu=e6500. + +2022-09-03 Peter Bergner + + Backported from master: + 2022-09-01 Peter Bergner + + PR target/101322 + * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): + Enforce the use of a valid MMA pointer type. + +2022-09-02 Richard Earnshaw + + Backported from master: + 2022-08-03 Richard Earnshaw + + PR rtl-optimization/106187 + * alias.h (mems_same_for_tbaa_p): Declare. + * alias.cc (mems_same_for_tbaa_p): New function. + * dse.cc (record_store): Use it instead of open-coding + alias check. + * cselib.h (cselib_redundant_set_p): Declare. + * cselib.cc: Include alias.h + (cselib_redundant_set_p): New function. + * cfgcleanup.cc: (mark_effect): Use cselib_redundant_set_p instead + of rtx_equal_for_cselib_p. + * postreload.cc (reload_cse_simplify): Use cselib_redundant_set_p. + (reload_cse_noop_set_p): Delete. + +2022-09-02 Richard Earnshaw + + Backported from master: + 2022-05-13 Richard Earnshaw + + PR target/105463 + * config/arm/mve.md (*movmisalign_mve_store): Use + mve_memory_operand. + (*movmisalign_mve_load): Likewise. + * config/arm/vec-common.md (movmisalign): Convert to generator + form... + (@movmisalign): ... thus. Use generic predicates and then + rework operands if they are not valid. For MVE rework to a + narrower element size if the alignment is not high enough. + +2022-09-02 Tamar Christina + + Backported from master: + 2022-09-01 Tamar Christina + + PR other/106782 + * config/aarch64/aarch64.cc + (aarch64_vector_costs::prefer_unrolled_loop): Replace %u with + HOST_WIDE_INT_PRINT_UNSIGNED. + +2022-09-01 Jakub Jelinek + + Backported from master: + 2022-09-01 Jakub Jelinek + + PR other/106782 + * tree-vect-slp.cc (vect_print_slp_tree): Use + HOST_WIDE_INT_PRINT_UNSIGNED instead of %u. + * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Use + HOST_WIDE_INT_PRINT_UNSIGNED instead of %d. + * tree-vect-slp-patterns.cc (vect_pattern_validate_optab): Use %G + instead of %T and STMT_VINFO_STMT (SLP_TREE_REPRESENTATIVE (node)) + instead of SLP_TREE_DEF_TYPE (node). + +2022-08-30 Tamar Christina + + Backported from master: + 2022-08-12 Tamar Christina + + PR target/106524 + * config/aarch64/aarch64-sve.md (*fcmuo_nor_combine, + *fcmuo_bic_combine): Don't accept comparisons against zero. + +2022-08-29 Peter Bergner + + Backported from master: + 2022-08-28 Peter Bergner + + PR target/106017 + * config/rs6000/rs6000.cc (rs6000_invalid_conversion): Remove handling + of MMA pointer conversions. + +2022-08-29 H.J. Lu + + Backported from master: + 2022-08-23 H.J. Lu + + PR target/106714 + * config/i386/amxtileintrin.h (_tile_loadd_internal): Cast to + __PTRDIFF_TYPE__. + (_tile_stream_loadd_internal): Likewise. + (_tile_stored_internal): Likewise. + +2022-08-29 Jakub Jelinek + + Backported from master: + 2022-08-24 Jakub Jelinek + + PR target/106721 + * config/i386/sse.md (i128vldq): Add V16HF entry. + (avx512er_vmrcp28): Fix typo, + mask_opernad3 -> mask_operand3. + +2022-08-29 Jakub Jelinek + + Backported from master: + 2022-08-15 Jakub Jelinek + + PR rtl-optimization/106590 + * ifcvt.cc (check_for_cc_cmp_clobbers): New function. + (noce_convert_multiple_sets_1): If SEQ sets or clobbers any regs + mentioned in cc_cmp or rev_cc_cmp, don't consider seq2 for any + further conditional moves. + +2022-08-26 liuhongt + + PR target/106704 + * config/i386/i386-builtin.def (BDESC): Add + CODE_FOR_avx_blendvpd256/CODE_FOR_avx_blendvps256 to + corresponding builtins. + * config/i386/i386.cc (ix86_gimple_fold_builtin): + Don't fold IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_BLENDVPS256, + IX86_BUILTIN_BLENDVPD256 w/o TARGET_AVX2. + +2022-08-25 Chenghua Xu + + Backported from master: + 2022-08-25 Chenghua Xu + + PR target/106459 + * config/loongarch/loongarch.cc (loongarch_build_integer): + Use HOST_WIDE_INT. + * config/loongarch/loongarch.h (IMM_REACH): Likewise. + (HWIT_1U): New Defined. + (LU12I_OPERAND): Use HOST_WIDE_INT. + (LU32I_OPERAND): Likewise. + (LU52I_OPERAND): Likewise. + (HWIT_UC_0xFFF): Likwise. + +2022-08-24 Kewen Lin + + Backported from master: + 2022-08-16 Kewen Lin + + PR tree-optimization/106322 + * tree-vect-stmts.cc (vectorizable_call): Don't allow + vect_emulated_vector_p type for both vectype_in and vectype_out. + +2022-08-24 Kewen.Lin + + Backported from master: + 2022-08-16 Kewen.Lin + + PR target/103353 + * config/rs6000/mma.md (define_expand movoo): Move TARGET_MMA condition + check to preparation statements and add handlings for !TARGET_MMA. + (define_expand movxo): Likewise. + +2022-08-23 Tobias Burnus + + Backported from master: + 2022-08-19 Tobias Burnus + + * config/gcn/mkoffload.cc (main): Add dbgobj to files_to_cleanup. + +2022-08-23 Tobias Burnus + + Backported from master: + 2022-08-17 Tobias Burnus + + PR middle-end/106548 + * omp-low.cc (lower_rec_input_clauses): Use build_outer_var_ref + for 'simd' linear-step values that are variable. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-17 Ilya Leoshkevich + + Backported from master: + 2022-08-04 Ilya Leoshkevich + + * config/s390/vector.md (V_HW_FT): New iterator. + * config/s390/vx-builtins.md (vsel): Use V_HW_FT instead + of V_HW. + +2022-08-12 Peter Bergner + + Backported from master: + 2022-07-26 Peter Bergner + + PR c/106016 + * expr.cc (count_type_elements): Handle OPAQUE_TYPE. + +2022-08-11 Andre Simoes Dias Vieira + + Backported from master: + 2022-07-25 Andre Vieira + + * config/aarch64/aarch64.md (rbit2): Rename this ... + (@aarch64_rbit): ... to this and change it in... + (ffs2,ctz2): ... here. + (@aarch64_rev16): New. + * config/aarch64/aarch64-builtins.cc: (aarch64_builtins): + Define the following enum AARCH64_REV16, AARCH64_REV16L, + AARCH64_REV16LL, AARCH64_RBIT, AARCH64_RBITL, AARCH64_RBITLL. + (aarch64_init_data_intrinsics): New. + (aarch64_general_init_builtins): Add call to + aarch64_init_data_intrinsics. + (aarch64_expand_builtin_data_intrinsic): New. + (aarch64_general_expand_builtin): Add call to + aarch64_expand_builtin_data_intrinsic. + * config/aarch64/arm_acle.h (__clz, __clzl, __clzll, __cls, __clsl, + __clsll, __rbit, __rbitl, __rbitll, __rev, __revl, __revll, __rev16, + __rev16l, __rev16ll, __ror, __rorl, __rorll, __revsh): New. + +2022-08-10 Tobias Burnus + + Backported from master: + 2022-08-09 Tobias Burnus + + PR middle-end/106492 + * omp-low.cc (lower_rec_input_clauses): Add missing folding + to data type of linear-clause list item. + +2022-08-10 Richard Biener + + Backported from master: + 2022-08-10 Richard Biener + + PR tree-optimization/106513 + * gimple-ssa-store-merging.cc (do_shift_rotate): Use uint64_t + for head_marker. + +2022-08-10 Richard Biener + + Backported from master: + 2022-08-08 Richard Biener + + PR lto/106540 + PR lto/106334 + * lto-streamer-in.cc (lto_read_tree_1): Use lto_input_tree_1 + to input DECL_INITIAL, avoiding to commit drefs. + +2022-08-05 Michael Meissner + + * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove code + setting -mblock-ops-vector-pair. Back port patch from trunk on 8/3. + +2022-08-02 Peter Bergner + + Backported from master: + 2022-07-25 Peter Bergner + Kewen Lin + + PR testsuite/106345 + * config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Adjust -mdejagnu-cpu + to filter out all -mtune options. + +2022-08-02 Kewen Lin + + Backported from master: + 2022-07-26 Kewen Lin + + PR target/106091 + * config/rs6000/rs6000-p8swap.cc (replace_swapped_aligned_store): Copy + REG_EH_REGION when replacing one store insn having it. + (replace_swapped_aligned_load): Likewise. + +2022-07-30 Jakub Jelinek + + Backported from master: + 2022-07-29 Jakub Jelinek + + PR middle-end/106449 + * omp-expand.cc (expand_omp_simd): Fix up handling of pointer + iterators in non-rectangular simd loops. Unshare fd->loops[i].n2 + or n2 before regimplifying it inside of a condition. + +2022-07-30 Jakub Jelinek + + Backported from master: + 2022-07-27 Jakub Jelinek + + PR debug/106261 + * cgraphunit.cc (cgraph_node::assemble_thunks_and_aliases): Don't + output asm thunks for -dx. + +2022-07-30 Jakub Jelinek + + Backported from master: + 2022-07-01 Jakub Jelinek + + PR middle-end/106144 + * wide-int.cc (wi::shifted_mask): If end >= prec, return right after + emitting element for shift or if shift is 0 first element after start. + (wide_int_cc_tests): Add tests for equivalency of wi::mask and + wi::shifted_mask with 0 start. + +2022-07-27 David Malcolm + + * json.cc (string::print): Fix escaping of '\'. + +2022-07-27 David Malcolm + + * doc/invoke.texi (-fdump-analyzer-feasibility): Mention the + fpath.txt output. + +2022-07-27 Maciej W. Rozycki + + Backported from master: + 2022-07-27 Maciej W. Rozycki + + * config/riscv/riscv.md (stack_protect_set_): Remove + duplicate backslashes. + +2022-07-27 Richard Biener + + Backported from master: + 2022-07-26 Richard Biener + + PR tree-optimization/106189 + * gimple-array-bounds.cc (array_bounds_checker::check_mem_ref): + Divide using offset_ints. + +2022-07-27 Joseph Myers + + Backported from master: + 2022-06-30 Joseph Myers + + PR lto/106129 + * lto-wrapper.cc (find_option): Add argument start. + (merge_and_complain): Loop over existing_opt_index and + existing_opt2_index for Xassembler check. Update calls to + find_option. + (find_and_merge_options): Add argument first to determine whether + to merge options with those passed in *opts. + (run_gcc): Update calls to find_and_merge_options. + +2022-07-27 Andrew Pinski + + Backported from master: + 2022-07-09 Andrew Pinski + + PR tree-optimization/106087 + * tree-ssa-dce.cc (simple_dce_from_worklist): Check + to make sure the statement is only defining one operand. + +2022-07-27 Tamar Christina + + Backported from master: + 2022-07-08 Tamar Christina + + PR tree-optimization/106063 + * match.pd: Do not apply pattern after veclower is not supported. + +2022-07-27 Alexandre Oliva + + Backported from master: + 2022-06-03 Alexandre Oliva + + PR tree-optimization/105665 + PR tree-optimization/100810 + * tree-ssa-loop-ivopts.cc + (ssa_name_maybe_undef_p, ssa_name_set_maybe_undef): New. + (ssa_name_any_use_dominates_bb_p, mark_ssa_maybe_undefs): New. + (find_ssa_undef): Check precomputed flag and intervening uses. + (tree_ssa_iv_optimize): Call mark_ssa_maybe_undefs. + +2022-07-25 Sebastian Huber + + Backported from master: + 2022-07-25 Sebastian Huber + + * config/rs6000/rtems.h (CPLUSPLUS_CPP_SPEC): Undef. + +2022-07-19 Richard Biener + + Backported from master: + 2022-07-19 Richard Biener + + PR middle-end/106331 + * builtins.cc (get_memory_rtx): Compute alignment from + the original address and set MEM_OFFSET to unknown when + we create a MEM_EXPR from the base object of the address. + +2022-07-19 Richard Biener + + Backported from master: + 2022-07-01 Richard Biener + + PR tree-optimization/106131 + * tree-ssa-sccvn.cc (vn_reference_lookup_3): Force alias-set + zero when offsetting the read looking through an aggregate + copy. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-29 Richard Biener + + PR tree-optimization/106112 + * tree-ssa-sccvn.cc (valueized_wider_op): Properly extend + a constant operand according to its type. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-20 Richard Biener + + PR middle-end/106027 + * fold-const.cc (fold_to_nonsharp_ineq_using_bound): Use the + type of the prevailing comparison for the new comparison type. + (fold_binary_loc): Use proper types for the A < X && A + 1 > Y + to A < X && A >= Y folding. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-15 Richard Biener + + PR tree-optimization/105971 + * tree-ssa-alias.cc (refs_may_alias_p_2): Put bail-out for + FUNCTION_DECL and LABEL_DECL refs after decl-decl disambiguation + to leak less surprising alias results. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-15 Richard Biener + + PR tree-optimization/105969 + * gimple-ssa-sprintf.cc (get_origin_and_offset_r): Avoid division + by zero in overflow check. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-14 Richard Biener + + PR middle-end/105965 + * match.pd (view_convert CONSTRUCTOR): Handle single-element + CTOR case. + +2022-07-19 Richard Biener + + Backported from master: + 2022-06-14 Richard Biener + + PR tree-optimization/105946 + * tree-ssa-uninit.cc (maybe_warn_pass_by_reference): + Do not look at arguments not specified in the function call. + +2022-07-19 Richard Biener + + Backported from master: + 2022-07-11 Richard Biener + + PR target/105459 + * config/i386/i386-options.cc (ix86_set_current_function): + Rebuild the target optimization node whenever necessary, + not only when the optimization node didn't change. + +2022-07-14 Michael Meissner + + * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do + not generate block copies with vector pair instructions if we are + tuning for power10. Back port from master branch. + +2022-07-14 Surya Kumari Jangala + + Backported from master: + 2022-06-14 Surya Kumari Jangala + + PR rtl-optimization/105041 + * regrename.cc (check_new_reg_p): Use nregs value from du chain. + +2022-07-11 Martin Jambor + + Backported from master: + 2022-07-04 Martin Jambor + + PR tree-optimization/105860 + * tree-sra.cc (build_reconstructed_reference): Start expr + traversal only just below the outermost union. + +2022-07-10 Xi Ruoyao + + Backported from master: + 2022-07-10 Xi Ruoyao + + * config/loongarch/loongarch.md (mulsidi3_64bit): Use mulw.d.w + instead of mul.d. + +2022-07-09 Roger Sayle + Uroš Bizjak + + PR target/105930 + * config/i386/i386.md (*di3_doubleword): Split after + reload. Use rtx_equal_p to avoid creating memory-to-memory moves, + and emit NOTE_INSN_DELETED if operand[2] is zero (i.e. with -O0). + +2022-07-08 Lulu Cheng + + Backported from master: + 2022-07-08 Lulu Cheng + + * config/loongarch/loongarch.cc (loongarch_compute_frame_info): + Modify fp_sp_offset and gp_sp_offset's calculation method, + when frame->mask or frame->fmask is zero, don't minus UNITS_PER_WORD + or UNITS_PER_FP_REG. + +2022-07-04 Andrew MacLeod + + PR tree-optimization/106114 + * gimple-range-fold.cc (fold_using_range::relation_fold_and_or): Check + statement operands instead of GORI cache. + +2022-07-04 Roger Sayle + Marek Polacek + Segher Boessenkool + Kewen Lin + + PR target/105991 + * config/rs6000/rs6000.md (rotl3_insert_3): Check that + exact_log2 doesn't return -1 (or zero). + (plus_xor): New code iterator. + (*rotl3_insert_3_): New define_insn_and_split. + +2022-07-04 Xi Ruoyao + + Backported from master: + 2022-07-03 Xi Ruoyao + Lulu Cheng + + * config/loongarch/loongarch.cc (loongarch_check_zero_div_p): + New static function. + (loongarch_idiv_insns): Use loongarch_check_zero_div_p instead + of TARGET_CHECK_ZERO_DIV. + (loongarch_output_division): Likewise. + * common/config/loongarch/loongarch-common.cc + (TARGET_DEFAULT_TARGET_FLAGS): Remove unneeded hook. + * doc/invoke.texi: Update to match the new behavior. + +2022-07-03 Roger Sayle + + PR target/106122 + * config/i386/i386.md (peephole2): Avoid generating pop %esp + when optimizing for size. + +2022-07-02 Sergei Trofimovich + + Backported from master: + 2022-06-29 Sergei Trofimovich + + PR c++/106102 + * system.h: Introduce INCLUDE_PTHREAD_H macros to include . + +2022-07-01 Vladimir Makarov + + Backported from master: + 2022-05-28 Vladimir Makarov + + PR target/103722 + * config/sh/sh.cc (sh_register_move_cost): Avoid cost "2" (which + is special) for various scenarios. + +2022-06-29 Richard Biener + + Backported from master: + 2022-05-11 Richard Biener + + PR bootstrap/105551 + * opts.cc (finish_options): Also disable var-tracking if + !DWARF2_DEBUGGING_INFO. + +2022-06-29 Lulu Cheng + + Backported from master: + 2022-06-29 Lulu Cheng + + PR target/106097 + * config/loongarch/loongarch.cc (loongarch_build_integer): + Remove undefined behavior from code. + +2022-06-28 Jakub Jelinek + + Backported from master: + 2022-06-21 Jakub Jelinek + + PR rtl-optimization/106032 + * ifcvt.cc (noce_try_sign_mask): Punt if !t_unconditional, and + t may_trap_or_fault_p, even if it is cheap. + +2022-06-28 Jakub Jelinek + + Backported from master: + 2022-06-21 Jakub Jelinek + + PR middle-end/106030 + * expr.cc (expand_cond_expr_using_cmove): Pass NULL_RTX instead of + temp to expand_operands if mode has been promoted. + +2022-06-28 Xi Ruoyao + + Backported from master: + 2022-06-28 Xi Ruoyao + + PR target/106096 + * config/loongarch/loongarch.h (REG_CLASS_CONTENTS): Exclude + $r13 from SIBCALL_REGS. + * config/loongarch/loongarch.cc (loongarch_regno_to_class): + Change $r13 to JIRL_REGS. + +2022-06-24 Iain Buclaw + + Backported from master: + 2022-06-24 Iain Buclaw + + * config/tilepro/gen-mul-tables.cc (tilegx_emit): Adjust loop + condition to avoid overflow. + +2022-06-23 Martin Liska + + Backported from master: + 2022-06-23 Martin Liska + + PR ipa/105600 + * ipa-icf.cc (sem_item_optimizer::filter_removed_items): + Skip variables with body_removed. + +2022-06-23 Siddhesh Poyarekar + + Backported from master: + 2022-06-21 Siddhesh Poyarekar + + PR tree-optimization/105736 + * tree-object-size.cc (addr_object_size): Return size_unknown + when object offset computation returns an error. + +2022-06-23 Richard Sandiford + + Backported from master: + 2022-06-15 Richard Sandiford + + PR tree-optimization/105254 + PR tree-optimization/105940 + Revert: + * config/aarch64/aarch64.cc + (aarch64_vector_costs::determine_suggested_unroll_factor): Take a + loop_vec_info as argument. Restrict the unroll factor to values + that divide the VF. + (aarch64_vector_costs::finish_cost): Update call accordingly. + +2022-06-23 Kewen Lin + + Backported from master: + 2022-06-14 Kewen Lin + + PR tree-optimization/105940 + * tree-vect-loop.cc (vect_analyze_loop_2): Move the place of + applying suggested_unroll_factor after start_over. + +2022-06-21 H.J. Lu + + Backported from master: + 2022-06-20 H.J. Lu + + PR target/105960 + * config/i386/i386.cc (ix86_function_ok_for_sibcall): Return + false if PIC register is used when calling ifunc functions. + +2022-06-20 Uros Bizjak + + Backported from master: + 2022-06-17 Uroš Bizjak + + PR target/105209 + * config/alpha/alpha-protos.h (alpha_store_data_bypass_p): New. + * config/alpha/alpha.cc (alpha_store_data_bypass_p): New function. + (alpha_store_data_bypass_p_1): Ditto. + * config/alpha/ev4.md: Use alpha_store_data_bypass_p instead + of generic store_data_bypass_p. + (ev4_ist_c): Remove insn reservation. + +2022-06-20 Uros Bizjak + + Backported from master: + 2022-06-17 Uroš Bizjak + + PR target/105970 + * config/i386/i386.cc (ix86_function_arg): Assert that + the mode of pointer argumet is equal to ptr_mode, not Pmode. + +2022-06-19 Jakub Jelinek + + Backported from master: + 2022-06-18 Jakub Jelinek + + PR middle-end/105998 + * varasm.cc (narrowing_initializer_constant_valid_p): Check + SCALAR_INT_MODE_P instead of INTEGRAL_MODE_P, also break on + ! INTEGRAL_TYPE_P and do the same check also on op{0,1}'s type. + +2022-06-19 Jakub Jelinek + + Backported from master: + 2022-06-16 Jakub Jelinek + + PR middle-end/105951 + * tree-ssa-ccp.cc (optimize_atomic_bit_test_and, + optimize_atomic_op_fetch_cmp_0): Remember gimple_call_fn (call) + as last argument to the internal functions. + * builtins.cc (expand_ifn_atomic_bit_test_and): Adjust for the + extra call argument to ifns. If expand_atomic_fetch_op fails for the + lhs == NULL_TREE case, fall through into the optab code with + gen_reg_rtx (mode) as target. If second expand_atomic_fetch_op + fails, construct a CALL_EXPR and expand that. + (expand_ifn_atomic_op_fetch_cmp_0): Adjust for the extra call argument + to ifns. If expand_atomic_fetch_op fails, construct a CALL_EXPR and + expand that. + +2022-06-19 Jan Hubicka + + Backported from master: + 2022-06-14 Jan Hubicka + + PR ipa/105739 + * ipa-prop.cc (ipa_load_from_parm_agg): Punt on volatile loads. + +2022-06-16 Richard Earnshaw + + Backported from master: + 2022-06-15 Richard Earnshaw + + PR target/105981 + * config/arm/arm.cc (gen_cpymem_ldrd_strd): Rename low_reg and hi_reg + to first_reg and second_reg respectively. Initialize them correctly + when generating big-endian code. + +2022-06-15 Simon Wright + + Backported from master: + 2022-06-12 Simon Wright + + PR target/104871 + * config/darwin-driver.cc (darwin_find_version_from_kernel): If the OS + version is darwin20 (macOS 11) or greater, truncate the version to the + major number. + +2022-06-15 Mark Mentovai + + Backported from master: + 2022-06-12 Mark Mentovai + + * config/darwin-c.cc: Make -mmacosx-version-min more future-proof. + +2022-06-15 Iain Sandoe + + Backported from master: + 2022-05-29 Iain Sandoe + + PR target/105599 + * config/darwin.h: Move versions-specific handling of multiply_defined + from SUBTARGET_DRIVER_SELF_SPECS to LINK_SPEC. + +2022-06-15 liuhongt + + PR target/105953 + * config/i386/sse.md (*avx_cmp3_ltint_not): Force_reg + operands[3]. + +2022-06-14 H.J. Lu + + Backported from master: + 2022-06-13 H.J. Lu + + * common/config/i386/cpuinfo.h (get_available_features): Require + AVX for F16C and VAES. + +2022-06-14 Philipp Tomsich + + Backported from master: + 2022-06-02 Philipp Tomsich + + * config/riscv/riscv.cc (riscv_build_integer_1): Rewrite value as + (-1 << 31) for the single-bit case, when operating on (1 << 31) + in SImode. + * config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): Allow for + any single-bit value, moving the special case for (1 << 31) to + riscv_build_integer_1 (in riscv.c). + +2022-06-08 Max Filippov + + Backported from master: + 2022-06-08 Max Filippov + + PR target/105879 + * config/xtensa/xtensa.md (movdi): Rename 'first' and 'second' + to 'lowpart' and 'highpart' so that they match 'gen_lowpart' and + 'gen_highpart' bitwise semantics and fix order of highpart and + lowpart depending on target endianness. + +2022-06-08 liuhongt + + PR target/105854 + * config/i386/sse.md (ssse3_palignrdi): Change alternative 2 + from Yv to Yw. + +2022-06-02 Philipp Tomsich + + Backported from master: + 2022-05-13 Philipp Tomsich + Manolis Tsamis + + * config/riscv/riscv.h (CLZ_DEFINED_VALUE_AT_ZERO): Implement. + (CTZ_DEFINED_VALUE_AT_ZERO): Same. + * doc/sourcebuild.texi: add documentation for RISC-V specific + test target keywords + +2022-06-02 Richard Biener + + Backported from master: + 2022-06-01 Richard Biener + + PR tree-optimization/105786 + * tree-loop-distribution.cc + (loop_distribution::transform_reduction_loop): Only do strlen + replacement for integer type reductions. + +2022-06-02 Richard Biener + + Backported from master: + 2022-05-27 Richard Biener + + PR tree-optimization/105726 + * gimple-ssa-warn-restrict.cc (builtin_memref::set_base_and_offset): + Constrain array-of-flexarray case more. + +2022-06-02 Richard Biener + + Backported from master: + 2022-05-24 Richard Biener + + PR middle-end/105711 + * expmed.cc (extract_bit_field_as_subreg): Add op0_mode parameter + and use it. + (extract_bit_field_1): Pass down the mode of op0 to + extract_bit_field_as_subreg. + +2022-06-02 Martin Sebor + + Backported from master: + 2022-05-24 Martin Sebor + Richard Biener + + PR middle-end/105604 + * gimple-ssa-sprintf.cc (set_aggregate_size_and_offset): Add comments. + (get_origin_and_offset_r): Remove null handling. Handle variable array + sizes. + (get_origin_and_offset): Handle null argument here. Simplify. + (alias_offset): Update comment. + * pointer-query.cc (field_at_offset): Update comment. Handle members + of variable-length types. + +2022-06-02 Vineet Gupta + + Backported from master: + 2022-05-24 Vineet Gupta + + * config/riscv/riscv.cc: (struct riscv_tune_param): Add + fmv_cost. + (rocket_tune_info): Add default fmv_cost 8. + (sifive_7_tune_info): Ditto. + (thead_c906_tune_info): Ditto. + (optimize_size_tune_info): Ditto. + (riscv_register_move_cost): Use fmv_cost for int<->fp moves. + +2022-05-30 Martin Jambor + + Backported from master: + 2022-05-27 Martin Jambor + + PR ipa/105639 + * ipa-prop.cc (propagate_controlled_uses): Check type of the + constant before adding a LOAD reference. + +2022-05-30 Jakub Jelinek + + Backported from master: + 2022-05-27 Jakub Jelinek + + PR sanitizer/105729 + * fold-const.cc (fold_unary_loc): Don't optimize (X &) ((Y *) z + w) + to (X &) z + w if -fsanitize=null during GENERIC folding. + +2022-05-30 Jakub Jelinek + + Backported from master: + 2022-05-25 Jakub Jelinek + + PR sanitizer/105714 + * asan.cc (has_stmt_been_instrumented_p): For assignments which + are both stores and loads, return true only if both destination + and source have been instrumented. + +2022-05-30 Jakub Jelinek + + Backported from master: + 2022-05-19 Jakub Jelinek + + PR c/105635 + * pointer-query.cc (gimple_parm_array_size): Return NULL if var + doesn't have pointer or reference type. + +2022-05-26 Simon Cook + + Backported from master: + 2022-05-25 Simon Cook + + * config/riscv/arch-canonicalize: Only add mafd extension if + base was rv32/rv64g. + +2022-05-26 Kito Cheng + + Backported from master: + 2022-05-09 Kito Cheng + + * config/riscv/arch-canonicalize: Handle g correctly. + +2022-05-24 Qing Zhao + + Backported from master: + 2022-05-09 Qing Zhao + + PR target/101891 + * config/i386/i386.cc (zero_call_used_regno_mode): use V2SImode + as a generic MMX mode instead of V4HImode. + (zero_all_mm_registers): Use SET to zero instead of MOV for + zeroing scratch registers. + (ix86_zero_call_used_regs): Likewise. + +2022-05-24 Bruno Haible + + Backported from master: + 2022-05-24 Bruno Haible + + PR other/105527 + * doc/install.texi (Configuration): Add more details about --with-zstd. + Document --with-zstd-include and --with-zstd-lib + +2022-05-24 Martin Liska + + Backported from master: + 2022-05-11 Martin Liska + + PR other/105527 + * doc/install.texi: Document the configure option --with-zstd. + +2022-05-20 Peter Bergner + + Backported from master: + 2022-05-18 Peter Bergner + Segher Boessenkool + + PR target/105556 + * config/rs6000/mma.md (mma_, mma_, mma_, mma_, + mma_, mma_, mma_, mma_, + mma_, mma_, mma_, mma_, + mma_, mma_): Replace "wa" constraints with "v,?wa". + Update other operands accordingly. + +2022-05-20 Richard Biener + + Backported from master: + 2022-05-04 Richard Biener + + PR tree-optimization/103116 + * tree-vect-stmts.cc (get_group_load_store_type): Handle the + case we need peeling for gaps even though GROUP_GAP is zero. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-17 Richard Biener + + PR tree-optimization/105618 + * tree-ssa-sink.cc (statement_sink_location): For virtual + PHI uses ignore those defining the used virtual operand. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-12 Richard Biener + + PR rtl-optimization/105577 + * dse.cc (rest_of_handle_dse): Make sure to purge dead EH + edges before running fast DCE via df_analyze. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-12 Richard Biener + + PR tree-optimization/105562 + * tree-ssa-sccvn.cc (vn_reference_lookup_3): Disambiguate + against all CLOBBER defs if there's not an obvious must-alias + and we are not doing redundant store elimination. + (vn_walk_cb_data::redundant_store_removal_p): New field. + (vn_reference_lookup_pieces): Initialize it. + (vn_reference_lookup): Add argument to specify if we are + doing redundant store removal. + (eliminate_dom_walker::eliminate_stmt): Specify we do. + * tree-ssa-sccvn.h (vn_reference_lookup): Adjust. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-11 Richard Biener + + PR rtl-optimization/105559 + * cfgrtl.cc (delete_insn_and_edges): Only perform search to BB_END + for non-debug insns. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-10 Richard Biener + + PR middle-end/105537 + * toplev.cc (process_options): Move flag_var_tracking + handling ... + * opts.cc (finish_options): ... here. + +2022-05-19 Richard Biener + + Backported from master: + 2022-05-10 Richard Biener + + * flags.h (dwarf_debuginfo_p): Add opts argument, guard + API with !GENERATOR_FILE. + * opts.cc (global_options): Poison. + (global_options_set): Likewise. + (finish_options): Refer to options via opts. + +2022-05-19 Richard Biener + + Backported from master: + 2022-04-29 Richard Biener + + PR tree-optimization/105431 + * tree-ssa-math-opts.cc (powi_as_mults_1): Make n unsigned. + (powi_as_mults): Use absu_hwi. + (gimple_expand_builtin_powi): Remove now pointless n != -n + check. + +2022-05-18 Andrew MacLeod + + PR tree-optimization/105458 + * value-relation.cc (path_oracle::register_relation): Merge, then check + for equivalence. + +2022-05-16 Sebastian Pop + + PR target/105162 + * config/aarch64/aarch64-protos.h (atomic_ool_names): Increase dimension + of str array. + * config/aarch64/aarch64.cc (aarch64_atomic_ool_func): Call + memmodel_from_int and handle MEMMODEL_SYNC_*. + (DEF0): Add __aarch64_*_sync functions. + +2022-05-16 Eric Botcazou + + * dwarf2out.cc (loc_list_from_tree_1) : Do a logical + instead of a bitwise negation. + : Swap the operands if the condition is TRUTH_NOT_EXPR. + +2022-05-13 Eric Botcazou + + * tree-sra.cc (sra_modify_assign): Check that scalar storage order + is the same on the LHS and RHS before rewriting one with the model + of the other. + +2022-05-13 Alexandre Oliva + + Backported from master: + 2022-05-13 Alexandre Oliva + + PR rtl-optimization/105455 + * gimple-harden-conditionals.cc (insert_check_and_trap): Set + probabilities for newly-conditional edges. + +2022-05-11 Martin Jambor + + Backported from master: + 2022-04-29 Martin Jambor + + PR ipa/100413 + * cgraph.cc (cgraph_node::remove): Release body of the node this + is clone_of if appropriate. + +2022-05-10 Jakub Jelinek + + Backported from master: + 2022-05-10 Jakub Jelinek + + PR tree-optimization/105528 + * gimple-isel.cc (gimple_expand_vec_set_expr): After gsi_remove + set *gsi to gsi_for_stmt (ass_stmt). Fix up function comment. + +2022-05-10 Eric Botcazou + + PR target/105292 + * config/sparc/sparc.cc (sparc_vectorize_vec_perm_const): Return + true only for 8-byte vector modes. + +2022-05-06 Michael Meissner + + Backported from master: + 2022-05-06 Michael Meissner + + PR target/102059 + * config/rs6000/rs6000.cc (rs6000_can_inline_p): Ignore -mpower8-fusion + and -mpower10-fusion options for inlining purposes. + +2022-05-06 Richard Biener + + Backported from master: + 2022-04-29 Richard Biener + + PR middle-end/105376 + * tree.cc (build_real): Special case dconst* arguments + for decimal floating point types. + +2022-05-06 Richard Biener + + Backported from master: + 2022-05-05 Richard Biener + + PR tree-optimization/105484 + * gimple-isel.cc (gimple_expand_vec_set_expr): Clean EH, return + whether the CFG changed. + (gimple_expand_vec_exprs): When the CFG changed, clean it up. + +2022-05-06 Richard Biener + + Backported from master: + 2022-05-03 Richard Biener + + PR middle-end/105461 + * opts.cc (finish_options): Match the condition to + disable flag_var_tracking to that of process_options. + +2022-05-06 Richard Biener + + Backported from master: + 2022-05-03 Richard Biener + + * opts.cc: #undef OPTIONS_SET_P. + (finish_options): Use opts_set instead of OPTIONS_SET_P. + +2022-05-06 Richard Biener + + Backported from master: + 2022-05-02 Richard Biener + + PR tree-optimization/105437 + * tree-vect-slp.cc (vect_schedule_slp_node): Handle the + case where last_stmt alters control flow. + +2022-05-06 Richard Biener + + Backported from master: + 2022-05-03 Richard Biener + + PR tree-optimization/105394 + * tree-vect-generic.cc (expand_vector_condition): Adjust + comp_width for non-integer mode masks as well. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + +2022-05-02 Jakub Jelinek + + Backported from master: + 2022-05-02 Jakub Jelinek + + * system.h: Include initializer_list. + +2022-04-28 Jakub Jelinek + + PR lto/105399 + * cgraph.cc (cgraph_node::verify_node): Don't verify + semantic_interposition flag against + opt_for_fn (decl, flag_semantic_interposition) for aliases in lto1. + +2022-04-28 Jakub Jelinek + + PR target/105331 + * config/i386/i386.cc (ix86_gimplify_va_arg): Mark va_arg_tmp + temporary TREE_ADDRESSABLE before trying to gimplify ADDR_EXPR + of it. + +2022-04-28 Jonathan Wakely + + * doc/install.texi (Configuration): Remove misleading text + around LE PowerPC Linux multilibs. + +2022-04-28 Rainer Orth + + PR d/103528 + * doc/install.texi (Tools/packages necessary for building GCC) + (GDC): Document libphobos requirement. + (Host/target specific installation notes for GCC, *-*-solaris2*): + Document libphobos and GDC specifics. + +2022-04-28 Richard Biener + + PR tree-optimization/105219 + * tree-vect-loop.cc (vect_transform_loop): Disable + special code narrowing the vectorized epilogue max + iterations when peeling for alignment or gaps was in effect. + +2022-04-28 Xi Ruoyao + + * config/loongarch/loongarch.cc + (loongarch_flatten_aggregate_field): Ignore empty fields for + RECORD_TYPE. + 2022-04-27 Lulu Cheng * config/loongarch/loongarch.md: Add fdiv define_expand template, diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 04ee20dc4e29b..629b78beae4ee 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20220428 +20250116 diff --git a/gcc/DEV-PHASE b/gcc/DEV-PHASE index 9839eb20815b5..e69de29bb2d1d 100644 --- a/gcc/DEV-PHASE +++ b/gcc/DEV-PHASE @@ -1 +0,0 @@ -experimental diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 3a7b8ed8f92d5..b0085cf918b05 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,138 @@ +2025-01-05 Estevan Castilho (Tevo) + + * libgnarl/s-taprop__dummy.adb: Remove use clause for + System.Parameters. + (Unlock): Remove Global_Lock formal parameter. + (Write_Lock): Likewise. + +2025-01-05 Eric Botcazou + + PR ada/118234 + * exp_aggr.adb (Convert_To_Assignments): In the case of a + component association, call Is_Container_Aggregate on the parent's + parent. + (Expand_Array_Aggregate): Likewise. + +2025-01-05 Eric Botcazou + + PR ada/118234 + * exp_aggr.adb (Convert_To_Assignments): Tweak comment. + (Expand_Array_Aggregate): Do not delay the expansion if the parent + node is a container aggregate. + +2025-01-05 Marc Poulhiès + + PR ada/118234 + * exp_aggr.adb (Convert_To_Assignments): Do not mark node for + delayed expansion if parent type has the Aggregate aspect. + * sem_util.adb (Is_Container_Aggregate): Move... + * sem_util.ads (Is_Container_Aggregate): ... here and make it + public. + +2024-12-12 Eric Botcazou + + PR ada/117996 + * libgnat/a-ngrear.adb (Jacobi): Remove default value for + Compute_Vectors formal parameter. + (Sort_Eigensystem): Add Compute_Vectors formal parameter. Do not + modify the Vectors if Compute_Vectors is False. + (Eigensystem): Pass True as Compute_Vectors to Sort_Eigensystem. + (Eigenvalues): Pass False as Compute_Vectors to Sort_Eigensystem. + +2024-11-26 Arsen Arsenović + + Backported from master: + 2024-08-19 Arsen Arsenović + + PR ada/115917 + * gnatvsn.ads: Add note about the duplication of this value in + version.c. + * version.c (VER_LEN_MAX): Define to the same value as + Gnatvsn.Ver_Len_Max. + (gnat_version_string): Use VER_LEN_MAX as bound. + +2024-11-04 Eric Botcazou + + * checks.adb (Selected_Length_Checks.Get_E_Length): For a + component of a record with discriminants and if the expression is + a selected component, try to build an actual subtype from its + prefix instead of from the discriminal. + +2024-10-14 Steve Baird + + PR ada/114593 + * sem_res.adb (Valid_Conversion): Test In_Instance instead of + In_Instance_Body. + +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-06-10 Eric Botcazou + + PR ada/114708 + * exp_util.adb (Finalize_Address): Add guard for incomplete types. + +2024-03-07 Eric Botcazou + + PR ada/113979 + * exp_ch4.adb (Expand_N_Allocator): In the subtype indication case, + remove call to Apply_Predicate_Check. + +2024-02-26 Eric Botcazou + + PR ada/113893 + * exp_ch7.adb (Build_Anonymous_Master): Do not build the master + for a local designated type. + * exp_util.adb (Build_Allocate_Deallocate_Proc): Force Needs_Fin + to false if no finalization master is attached to an access type + and assert that it is anonymous in this case. + * sem_res.adb (Resolve_Allocator): Mention that the object might + not be finalized at all in the warning given when the type is an + anonymous access-to-controlled type. + +2024-01-09 Steve Baird + + PR ada/104354 + * libgnat/s-rident.ads: Define a new restriction, + No_Task_Hierarchy_Implicit. This is like the No_Task_Hierarchy + restriction, but with the difference that setting this restriction + does not mean the H.6(6) post-compilation check is satisified. + * exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call): If it is + known that the function result cannot have tasks, then pass in a + null literal for the activation chain actual parameter. This + avoids generating a reference to an entity that + Build_Activation_Chain_Entity may have chosen not to generate a + declaration for. + * gnatbind.adb (List_Applicable_Restrictions): Do not list the + No_Task_Hierarchy_Implicit restriction. + * restrict.adb: Special treatment for the + No_Task_Hierarchy_Implicit restriction in functions + Get_Restriction_Id and Restriction_Active. The former is needed to + disallow the (unlikely) case that a user tries to explicitly + reference the No_Task_Hierarchy_Implicit restriction. + * sem_prag.adb (Analyze_Pragma): If a Sequential + Partition_Elaboration_Policy is specified (and the + No_Task_Hierarchy restriction is not already enabled), then enable + the No_Task_Hierarchy_Implicit restriction. + +2023-11-16 Eric Botcazou + + * gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a + TYPE_DECL for the return type built for the CI/CO mechanism. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-27 Sebastian Huber * tracebak.c: Add support for ARM RTEMS. Add support for RTEMS to PPC diff --git a/gcc/ada/checks.adb b/gcc/ada/checks.adb index e1a1b0cfec1b6..449aa6578ac93 100644 --- a/gcc/ada/checks.adb +++ b/gcc/ada/checks.adb @@ -9936,7 +9936,15 @@ package body Checks is if Ekind (Scope (E)) = E_Record_Type and then Has_Discriminants (Scope (E)) then - N := Build_Discriminal_Subtype_Of_Component (E); + -- If the expression is a selected component, in other words, + -- has a prefix, then build an actual subtype from the prefix. + -- Otherwise, build an actual subtype from the discriminal. + + if Nkind (Expr) = N_Selected_Component then + N := Build_Actual_Subtype_Of_Component (E, Expr); + else + N := Build_Discriminal_Subtype_Of_Component (E); + end if; if Present (N) then Insert_Action (Expr, N); diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb index e360baa6683af..479db647f3cce 100644 --- a/gcc/ada/exp_aggr.adb +++ b/gcc/ada/exp_aggr.adb @@ -4929,10 +4929,15 @@ package body Exp_Aggr is -- done top down from above. if - -- Internal aggregate (transformed when expanding the parent) + -- Internal aggregates (transformed when expanding the parent), + -- excluding container aggregates as these are transformed into + -- subprogram calls later. - Parent_Kind in - N_Aggregate | N_Extension_Aggregate | N_Component_Association + (Parent_Kind = N_Component_Association + and then not Is_Container_Aggregate (Parent (Parent_Node))) + + or else (Parent_Kind in N_Aggregate | N_Extension_Aggregate + and then not Is_Container_Aggregate (Parent_Node)) -- Allocator (see Convert_Aggr_In_Allocator) @@ -6785,7 +6790,8 @@ package body Exp_Aggr is -- STEP 3 -- Delay expansion for nested aggregates: it will be taken care of when - -- the parent aggregate is expanded. + -- the parent aggregate is expanded, excluding container aggregates as + -- these are transformed into subprogram calls later. Parent_Node := Parent (N); Parent_Kind := Nkind (Parent_Node); @@ -6795,9 +6801,10 @@ package body Exp_Aggr is Parent_Kind := Nkind (Parent_Node); end if; - if Parent_Kind = N_Aggregate - or else Parent_Kind = N_Extension_Aggregate - or else Parent_Kind = N_Component_Association + if (Parent_Kind = N_Component_Association + and then not Is_Container_Aggregate (Parent (Parent_Node))) + or else (Parent_Kind in N_Aggregate | N_Extension_Aggregate + and then not Is_Container_Aggregate (Parent_Node)) or else (Parent_Kind = N_Object_Declaration and then Needs_Finalization (Typ)) or else (Parent_Kind = N_Assignment_Statement diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb index 2506c67e9367b..6429c6e9d699c 100644 --- a/gcc/ada/exp_ch4.adb +++ b/gcc/ada/exp_ch4.adb @@ -4823,8 +4823,6 @@ package body Exp_Ch4 is if Is_Array_Type (Dtyp) and then not No_Initialization (N) then Apply_Constraint_Check (Expression (N), Dtyp, No_Sliding => True); - Apply_Predicate_Check (Expression (N), Dtyp); - if Nkind (Expression (N)) = N_Raise_Constraint_Error then Rewrite (N, New_Copy (Expression (N))); Set_Etype (N, PtrT); diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb index 24476194337a0..35afb95347be6 100644 --- a/gcc/ada/exp_ch6.adb +++ b/gcc/ada/exp_ch6.adb @@ -630,7 +630,10 @@ package body Exp_Ch6 is -- Create the actual which is a pointer to the current activation chain - if No (Chain) then + if Restriction_Active (No_Task_Hierarchy) then + Chain_Actual := Make_Null (Loc); + + elsif No (Chain) then Chain_Actual := Make_Attribute_Reference (Loc, Prefix => Make_Identifier (Loc, Name_uChain), diff --git a/gcc/ada/exp_ch7.adb b/gcc/ada/exp_ch7.adb index d7863c30b68f2..a0f95403dda82 100644 --- a/gcc/ada/exp_ch7.adb +++ b/gcc/ada/exp_ch7.adb @@ -796,6 +796,7 @@ package body Exp_Ch7 is Desig_Typ : Entity_Id; FM_Id : Entity_Id; Priv_View : Entity_Id; + Scop : Entity_Id; Unit_Decl : Node_Id; Unit_Id : Entity_Id; @@ -834,6 +835,18 @@ package body Exp_Ch7 is Desig_Typ := Priv_View; end if; + -- For a designated type not declared at library level, we cannot create + -- a finalization collection attached to an outer unit since this would + -- generate dangling references to the dynamic scope through access-to- + -- procedure values designating the local Finalize_Address primitive. + + Scop := Enclosing_Dynamic_Scope (Desig_Typ); + if Scop /= Standard_Standard + and then Scope_Depth (Scop) > Scope_Depth (Unit_Id) + then + return; + end if; + -- Determine whether the current semantic unit already has an anonymous -- master which services the designated type. diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb index 64324bfcb72c7..5eedd72f5bc96 100644 --- a/gcc/ada/exp_util.adb +++ b/gcc/ada/exp_util.adb @@ -859,6 +859,16 @@ package body Exp_Util is Needs_Finalization (Desig_Typ) and then not No_Heap_Finalization (Ptr_Typ); + -- The allocation/deallocation of a controlled object must be associated + -- with an attachment to/detachment from a finalization master, but the + -- implementation cannot guarantee this property for every anonymous + -- access tyoe, see Build_Anonymous_Collection. + + if Needs_Fin and then No (Finalization_Master (Ptr_Typ)) then + pragma Assert (Ekind (Ptr_Typ) = E_Anonymous_Access_Type); + Needs_Fin := False; + end if; + if Needs_Fin then -- Do nothing if the access type may never allocate / deallocate @@ -868,11 +878,6 @@ package body Exp_Util is return; end if; - -- The allocation / deallocation of a controlled object must be - -- chained on / detached from a finalization master. - - pragma Assert (Present (Finalization_Master (Ptr_Typ))); - -- The only other kind of allocation / deallocation supported by this -- routine is on / from a subpool. @@ -5861,6 +5866,12 @@ package body Exp_Util is Utyp := Underlying_Type (Base_Type (Utyp)); + -- Handle incomplete types + + if No (Utyp) then + return Empty; + end if; + -- Deal with untagged derivation of private views. If the parent is -- now known to be protected, the finalization routine is the one -- defined on the corresponding record of the ancestor (corresponding diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc index 1c7a716840eb4..606c2fd0a763c 100644 --- a/gcc/ada/gcc-interface/decl.cc +++ b/gcc/ada/gcc-interface/decl.cc @@ -6207,6 +6207,12 @@ gnat_to_gnu_subprog_type (Entity_Id gnat_subprog, bool definition, if (debug_info_p) rest_of_record_type_compilation (gnu_cico_return_type); + + /* Declare it now since it will never be declared otherwise. This + is necessary to ensure that its subtrees are properly marked. */ + create_type_decl (TYPE_NAME (gnu_cico_return_type), + gnu_cico_return_type, + true, debug_info_p, gnat_subprog); } gnu_return_type = gnu_cico_return_type; diff --git a/gcc/ada/gnatbind.adb b/gcc/ada/gnatbind.adb index 4c50e61617da3..c30c635315418 100644 --- a/gcc/ada/gnatbind.adb +++ b/gcc/ada/gnatbind.adb @@ -214,6 +214,9 @@ procedure Gnatbind is No_Specification_Of_Aspect => False, -- Requires a parameter value, not a count + No_Task_Hierarchy_Implicit => False, + -- A compiler implementation artifact, not a documented restriction + No_Use_Of_Attribute => False, -- Requires a parameter value, not a count diff --git a/gcc/ada/gnatvsn.ads b/gcc/ada/gnatvsn.ads index 47a06b96c3cf4..99d06c7e5aa48 100644 --- a/gcc/ada/gnatvsn.ads +++ b/gcc/ada/gnatvsn.ads @@ -83,7 +83,8 @@ package Gnatvsn is -- space to store any possible version string value for checks. This -- value should never be decreased in the future, but it would be -- OK to increase it if absolutely necessary. If it is increased, - -- be sure to increase GNAT.Compiler.Version.Ver_Len_Max as well. + -- be sure to increase GNAT.Compiler.Version.Ver_Len_Max, and to update + -- the VER_LEN_MAX define in version.c as well. Ver_Prefix : constant String := "GNAT Version: "; -- Prefix generated by binder. If it is changed, be sure to change diff --git a/gcc/ada/libgnarl/s-taprop__dummy.adb b/gcc/ada/libgnarl/s-taprop__dummy.adb index 5ab41b1b3c171..e5360a63f3d3a 100644 --- a/gcc/ada/libgnarl/s-taprop__dummy.adb +++ b/gcc/ada/libgnarl/s-taprop__dummy.adb @@ -37,7 +37,6 @@ package body System.Task_Primitives.Operations is use System.Tasking; - use System.Parameters; pragma Warnings (Off); -- Turn off warnings since so many unreferenced parameters @@ -480,10 +479,7 @@ package body System.Task_Primitives.Operations is null; end Unlock; - procedure Unlock - (L : not null access RTS_Lock; - Global_Lock : Boolean := False) - is + procedure Unlock (L : not null access RTS_Lock) is begin null; end Unlock; @@ -522,10 +518,7 @@ package body System.Task_Primitives.Operations is Ceiling_Violation := False; end Write_Lock; - procedure Write_Lock - (L : not null access RTS_Lock; - Global_Lock : Boolean := False) - is + procedure Write_Lock (L : not null access RTS_Lock) is begin null; end Write_Lock; diff --git a/gcc/ada/libgnat/a-ngrear.adb b/gcc/ada/libgnat/a-ngrear.adb index 9cfd95629551f..844d6264ee723 100644 --- a/gcc/ada/libgnat/a-ngrear.adb +++ b/gcc/ada/libgnat/a-ngrear.adb @@ -96,7 +96,7 @@ package body Ada.Numerics.Generic_Real_Arrays is (A : Real_Matrix; Values : out Real_Vector; Vectors : out Real_Matrix; - Compute_Vectors : Boolean := True); + Compute_Vectors : Boolean); -- Perform Jacobi's eigensystem algorithm on real symmetric matrix A function Length is new Square_Matrix_Length (Real'Base, Real_Matrix); @@ -107,8 +107,9 @@ package body Ada.Numerics.Generic_Real_Arrays is -- Perform a Givens rotation procedure Sort_Eigensystem - (Values : in out Real_Vector; - Vectors : in out Real_Matrix); + (Values : in out Real_Vector; + Vectors : in out Real_Matrix; + Compute_Vectors : Boolean); -- Sort Values and associated Vectors by decreasing absolute value procedure Swap (Left, Right : in out Real); @@ -486,7 +487,7 @@ package body Ada.Numerics.Generic_Real_Arrays is is begin Jacobi (A, Values, Vectors, Compute_Vectors => True); - Sort_Eigensystem (Values, Vectors); + Sort_Eigensystem (Values, Vectors, Compute_Vectors => True); end Eigensystem; ----------------- @@ -500,7 +501,7 @@ package body Ada.Numerics.Generic_Real_Arrays is Vectors : Real_Matrix (1 .. 0, 1 .. 0); begin Jacobi (A, Values, Vectors, Compute_Vectors => False); - Sort_Eigensystem (Values, Vectors); + Sort_Eigensystem (Values, Vectors, Compute_Vectors => False); end; end return; end Eigenvalues; @@ -522,7 +523,7 @@ package body Ada.Numerics.Generic_Real_Arrays is (A : Real_Matrix; Values : out Real_Vector; Vectors : out Real_Matrix; - Compute_Vectors : Boolean := True) + Compute_Vectors : Boolean) is -- This subprogram uses Carl Gustav Jacob Jacobi's iterative method -- for computing eigenvalues and eigenvectors and is based on @@ -731,8 +732,9 @@ package body Ada.Numerics.Generic_Real_Arrays is ---------------------- procedure Sort_Eigensystem - (Values : in out Real_Vector; - Vectors : in out Real_Matrix) + (Values : in out Real_Vector; + Vectors : in out Real_Matrix; + Compute_Vectors : Boolean) is procedure Swap (Left, Right : Integer); -- Swap Values (Left) with Values (Right), and also swap the @@ -748,8 +750,10 @@ package body Ada.Numerics.Generic_Real_Arrays is procedure Swap (Left, Right : Integer) is begin Swap (Values (Left), Values (Right)); - Swap_Column (Vectors, Left - Values'First + Vectors'First (2), - Right - Values'First + Vectors'First (2)); + if Compute_Vectors then + Swap_Column (Vectors, Left - Values'First + Vectors'First (2), + Right - Values'First + Vectors'First (2)); + end if; end Swap; begin diff --git a/gcc/ada/libgnat/s-rident.ads b/gcc/ada/libgnat/s-rident.ads index d3a84e3471abe..bf2cf81a525d1 100644 --- a/gcc/ada/libgnat/s-rident.ads +++ b/gcc/ada/libgnat/s-rident.ads @@ -106,7 +106,7 @@ package System.Rident is No_Dispatching_Calls, -- GNAT No_Dynamic_Accessibility_Checks, -- GNAT No_Dynamic_Attachment, -- Ada 2012 (RM E.7(10/3)) - No_Dynamic_CPU_Assignment, -- Ada 202x (RM D.7(10/3)) + No_Dynamic_CPU_Assignment, -- Ada 2022 (RM D.7(10/3)) No_Dynamic_Priorities, -- (RM D.9(9)) No_Enumeration_Maps, -- GNAT No_Entry_Calls_In_Elaboration_Code, -- GNAT @@ -150,8 +150,9 @@ package System.Rident is No_Task_Attributes_Package, -- GNAT No_Task_At_Interrupt_Priority, -- GNAT No_Task_Hierarchy, -- (RM D.7(3), H.4(3)) - No_Task_Termination, -- GNAT (Ravenscar) - No_Tasks_Unassigned_To_CPU, -- Ada 202x (D.7(10.10/4)) + No_Task_Hierarchy_Implicit, -- GNAT + No_Task_Termination, -- Ada 2005 (D.7(15.1/2)) + No_Tasks_Unassigned_To_CPU, -- Ada 2022 (D.7(10.10/4)) No_Tasking, -- GNAT No_Terminate_Alternatives, -- (RM D.7(6)) No_Unchecked_Access, -- (RM H.4(18)) diff --git a/gcc/ada/restrict.adb b/gcc/ada/restrict.adb index d62572ef54b5c..e707c04eaabd2 100644 --- a/gcc/ada/restrict.adb +++ b/gcc/ada/restrict.adb @@ -886,7 +886,10 @@ package body Restrict is declare S : constant String := Restriction_Id'Image (J); begin - if S = Name_Buffer (1 .. Name_Len) then + if S = Name_Buffer (1 .. Name_Len) + -- users cannot name the N_T_H_Implicit restriction + and then J /= No_Task_Hierarchy_Implicit + then return J; end if; end; @@ -1093,7 +1096,12 @@ package body Restrict is function Restriction_Active (R : All_Restrictions) return Boolean is begin - return Restrictions.Set (R) and then not Restriction_Warnings (R); + if Restrictions.Set (R) and then not Restriction_Warnings (R) then + return True; + else + return R = No_Task_Hierarchy + and then Restriction_Active (No_Task_Hierarchy_Implicit); + end if; end Restriction_Active; -------------------------------- diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb index f9169eeedd7de..81b0942279284 100644 --- a/gcc/ada/sem_prag.adb +++ b/gcc/ada/sem_prag.adb @@ -21102,6 +21102,25 @@ package body Sem_Prag is if Partition_Elaboration_Policy_Sloc /= System_Location then Partition_Elaboration_Policy_Sloc := Loc; end if; + + if PEP_Val = Name_Sequential + and then not Restriction_Active (No_Task_Hierarchy) + then + -- RM H.6(6) guarantees that No_Task_Hierarchy will be + -- set eventually, so take advantage of that knowledge now. + -- But we have to do this in a tricky way. If we simply + -- set the No_Task_Hierarchy restriction here, then the + -- assumption that the restriction will be set eventually + -- becomes a self-fulfilling prophecy; the binder can + -- then mistakenly conclude that the H.6(6) rule is + -- satisified in cases where the post-compilation check + -- should fail. So we invent a new restriction, + -- No_Task_Hierarchy_Implicit, which is treated specially + -- in the function Restriction_Active. + + Set_Restriction (No_Task_Hierarchy_Implicit, N); + pragma Assert (Restriction_Active (No_Task_Hierarchy)); + end if; end if; end PEP; diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb index 4f66b7157789e..7dde7538734e7 100644 --- a/gcc/ada/sem_res.adb +++ b/gcc/ada/sem_res.adb @@ -5691,19 +5691,19 @@ package body Sem_Res is Set_Is_Dynamic_Coextension (N, False); Set_Is_Static_Coextension (N, False); - -- Anonymous access-to-controlled objects are not finalized on - -- time because this involves run-time ownership and currently - -- this property is not available. In rare cases the object may - -- not be finalized at all. Warn on potential issues involving - -- anonymous access-to-controlled objects. + -- Objects allocated through anonymous access types are not + -- finalized on time because this involves run-time ownership + -- and currently this property is not available. In rare cases + -- the object might not be finalized at all. Warn on potential + -- issues involving anonymous access-to-controlled types. if Ekind (Typ) = E_Anonymous_Access_Type and then Is_Controlled_Active (Desig_T) then Error_Msg_N - ("??object designated by anonymous access object might " + ("??object designated by anonymous access value might " & "not be finalized until its enclosing library unit " - & "goes out of scope", N); + & "goes out of scope, or not be finalized at all", N); Error_Msg_N ("\use named access type instead", N); end if; end if; @@ -14273,7 +14273,7 @@ package body Sem_Res is -- If it was legal in the generic, it's legal in the instance - elsif In_Instance_Body then + elsif In_Instance then return True; -- If both are tagged types, check legality of view conversions diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb index 3c55dda5a8566..cbe19cbeeb2aa 100644 --- a/gcc/ada/sem_util.adb +++ b/gcc/ada/sem_util.adb @@ -130,9 +130,6 @@ package body Sem_Util is -- Determine whether arbitrary entity Id denotes an atomic object as per -- RM C.6(7). - function Is_Container_Aggregate (Exp : Node_Id) return Boolean; - -- Is the given expression a container aggregate? - generic with function Is_Effectively_Volatile_Entity (Id : Entity_Id) return Boolean; diff --git a/gcc/ada/sem_util.ads b/gcc/ada/sem_util.ads index 695158a34f356..28dcefd71fb75 100644 --- a/gcc/ada/sem_util.ads +++ b/gcc/ada/sem_util.ads @@ -1531,6 +1531,9 @@ package Sem_Util is -- integer for use in compile-time checking. Note: Level is restricted to -- be non-dynamic. + function Is_Container_Aggregate (Exp : Node_Id) return Boolean; + -- Is the given expression a container aggregate? + function Is_Newly_Constructed (Exp : Node_Id; Context_Requires_NC : Boolean) return Boolean; -- Indicates whether a given expression is "newly constructed" (RM 4.4). diff --git a/gcc/ada/version.c b/gcc/ada/version.c index 5e64edd0b17d3..2fa9b8c2c8592 100644 --- a/gcc/ada/version.c +++ b/gcc/ada/version.c @@ -31,4 +31,7 @@ #include "version.h" -char gnat_version_string[] = version_string; +/* Logically a reference to Gnatvsn.Ver_Len_Max. Please keep in sync. */ +#define VER_LEN_MAX 256 + +char gnat_version_string[VER_LEN_MAX] = version_string; diff --git a/gcc/alias.cc b/gcc/alias.cc index 8c08452e0acfc..c62837dd854fb 100644 --- a/gcc/alias.cc +++ b/gcc/alias.cc @@ -389,6 +389,20 @@ refs_same_for_tbaa_p (tree earlier, tree later) || alias_set_subset_of (later_base_set, earlier_base_set)); } +/* Similar to refs_same_for_tbaa_p() but for use on MEM rtxs. */ +bool +mems_same_for_tbaa_p (rtx earlier, rtx later) +{ + gcc_assert (MEM_P (earlier)); + gcc_assert (MEM_P (later)); + + return ((MEM_ALIAS_SET (earlier) == MEM_ALIAS_SET (later) + || alias_set_subset_of (MEM_ALIAS_SET (later), + MEM_ALIAS_SET (earlier))) + && (!MEM_EXPR (earlier) + || refs_same_for_tbaa_p (MEM_EXPR (earlier), MEM_EXPR (later)))); +} + /* Returns a pointer to the alias set entry for ALIAS_SET, if there is such an entry, or NULL otherwise. */ @@ -3355,6 +3369,10 @@ memory_modified_in_insn_p (const_rtx mem, const_rtx insn) void init_alias_analysis (void) { + const bool frame_pointer_eliminated + = reload_completed + && !frame_pointer_needed + && targetm.can_eliminate (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM); unsigned int maxreg = max_reg_num (); int changed, pass; int i; @@ -3432,12 +3450,8 @@ init_alias_analysis (void) for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) if (static_reg_base_value[i] /* Don't treat the hard frame pointer as special if we - eliminated the frame pointer to the stack pointer instead. */ - && !(i == HARD_FRAME_POINTER_REGNUM - && reload_completed - && !frame_pointer_needed - && targetm.can_eliminate (FRAME_POINTER_REGNUM, - STACK_POINTER_REGNUM))) + eliminated the frame pointer to the stack pointer. */ + && !(i == HARD_FRAME_POINTER_REGNUM && frame_pointer_eliminated)) { new_reg_base_value[i] = static_reg_base_value[i]; bitmap_set_bit (reg_seen, i); @@ -3453,10 +3467,15 @@ init_alias_analysis (void) { rtx note, set; + /* Treat the hard frame pointer as special unless we + eliminated the frame pointer to the stack pointer. */ + if (!frame_pointer_eliminated + && modified_in_p (hard_frame_pointer_rtx, insn)) + continue; + /* If this insn has a noalias note, process it, Otherwise, scan for sets. A simple set will have no side effects which could change the base value of any other register. */ - if (GET_CODE (PATTERN (insn)) == SET && REG_NOTES (insn) != 0 && find_reg_note (insn, REG_NOALIAS, NULL_RTX)) diff --git a/gcc/alias.h b/gcc/alias.h index b2596518ac958..ee3db46676309 100644 --- a/gcc/alias.h +++ b/gcc/alias.h @@ -40,6 +40,7 @@ tree reference_alias_ptr_type_1 (tree *); bool alias_ptr_types_compatible_p (tree, tree); int compare_base_decls (tree, tree); bool refs_same_for_tbaa_p (tree, tree); +bool mems_same_for_tbaa_p (rtx, rtx); /* This alias set can be used to force a memory to conflict with all other memories, creating a barrier across which no memory reference diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog index 9ab6169da2179..aca59065fac36 100644 --- a/gcc/analyzer/ChangeLog +++ b/gcc/analyzer/ChangeLog @@ -1,3 +1,187 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-29 David Malcolm + + PR analyzer/109094 + * region-model.cc (region_model::on_longjmp): Pass false for + new "eval_return_svalue" param of pop_frame. + (region_model::pop_frame): Add new "eval_return_svalue" param and + use it to suppress the call to get_rvalue on the result when + needed by on_longjmp. + * region-model.h (region_model::pop_frame): Add new + "eval_return_svalue" param. + +2023-03-29 David Malcolm + + PR analyzer/108968 + * region-model.cc (region_model::get_rvalue_1): Handle VAR_DECLs + with a DECL_HARD_REGISTER by returning UNKNOWN. + +2023-03-29 David Malcolm + + PR analyzer/108733 + * state-purge.cc (get_candidate_for_purging): Add ADDR_EXPR + and MEM_REF. + +2023-03-29 David Malcolm + + PR analyzer/108704 + * state-purge.cc (state_purge_per_decl::process_point_backwards): + Don't stop processing the decl if it's fully overwritten by + this stmt if it's also used by this stmt. + +2023-03-29 David Malcolm + + PR analyzer/106325 + * region-model-manager.cc + (region_model_manager::get_or_create_null_ptr): New. + * region-model.cc (region_model::on_top_level_param): Add + "nonnull" param and make use of it. + (region_model::push_frame): When handling a top-level entrypoint + to the analysis, determine which params __attribute__((nonnull)) + applies to, and pass to on_top_level_param. + * region-model.h (region_model_manager::get_or_create_null_ptr): + New decl. + (region_model::on_top_level_param): Add "nonnull" param. + +2023-03-29 David Malcolm + + PR analyzer/107948 + * region-model-manager.cc + (region_model_manager::maybe_fold_binop): Fold (0 - VAL) to -VAL. + * region-model.cc (region_model::eval_condition): Handle e.g. + "-X <= 0" as equivalent to X >= 0". + +2023-03-29 David Malcolm + + PR analyzer/105784 + * region-model-manager.cc + (region_model_manager::maybe_fold_binop): For POINTER_PLUS_EXPR, + PLUS_EXPR and MINUS_EXPR, eliminate requirement that the final + type matches that of arg0 in favor of a cast. + +2023-03-29 David Malcolm + + PR analyzer/107582 + * engine.cc (dynamic_call_info_t::update_model): Update the model + by pushing or pop a frame, rather than by clobbering it with the + model from the exploded_node's state. + +2023-03-29 David Malcolm + + PR analyzer/107345 + * region-model.cc (region_model::eval_condition_without_cm): + Ensure that constants are on the right-hand side before checking + for them. + +2023-03-29 David Malcolm + + * region-model-manager.cc + (region_model_manager::maybe_fold_unaryop): Fold -(-(VAL)) to VAL. + +2023-03-29 David Malcolm + + PR analyzer/106573 + * region-model.cc (region_model::on_call_pre): Use check_call_args + when ensuring that we call get_arg_svalue on all args. Remove + redundant call from handling for stdio builtins. + +2023-03-29 David Malcolm + + PR analyzer/106573 + * region-model.cc (region_model::on_call_pre): Ensure that we call + get_arg_svalue on all arguments. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-07-27 David Malcolm + + * region.h (code_region::get_element): Remove stray decl. + (function_region::get_element): Likewise. + +2022-07-27 David Malcolm + + PR analyzer/106225 + * sm-taint.cc (taint_state_machine::on_stmt): Move handling of + assignments from division to... + (taint_state_machine::check_for_tainted_divisor): ...this new + function. Reject warning when the divisor is known to be non-zero. + * sm.cc: Include "analyzer/program-state.h". + (sm_context::get_old_region_model): New. + * sm.h (sm_context::get_old_region_model): New decl. + +2022-07-27 David Malcolm + + PR analyzer/106204 + * region-model.cc (within_short_circuited_stmt_p): Move extraction + of assign_stmt to caller. + (due_to_ifn_deferred_init_p): New. + (region_model::check_for_poison): Move extraction of assign_stmt + from within_short_circuited_stmt_p to here. Share logic with + call to due_to_ifn_deferred_init_p. + +2022-07-27 David Malcolm + + * diagnostic-manager.cc (saved_diagnostic::dump_dot_id): New. + (saved_diagnostic::dump_as_dot_node): New. + * diagnostic-manager.h (saved_diagnostic::dump_dot_id): New decl. + (saved_diagnostic::dump_as_dot_node): New decl. + * engine.cc (exploded_node::dump_dot): Add nodes for saved + diagnostics. + +2022-07-27 David Malcolm + + * checker-path.cc (state_change_event::get_desc): Call maybe_free + on label_text temporaries. + * diagnostic-manager.cc + (diagnostic_manager::prune_for_sm_diagnostic): Likewise. + * engine.cc (exploded_graph::~exploded_graph): Fix leak of + m_per_point_data and m_per_call_string_data values. Simplify + cleanup of m_per_function_stats and m_per_point_data values. + (feasibility_state::maybe_update_for_edge): Fix leak of result of + superedge::get_description. + * region-model-manager.cc + (region_model_manager::~region_model_manager): Move cleanup of + m_setjmp_values to match the ordering of the fields within + region_model_manager. Fix leak of values within + m_repeated_values_map, m_bits_within_values_map, + m_asm_output_values_map, and m_const_fn_result_values_map. + +2022-07-27 David Malcolm + + PR analyzer/105285 + * store.cc (binding_cluster::get_any_binding): Handle accessing + sub_svalues of clusters where the base region has a symbolic + binding. + +2022-07-27 David Malcolm + + * diagnostic-manager.cc (epath_finder::process_worklist_item): + Call dump_feasible_path when a path that reaches the the target + enode is found. + (epath_finder::dump_feasible_path): New. + * engine.cc (feasibility_state::dump_to_pp): New. + * exploded-graph.h (feasibility_state::dump_to_pp): New decl. + * feasible-graph.cc (feasible_graph::dump_feasible_path): New. + * feasible-graph.h (feasible_graph::dump_feasible_path): New + decls. + * program-point.cc (function_point::print): Fix missing trailing + newlines. + * program-point.h (program_point::print_source_line): Remove + unimplemented decl. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-25 David Malcolm PR analyzer/105365 diff --git a/gcc/analyzer/checker-path.cc b/gcc/analyzer/checker-path.cc index 779ff80de7ccd..a61b3ee067507 100644 --- a/gcc/analyzer/checker-path.cc +++ b/gcc/analyzer/checker-path.cc @@ -323,24 +323,28 @@ state_change_event::get_desc (bool can_colorize) const if (m_sval) { label_text sval_desc = m_sval->get_desc (); + label_text result; if (m_origin) { label_text origin_desc = m_origin->get_desc (); - return make_label_text + result = make_label_text (can_colorize, "state of %qs: %qs -> %qs (origin: %qs)", sval_desc.m_buffer, m_from->get_name (), m_to->get_name (), origin_desc.m_buffer); + origin_desc.maybe_free (); } else - return make_label_text + result = make_label_text (can_colorize, "state of %qs: %qs -> %qs (NULL origin)", sval_desc.m_buffer, m_from->get_name (), m_to->get_name ()); + sval_desc.maybe_free (); + return result; } else { diff --git a/gcc/analyzer/diagnostic-manager.cc b/gcc/analyzer/diagnostic-manager.cc index bf7c8fc5147ca..f740084905d1c 100644 --- a/gcc/analyzer/diagnostic-manager.cc +++ b/gcc/analyzer/diagnostic-manager.cc @@ -112,6 +112,10 @@ class epath_finder void dump_feasible_graph (const exploded_node *target_enode, const char *desc, unsigned diag_idx, const feasible_graph &fg); + void dump_feasible_path (const exploded_node *target_enode, + unsigned diag_idx, + const feasible_graph &fg, + const feasible_node &fnode) const; const exploded_graph &m_eg; shortest_exploded_paths *m_sep; @@ -510,6 +514,9 @@ epath_finder::process_worklist_item (feasible_worklist *worklist, target_enode->m_index, diag_idx, succ_fnode->get_path_length ()); *out_best_path = fg->make_epath (succ_fnode); + if (flag_dump_analyzer_feasibility) + dump_feasible_path (target_enode, diag_idx, *fg, *succ_fnode); + /* Success: stop the worklist iteration. */ return false; } @@ -608,6 +615,23 @@ epath_finder::dump_feasible_graph (const exploded_node *target_enode, free (filename); } +/* Dump the path to FNODE to "BASE_NAME.DIAG_IDX.to-enN.fpath.txt". */ + +void +epath_finder::dump_feasible_path (const exploded_node *target_enode, + unsigned diag_idx, + const feasible_graph &fg, + const feasible_node &fnode) const +{ + auto_timevar tv (TV_ANALYZER_DUMP); + pretty_printer pp; + pp_printf (&pp, "%s.%i.to-en%i.fpath.txt", + dump_base_name, diag_idx, target_enode->m_index); + char *filename = xstrdup (pp_formatted_text (&pp)); + fg.dump_feasible_path (fnode, filename); + free (filename); +} + /* class saved_diagnostic. */ /* saved_diagnostic's ctor. @@ -718,6 +742,68 @@ saved_diagnostic::to_json () const return sd_obj; } +/* Dump this to PP in a form suitable for use as an id in .dot output. */ + +void +saved_diagnostic::dump_dot_id (pretty_printer *pp) const +{ + pp_printf (pp, "sd_%i", m_idx); +} + +/* Dump this to PP in a form suitable for use as a node in .dot output. */ + +void +saved_diagnostic::dump_as_dot_node (pretty_printer *pp) const +{ + dump_dot_id (pp); + pp_printf (pp, + " [shape=none,margin=0,style=filled,fillcolor=\"red\",label=\""); + pp_write_text_to_stream (pp); + + /* Node label. */ + pp_printf (pp, "DIAGNOSTIC: %s (sd: %i)\n", + m_d->get_kind (), m_idx); + if (m_sm) + { + pp_printf (pp, "sm: %s", m_sm->get_name ()); + if (m_state) + { + pp_printf (pp, "; state: "); + m_state->dump_to_pp (pp); + } + pp_newline (pp); + } + if (m_stmt) + { + pp_string (pp, "stmt: "); + pp_gimple_stmt_1 (pp, m_stmt, 0, (dump_flags_t)0); + pp_newline (pp); + } + if (m_var) + pp_printf (pp, "var: %qE\n", m_var); + if (m_sval) + { + pp_string (pp, "sval: "); + m_sval->dump_to_pp (pp, true); + pp_newline (pp); + } + if (m_best_epath) + pp_printf (pp, "path length: %i\n", get_epath_length ()); + + pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/true); + pp_string (pp, "\"];\n\n"); + + /* Show links to duplicates. */ + for (auto iter : m_duplicates) + { + dump_dot_id (pp); + pp_string (pp, " -> "); + iter->dump_dot_id (pp); + pp_string (pp, " [style=\"dotted\" arrowhead=\"none\"];"); + pp_newline (pp); + } +} + /* Use PF to find the best exploded_path for this saved_diagnostic, and store it in m_best_epath. If m_stmt is still NULL, use m_stmt_finder on the epath to populate @@ -2147,6 +2233,7 @@ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path, log ("considering event %i (%s), with sval: %qs, state: %qs", idx, event_kind_to_string (base_event->m_kind), sval_desc.m_buffer, state->get_name ()); + sval_desc.maybe_free (); } else log ("considering event %i (%s), with global state: %qs", @@ -2214,6 +2301,8 @@ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path, " switching var of interest from %qs to %qs", idx, sval_desc.m_buffer, origin_sval_desc.m_buffer); + sval_desc.maybe_free (); + origin_sval_desc.maybe_free (); } sval = state_change->m_origin; } @@ -2241,6 +2330,7 @@ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path, else log ("filtering event %i: state change to %qs", idx, change_sval_desc.m_buffer); + change_sval_desc.maybe_free (); } else log ("filtering event %i: global state change", idx); @@ -2310,6 +2400,7 @@ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path, " recording critical state for %qs at call" " from %qE in callee to %qE in caller", idx, sval_desc.m_buffer, callee_var, caller_var); + sval_desc.maybe_free (); } if (expr.param_p ()) event->record_critical_state (caller_var, state); @@ -2353,6 +2444,7 @@ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path, " recording critical state for %qs at return" " from %qE in caller to %qE in callee", idx, sval_desc.m_buffer, callee_var, callee_var); + sval_desc.maybe_free (); } if (expr.return_value_p ()) event->record_critical_state (callee_var, state); diff --git a/gcc/analyzer/diagnostic-manager.h b/gcc/analyzer/diagnostic-manager.h index fc5dc043c78b2..b9bb7c8c25464 100644 --- a/gcc/analyzer/diagnostic-manager.h +++ b/gcc/analyzer/diagnostic-manager.h @@ -46,6 +46,9 @@ class saved_diagnostic json::object *to_json () const; + void dump_dot_id (pretty_printer *pp) const; + void dump_as_dot_node (pretty_printer *pp) const; + const feasibility_problem *get_feasibility_problem () const { return m_problem; diff --git a/gcc/analyzer/engine.cc b/gcc/analyzer/engine.cc index d8b61955aa64a..9a116d9452702 100644 --- a/gcc/analyzer/engine.cc +++ b/gcc/analyzer/engine.cc @@ -1187,6 +1187,27 @@ exploded_node::dump_dot (graphviz_out *gv, const dump_args_t &args) const pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/true); pp_string (pp, "\"];\n\n"); + + /* It can be hard to locate the saved diagnostics as text within the + enode nodes, so add extra nodes to the graph for each saved_diagnostic, + highlighted in red. + Compare with dump_saved_diagnostics. */ + { + unsigned i; + const saved_diagnostic *sd; + FOR_EACH_VEC_ELT (m_saved_diagnostics, i, sd) + { + sd->dump_as_dot_node (pp); + + /* Add edge connecting this enode to the saved_diagnostic. */ + dump_dot_id (pp); + pp_string (pp, " -> "); + sd->dump_dot_id (pp); + pp_string (pp, " [style=\"dotted\" arrowhead=\"none\"];"); + pp_newline (pp); + } + } + pp_flush (pp); } @@ -1782,16 +1803,22 @@ exploded_node::dump_succs_and_preds (FILE *outf) const /* Implementation of custom_edge_info::update_model vfunc for dynamic_call_info_t. - Update state for the dynamically discorverd calls */ + Update state for a dynamically discovered call (or return), by pushing + or popping the a frame for the appropriate function. */ bool dynamic_call_info_t::update_model (region_model *model, const exploded_edge *eedge, - region_model_context *) const + region_model_context *ctxt) const { gcc_assert (eedge); - const program_state &dest_state = eedge->m_dest->get_state (); - *model = *dest_state.m_region_model; + if (m_is_returning_call) + model->update_for_return_gcall (m_dynamic_call, ctxt); + else + { + function *callee = eedge->m_dest->get_function (); + model->update_for_gcall (m_dynamic_call, ctxt, callee); + } return true; } @@ -2340,15 +2367,14 @@ exploded_graph::exploded_graph (const supergraph &sg, logger *logger, exploded_graph::~exploded_graph () { - for (function_stat_map_t::iterator iter = m_per_function_stats.begin (); - iter != m_per_function_stats.end (); - ++iter) - delete (*iter).second; - - for (point_map_t::iterator iter = m_per_point_data.begin (); - iter != m_per_point_data.end (); - ++iter) - delete (*iter).second; + for (auto iter : m_per_point_data) + delete iter.second; + for (auto iter : m_per_function_data) + delete iter.second; + for (auto iter : m_per_function_stats) + delete iter.second; + for (auto iter : m_per_call_string_data) + delete iter.second; } /* Subroutine for use when implementing __attribute__((tainted_args)) @@ -4538,10 +4564,14 @@ feasibility_state::maybe_update_for_edge (logger *logger, if (sedge) { if (logger) - logger->log (" sedge: SN:%i -> SN:%i %s", - sedge->m_src->m_index, - sedge->m_dest->m_index, - sedge->get_description (false)); + { + char *desc = sedge->get_description (false); + logger->log (" sedge: SN:%i -> SN:%i %s", + sedge->m_src->m_index, + sedge->m_dest->m_index, + desc); + free (desc); + } const gimple *last_stmt = src_point.get_supernode ()->get_last_stmt (); if (!m_model.maybe_update_for_edge (*sedge, last_stmt, NULL, out_rc)) @@ -4605,6 +4635,15 @@ feasibility_state::maybe_update_for_edge (logger *logger, return true; } +/* Dump this object to PP. */ + +void +feasibility_state::dump_to_pp (pretty_printer *pp, + bool simple, bool multiline) const +{ + m_model.dump_to_pp (pp, simple, multiline); +} + /* A family of cluster subclasses for use when generating .dot output for exploded graphs (-fdump-analyzer-exploded-graph), for grouping the enodes into hierarchical boxes. diff --git a/gcc/analyzer/exploded-graph.h b/gcc/analyzer/exploded-graph.h index af0ab8d42c821..2dcdcc55b2a2f 100644 --- a/gcc/analyzer/exploded-graph.h +++ b/gcc/analyzer/exploded-graph.h @@ -1001,6 +1001,8 @@ class feasibility_state const region_model &get_model () const { return m_model; } const auto_sbitmap &get_snodes_visited () const { return m_snodes_visited; } + void dump_to_pp (pretty_printer *pp, bool simple, bool multiline) const; + private: region_model m_model; auto_sbitmap m_snodes_visited; diff --git a/gcc/analyzer/feasible-graph.cc b/gcc/analyzer/feasible-graph.cc index 0ac8484a7e431..fe7e79fe90229 100644 --- a/gcc/analyzer/feasible-graph.cc +++ b/gcc/analyzer/feasible-graph.cc @@ -218,6 +218,71 @@ feasible_graph::make_epath (feasible_node *fnode) const return epath; } +/* Dump the path to DST_FNODE in textual form to PP. */ + +void +feasible_graph::dump_feasible_path (const feasible_node &dst_fnode, + pretty_printer *pp) const +{ + const feasible_node *fnode = &dst_fnode; + + auto_vec fpath; + + /* FG is actually a tree. Built the path backwards, by walking + backwards from FNODE until we reach the origin. */ + while (fnode->get_inner_node ()->m_index != 0) + { + gcc_assert (fnode->m_preds.length () == 1); + feasible_edge *pred_fedge + = static_cast (fnode->m_preds[0]); + fpath.safe_push (pred_fedge); + fnode = static_cast (pred_fedge->m_src); + } + + /* Now reverse it. */ + fpath.reverse (); + + for (unsigned i = 0; i < fpath.length (); i++) + { + const feasible_edge *fedge = fpath[i]; + const feasible_node *src_fnode + = static_cast (fedge->m_src); + const feasible_node *dest_fnode + = static_cast (fedge->m_dest); + + pp_printf (pp, "fpath[%i]: FN %i (EN %i) -> FN %i (EN %i)", + i, + src_fnode->get_index (), + src_fnode->get_inner_node ()->m_index, + dest_fnode->get_index (), + dest_fnode->get_inner_node ()->m_index); + pp_newline (pp); + pp_printf (pp, " FN %i (EN %i):", + dest_fnode->get_index (), + dest_fnode->get_inner_node ()->m_index); + pp_newline (pp); + const program_point &point = dest_fnode->get_inner_node ()->get_point (); + point.print (pp, format (true)); + dest_fnode->get_state ().dump_to_pp (pp, true, true); + pp_newline (pp); + } +} + +/* Dump the path to DST_FNODE in textual form to FILENAME. */ + +void +feasible_graph::dump_feasible_path (const feasible_node &dst_fnode, + const char *filename) const +{ + FILE *fp = fopen (filename, "w"); + pretty_printer pp; + pp_format_decoder (&pp) = default_tree_printer; + pp.buffer->stream = fp; + dump_feasible_path (dst_fnode, &pp); + pp_flush (&pp); + fclose (fp); +} + /* Dump stats about this graph to LOGGER. */ void diff --git a/gcc/analyzer/feasible-graph.h b/gcc/analyzer/feasible-graph.h index d10a28d4f902c..f1868af3cf8ce 100644 --- a/gcc/analyzer/feasible-graph.h +++ b/gcc/analyzer/feasible-graph.h @@ -197,11 +197,17 @@ class feasible_graph : public digraph exploded_path *make_epath (feasible_node *fnode) const; + void dump_feasible_path (const feasible_node &dst_fnode, + const char *filename) const; + unsigned get_num_infeasible () const { return m_num_infeasible; } void log_stats (logger *logger) const; private: + void dump_feasible_path (const feasible_node &dst_fnode, + pretty_printer *pp) const; + unsigned m_num_infeasible; }; diff --git a/gcc/analyzer/program-point.cc b/gcc/analyzer/program-point.cc index 61cea8a107682..8fa7066fea5a4 100644 --- a/gcc/analyzer/program-point.cc +++ b/gcc/analyzer/program-point.cc @@ -114,6 +114,8 @@ function_point::print (pretty_printer *pp, const format &f) const case PK_ORIGIN: pp_printf (pp, "origin"); + if (f.m_newlines) + pp_newline (pp); break; case PK_BEFORE_SUPERNODE: @@ -156,6 +158,8 @@ function_point::print (pretty_printer *pp, const format &f) const case PK_AFTER_SUPERNODE: pp_printf (pp, "after SN: %i", m_supernode->m_index); + if (f.m_newlines) + pp_newline (pp); break; } } diff --git a/gcc/analyzer/program-point.h b/gcc/analyzer/program-point.h index 4b1c733d7106f..6084c9e3004d9 100644 --- a/gcc/analyzer/program-point.h +++ b/gcc/analyzer/program-point.h @@ -179,7 +179,6 @@ class program_point } void print (pretty_printer *pp, const format &f) const; - void print_source_line (pretty_printer *pp) const; void dump () const; json::object *to_json () const; diff --git a/gcc/analyzer/region-model-manager.cc b/gcc/analyzer/region-model-manager.cc index 4ec275ecd4311..0b5779f79d9b2 100644 --- a/gcc/analyzer/region-model-manager.cc +++ b/gcc/analyzer/region-model-manager.cc @@ -97,12 +97,12 @@ region_model_manager::~region_model_manager () iter != m_unknowns_map.end (); ++iter) delete (*iter).second; delete m_unknown_NULL; - for (setjmp_values_map_t::iterator iter = m_setjmp_values_map.begin (); - iter != m_setjmp_values_map.end (); ++iter) - delete (*iter).second; for (poisoned_values_map_t::iterator iter = m_poisoned_values_map.begin (); iter != m_poisoned_values_map.end (); ++iter) delete (*iter).second; + for (setjmp_values_map_t::iterator iter = m_setjmp_values_map.begin (); + iter != m_setjmp_values_map.end (); ++iter) + delete (*iter).second; for (initial_values_map_t::iterator iter = m_initial_values_map.begin (); iter != m_initial_values_map.end (); ++iter) delete (*iter).second; @@ -118,6 +118,10 @@ region_model_manager::~region_model_manager () for (sub_values_map_t::iterator iter = m_sub_values_map.begin (); iter != m_sub_values_map.end (); ++iter) delete (*iter).second; + for (auto iter : m_repeated_values_map) + delete iter.second; + for (auto iter : m_bits_within_values_map) + delete iter.second; for (unmergeable_values_map_t::iterator iter = m_unmergeable_values_map.begin (); iter != m_unmergeable_values_map.end (); ++iter) @@ -131,6 +135,10 @@ region_model_manager::~region_model_manager () for (conjured_values_map_t::iterator iter = m_conjured_values_map.begin (); iter != m_conjured_values_map.end (); ++iter) delete (*iter).second; + for (auto iter : m_asm_output_values_map) + delete iter.second; + for (auto iter : m_const_fn_result_values_map) + delete iter.second; /* Delete consolidated regions. */ for (fndecls_map_t::iterator iter = m_fndecls_map.begin (); @@ -231,6 +239,17 @@ region_model_manager::get_or_create_int_cst (tree type, poly_int64 val) return get_or_create_constant_svalue (tree_cst); } +/* Return the svalue * for the constant_svalue for the NULL pointer + of POINTER_TYPE, creating it if necessary. */ + +const svalue * +region_model_manager::get_or_create_null_ptr (tree pointer_type) +{ + gcc_assert (pointer_type); + gcc_assert (POINTER_TYPE_P (pointer_type)); + return get_or_create_int_cst (pointer_type, 0); +} + /* Return the svalue * for a unknown_svalue for TYPE (which can be NULL), creating it if necessary. The unknown_svalue instances are reused, based on pointer equality @@ -422,6 +441,17 @@ region_model_manager::maybe_fold_unaryop (tree type, enum tree_code op, } } break; + case NEGATE_EXPR: + { + /* -(-(VAL)) is VAL, for integer types. */ + if (const unaryop_svalue *unaryop = arg->dyn_cast_unaryop_svalue ()) + if (unaryop->get_op () == NEGATE_EXPR + && type == unaryop->get_type () + && type + && INTEGRAL_TYPE_P (type)) + return unaryop->get_arg (); + } + break; } /* Constants. */ @@ -596,13 +626,16 @@ region_model_manager::maybe_fold_binop (tree type, enum tree_code op, case POINTER_PLUS_EXPR: case PLUS_EXPR: /* (VAL + 0) -> VAL. */ - if (cst1 && zerop (cst1) && type == arg0->get_type ()) - return arg0; + if (cst1 && zerop (cst1)) + return get_or_create_cast (type, arg0); break; case MINUS_EXPR: /* (VAL - 0) -> VAL. */ - if (cst1 && zerop (cst1) && type == arg0->get_type ()) - return arg0; + if (cst1 && zerop (cst1)) + return get_or_create_cast (type, arg0); + /* (0 - VAL) -> -VAL. */ + if (cst0 && zerop (cst0)) + return get_or_create_unaryop (type, NEGATE_EXPR, arg1); break; case MULT_EXPR: /* (VAL * 0). */ diff --git a/gcc/analyzer/region-model.cc b/gcc/analyzer/region-model.cc index 816b4100f3a2f..acad33483e677 100644 --- a/gcc/analyzer/region-model.cc +++ b/gcc/analyzer/region-model.cc @@ -895,17 +895,9 @@ region_model::get_gassign_result (const gassign *assign, static bool within_short_circuited_stmt_p (const region_model *model, - region_model_context *ctxt) + const gassign *assign_stmt) { - gcc_assert (ctxt); - const gimple *curr_stmt = ctxt->get_stmt (); - if (curr_stmt == NULL) - return false; - /* We must have an assignment to a temporary of _Bool type. */ - const gassign *assign_stmt = dyn_cast (curr_stmt); - if (!assign_stmt) - return false; tree lhs = gimple_assign_lhs (assign_stmt); if (TREE_TYPE (lhs) != boolean_type_node) return false; @@ -958,6 +950,47 @@ within_short_circuited_stmt_p (const region_model *model, return true; } +/* Workaround for discarding certain false positives from + -Wanalyzer-use-of-uninitialized-value + seen with -ftrivial-auto-var-init=. + + -ftrivial-auto-var-init= will generate calls to IFN_DEFERRED_INIT. + + If the address of the var is taken, gimplification will give us + something like: + + _1 = .DEFERRED_INIT (4, 2, &"len"[0]); + len = _1; + + The result of DEFERRED_INIT will be an uninit value; we don't + want to emit a false positive for "len = _1;" + + Return true if ASSIGN_STMT is such a stmt. */ + +static bool +due_to_ifn_deferred_init_p (const gassign *assign_stmt) + +{ + /* We must have an assignment to a decl from an SSA name that's the + result of a IFN_DEFERRED_INIT call. */ + if (gimple_assign_rhs_code (assign_stmt) != SSA_NAME) + return false; + tree lhs = gimple_assign_lhs (assign_stmt); + if (TREE_CODE (lhs) != VAR_DECL) + return false; + tree rhs = gimple_assign_rhs1 (assign_stmt); + if (TREE_CODE (rhs) != SSA_NAME) + return false; + const gimple *def_stmt = SSA_NAME_DEF_STMT (rhs); + const gcall *call = dyn_cast (def_stmt); + if (!call) + return false; + if (gimple_call_internal_p (call) + && gimple_call_internal_fn (call) == IFN_DEFERRED_INIT) + return true; + return false; +} + /* Check for SVAL being poisoned, adding a warning to CTXT. Return SVAL, or, if a warning is added, another value, to avoid repeatedly complaining about the same poisoned value in followup code. */ @@ -981,10 +1014,20 @@ region_model::check_for_poison (const svalue *sval, && is_empty_type (sval->get_type ())) return sval; - /* Special case to avoid certain false positives. */ - if (pkind == POISON_KIND_UNINIT - && within_short_circuited_stmt_p (this, ctxt)) - return sval; + if (pkind == POISON_KIND_UNINIT) + if (const gimple *curr_stmt = ctxt->get_stmt ()) + if (const gassign *assign_stmt + = dyn_cast (curr_stmt)) + { + /* Special case to avoid certain false positives. */ + if (within_short_circuited_stmt_p (this, assign_stmt)) + return sval; + + /* Special case to avoid false positive on + -ftrivial-auto-var-init=. */ + if (due_to_ifn_deferred_init_p (assign_stmt)) + return sval; + } /* If we have an SSA name for a temporary, we don't want to print ''. @@ -1311,6 +1354,13 @@ region_model::on_call_pre (const gcall *call, region_model_context *ctxt, && gimple_call_internal_fn (call) == IFN_DEFERRED_INIT) return false; + /* Get svalues for all of the arguments at the callsite, to ensure that we + complain about any uninitialized arguments. This might lead to + duplicates if any of the handling below also looks up the svalues, + but the deduplication code should deal with that. */ + if (ctxt) + check_call_args (cd); + /* Some of the cases below update the lhs of the call based on the return value, but not all. Provide a default value, which may get overwritten below. */ @@ -1426,7 +1476,6 @@ region_model::on_call_pre (const gcall *call, region_model_context *ctxt, /* These stdio builtins have external effects that are out of scope for the analyzer: we only want to model the effects on the return value. */ - check_call_args (cd); break; } else if (is_named_call_p (callee_fndecl, "malloc", call, 1)) @@ -1937,7 +1986,7 @@ region_model::on_longjmp (const gcall *longjmp_call, const gcall *setjmp_call, setjmp was called. */ gcc_assert (get_stack_depth () >= setjmp_stack_depth); while (get_stack_depth () > setjmp_stack_depth) - pop_frame (NULL, NULL, ctxt); + pop_frame (NULL, NULL, ctxt, false); gcc_assert (get_stack_depth () == setjmp_stack_depth); @@ -2188,9 +2237,16 @@ region_model::get_rvalue_1 (path_var pv, region_model_context *ctxt) const return get_rvalue_for_bits (TREE_TYPE (expr), reg, bits, ctxt); } - case SSA_NAME: case VAR_DECL: + if (DECL_HARD_REGISTER (pv.m_tree)) + { + /* If it has a hard register, it doesn't have a memory region + and can't be referred to as an lvalue. */ + return m_mgr->get_or_create_unknown_svalue (TREE_TYPE (pv.m_tree)); + } + /* Fall through. */ case PARM_DECL: + case SSA_NAME: case RESULT_DECL: case ARRAY_REF: { @@ -2943,10 +2999,19 @@ region_model::eval_condition_without_cm (const svalue *lhs, /* Otherwise, only known through constraints. */ } - /* If we have a pair of constants, compare them. */ if (const constant_svalue *cst_lhs = lhs->dyn_cast_constant_svalue ()) - if (const constant_svalue *cst_rhs = rhs->dyn_cast_constant_svalue ()) - return constant_svalue::eval_condition (cst_lhs, op, cst_rhs); + { + /* If we have a pair of constants, compare them. */ + if (const constant_svalue *cst_rhs = rhs->dyn_cast_constant_svalue ()) + return constant_svalue::eval_condition (cst_lhs, op, cst_rhs); + else + { + /* When we have one constant, put it on the RHS. */ + std::swap (lhs, rhs); + op = swap_tree_comparison (op); + } + } + gcc_assert (lhs->get_kind () != SK_CONSTANT); /* Handle comparison against zero. */ if (const constant_svalue *cst_rhs = rhs->dyn_cast_constant_svalue ()) @@ -2992,6 +3057,19 @@ region_model::eval_condition_without_cm (const svalue *lhs, return lhs_ts; } } + else if (const unaryop_svalue *unaryop + = lhs->dyn_cast_unaryop_svalue ()) + { + if (unaryop->get_op () == NEGATE_EXPR) + { + /* e.g. "-X <= 0" is equivalent to X >= 0". */ + tristate lhs_ts = eval_condition (unaryop->get_arg (), + swap_tree_comparison (op), + rhs); + if (lhs_ts.is_known ()) + return lhs_ts; + } + } } /* Handle rejection of equality for comparisons of the initial values of @@ -3838,11 +3916,13 @@ region_model::apply_constraints_for_exception (const gimple *last_stmt, PARAM has a defined but unknown initial value. Anything it points to has escaped, since the calling context "knows" the pointer, and thus calls to unknown functions could read/write into - the region. */ + the region. + If NONNULL is true, then assume that PARAM must be non-NULL. */ void region_model::on_top_level_param (tree param, - region_model_context *ctxt) + bool nonnull, + region_model_context *ctxt) { if (POINTER_TYPE_P (TREE_TYPE (param))) { @@ -3851,6 +3931,12 @@ region_model::on_top_level_param (tree param, = m_mgr->get_or_create_initial_value (param_reg); const region *pointee_reg = m_mgr->get_symbolic_region (init_ptr_sval); m_store.mark_as_escaped (pointee_reg); + if (nonnull) + { + const svalue *null_ptr_sval + = m_mgr->get_or_create_null_ptr (TREE_TYPE (param)); + add_constraint (init_ptr_sval, NE_EXPR, null_ptr_sval, ctxt); + } } } @@ -3895,14 +3981,27 @@ region_model::push_frame (function *fun, const vec *arg_svals, have defined but unknown initial values. Anything they point to has escaped. */ tree fndecl = fun->decl; + + /* Handle "__attribute__((nonnull))". */ + tree fntype = TREE_TYPE (fndecl); + bitmap nonnull_args = get_nonnull_args (fntype); + + unsigned parm_idx = 0; for (tree iter_parm = DECL_ARGUMENTS (fndecl); iter_parm; iter_parm = DECL_CHAIN (iter_parm)) { + bool non_null = (nonnull_args + ? (bitmap_empty_p (nonnull_args) + || bitmap_bit_p (nonnull_args, parm_idx)) + : false); if (tree parm_default_ssa = ssa_default_def (fun, iter_parm)) - on_top_level_param (parm_default_ssa, ctxt); + on_top_level_param (parm_default_ssa, non_null, ctxt); else - on_top_level_param (iter_parm, ctxt); + on_top_level_param (iter_parm, non_null, ctxt); + parm_idx++; } + + BITMAP_FREE (nonnull_args); } return m_current_frame; @@ -3927,6 +4026,10 @@ region_model::get_current_function () const If OUT_RESULT is non-null, copy any return value from the frame into *OUT_RESULT. + If EVAL_RETURN_SVALUE is false, then don't evaluate the return value. + This is for use when unwinding frames e.g. due to longjmp, to suppress + erroneously reporting uninitialized return values. + Purge the frame region and all its descendent regions. Convert any pointers that point into such regions into POISON_KIND_POPPED_STACK svalues. */ @@ -3934,7 +4037,8 @@ region_model::get_current_function () const void region_model::pop_frame (tree result_lvalue, const svalue **out_result, - region_model_context *ctxt) + region_model_context *ctxt, + bool eval_return_svalue) { gcc_assert (m_current_frame); @@ -3943,7 +4047,9 @@ region_model::pop_frame (tree result_lvalue, tree fndecl = m_current_frame->get_function ()->decl; tree result = DECL_RESULT (fndecl); const svalue *retval = NULL; - if (result && TREE_TYPE (result) != void_type_node) + if (result + && TREE_TYPE (result) != void_type_node + && eval_return_svalue) { retval = get_rvalue (result, ctxt); if (out_result) @@ -3955,6 +4061,8 @@ region_model::pop_frame (tree result_lvalue, if (result_lvalue && retval) { + gcc_assert (eval_return_svalue); + /* Compute result_dst_reg using RESULT_LVALUE *after* popping the frame, but before poisoning pointers into the old frame. */ const region *result_dst_reg = get_lvalue (result_lvalue, ctxt); diff --git a/gcc/analyzer/region-model.h b/gcc/analyzer/region-model.h index eff3d4930f9b1..fc69b058820f1 100644 --- a/gcc/analyzer/region-model.h +++ b/gcc/analyzer/region-model.h @@ -247,6 +247,7 @@ class region_model_manager /* svalue consolidation. */ const svalue *get_or_create_constant_svalue (tree cst_expr); const svalue *get_or_create_int_cst (tree type, poly_int64); + const svalue *get_or_create_null_ptr (tree pointer_type); const svalue *get_or_create_unknown_svalue (tree type); const svalue *get_or_create_setjmp_svalue (const setjmp_record &r, tree type); @@ -665,7 +666,8 @@ class region_model function * get_current_function () const; void pop_frame (tree result_lvalue, const svalue **out_result, - region_model_context *ctxt); + region_model_context *ctxt, + bool eval_return_svalue = true); int get_stack_depth () const; const frame_region *get_frame_at_index (int index) const; @@ -821,7 +823,9 @@ class region_model int poison_any_pointers_to_descendents (const region *reg, enum poison_kind pkind); - void on_top_level_param (tree param, region_model_context *ctxt); + void on_top_level_param (tree param, + bool nonnull, + region_model_context *ctxt); bool called_from_main_p () const; const svalue *get_initial_value_for_global (const region *reg) const; diff --git a/gcc/analyzer/region.h b/gcc/analyzer/region.h index 5150be76d0ba0..b5855c5b2f933 100644 --- a/gcc/analyzer/region.h +++ b/gcc/analyzer/region.h @@ -396,10 +396,6 @@ class code_region : public space_region /* region vfuncs. */ void dump_to_pp (pretty_printer *pp, bool simple) const FINAL OVERRIDE; enum region_kind get_kind () const FINAL OVERRIDE { return RK_CODE; } - - const region *get_element (region_model *model, - const svalue *index, - region_model_context *ctxt); }; } // namespace ana @@ -435,10 +431,6 @@ class function_region : public region tree get_fndecl () const { return m_fndecl; } - region *get_element (region_model *model, - const svalue *index_sid, - region_model_context *ctxt); - private: tree m_fndecl; }; diff --git a/gcc/analyzer/sm-taint.cc b/gcc/analyzer/sm-taint.cc index 17669ae768562..70da585f39173 100644 --- a/gcc/analyzer/sm-taint.cc +++ b/gcc/analyzer/sm-taint.cc @@ -109,6 +109,9 @@ class taint_state_machine : public state_machine const supernode *node, const gcall *call, tree callee_fndecl) const; + void check_for_tainted_divisor (sm_context *sm_ctxt, + const supernode *node, + const gassign *assign) const; public: /* State for a "tainted" value: unsanitized data potentially under an @@ -792,18 +795,7 @@ taint_state_machine::on_stmt (sm_context *sm_ctxt, case ROUND_MOD_EXPR: case RDIV_EXPR: case EXACT_DIV_EXPR: - { - tree divisor = gimple_assign_rhs2 (assign);; - state_t state = sm_ctxt->get_state (stmt, divisor); - enum bounds b; - if (get_taint (state, TREE_TYPE (divisor), &b)) - { - tree diag_divisor = sm_ctxt->get_diagnostic_tree (divisor); - sm_ctxt->warn (node, stmt, divisor, - new tainted_divisor (*this, diag_divisor, b)); - sm_ctxt->set_next_state (stmt, divisor, m_stop); - } - } + check_for_tainted_divisor (sm_ctxt, node, assign); break; } } @@ -978,6 +970,41 @@ taint_state_machine::check_for_tainted_size_arg (sm_context *sm_ctxt, } } +/* Complain if ASSIGN (a division operation) has a tainted divisor + that could be zero. */ + +void +taint_state_machine::check_for_tainted_divisor (sm_context *sm_ctxt, + const supernode *node, + const gassign *assign) const +{ + const region_model *old_model = sm_ctxt->get_old_region_model (); + if (!old_model) + return; + + tree divisor_expr = gimple_assign_rhs2 (assign);; + const svalue *divisor_sval = old_model->get_rvalue (divisor_expr, NULL); + + state_t state = sm_ctxt->get_state (assign, divisor_sval); + enum bounds b; + if (get_taint (state, TREE_TYPE (divisor_expr), &b)) + { + const svalue *zero_sval + = old_model->get_manager ()->get_or_create_int_cst + (TREE_TYPE (divisor_expr), 0); + tristate ts + = old_model->eval_condition (divisor_sval, NE_EXPR, zero_sval); + if (ts.is_true ()) + /* The divisor is known to not equal 0: don't warn. */ + return; + + tree diag_divisor = sm_ctxt->get_diagnostic_tree (divisor_expr); + sm_ctxt->warn (node, assign, divisor_expr, + new tainted_divisor (*this, diag_divisor, b)); + sm_ctxt->set_next_state (assign, divisor_sval, m_stop); + } +} + } // anonymous namespace /* Internal interface to this file. */ diff --git a/gcc/analyzer/sm.cc b/gcc/analyzer/sm.cc index 515f86da86a0a..09ad68b222472 100644 --- a/gcc/analyzer/sm.cc +++ b/gcc/analyzer/sm.cc @@ -40,6 +40,7 @@ along with GCC; see the file COPYING3. If not see #include "analyzer/program-point.h" #include "analyzer/store.h" #include "analyzer/svalue.h" +#include "analyzer/program-state.h" #if ENABLE_ANALYZER @@ -159,6 +160,17 @@ state_machine::to_json () const return sm_obj; } +/* class sm_context. */ + +const region_model * +sm_context::get_old_region_model () const +{ + if (const program_state *old_state = get_old_program_state ()) + return old_state->m_region_model; + else + return NULL; +} + /* Create instances of the various state machines, each using LOGGER, and populate OUT with them. */ diff --git a/gcc/analyzer/sm.h b/gcc/analyzer/sm.h index 7ce1c73e217aa..e3e9a8d557b66 100644 --- a/gcc/analyzer/sm.h +++ b/gcc/analyzer/sm.h @@ -278,6 +278,8 @@ class sm_context const svalue *get_old_svalue (tree expr) const; + const region_model *get_old_region_model () const; + protected: sm_context (int sm_idx, const state_machine &sm) : m_sm_idx (sm_idx), m_sm (sm) {} diff --git a/gcc/analyzer/state-purge.cc b/gcc/analyzer/state-purge.cc index 7a061a194808d..4524b83b55668 100644 --- a/gcc/analyzer/state-purge.cc +++ b/gcc/analyzer/state-purge.cc @@ -70,6 +70,8 @@ get_candidate_for_purging (tree node) default: return NULL_TREE; + case ADDR_EXPR: + case MEM_REF: case COMPONENT_REF: iter = TREE_OPERAND (iter, 0); continue; @@ -925,7 +927,20 @@ process_point_backwards (const function_point &point, { /* This is somewhat equivalent to how the SSA case handles def-stmts. */ - if (fully_overwrites_p (point.get_stmt (), m_decl, model)) + if (fully_overwrites_p (point.get_stmt (), m_decl, model) + /* ...but we mustn't be at a point that also consumes the + current value of the decl when it's generating the new + value, for cases such as + struct st s; + s = foo (); + s = bar (s); + where we want to make sure that we don't stop at the: + s = bar (s); + since otherwise we would erroneously purge the state of "s" + after: + s = foo (); + */ + && !m_points_needing_decl.contains (point)) { if (logger) logger->log ("stmt fully overwrites %qE; terminating", m_decl); diff --git a/gcc/analyzer/store.cc b/gcc/analyzer/store.cc index 35f66a4b6fcf8..f5f8fe061f570 100644 --- a/gcc/analyzer/store.cc +++ b/gcc/analyzer/store.cc @@ -1519,6 +1519,18 @@ binding_cluster::get_any_binding (store_manager *mgr, = get_binding_recursive (mgr, reg)) return direct_sval; + /* If we had a write to a cluster of unknown size, we might + have a self-binding of the whole base region with an svalue, + where the base region is symbolic. + Handle such cases by returning sub_svalue instances. */ + if (const svalue *cluster_sval = maybe_get_simple_value (mgr)) + { + /* Extract child svalue from parent svalue. */ + region_model_manager *rmm_mgr = mgr->get_svalue_manager (); + return rmm_mgr->get_or_create_sub_svalue (reg->get_type (), + cluster_sval, reg); + } + /* If this cluster has been touched by a symbolic write, then the content of any subregion not currently specifically bound is "UNKNOWN". */ if (m_touched) diff --git a/gcc/asan.cc b/gcc/asan.cc index ef59b77ebc2e5..f7c309d50dfae 100644 --- a/gcc/asan.cc +++ b/gcc/asan.cc @@ -64,6 +64,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-inline.h" #include "tree-ssa.h" #include "tree-eh.h" +#include "diagnostic-core.h" /* AddressSanitizer finds out-of-bounds and use-after-free bugs with <2x slowdown on average. @@ -1285,7 +1286,20 @@ has_stmt_been_instrumented_p (gimple *stmt) if (get_mem_ref_of_assignment (as_a (stmt), &r, &r_is_store)) - return has_mem_ref_been_instrumented (&r); + { + if (!has_mem_ref_been_instrumented (&r)) + return false; + if (r_is_store && gimple_assign_load_p (stmt)) + { + asan_mem_ref src; + asan_mem_ref_init (&src, NULL, 1); + src.start = gimple_assign_rhs1 (stmt); + src.access_size = int_size_in_bytes (TREE_TYPE (src.start)); + if (!has_mem_ref_been_instrumented (&src)) + return false; + } + return true; + } } else if (gimple_call_builtin_p (stmt, BUILT_IN_NORMAL)) { @@ -1805,6 +1819,11 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb, tree str_cst, decl, id; int use_after_return_class = -1; + /* Don't emit anything when doing error recovery, the assertions + might fail e.g. if a function had a frame offset overflow. */ + if (seen_error ()) + return NULL; + if (shadow_ptr_types[0] == NULL_TREE) asan_init_shadow_ptr_types (); @@ -1850,19 +1869,39 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb, } str_cst = asan_pp_string (&asan_pp); + gcc_checking_assert (offsets[0] == (crtl->stack_protect_guard + ? -ASAN_RED_ZONE_SIZE : 0)); /* Emit the prologue sequence. */ if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase && param_asan_use_after_return) { + HOST_WIDE_INT adjusted_frame_size = asan_frame_size; + /* The stack protector guard is allocated at the top of the frame + and cfgexpand.cc then uses align_frame_offset (ASAN_RED_ZONE_SIZE); + while in that case we can still use asan_frame_size, we need to take + that into account when computing base_align_bias. */ + if (alignb > ASAN_RED_ZONE_SIZE && crtl->stack_protect_guard) + adjusted_frame_size += ASAN_RED_ZONE_SIZE; use_after_return_class = floor_log2 (asan_frame_size - 1) - 5; /* __asan_stack_malloc_N guarantees alignment N < 6 ? (64 << N) : 4096 bytes. */ if (alignb > (use_after_return_class < 6 ? (64U << use_after_return_class) : 4096U)) use_after_return_class = -1; - else if (alignb > ASAN_RED_ZONE_SIZE && (asan_frame_size & (alignb - 1))) - base_align_bias = ((asan_frame_size + alignb - 1) - & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size; + else if (alignb > ASAN_RED_ZONE_SIZE + && (adjusted_frame_size & (alignb - 1))) + { + base_align_bias + = ((adjusted_frame_size + alignb - 1) + & ~(alignb - HOST_WIDE_INT_1)) - adjusted_frame_size; + use_after_return_class + = floor_log2 (asan_frame_size + base_align_bias - 1) - 5; + if (use_after_return_class > 10) + { + base_align_bias = 0; + use_after_return_class = -1; + } + } } /* Align base if target is STRICT_ALIGNMENT. */ @@ -2232,6 +2271,8 @@ asan_protect_global (tree decl, bool ignore_decl_rtl_set_p) || (DECL_SECTION_NAME (decl) != NULL && !symtab_node::get (decl)->implicit_section && !section_sanitized_p (DECL_SECTION_NAME (decl))) + /* Don't protect variables in non-generic address-space. */ + || !ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))) || DECL_SIZE (decl) == 0 || ASAN_RED_ZONE_SIZE * BITS_PER_UNIT > MAX_OFILE_ALIGNMENT || TREE_CODE (DECL_SIZE_UNIT (decl)) != INTEGER_CST @@ -2691,6 +2732,10 @@ instrument_derefs (gimple_stmt_iterator *iter, tree t, if (VAR_P (inner) && DECL_HARD_REGISTER (inner)) return; + /* Accesses to non-generic address-spaces should not be instrumented. */ + if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (inner)))) + return; + poly_int64 decl_size; if ((VAR_P (inner) || TREE_CODE (inner) == RESULT_DECL) && offset == NULL_TREE @@ -3227,7 +3272,17 @@ asan_add_global (tree decl, tree type, vec *v) pp_string (&asan_pp, ""); str_cst = asan_pp_string (&asan_pp); - pp_string (&module_name_pp, main_input_filename); + if (!in_lto_p) + pp_string (&module_name_pp, main_input_filename); + else + { + const_tree tu = get_ultimate_context ((const_tree)decl); + if (tu != NULL_TREE) + pp_string (&module_name_pp, IDENTIFIER_POINTER (DECL_NAME (tu))); + else + pp_string (&module_name_pp, aux_base_name); + } + module_name_cst = asan_pp_string (&module_name_pp); if (asan_needs_local_alias (decl)) @@ -3717,9 +3772,7 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter) } tree len = gimple_call_arg (g, 2); - gcc_assert (tree_fits_shwi_p (len)); - unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len); - gcc_assert (size_in_bytes); + gcc_assert (poly_int_tree_p (len)); g = gimple_build_assign (make_ssa_name (pointer_sized_int_node), NOP_EXPR, base); @@ -3728,9 +3781,10 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter) tree base_addr = gimple_assign_lhs (g); /* Generate direct emission if size_in_bytes is small. */ - if (size_in_bytes - <= (unsigned)param_use_after_scope_direct_emission_threshold) + unsigned threshold = param_use_after_scope_direct_emission_threshold; + if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold) { + unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len); const unsigned HOST_WIDE_INT shadow_size = shadow_mem_size (size_in_bytes); const unsigned int shadow_align diff --git a/gcc/attr-fnspec.h b/gcc/attr-fnspec.h index d506c75a6a631..f12cada681614 100644 --- a/gcc/attr-fnspec.h +++ b/gcc/attr-fnspec.h @@ -54,7 +54,7 @@ ' ' nothing is known 't' the size of value written/read corresponds to the size of of the pointed-to type of the argument type - '1'...'9' specifies the size of value written/read is given by the + '1'...'9' specifies the size of value written/read is bound by the specified argument */ @@ -169,7 +169,7 @@ class attr_fnspec && str[idx] != 'x' && str[idx] != 'X'; } - /* Return true if load of memory pointed to by argument I is specified + /* Return true if load of memory pointed to by argument I is bound by another argument. In this case set ARG. */ bool arg_max_access_size_given_by_arg_p (unsigned int i, unsigned int *arg) diff --git a/gcc/attribs.cc b/gcc/attribs.cc index b219f878042f2..3bf4253ebc4db 100644 --- a/gcc/attribs.cc +++ b/gcc/attribs.cc @@ -109,15 +109,6 @@ static const struct attribute_spec empty_attribute_table[] = { NULL, 0, 0, false, false, false, false, NULL, NULL } }; -/* Return base name of the attribute. Ie '__attr__' is turned into 'attr'. - To avoid need for copying, we simply return length of the string. */ - -static void -extract_attribute_substring (struct substring *str) -{ - canonicalize_attr_name (str->str, str->length); -} - /* Insert an array of attributes ATTRIBUTES into a namespace. This array must be NULL terminated. NS is the name of attribute namespace. IGNORED_P is true iff all unknown attributes in this @@ -409,7 +400,6 @@ lookup_scoped_attribute_spec (const_tree ns, const_tree name) attr.str = IDENTIFIER_POINTER (name); attr.length = IDENTIFIER_LENGTH (name); - extract_attribute_substring (&attr); return attrs->attribute_hash->find_with_hash (&attr, substring_hash (attr.str, attr.length)); @@ -489,7 +479,12 @@ diag_attr_exclusions (tree last_decl, tree node, tree attrname, if (DECL_P (node)) { attrs[0] = DECL_ATTRIBUTES (node); - attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node)); + if (TREE_TYPE (node)) + attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node)); + else + /* TREE_TYPE can be NULL e.g. while processing attributes on + enumerators. */ + attrs[1] = NULL_TREE; } else { @@ -578,9 +573,9 @@ attribute_ignored_p (tree attr) return false; if (tree ns = get_attribute_namespace (attr)) { - if (attr_namespace_ignored_p (ns)) - return true; const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr)); + if (as == NULL && attr_namespace_ignored_p (ns)) + return true; if (as && as->max_length == -2) return true; } @@ -851,7 +846,10 @@ decl_attributes (tree *node, tree attributes, int flags, } } - if (no_add_attrs) + if (no_add_attrs + /* Don't add attributes registered just for -Wno-attributes=foo::bar + purposes. */ + || attribute_ignored_p (attr)) continue; if (spec->handler != NULL) diff --git a/gcc/bb-reorder.cc b/gcc/bb-reorder.cc index d20ccb83aa67a..ef2a192351189 100644 --- a/gcc/bb-reorder.cc +++ b/gcc/bb-reorder.cc @@ -1998,6 +1998,7 @@ fix_up_fall_thru_edges (void) becomes EDGE_CROSSING. */ fall_thru->flags &= ~EDGE_CROSSING; + unsigned old_count = EDGE_COUNT (cur_bb->succs); basic_block new_bb = force_nonfallthru (fall_thru); if (new_bb) @@ -2009,7 +2010,25 @@ fix_up_fall_thru_edges (void) gcc_assert (BB_PARTITION (new_bb) == BB_PARTITION (cur_bb)); - single_succ_edge (new_bb)->flags |= EDGE_CROSSING; + edge e = single_succ_edge (new_bb); + e->flags |= EDGE_CROSSING; + if (EDGE_COUNT (cur_bb->succs) > old_count) + { + /* If asm goto has a crossing fallthrough edge + and at least one of the labels to the same bb, + force_nonfallthru can result in the fallthrough + edge being redirected and a new edge added for the + label or more labels to e->dest. As we've + temporarily cleared EDGE_CROSSING flag on the + fallthrough edge, we need to restore it again. + See PR108596. */ + rtx_insn *j = BB_END (cur_bb); + gcc_checking_assert (JUMP_P (j) + && asm_noperands (PATTERN (j))); + edge e2 = find_edge (cur_bb, e->dest); + if (e2) + e2->flags |= EDGE_CROSSING; + } } else { @@ -2247,7 +2266,8 @@ fix_crossing_unconditional_branches (void) /* Make sure the jump is not already an indirect or table jump. */ if (!computed_jump_p (last_insn) - && !tablejump_p (last_insn, NULL, NULL)) + && !tablejump_p (last_insn, NULL, NULL) + && asm_noperands (PATTERN (last_insn)) < 0) { /* We have found a "crossing" unconditional branch. Now we must convert it to an indirect jump. First create diff --git a/gcc/bitmap.cc b/gcc/bitmap.cc index 88c329f932503..601c04e2e13ba 100644 --- a/gcc/bitmap.cc +++ b/gcc/bitmap.cc @@ -2673,7 +2673,7 @@ bitmap_hash (const_bitmap head) for (ix = 0; ix != BITMAP_ELEMENT_WORDS; ix++) hash ^= ptr->bits[ix]; } - return (hashval_t)hash; + return iterative_hash (&hash, sizeof (hash), 0); } diff --git a/gcc/builtins.cc b/gcc/builtins.cc index 5b085e3a14f5e..f91947020b696 100644 --- a/gcc/builtins.cc +++ b/gcc/builtins.cc @@ -1360,7 +1360,7 @@ expand_builtin_prefetch (tree exp) rtx get_memory_rtx (tree exp, tree len) { - tree orig_exp = exp; + tree orig_exp = exp, base; rtx addr, mem; /* When EXP is not resolved SAVE_EXPR, MEM_ATTRS can be still derived @@ -1391,10 +1391,11 @@ get_memory_rtx (tree exp, tree len) if (is_gimple_mem_ref_addr (TREE_OPERAND (exp, 0))) set_mem_attributes (mem, exp, 0); else if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR - && (exp = get_base_address (TREE_OPERAND (TREE_OPERAND (exp, 0), - 0)))) + && (base = get_base_address (TREE_OPERAND (TREE_OPERAND (exp, 0), + 0)))) { - exp = build_fold_addr_expr (exp); + unsigned int align = get_pointer_alignment (TREE_OPERAND (exp, 0)); + exp = build_fold_addr_expr (base); exp = fold_build2 (MEM_REF, build_array_type (char_type_node, build_range_type (sizetype, @@ -1402,6 +1403,10 @@ get_memory_rtx (tree exp, tree len) NULL)), exp, build_int_cst (ptr_type_node, 0)); set_mem_attributes (mem, exp, 0); + /* Since we stripped parts make sure the offset is unknown and the + alignment is computed from the original address. */ + clear_mem_offset (mem); + set_mem_align (mem, align); } set_mem_alias_set (mem, 0); return mem; @@ -6224,7 +6229,7 @@ expand_ifn_atomic_bit_test_and (gcall *call) gcc_assert (flag_inline_atomics); - if (gimple_call_num_args (call) == 4) + if (gimple_call_num_args (call) == 5) model = get_memmodel (gimple_call_arg (call, 3)); rtx mem = get_builtin_sync_mem (ptr, mode); @@ -6250,15 +6255,19 @@ expand_ifn_atomic_bit_test_and (gcall *call) if (lhs == NULL_TREE) { - val = expand_simple_binop (mode, ASHIFT, const1_rtx, - val, NULL_RTX, true, OPTAB_DIRECT); + rtx val2 = expand_simple_binop (mode, ASHIFT, const1_rtx, + val, NULL_RTX, true, OPTAB_DIRECT); if (code == AND) - val = expand_simple_unop (mode, NOT, val, NULL_RTX, true); - expand_atomic_fetch_op (const0_rtx, mem, val, code, model, false); - return; + val2 = expand_simple_unop (mode, NOT, val2, NULL_RTX, true); + if (expand_atomic_fetch_op (const0_rtx, mem, val2, code, model, false)) + return; } - rtx target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE); + rtx target; + if (lhs) + target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE); + else + target = gen_reg_rtx (mode); enum insn_code icode = direct_optab_handler (optab, mode); gcc_assert (icode != CODE_FOR_nothing); create_output_operand (&ops[0], target, mode); @@ -6277,6 +6286,22 @@ expand_ifn_atomic_bit_test_and (gcall *call) val = expand_simple_unop (mode, NOT, val, NULL_RTX, true); rtx result = expand_atomic_fetch_op (gen_reg_rtx (mode), mem, val, code, model, false); + if (!result) + { + bool is_atomic = gimple_call_num_args (call) == 5; + tree tcall = gimple_call_arg (call, 3 + is_atomic); + tree fndecl = gimple_call_addr_fndecl (tcall); + tree type = TREE_TYPE (TREE_TYPE (fndecl)); + tree exp = build_call_nary (type, tcall, 2 + is_atomic, ptr, + make_tree (type, val), + is_atomic + ? gimple_call_arg (call, 3) + : integer_zero_node); + result = expand_builtin (exp, gen_reg_rtx (mode), NULL_RTX, + mode, !lhs); + } + if (!lhs) + return; if (integer_onep (flag)) { result = expand_simple_binop (mode, ASHIFTRT, result, bitval, @@ -6308,7 +6333,7 @@ expand_ifn_atomic_op_fetch_cmp_0 (gcall *call) gcc_assert (flag_inline_atomics); - if (gimple_call_num_args (call) == 4) + if (gimple_call_num_args (call) == 5) model = get_memmodel (gimple_call_arg (call, 3)); rtx mem = get_builtin_sync_mem (ptr, mode); @@ -6369,6 +6394,21 @@ expand_ifn_atomic_op_fetch_cmp_0 (gcall *call) rtx result = expand_atomic_fetch_op (gen_reg_rtx (mode), mem, op, code, model, true); + if (!result) + { + bool is_atomic = gimple_call_num_args (call) == 5; + tree tcall = gimple_call_arg (call, 3 + is_atomic); + tree fndecl = gimple_call_addr_fndecl (tcall); + tree type = TREE_TYPE (TREE_TYPE (fndecl)); + tree exp = build_call_nary (type, tcall, + 2 + is_atomic, ptr, arg, + is_atomic + ? gimple_call_arg (call, 3) + : integer_zero_node); + result = expand_builtin (exp, gen_reg_rtx (mode), NULL_RTX, + mode, !lhs); + } + if (lhs) { result = emit_store_flag_force (target, comp, result, const0_rtx, mode, @@ -9140,7 +9180,21 @@ fold_builtin_arith_overflow (location_t loc, enum built_in_function fcode, tree ctype = build_complex_type (type); tree call = build_call_expr_internal_loc (loc, ifn, ctype, 2, arg0, arg1); - tree tgt = save_expr (call); + tree tgt; + if (ovf_only) + { + tgt = call; + intres = NULL_TREE; + } + else + { + /* Force SAVE_EXPR even for calls which satisfy tree_invariant_p_1, + as while the call itself is const, the REALPART_EXPR store is + certainly not. And in any case, we want just one call, + not multiple and trying to CSE them later. */ + TREE_SIDE_EFFECTS (call) = 1; + tgt = save_expr (call); + } intres = build1_loc (loc, REALPART_EXPR, type, tgt); ovfres = build1_loc (loc, IMAGPART_EXPR, type, tgt); ovfres = fold_convert_loc (loc, boolean_type_node, ovfres); diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index d7447d07afbff..a6539dbd40b39 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,224 @@ +2024-06-20 Jakub Jelinek + + Backported from master: + 2024-06-17 Jakub Jelinek + + PR c/115290 + * c-warn.cc (do_warn_array_compare): Use %E rather than %D for + printing op0 and op1; if those operands aren't decls, also print + parens around them. + +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-02-22 Jakub Jelinek + + PR c/114007 + * c-lex.cc (c_common_has_attribute): Parse 2 CPP_COLONs with + the first one with COLON_SCOPE flag the same as CPP_SCOPE but + ensure 0 is returned then. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-01-09 Jakub Jelinek + + PR c/113262 + * c-attribs.cc (handle_copy_attribute): Don't use + DECL_SOURCE_LOCATION (decl) if decl is not DECL_P, use input_location + instead. Formatting fixes. + +2024-05-08 Andrew Pinski + + Backported from master: + 2024-05-07 Andrew Pinski + + PR c++/89224 + * c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type + for the inner type. + +2024-01-27 Lewis Hyatt + + PR preprocessor/105608 + * c-pch.cc (c_common_read_pch): Start a new line map before asking + libcpp to restore macros defined prior to reading the PCH, instead + of afterward. + +2023-12-15 Richard Biener + + Backported from master: + 2023-08-31 Richard Biener + + PR middle-end/111253 + * c-pretty-print.cc (c_pretty_printer::primary_expression): + Only dump gimple_assign_single_p SSA def RHS. + +2023-05-19 Patrick Palka + + Backported from master: + 2023-05-15 Patrick Palka + + * c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_auto_cast + for C++23. + +2023-05-09 Martin Uecker + + Backported from master: + 2023-02-18 Martin Uecker + + PR c/105660 + * c-attribs.cc (append_access_attr): Use order of arguments when + construction string. + (append_access_attr_idxs): Rename and make static. + * c-warn.cc (warn_parm_array_mismatch): Add assertion. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-04-18 Jason Merrill + + PR c++/107163 + * c-common.cc (verify_tree): Don't use sequenced handling + for COMPONENT_REF. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-17 Jakub Jelinek + + PR c/109151 + * c-ubsan.cc (ubsan_instrument_division): Handle all scalar integral + types rather than just INTEGER_TYPE. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-04 Jakub Jelinek + + PR c/107465 + * c-warn.cc (warn_for_sign_compare): Don't warn for unset bits + above innermost zero extension of BIT_NOT_EXPR result. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-04 Jakub Jelinek + + PR c/107465 + * c-warn.cc (warn_for_sign_compare): If c_common_get_narrower + doesn't return a narrower result, use TYPE_UNSIGNED to set unsignedp0 + and unsignedp1. For the one BIT_NOT_EXPR case vs. one without, + only check for constant in the non-BIT_NOT_EXPR operand, use std::swap + to simplify the code, only warn if BIT_NOT_EXPR operand is extended + from narrower unsigned, fix up computation of mask for the constant + cases and for unsigned other operand case handle differently + BIT_NOT_EXPR result being sign vs. zero extended. + +2023-03-15 Marek Polacek + + Backported from master: + 2023-03-10 Marek Polacek + + PR sanitizer/108060 + PR sanitizer/109050 + * c-gimplify.cc (ubsan_walk_array_refs_r): For a MODIFY_EXPR, instrument + the RHS before the LHS. + +2023-03-04 Marek Polacek + + Backported from master: + 2023-02-22 Marek Polacek + + PR c/108880 + * c-gimplify.cc (c_genericize_control_stmt) : Pass + pset to walk_tree_1. + (c_genericize): Call walk_tree with an explicit pset. + +2023-03-04 Marek Polacek + + Backported from master: + 2023-02-28 Marek Polacek + + PR c++/107938 + * c-warn.cc (check_address_or_pointer_of_packed_member): Check + POINTER_TYPE_P. + +2023-02-10 Marek Polacek + + Backported from master: + 2022-08-11 Marek Polacek + + PR middle-end/102633 + * c-gimplify.cc (c_gimplify_expr) : Don't call + suppress_warning here. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-11-23 Andrew Pinski + Jakub Jelinek + + PR c/107127 + * c-gimplify.cc (c_genericize): Use walk_tree_without_duplicates + instead of walk_tree for c_genericize_control_r. + +2023-01-31 Marek Polacek + + PR c++/107593 + PR c++/108597 + * c-common.h (instantiation_dependent_expression_p): Declare. + * c-warn.cc (warn_duplicated_cond_add_or_warn): If the condition + is dependent, invalidate the chain. + +2022-12-19 Marek Polacek + + Backported from master: + 2022-12-19 Marek Polacek + + PR c/98487 + * c-format.cc (check_function_format): Use get_attribute_name. + +2022-09-27 Marek Polacek + + * c-format.cc (c_keywords): Drop nothrow. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-07-06 Jonathan Wakely + + Backported from master: + 2022-06-30 Jonathan Wakely + + * known-headers.cc (get_stdlib_header_for_name): Add + names. + +2022-07-06 Marek Polacek + + Backported from master: + 2022-07-05 Marek Polacek + + PR c++/105626 + * c-format.cc (check_format_arg): Don't emit -Wformat warnings with + u8 strings. + +2022-05-18 Eric Botcazou + + * c-ada-spec.cc (dump_ada_node) : Deal with usual + floating-point complex types. + : Do not use limited_with clause if the designated + type is a scalar type. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-26 Patrick Palka PR c++/105304 diff --git a/gcc/c-family/c-ada-spec.cc b/gcc/c-family/c-ada-spec.cc index f291e150934da..faf71742522bd 100644 --- a/gcc/c-family/c-ada-spec.cc +++ b/gcc/c-family/c-ada-spec.cc @@ -2105,6 +2105,21 @@ dump_ada_node (pretty_printer *buffer, tree node, tree type, int spc, append_withs ("Interfaces.C.Extensions", false); pp_string (buffer, "Extensions.CFloat_128"); } + else if (TREE_TYPE (node) == float_type_node) + { + append_withs ("Ada.Numerics.Complex_Types", false); + pp_string (buffer, "Ada.Numerics.Complex_Types.Complex"); + } + else if (TREE_TYPE (node) == double_type_node) + { + append_withs ("Ada.Numerics.Long_Complex_Types", false); + pp_string (buffer, "Ada.Numerics.Long_Complex_Types.Complex"); + } + else if (TREE_TYPE (node) == long_double_type_node) + { + append_withs ("Ada.Numerics.Long_Long_Complex_Types", false); + pp_string (buffer, "Ada.Numerics.Long_Long_Complex_Types.Complex"); + } else pp_string (buffer, ""); break; @@ -2190,7 +2205,7 @@ dump_ada_node (pretty_printer *buffer, tree node, tree type, int spc, { tree ref_type = TREE_TYPE (node); const unsigned int quals = TYPE_QUALS (ref_type); - bool is_access = false; + bool is_access; if (VOID_TYPE_P (ref_type)) { @@ -2242,7 +2257,10 @@ dump_ada_node (pretty_printer *buffer, tree node, tree type, int spc, } if (!package_prefix) - pp_string (buffer, "access"); + { + is_access = false; + pp_string (buffer, "access"); + } else if (AGGREGATE_TYPE_P (ref_type)) { if (!type || TREE_CODE (type) != FUNCTION_DECL) @@ -2256,17 +2274,21 @@ dump_ada_node (pretty_printer *buffer, tree node, tree type, int spc, pp_string (buffer, "all "); } else if (quals & TYPE_QUAL_CONST) - pp_string (buffer, "in "); + { + is_access = false; + pp_string (buffer, "in "); + } else { is_access = true; pp_string (buffer, "access "); - /* ??? should be configurable: access or in out. */ } } else { - is_access = true; + /* We want to use regular with clauses for scalar types, + as they are not involved in circular declarations. */ + is_access = false; pp_string (buffer, "access "); if (!name_only) diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc index 111a33f405ac1..88f026336c974 100644 --- a/gcc/c-family/c-attribs.cc +++ b/gcc/c-family/c-attribs.cc @@ -2820,13 +2820,14 @@ handle_copy_attribute (tree *node, tree name, tree args, if (ref == error_mark_node) return NULL_TREE; + location_t loc = input_location; + if (DECL_P (decl)) + loc = DECL_SOURCE_LOCATION (decl); if (TREE_CODE (ref) == STRING_CST) { /* Explicitly handle this case since using a string literal as an argument is a likely mistake. */ - error_at (DECL_SOURCE_LOCATION (decl), - "%qE attribute argument cannot be a string", - name); + error_at (loc, "%qE attribute argument cannot be a string", name); return NULL_TREE; } @@ -2837,10 +2838,8 @@ handle_copy_attribute (tree *node, tree name, tree args, /* Similar to the string case, since some function attributes accept literal numbers as arguments (e.g., alloc_size or nonnull) using one here is a likely mistake. */ - error_at (DECL_SOURCE_LOCATION (decl), - "%qE attribute argument cannot be a constant arithmetic " - "expression", - name); + error_at (loc, "%qE attribute argument cannot be a constant arithmetic " + "expression", name); return NULL_TREE; } @@ -2848,12 +2847,11 @@ handle_copy_attribute (tree *node, tree name, tree args, { /* Another possible mistake (but indirect self-references aren't and diagnosed and shouldn't be). */ - if (warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes, + if (warning_at (loc, OPT_Wattributes, "%qE attribute ignored on a redeclaration " - "of the referenced symbol", - name)) - inform (DECL_SOURCE_LOCATION (node[1]), - "previous declaration here"); + "of the referenced symbol", name) + && DECL_P (node[1])) + inform (DECL_SOURCE_LOCATION (node[1]), "previous declaration here"); return NULL_TREE; } @@ -2873,7 +2871,8 @@ handle_copy_attribute (tree *node, tree name, tree args, ref = TREE_OPERAND (ref, 1); else break; - } while (!DECL_P (ref)); + } + while (!DECL_P (ref)); /* For object pointer expressions, consider those to be requests to copy from their type, such as in: @@ -2905,8 +2904,7 @@ handle_copy_attribute (tree *node, tree name, tree args, to a variable, or variable attributes to a function. */ if (warning (OPT_Wattributes, "%qE attribute ignored on a declaration of " - "a different kind than referenced symbol", - name) + "a different kind than referenced symbol", name) && DECL_P (ref)) inform (DECL_SOURCE_LOCATION (ref), "symbol %qD referenced by %qD declared here", ref, decl); @@ -2956,9 +2954,7 @@ handle_copy_attribute (tree *node, tree name, tree args, } else if (!TYPE_P (decl)) { - error_at (DECL_SOURCE_LOCATION (decl), - "%qE attribute must apply to a declaration", - name); + error_at (loc, "%qE attribute must apply to a declaration", name); return NULL_TREE; } @@ -4624,22 +4620,27 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, rdwr_map cur_idxs; init_attr_rdwr_indices (&cur_idxs, attrs); + tree args = TYPE_ARG_TYPES (node[0]); + int argpos = 0; std::string spec; - for (auto it = new_idxs.begin (); it != new_idxs.end (); ++it) + for (tree arg = args; arg; arg = TREE_CHAIN (arg), argpos++) { - const auto &newaxsref = *it; + const attr_access* const newa = new_idxs.get (argpos); + + if (!newa) + continue; /* The map has two equal entries for each pointer argument that has an associated size argument. Process just the entry for the former. */ - if ((unsigned)newaxsref.first != newaxsref.second.ptrarg) + if ((unsigned)argpos != newa->ptrarg) continue; - const attr_access* const cura = cur_idxs.get (newaxsref.first); + const attr_access* const cura = cur_idxs.get (argpos); if (!cura) { /* The new attribute needs to be added. */ - tree str = newaxsref.second.to_internal_string (); + tree str = newa->to_internal_string (); spec += TREE_STRING_POINTER (str); continue; } @@ -4647,7 +4648,6 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, /* The new access spec refers to an array/pointer argument for which an access spec already exists. Check and diagnose any conflicts. If no conflicts are found, merge the two. */ - const attr_access* const newa = &newaxsref.second; if (!attrstr) { @@ -4782,7 +4782,7 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, continue; /* Merge the CURA and NEWA. */ - attr_access merged = newaxsref.second; + attr_access merged = *newa; /* VLA seen in a declaration takes precedence. */ if (cura->minsize == HOST_WIDE_INT_M1U) @@ -4808,9 +4808,9 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, /* Convenience wrapper for the above. */ -tree -append_access_attr (tree node[3], tree attrs, const char *attrstr, - char code, HOST_WIDE_INT idxs[2]) +static tree +append_access_attr_idxs (tree node[3], tree attrs, const char *attrstr, + char code, HOST_WIDE_INT idxs[2]) { char attrspec[80]; int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1); @@ -5101,7 +5101,7 @@ handle_access_attribute (tree node[3], tree name, tree args, int flags, attributes specified on previous declarations of the same type and if not, concatenate the two. */ const char code = attr_access::mode_chars[mode]; - tree new_attrs = append_access_attr (node, attrs, attrstr, code, idxs); + tree new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs); if (!new_attrs) return NULL_TREE; @@ -5114,7 +5114,7 @@ handle_access_attribute (tree node[3], tree name, tree args, int flags, { /* Repeat for the previously declared type. */ attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1])); - new_attrs = append_access_attr (node, attrs, attrstr, code, idxs); + new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs); if (!new_attrs) return NULL_TREE; diff --git a/gcc/c-family/c-common.cc b/gcc/c-family/c-common.cc index bb0544eeaea79..94bef24220b4d 100644 --- a/gcc/c-family/c-common.cc +++ b/gcc/c-family/c-common.cc @@ -2178,12 +2178,17 @@ verify_tree (tree x, struct tlist **pbefore_sp, struct tlist **pno_sp, case LSHIFT_EXPR: case RSHIFT_EXPR: - case COMPONENT_REF: case ARRAY_REF: if (cxx_dialect >= cxx17) goto sequenced_binary; goto do_default; + case COMPONENT_REF: + /* Treat as unary, the other operands aren't evaluated. */ + x = TREE_OPERAND (x, 0); + writer = 0; + goto restart; + default: do_default: /* For other expressions, simply recurse on their operands. @@ -8506,6 +8511,7 @@ convert_vector_to_array_for_subscript (location_t loc, if (gnu_vector_type_p (TREE_TYPE (*vecp))) { tree type = TREE_TYPE (*vecp); + tree newitype; ret = !lvalue_p (*vecp); @@ -8520,8 +8526,12 @@ convert_vector_to_array_for_subscript (location_t loc, for function parameters. */ c_common_mark_addressable_vec (*vecp); + /* Make sure qualifiers are copied from the vector type to the new element + of the array type. */ + newitype = build_qualified_type (TREE_TYPE (type), TYPE_QUALS (type)); + *vecp = build1 (VIEW_CONVERT_EXPR, - build_array_type_nelts (TREE_TYPE (type), + build_array_type_nelts (newitype, TYPE_VECTOR_SUBPARTS (type)), *vecp); } diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h index 52a85bfb78308..3d5b9c40e6b37 100644 --- a/gcc/c-family/c-common.h +++ b/gcc/c-family/c-common.h @@ -1049,6 +1049,7 @@ extern tree finish_label_address_expr (tree, location_t); extern tree lookup_label (tree); extern tree lookup_name (tree); extern bool lvalue_p (const_tree); +extern bool instantiation_dependent_expression_p (tree); extern bool vector_targets_convertible_p (const_tree t1, const_tree t2); extern bool vector_types_convertible_p (const_tree t1, const_tree t2, bool emit_lax_note); diff --git a/gcc/c-family/c-cppbuiltin.cc b/gcc/c-family/c-cppbuiltin.cc index 4672ae8486a74..c1b86c1fac097 100644 --- a/gcc/c-family/c-cppbuiltin.cc +++ b/gcc/c-family/c-cppbuiltin.cc @@ -1080,6 +1080,7 @@ c_cpp_builtins (cpp_reader *pfile) cpp_define (pfile, "__cpp_if_consteval=202106L"); cpp_define (pfile, "__cpp_constexpr=202110L"); cpp_define (pfile, "__cpp_multidimensional_subscript=202110L"); + cpp_define (pfile, "__cpp_auto_cast=202110L"); } if (flag_concepts) { diff --git a/gcc/c-family/c-format.cc b/gcc/c-family/c-format.cc index 98f28c0dcc691..fe5ed48b86ba8 100644 --- a/gcc/c-family/c-format.cc +++ b/gcc/c-family/c-format.cc @@ -1205,7 +1205,7 @@ check_function_format (const_tree fntype, tree attrs, int nargs, for (c = TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl)); c; c = TREE_CHAIN (c)) - if (is_attribute_p ("format", TREE_PURPOSE (c)) + if (is_attribute_p ("format", get_attribute_name (c)) && (decode_format_type (IDENTIFIER_POINTER (TREE_VALUE (TREE_VALUE (c)))) == info.format_type)) @@ -1748,7 +1748,8 @@ check_format_arg (void *ctx, tree format_tree, } tree underlying_type = TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (format_tree))); - if (underlying_type != char_type_node) + if (underlying_type != char_type_node + && !(flag_char8_t && underlying_type == char8_type_node)) { if (underlying_type == char16_type_node || underlying_type == char32_type_node @@ -2932,7 +2933,6 @@ static const token_t c_keywords[] = NAME ("noinline", NULL), NAME ("nonnull", NULL), NAME ("noreturn", NULL), - NAME ("nothrow", NULL), NAME ("offsetof", NULL), NAME ("readonly", "read-only"), NAME ("readwrite", "read-write"), diff --git a/gcc/c-family/c-gimplify.cc b/gcc/c-family/c-gimplify.cc index a00b0a02dcc1d..da5d7026e2f1c 100644 --- a/gcc/c-family/c-gimplify.cc +++ b/gcc/c-family/c-gimplify.cc @@ -105,6 +105,18 @@ ubsan_walk_array_refs_r (tree *tp, int *walk_subtrees, void *data) } else if (TREE_CODE (*tp) == ARRAY_REF) ubsan_maybe_instrument_array_ref (tp, false); + else if (TREE_CODE (*tp) == MODIFY_EXPR) + { + /* Since r7-1900, we gimplify RHS before LHS. Consider + a[b] |= c; + wherein we can have a single shared tree a[b] in both LHS and RHS. + If we only instrument the LHS and the access is invalid, the program + could crash before emitting a UBSan error. So instrument the RHS + first. */ + *walk_subtrees = 0; + walk_tree (&TREE_OPERAND (*tp, 1), ubsan_walk_array_refs_r, pset, pset); + walk_tree (&TREE_OPERAND (*tp, 0), ubsan_walk_array_refs_r, pset, pset); + } return NULL_TREE; } @@ -510,12 +522,15 @@ c_genericize_control_stmt (tree *stmt_p, int *walk_subtrees, void *data, STATEMENT_LIST wouldn't be present at all the resulting expression wouldn't have TREE_SIDE_EFFECTS set, so make sure to clear it even on the STATEMENT_LIST in such cases. */ + hash_set *pset = (c_dialect_cxx () + ? nullptr + : static_cast *>(data)); for (i = tsi_start (stmt); !tsi_end_p (i); tsi_next (&i)) { tree t = tsi_stmt (i); if (TREE_CODE (t) != DEBUG_BEGIN_STMT && nondebug_stmts < 2) nondebug_stmts++; - walk_tree_1 (tsi_stmt_ptr (i), func, data, NULL, lh); + walk_tree_1 (tsi_stmt_ptr (i), func, data, pset, lh); if (TREE_CODE (t) != DEBUG_BEGIN_STMT && (nondebug_stmts > 1 || TREE_SIDE_EFFECTS (tsi_stmt (i)))) clear_side_effects = false; @@ -570,8 +585,9 @@ c_genericize (tree fndecl) bc_state_t save_state; push_cfun (DECL_STRUCT_FUNCTION (fndecl)); save_bc_state (&save_state); - walk_tree (&DECL_SAVED_TREE (fndecl), c_genericize_control_r, - NULL, NULL); + hash_set pset; + walk_tree (&DECL_SAVED_TREE (fndecl), c_genericize_control_r, &pset, + &pset); restore_bc_state (&save_state); pop_cfun (); } @@ -704,18 +720,6 @@ c_gimplify_expr (tree *expr_p, gimple_seq *pre_p ATTRIBUTE_UNUSED, break; } - case DECL_EXPR: - /* This is handled mostly by gimplify.cc, but we have to deal with - not warning about int x = x; as it is a GCC extension to turn off - this warning but only if warn_init_self is zero. */ - if (VAR_P (DECL_EXPR_DECL (*expr_p)) - && !DECL_EXTERNAL (DECL_EXPR_DECL (*expr_p)) - && !TREE_STATIC (DECL_EXPR_DECL (*expr_p)) - && (DECL_INITIAL (DECL_EXPR_DECL (*expr_p)) == DECL_EXPR_DECL (*expr_p)) - && !warn_init_self) - suppress_warning (DECL_EXPR_DECL (*expr_p), OPT_Winit_self); - break; - case PREINCREMENT_EXPR: case PREDECREMENT_EXPR: case POSTINCREMENT_EXPR: diff --git a/gcc/c-family/c-lex.cc b/gcc/c-family/c-lex.cc index 8bfa4f4024fff..bd48bfc88e072 100644 --- a/gcc/c-family/c-lex.cc +++ b/gcc/c-family/c-lex.cc @@ -327,9 +327,28 @@ c_common_has_attribute (cpp_reader *pfile, bool std_syntax) do nxt_token = cpp_peek_token (pfile, idx++); while (nxt_token->type == CPP_PADDING); - if (nxt_token->type == CPP_SCOPE) + if (!c_dialect_cxx () + && nxt_token->type == CPP_COLON + && (nxt_token->flags & COLON_SCOPE) != 0) + { + const cpp_token *prev_token = nxt_token; + do + nxt_token = cpp_peek_token (pfile, idx++); + while (nxt_token->type == CPP_PADDING); + if (nxt_token->type == CPP_COLON) + { + /* __has_attribute (vendor::attr) in -std=c17 etc. modes. + :: isn't CPP_SCOPE but 2 CPP_COLON tokens, where the + first one should have COLON_SCOPE flag to distinguish + it from : :. */ + have_scope = true; + get_token_no_padding (pfile); // Eat first colon. + } + else + nxt_token = prev_token; + } + if (nxt_token->type == CPP_SCOPE || have_scope) { - have_scope = true; get_token_no_padding (pfile); // Eat scope. nxt_token = get_token_no_padding (pfile); if (nxt_token->type == CPP_NAME) @@ -359,6 +378,15 @@ c_common_has_attribute (cpp_reader *pfile, bool std_syntax) "attribute identifier required after scope"); attr_name = NULL_TREE; } + if (have_scope) + { + /* The parser in this case won't be able to parse + [[vendor::attr]], so ensure 0 is returned. */ + result = 0; + attr_name = NULL_TREE; + } + else + have_scope = true; } else { diff --git a/gcc/c-family/c-pch.cc b/gcc/c-family/c-pch.cc index 668feb44ba87d..7c437f39f7b4d 100644 --- a/gcc/c-family/c-pch.cc +++ b/gcc/c-family/c-pch.cc @@ -342,6 +342,8 @@ c_common_read_pch (cpp_reader *pfile, const char *name, gt_pch_restore (f); cpp_set_line_map (pfile, line_table); rebuild_location_adhoc_htab (line_table); + line_table->trace_includes = saved_trace_includes; + linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line); timevar_push (TV_PCH_CPP_RESTORE); if (cpp_read_state (pfile, name, f, smd) != 0) @@ -355,9 +357,6 @@ c_common_read_pch (cpp_reader *pfile, const char *name, fclose (f); - line_table->trace_includes = saved_trace_includes; - linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line); - /* Give the front end a chance to take action after a PCH file has been loaded. */ if (lang_post_pch_load) diff --git a/gcc/c-family/c-pretty-print.cc b/gcc/c-family/c-pretty-print.cc index 71a0cb51093f9..0c679c12d83fc 100644 --- a/gcc/c-family/c-pretty-print.cc +++ b/gcc/c-family/c-pretty-print.cc @@ -33,6 +33,9 @@ along with GCC; see the file COPYING3. If not see #include "langhooks.h" #include "options.h" #include "internal-fn.h" +#include "function.h" +#include "basic-block.h" +#include "gimple.h" /* The pretty-printer code is primarily designed to closely follow (GNU) C and C++ grammars. That is to be contrasted with spaghetti @@ -1363,12 +1366,14 @@ c_pretty_printer::primary_expression (tree e) else primary_expression (var); } - else + else if (gimple_assign_single_p (SSA_NAME_DEF_STMT (e))) { /* Print only the right side of the GIMPLE assignment. */ gimple *def_stmt = SSA_NAME_DEF_STMT (e); pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY); } + else + expression (e); break; default: diff --git a/gcc/c-family/c-ubsan.cc b/gcc/c-family/c-ubsan.cc index 48f948745f8b0..4cfb49226b3a1 100644 --- a/gcc/c-family/c-ubsan.cc +++ b/gcc/c-family/c-ubsan.cc @@ -53,7 +53,7 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) op0 = unshare_expr (op0); op1 = unshare_expr (op1); - if (TREE_CODE (type) == INTEGER_TYPE + if (INTEGRAL_TYPE_P (type) && sanitize_flags_p (SANITIZE_DIVIDE)) t = fold_build2 (EQ_EXPR, boolean_type_node, op1, build_int_cst (type, 0)); @@ -68,7 +68,7 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) t = NULL_TREE; /* We check INT_MIN / -1 only for signed types. */ - if (TREE_CODE (type) == INTEGER_TYPE + if (INTEGRAL_TYPE_P (type) && sanitize_flags_p (SANITIZE_SI_OVERFLOW) && !TYPE_UNSIGNED (type)) { diff --git a/gcc/c-family/c-warn.cc b/gcc/c-family/c-warn.cc index f24ac5d05394a..7b45448df4e66 100644 --- a/gcc/c-family/c-warn.cc +++ b/gcc/c-family/c-warn.cc @@ -2330,42 +2330,63 @@ warn_for_sign_compare (location_t location, have all bits set that are set in the ~ operand when it is extended. */ - op0 = c_common_get_narrower (op0, &unsignedp0); - op1 = c_common_get_narrower (op1, &unsignedp1); + /* bits0 is the bit index of op0 extended to result_type, which will + be always 0 and so all bits above it. If there is a BIT_NOT_EXPR + in that operand possibly sign or zero extended to op0 and then + possibly further sign or zero extended to result_type, bits0 will + be the precision of result type if all the extensions involved + if any are sign extensions, and will be the place of the innermost + zero extension otherwise. We warn only if BIT_NOT_EXPR's operand is + zero extended from some even smaller precision, in that case after + BIT_NOT_EXPR some bits below bits0 will be guaranteed to be set. + Similarly for bits1. */ + int bits0 = TYPE_PRECISION (result_type); + if (TYPE_UNSIGNED (TREE_TYPE (op0))) + bits0 = TYPE_PRECISION (TREE_TYPE (op0)); + tree arg0 = c_common_get_narrower (op0, &unsignedp0); + if (TYPE_PRECISION (TREE_TYPE (arg0)) == TYPE_PRECISION (TREE_TYPE (op0))) + unsignedp0 = TYPE_UNSIGNED (TREE_TYPE (op0)); + else if (unsignedp0) + bits0 = TYPE_PRECISION (TREE_TYPE (arg0)); + op0 = arg0; + int bits1 = TYPE_PRECISION (result_type); + if (TYPE_UNSIGNED (TREE_TYPE (op1))) + bits1 = TYPE_PRECISION (TREE_TYPE (op1)); + tree arg1 = c_common_get_narrower (op1, &unsignedp1); + if (TYPE_PRECISION (TREE_TYPE (arg1)) == TYPE_PRECISION (TREE_TYPE (op1))) + unsignedp1 = TYPE_UNSIGNED (TREE_TYPE (op1)); + else if (unsignedp1) + bits1 = TYPE_PRECISION (TREE_TYPE (arg1)); + op1 = arg1; if ((TREE_CODE (op0) == BIT_NOT_EXPR) ^ (TREE_CODE (op1) == BIT_NOT_EXPR)) { - if (TREE_CODE (op0) == BIT_NOT_EXPR) - op0 = c_common_get_narrower (TREE_OPERAND (op0, 0), &unsignedp0); if (TREE_CODE (op1) == BIT_NOT_EXPR) - op1 = c_common_get_narrower (TREE_OPERAND (op1, 0), &unsignedp1); - - if (tree_fits_shwi_p (op0) || tree_fits_shwi_p (op1)) { - tree primop; - HOST_WIDE_INT constant, mask; - int unsignedp; - unsigned int bits; + std::swap (op0, op1); + std::swap (unsignedp0, unsignedp1); + std::swap (bits0, bits1); + } - if (tree_fits_shwi_p (op0)) - { - primop = op1; - unsignedp = unsignedp1; - constant = tree_to_shwi (op0); - } - else - { - primop = op0; - unsignedp = unsignedp0; - constant = tree_to_shwi (op1); - } + int unsignedp; + arg0 = c_common_get_narrower (TREE_OPERAND (op0, 0), &unsignedp); - bits = TYPE_PRECISION (TREE_TYPE (primop)); - if (bits < TYPE_PRECISION (result_type) - && bits < HOST_BITS_PER_LONG && unsignedp) + /* For these warnings, we need BIT_NOT_EXPR operand to be + zero extended from narrower type to BIT_NOT_EXPR's type. + In that case, all those bits above the narrower's type + are after BIT_NOT_EXPR set to 1. */ + if (tree_fits_shwi_p (op1)) + { + HOST_WIDE_INT constant = tree_to_shwi (op1); + unsigned int bits = TYPE_PRECISION (TREE_TYPE (arg0)); + if (unsignedp + && bits < TYPE_PRECISION (TREE_TYPE (op0)) + && bits < HOST_BITS_PER_WIDE_INT) { - mask = HOST_WIDE_INT_M1U << bits; + HOST_WIDE_INT mask = HOST_WIDE_INT_M1U << bits; + if (bits0 < HOST_BITS_PER_WIDE_INT) + mask &= ~(HOST_WIDE_INT_M1U << bits0); if ((mask & constant) != mask) { if (constant == 0) @@ -2379,11 +2400,11 @@ warn_for_sign_compare (location_t location, } } } - else if (unsignedp0 && unsignedp1 - && (TYPE_PRECISION (TREE_TYPE (op0)) - < TYPE_PRECISION (result_type)) - && (TYPE_PRECISION (TREE_TYPE (op1)) - < TYPE_PRECISION (result_type))) + else if ((TYPE_PRECISION (TREE_TYPE (arg0)) + < TYPE_PRECISION (TREE_TYPE (op0))) + && unsignedp + && unsignedp1 + && TYPE_PRECISION (TREE_TYPE (op1)) < bits0) warning_at (location, OPT_Wsign_compare, "comparison of promoted bitwise complement " "of an unsigned value with unsigned"); @@ -2521,7 +2542,7 @@ warn_duplicated_cond_add_or_warn (location_t loc, tree cond, vec **chain) if (*chain == NULL) return; - if (TREE_SIDE_EFFECTS (cond)) + if (TREE_SIDE_EFFECTS (cond) || instantiation_dependent_expression_p (cond)) { /* Uh-oh! This condition has a side-effect, thus invalidates the whole chain. */ @@ -2986,6 +3007,10 @@ check_address_or_pointer_of_packed_member (tree type, tree rhs) if (rhs == NULL_TREE) return NULL_TREE; rhs = TREE_TYPE (rhs); /* Pointer type. */ + /* We could be called while processing a template and RHS could be + a functor. In that case it's a class, not a pointer. */ + if (!POINTER_TYPE_P (rhs)) + return NULL_TREE; rhs = TREE_TYPE (rhs); /* Function type. */ rhstype = TREE_TYPE (rhs); if (!rhstype || !POINTER_TYPE_P (rhstype)) @@ -3603,6 +3628,8 @@ warn_parm_array_mismatch (location_t origloc, tree fndecl, tree newparms) for (tree newvbl = newa->size, curvbl = cura->size; newvbl; newvbl = TREE_CHAIN (newvbl), curvbl = TREE_CHAIN (curvbl)) { + gcc_assert (curvbl); + tree newpos = TREE_PURPOSE (newvbl); tree curpos = TREE_PURPOSE (curvbl); @@ -3779,10 +3806,15 @@ do_warn_array_compare (location_t location, tree_code code, tree op0, tree op1) /* C doesn't allow +arr. */ if (c_dialect_cxx ()) inform (location, "use unary %<+%> which decays operands to pointers " - "or %<&%D[0] %s &%D[0]%> to compare the addresses", - op0, op_symbol_code (code), op1); + "or %<&%s%E%s[0] %s &%s%E%s[0]%> to compare the addresses", + DECL_P (op0) ? "" : "(", op0, DECL_P (op0) ? "" : ")", + op_symbol_code (code), + DECL_P (op1) ? "" : "(", op1, DECL_P (op1) ? "" : ")"); else - inform (location, "use %<&%D[0] %s &%D[0]%> to compare the addresses", - op0, op_symbol_code (code), op1); + inform (location, + "use %<&%s%E%s[0] %s &%s%E%s[0]%> to compare the addresses", + DECL_P (op0) ? "" : "(", op0, DECL_P (op0) ? "" : ")", + op_symbol_code (code), + DECL_P (op1) ? "" : "(", op1, DECL_P (op1) ? "" : ")"); } } diff --git a/gcc/c-family/known-headers.cc b/gcc/c-family/known-headers.cc index 8ad3eb3f46672..1c08f2c09d72f 100644 --- a/gcc/c-family/known-headers.cc +++ b/gcc/c-family/known-headers.cc @@ -200,6 +200,20 @@ get_stdlib_header_for_name (const char *name, enum stdlib lib) {"WINT_MAX", {"", ""} }, {"WINT_MIN", {"", ""} }, + /* . */ + {"asctime", {"", ""} }, + {"clock", {"", ""} }, + {"clock_t", {"", ""} }, + {"ctime", {"", ""} }, + {"difftime", {"", ""} }, + {"gmtime", {"", ""} }, + {"localtime", {"", ""} }, + {"mktime", {"", ""} }, + {"strftime", {"", ""} }, + {"time", {"", ""} }, + {"time_t", {"", ""} }, + {"tm", {"", ""} }, + /* . */ {"WCHAR_MAX", {"", ""} }, {"WCHAR_MIN", {"", ""} } diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index b0fef44e35f49..862b9c428b40d 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,112 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-06-06 Jakub Jelinek + + PR c/114493 + * c-decl.cc (c_fixup_may_alias): New function. + (finish_struct): Call it if "may_alias" attribute is + specified. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-10 Jakub Jelinek + + PR c/108079 + * c-decl.cc (pop_scope): Suppress OPT_Wunused_variable warning + after diagnosing it. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-16 Jakub Jelinek + + PR c++/105593 + * c-parser.cc (c_parser_initializer): Check warning_enabled_at + at the DECL_SOURCE_LOCATION (decl) for OPT_Winit_self instead + of warn_init_self. + +2023-02-10 Marek Polacek + + Backported from master: + 2022-08-11 Marek Polacek + + PR middle-end/102633 + * c-parser.cc (c_parser_initializer): Add new tree parameter. Use it. + Call suppress_warning. + (c_parser_declaration_or_fndef): Pass d down to c_parser_initializer. + (c_parser_omp_declare_reduction): Pass omp_priv down to + c_parser_initializer. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-11 Jakub Jelinek + + PR c/105972 + * c-parser.cc (c_parser_declaration_or_fndef): Disable debug non-bind + markers for K&R function parameter declarations of nested functions. + +2023-01-31 Marek Polacek + + PR c++/107593 + PR c++/108597 + * c-objc-common.cc (instantiation_dependent_expression_p): New. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-10-24 Jakub Jelinek + + PR c++/107358 + * c-typeck.cc (build_binary_op): Pass operands before excess precision + promotions to scalar_to_vector call. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-09-24 Jakub Jelinek + + PR c/106981 + * c-typeck.cc (c_tree_equal): Only strip NON_LVALUE_EXPRs at the + start. For CONSTANT_CLASS_P or CASE_CONVERT: return false if t1 and + t2 have different types. + +2022-09-19 Marek Polacek + + Backported from master: + 2022-09-19 Marek Polacek + + PR c/106947 + * c-typeck.cc (maybe_warn_for_null_address): Don't emit stray + notes. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-01 Lewis Hyatt + + Backported from master: + 2022-07-10 Lewis Hyatt + + PR preprocessor/97498 + * c-parser.cc (c_parser_pragma): Set input_location to the + location of the pragma, rather than the start of the line. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-08 Jakub Jelinek PR c/105149 diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc index c701f07befe68..668e234f0198a 100644 --- a/gcc/c/c-decl.cc +++ b/gcc/c/c-decl.cc @@ -1306,7 +1306,10 @@ pop_scope (void) && scope != external_scope) { if (!TREE_USED (p)) - warning (OPT_Wunused_variable, "unused variable %q+D", p); + { + warning (OPT_Wunused_variable, "unused variable %q+D", p); + suppress_warning (p, OPT_Wunused_variable); + } else if (DECL_CONTEXT (p) == current_function_decl) warning_at (DECL_SOURCE_LOCATION (p), OPT_Wunused_but_set_variable, @@ -8696,6 +8699,17 @@ finish_incomplete_vars (tree incomplete_vars, bool toplevel) } } +/* TYPE is a struct or union that we're applying may_alias to after the body is + parsed. Fixup any POINTER_TO types. */ + +static void +c_fixup_may_alias (tree type) +{ + for (tree t = TYPE_POINTER_TO (type); t; t = TYPE_NEXT_PTR_TO (t)) + for (tree v = TYPE_MAIN_VARIANT (t); v; v = TYPE_NEXT_VARIANT (v)) + TYPE_REF_CAN_ALIAS_ALL (v) = true; +} + /* Fill in the fields of a RECORD_TYPE or UNION_TYPE node, T. LOC is the location of the RECORD_TYPE or UNION_TYPE's definition. FIELDLIST is a chain of FIELD_DECL nodes for the fields. @@ -8970,6 +8984,10 @@ finish_struct (location_t loc, tree t, tree fieldlist, tree attributes, warning_at (loc, 0, "union cannot be made transparent"); } + if (lookup_attribute ("may_alias", TYPE_ATTRIBUTES (t))) + for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x)) + c_fixup_may_alias (x); + tree incomplete_vars = C_TYPE_INCOMPLETE_VARS (TYPE_MAIN_VARIANT (t)); for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x)) { diff --git a/gcc/c/c-objc-common.cc b/gcc/c/c-objc-common.cc index 97850ada2c8cc..cba01f4d5f335 100644 --- a/gcc/c/c-objc-common.cc +++ b/gcc/c/c-objc-common.cc @@ -394,3 +394,11 @@ c_get_alias_set (tree t) return c_common_get_alias_set (t); } + +/* In C, no expression is dependent. */ + +bool +instantiation_dependent_expression_p (tree) +{ + return false; +} diff --git a/gcc/c/c-parser.cc b/gcc/c/c-parser.cc index 129dd727ef396..78a313fe31ef2 100644 --- a/gcc/c/c-parser.cc +++ b/gcc/c/c-parser.cc @@ -1513,7 +1513,7 @@ static struct c_arg_info *c_parser_parms_list_declarator (c_parser *, tree, static struct c_parm *c_parser_parameter_declaration (c_parser *, tree, bool); static tree c_parser_simple_asm_expr (c_parser *); static tree c_parser_gnu_attributes (c_parser *); -static struct c_expr c_parser_initializer (c_parser *); +static struct c_expr c_parser_initializer (c_parser *, tree); static struct c_expr c_parser_braced_init (c_parser *, tree, bool, struct obstack *); static void c_parser_initelt (c_parser *, struct obstack *); @@ -2278,7 +2278,7 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok, int flag_sanitize_save = flag_sanitize; if (TREE_CODE (d) == PARM_DECL) flag_sanitize = 0; - init = c_parser_initializer (parser); + init = c_parser_initializer (parser, d); flag_sanitize = flag_sanitize_save; finish_init (); } @@ -2498,10 +2498,13 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok, declarator with a nonempty identifier list in a definition; and postfix attributes have never been accepted here in function definitions either. */ + int save_debug_nonbind_markers_p = debug_nonbind_markers_p; + debug_nonbind_markers_p = 0; while (c_parser_next_token_is_not (parser, CPP_EOF) && c_parser_next_token_is_not (parser, CPP_OPEN_BRACE)) c_parser_declaration_or_fndef (parser, false, false, false, true, false); + debug_nonbind_markers_p = save_debug_nonbind_markers_p; store_parm_decls (); if (omp_declare_simd_clauses) c_finish_omp_declare_simd (parser, current_function_decl, NULL_TREE, @@ -5203,11 +5206,13 @@ c_parser_type_name (c_parser *parser, bool alignas_ok) Any expression without commas is accepted in the syntax for the constant-expressions, with non-constant expressions rejected later. + DECL is the declaration we're parsing this initializer for. + This function is only used for top-level initializers; for nested ones, see c_parser_initval. */ static struct c_expr -c_parser_initializer (c_parser *parser) +c_parser_initializer (c_parser *parser, tree decl) { if (c_parser_next_token_is (parser, CPP_OPEN_BRACE)) return c_parser_braced_init (parser, NULL_TREE, false, NULL); @@ -5216,6 +5221,15 @@ c_parser_initializer (c_parser *parser) struct c_expr ret; location_t loc = c_parser_peek_token (parser)->location; ret = c_parser_expr_no_commas (parser, NULL); + /* This is handled mostly by gimplify.cc, but we have to deal with + not warning about int x = x; as it is a GCC extension to turn off + this warning but only if warn_init_self is zero. */ + if (VAR_P (decl) + && !DECL_EXTERNAL (decl) + && !TREE_STATIC (decl) + && ret.value == decl + && !warning_enabled_at (DECL_SOURCE_LOCATION (decl), OPT_Winit_self)) + suppress_warning (decl, OPT_Winit_self); if (TREE_CODE (ret.value) != STRING_CST && TREE_CODE (ret.value) != COMPOUND_LITERAL_EXPR) ret = convert_lvalue_to_rvalue (loc, ret, true, true); @@ -12378,6 +12392,7 @@ c_parser_pragma (c_parser *parser, enum pragma_context context, bool *if_p) unsigned int id; const char *construct = NULL; + input_location = c_parser_peek_token (parser)->location; id = c_parser_peek_token (parser)->pragma_kind; gcc_assert (id != PRAGMA_NONE); @@ -22389,7 +22404,7 @@ c_parser_omp_declare_reduction (c_parser *parser, enum pragma_context context) location_t loc = c_parser_peek_token (parser)->location; rich_location richloc (line_table, loc); start_init (omp_priv, NULL_TREE, 0, &richloc); - struct c_expr init = c_parser_initializer (parser); + struct c_expr init = c_parser_initializer (parser, omp_priv); finish_init (); finish_decl (omp_priv, loc, init.value, init.original_type, NULL_TREE); diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc index e130196a3a727..603b03fe1a5d4 100644 --- a/gcc/c/c-typeck.cc +++ b/gcc/c/c-typeck.cc @@ -11681,18 +11681,19 @@ maybe_warn_for_null_address (location_t loc, tree op, tree_code code) || from_macro_expansion_at (loc)) return; + bool w; if (code == EQ_EXPR) - warning_at (loc, OPT_Waddress, - "the comparison will always evaluate as % " - "for the address of %qE will never be NULL", - op); + w = warning_at (loc, OPT_Waddress, + "the comparison will always evaluate as % " + "for the address of %qE will never be NULL", + op); else - warning_at (loc, OPT_Waddress, - "the comparison will always evaluate as % " - "for the address of %qE will never be NULL", - op); + w = warning_at (loc, OPT_Waddress, + "the comparison will always evaluate as % " + "for the address of %qE will never be NULL", + op); - if (DECL_P (op)) + if (w && DECL_P (op)) inform (DECL_SOURCE_LOCATION (op), "%qD declared here", op); } @@ -11917,8 +11918,8 @@ build_binary_op (location_t location, enum tree_code code, if ((gnu_vector_type_p (type0) && code1 != VECTOR_TYPE) || (gnu_vector_type_p (type1) && code0 != VECTOR_TYPE)) { - enum stv_conv convert_flag = scalar_to_vector (location, code, op0, op1, - true); + enum stv_conv convert_flag = scalar_to_vector (location, code, orig_op0, + orig_op1, true); switch (convert_flag) { @@ -15921,14 +15922,10 @@ c_tree_equal (tree t1, tree t2) if (!t1 || !t2) return false; - for (code1 = TREE_CODE (t1); - CONVERT_EXPR_CODE_P (code1) - || code1 == NON_LVALUE_EXPR; + for (code1 = TREE_CODE (t1); code1 == NON_LVALUE_EXPR; code1 = TREE_CODE (t1)) t1 = TREE_OPERAND (t1, 0); - for (code2 = TREE_CODE (t2); - CONVERT_EXPR_CODE_P (code2) - || code2 == NON_LVALUE_EXPR; + for (code2 = TREE_CODE (t2); code2 == NON_LVALUE_EXPR; code2 = TREE_CODE (t2)) t2 = TREE_OPERAND (t2, 0); @@ -15939,6 +15936,9 @@ c_tree_equal (tree t1, tree t2) if (code1 != code2) return false; + if (CONSTANT_CLASS_P (t1) && !comptypes (TREE_TYPE (t1), TREE_TYPE (t2))) + return false; + switch (code1) { case INTEGER_CST: @@ -16058,6 +16058,11 @@ c_tree_equal (tree t1, tree t2) return true; } + CASE_CONVERT: + if (!comptypes (TREE_TYPE (t1), TREE_TYPE (t2))) + return false; + break; + default: break; } diff --git a/gcc/cfgbuild.cc b/gcc/cfgbuild.cc index bec92454cf1e2..646a066143dfb 100644 --- a/gcc/cfgbuild.cc +++ b/gcc/cfgbuild.cc @@ -445,6 +445,7 @@ find_bb_boundaries (basic_block bb) rtx_insn *debug_insn = NULL; edge fallthru = NULL; bool skip_purge; + bool seen_note_after_debug = false; if (insn == end) return; @@ -492,7 +493,10 @@ find_bb_boundaries (basic_block bb) if (code == DEBUG_INSN) { if (flow_transfer_insn && !debug_insn) - debug_insn = insn; + { + debug_insn = insn; + seen_note_after_debug = false; + } } /* In case we've previously seen an insn that effects a control flow transfer, split the block. */ @@ -506,7 +510,40 @@ find_bb_boundaries (basic_block bb) insn instead of before the non-debug insn, so that the debug insns are not lost. */ if (debug_insn && code != CODE_LABEL && code != BARRIER) - prev = PREV_INSN (debug_insn); + { + prev = PREV_INSN (debug_insn); + if (seen_note_after_debug) + { + /* Though, if there are NOTEs intermixed with DEBUG_INSNs, + move the NOTEs before the DEBUG_INSNs and split after + the last NOTE. */ + rtx_insn *first = NULL, *last = NULL; + for (x = debug_insn; x != insn; x = NEXT_INSN (x)) + { + if (NOTE_P (x)) + { + if (first == NULL) + first = x; + last = x; + } + else + { + gcc_assert (DEBUG_INSN_P (x)); + if (first) + { + reorder_insns_nobb (first, last, prev); + prev = last; + first = last = NULL; + } + } + } + if (first) + { + reorder_insns_nobb (first, last, prev); + prev = last; + } + } + } fallthru = split_block (bb, prev); if (flow_transfer_insn) { @@ -547,6 +584,14 @@ find_bb_boundaries (basic_block bb) flow_transfer_insn = prev_nonnote_nondebug_insn_bb (insn); debug_insn = NULL; } + else if (debug_insn) + { + if (code == NOTE) + seen_note_after_debug = true; + else + /* Jump tables. */ + debug_insn = NULL; + } if (control_flow_insn_p (insn)) flow_transfer_insn = insn; diff --git a/gcc/cfgcleanup.cc b/gcc/cfgcleanup.cc index 335af4911bb9b..446718d5ecf87 100644 --- a/gcc/cfgcleanup.cc +++ b/gcc/cfgcleanup.cc @@ -208,7 +208,7 @@ mark_effect (rtx exp, regset nonequal) return false; case SET: - if (rtx_equal_for_cselib_p (SET_DEST (exp), SET_SRC (exp))) + if (cselib_redundant_set_p (exp)) return false; dest = SET_DEST (exp); if (dest == pc_rtx) diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc index d3cc77d2ca98f..eadec9a2bfd2f 100644 --- a/gcc/cfgexpand.cc +++ b/gcc/cfgexpand.cc @@ -571,6 +571,26 @@ visit_conflict (gimple *, tree op, tree, void *data) return false; } +/* Helper function for add_scope_conflicts_1. For USE on + a stmt, if it is a SSA_NAME and in its SSA_NAME_DEF_STMT is known to be + based on some ADDR_EXPR, invoke VISIT on that ADDR_EXPR. */ + +static inline void +add_scope_conflicts_2 (tree use, bitmap work, + walk_stmt_load_store_addr_fn visit) +{ + if (TREE_CODE (use) == SSA_NAME + && (POINTER_TYPE_P (TREE_TYPE (use)) + || INTEGRAL_TYPE_P (TREE_TYPE (use)))) + { + gimple *g = SSA_NAME_DEF_STMT (use); + if (is_gimple_assign (g)) + if (tree op = gimple_assign_rhs1 (g)) + if (TREE_CODE (op) == ADDR_EXPR) + visit (g, TREE_OPERAND (op, 0), op, work); + } +} + /* Helper routine for add_scope_conflicts, calculating the active partitions at the end of BB, leaving the result in WORK. We're called to generate conflicts when FOR_CONFLICT is true, otherwise we're just tracking @@ -583,6 +603,8 @@ add_scope_conflicts_1 (basic_block bb, bitmap work, bool for_conflict) edge_iterator ei; gimple_stmt_iterator gsi; walk_stmt_load_store_addr_fn visit; + use_operand_p use_p; + ssa_op_iter iter; bitmap_clear (work); FOR_EACH_EDGE (e, ei, bb->preds) @@ -593,7 +615,10 @@ add_scope_conflicts_1 (basic_block bb, bitmap work, bool for_conflict) for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi)) { gimple *stmt = gsi_stmt (gsi); + gphi *phi = as_a (stmt); walk_stmt_load_store_addr_ops (stmt, work, NULL, NULL, visit); + FOR_EACH_PHI_ARG (use_p, phi, iter, SSA_OP_USE) + add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit); } for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi)) { @@ -613,8 +638,7 @@ add_scope_conflicts_1 (basic_block bb, bitmap work, bool for_conflict) } else if (!is_gimple_debug (stmt)) { - if (for_conflict - && visit == visit_op) + if (for_conflict && visit == visit_op) { /* If this is the first real instruction in this BB we need to add conflicts for everything live at this point now. @@ -634,6 +658,8 @@ add_scope_conflicts_1 (basic_block bb, bitmap work, bool for_conflict) visit = visit_conflict; } walk_stmt_load_store_addr_ops (stmt, work, visit, visit, visit); + FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, SSA_OP_USE) + add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit); } } } @@ -3635,7 +3661,7 @@ expand_asm_stmt (gasm *stmt) emit_insn (copy_insn (PATTERN (curr))); rtx_insn *copy = get_insns (); end_sequence (); - insert_insn_on_edge (copy, e); + prepend_insn_to_edge (copy, e); } } } @@ -5349,6 +5375,10 @@ expand_debug_expr (tree exp) case VEC_WIDEN_MULT_ODD_EXPR: case VEC_WIDEN_LSHIFT_HI_EXPR: case VEC_WIDEN_LSHIFT_LO_EXPR: + case VEC_WIDEN_PLUS_HI_EXPR: + case VEC_WIDEN_PLUS_LO_EXPR: + case VEC_WIDEN_MINUS_HI_EXPR: + case VEC_WIDEN_MINUS_LO_EXPR: case VEC_PERM_EXPR: case VEC_DUPLICATE_EXPR: case VEC_SERIES_EXPR: @@ -5385,6 +5415,8 @@ expand_debug_expr (tree exp) case WIDEN_MULT_EXPR: case WIDEN_MULT_PLUS_EXPR: case WIDEN_MULT_MINUS_EXPR: + case WIDEN_PLUS_EXPR: + case WIDEN_MINUS_EXPR: if (SCALAR_INT_MODE_P (GET_MODE (op0)) && SCALAR_INT_MODE_P (mode)) { @@ -5397,6 +5429,10 @@ expand_debug_expr (tree exp) op1 = simplify_gen_unary (ZERO_EXTEND, mode, op1, inner_mode); else op1 = simplify_gen_unary (SIGN_EXTEND, mode, op1, inner_mode); + if (TREE_CODE (exp) == WIDEN_PLUS_EXPR) + return simplify_gen_binary (PLUS, mode, op0, op1); + else if (TREE_CODE (exp) == WIDEN_MINUS_EXPR) + return simplify_gen_binary (MINUS, mode, op0, op1); op0 = simplify_gen_binary (MULT, mode, op0, op1); if (TREE_CODE (exp) == WIDEN_MULT_EXPR) return op0; diff --git a/gcc/cfghooks.cc b/gcc/cfghooks.cc index e435891fac640..c0b7bdcd9b244 100644 --- a/gcc/cfghooks.cc +++ b/gcc/cfghooks.cc @@ -29,6 +29,7 @@ along with GCC; see the file COPYING3. If not see #include "diagnostic-core.h" #include "dumpfile.h" #include "cfganal.h" +#include "tree.h" #include "tree-ssa.h" #include "cfgloop.h" #include "sreal.h" diff --git a/gcc/cfgrtl.cc b/gcc/cfgrtl.cc index 74ea14efc6153..a8c95d82a2a7e 100644 --- a/gcc/cfgrtl.cc +++ b/gcc/cfgrtl.cc @@ -25,7 +25,7 @@ along with GCC; see the file COPYING3. If not see - CFG-aware instruction chain manipulation delete_insn, delete_insn_chain - Edge splitting and committing to edges - insert_insn_on_edge, commit_edge_insertions + insert_insn_on_edge, prepend_insn_to_edge, commit_edge_insertions - CFG updating after insn simplification purge_dead_edges, purge_all_dead_edges - CFG fixing after coarse manipulation @@ -235,7 +235,7 @@ delete_insn_and_edges (rtx_insn *insn) { bool purge = false; - if (INSN_P (insn) && BLOCK_FOR_INSN (insn)) + if (NONDEBUG_INSN_P (insn) && BLOCK_FOR_INSN (insn)) { basic_block bb = BLOCK_FOR_INSN (insn); if (BB_END (bb) == insn) @@ -1967,7 +1967,8 @@ rtl_split_edge (edge edge_in) /* Queue instructions for insertion on an edge between two basic blocks. The new instructions and basic blocks (if any) will not appear in the - CFG until commit_edge_insertions is called. */ + CFG until commit_edge_insertions is called. If there are already + queued instructions on the edge, PATTERN is appended to them. */ void insert_insn_on_edge (rtx pattern, edge e) @@ -1987,6 +1988,25 @@ insert_insn_on_edge (rtx pattern, edge e) end_sequence (); } +/* Like insert_insn_on_edge, but if there are already queued instructions + on the edge, PATTERN is prepended to them. */ + +void +prepend_insn_to_edge (rtx pattern, edge e) +{ + /* We cannot insert instructions on an abnormal critical edge. + It will be easier to find the culprit if we die now. */ + gcc_assert (!((e->flags & EDGE_ABNORMAL) && EDGE_CRITICAL_P (e))); + + start_sequence (); + + emit_insn (pattern); + emit_insn (e->insns.r); + + e->insns.r = get_insns (); + end_sequence (); +} + /* Update the CFG for the instructions queued on edge E. */ void @@ -4354,12 +4374,13 @@ duplicate_insn_chain (rtx_insn *from, rtx_insn *to, since MEM_EXPR is shared so make a copy and walk to the subtree again. */ tree new_expr = unshare_expr (MEM_EXPR (*iter)); + tree orig_new_expr = new_expr; if (TREE_CODE (new_expr) == WITH_SIZE_EXPR) new_expr = TREE_OPERAND (new_expr, 0); while (handled_component_p (new_expr)) new_expr = TREE_OPERAND (new_expr, 0); MR_DEPENDENCE_CLIQUE (new_expr) = newc; - set_mem_expr (const_cast (*iter), new_expr); + set_mem_expr (const_cast (*iter), orig_new_expr); } } } diff --git a/gcc/cfgrtl.h b/gcc/cfgrtl.h index 7deaa4fdf7446..8beeef3659015 100644 --- a/gcc/cfgrtl.h +++ b/gcc/cfgrtl.h @@ -38,6 +38,7 @@ extern edge try_redirect_by_replacing_jump (edge, basic_block, bool); extern void emit_barrier_after_bb (basic_block bb); extern basic_block force_nonfallthru_and_redirect (edge, basic_block, rtx); extern void insert_insn_on_edge (rtx, edge); +extern void prepend_insn_to_edge (rtx, edge); extern void commit_one_edge_insertion (edge e); extern void commit_edge_insertions (void); extern void print_rtl_with_bb (FILE *, const rtx_insn *, dump_flags_t); diff --git a/gcc/cgraph.cc b/gcc/cgraph.cc index 0159eaa768b53..b5cfa3b36c57f 100644 --- a/gcc/cgraph.cc +++ b/gcc/cgraph.cc @@ -1403,11 +1403,17 @@ cgraph_edge::redirect_callee (cgraph_node *n) speculative indirect call, remove "speculative" of the indirect call and also redirect stmt to it's final direct target. + When called from within tree-inline, KILLED_SSAs has to contain the pointer + to killed_new_ssa_names within the copy_body_data structure and SSAs + discovered to be useless (if LHS is removed) will be added to it, otherwise + it needs to be NULL. + It is up to caller to iteratively transform each "speculative" direct call as appropriate. */ gimple * -cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e) +cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e, + hash_set *killed_ssas) { tree decl = gimple_call_fndecl (e->call_stmt); gcall *new_stmt; @@ -1528,7 +1534,7 @@ cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e) remove_stmt_from_eh_lp (e->call_stmt); tree old_fntype = gimple_call_fntype (e->call_stmt); - new_stmt = padjs->modify_call (e, false); + new_stmt = padjs->modify_call (e, false, killed_ssas); cgraph_node *origin = e->callee; while (origin->clone_of) origin = origin->clone_of; @@ -1893,7 +1899,21 @@ cgraph_node::remove (void) if (prev_sibling_clone) prev_sibling_clone->next_sibling_clone = next_sibling_clone; else if (clone_of) - clone_of->clones = next_sibling_clone; + { + clone_of->clones = next_sibling_clone; + if (!clones) + { + bool need_body = false; + for (cgraph_node *n = clone_of; n; n = n->clone_of) + if (n->analyzed || n->clones) + { + need_body = true; + break; + } + if (!need_body) + clone_of->release_body (); + } + } if (next_sibling_clone) next_sibling_clone->prev_sibling_clone = prev_sibling_clone; if (clones) diff --git a/gcc/cgraph.h b/gcc/cgraph.h index 8c512b648ee58..ed7366d6bfd9b 100644 --- a/gcc/cgraph.h +++ b/gcc/cgraph.h @@ -193,10 +193,11 @@ struct GTY((desc ("%h.type"), tag ("SYMTAB_SYMBOL"), /* Clone reference REF to this symtab_node and set its stmt to STMT. */ ipa_ref *clone_reference (ipa_ref *ref, gimple *stmt); - /* Find the structure describing a reference to REFERRED_NODE - and associated with statement STMT. */ + /* Find the structure describing a reference to REFERRED_NODE of USE_TYPE and + associated with statement STMT or LTO_STMT_UID. */ ipa_ref *find_reference (symtab_node *referred_node, gimple *stmt, - unsigned int lto_stmt_uid); + unsigned int lto_stmt_uid, + enum ipa_ref_use use_type); /* Remove all references that are associated with statement STMT. */ void remove_stmt_references (gimple *stmt); @@ -475,6 +476,9 @@ struct GTY((desc ("%h.type"), tag ("SYMTAB_SYMBOL"), Return NULL if there's no such node. */ static symtab_node *get_for_asmname (const_tree asmname); + /* Check symbol table for callees of IFUNC resolvers. */ + static void check_ifunc_callee_symtab_nodes (void); + /* Verify symbol table for internal consistency. */ static DEBUG_FUNCTION void verify_symtab_nodes (void); @@ -891,7 +895,9 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node versionable (false), can_change_signature (false), redefined_extern_inline (false), tm_may_enter_irr (false), ipcp_clone (false), declare_variant_alt (false), - calls_declare_variant_alt (false), m_uid (uid), m_summary_id (-1) + calls_declare_variant_alt (false), + called_by_ifunc_resolver (false), + m_uid (uid), m_summary_id (-1) {} /* Remove the node from cgraph and all inline clones inlined into it. @@ -1490,6 +1496,8 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node unsigned declare_variant_alt : 1; /* True if the function calls declare_variant_alt functions. */ unsigned calls_declare_variant_alt : 1; + /* Set if the function is called by an IFUNC resolver. */ + unsigned called_by_ifunc_resolver : 1; private: /* Unique id of the node. */ @@ -1832,9 +1840,16 @@ class GTY((chain_next ("%h.next_caller"), chain_prev ("%h.prev_caller"), speculative indirect call, remove "speculative" of the indirect call and also redirect stmt to it's final direct target. + When called from within tree-inline, KILLED_SSAs has to contain the + pointer to killed_new_ssa_names within the copy_body_data structure and + SSAs discovered to be useless (if LHS is removed) will be added to it, + otherwise it needs to be NULL. + It is up to caller to iteratively transform each "speculative" direct call as appropriate. */ - static gimple *redirect_call_stmt_to_callee (cgraph_edge *e); + static gimple *redirect_call_stmt_to_callee (cgraph_edge *e, + hash_set + *killed_ssas = nullptr); /* Create clone of edge in the node N represented by CALL_EXPR the callgraph. */ diff --git a/gcc/cgraphclones.cc b/gcc/cgraphclones.cc index eb0fa87b554c0..41616a26a8027 100644 --- a/gcc/cgraphclones.cc +++ b/gcc/cgraphclones.cc @@ -218,7 +218,17 @@ duplicate_thunk_for_node (cgraph_node *thunk, cgraph_node *node) body_adj.modify_formal_parameters (); } else - new_decl = copy_node (thunk->decl); + { + new_decl = copy_node (thunk->decl); + for (tree *arg = &DECL_ARGUMENTS (new_decl); + *arg; arg = &DECL_CHAIN (*arg)) + { + tree next = DECL_CHAIN (*arg); + *arg = copy_node (*arg); + DECL_CONTEXT (*arg) = new_decl; + DECL_CHAIN (*arg) = next; + } + } gcc_checking_assert (!DECL_STRUCT_FUNCTION (new_decl)); gcc_checking_assert (!DECL_INITIAL (new_decl)); diff --git a/gcc/cgraphunit.cc b/gcc/cgraphunit.cc index bc3dc754481f6..1c899eaa12bfe 100644 --- a/gcc/cgraphunit.cc +++ b/gcc/cgraphunit.cc @@ -1123,6 +1123,7 @@ check_global_declaration (symtab_node *snode) && (TREE_CODE (decl) != FUNCTION_DECL || (!DECL_STATIC_CONSTRUCTOR (decl) && !DECL_STATIC_DESTRUCTOR (decl))) + && (! VAR_P (decl) || !warning_suppressed_p (decl, OPT_Wunused_variable)) /* Otherwise, ask the language. */ && lang_hooks.decls.warn_unused_global (decl)) warning_at (DECL_SOURCE_LOCATION (decl), @@ -1754,7 +1755,7 @@ cgraph_node::assemble_thunks_and_aliases (void) cgraph_node *thunk = e->caller; e = e->next_caller; - expand_thunk (thunk, true, false); + expand_thunk (thunk, !rtl_dump_and_exit, false); thunk->assemble_thunks_and_aliases (); } else @@ -2264,6 +2265,8 @@ symbol_table::compile (void) symtab_node::checking_verify_symtab_nodes (); + symtab_node::check_ifunc_callee_symtab_nodes (); + timevar_push (TV_CGRAPHOPT); if (pre_ipa_mem_report) dump_memory_report ("Memory consumption before IPA"); diff --git a/gcc/combine.cc b/gcc/combine.cc index 9a34ef847aadd..e79500d40c9dc 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -11789,8 +11789,10 @@ simplify_compare_const (enum rtx_code code, machine_mode mode, `and'ed with that bit), we can replace this with a comparison with zero. */ if (const_op - && (code == EQ || code == NE || code == GE || code == GEU - || code == LT || code == LTU) + && (code == EQ || code == NE || code == GEU || code == LTU + /* This optimization is incorrect for signed >= INT_MIN or + < INT_MIN, those are always true or always false. */ + || ((code == GE || code == LT) && const_op > 0)) && is_a (mode, &int_mode) && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT && pow2p_hwi (const_op & GET_MODE_MASK (int_mode)) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 239759dc76610..d79534331f77f 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -55,43 +55,49 @@ struct __processor_model2 static inline int has_cpu_feature (struct __processor_model *cpu_model, unsigned int *cpu_features2, - enum processor_features f) + enum processor_features feature) { - unsigned int i; + unsigned index, offset; + unsigned f = feature; + if (f < 32) { /* The first 32 features. */ - return cpu_model->__cpu_features[0] & (1U << (f & 31)); + return cpu_model->__cpu_features[0] & (1U << f); + } + else + { + /* The rest of features. cpu_features2[i] contains features from + (32 + i * 32) to (31 + 32 + i * 32), inclusively. */ + f -= 32; + index = f / 32; + offset = f % 32; + return cpu_features2[index] & (1U << offset); } - /* The rest of features. cpu_features2[i] contains features from - (32 + i * 32) to (31 + 32 + i * 32), inclusively. */ - for (i = 0; i < SIZE_OF_CPU_FEATURES; i++) - if (f < (32 + 32 + i * 32)) - return cpu_features2[i] & (1U << ((f - (32 + i * 32)) & 31)); - gcc_unreachable (); } static inline void set_cpu_feature (struct __processor_model *cpu_model, unsigned int *cpu_features2, - enum processor_features f) + enum processor_features feature) { - unsigned int i; + unsigned index, offset; + unsigned f = feature; + if (f < 32) { /* The first 32 features. */ - cpu_model->__cpu_features[0] |= (1U << (f & 31)); - return; + cpu_model->__cpu_features[0] |= (1U << f); + } + else + { + /* The rest of features. cpu_features2[i] contains features from + (32 + i * 32) to (31 + 32 + i * 32), inclusively. */ + f -= 32; + index = f / 32; + offset = f % 32; + cpu_features2[index] |= (1U << offset); } - /* The rest of features. cpu_features2[i] contains features from - (32 + i * 32) to (31 + 32 + i * 32), inclusively. */ - for (i = 0; i < SIZE_OF_CPU_FEATURES; i++) - if (f < (32 + 32 + i * 32)) - { - cpu_features2[i] |= (1U << ((f - (32 + i * 32)) & 31)); - return; - } - gcc_unreachable (); } /* Get the specific type of AMD CPU and return AMD CPU name. Return @@ -247,13 +253,27 @@ get_amd_cpu (struct __processor_model *cpu_model, break; case 0x19: cpu_model->__cpu_type = AMDFAM19H; - /* AMD family 19h version 1. */ + /* AMD family 19h. */ if (model <= 0x0f) { cpu = "znver3"; CHECK___builtin_cpu_is ("znver3"); cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3; } + else if ((model >= 0x10 && model <= 0x1f) + || (model >= 0x60 && model <= 0xaf)) + { + cpu = "znver4"; + CHECK___builtin_cpu_is ("znver4"); + cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4; + } + else if (has_cpu_feature (cpu_model, cpu_features2, + FEATURE_AVX512F)) + { + cpu = "znver4"; + CHECK___builtin_cpu_is ("znver4"); + cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4; + } else if (has_cpu_feature (cpu_model, cpu_features2, FEATURE_VAES)) { @@ -262,6 +282,22 @@ get_amd_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3; } break; + case 0x1a: + cpu_model->__cpu_type = AMDFAM1AH; + if (model <= 0x77) + { + cpu = "znver5"; + CHECK___builtin_cpu_is ("znver5"); + cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER5; + } + else if (has_cpu_feature (cpu_model, cpu_features2, + FEATURE_AVX512VP2INTERSECT)) + { + cpu = "znver5"; + CHECK___builtin_cpu_is ("znver5"); + cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER5; + } + break; default: break; } @@ -415,7 +451,6 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE; break; case 0xa7: - case 0xa8: /* Rocket Lake. */ cpu = "rocketlake"; CHECK___builtin_cpu_is ("corei7"); @@ -488,7 +523,6 @@ get_intel_cpu (struct __processor_model *cpu_model, break; case 0x97: case 0x9a: - case 0xbf: /* Alder Lake. */ cpu = "alderlake"; CHECK___builtin_cpu_is ("corei7"); @@ -612,8 +646,6 @@ get_available_features (struct __processor_model *cpu_model, set_feature (FEATURE_MOVBE); if (ecx & bit_AES) set_feature (FEATURE_AES); - if (ecx & bit_F16C) - set_feature (FEATURE_F16C); if (ecx & bit_RDRND) set_feature (FEATURE_RDRND); if (ecx & bit_XSAVE) @@ -624,12 +656,16 @@ get_available_features (struct __processor_model *cpu_model, set_feature (FEATURE_AVX); if (ecx & bit_FMA) set_feature (FEATURE_FMA); + if (ecx & bit_F16C) + set_feature (FEATURE_F16C); } /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */ if (max_cpuid_level >= 7) { - __cpuid_count (7, 0, eax, ebx, ecx, edx); + unsigned int max_subleaf_level; + + __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx); if (ebx & bit_BMI) set_feature (FEATURE_BMI); if (ebx & bit_SGX) @@ -644,6 +680,8 @@ get_available_features (struct __processor_model *cpu_model, set_feature (FEATURE_AVX2); if (ecx & bit_VPCLMULQDQ) set_feature (FEATURE_VPCLMULQDQ); + if (ecx & bit_VAES) + set_feature (FEATURE_VAES); } if (ebx & bit_BMI2) set_feature (FEATURE_BMI2); @@ -666,8 +704,6 @@ get_available_features (struct __processor_model *cpu_model, set_feature (FEATURE_PKU); if (ecx & bit_RDPID) set_feature (FEATURE_RDPID); - if (ecx & bit_VAES) - set_feature (FEATURE_VAES); if (ecx & bit_GFNI) set_feature (FEATURE_GFNI); if (ecx & bit_MOVDIRI) @@ -741,18 +777,21 @@ get_available_features (struct __processor_model *cpu_model, set_feature (FEATURE_AVX512FP16); } - __cpuid_count (7, 1, eax, ebx, ecx, edx); - if (eax & bit_HRESET) - set_feature (FEATURE_HRESET); - if (avx_usable) + if (max_subleaf_level >= 1) { - if (eax & bit_AVXVNNI) - set_feature (FEATURE_AVXVNNI); - } - if (avx512_usable) - { - if (eax & bit_AVX512BF16) - set_feature (FEATURE_AVX512BF16); + __cpuid_count (7, 1, eax, ebx, ecx, edx); + if (eax & bit_HRESET) + set_feature (FEATURE_HRESET); + if (avx_usable) + { + if (eax & bit_AVXVNNI) + set_feature (FEATURE_AVXVNNI); + } + if (avx512_usable) + { + if (eax & bit_AVX512BF16) + set_feature (FEATURE_AVX512BF16); + } } } @@ -890,6 +929,10 @@ cpu_indicator_init (struct __processor_model *cpu_model, extended_model = (eax >> 12) & 0xf0; extended_family = (eax >> 20) & 0xff; + /* Find available features. */ + get_available_features (cpu_model, cpu_model2, cpu_features2, + ecx, edx); + if (vendor == signature_INTEL_ebx) { /* Adjust model and family for Intel CPUS. */ @@ -904,9 +947,6 @@ cpu_indicator_init (struct __processor_model *cpu_model, cpu_model2->__cpu_family = family; cpu_model2->__cpu_model = model; - /* Find available features. */ - get_available_features (cpu_model, cpu_model2, cpu_features2, - ecx, edx); /* Get CPU type. */ get_intel_cpu (cpu_model, cpu_model2, cpu_features2); cpu_model->__cpu_vendor = VENDOR_INTEL; @@ -923,9 +963,6 @@ cpu_indicator_init (struct __processor_model *cpu_model, cpu_model2->__cpu_family = family; cpu_model2->__cpu_model = model; - /* Find available features. */ - get_available_features (cpu_model, cpu_model2, cpu_features2, - ecx, edx); /* Get CPU type. */ get_amd_cpu (cpu_model, cpu_model2, cpu_features2); cpu_model->__cpu_vendor = VENDOR_AMD; diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index 07fdd045f3032..a01172cab2fb9 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -1830,7 +1830,9 @@ const char *const processor_names[] = "btver2", "znver1", "znver2", - "znver3" + "znver3", + "znver4", + "znver5" }; /* Guarantee that the array is aligned with enum processor_type. */ @@ -2055,37 +2057,20 @@ const pta processor_alias_table[] = | PTA_MOVBE | PTA_MWAITX, M_CPU_SUBTYPE (AMDFAM15H_BDVER4), P_PROC_AVX2}, {"znver1", PROCESSOR_ZNVER1, CPU_ZNVER1, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT, + PTA_ZNVER1, M_CPU_SUBTYPE (AMDFAM17H_ZNVER1), P_PROC_AVX2}, {"znver2", PROCESSOR_ZNVER2, CPU_ZNVER2, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID - | PTA_WBNOINVD, + PTA_ZNVER2, M_CPU_SUBTYPE (AMDFAM17H_ZNVER2), P_PROC_AVX2}, {"znver3", PROCESSOR_ZNVER3, CPU_ZNVER3, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID - | PTA_WBNOINVD | PTA_VAES | PTA_VPCLMULQDQ | PTA_PKU, + PTA_ZNVER3, M_CPU_SUBTYPE (AMDFAM19H_ZNVER3), P_PROC_AVX2}, + {"znver4", PROCESSOR_ZNVER4, CPU_ZNVER4, + PTA_ZNVER4, + M_CPU_SUBTYPE (AMDFAM19H_ZNVER4), P_PROC_AVX512F}, + {"znver5", PROCESSOR_ZNVER5, CPU_ZNVER5, + PTA_ZNVER5, + M_CPU_SUBTYPE (AMDFAM1AH_ZNVER5), P_PROC_AVX512F}, {"btver1", PROCESSOR_BTVER1, CPU_GENERIC, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_PRFCHW diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 3f6d2013dafdd..18a6b4bd0bcd3 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -33,8 +33,10 @@ enum processor_vendor VENDOR_CENTAUR, VENDOR_CYRIX, VENDOR_NSC, - BUILTIN_VENDOR_MAX = VENDOR_OTHER, - VENDOR_MAX + + /* Maximum values must be at the end of this enum. */ + VENDOR_MAX, + BUILTIN_VENDOR_MAX = VENDOR_OTHER }; /* Any new types or subtypes have to be inserted at the end. */ @@ -56,6 +58,7 @@ enum processor_types INTEL_GOLDMONT_PLUS, INTEL_TREMONT, AMDFAM19H, + AMDFAM1AH, CPU_TYPE_MAX, BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX }; @@ -89,6 +92,8 @@ enum processor_subtypes INTEL_COREI7_ALDERLAKE, AMDFAM19H_ZNVER3, INTEL_COREI7_ROCKETLAKE, + AMDFAM19H_ZNVER4, + AMDFAM1AH_ZNVER5, CPU_SUBTYPE_MAX }; diff --git a/gcc/common/config/loongarch/loongarch-common.cc b/gcc/common/config/loongarch/loongarch-common.cc index 085d3d98f1cdd..ed3730fce8b6d 100644 --- a/gcc/common/config/loongarch/loongarch-common.cc +++ b/gcc/common/config/loongarch/loongarch-common.cc @@ -37,7 +37,4 @@ static const struct default_options loongarch_option_optimization_table[] = { OPT_LEVELS_NONE, 0, NULL, 0 } }; -#undef TARGET_DEFAULT_TARGET_FLAGS -#define TARGET_DEFAULT_TARGET_FLAGS MASK_CHECK_ZERO_DIV - struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; diff --git a/gcc/config.gcc b/gcc/config.gcc index c5064dd376660..b0eef5572c995 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -566,11 +566,15 @@ tilepro*-*-*) esac tm_file=${cpu_type}/${cpu_type}.h -tm_d_file=${cpu_type}/${cpu_type}.h if test -f ${srcdir}/config/${cpu_type}/${cpu_type}-protos.h then tm_p_file=${cpu_type}/${cpu_type}-protos.h - tm_d_file="${tm_d_file} ${cpu_type}/${cpu_type}-protos.h" +fi + +tm_d_file= +if test -f ${srcdir}/config/${cpu_type}/${cpu_type}-d.h +then + tm_d_file="${tm_d_file} ${cpu_type}/${cpu_type}-d.h" fi extra_modes= @@ -659,9 +663,9 @@ c7 esther" # 64-bit x86 processors supported by --with-arch=. Each processor # MUST be separated by exactly one space. x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona bdver1 bdver2 \ -bdver3 bdver4 znver1 znver2 znver3 btver1 btver2 k8 k8-sse3 opteron \ -opteron-sse3 nocona core2 corei7 corei7-avx core-avx-i core-avx2 atom \ -slm nehalem westmere sandybridge ivybridge haswell broadwell bonnell \ +bdver3 bdver4 znver1 znver2 znver3 znver4 znver5 btver1 btver2 k8 k8-sse3 \ +opteron opteron-sse3 nocona core2 corei7 corei7-avx core-avx-i core-avx2 \ +atom slm nehalem westmere sandybridge ivybridge haswell broadwell bonnell \ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \ sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \ @@ -676,7 +680,6 @@ case ${target} in *-*-darwin*) tmake_file="t-darwin " tm_file="${tm_file} darwin.h" - tm_d_file="${tm_d_file} tm-dwarf2.h" darwin_os=`echo ${target} | sed 's/.*darwin\([0-9.]*\).*$/\1/'` darwin_maj=`expr "$darwin_os" : '\([0-9]*\).*'` macos_min=`expr "$darwin_os" : '[0-9]*\.\([0-9]*\).*'` @@ -3552,7 +3555,6 @@ xstormy16-*-elf) # For historical reasons, the target files omit the 'x'. tm_file="dbxelf.h elfos.h newlib-stdint.h stormy16/stormy16.h" tm_p_file=stormy16/stormy16-protos.h - tm_d_file="elfos.h stormy16/stormy16.h" md_file=stormy16/stormy16.md out_file=stormy16/stormy16.cc extra_options=stormy16/stormy16.opt @@ -3738,6 +3740,14 @@ case ${target} in arch=znver3 cpu=znver3 ;; + znver4-*) + arch=znver4 + cpu=znver4 + ;; + znver5-*) + arch=znver5 + cpu=znver5 + ;; bdver4-*) arch=bdver4 cpu=bdver4 @@ -3862,6 +3872,14 @@ case ${target} in znver3-*) arch=znver3 cpu=znver3 + ;; + znver4-*) + arch=znver4 + cpu=znver4 + ;; + znver5-*) + arch=znver5 + cpu=znver5 ;; bdver4-*) arch=bdver4 @@ -4971,20 +4989,16 @@ case "${target}" in case ${target} in loongarch64-*-*-*f64) abi_pattern="lp64d" - triplet_abi="f64" ;; loongarch64-*-*-*f32) abi_pattern="lp64f" - triplet_abi="f32" ;; loongarch64-*-*-*sf) abi_pattern="lp64s" - triplet_abi="sf" ;; loongarch64-*-*-*) abi_pattern="lp64[dfs]" abi_default="lp64d" - triplet_abi="" ;; *) echo "Unsupported target ${target}." 1>&2 @@ -5005,9 +5019,6 @@ case "${target}" in ;; esac - la_canonical_triplet="loongarch64-${triplet_os}${triplet_abi}" - - # Perform initial sanity checks on --with-* options. case ${with_arch} in "" | loongarch64 | la464) ;; # OK, append here. @@ -5078,6 +5089,13 @@ case "${target}" in ;; esac + case ${with_abi} in + "lp64d") triplet_abi="";; + "lp64f") triplet_abi="f32";; + "lp64s") triplet_abi="sf";; + esac + la_canonical_triplet="loongarch64-${triplet_os}${triplet_abi}" + # Set default value for with_abiext (internal) case ${with_abiext} in "") diff --git a/gcc/config.in b/gcc/config.in index 64c27c9cfac99..52f496ca5dee4 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -367,6 +367,12 @@ #endif +/* Define if your assembler supports conditional branch relaxation. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_COND_BRANCH_RELAXATION +#endif + + /* Define if your assembler supports the --debug-prefix-map option. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_DEBUG_PREFIX_MAP @@ -598,6 +604,12 @@ #endif +/* Define if your macOS assembler supports .build_version directives */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_MACOS_BUILD_VERSION +#endif + + /* Define if the assembler understands -march=rv*_zifencei. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_MARCH_ZIFENCEI @@ -630,6 +642,12 @@ #endif +/* Define if your assembler supports -mrelax option. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_MRELAX_OPTION +#endif + + /* Define if your assembler supports .mspabi_attribute. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_MSPABI_ATTRIBUTE @@ -672,6 +690,12 @@ #endif +/* Define if your assembler supports htm insns on power10. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_POWER10_HTM +#endif + + /* Define if your assembler supports .ref */ #ifndef USED_FOR_TARGET #undef HAVE_AS_REF @@ -2208,6 +2232,12 @@ #endif +/* Define which stat syscall is able to handle 64bit indodes. */ +#ifndef USED_FOR_TARGET +#undef HOST_STAT_FOR_64BIT_INODES +#endif + + /* Define as const if the declaration of iconv() needs const. */ #ifndef USED_FOR_TARGET #undef ICONV_CONST diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index c21476d7ae963..197b763658ca9 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -613,6 +613,12 @@ enum aarch64_builtins AARCH64_LS64_BUILTIN_ST64B, AARCH64_LS64_BUILTIN_ST64BV, AARCH64_LS64_BUILTIN_ST64BV0, + AARCH64_REV16, + AARCH64_REV16L, + AARCH64_REV16LL, + AARCH64_RBIT, + AARCH64_RBITL, + AARCH64_RBITLL, AARCH64_BUILTIN_MAX }; @@ -745,6 +751,16 @@ aarch64_general_add_builtin (const char *name, tree type, unsigned int code, NULL, attrs); } +static tree +aarch64_general_simulate_builtin (const char *name, tree fntype, + unsigned int code, + tree attrs = NULL_TREE) +{ + code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_GENERAL; + return simulate_builtin_function_decl (input_location, name, fntype, + code, NULL, attrs); +} + static const char * aarch64_mangle_builtin_scalar_type (const_tree type) { @@ -1628,11 +1644,11 @@ aarch64_init_ls64_builtins_types (void) gcc_assert (TYPE_ALIGN (array_type) == 64); tree field = build_decl (input_location, FIELD_DECL, - get_identifier ("val"), array_type); + get_identifier ("val"), array_type); ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location, - tuple_type_name, - make_array_slice (&field, 1)); + tuple_type_name, + make_array_slice (&field, 1)); gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode); gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t)); @@ -1645,23 +1661,54 @@ aarch64_init_ls64_builtins (void) aarch64_init_ls64_builtins_types (); ls64_builtins_data data[4] = { - {"__builtin_aarch64_ld64b", AARCH64_LS64_BUILTIN_LD64B, + {"__arm_ld64b", AARCH64_LS64_BUILTIN_LD64B, build_function_type_list (ls64_arm_data_t, - const_ptr_type_node, NULL_TREE)}, - {"__builtin_aarch64_st64b", AARCH64_LS64_BUILTIN_ST64B, + const_ptr_type_node, NULL_TREE)}, + {"__arm_st64b", AARCH64_LS64_BUILTIN_ST64B, build_function_type_list (void_type_node, ptr_type_node, - ls64_arm_data_t, NULL_TREE)}, - {"__builtin_aarch64_st64bv", AARCH64_LS64_BUILTIN_ST64BV, + ls64_arm_data_t, NULL_TREE)}, + {"__arm_st64bv", AARCH64_LS64_BUILTIN_ST64BV, build_function_type_list (uint64_type_node, ptr_type_node, - ls64_arm_data_t, NULL_TREE)}, - {"__builtin_aarch64_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0, + ls64_arm_data_t, NULL_TREE)}, + {"__arm_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0, build_function_type_list (uint64_type_node, ptr_type_node, - ls64_arm_data_t, NULL_TREE)}, + ls64_arm_data_t, NULL_TREE)}, }; for (size_t i = 0; i < ARRAY_SIZE (data); ++i) aarch64_builtin_decls[data[i].code] - = aarch64_general_add_builtin (data[i].name, data[i].type, data[i].code); + = aarch64_general_simulate_builtin (data[i].name, data[i].type, + data[i].code); +} + +static void +aarch64_init_data_intrinsics (void) +{ + tree uint32_fntype = build_function_type_list (uint32_type_node, + uint32_type_node, NULL_TREE); + tree ulong_fntype = build_function_type_list (long_unsigned_type_node, + long_unsigned_type_node, + NULL_TREE); + tree uint64_fntype = build_function_type_list (uint64_type_node, + uint64_type_node, NULL_TREE); + aarch64_builtin_decls[AARCH64_REV16] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16", uint32_fntype, + AARCH64_REV16); + aarch64_builtin_decls[AARCH64_REV16L] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16l", ulong_fntype, + AARCH64_REV16L); + aarch64_builtin_decls[AARCH64_REV16LL] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16ll", uint64_fntype, + AARCH64_REV16LL); + aarch64_builtin_decls[AARCH64_RBIT] + = aarch64_general_add_builtin ("__builtin_aarch64_rbit", uint32_fntype, + AARCH64_RBIT); + aarch64_builtin_decls[AARCH64_RBITL] + = aarch64_general_add_builtin ("__builtin_aarch64_rbitl", ulong_fntype, + AARCH64_RBITL); + aarch64_builtin_decls[AARCH64_RBITLL] + = aarch64_general_add_builtin ("__builtin_aarch64_rbitll", uint64_fntype, + AARCH64_RBITLL); } /* Implement #pragma GCC aarch64 "arm_acle.h". */ @@ -1742,6 +1789,7 @@ aarch64_general_init_builtins (void) aarch64_init_crc32_builtins (); aarch64_init_builtin_rsqrt (); aarch64_init_rng_builtins (); + aarch64_init_data_intrinsics (); tree ftype_jcvt = build_function_type_list (intSI_type_node, double_type_node, NULL); @@ -1763,6 +1811,9 @@ aarch64_general_init_builtins (void) if (TARGET_MEMTAG) aarch64_init_memtag_builtins (); + + if (in_lto_p) + handle_arm_acle_h (); } /* Implement TARGET_BUILTIN_DECL for the AARCH64_BUILTIN_GENERAL group. */ @@ -2244,40 +2295,40 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target) { case AARCH64_LS64_BUILTIN_LD64B: { - rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); - create_output_operand (&ops[0], target, V8DImode); - create_input_operand (&ops[1], op0, DImode); - expand_insn (CODE_FOR_ld64b, 2, ops); - return ops[0].value; + rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); + create_output_operand (&ops[0], target, V8DImode); + create_input_operand (&ops[1], op0, DImode); + expand_insn (CODE_FOR_ld64b, 2, ops); + return ops[0].value; } case AARCH64_LS64_BUILTIN_ST64B: { - rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); - rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); - create_output_operand (&ops[0], op0, DImode); - create_input_operand (&ops[1], op1, V8DImode); - expand_insn (CODE_FOR_st64b, 2, ops); - return const0_rtx; + rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); + rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); + create_input_operand (&ops[0], op0, DImode); + create_input_operand (&ops[1], op1, V8DImode); + expand_insn (CODE_FOR_st64b, 2, ops); + return const0_rtx; } case AARCH64_LS64_BUILTIN_ST64BV: { - rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); - rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); - create_output_operand (&ops[0], target, DImode); - create_input_operand (&ops[1], op0, DImode); - create_input_operand (&ops[2], op1, V8DImode); - expand_insn (CODE_FOR_st64bv, 3, ops); - return ops[0].value; + rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); + rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); + create_output_operand (&ops[0], target, DImode); + create_input_operand (&ops[1], op0, DImode); + create_input_operand (&ops[2], op1, V8DImode); + expand_insn (CODE_FOR_st64bv, 3, ops); + return ops[0].value; } case AARCH64_LS64_BUILTIN_ST64BV0: { - rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); - rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); - create_output_operand (&ops[0], target, DImode); - create_input_operand (&ops[1], op0, DImode); - create_input_operand (&ops[2], op1, V8DImode); - expand_insn (CODE_FOR_st64bv0, 3, ops); - return ops[0].value; + rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); + rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); + create_output_operand (&ops[0], target, DImode); + create_input_operand (&ops[1], op0, DImode); + create_input_operand (&ops[2], op1, V8DImode); + expand_insn (CODE_FOR_st64bv0, 3, ops); + return ops[0].value; } } @@ -2394,6 +2445,37 @@ aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target) return target; } +/* Function to expand an expression EXP which calls one of the ACLE Data + Intrinsic builtins FCODE with the result going to TARGET. */ +static rtx +aarch64_expand_builtin_data_intrinsic (unsigned int fcode, tree exp, rtx target) +{ + expand_operand ops[2]; + machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); + create_output_operand (&ops[0], target, mode); + create_input_operand (&ops[1], expand_normal (CALL_EXPR_ARG (exp, 0)), mode); + enum insn_code icode; + + switch (fcode) + { + case AARCH64_REV16: + case AARCH64_REV16L: + case AARCH64_REV16LL: + icode = code_for_aarch64_rev16 (mode); + break; + case AARCH64_RBIT: + case AARCH64_RBITL: + case AARCH64_RBITLL: + icode = code_for_aarch64_rbit (mode); + break; + default: + gcc_unreachable (); + } + + expand_insn (icode, 2, ops); + return ops[0].value; +} + /* Expand an expression EXP as fpsr or fpcr setter (depending on UNSPEC) using MODE. */ static void @@ -2551,6 +2633,9 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target, if (fcode >= AARCH64_MEMTAG_BUILTIN_START && fcode <= AARCH64_MEMTAG_BUILTIN_END) return aarch64_expand_builtin_memtag (fcode, exp, target); + if (fcode >= AARCH64_REV16 + && fcode <= AARCH64_RBITLL) + return aarch64_expand_builtin_data_intrinsic (fcode, exp, target); gcc_unreachable (); } @@ -2826,6 +2911,19 @@ get_mem_type_for_load_store (unsigned int fcode) } } +/* We've seen a vector load from address ADDR. Record it in + vector_load_decls, if appropriate. */ +static void +aarch64_record_vector_load_arg (tree addr) +{ + tree decl = aarch64_vector_load_decl (addr); + if (!decl) + return; + if (!cfun->machine->vector_load_decls) + cfun->machine->vector_load_decls = hash_set::create_ggc (31); + cfun->machine->vector_load_decls->add (decl); +} + /* Try to fold STMT, given that it's a call to the built-in function with subcode FCODE. Return the new statement on success and null on failure. */ @@ -2861,6 +2959,11 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt, BUILTIN_VALL_F16 (LOAD1, ld1, 0, LOAD) BUILTIN_VDQ_I (LOAD1_U, ld1, 0, LOAD) BUILTIN_VALLP_NO_DI (LOAD1_P, ld1, 0, LOAD) + /* Punt until after inlining, so that we stand more chance of + recording something meaningful in vector_load_decls. */ + if (!cfun->after_inlining) + break; + aarch64_record_vector_load_arg (args[0]); if (!BYTES_BIG_ENDIAN) { enum aarch64_simd_type mem_type @@ -2879,6 +2982,8 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt, fold_build2 (MEM_REF, access_type, args[0], zero)); + gimple_set_vuse (new_stmt, gimple_vuse (stmt)); + gimple_set_vdef (new_stmt, gimple_vdef (stmt)); } break; @@ -2902,6 +3007,8 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt, = gimple_build_assign (fold_build2 (MEM_REF, access_type, args[0], zero), args[1]); + gimple_set_vuse (new_stmt, gimple_vuse (stmt)); + gimple_set_vdef (new_stmt, gimple_vdef (stmt)); } break; diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc index 767ee0c763c56..e024d410dc7de 100644 --- a/gcc/config/aarch64/aarch64-c.cc +++ b/gcc/config/aarch64/aarch64-c.cc @@ -200,8 +200,14 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC", pfile); aarch64_def_or_undef (TARGET_BF16_FP, "__ARM_FEATURE_BF16_SCALAR_ARITHMETIC", pfile); + aarch64_def_or_undef (TARGET_BF16_FP, + "__ARM_FEATURE_BF16", pfile); + aarch64_def_or_undef (TARGET_SVE_BF16, + "__ARM_FEATURE_SVE_BF16", pfile); + aarch64_def_or_undef (TARGET_LS64, "__ARM_FEATURE_LS64", pfile); + aarch64_def_or_undef (AARCH64_ISA_RCPC, "__ARM_FEATURE_RCPC", pfile); /* Not for ACLE, but required to keep "float.h" correct if we switch target between implementations that do or do not support ARMv8.2-A diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 41d95354b6a48..6532bdaafb521 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -69,7 +69,8 @@ AARCH64_CORE("thunderxt81", thunderxt81, thunderx, 8A, AARCH64_FL_FOR_ARCH AARCH64_CORE("thunderxt83", thunderxt83, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a3, -1) /* Ampere Computing ('\xC0') cores. */ -AARCH64_CORE("ampere1", ampere1, cortexa57, 8_6A, AARCH64_FL_FOR_ARCH8_6, ampere1, 0xC0, 0xac3, -1) +AARCH64_CORE("ampere1", ampere1, cortexa57, 8_6A, AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_RNG | AARCH64_FL_SHA3, ampere1, 0xC0, 0xac3, -1) +AARCH64_CORE("ampere1a", ampere1a, cortexa57, 8_6A, AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_RNG | AARCH64_FL_SHA3 | AARCH64_FL_MEMTAG, ampere1a, 0xC0, 0xac4, -1) /* Do not swap around "emag" and "xgene1", this order is required to handle variant correctly. */ AARCH64_CORE("emag", emag, xgene1, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, emag, 0x50, 0x000, 3) @@ -133,17 +134,17 @@ AARCH64_CORE("tsv110", tsv110, tsv110, 8_2A, AARCH64_FL_FOR_ARCH8_2 | AARCH64_ /* ARMv8.3-A Architecture Processors. */ /* Marvell cores (TX3). */ -AARCH64_CORE("thunderx3t110", thunderx3t110, thunderx3t110, 8_3A, AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC | AARCH64_FL_SM4 | AARCH64_FL_SHA3 | AARCH64_FL_F16FML | AARCH64_FL_RCPC8_4, thunderx3t110, 0x43, 0x0b8, 0x0a) +AARCH64_CORE("thunderx3t110", thunderx3t110, thunderx3t110, 8_3A, AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_CRYPTO | AARCH64_FL_SM4 | AARCH64_FL_SHA3 | AARCH64_FL_F16FML | AARCH64_FL_RCPC8_4, thunderx3t110, 0x43, 0x0b8, 0x0a) /* ARMv8.4-A Architecture Processors. */ /* Arm ('A') cores. */ -AARCH64_CORE("zeus", zeus, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_RCPC | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoversev1, 0x41, 0xd40, -1) -AARCH64_CORE("neoverse-v1", neoversev1, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_RCPC | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoversev1, 0x41, 0xd40, -1) -AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_RCPC | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoverse512tvb, INVALID_IMP, INVALID_CORE, -1) +AARCH64_CORE("zeus", zeus, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoversev1, 0x41, 0xd40, -1) +AARCH64_CORE("neoverse-v1", neoversev1, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoversev1, 0x41, 0xd40, -1) +AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_SVE | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_PROFILE | AARCH64_FL_SSBS | AARCH64_FL_RNG, neoverse512tvb, INVALID_IMP, INVALID_CORE, -1) /* Qualcomm ('Q') cores. */ -AARCH64_CORE("saphira", saphira, saphira, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC, saphira, 0x51, 0xC01, -1) +AARCH64_CORE("saphira", saphira, saphira, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_CRYPTO, saphira, 0x51, 0xC01, -1) /* ARMv8-A big.LITTLE implementations. */ @@ -163,14 +164,18 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 8R, AARCH64_FL_FOR_ARCH8_R, cor /* Armv9.0-A Architecture Processors. */ /* Arm ('A') cores. */ -AARCH64_CORE("cortex-a510", cortexa510, cortexa55, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1) +AARCH64_CORE("cortex-a510", cortexa510, cortexa53, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG + | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1) AARCH64_CORE("cortex-a710", cortexa710, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1) AARCH64_CORE("cortex-x2", cortexx2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd48, -1) AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x41, 0xd49, -1) +AARCH64_CORE("cobalt-100", cobalt100, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x6d, 0xd49, -1) -AARCH64_CORE("demeter", demeter, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, demeter, 0x41, 0xd4f, -1) +AARCH64_CORE("demeter", demeter, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1) +AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1) +AARCH64_CORE("grace", grace, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_CRYPTO | AARCH64_FL_SHA3 | AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4 | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1) #undef AARCH64_CORE diff --git a/gcc/config/aarch64/aarch64-cost-tables.h b/gcc/config/aarch64/aarch64-cost-tables.h index 760d7b3036879..48522606fbef9 100644 --- a/gcc/config/aarch64/aarch64-cost-tables.h +++ b/gcc/config/aarch64/aarch64-cost-tables.h @@ -775,4 +775,111 @@ const struct cpu_cost_table ampere1_extra_costs = } }; +const struct cpu_cost_table ampere1a_extra_costs = +{ + /* ALU */ + { + 0, /* arith. */ + 0, /* logical. */ + 0, /* shift. */ + COSTS_N_INSNS (1), /* shift_reg. */ + 0, /* arith_shift. */ + COSTS_N_INSNS (1), /* arith_shift_reg. */ + 0, /* log_shift. */ + COSTS_N_INSNS (1), /* log_shift_reg. */ + 0, /* extend. */ + COSTS_N_INSNS (1), /* extend_arith. */ + 0, /* bfi. */ + 0, /* bfx. */ + 0, /* clz. */ + 0, /* rev. */ + 0, /* non_exec. */ + true /* non_exec_costs_exec. */ + }, + { + /* MULT SImode */ + { + COSTS_N_INSNS (3), /* simple. */ + COSTS_N_INSNS (3), /* flag_setting. */ + COSTS_N_INSNS (3), /* extend. */ + COSTS_N_INSNS (4), /* add. */ + COSTS_N_INSNS (4), /* extend_add. */ + COSTS_N_INSNS (19) /* idiv. */ + }, + /* MULT DImode */ + { + COSTS_N_INSNS (3), /* simple. */ + 0, /* flag_setting (N/A). */ + COSTS_N_INSNS (3), /* extend. */ + COSTS_N_INSNS (4), /* add. */ + COSTS_N_INSNS (4), /* extend_add. */ + COSTS_N_INSNS (35) /* idiv. */ + } + }, + /* LD/ST */ + { + COSTS_N_INSNS (4), /* load. */ + COSTS_N_INSNS (4), /* load_sign_extend. */ + 0, /* ldrd (n/a). */ + 0, /* ldm_1st. */ + 0, /* ldm_regs_per_insn_1st. */ + 0, /* ldm_regs_per_insn_subsequent. */ + COSTS_N_INSNS (5), /* loadf. */ + COSTS_N_INSNS (5), /* loadd. */ + COSTS_N_INSNS (5), /* load_unaligned. */ + 0, /* store. */ + 0, /* strd. */ + 0, /* stm_1st. */ + 0, /* stm_regs_per_insn_1st. */ + 0, /* stm_regs_per_insn_subsequent. */ + COSTS_N_INSNS (2), /* storef. */ + COSTS_N_INSNS (2), /* stored. */ + COSTS_N_INSNS (2), /* store_unaligned. */ + COSTS_N_INSNS (3), /* loadv. */ + COSTS_N_INSNS (3) /* storev. */ + }, + { + /* FP SFmode */ + { + COSTS_N_INSNS (25), /* div. */ + COSTS_N_INSNS (4), /* mult. */ + COSTS_N_INSNS (4), /* mult_addsub. */ + COSTS_N_INSNS (4), /* fma. */ + COSTS_N_INSNS (4), /* addsub. */ + COSTS_N_INSNS (2), /* fpconst. */ + COSTS_N_INSNS (4), /* neg. */ + COSTS_N_INSNS (4), /* compare. */ + COSTS_N_INSNS (4), /* widen. */ + COSTS_N_INSNS (4), /* narrow. */ + COSTS_N_INSNS (4), /* toint. */ + COSTS_N_INSNS (4), /* fromint. */ + COSTS_N_INSNS (4) /* roundint. */ + }, + /* FP DFmode */ + { + COSTS_N_INSNS (34), /* div. */ + COSTS_N_INSNS (5), /* mult. */ + COSTS_N_INSNS (5), /* mult_addsub. */ + COSTS_N_INSNS (5), /* fma. */ + COSTS_N_INSNS (5), /* addsub. */ + COSTS_N_INSNS (2), /* fpconst. */ + COSTS_N_INSNS (5), /* neg. */ + COSTS_N_INSNS (5), /* compare. */ + COSTS_N_INSNS (5), /* widen. */ + COSTS_N_INSNS (5), /* narrow. */ + COSTS_N_INSNS (6), /* toint. */ + COSTS_N_INSNS (6), /* fromint. */ + COSTS_N_INSNS (5) /* roundint. */ + } + }, + /* Vector */ + { + COSTS_N_INSNS (3), /* alu. */ + COSTS_N_INSNS (3), /* mult. */ + COSTS_N_INSNS (2), /* movi. */ + COSTS_N_INSNS (2), /* dup. */ + COSTS_N_INSNS (2) /* extract. */ + } +}; + #endif diff --git a/gcc/config/aarch64/aarch64-d.cc b/gcc/config/aarch64/aarch64-d.cc index d3fcc0b881e39..e0e0401631e5f 100644 --- a/gcc/config/aarch64/aarch64-d.cc +++ b/gcc/config/aarch64/aarch64-d.cc @@ -20,6 +20,7 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/aarch64/aarch64-d.h b/gcc/config/aarch64/aarch64-d.h new file mode 100644 index 0000000000000..c605a68ef9fa3 --- /dev/null +++ b/gcc/config/aarch64/aarch64-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the AArch64 architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Defined in aarch64-d.cc */ +extern void aarch64_d_target_versions (void); +extern void aarch64_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS aarch64_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO aarch64_d_register_target_info diff --git a/gcc/config/aarch64/aarch64-fusion-pairs.def b/gcc/config/aarch64/aarch64-fusion-pairs.def index c064fb9b85dd4..d91f8a2babd89 100644 --- a/gcc/config/aarch64/aarch64-fusion-pairs.def +++ b/gcc/config/aarch64/aarch64-fusion-pairs.def @@ -36,5 +36,6 @@ AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH) AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC) AARCH64_FUSION_PAIR ("alu+branch", ALU_BRANCH) AARCH64_FUSION_PAIR ("alu+cbz", ALU_CBZ) +AARCH64_FUSION_PAIR ("addsub_2reg_const1", ADDSUB_2REG_CONST1) #undef AARCH64_FUSION_PAIR diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index 2ac781dff4a93..9d99a021379d7 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -779,7 +779,9 @@ bool aarch64_const_vec_all_same_in_range_p (rtx, HOST_WIDE_INT, bool aarch64_constant_address_p (rtx); bool aarch64_emit_approx_div (rtx, rtx, rtx); bool aarch64_emit_approx_sqrt (rtx, rtx, bool); +tree aarch64_vector_load_decl (tree); void aarch64_expand_call (rtx, rtx, rtx, bool); +bool aarch64_expand_cpymem_mops (rtx *, bool); bool aarch64_expand_cpymem (rtx *); bool aarch64_expand_setmem (rtx *); bool aarch64_float_const_zero_rtx_p (rtx); @@ -1049,10 +1051,6 @@ enum aarch64_parse_opt_result aarch64_parse_extension (const char *, void aarch64_get_all_extension_candidates (auto_vec *candidates); std::string aarch64_get_extension_string_for_isa_flags (uint64_t, uint64_t); -/* Defined in aarch64-d.cc */ -extern void aarch64_d_target_versions (void); -extern void aarch64_d_register_target_info (void); - rtl_opt_pass *make_pass_fma_steering (gcc::context *); rtl_opt_pass *make_pass_track_speculation (gcc::context *); rtl_opt_pass *make_pass_tag_collision_avoidance (gcc::context *); @@ -1065,7 +1063,7 @@ bool aarch64_high_bits_all_ones_p (HOST_WIDE_INT); struct atomic_ool_names { - const char *str[5][4]; + const char *str[5][5]; }; rtx aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx, @@ -1083,4 +1081,6 @@ const char *aarch64_indirect_call_asm (rtx); extern bool aarch64_harden_sls_retbr_p (void); extern bool aarch64_harden_sls_blr_p (void); +extern void aarch64_output_patchable_area (unsigned int, bool); + #endif /* GCC_AARCH64_PROTOS_H */ diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index a00e1c6ef8d6b..ee7f0b89cff69 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -9047,7 +9047,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=w") (plus: V4SF (match_operand:V4SF 1 "register_operand" "0") (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w") - (match_operand:VBF 3 "register_operand" "w") + (match_operand:VBF 3 "register_operand" "x") (match_operand:SI 4 "const_int_operand" "n")] BF_MLA)))] "TARGET_BF16_SIMD" diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index c24c05487246f..f96cb3ccc7bfc 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc @@ -494,15 +494,22 @@ class svcnot_impl : public function_base expand (function_expander &e) const OVERRIDE { machine_mode mode = e.vector_mode (0); - if (e.pred == PRED_x) - { - /* The pattern for CNOT includes an UNSPEC_PRED_Z, so needs - a ptrue hint. */ - e.add_ptrue_hint (0, e.gp_mode (0)); - return e.use_pred_x_insn (code_for_aarch64_pred_cnot (mode)); - } + machine_mode pred_mode = e.gp_mode (0); + /* The underlying _x pattern is effectively: + + dst = src == 0 ? 1 : 0 + + rather than an UNSPEC_PRED_X. Using this form allows autovec + constructs to be matched by combine, but it means that the + predicate on the src == 0 comparison must be all-true. - return e.use_cond_insn (code_for_cond_cnot (mode), 0); + For simplicity, represent other _x operations as fully-defined _m + operations rather than using a separate bespoke pattern. */ + if (e.pred == PRED_x + && gen_lowpart (pred_mode, e.args[0]) == CONSTM1_RTX (pred_mode)) + return e.use_pred_x_insn (code_for_aarch64_ptrue_cnot (mode)); + return e.use_cond_insn (code_for_cond_cnot (mode), + e.pred == PRED_x ? 1 : 0); } }; @@ -2359,7 +2366,7 @@ class svusdot_impl : public function_base version) is through the USDOT instruction but with the second and third inputs swapped. */ if (m_su) - e.rotate_inputs_left (1, 2); + e.rotate_inputs_left (1, 3); /* The ACLE function has the same order requirements as for svdot. While there's no requirement for the RTL pattern to have the same sort of order as that for dot_prod, it's easier to read. diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc index 9d78b270e478b..12d9beee4da3c 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins.cc @@ -530,7 +530,8 @@ static CONSTEXPR const function_group_info function_groups[] = { }; /* The scalar type associated with each vector type. */ -GTY(()) tree scalar_types[NUM_VECTOR_TYPES]; +extern GTY(()) tree scalar_types[NUM_VECTOR_TYPES]; +tree scalar_types[NUM_VECTOR_TYPES]; /* The single-predicate and single-vector types, with their built-in "__SV..._t" name. Allow an index of NUM_VECTOR_TYPES, which always @@ -538,13 +539,16 @@ GTY(()) tree scalar_types[NUM_VECTOR_TYPES]; static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1]; /* Same, but with the arm_sve.h "sv..._t" name. */ -GTY(()) tree acle_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; +extern GTY(()) tree acle_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; +tree acle_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; /* The svpattern enum type. */ -GTY(()) tree acle_svpattern; +extern GTY(()) tree acle_svpattern; +tree acle_svpattern; /* The svprfop enum type. */ -GTY(()) tree acle_svprfop; +extern GTY(()) tree acle_svprfop; +tree acle_svprfop; /* The list of all registered function decls, indexed by code. */ static GTY(()) vec *registered_functions; diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index bd60e65b0c3f0..c68a3598423f4 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3205,24 +3205,24 @@ ;; - CNOT ;; ------------------------------------------------------------------------- -;; Predicated logical inverse. -(define_expand "@aarch64_pred_cnot" +;; Logical inverse, predicated with a ptrue. +(define_expand "@aarch64_ptrue_cnot" [(set (match_operand:SVE_FULL_I 0 "register_operand") (unspec:SVE_FULL_I [(unspec: [(match_operand: 1 "register_operand") - (match_operand:SI 2 "aarch64_sve_ptrue_flag") + (const_int SVE_KNOWN_PTRUE) (eq: - (match_operand:SVE_FULL_I 3 "register_operand") - (match_dup 4))] + (match_operand:SVE_FULL_I 2 "register_operand") + (match_dup 3))] UNSPEC_PRED_Z) - (match_dup 5) - (match_dup 4)] + (match_dup 4) + (match_dup 3)] UNSPEC_SEL))] "TARGET_SVE" { - operands[4] = CONST0_RTX (mode); - operands[5] = CONST1_RTX (mode); + operands[3] = CONST0_RTX (mode); + operands[4] = CONST1_RTX (mode); } ) @@ -3231,7 +3231,7 @@ (unspec:SVE_I [(unspec: [(match_operand: 1 "register_operand" "Upl, Upl") - (match_operand:SI 5 "aarch64_sve_ptrue_flag") + (const_int SVE_KNOWN_PTRUE) (eq: (match_operand:SVE_I 2 "register_operand" "0, w") (match_operand:SVE_I 3 "aarch64_simd_imm_zero"))] @@ -8231,7 +8231,7 @@ [(match_operand: 1) (const_int SVE_KNOWN_PTRUE) (match_operand:SVE_FULL_F 2 "register_operand" "w") - (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero" "wDz")] + (match_operand:SVE_FULL_F 3 "register_operand" "w")] UNSPEC_COND_FCMUO)) (match_operand: 4 "register_operand" "Upa")) (match_dup: 1))) @@ -8267,7 +8267,7 @@ [(match_operand: 1) (const_int SVE_KNOWN_PTRUE) (match_operand:SVE_FULL_F 2 "register_operand" "w") - (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero" "wDz")] + (match_operand:SVE_FULL_F 3 "register_operand" "w")] UNSPEC_COND_FCMUO)) (not: (match_operand: 4 "register_operand" "Upa"))) @@ -9612,45 +9612,41 @@ (define_insn "*aarch64_brk_cc" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC - [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa") + [(match_operand:VNx16BI 1 "register_operand" "Upa") (match_dup 1) (match_operand:SI 4 "aarch64_sve_ptrue_flag") (unspec:VNx16BI [(match_dup 1) - (match_operand:VNx16BI 2 "register_operand" "Upa, Upa") - (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")] + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "aarch64_simd_imm_zero")] SVE_BRK_UNARY)] UNSPEC_PTEST)) - (set (match_operand:VNx16BI 0 "register_operand" "=Upa, Upa") + (set (match_operand:VNx16BI 0 "register_operand" "=Upa") (unspec:VNx16BI [(match_dup 1) (match_dup 2) (match_dup 3)] SVE_BRK_UNARY))] "TARGET_SVE" - "@ - brks\t%0.b, %1/z, %2.b - brks\t%0.b, %1/m, %2.b" + "brks\t%0.b, %1/z, %2.b" ) ;; Same, but with only the flags result being interesting. (define_insn "*aarch64_brk_ptest" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC - [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa") + [(match_operand:VNx16BI 1 "register_operand" "Upa") (match_dup 1) (match_operand:SI 4 "aarch64_sve_ptrue_flag") (unspec:VNx16BI [(match_dup 1) - (match_operand:VNx16BI 2 "register_operand" "Upa, Upa") - (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")] + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "aarch64_simd_imm_zero")] SVE_BRK_UNARY)] UNSPEC_PTEST)) - (clobber (match_scratch:VNx16BI 0 "=Upa, Upa"))] + (clobber (match_scratch:VNx16BI 0 "=Upa"))] "TARGET_SVE" - "@ - brks\t%0.b, %1/z, %2.b - brks\t%0.b, %1/m, %2.b" + "brks\t%0.b, %1/z, %2.b" ) ;; ------------------------------------------------------------------------- @@ -9677,7 +9673,61 @@ "brk\t%0.b, %1/z, %2.b, %.b" ) -;; Same, but also producing a flags result. +;; BRKN, producing both a predicate and a flags result. Unlike other +;; flag-setting instructions, these flags are always set wrt a ptrue. +(define_insn_and_rewrite "*aarch64_brkn_cc" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (set (match_operand:VNx16BI 0 "register_operand" "=Upa") + (unspec:VNx16BI + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BRKN))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; Same, but with only the flags result being interesting. +(define_insn_and_rewrite "*aarch64_brkn_ptest" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (clobber (match_scratch:VNx16BI 0 "=Upa"))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; BRKPA and BRKPB, producing both a predicate and a flags result. (define_insn "*aarch64_brk_cc" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC @@ -9687,17 +9737,17 @@ (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (set (match_operand:VNx16BI 0 "register_operand" "=Upa") (unspec:VNx16BI [(match_dup 1) (match_dup 2) (match_dup 3)] - SVE_BRK_BINARY))] + SVE_BRKP))] "TARGET_SVE" - "brks\t%0.b, %1/z, %2.b, %.b" + "brks\t%0.b, %1/z, %2.b, %3.b" ) ;; Same, but with only the flags result being interesting. @@ -9710,12 +9760,12 @@ (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (clobber (match_scratch:VNx16BI 0 "=Upa"))] "TARGET_SVE" - "brks\t%0.b, %1/z, %2.b, %.b" + "brks\t%0.b, %1/z, %2.b, %3.b" ) ;; ------------------------------------------------------------------------- diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index 27da961475ade..0c139e3e72987 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,demeter" + "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,cobalt100,demeter,neoversev2,grace" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/config/aarch64/aarch64-tuning-flags.def b/gcc/config/aarch64/aarch64-tuning-flags.def index 029583b4f65f3..b4a8f99a66ccc 100644 --- a/gcc/config/aarch64/aarch64-tuning-flags.def +++ b/gcc/config/aarch64/aarch64-tuning-flags.def @@ -44,6 +44,9 @@ AARCH64_EXTRA_TUNING_OPTION ("cheap_shift_extend", CHEAP_SHIFT_EXTEND) /* Disallow load/store pair instructions on Q-registers. */ AARCH64_EXTRA_TUNING_OPTION ("no_ldp_stp_qregs", NO_LDP_STP_QREGS) +/* Disallow load-pair instructions to be formed in combine/peephole. */ +AARCH64_EXTRA_TUNING_OPTION ("no_ldp_combine", NO_LDP_COMBINE) + AARCH64_EXTRA_TUNING_OPTION ("rename_load_regs", RENAME_LOAD_REGS) AARCH64_EXTRA_TUNING_OPTION ("cse_sve_vl_constants", CSE_SVE_VL_CONSTANTS) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index f650abbc4ce49..cd2f4053a1a06 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -537,7 +537,7 @@ static const struct cpu_addrcost_table neoversen2_addrcost_table = 0 /* imm_offset */ }; -static const struct cpu_addrcost_table demeter_addrcost_table = +static const struct cpu_addrcost_table neoversev2_addrcost_table = { { 1, /* hi */ @@ -680,7 +680,7 @@ static const struct cpu_regmove_cost neoversev1_regmove_cost = 2 /* FP2FP */ }; -static const struct cpu_regmove_cost demeter_regmove_cost = +static const struct cpu_regmove_cost neoversev2_regmove_cost = { 1, /* GP2GP */ /* Spilling to int<->fp instead of memory is recommended so set @@ -1137,7 +1137,7 @@ static const struct cpu_vector_cost thunderx3t110_vector_cost = static const advsimd_vec_cost ampere1_advsimd_vector_cost = { - 3, /* int_stmt_cost */ + 1, /* int_stmt_cost */ 3, /* fp_stmt_cost */ 0, /* ld2_st2_permute_cost */ 0, /* ld3_st3_permute_cost */ @@ -1153,17 +1153,17 @@ static const advsimd_vec_cost ampere1_advsimd_vector_cost = 8, /* store_elt_extra_cost */ 6, /* vec_to_scalar_cost */ 7, /* scalar_to_vec_cost */ - 5, /* align_load_cost */ - 5, /* unalign_load_cost */ - 2, /* unalign_store_cost */ - 2 /* store_cost */ + 4, /* align_load_cost */ + 4, /* unalign_load_cost */ + 1, /* unalign_store_cost */ + 1 /* store_cost */ }; /* Ampere-1 costs for vector insn classes. */ static const struct cpu_vector_cost ampere1_vector_cost = { 1, /* scalar_int_stmt_cost */ - 1, /* scalar_fp_stmt_cost */ + 3, /* scalar_fp_stmt_cost */ 4, /* scalar_load_cost */ 1, /* scalar_store_cost */ 1, /* cond_taken_branch_cost */ @@ -1920,7 +1920,44 @@ static const struct tune_params ampere1_tunings = 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NO_LDP_COMBINE), /* tune_flags. */ + &ere1_prefetch_tune +}; + +static const struct tune_params ampere1a_tunings = +{ + &ere1a_extra_costs, + &generic_addrcost_table, + &generic_regmove_cost, + &ere1_vector_cost, + &generic_branch_cost, + &generic_approx_modes, + SVE_NOT_IMPLEMENTED, /* sve_width */ + { 4, /* load_int. */ + 4, /* store_int. */ + 4, /* load_fp. */ + 4, /* store_fp. */ + 4, /* load_pred. */ + 4 /* store_pred. */ + }, /* memmov_cost. */ + 4, /* issue_rate */ + (AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_AES_AESMC | + AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK | + AARCH64_FUSE_ALU_BRANCH /* adds, ands, bics, ccmp, ccmn */ | + AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_ALU_CBZ | + AARCH64_FUSE_ADDSUB_2REG_CONST1), + /* fusible_ops */ + "32", /* function_align. */ + "4", /* jump_align. */ + "32:16", /* loop_align. */ + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 2, /* vec_reassoc_width. */ + 2, /* min_div_recip_mul_sf. */ + 2, /* min_div_recip_mul_df. */ + 0, /* max_case_values. */ + tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ + (AARCH64_EXTRA_TUNE_NO_LDP_COMBINE), /* tune_flags. */ &ere1_prefetch_tune }; @@ -2429,7 +2466,7 @@ static const struct tune_params neoversen2_tunings = &generic_prefetch_tune }; -static const advsimd_vec_cost demeter_advsimd_vector_cost = +static const advsimd_vec_cost neoversev2_advsimd_vector_cost = { 2, /* int_stmt_cost */ 2, /* fp_stmt_cost */ @@ -2460,7 +2497,7 @@ static const advsimd_vec_cost demeter_advsimd_vector_cost = 1 /* store_cost */ }; -static const sve_vec_cost demeter_sve_vector_cost = +static const sve_vec_cost neoversev2_sve_vector_cost = { { 2, /* int_stmt_cost */ @@ -2517,7 +2554,7 @@ static const sve_vec_cost demeter_sve_vector_cost = 3 /* scatter_store_elt_cost */ }; -static const aarch64_scalar_vec_issue_info demeter_scalar_issue_info = +static const aarch64_scalar_vec_issue_info neoversev2_scalar_issue_info = { 3, /* loads_stores_per_cycle */ 2, /* stores_per_cycle */ @@ -2526,7 +2563,7 @@ static const aarch64_scalar_vec_issue_info demeter_scalar_issue_info = 1 /* fp_simd_store_general_ops */ }; -static const aarch64_advsimd_vec_issue_info demeter_advsimd_issue_info = +static const aarch64_advsimd_vec_issue_info neoversev2_advsimd_issue_info = { { 3, /* loads_stores_per_cycle */ @@ -2540,7 +2577,7 @@ static const aarch64_advsimd_vec_issue_info demeter_advsimd_issue_info = 3 /* ld4_st4_general_ops */ }; -static const aarch64_sve_vec_issue_info demeter_sve_issue_info = +static const aarch64_sve_vec_issue_info neoversev2_sve_issue_info = { { { @@ -2562,15 +2599,15 @@ static const aarch64_sve_vec_issue_info demeter_sve_issue_info = 1 /* gather_scatter_pair_pred_ops */ }; -static const aarch64_vec_issue_info demeter_vec_issue_info = +static const aarch64_vec_issue_info neoversev2_vec_issue_info = { - &demeter_scalar_issue_info, - &demeter_advsimd_issue_info, - &demeter_sve_issue_info + &neoversev2_scalar_issue_info, + &neoversev2_advsimd_issue_info, + &neoversev2_sve_issue_info }; /* Demeter costs for vector insn classes. */ -static const struct cpu_vector_cost demeter_vector_cost = +static const struct cpu_vector_cost neoversev2_vector_cost = { 1, /* scalar_int_stmt_cost */ 2, /* scalar_fp_stmt_cost */ @@ -2578,17 +2615,17 @@ static const struct cpu_vector_cost demeter_vector_cost = 1, /* scalar_store_cost */ 1, /* cond_taken_branch_cost */ 1, /* cond_not_taken_branch_cost */ - &demeter_advsimd_vector_cost, /* advsimd */ - &demeter_sve_vector_cost, /* sve */ - &demeter_vec_issue_info /* issue_info */ + &neoversev2_advsimd_vector_cost, /* advsimd */ + &neoversev2_sve_vector_cost, /* sve */ + &neoversev2_vec_issue_info /* issue_info */ }; -static const struct tune_params demeter_tunings = +static const struct tune_params neoversev2_tunings = { &cortexa76_extra_costs, - &demeter_addrcost_table, - &demeter_regmove_cost, - &demeter_vector_cost, + &neoversev2_addrcost_table, + &neoversev2_regmove_cost, + &neoversev2_vector_cost, &generic_branch_cost, &generic_approx_modes, SVE_128, /* sve_width */ @@ -4098,7 +4135,7 @@ aarch64_reg_save_mode (unsigned int regno) case ARM_PCS_SIMD: /* The vector PCS saves the low 128 bits (which is the full register on non-SVE targets). */ - return TFmode; + return V16QImode; case ARM_PCS_SVE: /* Use vectors of DImode for registers that need frame @@ -7264,9 +7301,9 @@ aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, machine_mode mode, /* Given MODE and TYPE of a function argument, return the alignment in bits. The idea is to suppress any stronger alignment requested by the user and opt for the natural alignment (specified in AAPCS64 \S - 4.1). ABI_BREAK is set to true if the alignment was incorrectly - calculated in versions of GCC prior to GCC-9. This is a helper - function for local use only. */ + 4.1). ABI_BREAK is set to the old alignment if the alignment was + incorrectly calculated in versions of GCC prior to GCC-9. This is + a helper function for local use only. */ static unsigned int aarch64_function_arg_alignment (machine_mode mode, const_tree type, @@ -7282,7 +7319,19 @@ aarch64_function_arg_alignment (machine_mode mode, const_tree type, gcc_assert (TYPE_MODE (type) == mode); if (!AGGREGATE_TYPE_P (type)) - return TYPE_ALIGN (TYPE_MAIN_VARIANT (type)); + { + /* The ABI alignment is the natural alignment of the type, without + any attributes applied. Normally this is the alignment of the + TYPE_MAIN_VARIANT, but not always; see PR108910 for a counterexample. + For now we just handle the known exceptions explicitly. */ + type = TYPE_MAIN_VARIANT (type); + if (POINTER_TYPE_P (type)) + { + gcc_assert (known_eq (POINTER_SIZE, GET_MODE_BITSIZE (mode))); + return POINTER_SIZE; + } + return TYPE_ALIGN (type); + } if (TREE_CODE (type) == ARRAY_TYPE) return TYPE_ALIGN (TREE_TYPE (type)); @@ -7342,11 +7391,24 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg) if (pcum->aapcs_arg_processed) return; + bool warn_pcs_change + = (warn_psabi + && !pcum->silent_p + && (currently_expanding_function_start + || currently_expanding_gimple_stmt)); + + unsigned int alignment + = aarch64_function_arg_alignment (mode, type, &abi_break); + gcc_assert (!alignment || abi_break < alignment); + pcum->aapcs_arg_processed = true; pure_scalable_type_info pst_info; if (type && pst_info.analyze_registers (type)) { + /* aarch64_function_arg_alignment has never had an effect on + this case. */ + /* The PCS says that it is invalid to pass an SVE value to an unprototyped function. There is no ABI-defined location we can return in this case, so we have no real choice but to raise @@ -7417,6 +7479,8 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg) and homogenous short-vector aggregates (HVA). */ if (allocate_nvrn) { + /* aarch64_function_arg_alignment has never had an effect on + this case. */ if (!pcum->silent_p && !TARGET_FLOAT) aarch64_err_no_fpadvsimd (mode); @@ -7481,7 +7545,7 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg) && (aarch64_function_arg_alignment (mode, type, &abi_break) == 16 * BITS_PER_UNIT)) { - if (abi_break && warn_psabi && currently_expanding_gimple_stmt) + if (warn_pcs_change && abi_break) inform (input_location, "parameter passing for argument of type " "%qT changed in GCC 9.1", type); ++ncrn; @@ -7544,7 +7608,7 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg) int new_size = ROUND_UP (pcum->aapcs_stack_size, 16 / UNITS_PER_WORD); if (pcum->aapcs_stack_size != new_size) { - if (abi_break && warn_psabi && currently_expanding_gimple_stmt) + if (warn_pcs_change && abi_break) inform (input_location, "parameter passing for argument of type " "%qT changed in GCC 9.1", type); pcum->aapcs_stack_size = new_size; @@ -7664,14 +7728,13 @@ aarch64_function_arg_boundary (machine_mode mode, const_tree type) unsigned int alignment = aarch64_function_arg_alignment (mode, type, &abi_break); alignment = MIN (MAX (alignment, PARM_BOUNDARY), STACK_BOUNDARY); - if (abi_break & warn_psabi) + if (abi_break && warn_psabi) { abi_break = MIN (MAX (abi_break, PARM_BOUNDARY), STACK_BOUNDARY); if (alignment != abi_break) inform (input_location, "parameter passing for argument of type " "%qT changed in GCC 9.1", type); } - return alignment; } @@ -8070,18 +8133,32 @@ aarch64_needs_frame_chain (void) return aarch64_use_frame_pointer; } +/* Return true if the current function should save registers above + the locals area, rather than below it. */ + +static bool +aarch64_save_regs_above_locals_p () +{ + /* When using stack smash protection, make sure that the canary slot + comes between the locals and the saved registers. Otherwise, + it would be possible for a carefully sized smash attack to change + the saved registers (particularly LR and FP) without reaching the + canary. */ + return crtl->stack_protect_guard; +} + /* Mark the registers that need to be saved by the callee and calculate the size of the callee-saved registers area and frame record (both FP and LR may be omitted). */ static void aarch64_layout_frame (void) { - poly_int64 offset = 0; int regno, last_fp_reg = INVALID_REGNUM; machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); bool frame_related_fp_reg_p = false; aarch64_frame &frame = cfun->machine->frame; + poly_int64 top_of_locals = -1; frame.emit_frame_chain = aarch64_needs_frame_chain (); @@ -8148,11 +8225,18 @@ aarch64_layout_frame (void) && !crtl->abi->clobbers_full_reg_p (regno)) frame.reg_offset[regno] = SLOT_REQUIRED; - /* With stack-clash, LR must be saved in non-leaf functions. The saving of - LR counts as an implicit probe which allows us to maintain the invariant - described in the comment at expand_prologue. */ - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); + bool regs_at_top_p = aarch64_save_regs_above_locals_p (); + + poly_int64 offset = crtl->outgoing_args_size; + gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); + if (regs_at_top_p) + { + offset += get_frame_size (); + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + top_of_locals = offset; + } + frame.bytes_below_saved_regs = offset; + frame.sve_save_and_probe = INVALID_REGNUM; /* Now assign stack slots for the registers. Start with the predicate registers, since predicate LDR and STR have a relatively small @@ -8160,11 +8244,14 @@ aarch64_layout_frame (void) for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) { + if (frame.sve_save_and_probe == INVALID_REGNUM) + frame.sve_save_and_probe = regno; frame.reg_offset[regno] = offset; offset += BYTES_PER_SVE_PRED; } - if (maybe_ne (offset, 0)) + poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; + if (maybe_ne (saved_prs_size, 0)) { /* If we have any vector registers to save above the predicate registers, the offset of the vector register save slots need to be a multiple @@ -8182,10 +8269,10 @@ aarch64_layout_frame (void) offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); else { - if (known_le (offset, vector_save_size)) - offset = vector_save_size; - else if (known_le (offset, vector_save_size * 2)) - offset = vector_save_size * 2; + if (known_le (saved_prs_size, vector_save_size)) + offset = frame.bytes_below_saved_regs + vector_save_size; + else if (known_le (saved_prs_size, vector_save_size * 2)) + offset = frame.bytes_below_saved_regs + vector_save_size * 2; else gcc_unreachable (); } @@ -8196,34 +8283,53 @@ aarch64_layout_frame (void) for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) { + if (frame.sve_save_and_probe == INVALID_REGNUM) + frame.sve_save_and_probe = regno; frame.reg_offset[regno] = offset; offset += vector_save_size; } /* OFFSET is now the offset of the hard frame pointer from the bottom of the callee save area. */ - bool saves_below_hard_fp_p = maybe_ne (offset, 0); - frame.below_hard_fp_saved_regs_size = offset; + auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; + bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); + gcc_assert (!saves_below_hard_fp_p + || (frame.sve_save_and_probe != INVALID_REGNUM + && known_eq (frame.reg_offset[frame.sve_save_and_probe], + frame.bytes_below_saved_regs))); + + frame.bytes_below_hard_fp = offset; + frame.hard_fp_save_and_probe = INVALID_REGNUM; + + auto allocate_gpr_slot = [&](unsigned int regno) + { + if (frame.hard_fp_save_and_probe == INVALID_REGNUM) + frame.hard_fp_save_and_probe = regno; + frame.reg_offset[regno] = offset; + if (frame.wb_push_candidate1 == INVALID_REGNUM) + frame.wb_push_candidate1 = regno; + else if (frame.wb_push_candidate2 == INVALID_REGNUM) + frame.wb_push_candidate2 = regno; + offset += UNITS_PER_WORD; + }; + if (frame.emit_frame_chain) { /* FP and LR are placed in the linkage record. */ - frame.reg_offset[R29_REGNUM] = offset; - frame.wb_push_candidate1 = R29_REGNUM; - frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; - frame.wb_push_candidate2 = R30_REGNUM; - offset += 2 * UNITS_PER_WORD; + allocate_gpr_slot (R29_REGNUM); + allocate_gpr_slot (R30_REGNUM); } + else if (flag_stack_clash_protection + && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) + /* Put the LR save slot first, since it makes a good choice of probe + for stack clash purposes. The idea is that the link register usually + has to be saved before a call anyway, and so we lose little by + stopping it from being individually shrink-wrapped. */ + allocate_gpr_slot (R30_REGNUM); for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { - frame.reg_offset[regno] = offset; - if (frame.wb_push_candidate1 == INVALID_REGNUM) - frame.wb_push_candidate1 = regno; - else if (frame.wb_push_candidate2 == INVALID_REGNUM) - frame.wb_push_candidate2 = regno; - offset += UNITS_PER_WORD; - } + allocate_gpr_slot (regno); poly_int64 max_int_offset = offset; offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); @@ -8232,6 +8338,8 @@ aarch64_layout_frame (void) for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) { + if (frame.hard_fp_save_and_probe == INVALID_REGNUM) + frame.hard_fp_save_and_probe = regno; /* If there is an alignment gap between integer and fp callee-saves, allocate the last fp register to it if possible. */ if (regno == last_fp_reg @@ -8254,30 +8362,36 @@ aarch64_layout_frame (void) offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - frame.saved_regs_size = offset; + auto saved_regs_size = offset - frame.bytes_below_saved_regs; + gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) + || (frame.hard_fp_save_and_probe != INVALID_REGNUM + && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], + frame.bytes_below_hard_fp))); - poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; + /* With stack-clash, a register must be saved in non-leaf functions. + The saving of the bottommost register counts as an implicit probe, + which allows us to maintain the invariant described in the comment + at expand_prologue. */ + gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - poly_int64 above_outgoing_args - = aligned_upper_bound (varargs_and_saved_regs_size - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - - frame.hard_fp_offset - = above_outgoing_args - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ - gcc_assert (multiple_p (crtl->outgoing_args_size, - STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; + if (!regs_at_top_p) + { + offset += get_frame_size (); + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + top_of_locals = offset; + } + offset += frame.saved_varargs_size; + gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); + frame.frame_size = offset; - frame.locals_offset = frame.saved_varargs_size; + frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; + gcc_assert (known_ge (top_of_locals, 0)); + frame.bytes_above_locals = frame.frame_size - top_of_locals; frame.initial_adjust = 0; frame.final_adjust = 0; frame.callee_adjust = 0; frame.sve_callee_adjust = 0; - frame.callee_offset = 0; frame.wb_pop_candidate1 = frame.wb_push_candidate1; frame.wb_pop_candidate2 = frame.wb_push_candidate2; @@ -8288,7 +8402,7 @@ aarch64_layout_frame (void) frame.is_scs_enabled = (!crtl->calls_eh_return && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK) - && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)); + && known_ge (frame.reg_offset[LR_REGNUM], 0)); /* When shadow call stack is enabled, the scs_pop in the epilogue will restore x30, and we don't need to pop x30 again in the traditional @@ -8308,75 +8422,76 @@ aarch64_layout_frame (void) max_push_offset to 0, because no registers are popped at this time, so callee_adjust cannot be adjusted. */ HOST_WIDE_INT max_push_offset = 0; - if (frame.wb_pop_candidate2 != INVALID_REGNUM) - max_push_offset = 512; - else if (frame.wb_pop_candidate1 != INVALID_REGNUM) - max_push_offset = 256; + if (frame.wb_pop_candidate1 != INVALID_REGNUM) + { + if (frame.wb_pop_candidate2 != INVALID_REGNUM) + max_push_offset = 512; + else + max_push_offset = 256; + } - HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; + HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; HOST_WIDE_INT const_saved_regs_size; - if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset - && known_eq (frame.hard_fp_offset, const_size)) + if (known_eq (saved_regs_size, 0)) + frame.initial_adjust = frame.frame_size; + else if (frame.frame_size.is_constant (&const_size) + && const_size < max_push_offset + && known_eq (frame.bytes_above_hard_fp, const_size)) { - /* Simple, small frame with no outgoing arguments: + /* Simple, small frame with no data below the saved registers. stp reg1, reg2, [sp, -frame_size]! stp reg3, reg4, [sp, 16] */ frame.callee_adjust = const_size; } - else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) - && frame.saved_regs_size.is_constant (&const_saved_regs_size) - && const_outgoing_args_size + const_saved_regs_size < 512 - /* We could handle this case even with outgoing args, provided - that the number of args left us with valid offsets for all - predicate and vector save slots. It's such a rare case that - it hardly seems worth the effort though. */ - && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) + else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) + && saved_regs_size.is_constant (&const_saved_regs_size) + && const_below_saved_regs + const_saved_regs_size < 512 + /* We could handle this case even with data below the saved + registers, provided that that data left us with valid offsets + for all predicate and vector save slots. It's such a rare + case that it hardly seems worth the effort though. */ + && (!saves_below_hard_fp_p || const_below_saved_regs == 0) && !(cfun->calls_alloca - && frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset)) + && frame.bytes_above_hard_fp.is_constant (&const_above_fp) + && const_above_fp < max_push_offset)) { - /* Frame with small outgoing arguments: + /* Frame with small area below the saved registers: sub sp, sp, frame_size - stp reg1, reg2, [sp, outgoing_args_size] - stp reg3, reg4, [sp, outgoing_args_size + 16] */ + stp reg1, reg2, [sp, bytes_below_saved_regs] + stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ frame.initial_adjust = frame.frame_size; - frame.callee_offset = const_outgoing_args_size; } else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, - frame.below_hard_fp_saved_regs_size)) + && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) { /* Frame in which all saves are SVE saves: - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size + sub sp, sp, frame_size - bytes_below_saved_regs save SVE registers relative to SP - sub sp, sp, outgoing_args_size */ - frame.initial_adjust = (frame.hard_fp_offset - + frame.below_hard_fp_saved_regs_size); - frame.final_adjust = crtl->outgoing_args_size; + sub sp, sp, bytes_below_saved_regs */ + frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; + frame.final_adjust = frame.bytes_below_saved_regs; } - else if (frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset) + else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) + && const_above_fp < max_push_offset) { - /* Frame with large outgoing arguments or SVE saves, but with - a small local area: + /* Frame with large area below the saved registers, or with SVE saves, + but with a small area above: stp reg1, reg2, [sp, -hard_fp_offset]! stp reg3, reg4, [sp, 16] [sub sp, sp, below_hard_fp_saved_regs_size] [save SVE registers relative to SP] - sub sp, sp, outgoing_args_size */ - frame.callee_adjust = const_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = crtl->outgoing_args_size; + sub sp, sp, bytes_below_saved_regs */ + frame.callee_adjust = const_above_fp; + frame.sve_callee_adjust = below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; } else { - /* Frame with large local area and outgoing arguments or SVE saves, - using frame pointer: + /* General case: sub sp, sp, hard_fp_offset stp x29, x30, [sp, 0] @@ -8384,10 +8499,29 @@ aarch64_layout_frame (void) stp reg3, reg4, [sp, 16] [sub sp, sp, below_hard_fp_saved_regs_size] [save SVE registers relative to SP] - sub sp, sp, outgoing_args_size */ - frame.initial_adjust = frame.hard_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = crtl->outgoing_args_size; + sub sp, sp, bytes_below_saved_regs */ + frame.initial_adjust = frame.bytes_above_hard_fp; + frame.sve_callee_adjust = below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; + } + + /* The frame is allocated in pieces, with each non-final piece + including a register save at offset 0 that acts as a probe for + the following piece. In addition, the save of the bottommost register + acts as a probe for callees and allocas. Roll back any probes that + aren't needed. + + A probe isn't needed if it is associated with the final allocation + (including callees and allocas) that happens before the epilogue is + executed. */ + if (crtl->is_leaf + && !cfun->calls_alloca + && known_eq (frame.final_adjust, 0)) + { + if (maybe_ne (frame.sve_callee_adjust, 0)) + frame.sve_save_and_probe = INVALID_REGNUM; + else + frame.hard_fp_save_and_probe = INVALID_REGNUM; } /* Make sure the individual adjustments add up to the full frame size. */ @@ -8468,6 +8602,10 @@ aarch64_gen_storewb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2, return gen_storewb_pairtf_di (base, base, reg, reg2, GEN_INT (-adjustment), GEN_INT (UNITS_PER_VREG - adjustment)); + case E_V16QImode: + return gen_storewb_pairv16qi_di (base, base, reg, reg2, + GEN_INT (-adjustment), + GEN_INT (UNITS_PER_VREG - adjustment)); default: gcc_unreachable (); } @@ -8513,6 +8651,10 @@ aarch64_gen_loadwb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2, case E_TFmode: return gen_loadwb_pairtf_di (base, base, reg, reg2, GEN_INT (adjustment), GEN_INT (UNITS_PER_VREG)); + case E_V16QImode: + return gen_loadwb_pairv16qi_di (base, base, reg, reg2, + GEN_INT (adjustment), + GEN_INT (UNITS_PER_VREG)); default: gcc_unreachable (); } @@ -8596,6 +8738,9 @@ aarch64_gen_load_pair (machine_mode mode, rtx reg1, rtx mem1, rtx reg2, case E_V4SImode: return gen_load_pairv4siv4si (reg1, mem1, reg2, mem2); + case E_V16QImode: + return gen_load_pairv16qiv16qi (reg1, mem1, reg2, mem2); + default: gcc_unreachable (); } @@ -8691,15 +8836,17 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, } /* Emit code to save the callee-saved registers from register number START - to LIMIT to the stack at the location starting at offset START_OFFSET, - skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P - is true if the hard frame pointer has been set up. */ + to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP + bytes above the bottom of the static frame. Skip any write-back + candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard + frame pointer has been set up. */ static void -aarch64_save_callee_saves (poly_int64 start_offset, +aarch64_save_callee_saves (poly_int64 bytes_below_sp, unsigned start, unsigned limit, bool skip_wb, bool hard_fp_valid_p) { + aarch64_frame &frame = cfun->machine->frame; rtx_insn *insn; unsigned regno; unsigned regno2; @@ -8714,8 +8861,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); if (skip_wb - && (regno == cfun->machine->frame.wb_push_candidate1 - || regno == cfun->machine->frame.wb_push_candidate2)) + && (regno == frame.wb_push_candidate1 + || regno == frame.wb_push_candidate2)) continue; if (cfun->machine->reg_is_wrapped_separately[regno]) @@ -8723,7 +8870,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, machine_mode mode = aarch64_reg_save_mode (regno); reg = gen_rtx_REG (mode, regno); - offset = start_offset + cfun->machine->frame.reg_offset[regno]; + offset = frame.reg_offset[regno] - bytes_below_sp; rtx base_rtx = stack_pointer_rtx; poly_int64 sp_offset = offset; @@ -8734,9 +8881,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, else if (GP_REGNUM_P (regno) && (!offset.is_constant (&const_offset) || const_offset >= 512)) { - gcc_assert (known_eq (start_offset, 0)); - poly_int64 fp_offset - = cfun->machine->frame.below_hard_fp_saved_regs_size; + poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; if (hard_fp_valid_p) base_rtx = hard_frame_pointer_rtx; else @@ -8758,8 +8903,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit && !cfun->machine->reg_is_wrapped_separately[regno2] && known_eq (GET_MODE_SIZE (mode), - cfun->machine->frame.reg_offset[regno2] - - cfun->machine->frame.reg_offset[regno])) + frame.reg_offset[regno2] - frame.reg_offset[regno])) { rtx reg2 = gen_rtx_REG (mode, regno2); rtx mem2; @@ -8801,14 +8945,16 @@ aarch64_save_callee_saves (poly_int64 start_offset, } /* Emit code to restore the callee registers from register number START - up to and including LIMIT. Restore from the stack offset START_OFFSET, - skipping any write-back candidates if SKIP_WB is true. Write the - appropriate REG_CFA_RESTORE notes into CFI_OPS. */ + up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP + bytes above the bottom of the static frame. Skip any write-back + candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE + notes into CFI_OPS. */ static void -aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, +aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, unsigned limit, bool skip_wb, rtx *cfi_ops) { + aarch64_frame &frame = cfun->machine->frame; unsigned regno; unsigned regno2; poly_int64 offset; @@ -8825,13 +8971,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, rtx reg, mem; if (skip_wb - && (regno == cfun->machine->frame.wb_pop_candidate1 - || regno == cfun->machine->frame.wb_pop_candidate2)) + && (regno == frame.wb_pop_candidate1 + || regno == frame.wb_pop_candidate2)) continue; machine_mode mode = aarch64_reg_save_mode (regno); reg = gen_rtx_REG (mode, regno); - offset = start_offset + cfun->machine->frame.reg_offset[regno]; + offset = frame.reg_offset[regno] - bytes_below_sp; rtx base_rtx = stack_pointer_rtx; if (mode == VNx2DImode && BYTES_BIG_ENDIAN) aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, @@ -8842,8 +8988,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit && !cfun->machine->reg_is_wrapped_separately[regno2] && known_eq (GET_MODE_SIZE (mode), - cfun->machine->frame.reg_offset[regno2] - - cfun->machine->frame.reg_offset[regno])) + frame.reg_offset[regno2] - frame.reg_offset[regno])) { rtx reg2 = gen_rtx_REG (mode, regno2); rtx mem2; @@ -8948,6 +9093,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) static sbitmap aarch64_get_separate_components (void) { + aarch64_frame &frame = cfun->machine->frame; sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); bitmap_clear (components); @@ -8964,20 +9110,11 @@ aarch64_get_separate_components (void) if (mode == VNx2DImode && BYTES_BIG_ENDIAN) continue; - poly_int64 offset = cfun->machine->frame.reg_offset[regno]; - - /* If the register is saved in the first SVE save slot, we use - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection - && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) - && known_eq (offset, 0)) - continue; + poly_int64 offset = frame.reg_offset[regno]; /* Get the offset relative to the register we'll use. */ if (frame_pointer_needed) - offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; + offset -= frame.bytes_below_hard_fp; /* Check that we can access the stack slot of the register with one direct load with no adjustments needed. */ @@ -8994,11 +9131,11 @@ aarch64_get_separate_components (void) /* If the spare predicate register used by big-endian SVE code is call-preserved, it must be saved in the main prologue before any saves that use it. */ - if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) - bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); + if (frame.spare_pred_reg != INVALID_REGNUM) + bitmap_clear_bit (components, frame.spare_pred_reg); - unsigned reg1 = cfun->machine->frame.wb_push_candidate1; - unsigned reg2 = cfun->machine->frame.wb_push_candidate2; + unsigned reg1 = frame.wb_push_candidate1; + unsigned reg2 = frame.wb_push_candidate2; /* If registers have been chosen to be stored/restored with writeback don't interfere with them to avoid having to output explicit stack adjustment instructions. */ @@ -9009,6 +9146,13 @@ aarch64_get_separate_components (void) bitmap_clear_bit (components, LR_REGNUM); bitmap_clear_bit (components, SP_REGNUM); + if (flag_stack_clash_protection) + { + if (frame.sve_save_and_probe != INVALID_REGNUM) + bitmap_clear_bit (components, frame.sve_save_and_probe); + if (frame.hard_fp_save_and_probe != INVALID_REGNUM) + bitmap_clear_bit (components, frame.hard_fp_save_and_probe); + } return components; } @@ -9107,6 +9251,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) static void aarch64_process_components (sbitmap components, bool prologue_p) { + aarch64_frame &frame = cfun->machine->frame; rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM); @@ -9121,11 +9266,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) machine_mode mode = aarch64_reg_save_mode (regno); rtx reg = gen_rtx_REG (mode, regno); - poly_int64 offset = cfun->machine->frame.reg_offset[regno]; + poly_int64 offset = frame.reg_offset[regno]; if (frame_pointer_needed) - offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; + offset -= frame.bytes_below_hard_fp; rtx addr = plus_constant (Pmode, ptr_reg, offset); rtx mem = gen_frame_mem (mode, addr); @@ -9148,14 +9291,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) break; } - poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; + poly_int64 offset2 = frame.reg_offset[regno2]; /* The next register is not of the same class or its offset is not mergeable with the current one into a pair. */ if (aarch64_sve_mode_p (mode) || !satisfies_constraint_Ump (mem) || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) - || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), + || maybe_ne ((offset2 - frame.reg_offset[regno]), GET_MODE_SIZE (mode))) { insn = emit_insn (set); @@ -9177,9 +9320,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) /* REGNO2 can be saved/restored in a pair with REGNO. */ rtx reg2 = gen_rtx_REG (mode, regno2); if (frame_pointer_needed) - offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; - else - offset2 += crtl->outgoing_args_size; + offset2 -= frame.bytes_below_hard_fp; rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); rtx mem2 = gen_frame_mem (mode, addr2); rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) @@ -9253,10 +9394,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) registers. If POLY_SIZE is not large enough to require a probe this function will only adjust the stack. When allocating the stack space FRAME_RELATED_P is then used to indicate if the allocation is frame related. - FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing - arguments. If we are then we ensure that any allocation larger than the ABI - defined buffer needs a probe so that the invariant of having a 1KB buffer is - maintained. + FINAL_ADJUSTMENT_P indicates whether we are allocating the area below + the saved registers. If we are then we ensure that any allocation + larger than the ABI defined buffer needs a probe so that the + invariant of having a 1KB buffer is maintained. We emit barriers after each stack adjustment to prevent optimizations from breaking the invariant that we never drop the stack more than a page. This @@ -9272,45 +9413,26 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, bool frame_related_p, bool final_adjustment_p) { + aarch64_frame &frame = cfun->machine->frame; HOST_WIDE_INT guard_size = 1 << param_stack_clash_protection_guard_size; HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; + HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; + gcc_assert (multiple_p (poly_size, byte_sp_alignment)); HOST_WIDE_INT min_probe_threshold = (final_adjustment_p - ? guard_used_by_caller + ? guard_used_by_caller + byte_sp_alignment : guard_size - guard_used_by_caller); - /* When doing the final adjustment for the outgoing arguments, take into - account any unprobed space there is above the current SP. There are - two cases: - - - When saving SVE registers below the hard frame pointer, we force - the lowest save to take place in the prologue before doing the final - adjustment (i.e. we don't allow the save to be shrink-wrapped). - This acts as a probe at SP, so there is no unprobed space. - - - When there are no SVE register saves, we use the store of the link - register as a probe. We can't assume that LR was saved at position 0 - though, so treat any space below it as unprobed. */ - if (final_adjustment_p - && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) - { - poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else - gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); - } - - poly_int64 frame_size = cfun->machine->frame.frame_size; + poly_int64 frame_size = frame.frame_size; /* We should always have a positive probe threshold. */ gcc_assert (min_probe_threshold > 0); if (flag_stack_clash_protection && !final_adjustment_p) { - poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; - poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; - poly_int64 final_adjust = cfun->machine->frame.final_adjust; + poly_int64 initial_adjust = frame.initial_adjust; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 final_adjust = frame.final_adjust; if (known_eq (frame_size, 0)) { @@ -9464,7 +9586,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to be probed. This maintains the requirement that each page is probed at least once. For initial probing we probe only if the allocation is - more than GUARD_SIZE - buffer, and for the outgoing arguments we probe + more than GUARD_SIZE - buffer, and below the saved registers we probe if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == GUARD_SIZE. This works that for any allocation that is large enough to trigger a probe here, we'll have at least one, and if they're not large @@ -9474,16 +9596,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, are still safe. */ if (residual) { - HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; + gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); + /* If we're doing final adjustments, and we've done any full page allocations then any residual needs to be probed. */ if (final_adjustment_p && rounded_size != 0) min_probe_threshold = 0; - /* If doing a small final adjustment, we always probe at offset 0. - This is done to avoid issues when LR is not at position 0 or when - the final adjustment is smaller than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; aarch64_sub_sp (temp1, temp2, residual, frame_related_p); if (residual >= min_probe_threshold) @@ -9494,8 +9612,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." "\n", residual); - emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, - residual_probe_offset)); + emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, + guard_used_by_caller)); emit_insn (gen_blockage ()); } } @@ -9533,20 +9651,24 @@ aarch64_epilogue_uses (int regno) | for register varargs | | | +-------------------------------+ - | local variables | <-- frame_pointer_rtx + | local variables (1) | <-- frame_pointer_rtx | | +-------------------------------+ - | padding | \ - +-------------------------------+ | - | callee-saved registers | | frame.saved_regs_size - +-------------------------------+ | - | LR' | | - +-------------------------------+ | - | FP' | | - +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) - | SVE vector registers | | \ - +-------------------------------+ | | below_hard_fp_saved_regs_size - | SVE predicate registers | / / + | padding (1) | + +-------------------------------+ + | callee-saved registers | + +-------------------------------+ + | LR' | + +-------------------------------+ + | FP' | + +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) + | SVE vector registers | + +-------------------------------+ + | SVE predicate registers | + +-------------------------------+ + | local variables (2) | + +-------------------------------+ + | padding (2) | +-------------------------------+ | dynamic allocation | +-------------------------------+ @@ -9557,6 +9679,9 @@ aarch64_epilogue_uses (int regno) +-------------------------------+ | | <-- stack_pointer_rtx (aligned) + The regions marked (1) and (2) are mutually exclusive. (2) is used + when aarch64_save_regs_above_locals_p is true. + Dynamic stack allocations via alloca() decrease stack_pointer_rtx but leave frame_pointer_rtx and hard_frame_pointer_rtx unchanged. @@ -9571,8 +9696,8 @@ aarch64_epilogue_uses (int regno) When probing is needed, we emit a probe at the start of the prologue and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. - We have to track how much space has been allocated and the only stores - to the stack we track as implicit probes are the FP/LR stores. + We can also use register saves as probes. These are stored in + sve_save_and_probe and hard_fp_save_and_probe. For outgoing arguments we probe if the size is larger than 1KB, such that the ABI specified buffer is maintained for the next callee. @@ -9599,17 +9724,15 @@ aarch64_epilogue_uses (int regno) void aarch64_expand_prologue (void) { - poly_int64 frame_size = cfun->machine->frame.frame_size; - poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; - HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; - poly_int64 final_adjust = cfun->machine->frame.final_adjust; - poly_int64 callee_offset = cfun->machine->frame.callee_offset; - poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size - = cfun->machine->frame.below_hard_fp_saved_regs_size; - unsigned reg1 = cfun->machine->frame.wb_push_candidate1; - unsigned reg2 = cfun->machine->frame.wb_push_candidate2; - bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; + aarch64_frame &frame = cfun->machine->frame; + poly_int64 frame_size = frame.frame_size; + poly_int64 initial_adjust = frame.initial_adjust; + HOST_WIDE_INT callee_adjust = frame.callee_adjust; + poly_int64 final_adjust = frame.final_adjust; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + unsigned reg1 = frame.wb_push_candidate1; + unsigned reg2 = frame.wb_push_candidate2; + bool emit_frame_chain = frame.emit_frame_chain; rtx_insn *insn; if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) @@ -9640,7 +9763,7 @@ aarch64_expand_prologue (void) } /* Push return address to shadow call stack. */ - if (cfun->machine->frame.is_scs_enabled) + if (frame.is_scs_enabled) emit_insn (gen_scs_push ()); if (flag_stack_usage_info) @@ -9677,21 +9800,21 @@ aarch64_expand_prologue (void) if (callee_adjust != 0) aarch64_push_regs (reg1, reg2, callee_adjust); - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust - - cfun->machine->frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - - /* The offset of the bottom of the save area from the current SP. */ - poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; + /* The offset of the current SP from the bottom of the static frame. */ + poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; if (emit_frame_chain) { + /* The offset of the frame chain record (if any) from the current SP. */ + poly_int64 chain_offset = (initial_adjust + callee_adjust + - frame.bytes_above_hard_fp); + gcc_assert (known_ge (chain_offset, 0)); + if (callee_adjust == 0) { reg1 = R29_REGNUM; reg2 = R30_REGNUM; - aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, + aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, false, false); } else @@ -9716,8 +9839,7 @@ aarch64_expand_prologue (void) implicit. */ if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) { - rtx src = plus_constant (Pmode, stack_pointer_rtx, - callee_offset); + rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); add_reg_note (insn, REG_CFA_ADJUST_CFA, gen_rtx_SET (hard_frame_pointer_rtx, src)); } @@ -9732,7 +9854,7 @@ aarch64_expand_prologue (void) emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); } - aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, + aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, callee_adjust != 0 || emit_frame_chain, emit_frame_chain); if (maybe_ne (sve_callee_adjust, 0)) @@ -9742,18 +9864,21 @@ aarch64_expand_prologue (void) aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, sve_callee_adjust, !frame_pointer_needed, false); - saved_regs_offset += sve_callee_adjust; + bytes_below_sp -= sve_callee_adjust; } - aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, + aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, false, emit_frame_chain); - aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, + aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, callee_adjust != 0 || emit_frame_chain, emit_frame_chain); /* We may need to probe the final adjustment if it is larger than the guard that is assumed by the called. */ + gcc_assert (known_eq (bytes_below_sp, final_adjust)); aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, !frame_pointer_needed, true); + if (emit_frame_chain && maybe_ne (final_adjust, 0)) + emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); } /* Return TRUE if we can use a simple_return insn. @@ -9782,16 +9907,15 @@ aarch64_use_return_insn_p (void) void aarch64_expand_epilogue (bool for_sibcall) { - poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; - HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; - poly_int64 final_adjust = cfun->machine->frame.final_adjust; - poly_int64 callee_offset = cfun->machine->frame.callee_offset; - poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size - = cfun->machine->frame.below_hard_fp_saved_regs_size; - unsigned reg1 = cfun->machine->frame.wb_pop_candidate1; - unsigned reg2 = cfun->machine->frame.wb_pop_candidate2; - unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled + aarch64_frame &frame = cfun->machine->frame; + poly_int64 initial_adjust = frame.initial_adjust; + HOST_WIDE_INT callee_adjust = frame.callee_adjust; + poly_int64 final_adjust = frame.final_adjust; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; + unsigned reg1 = frame.wb_pop_candidate1; + unsigned reg2 = frame.wb_pop_candidate2; + unsigned int last_gpr = (frame.is_scs_enabled ? R29_REGNUM : R30_REGNUM); rtx cfi_ops = NULL; rtx_insn *insn; @@ -9825,7 +9949,7 @@ aarch64_expand_epilogue (bool for_sibcall) /* We need to add memory barrier to prevent read from deallocated stack. */ bool need_barrier_p = maybe_ne (get_frame_size () - + cfun->machine->frame.saved_varargs_size, 0); + + frame.saved_varargs_size, 0); /* Emit a barrier to prevent loads from a deallocated stack. */ if (maybe_gt (final_adjust, crtl->outgoing_args_size) @@ -9846,7 +9970,7 @@ aarch64_expand_epilogue (bool for_sibcall) is restored on the instruction doing the writeback. */ aarch64_add_offset (Pmode, stack_pointer_rtx, hard_frame_pointer_rtx, - -callee_offset - below_hard_fp_saved_regs_size, + -bytes_below_hard_fp + final_adjust, tmp1_rtx, tmp0_rtx, callee_adjust == 0); else /* The case where we need to re-use the register here is very rare, so @@ -9856,9 +9980,9 @@ aarch64_expand_epilogue (bool for_sibcall) /* Restore the vector registers before the predicate registers, so that we can use P4 as a temporary for big-endian SVE frames. */ - aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, + aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, callee_adjust != 0, &cfi_ops); - aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, + aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, false, &cfi_ops); if (maybe_ne (sve_callee_adjust, 0)) aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); @@ -9866,7 +9990,7 @@ aarch64_expand_epilogue (bool for_sibcall) /* When shadow call stack is enabled, the scs_pop in the epilogue will restore x30, we don't need to restore x30 again in the traditional way. */ - aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, + aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, R0_REGNUM, last_gpr, callee_adjust != 0, &cfi_ops); @@ -9906,7 +10030,7 @@ aarch64_expand_epilogue (bool for_sibcall) } /* Pop return address from shadow call stack. */ - if (cfun->machine->frame.is_scs_enabled) + if (frame.is_scs_enabled) { machine_mode mode = aarch64_reg_save_mode (R30_REGNUM); rtx reg = gen_rtx_REG (mode, R30_REGNUM); @@ -12501,24 +12625,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) poly_int64 aarch64_initial_elimination_offset (unsigned from, unsigned to) { + aarch64_frame &frame = cfun->machine->frame; + if (to == HARD_FRAME_POINTER_REGNUM) { if (from == ARG_POINTER_REGNUM) - return cfun->machine->frame.hard_fp_offset; + return frame.bytes_above_hard_fp; if (from == FRAME_POINTER_REGNUM) - return cfun->machine->frame.hard_fp_offset - - cfun->machine->frame.locals_offset; + return frame.bytes_above_hard_fp - frame.bytes_above_locals; } if (to == STACK_POINTER_REGNUM) { if (from == FRAME_POINTER_REGNUM) - return cfun->machine->frame.frame_size - - cfun->machine->frame.locals_offset; + return frame.frame_size - frame.bytes_above_locals; } - return cfun->machine->frame.frame_size; + return frame.frame_size; } @@ -15417,6 +15541,33 @@ aarch64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *insn, /* Vectorizer cost model target hooks. */ +/* If a vld1 from address ADDR should be recorded in vector_load_decls, + return the decl that should be recorded. Return null otherwise. */ +tree +aarch64_vector_load_decl (tree addr) +{ + if (TREE_CODE (addr) != ADDR_EXPR) + return NULL_TREE; + tree base = get_base_address (TREE_OPERAND (addr, 0)); + if (TREE_CODE (base) != VAR_DECL) + return NULL_TREE; + return base; +} + +/* Return true if STMT_INFO accesses a decl that is known to be the + argument to a vld1 in the same function. */ +static bool +aarch64_accesses_vector_load_decl_p (stmt_vec_info stmt_info) +{ + if (!cfun->machine->vector_load_decls) + return false; + auto dr = STMT_VINFO_DATA_REF (stmt_info); + if (!dr) + return false; + tree decl = aarch64_vector_load_decl (DR_BASE_ADDRESS (dr)); + return decl && cfun->machine->vector_load_decls->contains (decl); +} + /* Information about how the CPU would issue the scalar, Advanced SIMD or SVE version of a vector loop, using the scheme defined by the aarch64_base_vec_issue_info hierarchy of structures. */ @@ -15532,7 +15683,7 @@ aarch64_vec_op_count::rename_cycles_per_iter () const { if (sve_issue_info () == &neoverse512tvb_sve_issue_info || sve_issue_info () == &neoversen2_sve_issue_info - || sve_issue_info () == &demeter_sve_issue_info) + || sve_issue_info () == &neoversev2_sve_issue_info) /* + 1 for an addition. We've already counted a general op for each store, so we don't need to account for stores separately. The branch reads no registers and so does not need to be counted either. @@ -15637,7 +15788,7 @@ class aarch64_vector_costs : public vector_costs unsigned int adjust_body_cost (loop_vec_info, const aarch64_vector_costs *, unsigned int); bool prefer_unrolled_loop () const; - unsigned int determine_suggested_unroll_factor (loop_vec_info); + unsigned int determine_suggested_unroll_factor (); /* True if we have performed one-time initialization based on the vec_info. */ @@ -15647,6 +15798,20 @@ class aarch64_vector_costs : public vector_costs supported by Advanced SIMD and SVE2. */ bool m_has_avg = false; + /* True if the vector body contains a store to a decl and if the + function is known to have a vld1 from the same decl. + + In the Advanced SIMD ACLE, the recommended endian-agnostic way of + initializing a vector is: + + float f[4] = { elts }; + float32x4_t x = vld1q_f32(f); + + We should strongly prefer vectorization of the initialization of f, + so that the store to f and the load back can be optimized away, + leaving a vectorization of { elts }. */ + bool m_stores_to_vector_load_decl = false; + /* - If M_VEC_FLAGS is zero then we're costing the original scalar code. - If M_VEC_FLAGS & VEC_ADVSIMD is nonzero then we're costing Advanced SIMD code. @@ -16663,6 +16828,18 @@ aarch64_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind, } } } + + /* If the statement stores to a decl that is known to be the argument + to a vld1 in the same function, ignore the store for costing purposes. + See the comment above m_stores_to_vector_load_decl for more details. */ + if (stmt_info + && (kind == vector_store || kind == unaligned_store) + && aarch64_accesses_vector_load_decl_p (stmt_info)) + { + stmt_cost = 0; + m_stores_to_vector_load_decl = true; + } + return record_stmt_cost (stmt_info, where, (count * stmt_cost).ceil ()); } @@ -16677,7 +16854,8 @@ aarch64_vector_costs::prefer_unrolled_loop () const if (dump_enabled_p ()) dump_printf_loc (MSG_NOTE, vect_location, "Number of insns in" - " unrolled Advanced SIMD loop = %d\n", + " unrolled Advanced SIMD loop = " + HOST_WIDE_INT_PRINT_UNSIGNED "\n", m_unrolled_advsimd_stmts); /* The balance here is tricky. On the one hand, we can't be sure whether @@ -16746,8 +16924,7 @@ adjust_body_cost_sve (const aarch64_vec_op_count *ops, } unsigned int -aarch64_vector_costs:: -determine_suggested_unroll_factor (loop_vec_info loop_vinfo) +aarch64_vector_costs::determine_suggested_unroll_factor () { bool sve = m_vec_flags & VEC_ANY_SVE; /* If we are trying to unroll an Advanced SIMD main loop that contains @@ -16761,7 +16938,6 @@ determine_suggested_unroll_factor (loop_vec_info loop_vinfo) return 1; unsigned int max_unroll_factor = 1; - auto vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo); for (auto vec_ops : m_ops) { aarch64_simd_vec_issue_info const *vec_issue @@ -16770,8 +16946,7 @@ determine_suggested_unroll_factor (loop_vec_info loop_vinfo) return 1; /* Limit unroll factor to a value adjustable by the user, the default value is 4. */ - unsigned int unroll_factor = MIN (aarch64_vect_unroll_limit, - (int) known_alignment (vf)); + unsigned int unroll_factor = aarch64_vect_unroll_limit; unsigned int factor = vec_ops.reduction_latency > 1 ? vec_ops.reduction_latency : 1; unsigned int temp; @@ -16949,18 +17124,26 @@ aarch64_vector_costs::finish_cost (const vector_costs *uncast_scalar_costs) { m_costs[vect_body] = adjust_body_cost (loop_vinfo, scalar_costs, m_costs[vect_body]); - m_suggested_unroll_factor - = determine_suggested_unroll_factor (loop_vinfo); + m_suggested_unroll_factor = determine_suggested_unroll_factor (); } /* Apply the heuristic described above m_stp_sequence_cost. Prefer the scalar code in the event of a tie, since there is more chance - of scalar code being optimized with surrounding operations. */ + of scalar code being optimized with surrounding operations. + + In addition, if the vector body is a simple store to a decl that + is elsewhere loaded using vld1, strongly prefer the vector form, + to the extent of giving the prologue a zero cost. See the comment + above m_stores_to_vector_load_decl for details. */ if (!loop_vinfo && scalar_costs - && m_stp_sequence_cost != ~0U - && m_stp_sequence_cost >= scalar_costs->m_stp_sequence_cost) - m_costs[vect_body] = 2 * scalar_costs->total_cost (); + && m_stp_sequence_cost != ~0U) + { + if (m_stores_to_vector_load_decl) + m_costs[vect_prologue] = 0; + else if (m_stp_sequence_cost >= scalar_costs->m_stp_sequence_cost) + m_costs[vect_body] = 2 * scalar_costs->total_cost (); + } vector_costs::finish_cost (scalar_costs); } @@ -22559,30 +22742,56 @@ aarch64_declare_function_name (FILE *stream, const char* name, cfun->machine->label_is_assembled = true; } -/* Implement PRINT_PATCHABLE_FUNCTION_ENTRY. Check if the patch area is after - the function label and emit a BTI if necessary. */ +/* Implement PRINT_PATCHABLE_FUNCTION_ENTRY. */ void aarch64_print_patchable_function_entry (FILE *file, unsigned HOST_WIDE_INT patch_area_size, bool record_p) { - if (cfun->machine->label_is_assembled - && aarch64_bti_enabled () - && !cgraph_node::get (cfun->decl)->only_called_directly_p ()) + if (!cfun->machine->label_is_assembled) + { + /* Emit the patching area before the entry label, if any. */ + default_print_patchable_function_entry (file, patch_area_size, + record_p); + return; + } + + rtx pa = gen_patchable_area (GEN_INT (patch_area_size), + GEN_INT (record_p)); + basic_block bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb; + + if (!aarch64_bti_enabled () + || cgraph_node::get (cfun->decl)->only_called_directly_p ()) + { + /* Emit the patchable_area at the beginning of the function. */ + rtx_insn *insn = emit_insn_before (pa, BB_HEAD (bb)); + INSN_ADDRESSES_NEW (insn, -1); + return; + } + + rtx_insn *insn = next_real_nondebug_insn (get_insns ()); + if (!insn + || !INSN_P (insn) + || GET_CODE (PATTERN (insn)) != UNSPEC_VOLATILE + || XINT (PATTERN (insn), 1) != UNSPECV_BTI_C) { - /* Remove the BTI that follows the patch area and insert a new BTI - before the patch area right after the function label. */ - rtx_insn *insn = next_real_nondebug_insn (get_insns ()); - if (insn - && INSN_P (insn) - && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE - && XINT (PATTERN (insn), 1) == UNSPECV_BTI_C) - delete_insn (insn); - asm_fprintf (file, "\thint\t34 // bti c\n"); + /* Emit a BTI_C. */ + insn = emit_insn_before (gen_bti_c (), BB_HEAD (bb)); } - default_print_patchable_function_entry (file, patch_area_size, record_p); + /* Emit the patchable_area after BTI_C. */ + insn = emit_insn_after (pa, insn); + INSN_ADDRESSES_NEW (insn, -1); +} + +/* Output patchable area. */ + +void +aarch64_output_patchable_area (unsigned int patch_area_size, bool record_p) +{ + default_print_patchable_function_entry (asm_out_file, patch_area_size, + record_p); } /* Implement ASM_OUTPUT_DEF_FROM_DECLS. Output .variant_pcs for aliases. */ @@ -22678,14 +22887,14 @@ aarch64_emit_unlikely_jump (rtx insn) add_reg_br_prob_note (jump, profile_probability::very_unlikely ()); } -/* We store the names of the various atomic helpers in a 5x4 array. +/* We store the names of the various atomic helpers in a 5x5 array. Return the libcall function given MODE, MODEL and NAMES. */ rtx aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx, const atomic_ool_names *names) { - memmodel model = memmodel_base (INTVAL (model_rtx)); + memmodel model = memmodel_from_int (INTVAL (model_rtx)); int mode_idx, model_idx; switch (mode) @@ -22725,6 +22934,11 @@ aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx, case MEMMODEL_SEQ_CST: model_idx = 3; break; + case MEMMODEL_SYNC_ACQUIRE: + case MEMMODEL_SYNC_RELEASE: + case MEMMODEL_SYNC_SEQ_CST: + model_idx = 4; + break; default: gcc_unreachable (); } @@ -22737,7 +22951,8 @@ aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx, { "__aarch64_" #B #N "_relax", \ "__aarch64_" #B #N "_acq", \ "__aarch64_" #B #N "_rel", \ - "__aarch64_" #B #N "_acq_rel" } + "__aarch64_" #B #N "_acq_rel", \ + "__aarch64_" #B #N "_sync" } #define DEF4(B) DEF0(B, 1), DEF0(B, 2), DEF0(B, 4), DEF0(B, 8), \ { NULL, NULL, NULL, NULL } @@ -22795,6 +23010,8 @@ aarch64_expand_compare_and_swap (rtx operands[]) rval = copy_to_mode_reg (r_mode, oldval); else emit_move_insn (rval, gen_lowpart (r_mode, oldval)); + if (mode == TImode) + newval = force_reg (mode, newval); emit_insn (gen_aarch64_compare_and_swap_lse (mode, rval, mem, newval, mod_s)); @@ -24532,10 +24749,11 @@ aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst, *dst = aarch64_progress_pointer (*dst); } -/* Expand a cpymem using the MOPS extension. OPERANDS are taken - from the cpymem pattern. Return true iff we succeeded. */ -static bool -aarch64_expand_cpymem_mops (rtx *operands) +/* Expand a cpymem/movmem using the MOPS extension. OPERANDS are taken + from the cpymem/movmem pattern. IS_MEMMOVE is true if this is a memmove + rather than memcpy. Return true iff we succeeded. */ +bool +aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false) { if (!TARGET_MOPS) return false; @@ -24547,8 +24765,10 @@ aarch64_expand_cpymem_mops (rtx *operands) rtx dst_mem = replace_equiv_address (operands[0], dst_addr); rtx src_mem = replace_equiv_address (operands[1], src_addr); rtx sz_reg = copy_to_mode_reg (DImode, operands[2]); - emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg)); - + if (is_memmove) + emit_insn (gen_aarch64_movmemdi (dst_mem, src_mem, sz_reg)); + else + emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg)); return true; } @@ -24562,27 +24782,23 @@ aarch64_expand_cpymem (rtx *operands) int mode_bits; rtx dst = operands[0]; rtx src = operands[1]; + unsigned align = UINTVAL (operands[3]); rtx base; machine_mode cur_mode = BLKmode; + bool size_p = optimize_function_for_size_p (cfun); - /* Variable-sized memcpy can go through the MOPS expansion if available. */ - if (!CONST_INT_P (operands[2])) + /* Variable-sized or strict-align copies may use the MOPS expansion. */ + if (!CONST_INT_P (operands[2]) || (STRICT_ALIGNMENT && align < 16)) return aarch64_expand_cpymem_mops (operands); - unsigned HOST_WIDE_INT size = INTVAL (operands[2]); + unsigned HOST_WIDE_INT size = UINTVAL (operands[2]); - /* Try to inline up to 256 bytes or use the MOPS threshold if available. */ - unsigned HOST_WIDE_INT max_copy_size - = TARGET_MOPS ? aarch64_mops_memcpy_size_threshold : 256; + /* Try to inline up to 256 bytes. */ + unsigned max_copy_size = 256; + unsigned mops_threshold = aarch64_mops_memcpy_size_threshold; - bool size_p = optimize_function_for_size_p (cfun); - - /* Large constant-sized cpymem should go through MOPS when possible. - It should be a win even for size optimization in the general case. - For speed optimization the choice between MOPS and the SIMD sequence - depends on the size of the copy, rather than number of instructions, - alignment etc. */ - if (size > max_copy_size) + /* Large copies use MOPS when available or a library call. */ + if (size > max_copy_size || (TARGET_MOPS && size > mops_threshold)) return aarch64_expand_cpymem_mops (operands); int copy_bits = 256; @@ -24746,12 +24962,13 @@ aarch64_expand_setmem (rtx *operands) unsigned HOST_WIDE_INT len; rtx dst = operands[0]; rtx val = operands[2], src; + unsigned align = UINTVAL (operands[3]); rtx base; machine_mode cur_mode = BLKmode, next_mode; - /* If we don't have SIMD registers or the size is variable use the MOPS - inlined sequence if possible. */ - if (!CONST_INT_P (operands[1]) || !TARGET_SIMD) + /* Variable-sized or strict-align memset may use the MOPS expansion. */ + if (!CONST_INT_P (operands[1]) || !TARGET_SIMD + || (STRICT_ALIGNMENT && align < 16)) return aarch64_expand_setmem_mops (operands); bool size_p = optimize_function_for_size_p (cfun); @@ -24759,10 +24976,13 @@ aarch64_expand_setmem (rtx *operands) /* Default the maximum to 256-bytes when considering only libcall vs SIMD broadcast sequence. */ unsigned max_set_size = 256; + unsigned mops_threshold = aarch64_mops_memset_size_threshold; - len = INTVAL (operands[1]); - if (len > max_set_size && !TARGET_MOPS) - return false; + len = UINTVAL (operands[1]); + + /* Large memset uses MOPS when available or a library call. */ + if (len > max_set_size || (TARGET_MOPS && len > mops_threshold)) + return aarch64_expand_setmem_mops (operands); int cst_val = !!(CONST_INT_P (val) && (INTVAL (val) != 0)); /* The MOPS sequence takes: @@ -24775,12 +24995,6 @@ aarch64_expand_setmem (rtx *operands) the arguments + 1 for the call. */ unsigned libcall_cost = 4; - /* Upper bound check. For large constant-sized setmem use the MOPS sequence - when available. */ - if (TARGET_MOPS - && len >= (unsigned HOST_WIDE_INT) aarch64_mops_memset_size_threshold) - return aarch64_expand_setmem_mops (operands); - /* Attempt a sequence with a vector broadcast followed by stores. Count the number of operations involved to see if it's worth it against the alternatives. A simple counter simd_ops on the @@ -24822,10 +25036,8 @@ aarch64_expand_setmem (rtx *operands) simd_ops++; n -= mode_bits; - /* Do certain trailing copies as overlapping if it's going to be - cheaper. i.e. less instructions to do so. For instance doing a 15 - byte copy it's more efficient to do two overlapping 8 byte copies than - 8 + 4 + 2 + 1. Only do this when -mstrict-align is not supplied. */ + /* Emit trailing writes using overlapping unaligned accesses + (when !STRICT_ALIGNMENT) - this is smaller and faster. */ if (n > 0 && n < copy_limit / 2 && !STRICT_ALIGNMENT) { next_mode = smallest_mode_for_size (n, MODE_INT); @@ -25453,6 +25665,34 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) } } + /* Fuse A+B+1 and A-B-1 */ + if (simple_sets_p + && aarch64_fusion_enabled_p (AARCH64_FUSE_ADDSUB_2REG_CONST1)) + { + /* We're trying to match: + prev == (set (r0) (plus (r0) (r1))) + curr == (set (r0) (plus (r0) (const_int 1))) + or: + prev == (set (r0) (minus (r0) (r1))) + curr == (set (r0) (plus (r0) (const_int -1))) */ + + rtx prev_src = SET_SRC (prev_set); + rtx curr_src = SET_SRC (curr_set); + + int polarity = 1; + if (GET_CODE (prev_src) == MINUS) + polarity = -1; + + if (GET_CODE (curr_src) == PLUS + && (GET_CODE (prev_src) == PLUS || GET_CODE (prev_src) == MINUS) + && CONST_INT_P (XEXP (curr_src, 1)) + && INTVAL (XEXP (curr_src, 1)) == polarity + && REG_P (XEXP (curr_src, 0)) + && REG_P (SET_DEST (prev_set)) + && REGNO (SET_DEST (prev_set)) == REGNO (XEXP (curr_src, 0))) + return true; + } + return false; } @@ -25751,6 +25991,12 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, enum reg_class rclass_1, rclass_2; rtx mem_1, mem_2, reg_1, reg_2; + /* Allow the tuning structure to disable LDP instruction formation + from combining instructions (e.g., in peephole2). */ + if (load && (aarch64_tune_params.extra_tuning_flags + & AARCH64_EXTRA_TUNE_NO_LDP_COMBINE)) + return false; + if (load) { mem_1 = operands[1]; @@ -25793,11 +26039,9 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)), GET_MODE_SIZE (GET_MODE (mem_2)))); - /* One of the memory accesses must be a mempair operand. - If it is not the first one, they need to be swapped by the - peephole. */ - if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1)) - && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2))) + /* The lower memory access must be a mem-pair operand. */ + rtx lower_mem = reversed ? mem_2 : mem_1; + if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem))) return false; if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1))) @@ -26648,7 +26892,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct cgraph_node *node, tree base_type, int num) { tree t, ret_type; - unsigned int elt_bits, count; + unsigned int elt_bits, count = 0; unsigned HOST_WIDE_INT const_simdlen; poly_uint64 vec_bits; @@ -26716,8 +26960,17 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct cgraph_node *node, elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)); if (known_eq (clonei->simdlen, 0U)) { - count = 2; - vec_bits = (num == 0 ? 64 : 128); + /* We don't support simdlen == 1. */ + if (known_eq (elt_bits, 64)) + { + count = 1; + vec_bits = 128; + } + else + { + count = 2; + vec_bits = (num == 0 ? 64 : 128); + } clonei->simdlen = exact_div (vec_bits, elt_bits); } else @@ -26735,6 +26988,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct cgraph_node *node, return 0; } } + clonei->vecsize_int = vec_bits; clonei->vecsize_float = vec_bits; return count; diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 359b6e8561faa..fadcf98b85c1e 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -26,10 +26,6 @@ #define TARGET_CPU_CPP_BUILTINS() \ aarch64_cpu_cpp_builtins (pfile) -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS aarch64_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO aarch64_d_register_target_info - #define REGISTER_TARGET_PRAGMAS() aarch64_register_pragmas () @@ -260,7 +256,8 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_FOR_ARCH8_2 \ (AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_V8_2) #define AARCH64_FL_FOR_ARCH8_3 \ - (AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_V8_3 | AARCH64_FL_PAUTH) + (AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_V8_3 | AARCH64_FL_PAUTH \ + | AARCH64_FL_RCPC) #define AARCH64_FL_FOR_ARCH8_4 \ (AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_V8_4 | AARCH64_FL_F16FML \ | AARCH64_FL_DOTPROD | AARCH64_FL_RCPC8_4 | AARCH64_FL_FLAGM) @@ -271,7 +268,7 @@ extern unsigned aarch64_architecture_version; (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \ | AARCH64_FL_I8MM | AARCH64_FL_BF16) #define AARCH64_FL_FOR_ARCH8_7 \ - (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64) + (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7) #define AARCH64_FL_FOR_ARCH8_8 \ (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS) @@ -305,6 +302,7 @@ extern unsigned aarch64_architecture_version; #define AARCH64_ISA_SM4 (aarch64_isa_flags & AARCH64_FL_SM4) #define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3) #define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML) +#define AARCH64_ISA_RCPC (aarch64_isa_flags & AARCH64_FL_RCPC) #define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_RCPC8_4) #define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG) #define AARCH64_ISA_V8_5 (aarch64_isa_flags & AARCH64_FL_V8_5) @@ -862,6 +860,9 @@ extern enum aarch64_processor aarch64_tune; #ifdef HAVE_POLY_INT_H struct GTY (()) aarch64_frame { + /* The offset from the bottom of the static frame (the bottom of the + outgoing arguments) of each register save slot, or -2 if no save is + needed. */ poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; /* The number of extra stack bytes taken up by register varargs. @@ -870,25 +871,28 @@ struct GTY (()) aarch64_frame STACK_BOUNDARY. */ HOST_WIDE_INT saved_varargs_size; - /* The size of the callee-save registers with a slot in REG_OFFSET. */ - poly_int64 saved_regs_size; + /* The number of bytes between the bottom of the static frame (the bottom + of the outgoing arguments) and the bottom of the register save area. + This value is always a multiple of STACK_BOUNDARY. */ + poly_int64 bytes_below_saved_regs; - /* The size of the callee-save registers with a slot in REG_OFFSET that - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; + /* The number of bytes between the bottom of the static frame (the bottom + of the outgoing arguments) and the hard frame pointer. This value is + always a multiple of STACK_BOUNDARY. */ + poly_int64 bytes_below_hard_fp; - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of + /* The number of bytes between the top of the locals area and the top + of the frame (the incomming SP). This value is always a multiple of STACK_BOUNDARY. */ - poly_int64 locals_offset; + poly_int64 bytes_above_locals; - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of + /* The number of bytes between the hard_frame_pointer and the top of + the frame (the incomming SP). This value is always a multiple of STACK_BOUNDARY. */ - poly_int64 hard_fp_offset; + poly_int64 bytes_above_hard_fp; - /* The size of the frame. This value is the offset from base of the - frame (incomming SP) to the stack_pointer. This value is always + /* The size of the frame, i.e. the number of bytes between the bottom + of the outgoing arguments and the incoming SP. This value is always a multiple of STACK_BOUNDARY. */ poly_int64 frame_size; @@ -899,10 +903,6 @@ struct GTY (()) aarch64_frame It is zero when no push is used. */ HOST_WIDE_INT callee_adjust; - /* The offset from SP to the callee-save registers after initial_adjust. - It may be non-zero if no push is used (ie. callee_adjust == 0). */ - poly_int64 callee_offset; - /* The size of the stack adjustment before saving or after restoring SVE registers. */ poly_int64 sve_callee_adjust; @@ -950,12 +950,21 @@ struct GTY (()) aarch64_frame This is the register they should use. */ unsigned spare_pred_reg; + /* An SVE register that is saved below the hard frame pointer and that acts + as a probe for later allocations, or INVALID_REGNUM if none. */ + unsigned sve_save_and_probe; + + /* A register that is saved at the hard frame pointer and that acts + as a probe for later allocations, or INVALID_REGNUM if none. */ + unsigned hard_fp_save_and_probe; + bool laid_out; /* True if shadow call stack should be enabled for the current function. */ bool is_scs_enabled; }; +#ifdef hash_set_h typedef struct GTY (()) machine_function { struct aarch64_frame frame; @@ -964,8 +973,12 @@ typedef struct GTY (()) machine_function /* One entry for each general purpose register. */ rtx call_via[SP_REGNUM]; bool label_is_assembled; + /* A set of all decls that have been passed to a vld1 intrinsic in the + current function. This is used to help guide the vector cost model. */ + hash_set *vector_load_decls; } machine_function; #endif +#endif /* Which ABI to use. */ enum aarch64_abi_type diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index f5c635938adcc..47b70feff02bc 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -303,6 +303,7 @@ UNSPEC_TAG_SPACE ; Translate address to MTE tag address space. UNSPEC_LD1RO UNSPEC_SALT_ADDR + UNSPECV_PATCHABLE_AREA ]) (define_c_enum "unspecv" [ @@ -1158,9 +1159,27 @@ { int i; + /* Generate a PARALLEL that contains all of the register results. + The offsets are somewhat arbitrary, since we don't know the + actual return type. The main thing we need to avoid is having + overlapping byte ranges, since those might give the impression + that two registers are known to have data in common. */ + rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0)); + poly_int64 offset = 0; + for (i = 0; i < XVECLEN (operands[2], 0); i++) + { + rtx reg = SET_SRC (XVECEXP (operands[2], 0, i)); + gcc_assert (REG_P (reg)); + rtx offset_rtx = gen_int_mode (offset, Pmode); + rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx); + RTVEC_ELT (rets, i) = piece; + offset += GET_MODE_SIZE (GET_MODE (reg)); + } + rtx ret = gen_rtx_PARALLEL (VOIDmode, rets); + /* Untyped calls always use the default ABI. It's only possible to use ABI variants if we know the type of the target function. */ - emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx)); + emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, const0_rtx)); for (i = 0; i < XVECLEN (operands[2], 0); i++) { @@ -1586,6 +1605,7 @@ [(set (match_operand 2) (const_int 0)) (clobber (match_dup 3)) (clobber (match_dup 4)) + (clobber (reg:CC CC_REGNUM)) (set (match_operand 0) (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_CPYMEM))])] "TARGET_MOPS" @@ -1599,6 +1619,7 @@ [(set (match_operand:DI 2 "register_operand" "+&r") (const_int 0)) (clobber (match_operand:DI 0 "register_operand" "+&r")) (clobber (match_operand:DI 1 "register_operand" "+&r")) + (clobber (reg:CC CC_REGNUM)) (set (mem:BLK (match_dup 0)) (unspec:BLK [(mem:BLK (match_dup 1)) (match_dup 2)] UNSPEC_CPYMEM))] "TARGET_MOPS" @@ -1616,7 +1637,7 @@ (match_operand:BLK 1 "memory_operand") (match_operand:DI 2 "general_operand") (match_operand:DI 3 "immediate_operand")] - "!STRICT_ALIGNMENT || TARGET_MOPS" + "" { if (aarch64_expand_cpymem (operands)) DONE; @@ -1624,11 +1645,27 @@ } ) -(define_insn "aarch64_movmemdi" +(define_expand "aarch64_movmemdi" + [(parallel + [(set (match_operand 2) (const_int 0)) + (clobber (match_dup 3)) + (clobber (match_dup 4)) + (clobber (reg:CC CC_REGNUM)) + (set (match_operand 0) + (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_MOVMEM))])] + "TARGET_MOPS" + { + operands[3] = XEXP (operands[0], 0); + operands[4] = XEXP (operands[1], 0); + } +) + +(define_insn "*aarch64_movmemdi" [(parallel [ (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0)) (clobber (match_operand:DI 0 "register_operand" "+&r")) (clobber (match_operand:DI 1 "register_operand" "+&r")) + (clobber (reg:CC CC_REGNUM)) (set (mem:BLK (match_dup 0)) (unspec:BLK [(mem:BLK (match_dup 1)) (match_dup 2)] UNSPEC_MOVMEM))])] "TARGET_MOPS" @@ -1656,17 +1693,9 @@ && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold) FAIL; - rtx addr_dst = XEXP (operands[0], 0); - rtx addr_src = XEXP (operands[1], 0); - - if (!REG_P (sz_reg)) - sz_reg = force_reg (DImode, sz_reg); - if (!REG_P (addr_dst)) - addr_dst = force_reg (DImode, addr_dst); - if (!REG_P (addr_src)) - addr_src = force_reg (DImode, addr_src); - emit_insn (gen_aarch64_movmemdi (addr_dst, addr_src, sz_reg)); - DONE; + if (aarch64_expand_cpymem_mops (operands, true)) + DONE; + FAIL; } ) @@ -1674,6 +1703,7 @@ [(parallel [(set (match_operand 2) (const_int 0)) (clobber (match_dup 3)) + (clobber (reg:CC CC_REGNUM)) (set (match_operand 0) (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_SETMEM))])] @@ -1686,6 +1716,7 @@ (define_insn "*aarch64_setmemdi" [(set (match_operand:DI 2 "register_operand" "+&r") (const_int 0)) (clobber (match_operand:DI 0 "register_operand" "+&r")) + (clobber (reg:CC CC_REGNUM)) (set (mem:BLK (match_dup 0)) (unspec:BLK [(match_operand:QI 1 "aarch64_reg_or_zero" "rZ") (match_dup 2)] UNSPEC_SETMEM))] @@ -1703,7 +1734,7 @@ (match_operand:QI 2 "nonmemory_operand")) ;; Value (use (match_operand:DI 1 "general_operand")) ;; Length (match_operand 3 "immediate_operand")] ;; Align - "TARGET_SIMD || TARGET_MOPS" + "" { if (aarch64_expand_setmem (operands)) DONE; @@ -1843,17 +1874,18 @@ [(set_attr "type" "neon_load1_2reg")] ) -(define_insn "loadwb_pair_" +(define_insn "loadwb_pair_" [(parallel [(set (match_operand:P 0 "register_operand" "=k") - (plus:P (match_operand:P 1 "register_operand" "0") - (match_operand:P 4 "aarch64_mem_pair_offset" "n"))) - (set (match_operand:TX 2 "register_operand" "=w") - (mem:TX (match_dup 1))) - (set (match_operand:TX 3 "register_operand" "=w") - (mem:TX (plus:P (match_dup 1) + (plus:P (match_operand:P 1 "register_operand" "0") + (match_operand:P 4 "aarch64_mem_pair_offset" "n"))) + (set (match_operand:TX_V16QI 2 "register_operand" "=w") + (mem:TX_V16QI (match_dup 1))) + (set (match_operand:TX_V16QI 3 "register_operand" "=w") + (mem:TX_V16QI (plus:P (match_dup 1) (match_operand:P 5 "const_int_operand" "n"))))])] - "TARGET_SIMD && INTVAL (operands[5]) == GET_MODE_SIZE (mode)" + "TARGET_SIMD + && known_eq (INTVAL (operands[5]), GET_MODE_SIZE (mode))" "ldp\\t%q2, %q3, [%1], %4" [(set_attr "type" "neon_ldp_q")] ) @@ -1892,20 +1924,20 @@ [(set_attr "type" "neon_store1_2reg")] ) -(define_insn "storewb_pair_" +(define_insn "storewb_pair_" [(parallel [(set (match_operand:P 0 "register_operand" "=&k") - (plus:P (match_operand:P 1 "register_operand" "0") - (match_operand:P 4 "aarch64_mem_pair_offset" "n"))) - (set (mem:TX (plus:P (match_dup 0) + (plus:P (match_operand:P 1 "register_operand" "0") + (match_operand:P 4 "aarch64_mem_pair_offset" "n"))) + (set (mem:TX_V16QI (plus:P (match_dup 0) (match_dup 4))) - (match_operand:TX 2 "register_operand" "w")) - (set (mem:TX (plus:P (match_dup 0) + (match_operand:TX_V16QI 2 "register_operand" "w")) + (set (mem:TX_V16QI (plus:P (match_dup 0) (match_operand:P 5 "const_int_operand" "n"))) - (match_operand:TX 3 "register_operand" "w"))])] + (match_operand:TX_V16QI 3 "register_operand" "w"))])] "TARGET_SIMD - && INTVAL (operands[5]) - == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" + && known_eq (INTVAL (operands[5]), + INTVAL (operands[4]) + GET_MODE_SIZE (mode))" "stp\\t%q2, %q3, [%0, %4]!" [(set_attr "type" "neon_stp_q")] ) @@ -4912,7 +4944,7 @@ rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx); rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx); - emit_insn (gen_rbit2 (operands[0], operands[1])); + emit_insn (gen_aarch64_rbit (mode, operands[0], operands[1])); emit_insn (gen_clz2 (operands[0], operands[0])); emit_insn (gen_csinc3_insn (operands[0], x, operands[0], const0_rtx)); DONE; @@ -4958,7 +4990,7 @@ [(set_attr "type" "clz")] ) -(define_insn "rbit2" +(define_insn "@aarch64_rbit" [(set (match_operand:GPI 0 "register_operand" "=r") (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_RBIT))] "" @@ -4979,7 +5011,7 @@ "reload_completed" [(const_int 0)] " - emit_insn (gen_rbit2 (operands[0], operands[1])); + emit_insn (gen_aarch64_rbit (mode, operands[0], operands[1])); emit_insn (gen_clz2 (operands[0], operands[0])); DONE; ") @@ -5969,6 +6001,13 @@ [(set_attr "type" "rev")] ) +(define_insn "@aarch64_rev16" + [(set (match_operand:GPI 0 "register_operand" "=r") + (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_REV))] + "" + "rev16\\t%0, %1" + [(set_attr "type" "rev")]) + (define_insn "*aarch64_bfxil" [(set (match_operand:GPI 0 "register_operand" "=r,r") (ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "r,0") @@ -7655,9 +7694,9 @@ ;; Load/Store 64-bit (LS64) instructions. (define_insn "ld64b" [(set (match_operand:V8DI 0 "register_operand" "=r") - (unspec_volatile:V8DI - [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))] - UNSPEC_LD64B) + (unspec_volatile:V8DI + [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))] + UNSPEC_LD64B) )] "TARGET_LS64" "ld64b\\t%0, [%1]" @@ -7665,9 +7704,9 @@ ) (define_insn "st64b" - [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r")) - (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")] - UNSPEC_ST64B) + [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r")) + (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")] + UNSPEC_ST64B) )] "TARGET_LS64" "st64b\\t%1, [%0]" @@ -7676,10 +7715,10 @@ (define_insn "st64bv" [(set (match_operand:DI 0 "register_operand" "=r") - (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET)) + (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET)) (set (mem:V8DI (match_operand:DI 1 "register_operand" "r")) - (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] - UNSPEC_ST64BV) + (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] + UNSPEC_ST64BV) )] "TARGET_LS64" "st64bv\\t%0, %2, [%1]" @@ -7688,16 +7727,29 @@ (define_insn "st64bv0" [(set (match_operand:DI 0 "register_operand" "=r") - (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET)) + (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET)) (set (mem:V8DI (match_operand:DI 1 "register_operand" "r")) - (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] - UNSPEC_ST64BV0) + (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] + UNSPEC_ST64BV0) )] "TARGET_LS64" "st64bv0\\t%0, %2, [%1]" [(set_attr "type" "ls64")] ) +(define_insn "patchable_area" + [(unspec_volatile [(match_operand 0 "const_int_operand") + (match_operand 1 "const_int_operand")] + UNSPECV_PATCHABLE_AREA)] + "" +{ + aarch64_output_patchable_area (INTVAL (operands[0]), + INTVAL (operands[1]) != 0); + return ""; +} + [(set (attr "length") (symbol_ref "INTVAL (operands[0])"))] +) + ;; AdvSIMD Stuff (include "aarch64-simd.md") diff --git a/gcc/config/aarch64/arm_acle.h b/gcc/config/aarch64/arm_acle.h index 9775a48c65825..24c02d4fdf306 100644 --- a/gcc/config/aarch64/arm_acle.h +++ b/gcc/config/aarch64/arm_acle.h @@ -28,6 +28,7 @@ #define _GCC_ARM_ACLE_H #include +#include #pragma GCC aarch64 "arm_acle.h" @@ -35,6 +36,58 @@ extern "C" { #endif +#define _GCC_ARM_ACLE_ROR_FN(NAME, TYPE) \ +__extension__ extern __inline TYPE \ +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) \ +NAME (TYPE __value, uint32_t __rotate) \ +{ \ + size_t __size = sizeof (TYPE) * __CHAR_BIT__; \ + __rotate = __rotate % __size; \ + return __value >> __rotate | __value << ((__size - __rotate) % __size); \ +} + +_GCC_ARM_ACLE_ROR_FN (__ror, uint32_t) +_GCC_ARM_ACLE_ROR_FN (__rorl, unsigned long) +_GCC_ARM_ACLE_ROR_FN (__rorll, uint64_t) + +#undef _GCC_ARM_ACLE_ROR_FN + +#define _GCC_ARM_ACLE_DATA_FN(NAME, BUILTIN, ITYPE, RTYPE) \ +__extension__ extern __inline RTYPE \ +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) \ +__##NAME (ITYPE __value) \ +{ \ + return __builtin_##BUILTIN (__value); \ +} + +_GCC_ARM_ACLE_DATA_FN (clz, clz, uint32_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clzl, clzl, unsigned long, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clzll, clzll, uint64_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (cls, clrsb, uint32_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clsl, clrsbl, unsigned long, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clsll, clrsbll, uint64_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (rev16, aarch64_rev16, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (rev16l, aarch64_rev16l, unsigned long, unsigned long) +_GCC_ARM_ACLE_DATA_FN (rev16ll, aarch64_rev16ll, uint64_t, uint64_t) +_GCC_ARM_ACLE_DATA_FN (rbit, aarch64_rbit, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (rbitl, aarch64_rbitl, unsigned long, unsigned long) +_GCC_ARM_ACLE_DATA_FN (rbitll, aarch64_rbitll, uint64_t, uint64_t) +_GCC_ARM_ACLE_DATA_FN (revsh, bswap16, int16_t, int16_t) +_GCC_ARM_ACLE_DATA_FN (rev, bswap32, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (revll, bswap64, uint64_t, uint64_t) + +#undef _GCC_ARM_ACLE_DATA_FN + +__extension__ extern __inline unsigned long +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__revl (unsigned long __value) +{ + if (sizeof (unsigned long) == 8) + return __revll (__value); + else + return __rev (__value); +} + #pragma GCC push_options #pragma GCC target ("arch=armv8.3-a") __extension__ extern __inline int32_t @@ -217,40 +270,7 @@ __ttest (void) #endif #ifdef __ARM_FEATURE_LS64 -#pragma GCC push_options -#pragma GCC target ("+nothing+ls64") - typedef __arm_data512_t data512_t; - -__extension__ extern __inline data512_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_ld64b (const void *__addr) -{ - return __builtin_aarch64_ld64b (__addr); -} - -__extension__ extern __inline void -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_st64b (void *__addr, data512_t __value) -{ - __builtin_aarch64_st64b (__addr, __value); -} - -__extension__ extern __inline uint64_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_st64bv (void *__addr, data512_t __value) -{ - return __builtin_aarch64_st64bv (__addr, __value); -} - -__extension__ extern __inline uint64_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_st64bv0 (void *__addr, data512_t __value) -{ - return __builtin_aarch64_st64bv0 (__addr, __value); -} - -#pragma GCC pop_options #endif #pragma GCC push_options diff --git a/gcc/config/aarch64/driver-aarch64.cc b/gcc/config/aarch64/driver-aarch64.cc index 8073a0786d974..d714a8bda4366 100644 --- a/gcc/config/aarch64/driver-aarch64.cc +++ b/gcc/config/aarch64/driver-aarch64.cc @@ -202,9 +202,9 @@ readline (FILE *f) return std::string (); /* If we're not at the end of the line then override the \0 added by fgets. */ - last = strnlen (buf, size) - 1; + last = strnlen (buf, size); } - while (!feof (f) && buf[last] != '\n'); + while (!feof (f) && last > 0 && buf[last - 1] != '\n'); std::string result (buf); free (buf); diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index e72fdf35a82e5..d49e37893df97 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -303,6 +303,9 @@ (define_mode_iterator TX [TI TF]) +;; TX plus V16QImode. +(define_mode_iterator TX_V16QI [TI TF V16QI]) + ;; Advanced SIMD opaque structure modes. (define_mode_iterator VSTRUCT [OI CI XI]) @@ -3112,6 +3115,8 @@ (define_int_iterator SVE_BRK_UNARY [UNSPEC_BRKA UNSPEC_BRKB]) +(define_int_iterator SVE_BRKP [UNSPEC_BRKPA UNSPEC_BRKPB]) + (define_int_iterator SVE_BRK_BINARY [UNSPEC_BRKN UNSPEC_BRKPA UNSPEC_BRKPB]) (define_int_iterator SVE_PITER [UNSPEC_PFIRST UNSPEC_PNEXT]) diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h index 0c832bf039c55..adfdd774ef4cc 100644 --- a/gcc/config/alpha/alpha-protos.h +++ b/gcc/config/alpha/alpha-protos.h @@ -73,6 +73,8 @@ extern void alpha_end_function (FILE *, const char *, tree); extern bool alpha_find_lo_sum_using_gp (rtx); +extern int alpha_store_data_bypass_p (rtx_insn *, rtx_insn *); + #ifdef REAL_VALUE_TYPE extern int check_float_value (machine_mode, REAL_VALUE_TYPE *, int); #endif diff --git a/gcc/config/alpha/alpha.cc b/gcc/config/alpha/alpha.cc index 3db53374c9ea2..06c8356fc4e77 100644 --- a/gcc/config/alpha/alpha.cc +++ b/gcc/config/alpha/alpha.cc @@ -2070,6 +2070,8 @@ static rtx alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) { HOST_WIDE_INT d1, d2, d3, d4; + machine_mode mode = GET_MODE (target); + rtx orig_target = target; /* Decompose the entire word */ @@ -2082,6 +2084,9 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000; gcc_assert (c1 == d4); + if (mode != DImode) + target = gen_lowpart (DImode, target); + /* Construct the high word */ if (d4) { @@ -2101,7 +2106,7 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) if (d1) emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1))); - return target; + return orig_target; } /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits. */ @@ -7564,6 +7569,75 @@ alpha_does_function_need_gp (void) return 0; } +/* Helper function for alpha_store_data_bypass_p, handle just a single SET + IN_SET. */ + +static bool +alpha_store_data_bypass_p_1 (rtx_insn *out_insn, rtx in_set) +{ + if (!MEM_P (SET_DEST (in_set))) + return false; + + rtx out_set = single_set (out_insn); + if (out_set) + return !reg_mentioned_p (SET_DEST (out_set), SET_DEST (in_set)); + + rtx out_pat = PATTERN (out_insn); + if (GET_CODE (out_pat) != PARALLEL) + return false; + + for (int i = 0; i < XVECLEN (out_pat, 0); i++) + { + rtx out_exp = XVECEXP (out_pat, 0, i); + + if (GET_CODE (out_exp) == CLOBBER || GET_CODE (out_exp) == USE + || GET_CODE (out_exp) == TRAP_IF) + continue; + + gcc_assert (GET_CODE (out_exp) == SET); + + if (reg_mentioned_p (SET_DEST (out_exp), SET_DEST (in_set))) + return false; + } + + return true; +} + +/* True if the dependency between OUT_INSN and IN_INSN is on the store + data not the address operand(s) of the store. IN_INSN and OUT_INSN + must be either a single_set or a PARALLEL with SETs inside. + + This alpha-specific version of store_data_bypass_p ignores TRAP_IF + that would result in assertion failure (and internal compiler error) + in the generic store_data_bypass_p function. */ + +int +alpha_store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn) +{ + rtx in_set = single_set (in_insn); + if (in_set) + return alpha_store_data_bypass_p_1 (out_insn, in_set); + + rtx in_pat = PATTERN (in_insn); + if (GET_CODE (in_pat) != PARALLEL) + return false; + + for (int i = 0; i < XVECLEN (in_pat, 0); i++) + { + rtx in_exp = XVECEXP (in_pat, 0, i); + + if (GET_CODE (in_exp) == CLOBBER || GET_CODE (in_exp) == USE + || GET_CODE (in_exp) == TRAP_IF) + continue; + + gcc_assert (GET_CODE (in_exp) == SET); + + if (!alpha_store_data_bypass_p_1 (out_insn, in_exp)) + return false; + } + + return true; +} /* Helper function to set RTX_FRAME_RELATED_P on instructions, including sequences. */ diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 87514330c2239..b6795e1d2638c 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -756,7 +756,8 @@ (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand"))) (parallel [(set (match_dup 5) (sign_extend:DI - (any_divmod:SI (match_dup 3) (match_dup 4)))) + (any_divmod:SI (truncate:SI (match_dup 3)) + (truncate:SI (match_dup 4))))) (clobber (reg:DI 23)) (clobber (reg:DI 28))]) (set (match_operand:SI 0 "nonimmediate_operand") @@ -782,9 +783,10 @@ (define_insn_and_split "*divmodsi_internal_er" [(set (match_operand:DI 0 "register_operand" "=c") - (sign_extend:DI (match_operator:SI 3 "divmod_operator" - [(match_operand:DI 1 "register_operand" "a") - (match_operand:DI 2 "register_operand" "b")]))) + (sign_extend:DI + (match_operator:SI 3 "divmod_operator" + [(truncate:SI (match_operand:DI 1 "register_operand" "a")) + (truncate:SI (match_operand:DI 2 "register_operand" "b"))]))) (clobber (reg:DI 23)) (clobber (reg:DI 28))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" @@ -826,8 +828,8 @@ (define_insn "*divmodsi_internal_er_1" [(set (match_operand:DI 0 "register_operand" "=c") (sign_extend:DI (match_operator:SI 3 "divmod_operator" - [(match_operand:DI 1 "register_operand" "a") - (match_operand:DI 2 "register_operand" "b")]))) + [(truncate:SI (match_operand:DI 1 "register_operand" "a")) + (truncate:SI (match_operand:DI 2 "register_operand" "b"))]))) (use (match_operand:DI 4 "register_operand" "c")) (use (match_operand 5 "const_int_operand")) (clobber (reg:DI 23)) @@ -839,9 +841,10 @@ (define_insn "*divmodsi_internal" [(set (match_operand:DI 0 "register_operand" "=c") - (sign_extend:DI (match_operator:SI 3 "divmod_operator" - [(match_operand:DI 1 "register_operand" "a") - (match_operand:DI 2 "register_operand" "b")]))) + (sign_extend:DI + (match_operator:SI 3 "divmod_operator" + [(truncate:SI (match_operand:DI 1 "register_operand" "a")) + (truncate:SI (match_operand:DI 2 "register_operand" "b"))]))) (clobber (reg:DI 23)) (clobber (reg:DI 28))] "TARGET_ABI_OSF" @@ -3930,7 +3933,8 @@ else return "ldq %0,%2(%1)\t\t!literal!%3"; } - [(set_attr "type" "ldsym")]) + [(set_attr "type" "ldsym") + (set_attr "cannot_copy" "true")]) (define_split [(set (match_operand:DI 0 "register_operand") @@ -3954,7 +3958,8 @@ return "lda %0,%2(%1)\t\t!tlsgd"; else return "lda %0,%2(%1)\t\t!tlsgd!%3"; -}) +} + [(set_attr "cannot_copy" "true")]) (define_insn "movdi_er_tlsldm" [(set (match_operand:DI 0 "register_operand" "=r") @@ -3967,7 +3972,8 @@ return "lda %0,%&(%1)\t\t!tlsldm"; else return "lda %0,%&(%1)\t\t!tlsldm!%2"; -}) +} + [(set_attr "cannot_copy" "true")]) (define_insn "*movdi_er_gotdtp" [(set (match_operand:DI 0 "register_operand" "=r") @@ -5936,6 +5942,7 @@ "HAVE_AS_TLS" "ldq $27,%1($29)\t\t!literal!%2\;jsr $26,($27),%1\t\t!lituse_!%2\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" [(set_attr "type" "jsr") + (set_attr "cannot_copy" "true") (set_attr "length" "16")]) ;; We must use peep2 instead of a split because we need accurate life diff --git a/gcc/config/alpha/constraints.md b/gcc/config/alpha/constraints.md index a41b6471b9cdd..fd93525e36c6d 100644 --- a/gcc/config/alpha/constraints.md +++ b/gcc/config/alpha/constraints.md @@ -27,7 +27,7 @@ "General register 24, input to division routine") (define_register_constraint "b" "R25_REG" - "General register 24, input to division routine") + "General register 25, input to division routine") (define_register_constraint "c" "R27_REG" "General register 27, function call address") diff --git a/gcc/config/alpha/ev4.md b/gcc/config/alpha/ev4.md index 01b9a727a187a..c8ff4ed8f0df2 100644 --- a/gcc/config/alpha/ev4.md +++ b/gcc/config/alpha/ev4.md @@ -44,14 +44,7 @@ ; Stores can issue before the data (but not address) is ready. (define_insn_reservation "ev4_ist" 1 (and (eq_attr "tune" "ev4") - (eq_attr "type" "ist")) - "ev4_ib1+ev4_abox") - -; ??? Separate from ev4_ist because store_data_bypass_p can't handle -; the patterns with multiple sets, like store-conditional. -(define_insn_reservation "ev4_ist_c" 1 - (and (eq_attr "tune" "ev4") - (eq_attr "type" "st_c")) + (eq_attr "type" "ist,st_c")) "ev4_ib1+ev4_abox") (define_insn_reservation "ev4_fst" 1 @@ -110,7 +103,7 @@ (define_bypass 0 "ev4_iaddlog,ev4_shiftcm,ev4_icmp" "ev4_ist" - "store_data_bypass_p") + "alpha_store_data_bypass_p") ; Multiplies use a non-pipelined imul unit. Also, "no [ebox] insn can ; be issued exactly three cycles before an integer multiply completes". @@ -121,7 +114,7 @@ (eq_attr "opsize" "si"))) "ev4_ib0+ev4_imul,ev4_imul*18,ev4_ebox") -(define_bypass 20 "ev4_imulsi" "ev4_ist" "store_data_bypass_p") +(define_bypass 20 "ev4_imulsi" "ev4_ist" "alpha_store_data_bypass_p") (define_insn_reservation "ev4_imuldi" 23 (and (eq_attr "tune" "ev4") @@ -129,7 +122,7 @@ (eq_attr "opsize" "!si"))) "ev4_ib0+ev4_imul,ev4_imul*20,ev4_ebox") -(define_bypass 22 "ev4_imuldi" "ev4_ist" "store_data_bypass_p") +(define_bypass 22 "ev4_imuldi" "ev4_ist" "alpha_store_data_bypass_p") ; Most FP insns have a 6 cycle latency, but with a 4 cycle bypass back in. (define_insn_reservation "ev4_fpop" 6 diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc index 36a40a1dc8011..557d6f68fd170 100644 --- a/gcc/config/arm/arm-builtins.cc +++ b/gcc/config/arm/arm-builtins.cc @@ -97,7 +97,7 @@ arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] /* T (T, unsigned immediate). */ static enum arm_type_qualifiers arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] - = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate }; + = { qualifier_none, qualifier_none, qualifier_unsigned_immediate }; #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \ (arm_sat_binop_imm_qualifiers) diff --git a/gcc/config/arm/arm-d.cc b/gcc/config/arm/arm-d.cc index d65b7524934aa..5c89f1b1079e9 100644 --- a/gcc/config/arm/arm-d.cc +++ b/gcc/config/arm/arm-d.cc @@ -21,9 +21,10 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" +#include "arm-protos.h" /* Implement TARGET_D_CPU_VERSIONS for ARM targets. */ diff --git a/gcc/config/arm/arm-d.h b/gcc/config/arm/arm-d.h new file mode 100644 index 0000000000000..479a89bb120a9 --- /dev/null +++ b/gcc/config/arm/arm-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the ARM architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Defined in arm-d.cc */ +extern void arm_d_target_versions (void); +extern void arm_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS arm_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO arm_d_register_target_info diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 9d142096cb638..f8a63e98ef449 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -123,6 +123,7 @@ extern int arm_coproc_mem_operand_wb (rtx, int); extern int neon_vector_mem_operand (rtx, int, bool); extern int mve_vector_mem_operand (machine_mode, rtx, bool); extern int neon_struct_mem_operand (rtx); +extern int mve_struct_mem_operand (rtx); extern rtx *neon_vcmla_lane_prepare_operands (rtx *); @@ -403,10 +404,6 @@ extern void arm_lang_object_attributes_init (void); extern void arm_register_target_pragmas (void); extern void arm_cpu_cpp_builtins (struct cpp_reader *); -/* Defined in arm-d.cc */ -extern void arm_d_target_versions (void); -extern void arm_d_register_target_info (void); - extern bool arm_is_constant_pool_ref (rtx); /* The bits in this mask specify which instruction scheduling options should diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 14e2fdfeafa16..afaa599b6f0f1 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -13657,6 +13657,24 @@ neon_vector_mem_operand (rtx op, int type, bool strict) return FALSE; } +/* Return TRUE if OP is a mem suitable for loading/storing an MVE struct + type. */ +int +mve_struct_mem_operand (rtx op) +{ + rtx ind = XEXP (op, 0); + + /* Match: (mem (reg)). */ + if (REG_P (ind)) + return arm_address_register_rtx_p (ind, 0); + + /* Allow only post-increment by the mode size. */ + if (GET_CODE (ind) == POST_INC) + return arm_address_register_rtx_p (XEXP (ind, 0), 0); + + return FALSE; +} + /* Return TRUE if OP is a mem suitable for loading/storing a Neon struct type. */ int @@ -15671,13 +15689,21 @@ gen_cpymem_ldrd_strd (rtx *operands) { len -= 8; reg0 = gen_reg_rtx (DImode); - rtx low_reg = NULL_RTX; - rtx hi_reg = NULL_RTX; + rtx first_reg = NULL_RTX; + rtx second_reg = NULL_RTX; if (!src_aligned || !dst_aligned) { - low_reg = gen_lowpart (SImode, reg0); - hi_reg = gen_highpart_mode (SImode, DImode, reg0); + if (BYTES_BIG_ENDIAN) + { + second_reg = gen_lowpart (SImode, reg0); + first_reg = gen_highpart_mode (SImode, DImode, reg0); + } + else + { + first_reg = gen_lowpart (SImode, reg0); + second_reg = gen_highpart_mode (SImode, DImode, reg0); + } } if (MEM_ALIGN (src) >= 2 * BITS_PER_WORD) emit_move_insn (reg0, src); @@ -15685,9 +15711,9 @@ gen_cpymem_ldrd_strd (rtx *operands) emit_insn (gen_unaligned_loaddi (reg0, src)); else { - emit_insn (gen_unaligned_loadsi (low_reg, src)); + emit_insn (gen_unaligned_loadsi (first_reg, src)); src = next_consecutive_mem (src); - emit_insn (gen_unaligned_loadsi (hi_reg, src)); + emit_insn (gen_unaligned_loadsi (second_reg, src)); } if (MEM_ALIGN (dst) >= 2 * BITS_PER_WORD) @@ -15696,9 +15722,9 @@ gen_cpymem_ldrd_strd (rtx *operands) emit_insn (gen_unaligned_storedi (dst, reg0)); else { - emit_insn (gen_unaligned_storesi (dst, low_reg)); + emit_insn (gen_unaligned_storesi (dst, first_reg)); dst = next_consecutive_mem (dst); - emit_insn (gen_unaligned_storesi (dst, hi_reg)); + emit_insn (gen_unaligned_storesi (dst, second_reg)); } src = next_consecutive_mem (src); @@ -18963,6 +18989,38 @@ cmse_nonsecure_call_inline_register_clear (void) end_sequence (); emit_insn_before (seq, insn); + /* The AAPCS requires the callee to widen integral types narrower + than 32 bits to the full width of the register; but when handling + calls to non-secure space, we cannot trust the callee to have + correctly done so. So forcibly re-widen the result here. */ + tree ret_type = TREE_TYPE (fntype); + if ((TREE_CODE (ret_type) == INTEGER_TYPE + || TREE_CODE (ret_type) == ENUMERAL_TYPE + || TREE_CODE (ret_type) == BOOLEAN_TYPE) + && known_lt (GET_MODE_SIZE (TYPE_MODE (ret_type)), 4)) + { + rtx ret_reg = gen_rtx_REG (TYPE_MODE (ret_type), R0_REGNUM); + rtx si_reg = gen_rtx_REG (SImode, R0_REGNUM); + rtx extend; + if (TYPE_UNSIGNED (ret_type)) + extend = gen_rtx_SET (si_reg, gen_rtx_ZERO_EXTEND (SImode, + ret_reg)); + else + { + /* Signed-extension is a special case because of + thumb1_extendhisi2. */ + if (TARGET_THUMB1 + && known_eq (GET_MODE_SIZE (TYPE_MODE (ret_type)), 2)) + extend = gen_thumb1_extendhisi2 (si_reg, ret_reg); + else + extend = gen_rtx_SET (si_reg, + gen_rtx_SIGN_EXTEND (SImode, + ret_reg)); + } + emit_insn_after (extend, insn); + } + + if (TARGET_HAVE_FPCXT_CMSE) { rtx_insn *last, *pop_insn, *after = insn; @@ -23371,6 +23429,51 @@ arm_expand_prologue (void) ip_rtx = gen_rtx_REG (SImode, IP_REGNUM); + /* The AAPCS requires the callee to widen integral types narrower + than 32 bits to the full width of the register; but when handling + calls to non-secure space, we cannot trust the callee to have + correctly done so. So forcibly re-widen the result here. */ + if (IS_CMSE_ENTRY (func_type)) + { + function_args_iterator args_iter; + CUMULATIVE_ARGS args_so_far_v; + cumulative_args_t args_so_far; + bool first_param = true; + tree arg_type; + tree fndecl = current_function_decl; + tree fntype = TREE_TYPE (fndecl); + arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl); + args_so_far = pack_cumulative_args (&args_so_far_v); + FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter) + { + rtx arg_rtx; + + if (VOID_TYPE_P (arg_type)) + break; + + function_arg_info arg (arg_type, /*named=*/true); + if (!first_param) + /* We should advance after processing the argument and pass + the argument we're advancing past. */ + arm_function_arg_advance (args_so_far, arg); + first_param = false; + arg_rtx = arm_function_arg (args_so_far, arg); + gcc_assert (REG_P (arg_rtx)); + if ((TREE_CODE (arg_type) == INTEGER_TYPE + || TREE_CODE (arg_type) == ENUMERAL_TYPE + || TREE_CODE (arg_type) == BOOLEAN_TYPE) + && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4)) + { + if (TYPE_UNSIGNED (arg_type)) + emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)), + gen_rtx_ZERO_EXTEND (SImode, arg_rtx)); + else + emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)), + gen_rtx_SIGN_EXTEND (SImode, arg_rtx)); + } + } + } + if (IS_STACKALIGN (func_type)) { rtx r0, r1; @@ -26852,6 +26955,58 @@ thumb1_expand_prologue (void) live_regs_mask = offsets->saved_regs_mask; lr_needs_saving = live_regs_mask & (1 << LR_REGNUM); + /* The AAPCS requires the callee to widen integral types narrower + than 32 bits to the full width of the register; but when handling + calls to non-secure space, we cannot trust the callee to have + correctly done so. So forcibly re-widen the result here. */ + if (IS_CMSE_ENTRY (func_type)) + { + function_args_iterator args_iter; + CUMULATIVE_ARGS args_so_far_v; + cumulative_args_t args_so_far; + bool first_param = true; + tree arg_type; + tree fndecl = current_function_decl; + tree fntype = TREE_TYPE (fndecl); + arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl); + args_so_far = pack_cumulative_args (&args_so_far_v); + FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter) + { + rtx arg_rtx; + + if (VOID_TYPE_P (arg_type)) + break; + + function_arg_info arg (arg_type, /*named=*/true); + if (!first_param) + /* We should advance after processing the argument and pass + the argument we're advancing past. */ + arm_function_arg_advance (args_so_far, arg); + first_param = false; + arg_rtx = arm_function_arg (args_so_far, arg); + gcc_assert (REG_P (arg_rtx)); + if ((TREE_CODE (arg_type) == INTEGER_TYPE + || TREE_CODE (arg_type) == ENUMERAL_TYPE + || TREE_CODE (arg_type) == BOOLEAN_TYPE) + && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4)) + { + rtx res_reg = gen_rtx_REG (SImode, REGNO (arg_rtx)); + if (TYPE_UNSIGNED (arg_type)) + emit_set_insn (res_reg, gen_rtx_ZERO_EXTEND (SImode, arg_rtx)); + else + { + /* Signed-extension is a special case because of + thumb1_extendhisi2. */ + if (known_eq (GET_MODE_SIZE (GET_MODE (arg_rtx)), 2)) + emit_insn (gen_thumb1_extendhisi2 (res_reg, arg_rtx)); + else + emit_set_insn (res_reg, + gen_rtx_SIGN_EXTEND (SImode, arg_rtx)); + } + } + } + } + /* Extract a mask of the ones we can give to the Thumb's push instruction. */ l_mask = live_regs_mask & 0x40ff; /* Then count how many other high registers will need to be pushed. */ diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index f479540812a76..e15722b0be3b3 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -47,10 +47,6 @@ extern char arm_arch_name[]; /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() arm_cpu_cpp_builtins (pfile) -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS arm_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO arm_d_register_target_info - #include "config/arm/arm-opts.h" /* The processor for which instructions should be scheduled. */ diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 60468f6182c35..912b939f8867b 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -7466,7 +7466,7 @@ && !arm_const_double_rtx (operands[1]) && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1]))) { - rtx clobreg = gen_reg_rtx (DFmode); + rtx clobreg = gen_reg_rtx (DImode); emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1], clobreg)); DONE; diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index 073e3711623ba..9727c53846388 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -15,6 +15,10 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see . */ @@ -9675,42 +9679,42 @@ __arm_vabdq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pr __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p); } __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p); } __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p) { return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p); } @@ -16055,7 +16059,7 @@ __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16065,7 +16069,7 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16075,7 +16079,7 @@ __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16085,7 +16089,7 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); uint32x4_t __res = __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16131,7 +16135,7 @@ __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16141,7 +16145,7 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); uint32x4_t __res = __builtin_mve_vsbcq_uv4si (__a, __b); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16151,7 +16155,7 @@ __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16161,7 +16165,7 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) { - __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); + __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p); *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; return __res; @@ -16171,14 +16175,14 @@ __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) { - return vstrbq_p_u8 (__addr, __value, __p); + return __arm_vstrbq_p_u8 (__addr, __value, __p); } __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) { - return vstrbq_p_s8 (__addr, __value, __p); + return __arm_vstrbq_p_s8 (__addr, __value, __p); } __extension__ extern __inline void @@ -16203,14 +16207,14 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p) { - return vldrbq_z_u8 ( __base, __p); + return __arm_vldrbq_z_u8 ( __base, __p); } __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p) { - return vldrbq_z_s8 ( __base, __p); + return __arm_vldrbq_z_s8 ( __base, __p); } __extension__ extern __inline int8x16x2_t @@ -16253,14 +16257,14 @@ __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) { - return vstrhq_p_u16 (__addr, __value, __p); + return __arm_vstrhq_p_u16 (__addr, __value, __p); } __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) { - return vstrhq_p_s16 (__addr, __value, __p); + return __arm_vstrhq_p_s16 (__addr, __value, __p); } __extension__ extern __inline void @@ -16285,14 +16289,14 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p) { - return vldrhq_z_u16 ( __base, __p); + return __arm_vldrhq_z_u16 ( __base, __p); } __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p) { - return vldrhq_z_s16 ( __base, __p); + return __arm_vldrhq_z_s16 ( __base, __p); } __extension__ extern __inline int16x8x2_t @@ -16335,14 +16339,14 @@ __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) { - return vstrwq_p_u32 (__addr, __value, __p); + return __arm_vstrwq_p_u32 (__addr, __value, __p); } __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) { - return vstrwq_p_s32 (__addr, __value, __p); + return __arm_vstrwq_p_s32 (__addr, __value, __p); } __extension__ extern __inline void @@ -16367,14 +16371,14 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p) { - return vldrwq_z_u32 ( __base, __p); + return __arm_vldrwq_z_u32 ( __base, __p); } __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p) { - return vldrwq_z_s32 ( __base, __p); + return __arm_vldrwq_z_s32 ( __base, __p); } __extension__ extern __inline int32x4x2_t @@ -19837,7 +19841,7 @@ __extension__ extern __inline float16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p) { - return vldrhq_z_f16 (__base, __p); + return __arm_vldrhq_z_f16 (__base, __p); } __extension__ extern __inline void @@ -19853,7 +19857,7 @@ __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) { - return vstrhq_p_f16 (__addr, __value, __p); + return __arm_vstrhq_p_f16 (__addr, __value, __p); } __extension__ extern __inline float32x4x4_t @@ -19878,7 +19882,7 @@ __extension__ extern __inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p) { - return vldrwq_z_f32 (__base, __p); + return __arm_vldrwq_z_f32 (__base, __p); } __extension__ extern __inline void @@ -19894,7 +19898,7 @@ __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) { - return vstrwq_p_f32 (__addr, __value, __p); + return __arm_vstrwq_p_f32 (__addr, __value, __p); } __extension__ extern __inline float16x8_t @@ -26417,42 +26421,42 @@ __arm_vabdq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16 __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p); } __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p); } __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p) +__arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p) { return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p); } @@ -35582,13 +35586,29 @@ enum { short: __ARM_mve_type_int_n, \ int: __ARM_mve_type_int_n, \ long: __ARM_mve_type_int_n, \ - double: __ARM_mve_type_fp_n, \ long long: __ARM_mve_type_int_n, \ + _Float16: __ARM_mve_type_fp_n, \ + __fp16: __ARM_mve_type_fp_n, \ + float: __ARM_mve_type_fp_n, \ + double: __ARM_mve_type_fp_n, \ unsigned char: __ARM_mve_type_int_n, \ unsigned short: __ARM_mve_type_int_n, \ unsigned int: __ARM_mve_type_int_n, \ unsigned long: __ARM_mve_type_int_n, \ unsigned long long: __ARM_mve_type_int_n, \ + signed char*: __ARM_mve_type_int8_t_ptr, \ + short*: __ARM_mve_type_int16_t_ptr, \ + int*: __ARM_mve_type_int32_t_ptr, \ + long*: __ARM_mve_type_int32_t_ptr, \ + long long*: __ARM_mve_type_int64_t_ptr, \ + _Float16*: __ARM_mve_type_float16_t_ptr, \ + __fp16*: __ARM_mve_type_float16_t_ptr, \ + float*: __ARM_mve_type_float32_t_ptr, \ + unsigned char*: __ARM_mve_type_uint8_t_ptr, \ + unsigned short*: __ARM_mve_type_uint16_t_ptr, \ + unsigned int*: __ARM_mve_type_uint32_t_ptr, \ + unsigned long*: __ARM_mve_type_uint32_t_ptr, \ + unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ default: __ARM_mve_unsupported_type)) #else #define __ARM_mve_typeid(x) _Generic(x, \ @@ -35647,30 +35667,67 @@ enum { unsigned int: __ARM_mve_type_int_n, \ unsigned long: __ARM_mve_type_int_n, \ unsigned long long: __ARM_mve_type_int_n, \ + signed char*: __ARM_mve_type_int8_t_ptr, \ + short*: __ARM_mve_type_int16_t_ptr, \ + int*: __ARM_mve_type_int32_t_ptr, \ + long*: __ARM_mve_type_int32_t_ptr, \ + long long*: __ARM_mve_type_int64_t_ptr, \ + unsigned char*: __ARM_mve_type_uint8_t_ptr, \ + unsigned short*: __ARM_mve_type_uint16_t_ptr, \ + unsigned int*: __ARM_mve_type_uint32_t_ptr, \ + unsigned long*: __ARM_mve_type_uint32_t_ptr, \ + unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ default: __ARM_mve_unsupported_type)) #endif /* MVE Floating point. */ extern void *__ARM_undef; #define __ARM_mve_coerce(param, type) \ _Generic(param, type: param, default: *(type *)__ARM_undef) -#define __ARM_mve_coerce1(param, type) \ - _Generic(param, type: param, const type: param, default: *(type *)__ARM_undef) -#define __ARM_mve_coerce2(param, type) \ - _Generic(param, type: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef) +#define __ARM_mve_coerce_i_scalar(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, int8_t: param, int16_t: param, int32_t: param, int64_t: param, uint8_t: param, uint16_t: param, uint32_t: param, uint64_t: param, default: *(type *)__ARM_undef)) + +#define __ARM_mve_coerce_s8_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, signed char*: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_u8_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, unsigned char*: param, default: *(type *)__ARM_undef)) + +#define __ARM_mve_coerce_s16_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, short*: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_u16_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, unsigned short*: param, default: *(type *)__ARM_undef)) + +#define __ARM_mve_coerce_s32_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, int*: param, long*: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_u32_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, unsigned int*: param, unsigned long*: param, default: *(type *)__ARM_undef)) + +#define __ARM_mve_coerce_s64_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, long long*: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_u64_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, unsigned long long*: param, default: *(type *)__ARM_undef)) + +#if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ +#define __ARM_mve_coerce_f_scalar(param, type) \ + _Generic(param, type: param, const type: param, __fp16: param, default: _Generic (param, _Float16: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_f16_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, __fp16*: param, _Float16*: param, default: *(type *)__ARM_undef)) +#define __ARM_mve_coerce_f32_ptr(param, type) \ + _Generic(param, type: param, const type: param, default: _Generic (param, float*: param, default: *(type *)__ARM_undef)) +#endif #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce_f16_ptr(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));}) #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -35847,6 +35904,10 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));}) @@ -35871,16 +35932,16 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(p0, float16x8_t), __ARM_mve_coerce(p1, float16x8_t)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(p0, float32x4_t), __ARM_mve_coerce(p1, float32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -35897,10 +35958,10 @@ extern void *__ARM_undef; #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -35925,14 +35986,14 @@ extern void *__ARM_undef; #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -35957,14 +36018,14 @@ extern void *__ARM_undef; #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -35995,16 +36056,16 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36012,13 +36073,13 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36028,11 +36089,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36040,25 +36101,25 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36113,8 +36174,8 @@ extern void *__ARM_undef; #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36125,14 +36186,14 @@ extern void *__ARM_undef; #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36143,8 +36204,8 @@ extern void *__ARM_undef; #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -36166,14 +36227,14 @@ extern void *__ARM_undef; #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36186,8 +36247,8 @@ extern void *__ARM_undef; #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -36242,12 +36303,12 @@ extern void *__ARM_undef; #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36278,12 +36339,12 @@ extern void *__ARM_undef; #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36334,12 +36395,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36347,9 +36408,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36382,8 +36443,8 @@ extern void *__ARM_undef; #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) @@ -36396,17 +36457,17 @@ extern void *__ARM_undef; #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) @@ -36414,12 +36475,12 @@ extern void *__ARM_undef; #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36452,12 +36513,12 @@ extern void *__ARM_undef; #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36482,12 +36543,12 @@ extern void *__ARM_undef; #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -36630,12 +36691,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36714,44 +36775,44 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36941,11 +37002,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) @@ -36957,11 +37018,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36971,11 +37032,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -36988,14 +37049,14 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37049,8 +37110,8 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));}) @@ -37065,8 +37126,8 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)));}) #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37089,14 +37150,14 @@ extern void *__ARM_undef; #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37107,14 +37168,14 @@ extern void *__ARM_undef; #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37176,13 +37237,13 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37283,11 +37344,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) @@ -37316,14 +37377,14 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37464,15 +37525,15 @@ extern void *__ARM_undef; _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37507,14 +37568,14 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37541,14 +37602,14 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -37565,236 +37626,236 @@ extern void *__ARM_undef; #define __arm_vld1q(p0) (\ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ - int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ + int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) #define __arm_vld1q_z(p0,p1) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ - int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce1(p0, float16_t *), p1), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ + int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), p1), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) #define __arm_vld2q(p0) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ - int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ + int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) #define __arm_vld4q(p0) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ - int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ + int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) #define __arm_vldrwq_gather_offset(p0,p1) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2))) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \ - int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2))) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ + int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));}) #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));}) #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));}) #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ @@ -37811,44 +37872,44 @@ extern void *__ARM_undef; #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));}) #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ - int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ + int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -38021,19 +38082,19 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ @@ -38156,19 +38217,19 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ @@ -38254,10 +38315,22 @@ extern void *__ARM_undef; #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ - int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ - int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) + int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ + int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) #define __arm_vcmulq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ @@ -38281,16 +38354,16 @@ extern void *__ARM_undef; #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ - int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ + int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) #else /* MVE Integer. */ @@ -38306,12 +38379,12 @@ extern void *__ARM_undef; #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));}) #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -38408,12 +38481,12 @@ extern void *__ARM_undef; #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38440,12 +38513,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -38459,12 +38532,12 @@ extern void *__ARM_undef; #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38495,12 +38568,12 @@ extern void *__ARM_undef; #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38569,12 +38642,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38582,16 +38655,16 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) @@ -38599,12 +38672,12 @@ extern void *__ARM_undef; #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38620,7 +38693,11 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38635,12 +38712,12 @@ extern void *__ARM_undef; #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38715,12 +38792,12 @@ extern void *__ARM_undef; #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38745,12 +38822,12 @@ extern void *__ARM_undef; #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38800,10 +38877,10 @@ extern void *__ARM_undef; #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38820,12 +38897,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38856,12 +38933,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38942,16 +39019,16 @@ extern void *__ARM_undef; #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) @@ -38961,9 +39038,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38971,9 +39048,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38981,9 +39058,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -38991,20 +39068,20 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ @@ -39029,12 +39106,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -39144,25 +39221,25 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -39225,9 +39302,56 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) + + +#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) + +#define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) + +#define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) + +#define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -39250,23 +39374,23 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -39291,9 +39415,9 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -39456,12 +39580,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -39561,12 +39685,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -39594,12 +39718,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -39611,12 +39735,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -39631,12 +39755,12 @@ extern void *__ARM_undef; #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ @@ -39645,144 +39769,144 @@ extern void *__ARM_undef; #define __arm_vld1q(p0) (\ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));}) #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ @@ -39797,58 +39921,58 @@ extern void *__ARM_undef; #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -39953,15 +40077,15 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ @@ -40055,15 +40179,15 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ @@ -40147,29 +40271,45 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));}) #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1))) #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ - int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ - int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ - int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ - int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) + int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ + int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ + int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ + int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ + int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) + +#define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ + __typeof(p2) __p2 = (p2); \ + _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -40185,14 +40325,14 @@ extern void *__ARM_undef; #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));}) #endif /* MVE Integer. */ @@ -40303,62 +40443,62 @@ extern void *__ARM_undef; #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ @@ -40372,12 +40512,12 @@ extern void *__ARM_undef; #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -40402,12 +40542,12 @@ extern void *__ARM_undef; #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -40447,20 +40587,20 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \ - int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1))) + int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ + int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2))) + int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \ - int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1))) + int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ + int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \ - int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2))) + int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ + int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -40516,36 +40656,36 @@ extern void *__ARM_undef; #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -40646,12 +40786,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -40666,9 +40806,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -40794,17 +40934,17 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -40874,10 +41014,10 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int) , p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int) , p2));}) + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2));}) #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -40943,12 +41083,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -40982,12 +41122,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41015,23 +41155,23 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41077,12 +41217,12 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ @@ -41094,17 +41234,17 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) @@ -41115,15 +41255,15 @@ extern void *__ARM_undef; _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ - int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ + int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) @@ -41189,9 +41329,9 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41202,12 +41342,12 @@ extern void *__ARM_undef; #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41215,9 +41355,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41225,89 +41365,89 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, (const int) p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, (const int) p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, (const int) p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, (const int) p2));}) #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ - int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ - int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) + int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ + int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -41343,14 +41483,14 @@ extern void *__ARM_undef; #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -41365,22 +41505,22 @@ extern void *__ARM_undef; #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ @@ -41406,9 +41546,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41416,9 +41556,9 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41426,16 +41566,16 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) @@ -41532,34 +41672,34 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41602,17 +41742,17 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));}) #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ @@ -41776,22 +41916,22 @@ extern void *__ARM_undef; #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ @@ -41807,61 +41947,61 @@ extern void *__ARM_undef; __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ - int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ - int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ + int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ + int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ - int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) + int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ + int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ - int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) + int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ + int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ - int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) + int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ + int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p2) __p2 = (p2); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ - int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ - int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) + int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ + int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) #endif /* __cplusplus */ #endif /* __ARM_FEATURE_MVE */ diff --git a/gcc/config/arm/arm_mve_types.h b/gcc/config/arm/arm_mve_types.h index 0b2d6422545f9..e1193d52c0f19 100644 --- a/gcc/config/arm/arm_mve_types.h +++ b/gcc/config/arm/arm_mve_types.h @@ -15,6 +15,10 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see . */ diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index 2b411b0cb0fcf..10e7c9b9c323a 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -102,10 +102,6 @@ (match_test "TARGET_HAVE_MVE && ((ival == 1) || (ival == 2) || (ival == 4) || (ival == 8))"))) -;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE. -(define_predicate "mve_vldrd_immediate" - (match_test "satisfies_constraint_Ri (op)")) - (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS" "The VFP registers @code{s0}-@code{s31}.") @@ -466,6 +462,11 @@ (and (match_code "mem") (match_test "TARGET_32BIT && arm_coproc_mem_operand (op, FALSE)"))) +(define_memory_constraint "Ug" + "@internal + In Thumb-2 state a valid MVE struct load/store address." + (match_operand 0 "mve_struct_operand")) + (define_memory_constraint "Uj" "@internal In ARM/Thumb-2 state a VFP load/store address that supports writeback @@ -561,6 +562,22 @@ (match_code "symbol_ref") ) +;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE. +(define_constraint "Ri" + "@internal In Thumb-2 state a constant is multiple of 8 and in range + of -/+ 1016 for MVE" + (and (match_code "const_int") + (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016) + && ((ival % 8) == 0)"))) + +;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE. +(define_constraint "Rl" + "@internal In Thumb-2 state a constant is multiple of 2 and in range + of -/+ 252 for MVE" + (and (match_code "const_int") + (match_test "TARGET_HAVE_MVE && (-252 <= ival) && (ival <= 252) + && ((ival % 2) == 0)"))) + (define_memory_constraint "Uz" "@internal A memory access that is accessible as an LDC/STC operand" diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 369d7a79f6cf7..2de14013c43dc 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -92,7 +92,7 @@ ;; [vst4q]) ;; (define_insn "mve_vst4q" - [(set (match_operand:XI 0 "neon_struct_operand" "=Um") + [(set (match_operand:XI 0 "mve_struct_operand" "=Ug") (unspec:XI [(match_operand:XI 1 "s_register_operand" "w") (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] VST4Q)) @@ -134,7 +134,7 @@ VRNDQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vrintzt.f%# %q0, %q2" + "vpst\;vrintzt.f%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -232,7 +232,7 @@ VREV64Q_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vrev64.%# %q0, %q1" + "vrev64.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -245,7 +245,7 @@ (neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vneg.f%# %q0, %q1" + "vneg.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -259,7 +259,7 @@ VDUPQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vdup.%# %q0, %1" + "vdup.%#\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -272,7 +272,7 @@ (abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vabs.f%# %q0, %q1" + "vabs.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -286,7 +286,7 @@ VREV32Q_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vrev32.16 %q0, %q1" + "vrev32.16\t%q0, %q1" [(set_attr "type" "mve_move") ]) ;; @@ -299,7 +299,7 @@ VCVTTQ_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtt.f32.f16 %q0, %q1" + "vcvtt.f32.f16\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -313,7 +313,7 @@ VCVTBQ_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtb.f32.f16 %q0, %q1" + "vcvtb.f32.f16\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -327,7 +327,7 @@ VCVTQ_TO_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.f%#.%# %q0, %q1" + "vcvt.f%#.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -341,7 +341,7 @@ VREV64Q)) ] "TARGET_HAVE_MVE" - "vrev64.%# %q0, %q1" + "vrev64.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -355,7 +355,7 @@ VCVTQ_FROM_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.%#.f%# %q0, %q1" + "vcvt.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) ;; [vqnegq_s]) @@ -367,7 +367,7 @@ VQNEGQ_S)) ] "TARGET_HAVE_MVE" - "vqneg.s%# %q0, %q1" + "vqneg.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -381,7 +381,7 @@ VQABSQ_S)) ] "TARGET_HAVE_MVE" - "vqabs.s%# %q0, %q1" + "vqabs.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -394,7 +394,7 @@ (neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vneg.s%# %q0, %q1" + "vneg.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -428,7 +428,7 @@ VDUPQ_N)) ] "TARGET_HAVE_MVE" - "vdup.%# %q0, %1" + "vdup.%#\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -441,7 +441,7 @@ (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vclz.i%# %q0, %q1" + "vclz.i%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) (define_expand "mve_vclzq_u" @@ -462,7 +462,7 @@ VCLSQ_S)) ] "TARGET_HAVE_MVE" - "vcls.s%# %q0, %q1" + "vcls.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -517,7 +517,7 @@ VMOVLTQ)) ] "TARGET_HAVE_MVE" - "vmovlt.%# %q0, %q1" + "vmovlt.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -531,7 +531,7 @@ VMOVLBQ)) ] "TARGET_HAVE_MVE" - "vmovlb.%# %q0, %q1" + "vmovlb.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -545,7 +545,7 @@ VCVTPQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtp.%#.f%# %q0, %q1" + "vcvtp.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -559,7 +559,7 @@ VCVTNQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtn.%#.f%# %q0, %q1" + "vcvtn.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -573,7 +573,7 @@ VCVTMQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtm.%#.f%# %q0, %q1" + "vcvtm.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -587,7 +587,7 @@ VCVTAQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvta.%#.f%# %q0, %q1" + "vcvta.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -601,7 +601,7 @@ VMVNQ_N)) ] "TARGET_HAVE_MVE" - "vmvn.i%# %q0, %1" + "vmvn.i%#\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -615,7 +615,7 @@ VREV16Q)) ] "TARGET_HAVE_MVE" - "vrev16.8 %q0, %q1" + "vrev16.8\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -629,7 +629,7 @@ VADDLVQ)) ] "TARGET_HAVE_MVE" - "vaddlv.32 %Q0, %R0, %q1" + "vaddlv.32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") ]) @@ -643,7 +643,7 @@ VCTPQ)) ] "TARGET_HAVE_MVE" - "vctp. %1" + "vctp.\t%1" [(set_attr "type" "mve_move") ]) @@ -672,7 +672,7 @@ VSUBQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vsub.f %q0, %q1, %2" + "vsub.f\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -687,7 +687,7 @@ VBRSRQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vbrsr. %q0, %q1, %2" + "vbrsr.\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -716,7 +716,7 @@ VCREATEQ_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1" + "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -731,7 +731,7 @@ VCREATEQ)) ] "TARGET_HAVE_MVE" - "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1" + "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -810,7 +810,7 @@ VADDLVQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvt.32 %Q0, %R0, %q1" + "vpst\;vaddlvt.32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -824,7 +824,7 @@ (match_operand:MVE_2 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vcmp.%# , %q1, %q2" + "vcmp.%#\t, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -834,8 +834,9 @@ (define_insn "mve_vcmpq_n_" [ (set (match_operand: 0 "vpr_register_operand" "=Up") - (MVE_COMPARISONS: (match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r"))) + (MVE_COMPARISONS: + (match_operand:MVE_2 1 "s_register_operand" "w") + (vec_duplicate:MVE_2 (match_operand: 2 "s_register_operand" "r")))) ] "TARGET_HAVE_MVE" "vcmp.%# , %q1, %2" @@ -872,7 +873,7 @@ VADDQ_N)) ] "TARGET_HAVE_MVE" - "vadd.i%# %q0, %q1, %2" + "vadd.i%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -887,7 +888,7 @@ VADDVAQ)) ] "TARGET_HAVE_MVE" - "vaddva.%# %0, %q2" + "vaddva.%#\t%0, %q2" [(set_attr "type" "mve_move") ]) @@ -968,7 +969,7 @@ VBRSRQ_N)) ] "TARGET_HAVE_MVE" - "vbrsr.%# %q0, %q1, %2" + "vbrsr.%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -1617,7 +1618,7 @@ [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:SI 2 "mve_imm_7" "Ra")] + (match_operand:SI 2 "" "")] VQSHLUQ_N_S)) ] "TARGET_HAVE_MVE" @@ -1827,7 +1828,7 @@ VADDLVAQ)) ] "TARGET_HAVE_MVE" - "vaddlva.32 %Q0, %R0, %q2" + "vaddlva.32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") ]) @@ -1842,7 +1843,7 @@ VADDQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vadd.f%# %q0, %q1, %2" + "vadd.f%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -1856,7 +1857,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vand %q0, %q1, %q2" + "vand\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1870,7 +1871,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vbic %q0, %q1, %q2" + "vbic\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1885,7 +1886,7 @@ VBICQ_N)) ] "TARGET_HAVE_MVE" - "vbic.i%# %q0, %2" + "vbic.i%#\t%q0, %2" [(set_attr "type" "mve_move") ]) @@ -1924,8 +1925,9 @@ (define_insn "@mve_vcmpq_n_f" [ (set (match_operand: 0 "vpr_register_operand" "=Up") - (MVE_FP_COMPARISONS: (match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r"))) + (MVE_FP_COMPARISONS: + (match_operand:MVE_0 1 "s_register_operand" "w") + (vec_duplicate:MVE_0 (match_operand: 2 "s_register_operand" "r")))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" "vcmp.f%# , %q1, %2" @@ -1958,7 +1960,7 @@ VCTPQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vctpt. %1" + "vpst\;vctpt.\t%1" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -1973,7 +1975,7 @@ VCVTBQ_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtb.f16.f32 %q0, %q2" + "vcvtb.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") ]) @@ -1988,7 +1990,7 @@ VCVTTQ_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtt.f16.f32 %q0, %q2" + "vcvtt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") ]) @@ -2002,7 +2004,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "veor %q0, %q1, %q2" + "veor\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2150,7 +2152,7 @@ VMLALDAVXQ_S)) ] "TARGET_HAVE_MVE" - "vmlaldavx.s%# %Q0, %R0, %q1, %q2" + "vmlaldavx.s%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2165,7 +2167,7 @@ VMLSLDAVQ_S)) ] "TARGET_HAVE_MVE" - "vmlsldav.s%# %Q0, %R0, %q1, %q2" + "vmlsldav.s%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2180,7 +2182,7 @@ VMLSLDAVXQ_S)) ] "TARGET_HAVE_MVE" - "vmlsldavx.s%# %Q0, %R0, %q1, %q2" + "vmlsldavx.s%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2253,7 +2255,7 @@ (match_operand:MVE_0 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vorn %q0, %q1, %q2" + "vorn\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2267,7 +2269,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vorr %q0, %q1, %q2" + "vorr\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2417,7 +2419,7 @@ VRMLALDAVHXQ_S)) ] "TARGET_HAVE_MVE" - "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2" + "vrmlaldavhx.s32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2536,7 +2538,7 @@ VRMLALDAVHQ)) ] "TARGET_HAVE_MVE" - "vrmlaldavh.32 %Q0, %R0, %q1, %q2" + "vrmlaldavh.32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2552,7 +2554,7 @@ VBICQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vbict.i%# %q0, %2" + "vpst\;vbict.i%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -2597,7 +2599,7 @@ VCVTQ_M_TO_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtt.f%#.%# %q0, %q2" + "vpst\;vcvtt.f%#.%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -2608,7 +2610,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VQRSHRNBQ_N)) ] "TARGET_HAVE_MVE" @@ -2623,7 +2625,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VQRSHRUNBQ_N_S)) ] "TARGET_HAVE_MVE" @@ -2642,7 +2644,7 @@ VRMLALDAVHAQ)) ] "TARGET_HAVE_MVE" - "vrmlaldavha.32 %Q0, %R0, %q2, %q3" + "vrmlaldavha.32\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -2705,7 +2707,7 @@ (match_dup 4)] VSHLCQ))] "TARGET_HAVE_MVE" - "vshlc %q0, %1, %4") + "vshlc\t%q0, %1, %4") ;; ;; [vabsq_m_s]) @@ -3039,7 +3041,7 @@ VDUPQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vdupt.%# %q0, %2" + "vpst\;vdupt.%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3263,7 +3265,7 @@ VMVNQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vmvnt %q0, %q2" + "vpst\;vmvnt\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3295,7 +3297,7 @@ VPSELQ)) ] "TARGET_HAVE_MVE" - "vpsel %q0, %q1, %q2" + "vpsel\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -3496,7 +3498,7 @@ ;; (define_insn "mve_vrev64q_m_" [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") + (set (match_operand:MVE_2 0 "s_register_operand" "=&w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") (match_operand:MVE_2 2 "s_register_operand" "w") (match_operand: 3 "vpr_register_operand" "Up")] @@ -3563,7 +3565,7 @@ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") (match_operand:MVE_2 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_selective_upto_8" "Rg")] + (match_operand:SI 3 "" "")] VSRIQ_N)) ] "TARGET_HAVE_MVE" @@ -3710,7 +3712,7 @@ VADDLVAQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvat.32 %Q0, %R0, %q2" + "vpst\;vaddlvat.32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -3920,7 +3922,7 @@ VCVTBQ_M_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtbt.f16.f32 %q0, %q2" + "vpst\;vcvtbt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3936,7 +3938,7 @@ VCVTBQ_M_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtbt.f32.f16 %q0, %q2" + "vpst\;vcvtbt.f32.f16\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3952,7 +3954,7 @@ VCVTTQ_M_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvttt.f16.f32 %q0, %q2" + "vpst\;vcvttt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3968,7 +3970,7 @@ VCVTTQ_M_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvttt.f32.f16 %q0, %q2" + "vpst\;vcvttt.f32.f16\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3984,7 +3986,7 @@ VDUPQ_M_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vdupt.%# %q0, %2" + "vpst\;vdupt.%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4156,7 +4158,7 @@ VMLALDAVAQ)) ] "TARGET_HAVE_MVE" - "vmlaldava.%# %Q0, %R0, %q2, %q3" + "vmlaldava.%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4172,7 +4174,7 @@ VMLALDAVAXQ_S)) ] "TARGET_HAVE_MVE" - "vmlaldavax.s%# %Q0, %R0, %q2, %q3" + "vmlaldavax.s%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4188,7 +4190,7 @@ VMLALDAVQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vmlaldavt.%# %Q0, %R0, %q1, %q2" + "vpst\;vmlaldavt.%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4219,7 +4221,7 @@ VMLSLDAVAQ_S)) ] "TARGET_HAVE_MVE" - "vmlsldava.s%# %Q0, %R0, %q2, %q3" + "vmlsldava.s%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4235,7 +4237,7 @@ VMLSLDAVAXQ_S)) ] "TARGET_HAVE_MVE" - "vmlsldavax.s%# %Q0, %R0, %q2, %q3" + "vmlsldavax.s%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4251,7 +4253,7 @@ VMLSLDAVQ_P_S)) ] "TARGET_HAVE_MVE" - "vpst\;vmlsldavt.s%# %Q0, %R0, %q1, %q2" + "vpst\;vmlsldavt.s%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4267,7 +4269,7 @@ VMLSLDAVXQ_P_S)) ] "TARGET_HAVE_MVE" - "vpst\;vmlsldavxt.s%# %Q0, %R0, %q1, %q2" + "vpst\;vmlsldavxt.s%#\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -4344,7 +4346,7 @@ VMVNQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vmvnt.i%# %q0, %2" + "vpst\;vmvnt.i%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -4375,7 +4377,7 @@ VORRQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vorrt.i%# %q0, %2" + "vpst\;vorrt.i%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -4390,7 +4392,7 @@ VPSELQ_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpsel %q0, %q1, %q2" + "vpsel\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -4466,7 +4468,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VQRSHRNTQ_N)) ] "TARGET_HAVE_MVE" @@ -4482,7 +4484,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VQRSHRUNTQ_N_S)) ] "TARGET_HAVE_MVE" @@ -4566,7 +4568,7 @@ VREV32Q_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vrev32t.16 %q0, %q2" + "vpst\;vrev32t.16\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4582,7 +4584,7 @@ VREV32Q_M)) ] "TARGET_HAVE_MVE" - "vpst\;vrev32t.%# %q0, %q2" + "vpst\;vrev32t.%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4591,14 +4593,14 @@ ;; (define_insn "mve_vrev64q_m_f" [ - (set (match_operand:MVE_0 0 "s_register_operand" "=w") + (set (match_operand:MVE_0 0 "s_register_operand" "=&w") (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0") (match_operand:MVE_0 2 "s_register_operand" "w") (match_operand: 3 "vpr_register_operand" "Up")] VREV64Q_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vrev64t.%# %q0, %q2" + "vpst\;vrev64t.%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4614,7 +4616,7 @@ VRMLALDAVHAXQ_S)) ] "TARGET_HAVE_MVE" - "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3" + "vrmlaldavhax.s32\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4630,7 +4632,7 @@ VRMLALDAVHXQ_P_S)) ] "TARGET_HAVE_MVE" - "vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2" + "vpst\;vrmlaldavhxt.s32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4646,7 +4648,7 @@ VRMLSLDAVHAXQ_S)) ] "TARGET_HAVE_MVE" - "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3" + "vrmlsldavhax.s32\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4662,7 +4664,7 @@ VRMLSLDAVHQ_P_S)) ] "TARGET_HAVE_MVE" - "vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2" + "vpst\;vrmlsldavht.s32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4678,7 +4680,7 @@ VRMLSLDAVHXQ_P_S)) ] "TARGET_HAVE_MVE" - "vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2" + "vpst\;vrmlsldavhxt.s32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4770,7 +4772,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VRSHRNBQ_N)) ] "TARGET_HAVE_MVE" @@ -4786,7 +4788,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb")] + (match_operand:SI 3 "" "")] VRSHRNTQ_N)) ] "TARGET_HAVE_MVE" @@ -4903,7 +4905,7 @@ VREV16Q_M)) ] "TARGET_HAVE_MVE" - "vpst\;vrev16t.8 %q0, %q2" + "vpst\;vrev16t.8\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4935,7 +4937,7 @@ VRMLALDAVHQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vrmlaldavht.32 %Q0, %R0, %q1, %q2" + "vpst\;vrmlaldavht.32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4951,7 +4953,7 @@ VRMLSLDAVHAQ_S)) ] "TARGET_HAVE_MVE" - "vrmlsldavha.s32 %Q0, %R0, %q2, %q3" + "vrmlsldavha.s32\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4970,7 +4972,7 @@ "TARGET_HAVE_MVE" "vpst\;vabavt.%#\t%0, %q2, %q3" [(set_attr "type" "mve_move") -]) + (set_attr "length" "8")]) ;; ;; [vqshluq_m_n_s]) @@ -4980,13 +4982,14 @@ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") (match_operand:MVE_2 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_7" "Ra") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VQSHLUQ_M_N_S)) ] "TARGET_HAVE_MVE" "vpst\n\tvqshlut.s%#\t%q0, %q2, %3" - [(set_attr "type" "mve_move")]) + [(set_attr "type" "mve_move") + (set_attr "length" "8")]) ;; ;; [vshlq_m_s, vshlq_m_u]) @@ -5002,7 +5005,8 @@ ] "TARGET_HAVE_MVE" "vpst\;vshlt.%#\t%q0, %q2, %q3" - [(set_attr "type" "mve_move")]) + [(set_attr "type" "mve_move") + (set_attr "length" "8")]) ;; ;; [vsriq_m_n_s, vsriq_m_n_u]) @@ -5012,13 +5016,14 @@ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") (match_operand:MVE_2 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_selective_upto_8" "Rg") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VSRIQ_M_N)) ] "TARGET_HAVE_MVE" "vpst\;vsrit.%#\t%q0, %q2, %3" - [(set_attr "type" "mve_move")]) + [(set_attr "type" "mve_move") + (set_attr "length" "8")]) ;; ;; [vsubq_m_u, vsubq_m_s]) @@ -5034,7 +5039,8 @@ ] "TARGET_HAVE_MVE" "vpst\;vsubt.i%#\t%q0, %q2, %q3" - [(set_attr "type" "mve_move")]) + [(set_attr "type" "mve_move") + (set_attr "length" "8")]) ;; ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s]) @@ -5116,7 +5122,7 @@ VANDQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vandt %q0, %q2, %q3" + "vpst\;vandt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -5133,7 +5139,7 @@ VBICQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vbict %q0, %q2, %q3" + "vpst\;vbict\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -5201,7 +5207,7 @@ VEORQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;veort %q0, %q2, %q3" + "vpst\;veort\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -5456,7 +5462,7 @@ VORNQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vornt %q0, %q2, %q3" + "vpst\;vornt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -5473,7 +5479,7 @@ VORRQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vorrt %q0, %q2, %q3" + "vpst\;vorrt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -6119,7 +6125,7 @@ VMLALDAVAXQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vmlaldavaxt.%# %Q0, %R0, %q2, %q3" + "vpst\;vmlaldavaxt.%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -6131,7 +6137,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VQRSHRNBQ_M_N)) ] @@ -6148,7 +6154,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VQRSHRNTQ_M_N)) ] @@ -6216,7 +6222,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VRSHRNBQ_M_N)) ] @@ -6233,7 +6239,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VRSHRNTQ_M_N)) ] @@ -6454,7 +6460,7 @@ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:SI 3 "mve_imm_8" "Rb") + (match_operand:SI 3 "" "") (match_operand: 4 "vpr_register_operand" "Up")] VQRSHRUNBQ_M_N_S)) ] @@ -6645,7 +6651,7 @@ VANDQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vandt %q0, %q2, %q3" + "vpst\;vandt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -6662,7 +6668,7 @@ VBICQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vbict %q0, %q2, %q3" + "vpst\;vbict\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -6866,7 +6872,7 @@ VEORQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;veort %q0, %q2, %q3" + "vpst\;veort\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -7019,7 +7025,7 @@ VORNQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vornt %q0, %q2, %q3" + "vpst\;vornt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -7036,7 +7042,7 @@ VORRQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vorrt %q0, %q2, %q3" + "vpst\;vorrt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -7263,15 +7269,13 @@ } [(set_attr "length" "8")]) -;; -;; [vstrbq_p_s vstrbq_p_u] -;; (define_insn "mve_vstrbq_p_" [(set (match_operand: 0 "mve_memory_operand" "=Ux") - (unspec: [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand: 2 "vpr_register_operand" "Up")] - VSTRBQ)) - ] + (unspec: + [(match_operand:MVE_2 1 "s_register_operand" "w") + (match_operand: 2 "vpr_register_operand" "Up") + (match_dup 0)] + VSTRBQ))] "TARGET_HAVE_MVE" { rtx ops[2]; @@ -8070,10 +8074,11 @@ ;; (define_insn "mve_vstrhq_p_fv8hf" [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux") - (unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w") - (match_operand:V8BI 2 "vpr_register_operand" "Up")] - VSTRHQ_F)) - ] + (unspec:V8HI + [(match_operand:V8HF 1 "s_register_operand" "w") + (match_operand:V8BI 2 "vpr_register_operand" "Up") + (match_dup 0)] + VSTRHQ_F))] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" { rtx ops[2]; @@ -8090,8 +8095,10 @@ ;; (define_insn "mve_vstrhq_p_" [(set (match_operand: 0 "mve_memory_operand" "=Ux") - (unspec: [(match_operand:MVE_6 1 "s_register_operand" "w") - (match_operand: 2 "vpr_register_operand" "Up")] + (unspec: + [(match_operand:MVE_6 1 "s_register_operand" "w") + (match_operand: 2 "vpr_register_operand" "Up") + (match_dup 0)] VSTRHQ)) ] "TARGET_HAVE_MVE" @@ -8269,10 +8276,11 @@ ;; (define_insn "mve_vstrwq_p_fv4sf" [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux") - (unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w") - (match_operand: 2 "vpr_register_operand" "Up")] - VSTRWQ_F)) - ] + (unspec:V4SI + [(match_operand:V4SF 1 "s_register_operand" "w") + (match_operand: 2 "vpr_register_operand" "Up") + (match_dup 0)] + VSTRWQ_F))] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" { rtx ops[2]; @@ -8289,10 +8297,11 @@ ;; (define_insn "mve_vstrwq_p_v4si" [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux") - (unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w") - (match_operand:V4BI 2 "vpr_register_operand" "Up")] - VSTRWQ)) - ] + (unspec:V4SI + [(match_operand:V4SI 1 "s_register_operand" "w") + (match_operand:V4BI 2 "vpr_register_operand" "Up") + (match_dup 0)] + VSTRWQ))] "TARGET_HAVE_MVE" { rtx ops[2]; @@ -8476,7 +8485,7 @@ (match_operand:HI 3 "vpr_register_operand" "Up")] VSTRDSSOQ))] "TARGET_HAVE_MVE" - "vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]" + "vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]" [(set_attr "length" "8")]) ;; @@ -8505,7 +8514,7 @@ (match_operand:V2DI 2 "s_register_operand" "w")] VSTRDSSOQ))] "TARGET_HAVE_MVE" - "vstrd.64\t%q2, [%0, %q1, UXTW #3]" + "vstrd.64\t%q2, [%0, %q1, uxtw #3]" [(set_attr "length" "4")]) ;; @@ -8921,7 +8930,7 @@ (match_operand:MVE_2 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vadd.i%# %q0, %q1, %q2" + "vadd.i%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -8935,7 +8944,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vadd.f%# %q0, %q1, %q2" + "vadd.f%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -9036,7 +9045,7 @@ (minus:SI (match_dup 2) (match_operand:SI 4 "immediate_operand" "i")))] "TARGET_HAVE_MVE" - "vddup.u%# %q0, %1, %3") + "vddup.u%#\t%q0, %1, %3") ;; ;; [vddupq_m_n_u]) @@ -9072,7 +9081,7 @@ (minus:SI (match_dup 3) (match_operand:SI 6 "immediate_operand" "i")))] "TARGET_HAVE_MVE" - "vpst\;\tvddupt.u%#\t%q0, %2, %4" + "vpst\;vddupt.u%#\t%q0, %2, %4" [(set_attr "length""8")]) ;; @@ -9188,7 +9197,7 @@ VDWDUPQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;\tvdwdupt.u%#\t%q2, %3, %R4, %5" + "vpst\;vdwdupt.u%#\t%q2, %3, %R4, %5" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -9343,7 +9352,7 @@ [(match_operand:V4SI 1 "s_register_operand" "0") (match_operand:SI 2 "mve_vldrd_immediate" "Ri") (match_operand:V4SI 3 "s_register_operand" "w") - (match_operand:V4BI 4 "vpr_register_operand")] + (match_operand:V4BI 4 "vpr_register_operand" "Up")] VSTRWSBWBQ)) (set (match_operand:V4SI 0 "s_register_operand" "=w") (unspec:V4SI [(match_dup 1) (match_dup 2)] @@ -9392,9 +9401,9 @@ [(set (mem:BLK (scratch)) (unspec:BLK [(match_operand:V4SI 1 "s_register_operand" "0") - (match_operand:SI 2 "mve_vldrd_immediate" "Ri") + (match_operand:SI 2 "mve_vstrw_immediate" "Rl") (match_operand:V4SF 3 "s_register_operand" "w") - (match_operand:V4BI 4 "vpr_register_operand")] + (match_operand:V4BI 4 "vpr_register_operand" "Up")] VSTRWQSBWB_F)) (set (match_operand:V4SI 0 "s_register_operand" "=w") (unspec:V4SI [(match_dup 1) (match_dup 2)] @@ -9406,7 +9415,7 @@ ops[0] = operands[1]; ops[1] = operands[2]; ops[2] = operands[3]; - output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops); + output_asm_insn ("vpst\;vstrwt.u32\t%q2, [%q0, %1]!",ops); return ""; } [(set_attr "length" "8")]) @@ -9445,7 +9454,7 @@ [(match_operand:V2DI 1 "s_register_operand" "0") (match_operand:SI 2 "mve_vldrd_immediate" "Ri") (match_operand:V2DI 3 "s_register_operand" "w") - (match_operand:HI 4 "vpr_register_operand")] + (match_operand:HI 4 "vpr_register_operand" "Up")] VSTRDSBWBQ)) (set (match_operand:V2DI 0 "s_register_operand" "=w") (unspec:V2DI [(match_dup 1) (match_dup 2)] @@ -9457,7 +9466,7 @@ ops[0] = operands[1]; ops[1] = operands[2]; ops[2] = operands[3]; - output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops); + output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops); return ""; } [(set_attr "length" "8")]) @@ -9766,7 +9775,7 @@ (define_insn "get_fpscr_nzcvqc" [(set (match_operand:SI 0 "register_operand" "=r") - (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] + (unspec_volatile:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] "TARGET_HAVE_MVE" "vmrs\\t%0, FPSCR_nzcvqc" [(set_attr "type" "mve_move")]) @@ -9952,7 +9961,7 @@ ;; [vst2q]) ;; (define_insn "mve_vst2q" - [(set (match_operand:OI 0 "neon_struct_operand" "=Um") + [(set (match_operand:OI 0 "mve_struct_operand" "=Ug") (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] VST2Q)) @@ -9981,7 +9990,7 @@ ;; (define_insn "mve_vld2q" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") + (unspec:OI [(match_operand:OI 1 "mve_struct_operand" "Ug") (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] VLD2Q)) ] @@ -10009,7 +10018,7 @@ ;; (define_insn "mve_vld4q" [(set (match_operand:XI 0 "s_register_operand" "=w") - (unspec:XI [(match_operand:XI 1 "neon_struct_operand" "Um") + (unspec:XI [(match_operand:XI 1 "mve_struct_operand" "Ug") (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] VLD4Q)) ] @@ -10150,7 +10159,7 @@ if (elt == 0) return "vmov\t%e0, %Q1, %R1"; else - return "vmov\t%f0, %J1, %K1"; + return "vmov\t%f0, %Q1, %R1"; } [(set_attr "type" "mve_move")]) @@ -10462,7 +10471,7 @@ ) (define_insn "*movmisalign_mve_store" - [(set (match_operand:MVE_VLD_ST 0 "neon_permissive_struct_operand" "=Ux") + [(set (match_operand:MVE_VLD_ST 0 "mve_memory_operand" "=Ux") (unspec:MVE_VLD_ST [(match_operand:MVE_VLD_ST 1 "s_register_operand" " w")] UNSPEC_MISALIGNED_ACCESS))] "((TARGET_HAVE_MVE && VALID_MVE_SI_MODE (mode)) @@ -10475,7 +10484,7 @@ (define_insn "*movmisalign_mve_load" [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w") - (unspec:MVE_VLD_ST [(match_operand:MVE_VLD_ST 1 "neon_permissive_struct_operand" " Ux")] + (unspec:MVE_VLD_ST [(match_operand:MVE_VLD_ST 1 "mve_memory_operand" " Ux")] UNSPEC_MISALIGNED_ACCESS))] "((TARGET_HAVE_MVE && VALID_MVE_SI_MODE (mode)) || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (mode))) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 275bcc1435e24..b828fef9b71ca 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -504,11 +504,11 @@ Enabled with -funsafe-math-optimizations -freciprocal-math and disabled for -Os since it increases code size . */ -(define_expand "div3" +(define_expand "div3" [(set (match_operand:VCVTF 0 "s_register_operand") (div:VCVTF (match_operand:VCVTF 1 "s_register_operand") (match_operand:VCVTF 2 "s_register_operand")))] - "TARGET_NEON && !optimize_size + "ARM_HAVE_NEON__ARITH && !optimize_size && flag_reciprocal_math" { rtx rec = gen_reg_rtx (mode); diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index aab5a91ad4ddc..b6eb12632d415 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -73,13 +73,13 @@ (define_predicate "mve_imm_selective_upto_8" (match_test "satisfies_constraint_Rg (op)")) -;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE. -(define_constraint "Ri" - "@internal In Thumb-2 state a constant is multiple of 8 and in range - of -/+ 1016 for MVE" - (and (match_code "const_int") - (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016) - && ((ival % 8) == 0)"))) +;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE. +(define_predicate "mve_vldrd_immediate" + (match_test "satisfies_constraint_Ri (op)")) + +;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE. +(define_predicate "mve_vstrw_immediate" + (match_test "satisfies_constraint_Rl (op)")) ; Predicate for stack protector guard's address in ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns @@ -876,6 +876,10 @@ (and (match_code "mem") (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2, true)"))) +(define_predicate "mve_struct_operand" + (and (match_code "mem") + (match_test "TARGET_HAVE_MVE && mve_struct_mem_operand (op)"))) + (define_predicate "neon_permissive_struct_operand" (and (match_code "mem") (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2, false)"))) diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index fd878cba22d81..1fd68f3ac43c6 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -280,29 +280,81 @@ DONE; }) -(define_expand "movmisalign" - [(set (match_operand:VDQ 0 "neon_perm_struct_or_reg_operand") - (unspec:VDQ [(match_operand:VDQ 1 "neon_perm_struct_or_reg_operand")] +(define_expand "@movmisalign" + [(set (match_operand:VDQ 0 "nonimmediate_operand") + (unspec:VDQ [(match_operand:VDQ 1 "general_operand")] UNSPEC_MISALIGNED_ACCESS))] "ARM_HAVE__LDST && !BYTES_BIG_ENDIAN && unaligned_access && !TARGET_REALLY_IWMMXT" { - rtx adjust_mem; - /* This pattern is not permitted to fail during expansion: if both arguments - are non-registers (e.g. memory := constant, which can be created by the - auto-vectorizer), force operand 1 into a register. */ - if (!s_register_operand (operands[0], mode) - && !s_register_operand (operands[1], mode)) - operands[1] = force_reg (mode, operands[1]); - - if (s_register_operand (operands[0], mode)) - adjust_mem = operands[1]; - else - adjust_mem = operands[0]; - - /* Legitimize address. */ - if (!neon_vector_mem_operand (adjust_mem, 2, true)) - XEXP (adjust_mem, 0) = force_reg (Pmode, XEXP (adjust_mem, 0)); + rtx *memloc; + bool for_store = false; + /* This pattern is not permitted to fail during expansion: if both arguments + are non-registers (e.g. memory := constant, which can be created by the + auto-vectorizer), force operand 1 into a register. */ + if (!s_register_operand (operands[0], mode) + && !s_register_operand (operands[1], mode)) + operands[1] = force_reg (mode, operands[1]); + + if (s_register_operand (operands[0], mode)) + memloc = &operands[1]; + else + { + memloc = &operands[0]; + for_store = true; + } + + /* For MVE, vector loads/stores must be aligned to the element size. If the + alignment is less than that convert the load/store to a suitable mode. */ + if (TARGET_HAVE_MVE + && (MEM_ALIGN (*memloc) + < GET_MODE_ALIGNMENT (GET_MODE_INNER (mode)))) + { + scalar_mode new_smode; + switch (MEM_ALIGN (*memloc)) + { + case 64: + case 32: + new_smode = SImode; + break; + case 16: + new_smode = HImode; + break; + default: + new_smode = QImode; + break; + } + machine_mode new_mode + = mode_for_vector (new_smode, + GET_MODE_SIZE (mode) + / GET_MODE_SIZE (new_smode)).require (); + rtx new_mem = adjust_address (*memloc, new_mode, 0); + + if (!for_store) + { + rtx reg = gen_reg_rtx (new_mode); + emit_insn (gen_movmisalign (new_mode, reg, new_mem)); + emit_move_insn (operands[0], gen_lowpart (mode, reg)); + DONE; + } + emit_insn (gen_movmisalign (new_mode, new_mem, + gen_lowpart (new_mode, operands[1]))); + DONE; + } + + /* Legitimize address. */ + if ((TARGET_HAVE_MVE + && !mve_vector_mem_operand (mode, XEXP (*memloc, 0), false)) + || (!TARGET_HAVE_MVE + && !neon_vector_mem_operand (*memloc, 2, false))) + { + rtx new_mem + = replace_equiv_address (*memloc, + force_reg (Pmode, XEXP (*memloc, 0)), + false); + gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc)); + *memloc = new_mem; + } }) (define_insn "mve_vshlq_" diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index d0f423cc3c5e7..31e5818d4e379 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -105,9 +105,9 @@ case 8: return "vmov%?.f32\t%0, %1\t%@ int"; case 9: - return "vmsr%?\t P0, %1\t@ movhi"; + return "vmsr%?\tp0, %1\t@ movhi"; case 10: - return "vmrs%?\t %0, P0\t@ movhi"; + return "vmrs%?\t%0, p0\t@ movhi"; default: gcc_unreachable (); } @@ -209,9 +209,9 @@ case 8: return "vmov%?.f32\t%0, %1\t%@ int"; case 9: - return "vmsr%?\t P0, %1\t%@ movhi"; + return "vmsr%?\tp0, %1\t%@ movhi"; case 10: - return "vmrs%?\t%0, P0\t%@ movhi"; + return "vmrs%?\t%0, p0\t%@ movhi"; default: gcc_unreachable (); } @@ -312,9 +312,9 @@ case 12: case 13: return output_move_vfp (operands); case 14: - return \"vmsr\\t P0, %1\"; + return \"vmsr\\tp0, %1\"; case 15: - return \"vmrs\\t %0, P0\"; + return \"vmrs\\t%0, p0\"; case 16: return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\"; case 17: @@ -2138,7 +2138,7 @@ (define_insn_and_split "no_literal_pool_df_immediate" [(set (match_operand:DF 0 "s_register_operand" "=w") (match_operand:DF 1 "const_double_operand" "F")) - (clobber (match_operand:DF 2 "s_register_operand" "=r"))] + (clobber (match_operand:DI 2 "s_register_operand" "=r"))] "arm_disable_literal_pool && TARGET_VFP_BASE && !arm_const_double_rtx (operands[1]) @@ -2153,8 +2153,9 @@ unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32); ival |= (zext_hwi (buf[1 - order], 32) << 32); rtx cst = gen_int_mode (ival, DImode); - emit_move_insn (simplify_gen_subreg (DImode, operands[2], DFmode, 0), cst); - emit_move_insn (operands[0], operands[2]); + emit_move_insn (operands[2], cst); + emit_move_insn (operands[0], + simplify_gen_subreg (DFmode, operands[2], DImode, 0)); DONE; } ) diff --git a/gcc/config/avr/avr-arch.h b/gcc/config/avr/avr-arch.h index 7b25355938823..26aa78da6dc87 100644 --- a/gcc/config/avr/avr-arch.h +++ b/gcc/config/avr/avr-arch.h @@ -195,6 +195,7 @@ typedef struct extern const avr_arch_t avr_arch_types[]; extern const avr_arch_t *avr_arch; +extern const avr_arch_t *avr_get_parch (const char *mcu); extern const avr_mcu_t avr_mcu_types[]; diff --git a/gcc/config/avr/avr-devices.cc b/gcc/config/avr/avr-devices.cc index aa284217f50c1..9762ff86f7db0 100644 --- a/gcc/config/avr/avr-devices.cc +++ b/gcc/config/avr/avr-devices.cc @@ -153,4 +153,20 @@ avr_inform_core_architectures (void) free (archs); } + +/* When MCU names a core arch like "avr5", then return a pointer to the + respective entry in avr_arch_types[]. Otherwise, return NULL. */ + +const avr_arch_t * +avr_get_parch (const char *mcu) +{ + for (size_t i = 0; i < ARRAY_SIZE (avr_arch_types); ++i) + { + if (strcmp (mcu, avr_arch_types[i].name) == 0) + return & avr_arch_types[i]; + } + + return NULL; +} + #endif // IN_GEN_AVR_MMCU_TEXI diff --git a/gcc/config/avr/avr-dimode.md b/gcc/config/avr/avr-dimode.md index 6e491336915d2..78a7a745d341d 100644 --- a/gcc/config/avr/avr-dimode.md +++ b/gcc/config/avr/avr-dimode.md @@ -62,8 +62,8 @@ ;; "addta3" "adduta3" (define_expand "add3" [(parallel [(match_operand:ALL8 0 "general_operand" "") - (match_operand:ALL8 1 "general_operand" "") - (match_operand:ALL8 2 "general_operand" "")])] + (match_operand:ALL8 1 "nop_general_operand") + (match_operand:ALL8 2 "nop_general_operand")])] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (mode, ACC_A); @@ -178,8 +178,8 @@ ;; "subta3" "subuta3" (define_expand "sub3" [(parallel [(match_operand:ALL8 0 "general_operand" "") - (match_operand:ALL8 1 "general_operand" "") - (match_operand:ALL8 2 "general_operand" "")])] + (match_operand:ALL8 1 "nop_general_operand") + (match_operand:ALL8 2 "nop_general_operand")])] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (mode, ACC_A); @@ -259,8 +259,8 @@ (define_expand "3" [(set (match_operand:ALL8S 0 "general_operand" "") - (ss_addsub:ALL8S (match_operand:ALL8S 1 "general_operand" "") - (match_operand:ALL8S 2 "general_operand" "")))] + (ss_addsub:ALL8S (match_operand:ALL8S 1 "nop_general_operand") + (match_operand:ALL8S 2 "nop_general_operand")))] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (mode, ACC_A); @@ -332,8 +332,8 @@ (define_expand "3" [(set (match_operand:ALL8U 0 "general_operand" "") - (us_addsub:ALL8U (match_operand:ALL8U 1 "general_operand" "") - (match_operand:ALL8U 2 "general_operand" "")))] + (us_addsub:ALL8U (match_operand:ALL8U 1 "nop_general_operand") + (match_operand:ALL8U 2 "nop_general_operand")))] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (mode, ACC_A); @@ -405,7 +405,7 @@ (define_expand "negdi2" [(parallel [(match_operand:DI 0 "general_operand" "") - (match_operand:DI 1 "general_operand" "")])] + (match_operand:DI 1 "nop_general_operand")])] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (DImode, ACC_A); @@ -455,12 +455,18 @@ (define_expand "cbranch4" [(set (pc) (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand:ALL8 1 "register_operand" "") - (match_operand:ALL8 2 "nonmemory_operand" "")]) - (label_ref (match_operand 3 "" "")) - (pc)))] + [(match_operand:ALL8 1 "register_operand") + (match_operand:ALL8 2 "nonmemory_operand")]) + (label_ref (match_operand 3)) + (pc)))] "avr_have_dimode" { + int icode = (int) GET_CODE (operands[0]); + + targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); + operands[0] = gen_rtx_fmt_ee ((enum rtx_code) icode, + VOIDmode, operands[1], operands[2]); + rtx acc_a = gen_rtx_REG (mode, ACC_A); avr_fix_inputs (operands, 1 << 2, regmask (mode, ACC_A)); @@ -490,8 +496,8 @@ (if_then_else (match_operator 0 "ordered_comparison_operator" [(reg:ALL8 ACC_A) (reg:ALL8 ACC_B)]) - (label_ref (match_operand 1 "" "")) - (pc)))] + (label_ref (match_operand 1)) + (pc)))] "avr_have_dimode" "#" "&& reload_completed" @@ -544,8 +550,8 @@ (if_then_else (match_operator 0 "ordered_comparison_operator" [(reg:ALL8 ACC_A) (match_operand:ALL8 1 "const_operand" "n Ynn")]) - (label_ref (match_operand 2 "" "")) - (pc))) + (label_ref (match_operand 2 "" "")) + (pc))) (clobber (match_scratch:QI 3 "=&d"))] "avr_have_dimode && !s8_operand (operands[1], VOIDmode)" @@ -596,8 +602,8 @@ ;; "ashluta3" "ashruta3" "lshruta3" "rotluta3" (define_expand "3" [(parallel [(match_operand:ALL8 0 "general_operand" "") - (di_shifts:ALL8 (match_operand:ALL8 1 "general_operand" "") - (match_operand:QI 2 "general_operand" ""))])] + (di_shifts:ALL8 (match_operand:ALL8 1 "nop_general_operand") + (match_operand:QI 2 "nop_general_operand"))])] "avr_have_dimode" { rtx acc_a = gen_rtx_REG (mode, ACC_A); @@ -642,8 +648,8 @@ ;; "mulsidi3" (define_expand "mulsidi3" [(parallel [(match_operand:DI 0 "register_operand" "") - (match_operand:SI 1 "general_operand" "") - (match_operand:SI 2 "general_operand" "") + (match_operand:SI 1 "nop_general_operand") + (match_operand:SI 2 "nop_general_operand") ;; Just to mention the iterator (clobber (any_extend:SI (match_dup 1)))])] "avr_have_dimode diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def index 1e12ab3017047..876fecd8aa115 100644 --- a/gcc/config/avr/avr-mcus.def +++ b/gcc/config/avr/avr-mcus.def @@ -138,9 +138,10 @@ AVR_MCU ("attiny167", ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny167__", AVR_MCU ("attiny1634", ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny1634__", 0x0100, 0x0, 0x4000, 0) /* Enhanced, <= 8K. */ AVR_MCU ("avr4", ARCH_AVR4, AVR_ISA_NONE, NULL, 0x0060, 0x0, 0x2000, 0) +AVR_MCU ("ata5795", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA5795__", 0x0100, 0x0, 0x2000, 0) AVR_MCU ("ata6285", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6285__", 0x0100, 0x0, 0x2000, 0) AVR_MCU ("ata6286", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6286__", 0x0100, 0x0, 0x2000, 0) -AVR_MCU ("ata6289", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6289__", 0x0100, 0x0, 0x2000, 0) +AVR_MCU ("ata6289", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6289__", 0x0100, 0x0, 0x2000, 0) AVR_MCU ("ata6612c", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6612C__", 0x0100, 0x0, 0x2000, 0) AVR_MCU ("atmega8", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATmega8__", 0x0060, 0x0, 0x2000, 0) AVR_MCU ("atmega8a", ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATmega8A__", 0x0060, 0x0, 0x2000, 0) @@ -165,13 +166,15 @@ AVR_MCU ("at90pwm3b", ARCH_AVR4, AVR_ISA_NONE, "__AVR_AT90PWM3B__", AVR_MCU ("at90pwm81", ARCH_AVR4, AVR_ISA_NONE, "__AVR_AT90PWM81__", 0x0100, 0x0, 0x2000, 0) /* Enhanced, > 8K, <= 64K. */ AVR_MCU ("avr5", ARCH_AVR5, AVR_ISA_NONE, NULL, 0x0060, 0x0, 0x4000, 0) -AVR_MCU ("ata5702m322", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__", 0x0200, 0x0, 0x10000, 0) +AVR_MCU ("ata5700m322", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5700M322__", 0x0200, 0x8000, 0x10000, 0) +AVR_MCU ("ata5702m322", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__", 0x0200, 0x8000, 0x10000, 0) AVR_MCU ("ata5782", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5782__", 0x0200, 0x8000, 0xd000, 0) +AVR_MCU ("ata5787", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5787__", 0x0200, 0x8000, 0xd200, 0) AVR_MCU ("ata5790", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790__", 0x0100, 0x0, 0x4000, 0) AVR_MCU ("ata5790n", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790N__", 0x0100, 0x0, 0x4000, 0) AVR_MCU ("ata5791", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5791__", 0x0100, 0x0, 0x4000, 0) -AVR_MCU ("ata5795", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5795__", 0x0100, 0x0, 0x2000, 0) AVR_MCU ("ata5831", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5831__", 0x0200, 0x8000, 0xd000, 0) +AVR_MCU ("ata5835", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5835__", 0x0200, 0x8000, 0xd200, 0) AVR_MCU ("ata6613c", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6613C__", 0x0100, 0x0, 0x4000, 0) AVR_MCU ("ata6614q", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6614Q__", 0x0100, 0x0, 0x8000, 0) AVR_MCU ("ata8210", ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA8210__", 0x0200, 0x8000, 0xd000, 0) @@ -291,7 +294,7 @@ AVR_MCU ("atmega2560", ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2560__", AVR_MCU ("atmega2561", ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2561__", 0x0200, 0x0, 0x40000, 0) AVR_MCU ("atmega256rfr2", ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega256RFR2__", 0x0200, 0x0, 0x40000, 0) AVR_MCU ("atmega2564rfr2", ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2564RFR2__", 0x0200, 0x0, 0x40000, 0) -/* Xmega, 16K <= Flash < 64K, RAM <= 64K */ +/* Xmega, 16K <= Flash <= 64K, RAM <= 64K */ AVR_MCU ("avrxmega2", ARCH_AVRXMEGA2, AVR_ISA_NONE, NULL, 0x2000, 0x0, 0x9000, 0) AVR_MCU ("atxmega8e5", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega8E5__", 0x2000, 0x0, 0x2800, 0) AVR_MCU ("atxmega16a4", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega16A4__", 0x2000, 0x0, 0x5000, 0) @@ -306,6 +309,23 @@ AVR_MCU ("atxmega16c4", ARCH_AVRXMEGA2, AVR_ISA_RMW, "__AVR_ATxmega16C4__" AVR_MCU ("atxmega32a4u", ARCH_AVRXMEGA2, AVR_ISA_RMW, "__AVR_ATxmega32A4U__", 0x2000, 0x0, 0x9000, 0) AVR_MCU ("atxmega32c4", ARCH_AVRXMEGA2, AVR_ISA_RMW, "__AVR_ATxmega32C4__", 0x2000, 0x0, 0x9000, 0) AVR_MCU ("atxmega32e5", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega32E5__", 0x2000, 0x0, 0x9000, 0) +AVR_MCU ("avr64da28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA28__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64da32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA32__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64da48", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA48__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64da64", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA64__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64db28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB28__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64db32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB32__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64db48", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB48__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64db64", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB64__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd14", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD14__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd20", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD20__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD28__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD32__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64du28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU28__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64du32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU32__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA28__", 0x6800, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA32__", 0x6800, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea48", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA48__", 0x6800, 0x0, 0x10000, 0) /* Xmega, Flash + RAM < 64K, flash visible in RAM address space */ AVR_MCU ("avrxmega3", ARCH_AVRXMEGA3, AVR_ISA_NONE, NULL, 0x3f00, 0x0, 0x8000, 0) AVR_MCU ("attiny202", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny202__", 0x3f80, 0x0, 0x800, 0x8000) @@ -324,6 +344,7 @@ AVR_MCU ("attiny214", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny214__", AVR_MCU ("attiny412", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny412__", 0x3f00, 0x0, 0x1000, 0x8000) AVR_MCU ("attiny414", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny414__", 0x3f00, 0x0, 0x1000, 0x8000) AVR_MCU ("attiny416", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416__", 0x3f00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny416auto", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416AUTO__", 0x3f00, 0x0, 0x1000, 0x8000) AVR_MCU ("attiny417", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny417__", 0x3f00, 0x0, 0x1000, 0x8000) AVR_MCU ("attiny814", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny814__", 0x3e00, 0x0, 0x2000, 0x8000) AVR_MCU ("attiny816", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny816__", 0x3e00, 0x0, 0x2000, 0x8000) @@ -334,14 +355,58 @@ AVR_MCU ("attiny1617", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1617__" AVR_MCU ("attiny3214", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3214__", 0x3800, 0x0, 0x8000, 0x8000) AVR_MCU ("attiny3216", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3216__", 0x3800, 0x0, 0x8000, 0x8000) AVR_MCU ("attiny3217", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3217__", 0x3800, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny424", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny424__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny426", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny426__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny427", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny427__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny824", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny824__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny826", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny826__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny827", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny827__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny1624", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1624__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny1626", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1626__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny1627", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1627__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny3224", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3224__", 0x3400, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny3226", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3226__", 0x3400, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny3227", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3227__", 0x3400, 0x0, 0x8000, 0x8000) AVR_MCU ("atmega808", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__", 0x3c00, 0x0, 0x2000, 0x4000) AVR_MCU ("atmega809", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__", 0x3c00, 0x0, 0x2000, 0x4000) AVR_MCU ("atmega1608", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega1608__", 0x3800, 0x0, 0x4000, 0x4000) AVR_MCU ("atmega1609", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega1609__", 0x3800, 0x0, 0x4000, 0x4000) -AVR_MCU ("atmega3208", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3208__", 0x3800, 0x0, 0x8000, 0x4000) -AVR_MCU ("atmega3209", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3209__", 0x3800, 0x0, 0x8000, 0x4000) +AVR_MCU ("atmega3208", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3208__", 0x3000, 0x0, 0x8000, 0x4000) +AVR_MCU ("atmega3209", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3209__", 0x3000, 0x0, 0x8000, 0x4000) AVR_MCU ("atmega4808", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega4808__", 0x2800, 0x0, 0xc000, 0x4000) AVR_MCU ("atmega4809", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega4809__", 0x2800, 0x0, 0xc000, 0x4000) +AVR_MCU ("avr16dd14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD14__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD20__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD28__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD32__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16du14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DU14__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16du20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DU20__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16du28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DU28__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16du32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DU32__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr32da28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32da32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA32__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32da48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA48__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32db28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32db32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB32__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32db48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB48__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD14__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD20__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD32__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32du14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DU14__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32du20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DU20__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32du28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DU28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32du32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DU32__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr16eb14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EB14__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16eb20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EB20__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16eb28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EB28__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16eb32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EB32__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16ea28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EA28__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16ea32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EA32__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16ea48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16EA48__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr32ea28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32EA28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32ea32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32EA32__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32ea48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32EA48__", 0x7000, 0x0, 0x8000, 0x8000) /* Xmega, 64K < Flash <= 128K, RAM <= 64K */ AVR_MCU ("avrxmega4", ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL, 0x2000, 0x0, 0x11000, 0) AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__", 0x2000, 0x0, 0x11000, 0) @@ -352,6 +417,14 @@ AVR_MCU ("atxmega64b1", ARCH_AVRXMEGA4, AVR_ISA_RMW, "__AVR_ATxmega64B1__" AVR_MCU ("atxmega64b3", ARCH_AVRXMEGA4, AVR_ISA_RMW, "__AVR_ATxmega64B3__", 0x2000, 0x0, 0x11000, 0) AVR_MCU ("atxmega64c3", ARCH_AVRXMEGA4, AVR_ISA_RMW, "__AVR_ATxmega64C3__", 0x2000, 0x0, 0x11000, 0) AVR_MCU ("atxmega64d4", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64D4__", 0x2000, 0x0, 0x11000, 0) +AVR_MCU ("avr128da28", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA28__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128da32", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA32__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128da48", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA48__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128da64", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA64__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128db28", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB28__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128db32", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB32__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128db48", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB48__", 0x4000, 0x0, 0x20000, 0) +AVR_MCU ("avr128db64", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB64__", 0x4000, 0x0, 0x20000, 0) /* Xmega, 64K < Flash <= 128K, RAM > 64K */ AVR_MCU ("avrxmega5", ARCH_AVRXMEGA5, AVR_ISA_NONE, NULL, 0x2000, 0x0, 0x11000, 0) AVR_MCU ("atxmega64a1", ARCH_AVRXMEGA5, AVR_ISA_NONE, "__AVR_ATxmega64A1__", 0x2000, 0x0, 0x11000, 0) @@ -388,6 +461,8 @@ AVR_MCU ("attiny4", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny4__", AVR_MCU ("attiny5", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny5__", 0x0040, 0x0, 0x200, 0) AVR_MCU ("attiny9", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny9__", 0x0040, 0x0, 0x400, 0) AVR_MCU ("attiny10", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny10__", 0x0040, 0x0, 0x400, 0) +AVR_MCU ("attiny102", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny102__", 0x0040, 0x0, 0x400, 0) +AVR_MCU ("attiny104", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny104__", 0x0040, 0x0, 0x400, 0) AVR_MCU ("attiny20", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny20__", 0x0040, 0x0, 0x800, 0) AVR_MCU ("attiny40", ARCH_AVRTINY, AVR_ISA_NONE, "__AVR_ATtiny40__", 0x0040, 0x0, 0x1000, 0) /* Assembler only. */ diff --git a/gcc/config/avr/avr-passes.def b/gcc/config/avr/avr-passes.def index d863015109074..ba0c3f109729b 100644 --- a/gcc/config/avr/avr-passes.def +++ b/gcc/config/avr/avr-passes.def @@ -43,3 +43,23 @@ INSERT_PASS_BEFORE (pass_free_cfg, 1, avr_pass_recompute_notes); insns withaout any insns in between. */ INSERT_PASS_AFTER (pass_expand, 1, avr_pass_casesi); + +/* If-else decision trees generated for switch / case may produce sequences + like + + SREG = compare (reg, val); + if (SREG == 0) goto label1; + SREG = compare (reg, 1 + val); + if (SREG >= 0) goto label2; + + which can be optimized to + + SREG = compare (reg, val); + if (SREG == 0) goto label1; + if (SREG >= 0) goto label2; + + The optimal place for such a pass would be directly after expand, but + it's not possible for a jump insn to target more than one code label. + Hence, run a mini pass right before split2 which introduces REG_CC. */ + +INSERT_PASS_BEFORE (pass_split_after_reload, 1, avr_pass_ifelse); diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index 6023b33bcfe80..e164967038f49 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -58,6 +58,8 @@ extern const char *ret_cond_branch (rtx x, int len, int reverse); extern const char *avr_out_movpsi (rtx_insn *, rtx*, int*); extern const char *avr_out_sign_extend (rtx_insn *, rtx*, int*); extern const char *avr_out_insert_notbit (rtx_insn *, rtx*, rtx, int*); +extern const char *avr_out_plus_set_ZN (rtx*, int*); +extern const char *avr_out_cmp_ext (rtx*, enum rtx_code, int*); extern const char *ashlqi3_out (rtx_insn *insn, rtx operands[], int *len); extern const char *ashlhi3_out (rtx_insn *insn, rtx operands[], int *len); @@ -112,8 +114,6 @@ extern int jump_over_one_insn_p (rtx_insn *insn, rtx dest); extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand, int num_operands); -extern int avr_simplify_comparison_p (machine_mode mode, - RTX_CODE op, rtx x); extern RTX_CODE avr_normalize_condition (RTX_CODE condition); extern void out_shift_with_cnt (const char *templ, rtx_insn *insn, rtx operands[], int *len, int t_len); @@ -145,6 +145,7 @@ extern rtx tmp_reg_rtx; extern rtx zero_reg_rtx; extern rtx all_regs_rtx[32]; extern rtx rampz_rtx; +extern rtx cc_reg_rtx; #endif /* RTX_CODE */ @@ -160,6 +161,7 @@ class rtl_opt_pass; extern rtl_opt_pass *make_avr_pass_pre_proep (gcc::context *); extern rtl_opt_pass *make_avr_pass_recompute_notes (gcc::context *); extern rtl_opt_pass *make_avr_pass_casesi (gcc::context *); +extern rtl_opt_pass *make_avr_pass_ifelse (gcc::context *); /* From avr-log.cc */ diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc index 4ed390e4cf9ec..5d63c7153d6e5 100644 --- a/gcc/config/avr/avr.cc +++ b/gcc/config/avr/avr.cc @@ -359,6 +359,41 @@ class avr_pass_casesi : public rtl_opt_pass } }; // avr_pass_casesi + +static const pass_data avr_pass_data_ifelse = +{ + RTL_PASS, // type + "", // name (will be patched) + OPTGROUP_NONE, // optinfo_flags + TV_DF_SCAN, // tv_id + 0, // properties_required + 0, // properties_provided + 0, // properties_destroyed + 0, // todo_flags_start + TODO_df_finish | TODO_df_verify // todo_flags_finish +}; + +class avr_pass_ifelse : public rtl_opt_pass +{ +public: + avr_pass_ifelse (gcc::context *ctxt, const char *name) + : rtl_opt_pass (avr_pass_data_ifelse, ctxt) + { + this->name = name; + } + + void avr_rest_of_handle_ifelse (function*); + + virtual bool gate (function*) { return optimize > 0; } + + virtual unsigned int execute (function *func) + { + avr_rest_of_handle_ifelse (func); + + return 0; + } +}; // avr_pass_ifelse + } // anon namespace rtl_opt_pass* @@ -373,6 +408,12 @@ make_avr_pass_casesi (gcc::context *ctxt) return new avr_pass_casesi (ctxt, "avr-casesi"); } +rtl_opt_pass* +make_avr_pass_ifelse (gcc::context *ctxt) +{ + return new avr_pass_ifelse (ctxt, "avr-ifelse"); +} + /* Make one parallel insn with all the patterns from insns i[0]..i[5]. */ @@ -686,6 +727,304 @@ avr_pass_casesi::avr_rest_of_handle_casesi (function *func) } +/* A helper for the next method. Suppose we have two conditional branches + + if (reg xval1) goto label1; + if (reg xval2) goto label2; + + If the second comparison is redundant and there is a code such + that the sequence can be performed as + + REG_CC = compare (reg, xval1); + if (REG_CC 0) goto label1; + if (REG_CC 0) goto label2; + + then return . Otherwise, return UNKNOWN. + xval1 and xval2 are CONST_INT, and mode is the scalar int mode in which + the comparison will be carried out. reverse_cond1 can be set to reverse + condition cond1. This is useful if the second comparison does not follow + the first one, but is located after label1 like in: + + if (reg xval1) goto label1; + ... + label1: + if (reg xval2) goto label2; */ + +static enum rtx_code +avr_redundant_compare (enum rtx_code cond1, rtx xval1, + enum rtx_code cond2, rtx xval2, + machine_mode mode, bool reverse_cond1) +{ + HOST_WIDE_INT ival1 = INTVAL (xval1); + HOST_WIDE_INT ival2 = INTVAL (xval2); + + unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode); + unsigned HOST_WIDE_INT uval1 = mask & UINTVAL (xval1); + unsigned HOST_WIDE_INT uval2 = mask & UINTVAL (xval2); + + if (reverse_cond1) + cond1 = reverse_condition (cond1); + + if (cond1 == EQ) + { + //////////////////////////////////////////////// + // A sequence like + // if (reg == val) goto label1; + // if (reg > val) goto label2; + // can be re-written using the same, simple comparison like in: + // REG_CC = compare (reg, val) + // if (REG_CC == 0) goto label1; + // if (REG_CC >= 0) goto label2; + if (ival1 == ival2 + && (cond2 == GT || cond2 == GTU)) + return avr_normalize_condition (cond2); + + // Similar, but the input sequence is like + // if (reg == val) goto label1; + // if (reg >= val) goto label2; + if (ival1 == ival2 + && (cond2 == GE || cond2 == GEU)) + return cond2; + + // Similar, but the input sequence is like + // if (reg == val) goto label1; + // if (reg >= val + 1) goto label2; + if ((cond2 == GE && ival2 == 1 + ival1) + || (cond2 == GEU && uval2 == 1 + uval1)) + return cond2; + + // Similar, but the input sequence is like + // if (reg == val) goto label1; + // if (reg > val - 1) goto label2; + if ((cond2 == GT && ival2 == ival1 - 1) + || (cond2 == GTU && uval2 == uval1 - 1)) + return avr_normalize_condition (cond2); + + ///////////////////////////////////////////////////////// + // A sequence like + // if (reg == val) goto label1; + // if (reg < 1 + val) goto label2; + // can be re-written as + // REG_CC = compare (reg, val) + // if (REG_CC == 0) goto label1; + // if (REG_CC < 0) goto label2; + if ((cond2 == LT && ival2 == 1 + ival1) + || (cond2 == LTU && uval2 == 1 + uval1)) + return cond2; + + // Similar, but with an input sequence like + // if (reg == val) goto label1; + // if (reg <= val) goto label2; + if (ival1 == ival2 + && (cond2 == LE || cond2 == LEU)) + return avr_normalize_condition (cond2); + + // Similar, but with an input sequence like + // if (reg == val) goto label1; + // if (reg < val) goto label2; + if (ival1 == ival2 + && (cond2 == LT || cond2 == LTU)) + return cond2; + + // Similar, but with an input sequence like + // if (reg == val) goto label1; + // if (reg <= val - 1) goto label2; + if ((cond2 == LE && ival2 == ival1 - 1) + || (cond2 == LEU && uval2 == uval1 - 1)) + return avr_normalize_condition (cond2); + + } // cond1 == EQ + + return UNKNOWN; +} + + +/* If-else decision trees generated for switch / case may produce sequences + like + + SREG = compare (reg, val); + if (SREG == 0) goto label1; + SREG = compare (reg, 1 + val); + if (SREG >= 0) goto label2; + + which can be optimized to + + SREG = compare (reg, val); + if (SREG == 0) goto label1; + if (SREG >= 0) goto label2; + + The optimal place for such a pass would be directly after expand, but + it's not possible for a jump insn to target more than one code label. + Hence, run a mini pass right before split2 which introduces REG_CC. */ + +void +avr_pass_ifelse::avr_rest_of_handle_ifelse (function*) +{ + rtx_insn *next_insn; + + for (rtx_insn *insn = get_insns(); insn; insn = next_insn) + { + next_insn = next_nonnote_nondebug_insn (insn); + + if (! next_insn) + break; + + // Search for two cbranch insns. The first one is a cbranch. + // Filter for "cbranch4_insn" with mode in QI, HI, PSI, SI. + + if (! JUMP_P (insn)) + continue; + + int icode1 = recog_memoized (insn); + + if (icode1 != CODE_FOR_cbranchqi4_insn + && icode1 != CODE_FOR_cbranchhi4_insn + && icode1 != CODE_FOR_cbranchpsi4_insn + && icode1 != CODE_FOR_cbranchsi4_insn) + continue; + + rtx_jump_insn *insn1 = as_a (insn); + rtx_jump_insn *insn2 = nullptr; + bool follow_label1 = false; + + // Extract the operands of the first insn: + // $0 = comparison operator ($1, $2) + // $1 = reg + // $2 = reg or const_int + // $3 = code_label + // $4 = optional SCRATCH for HI, PSI, SI cases. + + const auto &op = recog_data.operand; + + extract_insn (insn1); + rtx xop1[5] = { op[0], op[1], op[2], op[3], op[4] }; + int n_operands = recog_data.n_operands; + + // For now, we can optimize cbranches that follow an EQ cbranch, + // and cbranches that follow the label of a NE cbranch. + + if (GET_CODE (xop1[0]) == EQ + && JUMP_P (next_insn) + && recog_memoized (next_insn) == icode1) + { + // The 2nd cbranch insn follows insn1, i.e. is located in the + // fallthrough path of insn1. + + insn2 = as_a (next_insn); + } + else if (GET_CODE (xop1[0]) == NE) + { + // insn1 might branch to a label followed by a cbranch. + + rtx target1 = JUMP_LABEL (insn1); + rtx_insn *code_label1 = JUMP_LABEL_AS_INSN (insn1); + rtx_insn *next = next_nonnote_nondebug_insn (code_label1); + rtx_insn *barrier = prev_nonnote_nondebug_insn (code_label1); + + if (// Target label of insn1 is used exactly once and + // is not a fallthru, i.e. is preceded by a barrier. + LABEL_NUSES (target1) == 1 + && barrier + && BARRIER_P (barrier) + // Following the target label is a cbranch of the same kind. + && next + && JUMP_P (next) + && recog_memoized (next) == icode1) + { + follow_label1 = true; + insn2 = as_a (next); + } + } + + if (! insn2) + continue; + + // Also extract operands of insn2, and filter for REG + CONST_INT + // comparsons against the same register. + + extract_insn (insn2); + rtx xop2[5] = { op[0], op[1], op[2], op[3], op[4] }; + + if (! rtx_equal_p (xop1[1], xop2[1]) + || ! CONST_INT_P (xop1[2]) + || ! CONST_INT_P (xop2[2])) + continue; + + machine_mode mode = GET_MODE (xop1[1]); + enum rtx_code code1 = GET_CODE (xop1[0]); + enum rtx_code code2 = GET_CODE (xop2[0]); + + code2 = avr_redundant_compare (code1, xop1[2], code2, xop2[2], + mode, follow_label1); + if (code2 == UNKNOWN) + continue; + + ////////////////////////////////////////////////////// + // Found a replacement. + + if (dump_file) + { + fprintf (dump_file, "\n;; Found chain of jump_insn %d and" + " jump_insn %d, follow_label1=%d:\n", + INSN_UID (insn1), INSN_UID (insn2), follow_label1); + print_rtl_single (dump_file, PATTERN (insn1)); + print_rtl_single (dump_file, PATTERN (insn2)); + } + + if (! follow_label1) + next_insn = next_nonnote_nondebug_insn (insn2); + + // Pop the new branch conditions and the new comparison. + // Prematurely split into compare + branch so that we can drop + // the 2nd comparison. The following pass, split2, splits all + // insns for REG_CC, and it should still work as usual even when + // there are already some REG_CC insns around. + + rtx xcond1 = gen_rtx_fmt_ee (code1, VOIDmode, cc_reg_rtx, const0_rtx); + rtx xcond2 = gen_rtx_fmt_ee (code2, VOIDmode, cc_reg_rtx, const0_rtx); + rtx xpat1 = gen_branch (xop1[3], xcond1); + rtx xpat2 = gen_branch (xop2[3], xcond2); + rtx xcompare = NULL_RTX; + + if (mode == QImode) + { + gcc_assert (n_operands == 4); + xcompare = gen_cmpqi3 (xop1[1], xop1[2]); + } + else + { + gcc_assert (n_operands == 5); + rtx (*gen_cmp)(rtx,rtx,rtx) + = mode == HImode ? gen_gen_comparehi + : mode == PSImode ? gen_gen_comparepsi + : gen_gen_comparesi; // SImode + xcompare = gen_cmp (xop1[1], xop1[2], xop1[4]); + } + + // Emit that stuff. + + rtx_insn *cmp = emit_insn_before (xcompare, insn1); + rtx_jump_insn *branch1 = emit_jump_insn_before (xpat1, insn1); + rtx_jump_insn *branch2 = emit_jump_insn_before (xpat2, insn2); + + JUMP_LABEL (branch1) = xop1[3]; + JUMP_LABEL (branch2) = xop2[3]; + // delete_insn() decrements LABEL_NUSES when deleting a JUMP_INSN, but + // when we pop a new JUMP_INSN, do it by hand. + ++LABEL_NUSES (xop1[3]); + ++LABEL_NUSES (xop2[3]); + + delete_insn (insn1); + delete_insn (insn2); + + // As a side effect, also recog the new insns. + gcc_assert (valid_insn_p (cmp)); + gcc_assert (valid_insn_p (branch1)); + gcc_assert (valid_insn_p (branch2)); + } // loop insns +} + + /* Set `avr_arch' as specified by `-mmcu='. Return true on success. */ @@ -756,6 +1095,16 @@ avr_option_override (void) flag_omit_frame_pointer = 0; } + /* Disable flag_delete_null_pointer_checks if zero is a valid address. */ + if (targetm.addr_space.zero_address_valid (ADDR_SPACE_GENERIC)) + flag_delete_null_pointer_checks = 0; + + /* PR ipa/92606: Inter-procedural analysis optimizes data across + address-spaces and PROGMEM. As of v14, the PROGMEM part is + still not fixed (and there is still no target hook as proposed + in PR92932). Just disable respective bogus optimization. */ + flag_ipa_icf_variables = 0; + if (flag_pic == 1) warning (OPT_fpic, "%<-fpic%> is not supported"); if (flag_pic == 2) @@ -1019,6 +1368,19 @@ avr_no_gccisr_function_p (tree func) return avr_lookup_function_attribute1 (func, "no_gccisr"); } + +/* Implement `TARGET_CAN_INLINE_P'. */ +/* Some options like -mgas_isr_prologues depend on optimization level, + and the inliner might think that due to different options, inlining + is not permitted; see PR104327. */ + +static bool +avr_can_inline_p (tree /* caller */, tree /* callee */) +{ + // No restrictions whatsoever. + return true; +} + /* Implement `TARGET_SET_CURRENT_FUNCTION'. */ /* Sanity cheching for above function attributes. */ @@ -3173,28 +3535,6 @@ avr_asm_final_postscan_insn (FILE *stream, rtx_insn *insn, rtx*, int) } -/* Return 0 if undefined, 1 if always true or always false. */ - -int -avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x) -{ - unsigned int max = (mode == QImode ? 0xff : - mode == HImode ? 0xffff : - mode == PSImode ? 0xffffff : - mode == SImode ? 0xffffffff : 0); - if (max && op && CONST_INT_P (x)) - { - if (unsigned_condition (op) != op) - max >>= 1; - - if (max != (INTVAL (x) & max) - && INTVAL (x) != 0xff) - return 1; - } - return 0; -} - - /* Worker function for `FUNCTION_ARG_REGNO_P'. */ /* Returns nonzero if REGNO is the number of a hard register in which function arguments are sometimes passed. */ @@ -3731,7 +4071,13 @@ avr_out_xload (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen) xop[2] = lpm_addr_reg_rtx; xop[3] = AVR_HAVE_LPMX ? op[0] : lpm_reg_rtx; - avr_asm_len (AVR_HAVE_LPMX ? "lpm %3,%a2" : "lpm", xop, plen, -1); + if (plen) + *plen = 0; + + if (reg_overlap_mentioned_p (xop[3], lpm_addr_reg_rtx)) + avr_asm_len ("sbrs %1,7", xop, plen, 1); + + avr_asm_len (AVR_HAVE_LPMX ? "lpm %3,%a2" : "lpm", xop, plen, 1); avr_asm_len ("sbrc %1,7" CR_TAB "ld %3,%a2", xop, plen, 2); @@ -3877,13 +4223,30 @@ avr_out_movqi_r_mr_reg_disp_tiny (rtx_insn *insn, rtx op[], int *plen) rtx dest = op[0]; rtx src = op[1]; rtx x = XEXP (src, 0); + rtx base = XEXP (x, 0); - avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB - "ld %0,%b1" , op, plen, -3); + if (plen) + *plen = 0; + + if (!reg_overlap_mentioned_p (dest, base)) + { + avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB + "ld %0,%b1", op, plen, 3); + if (!reg_unused_after (insn, base)) + avr_asm_len (TINY_SBIW (%I1, %J1, %o1), op, plen, 2); + } + else + { + // PR98762: The base register overlaps dest and is only partly clobbered. + rtx base2 = all_regs_rtx[1 ^ REGNO (dest)]; - if (!reg_overlap_mentioned_p (dest, XEXP (x, 0)) - && !reg_unused_after (insn, XEXP (x, 0))) - avr_asm_len (TINY_SBIW (%I1, %J1, %o1), op, plen, 2); + if (!reg_unused_after (insn, base2)) + avr_asm_len ("mov __tmp_reg__,%0", &base2, plen, 1); + avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB + "ld %0,%b1", op, plen, 3); + if (!reg_unused_after (insn, base2)) + avr_asm_len ("mov %0,__tmp_reg__", &base2, plen, 1); + } return ""; } @@ -3909,40 +4272,66 @@ out_movqi_r_mr (rtx_insn *insn, rtx op[], int *plen) { /* memory access by reg+disp */ - int disp = INTVAL (XEXP (x, 1)); - if (AVR_TINY) return avr_out_movqi_r_mr_reg_disp_tiny (insn, op, plen); + if (plen) + *plen = 0; + + int disp = INTVAL (XEXP (x, 1)); + rtx base = XEXP (x, 0); + rtx base2 = all_regs_rtx[1 ^ REGNO (dest)]; + bool partial_clobber = (reg_overlap_mentioned_p (dest, base) + && ! reg_unused_after (insn, base2)); + if (disp - GET_MODE_SIZE (GET_MODE (src)) >= 63) - { - if (REGNO (XEXP (x, 0)) != REG_Y) - fatal_insn ("incorrect insn:",insn); + { + // PR117744: The base register overlaps dest and is + // only partially clobbered. + if (partial_clobber) + avr_asm_len ("mov __tmp_reg__,%0", &base2, plen, 1); - if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src))) - return avr_asm_len ("adiw r28,%o1-63" CR_TAB - "ldd %0,Y+63" CR_TAB - "sbiw r28,%o1-63", op, plen, -3); + if (REGNO (XEXP (x, 0)) != REG_Y) + fatal_insn ("incorrect insn:",insn); - return avr_asm_len ("subi r28,lo8(-%o1)" CR_TAB - "sbci r29,hi8(-%o1)" CR_TAB - "ld %0,Y" CR_TAB - "subi r28,lo8(%o1)" CR_TAB - "sbci r29,hi8(%o1)", op, plen, -5); - } + if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src))) + avr_asm_len ("adiw r28,%o1-63" CR_TAB + "ldd %0,Y+63" CR_TAB + "sbiw r28,%o1-63", op, plen, 3); + else + avr_asm_len ("subi r28,lo8(-%o1)" CR_TAB + "sbci r29,hi8(-%o1)" CR_TAB + "ld %0,Y" CR_TAB + "subi r28,lo8(%o1)" CR_TAB + "sbci r29,hi8(%o1)", op, plen, 5); + + if (partial_clobber) + avr_asm_len ("mov __tmp_reg__,%0", &base2, plen, 1); + + return ""; + } else if (REGNO (XEXP (x, 0)) == REG_X) { /* This is a paranoid case LEGITIMIZE_RELOAD_ADDRESS must exclude it but I have this situation with extremal optimizing options. */ - avr_asm_len ("adiw r26,%o1" CR_TAB - "ld %0,X", op, plen, -2); + // PR117744: The base register overlaps dest and is + // only partially clobbered. + bool clobber_r26 = (partial_clobber + && REGNO (base) == (REGNO (base) & ~1)); + if (partial_clobber + && ! clobber_r26) + avr_asm_len ("mov __tmp_reg__,%0", &base2, plen, 1); - if (!reg_overlap_mentioned_p (dest, XEXP (x, 0)) - && !reg_unused_after (insn, XEXP (x, 0))) - { - avr_asm_len ("sbiw r26,%o1", op, plen, 1); - } + avr_asm_len ("adiw r26,%o1" CR_TAB + "ld %0,X", op, plen, 2); + + if (clobber_r26) + avr_asm_len ("subi r26,lo8(%o1)", op, plen, 1); + else if (partial_clobber) + avr_asm_len ("mov %0,__tmp_reg__", &base2, plen, 1); + else if (! reg_unused_after (insn, base)) + avr_asm_len ("sbiw r26,%o1", op, plen, 1); return ""; } @@ -5677,29 +6066,36 @@ avr_frame_pointer_required_p (void) || get_frame_size () > 0); } -/* Returns the condition of compare insn INSN, or UNKNOWN. */ + +/* Returns the condition of the branch following INSN, where INSN is some + comparison. If the next insn is not a branch or the condition code set + by INSN might be used by more insns than the next one, return UNKNOWN. + For now, just look at the next insn, which misses some opportunities like + following jumps. */ static RTX_CODE compare_condition (rtx_insn *insn) { - rtx_insn *next = next_real_insn (insn); + rtx set; + rtx_insn *next = next_real_nondebug_insn (insn); - if (next && JUMP_P (next)) + if (next + && JUMP_P (next) + // If SREG does not die in the next insn, it is used in more than one + // branch. This can happen due to pass .avr-ifelse optimizations. + && dead_or_set_regno_p (next, REG_CC) + // Branches are (set (pc) (if_then_else (COND (...)))). + && (set = single_set (next)) + && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) { - rtx pat = PATTERN (next); - if (GET_CODE (pat) == PARALLEL) - pat = XVECEXP (pat, 0, 0); - rtx src = SET_SRC (pat); - - if (IF_THEN_ELSE == GET_CODE (src)) - return GET_CODE (XEXP (src, 0)); + return GET_CODE (XEXP (SET_SRC (set), 0)); } return UNKNOWN; } -/* Returns true iff INSN is a tst insn that only tests the sign. */ +/* Returns true if INSN is a tst insn that only tests the sign. */ static bool compare_sign_p (rtx_insn *insn) @@ -5709,23 +6105,95 @@ compare_sign_p (rtx_insn *insn) } -/* Returns true iff the next insn is a JUMP_INSN with a condition - that needs to be swapped (GT, GTU, LE, LEU). */ +/* Returns true if INSN is a compare insn with the EQ or NE condition. */ static bool -compare_diff_p (rtx_insn *insn) +compare_eq_p (rtx_insn *insn) { RTX_CODE cond = compare_condition (insn); - return (cond == GT || cond == GTU || cond == LE || cond == LEU) ? cond : 0; + return (cond == EQ || cond == NE); } -/* Returns true iff INSN is a compare insn with the EQ or NE condition. */ -static bool -compare_eq_p (rtx_insn *insn) +/* Implement `TARGET_CANONICALIZE_COMPARISON'. */ +/* Basically tries to convert "difficult" comparisons like GT[U] + and LE[U] to simple ones. Some asymmetric comparisons can be + transformed to EQ or NE against zero. */ + +static void +avr_canonicalize_comparison (int *icode, rtx *op0, rtx *op1, bool op0_fixed) { - RTX_CODE cond = compare_condition (insn); - return (cond == EQ || cond == NE); + enum rtx_code code = (enum rtx_code) *icode; + machine_mode mode = GET_MODE (*op0); + + bool signed_p = code == GT || code == LE; + bool unsigned_p = code == GTU || code == LEU; + bool difficult_p = signed_p || unsigned_p; + + if (// Only do integers and fixed-points. + (! SCALAR_INT_MODE_P (mode) + && ! ALL_SCALAR_FIXED_POINT_MODE_P (mode)) + // Only do comparisons against a register. + || ! register_operand (*op0, mode)) + return; + + // Canonicalize "difficult" reg-reg comparisons. + + if (! op0_fixed + && difficult_p + && register_operand (*op1, mode)) + { + std::swap (*op0, *op1); + *icode = (int) swap_condition (code); + return; + } + + // Canonicalize comparisons against compile-time constants. + + if (CONST_INT_P (*op1) + || CONST_FIXED_P (*op1)) + { + // INT_MODE of the same size. + scalar_int_mode imode = int_mode_for_mode (mode).require (); + + unsigned HOST_WIDE_INT mask = GET_MODE_MASK (imode); + unsigned HOST_WIDE_INT maxval = signed_p ? mask >> 1 : mask; + + // Convert value *op1 to imode. + rtx xval = simplify_gen_subreg (imode, *op1, mode, 0); + + // Canonicalize difficult comparisons against const. + if (difficult_p + && (UINTVAL (xval) & mask) != maxval) + { + // Convert *op0 > *op1 to *op0 >= 1 + *op1. + // Convert *op0 <= *op1 to *op0 < 1 + *op1. + xval = simplify_binary_operation (PLUS, imode, xval, const1_rtx); + + // Convert value back to its original mode. + *op1 = simplify_gen_subreg (mode, xval, imode, 0); + + // Map > to >= and <= to <. + *icode = (int) avr_normalize_condition (code); + + return; + } + + // Some asymmetric comparisons can be turned into EQ or NE. + if (code == LTU && xval == const1_rtx) + { + *icode = (int) EQ; + *op1 = CONST0_RTX (mode); + return; + } + + if (code == GEU && xval == const1_rtx) + { + *icode = (int) NE; + *op1 = CONST0_RTX (mode); + return; + } + } } @@ -6018,6 +6486,68 @@ avr_out_tstsi (rtx_insn *insn, rtx *op, int *plen) } +/* Output a comparison of a zero- or sign-extended register against a + plain register. CODE is SIGN_EXTEND or ZERO_EXTEND. Return "". + + PLEN != 0: Set *PLEN to the code length in words. Don't output anything. + PLEN == 0: Print instructions. */ + +const char* +avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen) +{ + // The smaller reg is the one that's to be extended. Get its index as z. + int z = GET_MODE_SIZE (GET_MODE (xop[1])) < GET_MODE_SIZE (GET_MODE (xop[0])); + rtx zreg = xop[z]; + rtx reg = xop[1 - z]; + machine_mode mode = GET_MODE (reg); + machine_mode zmode = GET_MODE (zreg); + rtx zex; + + if (plen) + *plen = 0; + + // zex holds the extended bytes above zreg. This is 0 for ZERO_EXTEND, + // and 0 or -1 for SIGN_EXTEND. + + if (code == SIGN_EXTEND) + { + // Sign-extend the high-byte of zreg to tmp_reg. + int zmsb = GET_MODE_SIZE (zmode) - 1; + rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb); + + avr_asm_len ("mov __tmp_reg__,%0" CR_TAB + "rol __tmp_reg__" CR_TAB + "sbc __tmp_reg__,__tmp_reg__", &xzmsb, plen, 3); + zex = tmp_reg_rtx; + } + else if (code == ZERO_EXTEND) + { + zex = zero_reg_rtx; + } + else + gcc_unreachable(); + + // Now output n_bytes bytes of the very comparison. + + int n_bytes = GET_MODE_SIZE (mode); + + avr_asm_len ("cp %0,%1", xop, plen, 1); + + for (int b = 1; b < n_bytes; ++b) + { + rtx regs[2]; + regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b); + regs[z] = (b < GET_MODE_SIZE (zmode) + ? simplify_gen_subreg (QImode, zreg, zmode, b) + : zex); + + avr_asm_len ("cpc %0,%1", regs, plen, 1); + } + + return ""; +} + + /* Generate asm equivalent for various shifts. This only handles cases that are not already carefully hand-optimized in ?sh??i3_out. @@ -6544,7 +7074,7 @@ avr_out_ashlpsi3 (rtx_insn *insn, rtx *op, int *plen) int reg1 = REGNO (op[1]); if (reg0 + 2 != reg1) - avr_asm_len ("mov %C0,%A0", op, plen, 1); + avr_asm_len ("mov %C0,%A1", op, plen, 1); return avr_asm_len ("clr %B0" CR_TAB "clr %A0", op, plen, 2); @@ -8160,6 +8690,122 @@ avr_out_plus (rtx insn, rtx *xop, int *plen, int *pcc, bool out_label) } +/* Output an instruction sequence for addition of REG in XOP[0] and CONST_INT + in XOP[1] in such a way that SREG.Z and SREG.N are set according to the + result. XOP[2] might be a d-regs clobber register. If XOP[2] is SCRATCH, + then the addition can be performed without a clobber reg. Return "". + + If PLEN == NULL, then output the instructions. + If PLEN != NULL, then set *PLEN to the length of the sequence in words. */ + +const char* +avr_out_plus_set_ZN (rtx *xop, int *plen) +{ + if (plen) + *plen = 0; + + // Register to compare and value to compare against. + rtx xreg = xop[0]; + rtx xval = xop[1]; + + machine_mode mode = GET_MODE (xreg); + + // Number of bytes to operate on. + int n_bytes = GET_MODE_SIZE (mode); + + if (n_bytes == 1) + { + if (INTVAL (xval) == 1) + return avr_asm_len ("inc %0", xop, plen, 1); + + if (INTVAL (xval) == -1) + return avr_asm_len ("dec %0", xop, plen, 1); + } + + if (n_bytes == 2 + && test_hard_reg_class (ADDW_REGS, xreg) + && IN_RANGE (INTVAL (xval), 1, 63)) + { + // Add 16-bit value in [1..63] to a w register. + return avr_asm_len ("adiw %0, %1", xop, plen, 1); + } + + // Addition won't work; subtract the negative of XVAL instead. + xval = simplify_unary_operation (NEG, mode, xval, mode); + + // Value (0..0xff) held in clobber register xop[2] or -1 if unknown. + int clobber_val = -1; + + // [0] = Current sub-register. + // [1] = Current partial xval. + // [2] = 8-bit clobber d-register or SCRATCH. + rtx op[3]; + op[2] = xop[2]; + + // Work byte-wise from LSB to MSB. The lower two bytes might be + // SBIW'ed in one go. + for (int i = 0; i < n_bytes; ++i) + { + op[0] = simplify_gen_subreg (QImode, xreg, mode, i); + + if (i == 0 + && n_bytes >= 2 + && test_hard_reg_class (ADDW_REGS, op[0])) + { + op[1] = simplify_gen_subreg (HImode, xval, mode, 0); + if (IN_RANGE (INTVAL (op[1]), 0, 63)) + { + // SBIW can handle the lower 16 bits. + avr_asm_len ("sbiw %0, %1", op, plen, 1); + + // Next byte has already been handled: Skip it. + ++i; + continue; + } + } + + op[1] = simplify_gen_subreg (QImode, xval, mode, i); + + if (test_hard_reg_class (LD_REGS, op[0])) + { + // d-regs can subtract immediates. + avr_asm_len (i == 0 + ? "subi %0, %1" + : "sbci %0, %1", op, plen, 1); + } + else + { + int val8 = 0xff & INTVAL (op[1]); + if (val8 == 0) + { + // Any register can subtract 0. + avr_asm_len (i == 0 + ? "sub %0, __zero_reg__" + : "sbc %0, __zero_reg__", op, plen, 1); + } + else + { + // Use d-register to hold partial xval. + + if (val8 != clobber_val) + { + // Load partial xval to QI clobber reg and memoize for later. + gcc_assert (REG_P (op[2])); + avr_asm_len ("ldi %2, %1", op, plen, 1); + clobber_val = val8; + } + + avr_asm_len (i == 0 + ? "sub %0, %2" + : "sbc %0, %2", op, plen, 1); + } + } + } // Loop bytes. + + return ""; +} + + /* Output bit operation (IOR, AND, XOR) with register XOP[0] and compile time constant XOP[2]: @@ -9291,6 +9937,8 @@ avr_adjust_insn_length (rtx_insn *insn, int len) case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break; case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break; case ADJUST_LEN_COMPARE64: avr_out_compare64 (insn, op, &len); break; + case ADJUST_LEN_CMP_UEXT: avr_out_cmp_ext (op, ZERO_EXTEND, &len); break; + case ADJUST_LEN_CMP_SEXT: avr_out_cmp_ext (op, SIGN_EXTEND, &len); break; case ADJUST_LEN_LSHRQI: lshrqi3_out (insn, op, &len); break; case ADJUST_LEN_LSHRHI: lshrhi3_out (insn, op, &len); break; @@ -9311,6 +9959,7 @@ avr_adjust_insn_length (rtx_insn *insn, int len) case ADJUST_LEN_CALL: len = AVR_HAVE_JMP_CALL ? 2 : 1; break; case ADJUST_LEN_INSERT_BITS: avr_out_insert_bits (op, &len); break; + case ADJUST_LEN_ADD_SET_ZN: avr_out_plus_set_ZN (op, &len); break; case ADJUST_LEN_INSV_NOTBIT: avr_out_insert_notbit (insn, op, NULL_RTX, &len); @@ -9640,6 +10289,10 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, int flags ATTRIBUTE_UNUSED, bool *no_add) { bool io_p = startswith (IDENTIFIER_POINTER (name), "io"); + HOST_WIDE_INT io_start = avr_arch->sfr_offset; + HOST_WIDE_INT io_end = strcmp (IDENTIFIER_POINTER (name), "io_low") == 0 + ? io_start + 0x1f + : io_start + 0x3f; location_t loc = DECL_SOURCE_LOCATION (*node); if (!VAR_P (*node)) @@ -9663,12 +10316,10 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, } else if (io_p && (!tree_fits_shwi_p (arg) - || !(strcmp (IDENTIFIER_POINTER (name), "io_low") == 0 - ? low_io_address_operand : io_address_operand) - (GEN_INT (TREE_INT_CST_LOW (arg)), QImode))) + || ! IN_RANGE (TREE_INT_CST_LOW (arg), io_start, io_end))) { - warning_at (loc, OPT_Wattributes, "%qE attribute address " - "out of range", name); + warning_at (loc, OPT_Wattributes, "%qE attribute address out of range" + " 0x%x%s0x%x", name, (int) io_start, "...", (int) io_end); *no_add = true; } else @@ -9694,6 +10345,12 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, warning_at (loc, OPT_Wattributes, "%qE attribute on non-volatile variable", name); + // Optimizers must not draw any conclusions from "static int addr;" etc. + // because the contents of `addr' are not given by its initializer but + // by the contents at the address as specified by the attribute. + if (VAR_P (*node) && ! *no_add) + TREE_THIS_VOLATILE (*node) = 1; + return NULL_TREE; } @@ -9711,7 +10368,6 @@ avr_eval_addr_attrib (rtx x) attr = lookup_attribute ("io", DECL_ATTRIBUTES (decl)); if (!attr || !TREE_VALUE (attr)) attr = lookup_attribute ("io_low", DECL_ATTRIBUTES (decl)); - gcc_assert (attr); } if (!attr || !TREE_VALUE (attr)) attr = lookup_attribute ("address", DECL_ATTRIBUTES (decl)); @@ -9958,6 +10614,17 @@ avr_pgm_check_var_decl (tree node) static void avr_insert_attributes (tree node, tree *attributes) { + if (VAR_P (node) + && ! TREE_STATIC (node) + && ! DECL_EXTERNAL (node)) + { + const char *names[] = { "io", "io_low", "address", NULL }; + for (const char **p = names; *p; ++p) + if (lookup_attribute (*p, *attributes)) + error ("variable %q+D with attribute %qs must be located in " + "static storage", node, *p); + } + avr_pgm_check_var_decl (node); if (TARGET_MAIN_IS_OS_TASK @@ -10018,37 +10685,11 @@ avr_insert_attributes (tree node, tree *attributes) /* Track need of __do_clear_bss. */ void -avr_asm_output_aligned_decl_common (FILE * stream, - tree decl, - const char *name, - unsigned HOST_WIDE_INT size, - unsigned int align, bool local_p) +avr_asm_output_aligned_decl_common (FILE *stream, tree /* decl */, + const char *name, + unsigned HOST_WIDE_INT size, + unsigned int align, bool local_p) { - rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl); - rtx symbol; - - if (mem != NULL_RTX && MEM_P (mem) - && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) - && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) - { - if (!local_p) - { - fprintf (stream, "\t.globl\t"); - assemble_name (stream, name); - fprintf (stream, "\n"); - } - if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS) - { - assemble_name (stream, name); - fprintf (stream, " = %ld\n", - (long) INTVAL (avr_eval_addr_attrib (symbol))); - } - else if (local_p) - error_at (DECL_SOURCE_LOCATION (decl), - "static IO declaration for %q+D needs an address", decl); - return; - } - /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc. There is no need to trigger __do_clear_bss code for them. */ @@ -10061,6 +10702,9 @@ avr_asm_output_aligned_decl_common (FILE * stream, ASM_OUTPUT_ALIGNED_COMMON (stream, name, size, align); } + +/* Implement `ASM_OUTPUT_ALIGNED_BSS'. */ + void avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name, unsigned HOST_WIDE_INT size, int align, @@ -10068,20 +10712,10 @@ avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name, (FILE *, tree, const char *, unsigned HOST_WIDE_INT, int)) { - rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl); - rtx symbol; + if (!startswith (name, "__gnu_lto")) + avr_need_clear_bss_p = true; - if (mem != NULL_RTX && MEM_P (mem) - && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) - && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) - { - if (!(SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)) - error_at (DECL_SOURCE_LOCATION (decl), - "IO definition for %q+D needs an address", decl); - avr_asm_output_aligned_decl_common (file, decl, name, size, align, false); - } - else - default_func (file, decl, name, size, align); + default_func (file, decl, name, size, align); } @@ -10120,6 +10754,58 @@ avr_output_progmem_section_asm_op (const char *data) } +/* A noswitch section callback to output symbol definitions for + attributes "io", "io_low" and "address". */ + +static bool +avr_output_addr_attrib (tree decl, const char *name, + unsigned HOST_WIDE_INT /* size */, + unsigned HOST_WIDE_INT /* align */) +{ + gcc_assert (DECL_RTL_SET_P (decl)); + + FILE *stream = asm_out_file; + bool local_p = ! DECL_WEAK (decl) && ! TREE_PUBLIC (decl); + rtx symbol, mem = DECL_RTL (decl); + + if (mem != NULL_RTX && MEM_P (mem) + && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) + && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) + { + if (! local_p) + { + fprintf (stream, "\t%s\t", DECL_WEAK (decl) ? ".weak" : ".globl"); + assemble_name (stream, name); + fprintf (stream, "\n"); + } + + if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS) + { + assemble_name (stream, name); + fprintf (stream, " = %ld\n", + (long) INTVAL (avr_eval_addr_attrib (symbol))); + } + else if (local_p) + { + const char *names[] = { "io", "io_low", "address", NULL }; + for (const char **p = names; *p; ++p) + if (lookup_attribute (*p, DECL_ATTRIBUTES (decl))) + { + error ("static attribute %qs declaration for %q+D needs an " + "address", *p, decl); + break; + } + } + + return true; + } + + gcc_unreachable(); + + return false; +} + + /* Implement `TARGET_ASM_INIT_SECTIONS'. */ static void @@ -10135,6 +10821,7 @@ avr_asm_init_sections (void) readonly_data_section->unnamed.callback = avr_output_data_section_asm_op; data_section->unnamed.callback = avr_output_data_section_asm_op; bss_section->unnamed.callback = avr_output_bss_section_asm_op; + tls_comm_section->noswitch.callback = avr_output_addr_attrib; } @@ -10311,15 +10998,17 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p) tree io_low_attr = lookup_attribute ("io_low", attr); tree io_attr = lookup_attribute ("io", attr); + tree address_attr = lookup_attribute ("address", attr); if (io_low_attr && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr))) - addr_attr = io_attr; + addr_attr = io_low_attr; else if (io_attr && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr))) addr_attr = io_attr; else - addr_attr = lookup_attribute ("address", attr); + addr_attr = address_attr; + if (io_low_attr || (io_attr && addr_attr && low_io_address_operand @@ -10334,6 +11023,36 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p) don't use the exact value for constant propagation. */ if (addr_attr && !DECL_EXTERNAL (decl)) SYMBOL_REF_FLAGS (sym) |= SYMBOL_FLAG_ADDRESS; + + if (io_attr || io_low_attr || address_attr) + { + if (DECL_INITIAL (decl)) + { + /* Initializers are not yet parsed in TARGET_INSERT_ATTRIBUTES, + hence deny initializers now. The values of symbols with an + address attribute are determined by the attribute, not by + some initializer. */ + + error ("variable %q+D with attribute %qs must not have an " + "initializer", decl, + io_low_attr ? "io_low" : io_attr ? "io" : "address"); + } + else + { + /* PR112952: The only way to output a variable declaration in a + custom manner is by means of a noswitch section callback. + There are only three noswitch sections: comm_section, + lcomm_section and tls_comm_section. And there is no way to + wire a custom noswitch section to a decl. As lcomm_section + is bypassed with -fdata-sections -fno-common, there is no + other way than making use of tls_comm_section. As we are + using that section anyway, also use it in the public case. */ + + DECL_COMMON (decl) = 1; + set_decl_section_name (decl, (const char*) nullptr); + set_decl_tls_model (decl, (tls_model) 2); + } + } } if (AVR_TINY @@ -10607,6 +11326,58 @@ avr_mul_highpart_cost (rtx x, int) } +/* Return the expected cost of a conditional branch like + (set (pc) + (if_then_else (X) + (label_ref *) + (pc))) + where X is some comparison operator. */ + +static int +avr_cbranch_cost (rtx x) +{ + bool difficult_p = difficult_comparison_operator (x, VOIDmode); + + if (reload_completed) + { + // After reload, we basically just have plain branches. + return COSTS_N_INSNS (1 + difficult_p); + } + + rtx xreg = XEXP (x, 0); + rtx xval = XEXP (x, 1); + machine_mode mode = GET_MODE (xreg); + if (mode == VOIDmode) + mode = GET_MODE (xval); + int size = GET_MODE_SIZE (mode); + + if (GET_CODE (xreg) == ZERO_EXTEND + || GET_CODE (xval) == ZERO_EXTEND) + { + // *cbranch..0/1, code = zero_extend. + return COSTS_N_INSNS (size + 1); + } + + if (GET_CODE (xreg) == SIGN_EXTEND + || GET_CODE (xval) == SIGN_EXTEND) + { + // *cbranch..0/1, code = sign_extend. + // Make it a bit cheaper than it actually is (less reg pressure). + return COSTS_N_INSNS (size + 1 + 1); + } + + bool reg_p = register_operand (xreg, mode); + bool reg_or_0_p = reg_or_0_operand (xval, mode); + + return COSTS_N_INSNS (size + // For the branch + + 1 + difficult_p + // Combine might propagate constants other than zero + // into the 2nd operand. Make that more expensive. + + 1 * (!reg_p || !reg_or_0_p)); +} + + /* Mutually recursive subroutine of avr_rtx_cost for calculating the cost of an RTX operand given its context. X is the rtx of the operand, MODE is its mode, and OUTER is the rtx_code of this @@ -10844,6 +11615,15 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code, *total += COSTS_N_INSNS (1); return true; } + if (IOR == code + && AND == GET_CODE (XEXP (x, 0)) + && AND == GET_CODE (XEXP (x, 1)) + && single_zero_operand (XEXP (XEXP (x, 0), 1), mode)) + { + // Open-coded bit transfer. + *total = COSTS_N_INSNS (2); + return true; + } *total = COSTS_N_INSNS (GET_MODE_SIZE (mode)); *total += avr_operand_rtx_cost (XEXP (x, 0), mode, code, 0, speed); if (!CONST_INT_P (XEXP (x, 1))) @@ -11490,6 +12270,15 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code, } break; + case IF_THEN_ELSE: + if (outer_code == SET + && XEXP (x, 2) == pc_rtx + && ordered_comparison_operator (XEXP (x, 0), VOIDmode)) + { + *total = avr_cbranch_cost (XEXP (x, 0)); + return true; + } + default: break; } @@ -11515,6 +12304,52 @@ avr_rtx_costs (rtx x, machine_mode mode, int outer_code, } +/* Implement `TARGET_INSN_COST'. */ +/* For some insns, it is not enough to look at the cost of the SET_SRC. + In that case, have a look at the entire insn, e.g. during insn combine. */ + +static int +avr_insn_cost (rtx_insn *insn, bool speed) +{ + const int unknown_cost = -1; + int cost = unknown_cost; + + rtx set = single_set (insn); + + if (set + && ZERO_EXTRACT == GET_CODE (SET_DEST (set))) + { + // Try find anything that would flip the extracted bit. + bool not_bit_p = false; + + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST) + { + enum rtx_code code = GET_CODE (*iter); + not_bit_p |= code == NOT || code == XOR || code == GE; + } + + // Don't go too deep into the analysis. In almost all cases, + // using BLD/BST is the best we can do for single-bit moves, + // even considering CSE. + cost = COSTS_N_INSNS (2 + not_bit_p); + } + + if (cost != unknown_cost) + { + if (avr_log.rtx_costs) + avr_edump ("\n%? (%s) insn_cost=%d\n%r\n", + speed ? "speed" : "size", cost, insn); + return cost; + } + + // Resort to what rtlanal.cc::insn_cost() implements as a default + // when targetm.insn_cost() is not implemented. + + return pattern_cost (PATTERN (insn), speed); +} + + /* Implement `TARGET_ADDRESS_COST'. */ static int @@ -11602,281 +12437,6 @@ avr_normalize_condition (RTX_CODE condition) } } -/* Helper function for `avr_reorg'. */ - -static rtx -avr_compare_pattern (rtx_insn *insn) -{ - rtx pattern = single_set (insn); - - if (pattern - && NONJUMP_INSN_P (insn) - && REG_P (SET_DEST (pattern)) - && REGNO (SET_DEST (pattern)) == REG_CC - && GET_CODE (SET_SRC (pattern)) == COMPARE) - { - machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0)); - machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1)); - - /* The 64-bit comparisons have fixed operands ACC_A and ACC_B. - They must not be swapped, thus skip them. */ - - if ((mode0 == VOIDmode || GET_MODE_SIZE (mode0) <= 4) - && (mode1 == VOIDmode || GET_MODE_SIZE (mode1) <= 4)) - return pattern; - } - - return NULL_RTX; -} - -/* Helper function for `avr_reorg'. */ - -/* Expansion of switch/case decision trees leads to code like - - REG_CC = compare (Reg, Num) - if (REG_CC == 0) - goto L1 - - REG_CC = compare (Reg, Num) - if (REG_CC > 0) - goto L2 - - The second comparison is superfluous and can be deleted. - The second jump condition can be transformed from a - "difficult" one to a "simple" one because "REG_CC > 0" and - "REG_CC >= 0" will have the same effect here. - - This function relies on the way switch/case is being expaned - as binary decision tree. For example code see PR 49903. - - Return TRUE if optimization performed. - Return FALSE if nothing changed. - - INSN1 is a comparison, i.e. avr_compare_pattern != 0. - - We don't want to do this in text peephole because it is - tedious to work out jump offsets there and the second comparison - might have been transormed by `avr_reorg'. - - RTL peephole won't do because peephole2 does not scan across - basic blocks. */ - -static bool -avr_reorg_remove_redundant_compare (rtx_insn *insn1) -{ - rtx comp1, ifelse1, xcond1; - rtx_insn *branch1; - rtx comp2, ifelse2, xcond2; - rtx_insn *branch2, *insn2; - enum rtx_code code; - rtx_insn *jump; - rtx target, cond; - - /* Look out for: compare1 - branch1 - compare2 - branch2 */ - - branch1 = next_nonnote_nondebug_insn (insn1); - if (!branch1 || !JUMP_P (branch1)) - return false; - - insn2 = next_nonnote_nondebug_insn (branch1); - if (!insn2 || !avr_compare_pattern (insn2)) - return false; - - branch2 = next_nonnote_nondebug_insn (insn2); - if (!branch2 || !JUMP_P (branch2)) - return false; - - comp1 = avr_compare_pattern (insn1); - comp2 = avr_compare_pattern (insn2); - xcond1 = single_set (branch1); - xcond2 = single_set (branch2); - - if (!comp1 || !comp2 - || !rtx_equal_p (comp1, comp2) - || !xcond1 || SET_DEST (xcond1) != pc_rtx - || !xcond2 || SET_DEST (xcond2) != pc_rtx - || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond1)) - || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond2))) - { - return false; - } - - comp1 = SET_SRC (comp1); - ifelse1 = SET_SRC (xcond1); - ifelse2 = SET_SRC (xcond2); - - /* comp is COMPARE now and ifelse is IF_THEN_ELSE. */ - - if (EQ != GET_CODE (XEXP (ifelse1, 0)) - || !REG_P (XEXP (comp1, 0)) - || !CONST_INT_P (XEXP (comp1, 1)) - || XEXP (ifelse1, 2) != pc_rtx - || XEXP (ifelse2, 2) != pc_rtx - || LABEL_REF != GET_CODE (XEXP (ifelse1, 1)) - || LABEL_REF != GET_CODE (XEXP (ifelse2, 1)) - || !COMPARISON_P (XEXP (ifelse2, 0)) - || REG_CC != REGNO (XEXP (XEXP (ifelse1, 0), 0)) - || REG_CC != REGNO (XEXP (XEXP (ifelse2, 0), 0)) - || const0_rtx != XEXP (XEXP (ifelse1, 0), 1) - || const0_rtx != XEXP (XEXP (ifelse2, 0), 1)) - { - return false; - } - - /* We filtered the insn sequence to look like - - (set (reg:CC cc) - (compare (reg:M N) - (const_int VAL))) - (set (pc) - (if_then_else (eq (reg:CC cc) - (const_int 0)) - (label_ref L1) - (pc))) - - (set (reg:CC cc) - (compare (reg:M N) - (const_int VAL))) - (set (pc) - (if_then_else (CODE (reg:CC cc) - (const_int 0)) - (label_ref L2) - (pc))) - */ - - code = GET_CODE (XEXP (ifelse2, 0)); - - /* Map GT/GTU to GE/GEU which is easier for AVR. - The first two instructions compare/branch on EQ - so we may replace the difficult - - if (x == VAL) goto L1; - if (x > VAL) goto L2; - - with easy - - if (x == VAL) goto L1; - if (x >= VAL) goto L2; - - Similarly, replace LE/LEU by LT/LTU. */ - - switch (code) - { - case EQ: - case LT: case LTU: - case GE: case GEU: - break; - - case LE: case LEU: - case GT: case GTU: - code = avr_normalize_condition (code); - break; - - default: - return false; - } - - /* Wrap the branches into UNSPECs so they won't be changed or - optimized in the remainder. */ - - target = XEXP (XEXP (ifelse1, 1), 0); - cond = XEXP (ifelse1, 0); - jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn1); - - JUMP_LABEL (jump) = JUMP_LABEL (branch1); - - target = XEXP (XEXP (ifelse2, 1), 0); - cond = gen_rtx_fmt_ee (code, VOIDmode, cc_reg_rtx, const0_rtx); - jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn2); - - JUMP_LABEL (jump) = JUMP_LABEL (branch2); - - /* The comparisons in insn1 and insn2 are exactly the same; - insn2 is superfluous so delete it. */ - - delete_insn (insn2); - delete_insn (branch1); - delete_insn (branch2); - - return true; -} - - -/* Implement `TARGET_MACHINE_DEPENDENT_REORG'. */ -/* Optimize conditional jumps. */ - -static void -avr_reorg (void) -{ - rtx_insn *insn = get_insns(); - - for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn)) - { - rtx pattern = avr_compare_pattern (insn); - - if (!pattern) - continue; - - if (optimize - && avr_reorg_remove_redundant_compare (insn)) - { - continue; - } - - if (compare_diff_p (insn)) - { - /* Now we work under compare insn with difficult branch. */ - - rtx_insn *next = next_real_insn (insn); - rtx pat = PATTERN (next); - if (GET_CODE (pat) == PARALLEL) - pat = XVECEXP (pat, 0, 0); - - pattern = SET_SRC (pattern); - - if (true_regnum (XEXP (pattern, 0)) >= 0 - && true_regnum (XEXP (pattern, 1)) >= 0) - { - rtx x = XEXP (pattern, 0); - rtx src = SET_SRC (pat); - rtx t = XEXP (src, 0); - PUT_CODE (t, swap_condition (GET_CODE (t))); - XEXP (pattern, 0) = XEXP (pattern, 1); - XEXP (pattern, 1) = x; - INSN_CODE (next) = -1; - } - else if (true_regnum (XEXP (pattern, 0)) >= 0 - && XEXP (pattern, 1) == const0_rtx) - { - /* This is a tst insn, we can reverse it. */ - rtx src = SET_SRC (pat); - rtx t = XEXP (src, 0); - - PUT_CODE (t, swap_condition (GET_CODE (t))); - XEXP (pattern, 1) = XEXP (pattern, 0); - XEXP (pattern, 0) = const0_rtx; - INSN_CODE (next) = -1; - INSN_CODE (insn) = -1; - } - else if (true_regnum (XEXP (pattern, 0)) >= 0 - && CONST_INT_P (XEXP (pattern, 1))) - { - rtx x = XEXP (pattern, 1); - rtx src = SET_SRC (pat); - rtx t = XEXP (src, 0); - machine_mode mode = GET_MODE (XEXP (pattern, 0)); - - if (avr_simplify_comparison_p (mode, GET_CODE (t), x)) - { - XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode); - PUT_CODE (t, avr_normalize_condition (GET_CODE (t))); - INSN_CODE (next) = -1; - INSN_CODE (insn) = -1; - } - } - } - } -} /* Returns register number for function return value.*/ @@ -14572,6 +15132,8 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) #undef TARGET_ASM_FINAL_POSTSCAN_INSN #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn +#undef TARGET_INSN_COST +#define TARGET_INSN_COST avr_insn_cost #undef TARGET_REGISTER_MOVE_COST #define TARGET_REGISTER_MOVE_COST avr_register_move_cost #undef TARGET_MEMORY_MOVE_COST @@ -14580,8 +15142,6 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) #define TARGET_RTX_COSTS avr_rtx_costs #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST avr_address_cost -#undef TARGET_MACHINE_DEPENDENT_REORG -#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg #undef TARGET_FUNCTION_ARG #define TARGET_FUNCTION_ARG avr_function_arg #undef TARGET_FUNCTION_ARG_ADVANCE @@ -14711,6 +15271,12 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) #undef TARGET_MD_ASM_ADJUST #define TARGET_MD_ASM_ADJUST avr_md_asm_adjust +#undef TARGET_CAN_INLINE_P +#define TARGET_CAN_INLINE_P avr_can_inline_p + +#undef TARGET_CANONICALIZE_COMPARISON +#define TARGET_CANONICALIZE_COMPARISON avr_canonicalize_comparison + struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index 1b948c6130ccb..64aa3c347e762 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -500,9 +500,11 @@ typedef struct avr_args extern const char *avr_devicespecs_file (int, const char**); extern const char *avr_double_lib (int, const char**); +extern const char *avr_no_devlib (int, const char**); #define EXTRA_SPEC_FUNCTIONS \ { "double-lib", avr_double_lib }, \ + { "no-devlib", avr_no_devlib }, \ { "device-specs-file", avr_devicespecs_file }, /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index efae7efb69b10..90ba2d0400e4b 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -77,7 +77,6 @@ UNSPEC_FMULS UNSPEC_FMULSU UNSPEC_COPYSIGN - UNSPEC_IDENTITY UNSPEC_INSERT_BITS UNSPEC_ROUND ]) @@ -165,6 +164,7 @@ ashlsi, ashrsi, lshrsi, ashlpsi, ashrpsi, lshrpsi, insert_bits, insv_notbit, insv_notbit_0, insv_notbit_7, + add_set_ZN, cmp_uext, cmp_sext, no" (const_string "no")) @@ -251,11 +251,23 @@ (define_mode_iterator QIHI2 [QI HI]) (define_mode_iterator QISI [QI HI PSI SI]) (define_mode_iterator QIDI [QI HI PSI SI DI]) +(define_mode_iterator QIPSI [QI HI PSI]) (define_mode_iterator HISI [HI PSI SI]) +;; Ordered integral and fixed-point modes of specific sizes. (define_mode_iterator ALL1 [QI QQ UQQ]) (define_mode_iterator ALL2 [HI HQ UHQ HA UHA]) (define_mode_iterator ALL4 [SI SQ USQ SA USA]) +(define_mode_iterator ALL234 [HI SI PSI + HQ UHQ HA UHA + SQ USQ SA USA]) + +;; Ordered signed integral and signed fixed-point modes of specific sizes. +(define_mode_iterator ALLs1 [QI QQ]) +(define_mode_iterator ALLs2 [HI HQ HA]) +(define_mode_iterator ALLs4 [SI SQ SA]) +(define_mode_iterator ALLs234 [HI SI PSI + HQ HA SQ SA]) ;; All supported move-modes (define_mode_iterator MOVMODE [QI QQ UQQ @@ -273,15 +285,17 @@ SQ USQ SA USA]) ;; Define code iterators -;; Define two incarnations so that we can build the cross product. +;; Define two incarnations so that we can build the cartesian product. (define_code_iterator any_extend [sign_extend zero_extend]) (define_code_iterator any_extend2 [sign_extend zero_extend]) (define_code_iterator any_extract [sign_extract zero_extract]) (define_code_iterator any_shiftrt [lshiftrt ashiftrt]) +(define_code_iterator piaop [plus ior and]) (define_code_iterator bitop [xor ior and]) (define_code_iterator xior [xor ior]) (define_code_iterator eqne [eq ne]) +(define_code_iterator gelt [ge lt]) (define_code_iterator ss_addsub [ss_plus ss_minus]) (define_code_iterator us_addsub [us_plus us_minus]) @@ -309,6 +323,10 @@ [(ss_minus "") (us_minus "") (ss_plus "%") (us_plus "%")]) +(define_code_attr gelt_eqne + [(ge "eq") + (lt "ne")]) + ;; Map RTX code to its standard insn name (define_code_attr code_stdname [(ashift "ashl") @@ -363,9 +381,14 @@ emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); - emit_move_insn (hard_frame_pointer_rtx, r_fp); + // PR64242: When r_sp is located in the frame, we must not + // change FP prior to reading r_sp. Hence copy r_fp to a + // local register (and hope that reload won't spill it). + rtx r_fp_reg = copy_to_reg (r_fp); emit_stack_restore (SAVE_NONLOCAL, r_sp); + emit_move_insn (hard_frame_pointer_rtx, r_fp_reg); + emit_use (hard_frame_pointer_rtx); emit_use (stack_pointer_rtx); @@ -697,12 +720,26 @@ if (!REG_P (addr)) src = replace_equiv_address (src, copy_to_mode_reg (PSImode, addr)); + rtx dest2 = reg_overlap_mentioned_p (dest, lpm_addr_reg_rtx) + ? gen_reg_rtx (mode) + : dest; + if (!avr_xload_libgcc_p (mode)) /* ; No here because gen_xload8_A only iterates over ALL1. ; insn-emit does not depend on the mode, it's all about operands. */ - emit_insn (gen_xload8qi_A (dest, src)); + emit_insn (gen_xload8qi_A (dest2, src)); else - emit_insn (gen_xload_A (dest, src)); + { + rtx reg_22 = gen_rtx_REG (mode, 22); + if (reg_overlap_mentioned_p (dest2, reg_22) + || reg_overlap_mentioned_p (dest2, all_regs_rtx[21])) + dest2 = gen_reg_rtx (mode); + + emit_insn (gen_xload_A (dest2, src)); + } + + if (dest2 != dest) + emit_move_insn (dest, dest2); DONE; } @@ -1529,9 +1566,8 @@ "#" "&& reload_completed" [(parallel [(set (match_dup 0) - (plus:HI - (zero_extend:HI (match_dup 1)) - (zero_extend:HI (match_dup 2)))) + (plus:HI (zero_extend:HI (match_dup 1)) + (zero_extend:HI (match_dup 2)))) (clobber (reg:CC REG_CC))])]) @@ -2152,7 +2188,8 @@ (define_expand "mulqi3_call" [(set (reg:QI 24) (match_operand:QI 1 "register_operand" "")) (set (reg:QI 22) (match_operand:QI 2 "register_operand" "")) - (parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) + (parallel [(set (reg:QI 24) + (mult:QI (reg:QI 24) (reg:QI 22))) (clobber (reg:QI 22))]) (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))] "" @@ -2166,12 +2203,14 @@ "!AVR_HAVE_MUL" "#" "&& reload_completed" - [(parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) + [(parallel [(set (reg:QI 24) + (mult:QI (reg:QI 24) (reg:QI 22))) (clobber (reg:QI 22)) (clobber (reg:CC REG_CC))])]) (define_insn "*mulqi3_call" - [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) + [(set (reg:QI 24) + (mult:QI (reg:QI 24) (reg:QI 22))) (clobber (reg:QI 22)) (clobber (reg:CC REG_CC))] "!AVR_HAVE_MUL && reload_completed" @@ -2307,7 +2346,7 @@ [(set (match_operand:PSI 0 "register_operand" "=r") (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand" "r") (const_int 23)) - (match_operand:PSI 2 "register_operand" "0"))) + (match_operand:PSI 2 "register_operand" "0"))) (clobber (reg:CC REG_CC))] "reload_completed" "mov __tmp_reg__,%C1\;lsl __tmp_reg__ @@ -2433,7 +2472,7 @@ [(set (match_operand:HI 0 "register_operand" "=r") (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a")) (zero_extend:HI (match_operand:QI 2 "register_operand" "a")))) - (clobber (reg:CC REG_CC))] + (clobber (reg:CC REG_CC))] "AVR_HAVE_MUL && reload_completed" "mulsu %1,%2 movw %0,r0 @@ -3088,7 +3127,7 @@ [(parallel [(set (match_dup 0) (mult:HI (zero_extend:HI (match_dup 1)) (match_dup 2))) - (clobber (reg:CC REG_CC))])]) + (clobber (reg:CC REG_CC))])]) (define_insn "*muluqihi3" [(set (match_operand:HI 0 "register_operand" "=&r") @@ -3706,17 +3745,17 @@ ;; CSE has problems to operate on hard regs. ;; (define_insn_and_split "divmodqi4" - [(set (match_operand:QI 0 "pseudo_register_operand" "") - (div:QI (match_operand:QI 1 "pseudo_register_operand" "") - (match_operand:QI 2 "pseudo_register_operand" ""))) - (set (match_operand:QI 3 "pseudo_register_operand" "") + [(set (match_operand:QI 0 "pseudo_register_operand") + (div:QI (match_operand:QI 1 "pseudo_register_operand") + (match_operand:QI 2 "pseudo_register_operand"))) + (set (match_operand:QI 3 "pseudo_register_operand") (mod:QI (match_dup 1) (match_dup 2))) (clobber (reg:QI 22)) (clobber (reg:QI 23)) (clobber (reg:QI 24)) (clobber (reg:QI 25))] "" - "this divmodqi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:QI 24) (match_dup 1)) (set (reg:QI 22) (match_dup 2)) @@ -3752,17 +3791,17 @@ [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodqi4" - [(set (match_operand:QI 0 "pseudo_register_operand" "") - (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "") - (match_operand:QI 2 "pseudo_register_operand" ""))) - (set (match_operand:QI 3 "pseudo_register_operand" "") - (umod:QI (match_dup 1) (match_dup 2))) - (clobber (reg:QI 22)) - (clobber (reg:QI 23)) - (clobber (reg:QI 24)) - (clobber (reg:QI 25))] - "" - "this udivmodqi4 pattern should have been splitted;" + [(set (match_operand:QI 0 "pseudo_register_operand") + (udiv:QI (match_operand:QI 1 "pseudo_register_operand") + (match_operand:QI 2 "pseudo_register_operand"))) + (set (match_operand:QI 3 "pseudo_register_operand") + (umod:QI (match_dup 1) (match_dup 2))) + (clobber (reg:QI 22)) + (clobber (reg:QI 23)) + (clobber (reg:QI 24)) + (clobber (reg:QI 25))] + "" + { gcc_unreachable(); } "" [(set (reg:QI 24) (match_dup 1)) (set (reg:QI 22) (match_dup 2)) @@ -3794,17 +3833,17 @@ [(set_attr "type" "xcall")]) (define_insn_and_split "divmodhi4" - [(set (match_operand:HI 0 "pseudo_register_operand" "") - (div:HI (match_operand:HI 1 "pseudo_register_operand" "") - (match_operand:HI 2 "pseudo_register_operand" ""))) - (set (match_operand:HI 3 "pseudo_register_operand" "") + [(set (match_operand:HI 0 "pseudo_register_operand") + (div:HI (match_operand:HI 1 "pseudo_register_operand") + (match_operand:HI 2 "pseudo_register_operand"))) + (set (match_operand:HI 3 "pseudo_register_operand") (mod:HI (match_dup 1) (match_dup 2))) (clobber (reg:QI 21)) (clobber (reg:HI 22)) (clobber (reg:HI 24)) (clobber (reg:HI 26))] "" - "this should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:HI 24) (match_dup 1)) (set (reg:HI 22) (match_dup 2)) @@ -3840,17 +3879,17 @@ [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodhi4" - [(set (match_operand:HI 0 "pseudo_register_operand" "") - (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "") - (match_operand:HI 2 "pseudo_register_operand" ""))) - (set (match_operand:HI 3 "pseudo_register_operand" "") + [(set (match_operand:HI 0 "pseudo_register_operand") + (udiv:HI (match_operand:HI 1 "pseudo_register_operand") + (match_operand:HI 2 "pseudo_register_operand"))) + (set (match_operand:HI 3 "pseudo_register_operand") (umod:HI (match_dup 1) (match_dup 2))) (clobber (reg:QI 21)) (clobber (reg:HI 22)) (clobber (reg:HI 24)) (clobber (reg:HI 26))] "" - "this udivmodhi4 pattern should have been splitted.;" + { gcc_unreachable(); } "" [(set (reg:HI 24) (match_dup 1)) (set (reg:HI 22) (match_dup 2)) @@ -3925,7 +3964,7 @@ [(parallel [(set (match_dup 0) (mult:PSI (zero_extend:PSI (match_dup 1)) (zero_extend:PSI (match_dup 2)))) - (clobber (reg:CC REG_CC))])]) + (clobber (reg:CC REG_CC))])]) (define_insn "*umulqihipsi3" [(set (match_operand:PSI 0 "register_operand" "=&r") @@ -4091,14 +4130,14 @@ ;; implementation works the other way round. (define_insn_and_split "divmodpsi4" - [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") - (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "") - (match_operand:PSI 2 "pseudo_register_operand" ""))) - (set (match_operand:PSI 3 "pseudo_register_operand" "") - (mod:PSI (match_dup 1) - (match_dup 2))) - (clobber (reg:DI 18)) - (clobber (reg:QI 26))])] + [(set (match_operand:PSI 0 "pseudo_register_operand") + (div:PSI (match_operand:PSI 1 "pseudo_register_operand") + (match_operand:PSI 2 "pseudo_register_operand"))) + (set (match_operand:PSI 3 "pseudo_register_operand") + (mod:PSI (match_dup 1) + (match_dup 2))) + (clobber (reg:DI 18)) + (clobber (reg:QI 26))] "" { gcc_unreachable(); } "" @@ -4140,14 +4179,14 @@ [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodpsi4" - [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") - (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "") - (match_operand:PSI 2 "pseudo_register_operand" ""))) - (set (match_operand:PSI 3 "pseudo_register_operand" "") - (umod:PSI (match_dup 1) - (match_dup 2))) - (clobber (reg:DI 18)) - (clobber (reg:QI 26))])] + [(set (match_operand:PSI 0 "pseudo_register_operand") + (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand") + (match_operand:PSI 2 "pseudo_register_operand"))) + (set (match_operand:PSI 3 "pseudo_register_operand") + (umod:PSI (match_dup 1) + (match_dup 2))) + (clobber (reg:DI 18)) + (clobber (reg:QI 26))] "" { gcc_unreachable(); } "" @@ -4191,17 +4230,18 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_insn_and_split "divmodsi4" - [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") - (div:SI (match_operand:SI 1 "pseudo_register_operand" "") - (match_operand:SI 2 "pseudo_register_operand" ""))) - (set (match_operand:SI 3 "pseudo_register_operand" "") - (mod:SI (match_dup 1) (match_dup 2))) - (clobber (reg:SI 18)) - (clobber (reg:SI 22)) - (clobber (reg:HI 26)) - (clobber (reg:HI 30))])] + [(set (match_operand:SI 0 "pseudo_register_operand") + (div:SI (match_operand:SI 1 "pseudo_register_operand") + (match_operand:SI 2 "pseudo_register_operand"))) + (set (match_operand:SI 3 "pseudo_register_operand") + (mod:SI (match_dup 1) + (match_dup 2))) + (clobber (reg:SI 18)) + (clobber (reg:SI 22)) + (clobber (reg:HI 26)) + (clobber (reg:HI 30))] "" - "this divmodsi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:SI 22) (match_dup 1)) (set (reg:SI 18) (match_dup 2)) @@ -4237,17 +4277,18 @@ [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodsi4" - [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") - (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "") - (match_operand:SI 2 "pseudo_register_operand" ""))) - (set (match_operand:SI 3 "pseudo_register_operand" "") - (umod:SI (match_dup 1) (match_dup 2))) - (clobber (reg:SI 18)) - (clobber (reg:SI 22)) - (clobber (reg:HI 26)) - (clobber (reg:HI 30))])] + [(set (match_operand:SI 0 "pseudo_register_operand") + (udiv:SI (match_operand:SI 1 "pseudo_register_operand") + (match_operand:SI 2 "pseudo_register_operand"))) + (set (match_operand:SI 3 "pseudo_register_operand") + (umod:SI (match_dup 1) + (match_dup 2))) + (clobber (reg:SI 18)) + (clobber (reg:SI 22)) + (clobber (reg:HI 26)) + (clobber (reg:HI 30))] "" - "this udivmodsi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:SI 22) (match_dup 1)) (set (reg:SI 18) (match_dup 2)) @@ -4712,7 +4753,8 @@ [(parallel [(set (match_operand:HISI 0 "register_operand") (bitop:HISI (match_dup 0) (match_operand:HISI 1 "register_operand"))) - (clobber (scratch:QI))])] + (clobber (scratch:QI)) + (clobber (reg:CC REG_CC))])] "optimize && reload_completed" [(const_int 1)] @@ -4726,6 +4768,43 @@ DONE; }) +;; If $0 = $0 const requires a QI scratch, and d-reg $1 dies after +;; the first insn, then we can replace +;; $0 = $1 +;; $0 = $0 const +;; by +;; $1 = $1 const +;; $0 = $1 +;; This transorms constraint alternative "r,0,n,&d" of the first operation +;; to alternative "d,0,n,X". +;; "*addhi3_clobber" "*addpsi3" "*addsi3" +;; "*addhq3" "*adduhq3" "*addha3" "*adduha3" +;; "*addsq3" "*addusq3" "*addsa3" "*addusa3" +;; "*iorhi3" "*iorpsi3" "*iorsi3" +;; "*andhi3" "*andpsi3" "*andsi3" +(define_peephole2 + [(parallel [(set (match_operand:ORDERED234 0 "register_operand") + (match_operand:ORDERED234 1 "d_register_operand")) + (clobber (reg:CC REG_CC))]) + (parallel [(set (match_dup 0) + (piaop:ORDERED234 (match_dup 0) + (match_operand:ORDERED234 2 "const_operand"))) + ; A d-reg as scratch tells that this insn is expensive, and + ; that $0 is not a d-register: l-reg or something like SI:14 etc. + (clobber (match_operand:QI 3 "d_register_operand")) + (clobber (reg:CC REG_CC))])] + "peep2_reg_dead_p (1, operands[1])" + [(parallel [(set (match_dup 1) + (piaop:ORDERED234 (match_dup 1) + (match_dup 2))) + (clobber (scratch:QI)) + (clobber (reg:CC REG_CC))]) + ; Unfortunately, the following insn misses a REG_DEAD note for $1, + ; so this peep2 works only once. + (parallel [(set (match_dup 0) + (match_dup 1)) + (clobber (reg:CC REG_CC))])]) + ;; swap swap swap swap swap swap swap swap swap swap swap swap swap swap swap ;; swap @@ -5684,7 +5763,7 @@ ;; "lshrha3" "lshruha3" (define_insn_and_split "lshr3" [(set (match_operand:ALL2 0 "register_operand" "=r,r,r,r,r,r,r") - (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") + (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))] "" "#" @@ -5696,7 +5775,7 @@ (define_insn "*lshr3" [(set (match_operand:ALL2 0 "register_operand" "=r,r,r,r,r,r,r") - (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") + (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm"))) (clobber (reg:CC REG_CC))] "reload_completed" @@ -6449,80 +6528,41 @@ ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> ;; compare -; Optimize negated tests into reverse compare if overflow is undefined. -(define_insn "*negated_tstqi" - [(set (reg:CC REG_CC) - (compare:CC (neg:QI (match_operand:QI 0 "register_operand" "r")) - (const_int 0)))] - "reload_completed && !flag_wrapv && !flag_trapv" - "cp __zero_reg__,%0" - [(set_attr "length" "1")]) - -(define_insn "*reversed_tstqi" +;; "*swapped_tstqi" "*swapped_tstqq" +(define_insn "*swapped_tst" [(set (reg:CC REG_CC) - (compare:CC (const_int 0) - (match_operand:QI 0 "register_operand" "r")))] + (compare:CC (match_operand:ALLs1 0 "const0_operand" "Y00") + (match_operand:ALLs1 1 "register_operand" "r")))] "reload_completed" - "cp __zero_reg__,%0" -[(set_attr "length" "2")]) + "cp __zero_reg__,%1" +[(set_attr "length" "1")]) -(define_insn "*negated_tsthi" - [(set (reg:CC REG_CC) - (compare:CC (neg:HI (match_operand:HI 0 "register_operand" "r")) - (const_int 0)))] - "reload_completed && !flag_wrapv && !flag_trapv" - "cp __zero_reg__,%A0 - cpc __zero_reg__,%B0" -[(set_attr "length" "2")]) - -;; Leave here the clobber used by the cmphi pattern for simplicity, even -;; though it is unused, because this pattern is synthesized by avr_reorg. -(define_insn "*reversed_tsthi" + +;; "*swapped_tsthi" "*swapped_tsthq" "*swapped_tstha" +(define_insn "*swapped_tst" [(set (reg:CC REG_CC) - (compare:CC (const_int 0) - (match_operand:HI 0 "register_operand" "r"))) - (clobber (match_scratch:QI 1 "=X"))] + (compare:CC (match_operand:ALLs2 0 "const0_operand" "Y00") + (match_operand:ALLs2 1 "register_operand" "r")))] "reload_completed" - "cp __zero_reg__,%A0 - cpc __zero_reg__,%B0" -[(set_attr "length" "2")]) + "cp __zero_reg__,%A1 + cpc __zero_reg__,%B1" + [(set_attr "length" "2")]) -(define_insn "*negated_tstpsi" - [(set (reg:CC REG_CC) - (compare:CC (neg:PSI (match_operand:PSI 0 "register_operand" "r")) - (const_int 0)))] - "reload_completed && !flag_wrapv && !flag_trapv" - "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0" - [(set_attr "length" "3")]) -(define_insn "*reversed_tstpsi" +(define_insn "*swapped_tstpsi" [(set (reg:CC REG_CC) (compare:CC (const_int 0) - (match_operand:PSI 0 "register_operand" "r"))) - (clobber (match_scratch:QI 1 "=X"))] + (match_operand:PSI 0 "register_operand" "r")))] "reload_completed" "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0" [(set_attr "length" "3")]) -(define_insn "*negated_tstsi" - [(set (reg:CC REG_CC) - (compare:CC (neg:SI (match_operand:SI 0 "register_operand" "r")) - (const_int 0)))] - "reload_completed && !flag_wrapv && !flag_trapv" - "cp __zero_reg__,%A0 - cpc __zero_reg__,%B0 - cpc __zero_reg__,%C0 - cpc __zero_reg__,%D0" - [(set_attr "length" "4")]) -;; "*reversed_tstsi" -;; "*reversed_tstsq" "*reversed_tstusq" -;; "*reversed_tstsa" "*reversed_tstusa" -(define_insn "*reversed_tst" +;; "*swapped_tstsi" "*swapped_tstsq" "*swapped_tstsa" +(define_insn "*swapped_tst" [(set (reg:CC REG_CC) - (compare:CC (match_operand:ALL4 0 "const0_operand" "Y00") - (match_operand:ALL4 1 "register_operand" "r"))) - (clobber (match_scratch:QI 2 "=X"))] + (compare:CC (match_operand:ALLs4 0 "const0_operand" "Y00") + (match_operand:ALLs4 1 "register_operand" "r")))] "reload_completed" "cp __zero_reg__,%A1 cpc __zero_reg__,%B1 @@ -6536,38 +6576,40 @@ (define_insn "cmp3" [(set (reg:CC REG_CC) (compare:CC (match_operand:ALL1 0 "register_operand" "r ,r,d") - (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))] + (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))] "reload_completed" "@ - tst %0 + cp %0, __zero_reg__ cp %0,%1 cpi %0,lo8(%1)" [(set_attr "length" "1,1,1")]) -(define_insn "*cmpqi_sign_extend" - [(set (reg:CC REG_CC) - (compare:CC (sign_extend:HI (match_operand:QI 0 "register_operand" "d")) - (match_operand:HI 1 "s8_operand" "n")))] - "reload_completed" - "cpi %0,lo8(%1)" - [(set_attr "length" "1")]) - -(define_insn "*cmphi.zero-extend.0" +;; May be generated by "*cbranch..0/1". +(define_insn "*cmp..0" [(set (reg:CC REG_CC) - (compare:CC (zero_extend:HI (match_operand:QI 0 "register_operand" "r")) - (match_operand:HI 1 "register_operand" "r")))] - "reload_completed" - "cp %0,%A1\;cpc __zero_reg__,%B1" - [(set_attr "length" "2")]) + (compare:CC (any_extend:HISI (match_operand:QIPSI 0 "register_operand" "r")) + (match_operand:HISI 1 "register_operand" "r")))] + "reload_completed + && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + { + return avr_out_cmp_ext (operands, , nullptr); + } + [(set_attr "adjust_len" "cmp_ext")]) -(define_insn "*cmphi.zero-extend.1" +;; Swapped version of the above. +;; May be generated by "*cbranch..0/1". +(define_insn "*cmp..1" [(set (reg:CC REG_CC) - (compare:CC (match_operand:HI 0 "register_operand" "r") - (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))))] - "reload_completed" - "cp %A0,%1\;cpc %B0,__zero_reg__" - [(set_attr "length" "2")]) + (compare:CC (match_operand:HISI 0 "register_operand" "r") + (any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))))] + "reload_completed + && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + { + return avr_out_cmp_ext (operands, , nullptr); + } + [(set_attr "adjust_len" "cmp_ext")]) + ;; "cmphi3" ;; "cmphq3" "cmpuhq3" @@ -6575,8 +6617,8 @@ (define_insn "cmp3" [(set (reg:CC REG_CC) (compare:CC (match_operand:ALL2 0 "register_operand" "!w ,r ,r,d ,r ,d,r") - (match_operand:ALL2 1 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn"))) - (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d ,X,&d"))] + (match_operand:ALL2 1 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn"))) + (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d ,X,&d"))] "reload_completed" { switch (which_alternative) @@ -6603,14 +6645,14 @@ return avr_out_compare (insn, operands, NULL); } - [(set_attr "length" "1,2,2,3,4,2,4") + [(set_attr "length" "2,2,2,3,4,2,4") (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")]) (define_insn "*cmppsi" [(set (reg:CC REG_CC) (compare:CC (match_operand:PSI 0 "register_operand" "r,r,d ,r ,d,r") - (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s ,M,n"))) - (clobber (match_scratch:QI 2 "=X,X,&d,&d ,X,&d"))] + (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s ,M,n"))) + (clobber (match_scratch:QI 2 "=X,X,&d,&d ,X,&d"))] "reload_completed" { switch (which_alternative) @@ -6641,8 +6683,8 @@ (define_insn "*cmp" [(set (reg:CC REG_CC) (compare:CC (match_operand:ALL4 0 "register_operand" "r ,r ,d,r ,r") - (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn"))) - (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d"))] + (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn"))) + (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d"))] "reload_completed" { if (0 == which_alternative) @@ -6656,6 +6698,13 @@ (set_attr "adjust_len" "tstsi,*,compare,compare,compare")]) +;; A helper for avr_pass_ifelse::avr_rest_of_handle_ifelse(). +(define_expand "gen_compare" + [(parallel [(set (reg:CC REG_CC) + (compare:CC (match_operand:HISI 0 "register_operand") + (match_operand:HISI 1 "const_int_operand"))) + (clobber (match_operand:QI 2 "scratch_operand"))])]) + ;; ---------------------------------------------------------------------- ;; JUMP INSTRUCTIONS ;; ---------------------------------------------------------------------- @@ -6664,53 +6713,67 @@ (define_expand "cbranch4" [(set (pc) (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand:ALL1 1 "register_operand" "") - (match_operand:ALL1 2 "nonmemory_operand" "")]) - (label_ref (match_operand 3 "" "")) - (pc)))]) + [(match_operand:ALL1 1 "register_operand") + (match_operand:ALL1 2 "nonmemory_operand")]) + (label_ref (match_operand 3)) + (pc)))] + "" + { + int icode = (int) GET_CODE (operands[0]); + + targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); + PUT_CODE (operands[0], (enum rtx_code) icode); + }) (define_expand "cbranch4" [(parallel [(set (pc) - (if_then_else - (match_operator 0 "ordered_comparison_operator" - [(match_operand:ORDERED234 1 "register_operand" "") - (match_operand:ORDERED234 2 "nonmemory_operand" "")]) - (label_ref (match_operand 3 "" "")) - (pc))) - (clobber (match_scratch:QI 4 ""))])]) - -;; "*cbranchqi4" -;; "*cbranchqq4" "*cbranchuqq4" -(define_insn_and_split "*cbranch4" + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:ALL234 1 "register_operand") + (match_operand:ALL234 2 "nonmemory_operand")]) + (label_ref (match_operand 3)) + (pc))) + (clobber (match_scratch:QI 4))])] + "" + { + int icode = (int) GET_CODE (operands[0]); + + targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); + PUT_CODE (operands[0], (enum rtx_code) icode); + }) + + +;; "cbranchqi4_insn" +;; "cbranchqq4_insn" "cbranchuqq4_insn" +(define_insn_and_split "cbranch4_insn" [(set (pc) (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand:ALL1 1 "register_operand" "r ,r,d") + [(match_operand:ALL1 1 "register_operand" "r ,r,d") (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")]) - (label_ref (match_operand 3 "" "")) - (pc)))] + (label_ref (match_operand 3)) + (pc)))] "" "#" "reload_completed" [(set (reg:CC REG_CC) - (compare:CC (match_dup 1) (match_dup 2))) + (compare:CC (match_dup 1) (match_dup 2))) (set (pc) (if_then_else (match_op_dup 0 [(reg:CC REG_CC) (const_int 0)]) (label_ref (match_dup 3)) - (pc)))] - "") + (pc)))]) -;; "*cbranchsi4" "*cbranchsq4" "*cbranchusq4" "*cbranchsa4" "*cbranchusa4" -(define_insn_and_split "*cbranch4" +;; "cbranchsi4_insn" +;; "cbranchsq4_insn" "cbranchusq4_insn" "cbranchsa4_insn" "cbranchusa4_insn" +(define_insn_and_split "cbranch4_insn" [(set (pc) - (if_then_else - (match_operator 0 "ordered_comparison_operator" - [(match_operand:ALL4 1 "register_operand" "r ,r ,d,r ,r") - (match_operand:ALL4 2 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")]) - (label_ref (match_operand 3 "" "")) - (pc))) - (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d"))] + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(match_operand:ALL4 1 "register_operand" "r ,r,d,r ,r") + (match_operand:ALL4 2 "nonmemory_operand" "Y00,r,M,M ,n Ynn")]) + (label_ref (match_operand 3)) + (pc))) + (clobber (match_scratch:QI 4 "=X ,X,X,&d,&d"))] "" "#" "reload_completed" @@ -6721,19 +6784,18 @@ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) (const_int 0)]) (label_ref (match_dup 3)) - (pc)))] - "") + (pc)))]) -;; "*cbranchpsi4" -(define_insn_and_split "*cbranchpsi4" +;; "cbranchpsi4_insn" +(define_insn_and_split "cbranchpsi4_insn" [(set (pc) - (if_then_else - (match_operator 0 "ordered_comparison_operator" - [(match_operand:PSI 1 "register_operand" "r,r,d ,r ,d,r") - (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")]) - (label_ref (match_operand 3 "" "")) - (pc))) - (clobber (match_scratch:QI 4 "=X,X,&d,&d ,X,&d"))] + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(match_operand:PSI 1 "register_operand" "r,r,d ,r ,d,r") + (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")]) + (label_ref (match_operand 3)) + (pc))) + (clobber (match_scratch:QI 4 "=X,X,&d,&d,X,&d"))] "" "#" "reload_completed" @@ -6744,19 +6806,19 @@ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) (const_int 0)]) (label_ref (match_dup 3)) - (pc)))] - "") + (pc)))]) -;; "*cbranchhi4" "*cbranchhq4" "*cbranchuhq4" "*cbranchha4" "*cbranchuha4" -(define_insn_and_split "*cbranch4" +;; "cbranchhi4_insn" +;; "cbranchhq4_insn" "cbranchuhq4_insn" "cbranchha4_insn" "cbranchuha4_insn" +(define_insn_and_split "cbranch4_insn" [(set (pc) - (if_then_else - (match_operator 0 "ordered_comparison_operator" - [(match_operand:ALL2 1 "register_operand" "!w ,r ,r,d ,r ,d,r") - (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")]) - (label_ref (match_operand 3 "" "")) - (pc))) - (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d ,X,&d"))] + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(match_operand:ALL2 1 "register_operand" "!w ,r ,r,d ,r ,d,r") + (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")]) + (label_ref (match_operand 3)) + (pc))) + (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d,X,&d"))] "" "#" "reload_completed" @@ -6767,8 +6829,71 @@ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) (const_int 0)]) (label_ref (match_dup 3)) - (pc)))] - "") + (pc)))]) + +;; Combiner pattern to compare sign- or zero-extended register against +;; a wider register, like comparing uint8_t against uint16_t. +(define_insn_and_split "*cbranch..0" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r")) + (match_operand:HISI 2 "register_operand" "r")]) + (label_ref (match_operand 3)) + (pc)))] + "optimize + && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + "#" + "&& reload_completed" + [; "*cmp..0" + (set (reg:CC REG_CC) + (compare:CC (match_dup 1) + (match_dup 2))) + ; "branch" + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_dup 3)) + (pc)))] + { + operands[1] = gen_rtx_ (mode, operands[1]); + if (difficult_comparison_operator (operands[0], VOIDmode)) + { + PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0]))); + std::swap (operands[1], operands[2]); + } + }) + +;; Same combiner pattern, but with swapped operands. +(define_insn_and_split "*cbranch..0" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:HISI 1 "register_operand" "r") + (any_extend:HISI (match_operand:QIPSI 2 "register_operand" "r"))]) + (label_ref (match_operand 3)) + (pc)))] + "optimize + && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + "#" + "&& reload_completed" + [; "*cmp..0" + (set (reg:CC REG_CC) + (compare:CC (match_dup 1) + (match_dup 2))) + ; "branch" + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_dup 3)) + (pc)))] + { + operands[2] = gen_rtx_ (mode, operands[2]); + if (difficult_comparison_operator (operands[0], VOIDmode)) + { + PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0]))); + std::swap (operands[1], operands[2]); + } + }) + ;; Test a single bit in a QI/HI/SImode register. ;; Combine will create zero extract patterns for single bit tests. @@ -6842,14 +6967,11 @@ "#" "&& reload_completed" [(parallel [(set (pc) - (if_then_else - (match_op_dup 0 - [(and:QISI - (match_dup 1) - (match_dup 2)) - (const_int 0)]) - (label_ref (match_dup 3)) - (pc))) + (if_then_else (match_op_dup 0 [(and:QISI (match_dup 1) + (match_dup 2)) + (const_int 0)]) + (label_ref (match_dup 3)) + (pc))) (clobber (reg:CC REG_CC))])]) (define_insn "*sbrx_and_branch" @@ -6878,163 +7000,77 @@ (const_int 2) (const_int 4))))]) -;; Convert sign tests to bit 7/15/31 tests that match the above insns. -(define_peephole2 - [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "") - (const_int 0))) - (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (eq (zero_extract:HI (match_dup 0) - (const_int 1) - (const_int 7)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) - (clobber (reg:CC REG_CC))])]) - -(define_peephole2 - [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "") - (const_int 0))) - (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (ne (zero_extract:HI (match_dup 0) - (const_int 1) - (const_int 7)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) - (clobber (reg:CC REG_CC))])]) - -(define_peephole2 - [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "") - (const_int 0))) - (clobber (match_operand:HI 2 ""))]) - (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (eq (and:HI (match_dup 0) (const_int -32768)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) - (clobber (reg:CC REG_CC))])]) -(define_peephole2 - [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "") - (const_int 0))) - (clobber (match_operand:HI 2 ""))]) - (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) +;; Convert sign tests to bit 7 tests that match the above insns. +(define_peephole2 ; "*sbrx_branch" + [(set (reg:CC REG_CC) + (compare:CC (match_operand:ALLs1 0 "register_operand") + (match_operand:ALLs1 1 "const0_operand"))) + (set (pc) + (if_then_else (gelt (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "peep2_regno_dead_p (2, REG_CC)" + [(parallel [(set (pc) + (if_then_else ( (zero_extract:HI (match_dup 0) + (const_int 1) + (match_dup 1)) + (const_int 0)) + (label_ref (match_dup 2)) + (pc))) (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (ne (and:HI (match_dup 0) (const_int -32768)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) - (clobber (reg:CC REG_CC))])]) + { + operands[0] = avr_to_int_mode (operands[0]); + operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); + }) -(define_peephole2 - [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "") - (const_int 0))) - (clobber (match_operand:SI 2 ""))]) - (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (eq (and:SI (match_dup 0) (match_dup 2)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) +;; Convert sign tests to bit 15/23/31 tests that match the above insns. +(define_peephole2 ; "*sbrx_branch" + [(parallel [(set (reg:CC REG_CC) + (compare:CC (match_operand:ALLs234 0 "register_operand") + (match_operand:ALLs234 1 "const0_operand"))) + (clobber (match_operand:QI 3 "scratch_operand"))]) + (set (pc) + (if_then_else (gelt (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "peep2_regno_dead_p (2, REG_CC)" + [(parallel [(set (pc) + (if_then_else ( (zero_extract:HI (match_dup 0) + (const_int 1) + (match_dup 1)) + (const_int 0)) + (label_ref (match_dup 2)) + (pc))) (clobber (reg:CC REG_CC))])] - "operands[2] = gen_int_mode (-2147483647 - 1, SImode);") + { + operands[0] = avr_to_int_mode (operands[0]); + operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); + }) -(define_peephole2 - [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "") - (const_int 0))) - (clobber (match_operand:SI 2 ""))]) - (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" - [(parallel [(set (pc) (if_then_else (ne (and:SI (match_dup 0) (match_dup 2)) - (const_int 0)) - (label_ref (match_dup 1)) - (pc))) - (clobber (reg:CC REG_CC))])] - "operands[2] = gen_int_mode (-2147483647 - 1, SImode);") ;; ************************************************************************ ;; Implementation of conditional jumps here. ;; Compare with 0 (test) jumps ;; ************************************************************************ -(define_insn_and_split "branch" +(define_insn "branch" [(set (pc) (if_then_else (match_operator 1 "simple_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_operand 0 "" "")) + [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_operand 0)) (pc)))] "reload_completed" - "#" - "&& reload_completed" - [(parallel [(set (pc) - (if_then_else (match_op_dup 1 - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_dup 0)) - (pc))) - (clobber (reg:CC REG_CC))])]) - -(define_insn "*branch" - [(set (pc) - (if_then_else (match_operator 1 "simple_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_operand 0 "" "")) - (pc))) - (clobber (reg:CC REG_CC))] - "reload_completed" { return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); } [(set_attr "type" "branch")]) -;; Same as above but wrap SET_SRC so that this branch won't be transformed -;; or optimized in the remainder. - -(define_insn "branch_unspec" - [(set (pc) - (unspec [(if_then_else (match_operator 1 "simple_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_operand 0 "" "")) - (pc)) - ] UNSPEC_IDENTITY)) - (clobber (reg:CC REG_CC))] - "reload_completed" - { - return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); - } - [(set_attr "type" "branch")]) - -;; **************************************************************** -;; AVR does not have following conditional jumps: LE,LEU,GT,GTU. -;; Convert them all to proper jumps. -;; ****************************************************************/ - -(define_insn_and_split "difficult_branch" +(define_insn "difficult_branch" [(set (pc) (if_then_else (match_operator 1 "difficult_comparison_operator" [(reg:CC REG_CC) @@ -7042,95 +7078,11 @@ (label_ref (match_operand 0 "" "")) (pc)))] "reload_completed" - "#" - "&& reload_completed" - [(parallel [(set (pc) - (if_then_else (match_op_dup 1 - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_dup 0)) - (pc))) - (clobber (reg:CC REG_CC))])]) - -(define_insn "*difficult_branch" - [(set (pc) - (if_then_else (match_operator 1 "difficult_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (label_ref (match_operand 0 "" "")) - (pc))) - (clobber (reg:CC REG_CC))] - "reload_completed" { return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); } [(set_attr "type" "branch1")]) -;; revers branch - -(define_insn_and_split "rvbranch" - [(set (pc) - (if_then_else (match_operator 1 "simple_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_operand 0 "" ""))))] - "reload_completed" - "#" - "&& reload_completed" - [(parallel [(set (pc) - (if_then_else (match_op_dup 1 - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_dup 0)))) - (clobber (reg:CC REG_CC))])]) - -(define_insn "*rvbranch" - [(set (pc) - (if_then_else (match_operator 1 "simple_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_operand 0 "" "")))) - (clobber (reg:CC REG_CC))] - "reload_completed" - { - return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); - } - [(set_attr "type" "branch1")]) - -(define_insn_and_split "difficult_rvbranch" - [(set (pc) - (if_then_else (match_operator 1 "difficult_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_operand 0 "" ""))))] - "reload_completed" - "#" - "&& reload_completed" - [(parallel [(set (pc) - (if_then_else (match_op_dup 1 - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_dup 0)))) - (clobber (reg:CC REG_CC))])]) - -(define_insn "*difficult_rvbranch" - [(set (pc) - (if_then_else (match_operator 1 "difficult_comparison_operator" - [(reg:CC REG_CC) - (const_int 0)]) - (pc) - (label_ref (match_operand 0 "" "")))) - (clobber (reg:CC REG_CC))] - "reload_completed" - { - return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); - } - [(set_attr "type" "branch")]) ;; ************************************************************************** ;; Unconditional and other jump instructions. @@ -7656,15 +7608,14 @@ (clobber (reg:CC REG_CC))]) (parallel [(set (reg:CC REG_CC) (compare:CC (match_dup 0) - (const_int -1))) - (clobber (match_operand:QI 1 "d_register_operand" ""))]) - (parallel [(set (pc) - (if_then_else (eqne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 2 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" + (const_int -1))) + (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))]) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "dead_or_set_regno_p (insn, REG_CC)" { const char *op; int jump_mode; @@ -7700,15 +7651,14 @@ (clobber (reg:CC REG_CC))]) (parallel [(set (reg:CC REG_CC) (compare:CC (match_dup 0) - (const_int -1))) + (const_int -1))) (clobber (match_operand:QI 1 "d_register_operand" ""))]) - (parallel [(set (pc) - (if_then_else (eqne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 2 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "dead_or_set_regno_p (insn, REG_CC)" { const char *op; int jump_mode; @@ -7742,15 +7692,14 @@ (clobber (reg:CC REG_CC))]) (parallel [(set (reg:CC REG_CC) (compare:CC (match_dup 0) - (const_int -1))) - (clobber (match_operand:QI 1 "d_register_operand" ""))]) - (parallel [(set (pc) - (if_then_else (eqne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 2 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" + (const_int -1))) + (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))]) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "dead_or_set_regno_p (insn, REG_CC)" { const char *op; int jump_mode; @@ -7784,15 +7733,14 @@ (clobber (reg:CC REG_CC))]) (parallel [(set (reg:CC REG_CC) (compare:CC (match_dup 0) - (const_int -1))) + (const_int -1))) (clobber (match_operand:QI 1 "d_register_operand" ""))]) - (parallel [(set (pc) - (if_then_else (eqne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 2 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "dead_or_set_regno_p (insn, REG_CC)" { const char *op; int jump_mode; @@ -7822,14 +7770,13 @@ (clobber (reg:CC REG_CC))]) (set (reg:CC REG_CC) (compare:CC (match_dup 0) - (const_int -1))) - (parallel [(set (pc) - (if_then_else (eqne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 1 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "" + (const_int -1))) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 1)) + (pc)))] + "dead_or_set_regno_p (insn, REG_CC)" { const char *op; int jump_mode; @@ -7855,14 +7802,14 @@ (define_peephole ; "*cpse.eq" [(set (reg:CC REG_CC) (compare:CC (match_operand:ALL1 1 "register_operand" "r,r") - (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00"))) - (parallel [(set (pc) - (if_then_else (eq (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "jump_over_one_insn_p (insn, operands[0])" + (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00"))) + (set (pc) + (if_then_else (eq (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 0)) + (pc)))] + "jump_over_one_insn_p (insn, operands[0]) + && dead_or_set_regno_p (insn, REG_CC)" "@ cpse %1,%2 cpse %1,__zero_reg__") @@ -7890,16 +7837,16 @@ (define_peephole ; "*cpse.ne" [(set (reg:CC REG_CC) - (compare:CC (match_operand:ALL1 1 "register_operand" "") - (match_operand:ALL1 2 "reg_or_0_operand" ""))) - (parallel [(set (pc) - (if_then_else (ne (reg:CC REG_CC) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc))) - (clobber (reg:CC REG_CC))])] - "!AVR_HAVE_JMP_CALL - || !TARGET_SKIP_BUG" + (compare:CC (match_operand:ALL1 1 "register_operand") + (match_operand:ALL1 2 "reg_or_0_operand"))) + (set (pc) + (if_then_else (ne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 0)) + (pc)))] + "(!AVR_HAVE_JMP_CALL + || !TARGET_SKIP_BUG) + && dead_or_set_regno_p (insn, REG_CC)" { if (operands[2] == CONST0_RTX (mode)) operands[2] = zero_reg_rtx; @@ -8094,7 +8041,7 @@ (const_int 1)] UNSPECV_DELAY_CYCLES) (set (match_dup 1) - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_dup 2)) (clobber (reg:CC REG_CC))])]) @@ -8126,7 +8073,7 @@ (const_int 2)] UNSPECV_DELAY_CYCLES) (set (match_dup 1) - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_dup 2)) (clobber (reg:CC REG_CC))])] "" @@ -8163,7 +8110,7 @@ (const_int 3)] UNSPECV_DELAY_CYCLES) (set (match_dup 1) - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_dup 2)) (clobber (match_dup 3)) (clobber (match_dup 4)) @@ -8206,7 +8153,7 @@ (const_int 4)] UNSPECV_DELAY_CYCLES) (set (match_dup 1) - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_dup 2)) (clobber (match_dup 3)) (clobber (match_dup 4)) @@ -9095,16 +9042,20 @@ "bst %3,0\;bld %0,%4" [(set_attr "length" "2")]) -;; Move bit $3.0 into bit $0.0. -;; For bit 0, combiner generates slightly different pattern. -(define_insn "*movbitqi.0" - [(set (match_operand:QI 0 "register_operand" "=r") - (ior:QI (and:QI (match_operand:QI 1 "register_operand" "0") - (match_operand:QI 2 "single_zero_operand" "n")) - (and:QI (match_operand:QI 3 "register_operand" "r") - (const_int 1))))] - "0 == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode))" - "bst %3,0\;bld %0,0" +;; Move bit $3.x into bit $0.x. +(define_insn "*movbit.0-6" + [(set (match_operand:QISI 0 "register_operand" "=r") + (ior:QISI (and:QISI (match_operand:QISI 1 "register_operand" "0") + (match_operand:QISI 2 "single_zero_operand" "n")) + (and:QISI (match_operand:QISI 3 "register_operand" "r") + (match_operand:QISI 4 "single_one_operand" "n"))))] + "GET_MODE_MASK(mode) + == (GET_MODE_MASK(mode) & (INTVAL(operands[2]) ^ INTVAL(operands[4])))" + { + auto bitmask = GET_MODE_MASK (mode) & UINTVAL (operands[4]); + operands[4] = GEN_INT (exact_log2 (bitmask)); + return "bst %T3%T4" CR_TAB "bld %T0%T4"; + } [(set_attr "length" "2")]) ;; Move bit $2.0 into bit $0.7. @@ -9489,6 +9440,258 @@ (clobber (reg:CC REG_CC))])]) +;; Try optimize decrement-and-branch. When we have an addition followed +;; by a comparison of the result against zero, we can output the addition +;; in such a way that SREG.N and SREG.Z are set according to the result. + +;; { -1, +1 } for QImode, otherwise the empty set. +(define_mode_attr p1m1 [(QI "N P") + (HI "Yxx") (PSI "Yxx") (SI "Yxx")]) + +;; FIXME: reload1.cc::do_output_reload() does not support output reloads +;; for JUMP_INSNs, hence letting combine doing decrement-and-branch like +;; the following might run into ICE. Doing reloads by hand is too painful... +; +; (define_insn_and_split "*add.for.eqne..cbranch" +; [(set (pc) +; (if_then_else (eqne (match_operand:QISI 1 "register_operand" "0") +; (match_operand:QISI 2 "const_int_operand" "n")) +; (label_ref (match_operand 4)) +; (pc))) +; (set (match_operand:QISI 0 "register_operand" "=r") +; (plus:QISI (match_dup 1) +; (match_operand:QISI 3 "const_int_operand" "n")))] +; ;; No clobber for now as combine might not have one handy. +; ;; We pop a scatch in split1. +; "!reload_completed +; && const0_rtx == simplify_binary_operation (PLUS, mode, +; operands[2], operands[3])" +; { gcc_unreachable(); } +; "&& 1" +; [(parallel [(set (pc) +; (if_then_else (eqne (match_dup 1) +; (match_dup 2)) +; (label_ref (match_dup 4)) +; (pc))) +; (set (match_dup 0) +; (plus:QISI (match_dup 1) +; (match_dup 3))) +; (clobber (scratch:QI))])]) +; +;; ...Hence, stick with RTL peepholes for now. Unfortunately, there is no +;; canonical form, and if reload shuffles registers around, we might miss +;; opportunities to match a decrement-and-branch. +;; doloop_end doesn't reload either, so doloop_end also won't work. + +(define_expand "gen_add_for__" + ; "*add.for.eqne." + [(parallel [(set (reg:CC REG_CC) + (compare:CC (plus:QISI (match_operand:QISI 0 "register_operand") + (match_operand:QISI 1 "const_int_operand")) + (const_int 0))) + (set (match_dup 0) + (plus:QISI (match_dup 0) + (match_dup 1))) + (clobber (match_operand:QI 3))]) + ; "branch" + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_dup 2)) + (pc)))]) + + +;; 1/3: A version without clobber: d-reg or 8-bit adds +/-1. +(define_peephole2 + [(parallel [(set (match_operand:QISI 0 "register_operand") + (plus:QISI (match_dup 0) + (match_operand:QISI 1 "const_int_operand"))) + (clobber (reg:CC REG_CC))]) + (set (reg:CC REG_CC) + (compare:CC (match_dup 0) + (const_int 0))) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "peep2_regno_dead_p (3, REG_CC) + && (d_register_operand (operands[0], mode) + || (mode == QImode + && (INTVAL (operands[1]) == 1 + || INTVAL (operands[1]) == -1)))" + [(scratch)] + { + emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], + gen_rtx_SCRATCH (QImode))); + DONE; + }) + +;; 2/3: A version with clobber from the insn. +(define_peephole2 + [(parallel [(set (match_operand:QISI 0 "register_operand") + (plus:QISI (match_dup 0) + (match_operand:QISI 1 "const_int_operand"))) + (clobber (match_operand:QI 3 "scratch_or_d_register_operand")) + (clobber (reg:CC REG_CC))]) + (parallel [(set (reg:CC REG_CC) + (compare:CC (match_dup 0) + (const_int 0))) + (clobber (match_operand:QI 4 "scratch_or_d_register_operand"))]) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "peep2_regno_dead_p (3, REG_CC)" + [(scratch)] + { + rtx scratch = REG_P (operands[3]) ? operands[3] : operands[4]; + + // We need either a d-register or a scratch register to clobber. + if (! REG_P (scratch) + && ! d_register_operand (operands[0], mode) + && ! (QImode == mode + && (INTVAL (operands[1]) == 1 + || INTVAL (operands[1]) == -1))) + { + FAIL; + } + emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], + scratch)); + DONE; + }) + +;; 3/3 A version with a clobber from peephole2. +(define_peephole2 + [(match_scratch:QI 3 "d") + (parallel [(set (match_operand:QISI 0 "register_operand") + (plus:QISI (match_dup 0) + (match_operand:QISI 1 "const_int_operand"))) + (clobber (reg:CC REG_CC))]) + (set (reg:CC REG_CC) + (compare:CC (match_dup 0) + (const_int 0))) + (set (pc) + (if_then_else (eqne (reg:CC REG_CC) + (const_int 0)) + (label_ref (match_operand 2)) + (pc)))] + "peep2_regno_dead_p (3, REG_CC)" + [(scratch)] + { + emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], + operands[3])); + DONE; + }) + +;; Result of the above three peepholes is an addition that also +;; performs an EQ or NE comparison (of the result) against zero. +;; FIXME: Using (match_dup 0) instead of operands[3/4] makes rnregs +;; barf in regrename.cc::merge_overlapping_regs(). For now, use the +;; fix from PR50788: Constrain as "0". +(define_insn "*add.for.eqne." + [(set (reg:CC REG_CC) + (compare:CC + (plus:QISI (match_operand:QISI 3 "register_operand" "0,0 ,0") + (match_operand:QISI 1 "const_int_operand" "n,,n")) + (const_int 0))) + (set (match_operand:QISI 0 "register_operand" "=d,*r ,r") + (plus:QISI (match_operand:QISI 4 "register_operand" "0,0 ,0") + (match_dup 1))) + (clobber (match_scratch:QI 2 "=X,X ,&d"))] + "reload_completed" + { + return avr_out_plus_set_ZN (operands, nullptr); + } + [(set_attr "adjust_len" "add_set_ZN")]) + + +;; Swapping both comparison and branch condition. This can turn difficult +;; branches to easy ones. And in some cases, a comparison against one can +;; be turned into a comparison against zero. + +(define_peephole2 ; "*swapped_tst" + [(parallel [(set (reg:CC REG_CC) + (compare:CC (match_operand:ALLs234 1 "register_operand") + (match_operand:ALLs234 2 "const_operand"))) + (clobber (match_operand:QI 3 "scratch_operand"))]) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_operand 4)) + (pc)))] + "peep2_regno_dead_p (2, REG_CC)" + [(set (reg:CC REG_CC) + (compare:CC (match_dup 2) + (match_dup 1))) + ; "branch" + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_dup 4)) + (pc)))] + { + rtx xval = avr_to_int_mode (operands[2]); + enum rtx_code code = GET_CODE (operands[0]); + + if (code == GT && xval == const0_rtx) + code = LT; + else if (code == GE && xval == const1_rtx) + code = LT; + else if (code == LE && xval == const0_rtx) + code = GE; + else if (code == LT && xval == const1_rtx) + code = GE; + else + FAIL; + + operands[2] = CONST0_RTX (mode); + PUT_CODE (operands[0], code); + }) + +;; Same, but for 8-bit modes which have no scratch reg. +(define_peephole2 ; "*swapped_tst" + [(set (reg:CC REG_CC) + (compare:CC (match_operand:ALLs1 1 "register_operand") + (match_operand:ALLs1 2 "const_operand"))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_operand 4)) + (pc)))] + "peep2_regno_dead_p (2, REG_CC)" + [(set (reg:CC REG_CC) + (compare:CC (match_dup 2) + (match_dup 1))) + ; "branch" + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CC REG_CC) + (const_int 0)]) + (label_ref (match_dup 4)) + (pc)))] + { + rtx xval = avr_to_int_mode (operands[2]); + enum rtx_code code = GET_CODE (operands[0]); + + if (code == GT && xval == const0_rtx) + code = LT; + else if (code == GE && xval == const1_rtx) + code = LT; + else if (code == LE && xval == const0_rtx) + code = GE; + else if (code == LT && xval == const1_rtx) + code = GE; + else + FAIL; + + operands[2] = CONST0_RTX (mode); + PUT_CODE (operands[0], code); + }) + + (define_expand "extzv" [(set (match_operand:QI 0 "register_operand" "") (zero_extract:QI (match_operand:QI 1 "register_operand" "") diff --git a/gcc/config/avr/avr.opt b/gcc/config/avr/avr.opt index fdb1daee95a75..d38d90df52122 100644 --- a/gcc/config/avr/avr.opt +++ b/gcc/config/avr/avr.opt @@ -27,7 +27,7 @@ Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or arc -mmcu=MCU Select the target MCU. mgas-isr-prologues -Target Var(avr_gasisr_prologues) UInteger Init(0) +Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues. mn-flash= @@ -61,11 +61,11 @@ Target RejectNegative Mask(NO_INTERRUPTS) Change the stack pointer without disabling interrupts. mbranch-cost= -Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) +Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization Set the branch costs for conditional branch instructions. Reasonable values are small, non-negative integers. The default branch cost is 0. mmain-is-OS_task -Target Mask(MAIN_IS_OS_TASK) +Target Mask(MAIN_IS_OS_TASK) Optimization Treat main as if it had attribute OS_task. morder1 @@ -116,11 +116,11 @@ Target Mask(ABSDATA) Assume that all data in static storage can be accessed by LDS / STS. This option is only useful for reduced Tiny devices. mdouble= -Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) +Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save -mdouble= Use bits wide double type. mlong-double= -Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) +Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save -mlong-double= Use bits wide long double type. nodevicelib diff --git a/gcc/config/avr/constraints.md b/gcc/config/avr/constraints.md index 57397d1469bdb..3ce2108d6ce7a 100644 --- a/gcc/config/avr/constraints.md +++ b/gcc/config/avr/constraints.md @@ -245,6 +245,11 @@ (match_test "INTVAL (avr_to_int_mode (op)) == -2")) (match_test "satisfies_constraint_Cm2 (op)"))) +;; Constraint that's the empty set. Useful with mode and code iterators. +(define_constraint "Yxx" + "A constraints that is always false" + (match_test "false")) + (define_constraint "Yx2" "Fixed-point or integer constant not in the range @minus{}2 @dots{} 2" (and (ior (match_code "const_int") diff --git a/gcc/config/avr/driver-avr.cc b/gcc/config/avr/driver-avr.cc index 4de463f0cba56..59ddce3bf5632 100644 --- a/gcc/config/avr/driver-avr.cc +++ b/gcc/config/avr/driver-avr.cc @@ -103,9 +103,14 @@ avr_devicespecs_file (int argc, const char **argv) } return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str, - "specs-", mmcu, "%s} %= 16 && REGNO (op) <= 31"))) +(define_predicate "scratch_or_d_register_operand" + (ior (match_operand 0 "d_register_operand") + (and (match_code ("scratch")) + (match_operand 0 "scratch_operand")))) + (define_predicate "even_register_operand" (and (match_code "reg") (and (match_test "REGNO (op) <= 31") diff --git a/gcc/config/darwin-c.cc b/gcc/config/darwin-c.cc index 3770857aa422e..923434da5b1aa 100644 --- a/gcc/config/darwin-c.cc +++ b/gcc/config/darwin-c.cc @@ -691,7 +691,8 @@ macosx_version_as_macro (void) if (!version_array) goto fail; - if (version_array[MAJOR] < 10 || version_array[MAJOR] > 12) + /* System tools accept up to 99 as a major version. */ + if (version_array[MAJOR] < 10 || version_array[MAJOR] > 99) goto fail; if (version_array[MAJOR] == 10 && version_array[MINOR] < 10) diff --git a/gcc/config/darwin-d.cc b/gcc/config/darwin-d.cc index e983883dba638..2ceebc4985146 100644 --- a/gcc/config/darwin-d.cc +++ b/gcc/config/darwin-d.cc @@ -18,6 +18,7 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" +#include "tm.h" #include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/darwin-driver.cc b/gcc/config/darwin-driver.cc index 30e0e64f2809f..00287f3d5ecc7 100644 --- a/gcc/config/darwin-driver.cc +++ b/gcc/config/darwin-driver.cc @@ -160,19 +160,13 @@ darwin_find_version_from_kernel (void) goto parse_failed; /* Darwin20 sees a transition to macOS 11. In this, it seems that the - mapping to macOS minor version is now shifted to the kernel minor - version - 1 (at least for the initial releases). */ + mapping to macOS minor version and patch level is now always 0, 0 + (at least for macOS 11 and 12). */ if (major_vers >= 20) { - int minor_vers = *version_p++ - '0'; - if (ISDIGIT (*version_p)) - minor_vers = minor_vers * 10 + (*version_p++ - '0'); - if (*version_p++ != '.') - goto parse_failed; - if (minor_vers > 0) - minor_vers -= 1; /* Kernel 20.3 => macOS 11.2. */ - /* It's not yet clear whether patch level will be considered. */ - asprintf (&new_flag, "%d.%02d.00", major_vers - 9, minor_vers); + /* Apple clang doesn't include the minor version or the patch level + in the object file, nor does it pass it to ld */ + asprintf (&new_flag, "%d.00.00", major_vers - 9); } else if (major_vers - 4 <= 4) /* On 10.4 and earlier, the old linker is used which does not diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h index 15f3ee7b0c554..c7f87098ab9a6 100644 --- a/gcc/config/darwin-protos.h +++ b/gcc/config/darwin-protos.h @@ -129,4 +129,15 @@ extern void darwin_patch_builtins (void); extern void darwin_rename_builtins (void); extern bool darwin_libc_has_function (enum function_class fn_class, tree); +/* For this port, there are several possible sources for external toolchain + components (e.g. as, ld, dsymutil) and we have to alter the allowable + output in response to which version and source is in use. */ +enum darwin_external_toolchain { + DET_UNKNOWN=0, + CCTOOLS, + DWARFUTILS, + LLVM, + CLANG +}; + #endif /* CONFIG_DARWIN_PROTOS_H */ diff --git a/gcc/config/darwin-sections.def b/gcc/config/darwin-sections.def index 394ea1658803b..af7bb404688df 100644 --- a/gcc/config/darwin-sections.def +++ b/gcc/config/darwin-sections.def @@ -98,6 +98,8 @@ DEF_SECTION (mod_init_section, 0, ".mod_init_func", 0) DEF_SECTION (mod_term_section, 0, ".mod_term_func", 0) DEF_SECTION (constructor_section, 0, ".constructor", 0) DEF_SECTION (destructor_section, 0, ".destructor", 0) +DEF_SECTION (static_init_section, SECTION_CODE, + ".section\t__TEXT,__StaticInit,regular,pure_instructions", 0) /* Objective-C ABI=0 (Original version) sections. */ DEF_SECTION (objc_class_section, 0, ".objc_class", 1) @@ -157,7 +159,7 @@ DEF_SECTION (machopic_picsymbol_stub3_section, SECTION_NO_ANCHOR, /* Exception-related. */ DEF_SECTION (darwin_exception_section, SECTION_NO_ANCHOR, - ".section __DATA,__gcc_except_tab", 0) + ".section __TEXT,__gcc_except_tab", 0) DEF_SECTION (darwin_eh_frame_section, SECTION_NO_ANCHOR, ".section " EH_FRAME_SECTION_NAME ",__eh_frame" EH_FRAME_SECTION_ATTR, 0) diff --git a/gcc/config/darwin.cc b/gcc/config/darwin.cc index f065a13d73df7..76feb87a29dd9 100644 --- a/gcc/config/darwin.cc +++ b/gcc/config/darwin.cc @@ -114,6 +114,19 @@ static bool ld_needs_eh_markers = false; /* Emit a section-start symbol for mod init and term sections. */ static bool ld_init_term_start_labels = false; +/* The source and version of dsymutil in use. */ +#ifndef DSYMUTIL_VERSION +# warning Darwin toolchain without a defined dsymutil. +# define DSYMUTIL_VERSION DET_UNKNOWN,0,0,0 +#endif + +struct { + darwin_external_toolchain kind; /* cctools, llvm, clang etc. */ + int major; /* version number. */ + int minor; + int tiny; +} dsymutil_version = {DSYMUTIL_VERSION}; + /* Section names. */ section * darwin_sections[NUM_DARWIN_SECTIONS]; @@ -1586,7 +1599,7 @@ darwin_objc1_section (tree decl ATTRIBUTE_UNUSED, tree meta, section * base) else if (startswith (p, "V1_CEXT")) return darwin_sections[objc1_class_ext_section]; - else if (startswith (p, "V2_CSTR")) + else if (startswith (p, "V1_CSTR")) return darwin_sections[objc_constant_string_object_section]; return base; @@ -1679,7 +1692,16 @@ machopic_select_section (tree decl, base_section = darwin_sections[zobj_data_section]; } else if (ro) - base_section = darwin_sections[const_data_section]; + { + if (VAR_P (decl) && TREE_TYPE (decl) + && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE + && DECL_NAME (decl) + && strncmp (IDENTIFIER_POINTER (DECL_NAME (decl)), + "__anon_cfstring", 15) == 0) + base_section = darwin_sections[cfstring_constant_object_section]; + else + base_section = darwin_sections[const_data_section]; + } else base_section = data_section; break; @@ -1721,7 +1743,7 @@ machopic_select_section (tree decl, return base_section; /* GNU runtime is happy with it all in one pot. */ } - /* b) Constant string objects. */ + /* b) Constructors for constant NSstring [but not CFString] objects. */ if (TREE_CODE (decl) == CONSTRUCTOR && TREE_TYPE (decl) && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE @@ -1744,7 +1766,11 @@ machopic_select_section (tree decl, return darwin_sections[objc_string_object_section]; } else if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_CFString")) - return darwin_sections[cfstring_constant_object_section]; + { + /* We should have handled __anon_cfstrings above. */ + gcc_checking_assert (0); + return darwin_sections[cfstring_constant_object_section]; + } else return base_section; } @@ -1936,6 +1962,8 @@ darwin_label_is_anonymous_local_objc_name (const char *name) } else if (startswith ((const char *)p, "ClassMethods")) return false; + else if (startswith ((const char *)p, "ClassProtocols")) + return false; else if (startswith ((const char *)p, "Instance")) { if (p[8] == 'I' || p[8] == 'M') @@ -2230,6 +2258,7 @@ darwin_emit_except_table_label (FILE *file) { char section_start_label[30]; + fputs ("\t.p2align\t2\n", file); ASM_GENERATE_INTERNAL_LABEL (section_start_label, "GCC_except_table", except_table_label_num++); ASM_OUTPUT_LABEL (file, section_start_label); @@ -3018,7 +3047,35 @@ darwin_asm_output_dwarf_offset (FILE *file, int size, const char * lab, void darwin_file_start (void) { - /* Nothing to do. */ +#ifdef HAVE_AS_MMACOSX_VERSION_MIN_OPTION + /* This should not happen with a well-formed command line, but the user could + invoke cc1* directly without it. */ + if (!darwin_macosx_version_min) + return; + /* This assumes that the version passed has been validated in the driver. */ + unsigned maj, min, tiny; + int count = sscanf (darwin_macosx_version_min, "%u.%u.%u", &maj, &min, &tiny); + if (count < 0) + return; + if (count < 3) + tiny = 0; + if (count < 2) + min = 0; + const char *directive; +#ifdef HAVE_AS_MACOS_BUILD_VERSION + /* We only handle macos, so far. */ + if (generating_for_darwin_version >= 18) + directive = "build_version macos, "; + else +#endif + directive = "macosx_version_min "; + if (count > 2 && tiny != 0) + fprintf (asm_out_file, "\t.%s %u, %u, %u\n", directive, maj, min, tiny); + else if (count > 1) + fprintf (asm_out_file, "\t.%s %u, %u\n", directive, maj, min); + else + fprintf (asm_out_file, "\t.%s %u, 0\n", directive, maj); +#endif } /* Called for the TARGET_ASM_FILE_END hook. @@ -3240,7 +3297,11 @@ darwin_override_options (void) /* Keep track of which (major) version we're generating code for. */ if (darwin_macosx_version_min) { - if (strverscmp (darwin_macosx_version_min, "10.7") >= 0) + if (strverscmp (darwin_macosx_version_min, "10.14") >= 0) + generating_for_darwin_version = 18; + else if (strverscmp (darwin_macosx_version_min, "10.8") >= 0) + generating_for_darwin_version = 12; + else if (strverscmp (darwin_macosx_version_min, "10.7") >= 0) generating_for_darwin_version = 11; else if (strverscmp (darwin_macosx_version_min, "10.6") >= 0) generating_for_darwin_version = 10; @@ -3315,14 +3376,21 @@ darwin_override_options (void) global_options.x_flag_objc_abi); } - /* Don't emit DWARF3/4 unless specifically selected. This is a - workaround for tool bugs. */ - if (!OPTION_SET_P (dwarf_strict)) - dwarf_strict = 1; if (!OPTION_SET_P (dwarf_version)) - dwarf_version = 2; + { + /* External toolchains based on LLVM or clang 7+ have support for + dwarf-4. */ + if ((dsymutil_version.kind == LLVM && dsymutil_version.major >= 7) + || (dsymutil_version.kind == CLANG && dsymutil_version.major >= 700)) + dwarf_version = 4; + else if (dsymutil_version.kind == DWARFUTILS + && dsymutil_version.major >= 121) + dwarf_version = 3; /* From XC 6.4. */ + else + dwarf_version = 2; /* Older cannot safely exceed dwarf-2. */ + } - if (OPTION_SET_P (dwarf_split_debug_info)) + if (OPTION_SET_P (dwarf_split_debug_info) && dwarf_split_debug_info) { inform (input_location, "%<-gsplit-dwarf%> is not supported on this platform, ignored"); @@ -3330,6 +3398,24 @@ darwin_override_options (void) OPTION_SET_P (dwarf_split_debug_info) = 0; } + /* Cases where dsymutil will exclude files with .macinfo sections; we are + better off forcing the debug level to 2 than completely excluding the + files. If strict dwarf is set, then emit the macinfo anyway. */ + if (debug_info_level == DINFO_LEVEL_VERBOSE + && (!OPTION_SET_P (dwarf_strict) || dwarf_strict == 0) + && ((dsymutil_version.kind == CLANG && dsymutil_version.major >= 1500) + || (dsymutil_version.kind == LLVM && dsymutil_version.major >= 15))) + { + inform (input_location, + "%<-g3%> is not supported by the debug linker in use (set to 2)"); + debug_info_level = DINFO_LEVEL_NORMAL; + } + + /* Limit DWARF to the chosen version, the linker and debug linker might not + be able to consume newer structures. */ + if (!OPTION_SET_P (dwarf_strict)) + dwarf_strict = 1; + /* Do not allow unwind tables to be generated by default for m32. fnon-call-exceptions will override this, regardless of what we do. */ if (generating_for_darwin_version < 10 @@ -3398,8 +3484,17 @@ darwin_override_options (void) && dwarf_debuginfo_p ()) flag_var_tracking_uninit = flag_var_tracking; - /* Final check on PCI options; for Darwin these are not dependent on the PIE - ones, although PIE does require PIC to support it. */ + if (OPTION_SET_P (flag_pie) && flag_pie) + { + /* This is a little complicated, to match Xcode tools. + For Darwin, PIE requires PIC codegen, but otherwise is only a link- + time change. For almost all Darwin, we do not report __PIE__; the + exception is Darwin12-17 and for 32b only. */ + flag_pie = generating_for_darwin_version >= 12 && !TARGET_64BIT ? 2 : 0; + flag_pic = 2; /* We always set this. */ + } + + /* Final check on PIC options. */ if (MACHO_DYNAMIC_NO_PIC_P) { if (flag_pic) @@ -3504,6 +3599,29 @@ darwin_patch_builtins (void) } #endif +void +darwin_rename_builtins (void) +{ +} + +/* Implementation for the TARGET_LIBC_HAS_FUNCTION hook. */ + +bool +darwin_libc_has_function (enum function_class fn_class, + tree type ATTRIBUTE_UNUSED) +{ + if (fn_class == function_sincos && darwin_macosx_version_min) + return (strverscmp (darwin_macosx_version_min, "10.9") >= 0); +#if DARWIN_PPC && SUPPORT_DARWIN_LEGACY + if (fn_class == function_c99_math_complex + || fn_class == function_c99_misc) + return (TARGET_64BIT + || (darwin_macosx_version_min && + strverscmp (darwin_macosx_version_min, "10.3") >= 0)); +#endif + return default_libc_has_function (fn_class, type); +} + /* CFStrings implementation. */ static GTY(()) tree cfstring_class_reference = NULL_TREE; static GTY(()) tree cfstring_type_node = NULL_TREE; @@ -3521,7 +3639,7 @@ typedef struct GTY ((for_user)) cfstring_descriptor { /* The string literal. */ tree literal; /* The resulting constant CFString. */ - tree constructor; + tree ccf_str; } cfstring_descriptor; struct cfstring_hasher : ggc_ptr_hash @@ -3596,7 +3714,7 @@ darwin_init_cfstring_builtins (unsigned builtin_cfstring) /* Make a lang-specific section - dup_lang_specific_decl makes a new node in place of the existing, which may be NULL. */ DECL_LANG_SPECIFIC (cfsfun) = NULL; - (*lang_hooks.dup_lang_specific_decl) (cfsfun); + lang_hooks.dup_lang_specific_decl (cfsfun); set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring); lang_hooks.builtin_function (cfsfun); @@ -3607,7 +3725,7 @@ darwin_init_cfstring_builtins (unsigned builtin_cfstring) TREE_PUBLIC (cfstring_class_reference) = 1; DECL_ARTIFICIAL (cfstring_class_reference) = 1; - (*lang_hooks.decls.pushdecl) (cfstring_class_reference); + lang_hooks.decls.pushdecl (cfstring_class_reference); DECL_EXTERNAL (cfstring_class_reference) = 1; rest_of_decl_compilation (cfstring_class_reference, 0, 0); @@ -3644,29 +3762,6 @@ darwin_fold_builtin (tree fndecl, int n_args, tree *argp, return NULL_TREE; } -void -darwin_rename_builtins (void) -{ -} - -/* Implementation for the TARGET_LIBC_HAS_FUNCTION hook. */ - -bool -darwin_libc_has_function (enum function_class fn_class, - tree type ATTRIBUTE_UNUSED) -{ - if (fn_class == function_sincos && darwin_macosx_version_min) - return (strverscmp (darwin_macosx_version_min, "10.9") >= 0); -#if DARWIN_PPC && SUPPORT_DARWIN_LEGACY - if (fn_class == function_c99_math_complex - || fn_class == function_c99_misc) - return (TARGET_64BIT - || (darwin_macosx_version_min && - strverscmp (darwin_macosx_version_min, "10.3") >= 0)); -#endif - return default_libc_has_function (fn_class, type); -} - hashval_t cfstring_hasher::hash (cfstring_descriptor *ptr) { @@ -3764,29 +3859,37 @@ darwin_build_constant_cfstring (tree str) build_int_cst (TREE_TYPE (field), length)); constructor = build_constructor (ccfstring_type_node, v); - TREE_READONLY (constructor) = 1; - TREE_CONSTANT (constructor) = 1; - TREE_STATIC (constructor) = 1; - - /* Fromage: The C++ flavor of 'build_unary_op' expects constructor nodes - to have the TREE_HAS_CONSTRUCTOR (...) bit set. However, this file is - being built without any knowledge of C++ tree accessors; hence, we shall - use the generic accessor that TREE_HAS_CONSTRUCTOR actually maps to! */ + TREE_READONLY (constructor) = true; + TREE_CONSTANT (constructor) = true; + TREE_STATIC (constructor) = true; + + /* This file is being built without any knowledge of C++ tree accessors; + hence, we shall use the generic accessor to set TREE_HAS_CONSTRUCTOR. + ??? Is this actually used any more? */ if (darwin_running_cxx) TREE_LANG_FLAG_4 (constructor) = 1; /* TREE_HAS_CONSTRUCTOR */ /* Create an anonymous global variable for this CFString. */ - var = build_decl (input_location, CONST_DECL, + var = build_decl (input_location, VAR_DECL, NULL, TREE_TYPE (constructor)); - DECL_ARTIFICIAL (var) = 1; - TREE_STATIC (var) = 1; + char *name = xasprintf ("__anon_cfstring.%u", DECL_UID (var)); + DECL_NAME (var) = get_identifier (name); + free (name); + DECL_ARTIFICIAL (var) = true; + TREE_STATIC (var) = true; + TREE_READONLY (var) = true; + TREE_CONSTANT (var) = true; DECL_INITIAL (var) = constructor; - /* FIXME: This should use a translation_unit_decl to indicate file scope. */ + /* global namespace. */ DECL_CONTEXT (var) = NULL_TREE; - desc->constructor = var; + DECL_INITIAL (var) = constructor; + DECL_USER_ALIGN (var) = 1; + lang_hooks.decls.pushdecl (var); + rest_of_decl_compilation (var, 1, 0); + desc->ccf_str = var; } - addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->constructor); + addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->ccf_str); TREE_CONSTANT (addr) = 1; return addr; @@ -3851,11 +3954,22 @@ darwin_function_section (tree decl, enum node_frequency freq, if (decl && DECL_SECTION_NAME (decl) != NULL) return get_named_section (decl, NULL, 0); - /* We always put unlikely executed stuff in the cold section. */ + /* We always put unlikely executed stuff in the cold section; we have to put + this ahead of the global init section, since partitioning within a section + breaks some assumptions made in the DWARF handling. */ if (freq == NODE_FREQUENCY_UNLIKELY_EXECUTED) return (use_coal) ? darwin_sections[text_cold_coal_section] : darwin_sections[text_cold_section]; + /* Intercept functions in global init; these are placed in separate sections. + FIXME: there should be some neater way to do this, FIXME we should be able + to partition within a section. */ + if (DECL_NAME (decl) + && (startswith (IDENTIFIER_POINTER (DECL_NAME (decl)), "_GLOBAL__sub_I") + || startswith (IDENTIFIER_POINTER (DECL_NAME (decl)), + "__static_initialization_and_destruction"))) + return darwin_sections[static_init_section]; + /* If we have LTO *and* feedback information, then let LTO handle the function ordering, it makes a better job (for normal, hot, startup and exit - hence the bailout for cold above). */ diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h index 3682bd2b2c530..6b12460127481 100644 --- a/gcc/config/darwin.h +++ b/gcc/config/darwin.h @@ -133,26 +133,22 @@ extern GTY(()) int darwin_ms_struct; cases where these driver opts are used multiple times, or to control operations on more than one command (e.g. dynamiclib). These are handled specially and we then add %= 10.7 mmacosx-version-min= -no_pie) }" #define DARWIN_CC1_SPEC \ - "%< 10.6 10.7 mmacosx-version-min= -ld10-uwfef) \ %(link_gcc_c_sequence) \ - %{!nodefaultexport:%{dylib|dynamiclib|bundle: \ - %:version-compare(>= 10.11 asm_macosx_version_min= -U) \ - %:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \ - %:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \ - %:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \ - %:version-compare(>= 10.11 asm_macosx_version_min= -U) \ - %:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \ - %:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \ - %:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \ + %{!nodefaultexport: \ + %{%:version-compare(>= 10.11 asm_macosx_version_min= -U): \ + ___emutls_get_address -exported_symbol ___emutls_get_address \ + -U ___emutls_register_common \ + -exported_symbol ___emutls_register_common \ + -U ___gcc_nested_func_ptr_created \ + -exported_symbol ___gcc_nested_func_ptr_created \ + -U ___gcc_nested_func_ptr_deleted \ + -exported_symbol ___gcc_nested_func_ptr_deleted \ }} \ }}}\ %{!r:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} %{F*} "\ @@ -457,7 +461,9 @@ extern GTY(()) int darwin_ms_struct; %{force_cpusubtype_ALL:-arch %(darwin_arch)} \ %{!force_cpusubtype_ALL:-arch %(darwin_subarch)} "\ LINK_SYSROOT_SPEC \ - "%{mmacosx-version-min=*:-macosx_version_min %*} \ + "%{!multiply_defined*:%{shared-libgcc: \ + %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \ + %:version-compare(< 10.5 mmacosx-version-min= suppress) }} \ %{sectalign*} %{sectcreate*} %{sectobjectsymbols*} %{sectorder*} \ %{segaddr*} %{segcreate*} %{segprot*} " @@ -511,23 +517,28 @@ extern GTY(()) int darwin_ms_struct; #undef REAL_LIBGCC_SPEC #define REAL_LIBGCC_SPEC \ "%{static-libgcc|static: \ - %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh) \ - %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w); \ + %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh); \ shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime: \ %:version-compare(!> 10.11 mmacosx-version-min= -lgcc_s.1.1) \ - %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w) \ %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh) \ %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4) \ - %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5); \ - : -lemutls_w \ + %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5) \ } -lgcc " +#define DARWIN_WEAK_CRTS \ +"%{static-libgcc|static: \ + %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w) ; \ + shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime: \ + %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w) ; \ + : -lemutls_w \ + }" + /* We specify crt0.o as -lcrt0.o so that ld will search the library path. */ #undef STARTFILE_SPEC #define STARTFILE_SPEC \ -"%{dynamiclib: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}} \ - %{!dynamiclib:%{bundle:%(darwin_bundle1)} \ +"%{dynamiclib|shared: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}} \ + %{!dynamiclib:%{!shared:%{bundle:%(darwin_bundle1)} \ %{!bundle:%{pg:%{static:-lgcrt0.o} \ %{!static:%{object:-lgcrt0.o} \ %{!object:%{preload:-lgcrt0.o} \ @@ -538,8 +549,8 @@ extern GTY(()) int darwin_ms_struct; %{!static:%{object:-lcrt0.o} \ %{!object:%{preload:-lcrt0.o} \ %{!preload: %(darwin_crt1) \ - %(darwin_crt2)}}}}}} \ - %(darwin_crt3) % Add to the end of the system framework include path. diff --git a/gcc/config/default-d.cc b/gcc/config/default-d.cc index 2d7abfcba9691..30c359ed226e6 100644 --- a/gcc/config/default-d.cc +++ b/gcc/config/default-d.cc @@ -18,9 +18,11 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" -#include "memmodel.h" #include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" +/* Do not include tm.h or tm_p.h here; definitions needed by the target + architecture to initialize targetdm should instead be added to tm_d.h. */ + struct gcc_targetdm targetdm = TARGETDM_INITIALIZER; diff --git a/gcc/config/dragonfly-d.cc b/gcc/config/dragonfly-d.cc index d431638f7da34..881c5e60b9a1a 100644 --- a/gcc/config/dragonfly-d.cc +++ b/gcc/config/dragonfly-d.cc @@ -18,6 +18,7 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" +#include "tm.h" #include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/freebsd-d.cc b/gcc/config/freebsd-d.cc index 9f0f5e7b6ee27..c795ca2978cbf 100644 --- a/gcc/config/freebsd-d.cc +++ b/gcc/config/freebsd-d.cc @@ -18,9 +18,8 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" -#include "memmodel.h" #include "tm.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index e2e9335ad7530..e2cbdd1ac39bd 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -2458,10 +2458,14 @@ gcn_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg) return (NUM_PARM_REGS - cum->num) * UNITS_PER_WORD; } -/* A normal function which takes a pointer argument (to a scalar) may be - passed a pointer to LDS space (via a high-bits-set aperture), and that only - works with FLAT addressing, not GLOBAL. Force FLAT addressing if the - function has an incoming pointer-to-scalar parameter. */ +/* A normal function which takes a pointer argument may be passed a pointer to + LDS space (via a high-bits-set aperture), and that only works with FLAT + addressing, not GLOBAL. Force FLAT addressing if the function has an + incoming pointer parameter. NOTE: This is a heuristic that works in the + offloading case, but in general, a function might read global pointer + variables, etc. that may refer to LDS space or other special memory areas + not supported by GLOBAL instructions, and then this argument check would not + suffice. */ static void gcn_detect_incoming_pointer_arg (tree fndecl) @@ -2471,8 +2475,7 @@ gcn_detect_incoming_pointer_arg (tree fndecl) for (tree arg = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); arg; arg = TREE_CHAIN (arg)) - if (POINTER_TYPE_P (TREE_VALUE (arg)) - && !AGGREGATE_TYPE_P (TREE_TYPE (TREE_VALUE (arg)))) + if (POINTER_TYPE_P (TREE_VALUE (arg))) cfun->machine->use_flat_addressing = true; } diff --git a/gcc/config/gcn/mkoffload.cc b/gcc/config/gcn/mkoffload.cc index 94ba7ffa5af4e..a8b1b6e05c215 100644 --- a/gcc/config/gcn/mkoffload.cc +++ b/gcc/config/gcn/mkoffload.cc @@ -1082,6 +1082,7 @@ main (int argc, char **argv) } else dbgobj = make_temp_file (".mkoffload.dbg.o"); + obstack_ptr_grow (&files_to_cleanup, dbgobj); /* If the copy fails then just ignore it. */ if (copy_early_debug_info (argv[ix], dbgobj)) diff --git a/gcc/config/glibc-d.cc b/gcc/config/glibc-d.cc index f30af104db887..1411f1973e548 100644 --- a/gcc/config/glibc-d.cc +++ b/gcc/config/glibc-d.cc @@ -19,8 +19,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" -#include "memmodel.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h index 7b5a39eba72ac..411083213c4b0 100644 --- a/gcc/config/i386/amxtileintrin.h +++ b/gcc/config/i386/amxtileintrin.h @@ -39,14 +39,14 @@ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _tile_loadconfig (const void *__config) { - __asm__ volatile ("ldtilecfg\t%X0" :: "m" (*((const void **)__config))); + __builtin_ia32_ldtilecfg (__config); } extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _tile_storeconfig (void *__config) { - __asm__ volatile ("sttilecfg\t%X0" : "=m" (*((void **)__config))); + __builtin_ia32_sttilecfg (__config); } extern __inline void @@ -62,7 +62,7 @@ _tile_release (void) #define _tile_loadd_internal(dst,base,stride) \ __asm__ volatile \ ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) (base)), "r" ((long) (stride))) + :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride))) #define _tile_stream_loadd(dst,base,stride) \ _tile_stream_loadd_internal (dst, base, stride) @@ -70,7 +70,7 @@ _tile_release (void) #define _tile_stream_loadd_internal(dst,base,stride) \ __asm__ volatile \ ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) (base)), "r" ((long) (stride))) + :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride))) #define _tile_stored(dst,base,stride) \ _tile_stored_internal (dst, base, stride) @@ -78,7 +78,7 @@ _tile_release (void) #define _tile_stored_internal(src,base,stride) \ __asm__ volatile \ ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ - :: "r" ((void*) (base)), "r" ((long) (stride)) \ + :: "r" ((void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)) \ : "memory") #define _tile_zero(dst) \ diff --git a/gcc/config/i386/avx512bf16intrin.h b/gcc/config/i386/avx512bf16intrin.h index b6e9ddad15708..ecfff8ebfef83 100644 --- a/gcc/config/i386/avx512bf16intrin.h +++ b/gcc/config/i386/avx512bf16intrin.h @@ -46,9 +46,9 @@ extern __inline float __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cvtsbh_ss (__bfloat16 __A) { - union{ float a; unsigned int b;} __tmp; - __tmp.b = ((unsigned int)(__A)) << 16; - return __tmp.a; + union{ float __a; unsigned int __b;} __tmp; + __tmp.__b = ((unsigned int)(__A)) << 16; + return __tmp.__a; } /* vcvtne2ps2bf16 */ diff --git a/gcc/config/i386/avx512dqintrin.h b/gcc/config/i386/avx512dqintrin.h index e924250a4ad90..e8f8efe3be855 100644 --- a/gcc/config/i386/avx512dqintrin.h +++ b/gcc/config/i386/avx512dqintrin.h @@ -2800,11 +2800,11 @@ _mm512_fpclass_ps_mask (__m512 __A, const int __imm) ((__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) (__m128d) (X), \ (int) (C), (__mmask8) (-1))) \ -#define _mm_mask_fpclass_ss_mask(X, C, U) \ +#define _mm_mask_fpclass_ss_mask(U, X, C) \ ((__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) (__m128) (X), \ (int) (C), (__mmask8) (U))) -#define _mm_mask_fpclass_sd_mask(X, C, U) \ +#define _mm_mask_fpclass_sd_mask(U, X, C) \ ((__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) (__m128d) (X), \ (int) (C), (__mmask8) (U))) @@ -2839,8 +2839,9 @@ _mm512_fpclass_ps_mask (__m512 __A, const int __imm) (__mmask8)(U))) #define _mm_reduce_round_sd(A, B, C, R) \ - ((__m128d) __builtin_ia32_reducesd_round ((__v2df)(__m128d)(A), \ - (__v2df)(__m128d)(B), (int)(C), (__mmask8)(U), (int)(R))) + ((__m128d) __builtin_ia32_reducesd_mask_round ((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), (int)(C), (__v2df) _mm_setzero_pd (), \ + (__mmask8)(-1), (int)(R))) #define _mm_mask_reduce_round_sd(W, U, A, B, C, R) \ ((__m128d) __builtin_ia32_reducesd_mask_round ((__v2df)(__m128d)(A), \ @@ -2867,8 +2868,9 @@ _mm512_fpclass_ps_mask (__m512 __A, const int __imm) (__mmask8)(U))) #define _mm_reduce_round_ss(A, B, C, R) \ - ((__m128) __builtin_ia32_reducess_round ((__v4sf)(__m128)(A), \ - (__v4sf)(__m128)(B), (int)(C), (__mmask8)(U), (int)(R))) + ((__m128) __builtin_ia32_reducess_mask_round ((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), (int)(C), (__v4sf) _mm_setzero_ps (), \ + (__mmask8)(-1), (int)(R))) #define _mm_mask_reduce_round_ss(W, U, A, B, C, R) \ ((__m128) __builtin_ia32_reducess_mask_round ((__v4sf)(__m128)(A), \ @@ -2876,7 +2878,7 @@ _mm512_fpclass_ps_mask (__m512 __A, const int __imm) (__mmask8)(U), (int)(R))) #define _mm_maskz_reduce_round_ss(U, A, B, C, R) \ - ((__m128) __builtin_ia32_reducesd_mask_round ((__v4sf)(__m128)(A), \ + ((__m128) __builtin_ia32_reducess_mask_round ((__v4sf)(__m128)(A), \ (__v4sf)(__m128)(B), (int)(C), (__v4sf) _mm_setzero_ps (), \ (__mmask8)(U), (int)(R))) diff --git a/gcc/config/i386/avx512erintrin.h b/gcc/config/i386/avx512erintrin.h index 6b3b679a17675..f6ec90512064d 100644 --- a/gcc/config/i386/avx512erintrin.h +++ b/gcc/config/i386/avx512erintrin.h @@ -51,9 +51,8 @@ extern __inline __m512d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_exp2a23_round_pd (__m512d __A, int __R) { - __m512d __W; return (__m512d) __builtin_ia32_exp2pd_mask ((__v8df) __A, - (__v8df) __W, + (__v8df) _mm512_undefined_pd (), (__mmask8) -1, __R); } @@ -79,9 +78,8 @@ extern __inline __m512 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_exp2a23_round_ps (__m512 __A, int __R) { - __m512 __W; return (__m512) __builtin_ia32_exp2ps_mask ((__v16sf) __A, - (__v16sf) __W, + (__v16sf) _mm512_undefined_ps (), (__mmask16) -1, __R); } @@ -107,9 +105,8 @@ extern __inline __m512d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_rcp28_round_pd (__m512d __A, int __R) { - __m512d __W; return (__m512d) __builtin_ia32_rcp28pd_mask ((__v8df) __A, - (__v8df) __W, + (__v8df) _mm512_undefined_pd (), (__mmask8) -1, __R); } @@ -135,9 +132,8 @@ extern __inline __m512 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_rcp28_round_ps (__m512 __A, int __R) { - __m512 __W; return (__m512) __builtin_ia32_rcp28ps_mask ((__v16sf) __A, - (__v16sf) __W, + (__v16sf) _mm512_undefined_ps (), (__mmask16) -1, __R); } @@ -229,9 +225,8 @@ extern __inline __m512d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_rsqrt28_round_pd (__m512d __A, int __R) { - __m512d __W; return (__m512d) __builtin_ia32_rsqrt28pd_mask ((__v8df) __A, - (__v8df) __W, + (__v8df) _mm512_undefined_pd (), (__mmask8) -1, __R); } @@ -257,9 +252,8 @@ extern __inline __m512 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_rsqrt28_round_ps (__m512 __A, int __R) { - __m512 __W; return (__m512) __builtin_ia32_rsqrt28ps_mask ((__v16sf) __A, - (__v16sf) __W, + (__v16sf) _mm512_undefined_ps (), (__mmask16) -1, __R); } diff --git a/gcc/config/i386/avx512fintrin.h b/gcc/config/i386/avx512fintrin.h index 77d6249c2bc50..24316c5a49572 100644 --- a/gcc/config/i386/avx512fintrin.h +++ b/gcc/config/i386/avx512fintrin.h @@ -185,7 +185,10 @@ extern __inline __m512 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_undefined_ps (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m512 __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -195,7 +198,10 @@ extern __inline __m512d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_undefined_pd (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m512d __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -203,7 +209,10 @@ extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_undefined_epi32 (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m512i __Y = __Y; +#pragma GCC diagnostic pop return __Y; } diff --git a/gcc/config/i386/avx512fp16intrin.h b/gcc/config/i386/avx512fp16intrin.h index 28041516bac94..6330e57ebb85b 100644 --- a/gcc/config/i386/avx512fp16intrin.h +++ b/gcc/config/i386/avx512fp16intrin.h @@ -204,7 +204,10 @@ extern __inline __m128h __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_undefined_ph (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m128h __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -212,7 +215,10 @@ extern __inline __m256h __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_undefined_ph (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m256h __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -220,7 +226,10 @@ extern __inline __m512h __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_undefined_ph (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m512h __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -272,10 +281,10 @@ _mm512_castph512_ph128 (__m512h __A) { union { - __m128h a[4]; - __m512h v; - } u = { .v = __A }; - return u.a[0]; + __m128h __a[4]; + __m512h __v; + } __u = { .__v = __A }; + return __u.__a[0]; } extern __inline __m256h @@ -284,10 +293,10 @@ _mm512_castph512_ph256 (__m512h __A) { union { - __m256h a[2]; - __m512h v; - } u = { .v = __A }; - return u.a[0]; + __m256h __a[2]; + __m512h __v; + } __u = { .__v = __A }; + return __u.__a[0]; } extern __inline __m512h @@ -296,11 +305,11 @@ _mm512_castph128_ph512 (__m128h __A) { union { - __m128h a[4]; - __m512h v; - } u; - u.a[0] = __A; - return u.v; + __m128h __a[4]; + __m512h __v; + } __u; + __u.__a[0] = __A; + return __u.__v; } extern __inline __m512h @@ -309,11 +318,11 @@ _mm512_castph256_ph512 (__m256h __A) { union { - __m256h a[2]; - __m512h v; - } u; - u.a[0] = __A; - return u.v; + __m256h __a[2]; + __m512h __v; + } __u; + __u.__a[0] = __A; + return __u.__v; } extern __inline __m512h @@ -2312,11 +2321,11 @@ _mm512_fpclass_ph_mask (__m512h __A, const int __imm) #else #define _mm512_mask_fpclass_ph_mask(u, x, c) \ ((__mmask32) __builtin_ia32_fpclassph512_mask ((__v32hf) (__m512h) (x), \ - (int) (c),(__mmask8)(u))) + (int) (c),(__mmask32)(u))) #define _mm512_fpclass_ph_mask(x, c) \ ((__mmask32) __builtin_ia32_fpclassph512_mask ((__v32hf) (__m512h) (x), \ - (int) (c),(__mmask8)-1)) + (int) (c),(__mmask32)-1)) #endif /* __OPIMTIZE__ */ /* Intrinsics vgetexpph, vgetexpsh. */ @@ -7155,11 +7164,11 @@ _mm512_set1_pch (_Float16 _Complex __A) { union { - _Float16 _Complex a; - float b; - } u = { .a = __A}; + _Float16 _Complex __a; + float __b; + } __u = { .__a = __A}; - return (__m512h) _mm512_set1_ps (u.b); + return (__m512h) _mm512_set1_ps (__u.__b); } // intrinsics below are alias for f*mul_*ch diff --git a/gcc/config/i386/avx512fp16vlintrin.h b/gcc/config/i386/avx512fp16vlintrin.h index 0794498a3d65c..2783971accb76 100644 --- a/gcc/config/i386/avx512fp16vlintrin.h +++ b/gcc/config/i386/avx512fp16vlintrin.h @@ -124,10 +124,10 @@ _mm256_castph256_ph128 (__m256h __A) { union { - __m128h a[2]; - __m256h v; - } u = { .v = __A }; - return u.a[0]; + __m128h __a[2]; + __m256h __v; + } __u = { .__v = __A }; + return __u.__a[0]; } extern __inline __m256h @@ -136,11 +136,11 @@ _mm256_castph128_ph256 (__m128h __A) { union { - __m128h a[2]; - __m256h v; - } u; - u.a[0] = __A; - return u.v; + __m128h __a[2]; + __m256h __v; + } __u; + __u.__a[0] = __A; + return __u.__v; } extern __inline __m256h @@ -3317,11 +3317,11 @@ _mm256_set1_pch (_Float16 _Complex __A) { union { - _Float16 _Complex a; - float b; - } u = { .a = __A }; + _Float16 _Complex __a; + float __b; + } __u = { .__a = __A }; - return (__m256h) _mm256_set1_ps (u.b); + return (__m256h) _mm256_set1_ps (__u.__b); } extern __inline __m128h @@ -3330,11 +3330,11 @@ _mm_set1_pch (_Float16 _Complex __A) { union { - _Float16 _Complex a; - float b; - } u = { .a = __A }; + _Float16 _Complex __a; + float __b; + } __u = { .__a = __A }; - return (__m128h) _mm_set1_ps (u.b); + return (__m128h) _mm_set1_ps (__u.__b); } // intrinsics below are alias for f*mul_*ch diff --git a/gcc/config/i386/avx512vlbwintrin.h b/gcc/config/i386/avx512vlbwintrin.h index 192d54e743f72..c918ed520c5cc 100644 --- a/gcc/config/i386/avx512vlbwintrin.h +++ b/gcc/config/i386/avx512vlbwintrin.h @@ -1839,7 +1839,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) #define _mm256_mask_alignr_epi8(W, U, X, Y, N) \ ((__m256i) __builtin_ia32_palignr256_mask ((__v4di)(__m256i)(X), \ (__v4di)(__m256i)(Y), (int)((N) * 8), \ - (__v4di)(__m256i)(X), (__mmask32)(U))) + (__v4di)(__m256i)(W), (__mmask32)(U))) #define _mm256_mask_srli_epi16(W, U, A, B) \ ((__m256i) __builtin_ia32_psrlwi256_mask ((__v16hi)(__m256i)(A), \ @@ -1922,7 +1922,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) #define _mm_mask_alignr_epi8(W, U, X, Y, N) \ ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X), \ (__v2di)(__m128i)(Y), (int)((N) * 8), \ - (__v2di)(__m128i)(X), (__mmask16)(U))) + (__v2di)(__m128i)(W), (__mmask16)(U))) #define _mm_maskz_alignr_epi8(U, X, Y, N) \ ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X), \ diff --git a/gcc/config/i386/avx512vlintrin.h b/gcc/config/i386/avx512vlintrin.h index 26b286eae6b79..c6f3f35a009e1 100644 --- a/gcc/config/i386/avx512vlintrin.h +++ b/gcc/config/i386/avx512vlintrin.h @@ -13609,7 +13609,7 @@ _mm256_permutex_pd (__m256d __X, const int __M) #define _mm_mask_alignr_epi64(W, U, X, Y, C) \ ((__m128i)__builtin_ia32_alignq128_mask ((__v2di)(__m128i)(X), \ - (__v2di)(__m128i)(Y), (int)(C), (__v2di)(__m128i)(X), (__mmask8)-1)) + (__v2di)(__m128i)(Y), (int)(C), (__v2di)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_alignr_epi64(U, X, Y, C) \ ((__m128i)__builtin_ia32_alignq128_mask ((__v2di)(__m128i)(X), \ diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.h index c76d600ee5ce9..d5aff7ddcfa59 100644 --- a/gcc/config/i386/avxintrin.h +++ b/gcc/config/i386/avxintrin.h @@ -1207,21 +1207,30 @@ _mm256_movemask_ps (__m256 __A) extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_undefined_pd (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m256d __Y = __Y; +#pragma GCC diagnostic pop return __Y; } extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_undefined_ps (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m256 __Y = __Y; +#pragma GCC diagnostic pop return __Y; } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_undefined_si256 (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m256i __Y = __Y; +#pragma GCC diagnostic pop return __Y; } diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 7361687632fae..e4b66340589f7 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -187,7 +187,7 @@ (and (match_operand 0 "memory_operand") (match_test "constant_address_p (XEXP (op, 0))"))) -(define_memory_constraint "Bk" +(define_special_memory_constraint "Bk" "@internal TLS address that allows insn using non-integer registers." (and (match_operand 0 "memory_operand") (not (match_test "ix86_gpr_tls_address_pattern_p (op)")))) diff --git a/gcc/config/i386/cygwin.h b/gcc/config/i386/cygwin.h index d06eda369cf55..5412c5d4479cd 100644 --- a/gcc/config/i386/cygwin.h +++ b/gcc/config/i386/cygwin.h @@ -57,7 +57,7 @@ along with GCC; see the file COPYING3. If not see #undef ENDFILE_SPEC #define ENDFILE_SPEC \ - "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}\ + "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ %{!shared:%:if-exists(default-manifest.o%s)}\ %{fvtable-verify=none:%s; \ fvtable-verify=preinit:vtv_end.o%s; \ diff --git a/gcc/config/i386/darwin.h b/gcc/config/i386/darwin.h index a55f6b2b8741b..12cdc34a19ecf 100644 --- a/gcc/config/i386/darwin.h +++ b/gcc/config/i386/darwin.h @@ -110,7 +110,7 @@ along with GCC; see the file COPYING3. If not see #undef ENDFILE_SPEC #define ENDFILE_SPEC \ - "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ + "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ %{mpc32:crtprec32.o%s} \ %{mpc64:crtprec64.o%s} \ %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc index 9e0ae0b2baa3b..8d19838b10e86 100644 --- a/gcc/config/i386/driver-i386.cc +++ b/gcc/config/i386/driver-i386.cc @@ -464,6 +464,10 @@ const char *host_detect_local_cpu (int argc, const char **argv) processor = PROCESSOR_GEODE; else if (has_feature (FEATURE_MOVBE) && family == 22) processor = PROCESSOR_BTVER2; + else if (has_feature (FEATURE_AVX512VP2INTERSECT)) + processor = PROCESSOR_ZNVER5; + else if (has_feature (FEATURE_AVX512F)) + processor = PROCESSOR_ZNVER4; else if (has_feature (FEATURE_VAES)) processor = PROCESSOR_ZNVER3; else if (has_feature (FEATURE_CLWB)) @@ -574,15 +578,12 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* This is unknown family 0x6 CPU. */ if (has_feature (FEATURE_AVX)) { + /* Assume Tiger Lake */ if (has_feature (FEATURE_AVX512VP2INTERSECT)) - { - if (has_feature (FEATURE_TSXLDTRK)) - /* Assume Sapphire Rapids. */ - cpu = "sapphirerapids"; - else - /* Assume Tiger Lake */ - cpu = "tigerlake"; - } + cpu = "tigerlake"; + /* Assume Sapphire Rapids. */ + else if (has_feature (FEATURE_TSXLDTRK)) + cpu = "sapphirerapids"; /* Assume Cooper Lake */ else if (has_feature (FEATURE_AVX512BF16)) cpu = "cooperlake"; @@ -767,6 +768,12 @@ const char *host_detect_local_cpu (int argc, const char **argv) case PROCESSOR_ZNVER3: cpu = "znver3"; break; + case PROCESSOR_ZNVER4: + cpu = "znver4"; + break; + case PROCESSOR_ZNVER5: + cpu = "znver5"; + break; case PROCESSOR_BTVER1: cpu = "btver1"; break; diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index 654a8e8c9adba..069b1a193a20d 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -99,7 +99,10 @@ _mm_setr_pd (double __W, double __X) extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_undefined_pd (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m128d __Y = __Y; +#pragma GCC diagnostic pop return __Y; } @@ -785,7 +788,10 @@ _mm_move_epi64 (__m128i __A) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_undefined_si128 (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m128i __Y = __Y; +#pragma GCC diagnostic pop return __Y; } diff --git a/gcc/config/i386/gnu-user-common.h b/gcc/config/i386/gnu-user-common.h index 23b54c5be5251..3d2a33f171446 100644 --- a/gcc/config/i386/gnu-user-common.h +++ b/gcc/config/i386/gnu-user-common.h @@ -47,7 +47,7 @@ along with GCC; see the file COPYING3. If not see /* Similar to standard GNU userspace, but adding -ffast-math support. */ #define GNU_USER_TARGET_MATHFILE_SPEC \ - "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ + "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ %{mpc32:crtprec32.o%s} \ %{mpc64:crtprec64.o%s} \ %{mpc80:crtprec80.o%s}" diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index b410102614d98..64db1becca82c 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -126,6 +126,10 @@ BDESC (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__b BDESC (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xrstors64", IX86_BUILTIN_XRSTORS64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64) BDESC (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xsavec64", IX86_BUILTIN_XSAVEC64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64) +/* LDFILECFG and STFILECFG. */ +BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_ldtilecfg", IX86_BUILTIN_LDTILECFG, UNKNOWN, (int) VOID_FTYPE_PCVOID) +BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_sttilecfg", IX86_BUILTIN_STTILECFG, UNKNOWN, (int) VOID_FTYPE_PVOID) + /* SSE */ BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_movv4sf_internal, "__builtin_ia32_storeups", IX86_BUILTIN_STOREUPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF) BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse_movntv4sf, "__builtin_ia32_movntps", IX86_BUILTIN_MOVNTPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF) @@ -1036,8 +1040,8 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_vpermilvarv8sf3, "__builtin_ia32_vpe BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendpd256, "__builtin_ia32_blendpd256", IX86_BUILTIN_BLENDPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendps256, "__builtin_ia32_blendps256", IX86_BUILTIN_BLENDPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) -BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF) -BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF) +BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvpd256, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF) +BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvps256, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_dpps256, "__builtin_ia32_dpps256", IX86_BUILTIN_DPPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufpd256, "__builtin_ia32_shufpd256", IX86_BUILTIN_SHUFPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufps256, "__builtin_ia32_shufps256", IX86_BUILTIN_SHUFPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) @@ -2747,47 +2751,47 @@ BDESC (0, OPTION_MASK_ISA2_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds_mask, BDESC (0, OPTION_MASK_ISA2_RDPID, CODE_FOR_rdpid, "__builtin_ia32_rdpid", IX86_BUILTIN_RDPID, UNKNOWN, (int) UNSIGNED_FTYPE_VOID) /* VAES. */ -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v16qi, "__builtin_ia32_vaesdec_v16qi", IX86_BUILTIN_VAESDEC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v32qi, "__builtin_ia32_vaesdec_v32qi", IX86_BUILTIN_VAESDEC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64qi", IX86_BUILTIN_VAESDEC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v16qi, "__builtin_ia32_vaesenc_v16qi", IX86_BUILTIN_VAESENC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v32qi, "__builtin_ia32_vaesenc_v32qi", IX86_BUILTIN_VAESENC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v64qi, "__builtin_ia32_vaesenc_v64qi", IX86_BUILTIN_VAESENC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v16qi, "__builtin_ia32_vaesenclast_v16qi", IX86_BUILTIN_VAESENCLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v32qi, "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) -BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v64qi, "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v16qi, "__builtin_ia32_vaesdec_v16qi", IX86_BUILTIN_VAESDEC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_AVX, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v32qi, "__builtin_ia32_vaesdec_v32qi", IX86_BUILTIN_VAESDEC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64qi", IX86_BUILTIN_VAESDEC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_AVX, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v16qi, "__builtin_ia32_vaesenc_v16qi", IX86_BUILTIN_VAESENC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_AVX, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v32qi, "__builtin_ia32_vaesenc_v32qi", IX86_BUILTIN_VAESENC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v64qi, "__builtin_ia32_vaesenc_v64qi", IX86_BUILTIN_VAESENC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v16qi, "__builtin_ia32_vaesenclast_v16qi", IX86_BUILTIN_VAESENCLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_AVX, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v32qi, "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v64qi, "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) /* BF16 */ BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi, "__builtin_ia32_cvtne2ps2bf16_v32hi", IX86_BUILTIN_CVTNE2PS2HI16_V32HI, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_mask, "__builtin_ia32_cvtne2ps2bf16_v32hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF_V32HI_USI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v32hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF_USI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi, "__builtin_ia32_cvtne2ps2bf16_v16hi", IX86_BUILTIN_CVTNE2PS2HI16_V16HI, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_mask, "__builtin_ia32_cvtne2ps2bf16_v16hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_V16HI_UHI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v16hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_UHI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi, "__builtin_ia32_cvtne2ps2bf16_v8hi", IX86_BUILTIN_CVTNE2PS2HI16_V8HI, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_mask, "__builtin_ia32_cvtne2ps2bf16_v8hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_V8HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v8hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi, "__builtin_ia32_cvtne2ps2bf16_v16hi", IX86_BUILTIN_CVTNE2PS2HI16_V16HI, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_mask, "__builtin_ia32_cvtne2ps2bf16_v16hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_V16HI_UHI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v16hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_UHI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi, "__builtin_ia32_cvtne2ps2bf16_v8hi", IX86_BUILTIN_CVTNE2PS2HI16_V8HI, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_mask, "__builtin_ia32_cvtne2ps2bf16_v8hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_V8HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v8hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_UQI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf, "__builtin_ia32_cvtneps2bf16_v16sf", IX86_BUILTIN_CVTNEPS2HI16_V16SF, UNKNOWN, (int) V16HI_FTYPE_V16SF) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf_mask, "__builtin_ia32_cvtneps2bf16_v16sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V16SF_MASK, UNKNOWN, (int) V16HI_FTYPE_V16SF_V16HI_UHI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf_maskz, "__builtin_ia32_cvtneps2bf16_v16sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V16SF_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16SF_UHI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf, "__builtin_ia32_cvtneps2bf16_v8sf", IX86_BUILTIN_CVTNEPS2HI16_V8SF, UNKNOWN, (int) V8HI_FTYPE_V8SF) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_mask, "__builtin_ia32_cvtneps2bf16_v8sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V8SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V8SF_V8HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_maskz, "__builtin_ia32_cvtneps2bf16_v8sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8SF_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf, "__builtin_ia32_cvtneps2bf16_v4sf", IX86_BUILTIN_CVTNEPS2HI16_V4SF, UNKNOWN, (int) V8HI_FTYPE_V4SF) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_mask, "__builtin_ia32_cvtneps2bf16_v4sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V4SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V8HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_maskz, "__builtin_ia32_cvtneps2bf16_v4sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V4SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf, "__builtin_ia32_cvtneps2bf16_v8sf", IX86_BUILTIN_CVTNEPS2HI16_V8SF, UNKNOWN, (int) V8HI_FTYPE_V8SF) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_mask, "__builtin_ia32_cvtneps2bf16_v8sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V8SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V8SF_V8HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_maskz, "__builtin_ia32_cvtneps2bf16_v8sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8SF_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf, "__builtin_ia32_cvtneps2bf16_v4sf", IX86_BUILTIN_CVTNEPS2HI16_V4SF, UNKNOWN, (int) V8HI_FTYPE_V4SF) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_mask, "__builtin_ia32_cvtneps2bf16_v4sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V4SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V8HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_maskz, "__builtin_ia32_cvtneps2bf16_v4sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V4SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_UQI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf, "__builtin_ia32_dpbf16ps_v16sf", IX86_BUILTIN_DPHI16PS_V16SF, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf_mask, "__builtin_ia32_dpbf16ps_v16sf_mask", IX86_BUILTIN_DPHI16PS_V16SF_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI_UHI) BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf_maskz, "__builtin_ia32_dpbf16ps_v16sf_maskz", IX86_BUILTIN_DPHI16PS_V16SF_MASKZ, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI_UHI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf, "__builtin_ia32_dpbf16ps_v8sf", IX86_BUILTIN_DPHI16PS_V8SF, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_mask, "__builtin_ia32_dpbf16ps_v8sf_mask", IX86_BUILTIN_DPHI16PS_V8SF_MASK, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_maskz, "__builtin_ia32_dpbf16ps_v8sf_maskz", IX86_BUILTIN_DPHI16PS_V8SF_MASKZ, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf, "__builtin_ia32_dpbf16ps_v4sf", IX86_BUILTIN_DPHI16PS_V4SF, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_mask, "__builtin_ia32_dpbf16ps_v4sf_mask", IX86_BUILTIN_DPHI16PS_V4SF_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI) -BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_maskz, "__builtin_ia32_dpbf16ps_v4sf_maskz", IX86_BUILTIN_DPHI16PS_V4SF_MASKZ, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf, "__builtin_ia32_dpbf16ps_v8sf", IX86_BUILTIN_DPHI16PS_V8SF, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_mask, "__builtin_ia32_dpbf16ps_v8sf_mask", IX86_BUILTIN_DPHI16PS_V8SF_MASK, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_maskz, "__builtin_ia32_dpbf16ps_v8sf_maskz", IX86_BUILTIN_DPHI16PS_V8SF_MASKZ, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf, "__builtin_ia32_dpbf16ps_v4sf", IX86_BUILTIN_DPHI16PS_V4SF, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_mask, "__builtin_ia32_dpbf16ps_v4sf_mask", IX86_BUILTIN_DPHI16PS_V4SF_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI) +BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_maskz, "__builtin_ia32_dpbf16ps_v4sf_maskz", IX86_BUILTIN_DPHI16PS_V4SF_MASKZ, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI) /* AVX512FP16. */ BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512FP16, CODE_FOR_addv8hf3_mask, "__builtin_ia32_addph128_mask", IX86_BUILTIN_ADDPH128_MASK, UNKNOWN, (int) V8HF_FTYPE_V8HF_V8HF_V8HF_UQI) diff --git a/gcc/config/i386/i386-builtins.cc b/gcc/config/i386/i386-builtins.cc index 8c6d0fe96315e..8ed32e14f0a56 100644 --- a/gcc/config/i386/i386-builtins.cc +++ b/gcc/config/i386/i386-builtins.cc @@ -1790,7 +1790,7 @@ ix86_vectorize_builtin_gather (const_tree mem_vectype, ? !TARGET_USE_GATHER_2PARTS : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u) ? !TARGET_USE_GATHER_4PARTS - : !TARGET_USE_GATHER))) + : !TARGET_USE_GATHER_8PARTS))) return NULL_TREE; if ((TREE_CODE (index_type) != INTEGER_TYPE @@ -2280,7 +2280,7 @@ fold_builtin_cpu (tree fndecl, tree *args) /* Check the value. */ final = build2 (EQ_EXPR, unsigned_type_node, ref, build_int_cstu (unsigned_type_node, field_val)); - return build1 (CONVERT_EXPR, integer_type_node, final); + return build1 (NOP_EXPR, integer_type_node, final); } else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS) { @@ -2305,7 +2305,8 @@ fold_builtin_cpu (tree fndecl, tree *args) return integer_zero_node; } - if (isa_names_table[i].feature >= 32) + unsigned feature = isa_names_table[i].feature; + if (feature >= INT_TYPE_SIZE) { if (ix86_cpu_features2_var == nullptr) { @@ -2323,46 +2324,41 @@ fold_builtin_cpu (tree fndecl, tree *args) varpool_node::add (ix86_cpu_features2_var); } - for (unsigned int j = 0; j < SIZE_OF_CPU_FEATURES; j++) - if (isa_names_table[i].feature < (32 + 32 + j * 32)) - { - field_val = (1U << (isa_names_table[i].feature - - (32 + j * 32))); - tree index = size_int (j); - array_elt = build4 (ARRAY_REF, unsigned_type_node, - ix86_cpu_features2_var, - index, NULL_TREE, NULL_TREE); - /* Return __cpu_features2[index] & field_val */ - final = build2 (BIT_AND_EXPR, unsigned_type_node, - array_elt, - build_int_cstu (unsigned_type_node, - field_val)); - return build1 (CONVERT_EXPR, integer_type_node, final); - } + /* Skip __cpu_features[0]. */ + feature -= INT_TYPE_SIZE; + tree index = size_int (feature / INT_TYPE_SIZE); + feature = feature % INT_TYPE_SIZE; + array_elt = build4 (ARRAY_REF, unsigned_type_node, + ix86_cpu_features2_var, + index, NULL_TREE, NULL_TREE); + /* Return __cpu_features2[index] & field_val */ } + else + { + field = TYPE_FIELDS (ix86_cpu_model_type_node); + /* Get the last field, which is __cpu_features. */ + while (DECL_CHAIN (field)) + field = DECL_CHAIN (field); - field = TYPE_FIELDS (ix86_cpu_model_type_node); - /* Get the last field, which is __cpu_features. */ - while (DECL_CHAIN (field)) - field = DECL_CHAIN (field); + /* Get the appropriate field: __cpu_model.__cpu_features */ + ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var, + field, NULL_TREE); - /* Get the appropriate field: __cpu_model.__cpu_features */ - ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var, - field, NULL_TREE); + /* Access the 0th element of __cpu_features array. */ + array_elt = build4 (ARRAY_REF, unsigned_type_node, ref, + integer_zero_node, NULL_TREE, NULL_TREE); - /* Access the 0th element of __cpu_features array. */ - array_elt = build4 (ARRAY_REF, unsigned_type_node, ref, - integer_zero_node, NULL_TREE, NULL_TREE); + /* Return __cpu_model.__cpu_features[0] & field_val */ + } - field_val = (1U << isa_names_table[i].feature); - /* Return __cpu_model.__cpu_features[0] & field_val */ + field_val = 1U << feature; final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt, build_int_cstu (unsigned_type_node, field_val)); - if (isa_names_table[i].feature == (INT_TYPE_SIZE - 1)) + if (feature == INT_TYPE_SIZE - 1) return build2 (NE_EXPR, integer_type_node, final, build_int_cst (unsigned_type_node, 0)); else - return build1 (CONVERT_EXPR, integer_type_node, final); + return build1 (NOP_EXPR, integer_type_node, final); } gcc_unreachable (); } diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc index c73c1b1f594d0..989e23e1b9f51 100644 --- a/gcc/config/i386/i386-c.cc +++ b/gcc/config/i386/i386-c.cc @@ -132,6 +132,14 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__znver3"); def_or_undef (parse_in, "__znver3__"); break; + case PROCESSOR_ZNVER4: + def_or_undef (parse_in, "__znver4"); + def_or_undef (parse_in, "__znver4__"); + break; + case PROCESSOR_ZNVER5: + def_or_undef (parse_in, "__znver5"); + def_or_undef (parse_in, "__znver5__"); + break; case PROCESSOR_BTVER1: def_or_undef (parse_in, "__btver1"); def_or_undef (parse_in, "__btver1__"); @@ -326,6 +334,12 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_ZNVER3: def_or_undef (parse_in, "__tune_znver3__"); break; + case PROCESSOR_ZNVER4: + def_or_undef (parse_in, "__tune_znver4__"); + break; + case PROCESSOR_ZNVER5: + def_or_undef (parse_in, "__tune_znver5__"); + break; case PROCESSOR_BTVER1: def_or_undef (parse_in, "__tune_btver1__"); break; diff --git a/gcc/config/i386/i386-d.cc b/gcc/config/i386/i386-d.cc index a62339cae3036..27e2b75fc251e 100644 --- a/gcc/config/i386/i386-d.cc +++ b/gcc/config/i386/i386-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/i386/i386-d.h b/gcc/config/i386/i386-d.h new file mode 100644 index 0000000000000..b9806889df990 --- /dev/null +++ b/gcc/config/i386/i386-d.h @@ -0,0 +1,26 @@ +/* Definitions for the D front end on the x86 architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* In i386-d.cc */ +extern void ix86_d_target_versions (void); +extern void ix86_d_register_target_info (void); +extern bool ix86_d_has_stdcall_convention (unsigned int *, unsigned int *); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS ix86_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO ix86_d_register_target_info +#define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 31780b6daf7c5..5c8d9c556af21 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -223,7 +223,9 @@ ix86_convert_const_wide_int_to_broadcast (machine_mode mode, rtx op) broadcast only if vector broadcast is available. */ if (!TARGET_AVX || !CONST_WIDE_INT_P (op) - || standard_sse_constant_p (op, mode)) + || standard_sse_constant_p (op, mode) + || (CONST_WIDE_INT_NUNITS (op) * HOST_BITS_PER_WIDE_INT + != GET_MODE_BITSIZE (mode))) return nullptr; HOST_WIDE_INT val = CONST_WIDE_INT_ELT (op, 0); @@ -348,6 +350,23 @@ ix86_expand_move (machine_mode mode, rtx operands[]) default: break; + + case SUBREG: + /* As not all values in XFmode are representable in real_value, + we might be called with unfoldable SUBREGs of constants. */ + if (mode == XFmode + && CONSTANT_P (SUBREG_REG (op1)) + && can_create_pseudo_p ()) + { + machine_mode imode = GET_MODE (SUBREG_REG (op1)); + rtx r = force_const_mem (imode, SUBREG_REG (op1)); + if (r) + r = validize_mem (r); + else + r = force_reg (imode, SUBREG_REG (op1)); + op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1)); + } + break; } if ((flag_pic || MACHOPIC_INDIRECT) @@ -8461,6 +8480,8 @@ ix86_expand_set_or_cpymem (rtx dst, rtx src, rtx count_exp, rtx val_exp, if (TARGET_AVX256_SPLIT_REGS && GET_MODE_BITSIZE (move_mode) > 128) move_mode = TImode; + if (TARGET_AVX512_SPLIT_REGS && GET_MODE_BITSIZE (move_mode) > 256) + move_mode = OImode; /* Find the corresponding vector mode with the same size as MOVE_MODE. MOVE_MODE is an integer mode at the moment (SI, DI, TI, etc.). */ @@ -12234,7 +12255,7 @@ ix86_expand_vec_set_builtin (tree exp) op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL); elt = get_element_number (TREE_TYPE (arg0), arg2); - if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode) + if (GET_MODE (op1) != mode1) op1 = convert_modes (mode1, GET_MODE (op1), op1, true); op0 = force_reg (tmode, op0); @@ -12726,6 +12747,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, op1 = expand_normal (arg1); op2 = expand_normal (arg2); + if (GET_MODE (op1) != Pmode) + op1 = convert_to_mode (Pmode, op1, 1); + if (!address_operand (op2, VOIDmode)) { op2 = convert_memory_address (Pmode, op2); @@ -12761,6 +12785,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, emit_label (ok_label); emit_insn (gen_rtx_SET (target, pat)); + if (GET_MODE (op0) != Pmode) + op0 = convert_to_mode (Pmode, op0, 1); + for (i = 0; i < 8; i++) { op = gen_rtx_MEM (V2DImode, @@ -12785,6 +12812,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, if (!REG_P (op0)) op0 = copy_to_mode_reg (SImode, op0); + if (GET_MODE (op2) != Pmode) + op2 = convert_to_mode (Pmode, op2, 1); + op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0)); emit_move_insn (op, op1); @@ -12822,6 +12852,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, if (!REG_P (op0)) op0 = copy_to_mode_reg (SImode, op0); + if (GET_MODE (op3) != Pmode) + op3 = convert_to_mode (Pmode, op3, 1); + /* Force to use xmm0, xmm1 for keylow, keyhi*/ op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0)); emit_move_insn (op, op1); @@ -13271,6 +13304,25 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, emit_insn (pat); return 0; + case IX86_BUILTIN_LDTILECFG: + case IX86_BUILTIN_STTILECFG: + arg0 = CALL_EXPR_ARG (exp, 0); + op0 = expand_normal (arg0); + + if (!address_operand (op0, VOIDmode)) + { + op0 = convert_memory_address (Pmode, op0); + op0 = copy_addr_to_reg (op0); + } + op0 = gen_rtx_MEM (XImode, op0); + if (fcode == IX86_BUILTIN_LDTILECFG) + icode = CODE_FOR_ldtilecfg; + else + icode = CODE_FOR_sttilecfg; + pat = GEN_FCN (icode) (op0); + emit_insn (pat); + return 0; + case IX86_BUILTIN_LLWPCB: arg0 = CALL_EXPR_ARG (exp, 0); op0 = expand_normal (arg0); @@ -16501,6 +16553,8 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) else if (use_vec_merge) { do_vec_merge: + if (!nonimmediate_operand (val, inner_mode)) + val = force_reg (inner_mode, val); tmp = gen_rtx_VEC_DUPLICATE (mode, val); tmp = gen_rtx_VEC_MERGE (mode, tmp, target, GEN_INT (HOST_WIDE_INT_1U << elt)); diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 6fe41c3c24f34..37f22ba373300 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -871,20 +871,36 @@ general_scalar_chain::convert_op (rtx *op, rtx_insn *insn) } else if (MEM_P (*op)) { + rtx_insn* eh_insn, *movabs = NULL; rtx tmp = gen_reg_rtx (GET_MODE (*op)); - /* Handle movabs. */ + /* Emit MOVABS to load from a 64-bit absolute address to a GPR. */ if (!memory_operand (*op, GET_MODE (*op))) { rtx tmp2 = gen_reg_rtx (GET_MODE (*op)); + movabs = emit_insn_before (gen_rtx_SET (tmp2, *op), insn); - emit_insn_before (gen_rtx_SET (tmp2, *op), insn); *op = tmp2; } - emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0), - gen_gpr_to_xmm_move_src (vmode, *op)), - insn); + eh_insn + = emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0), + gen_gpr_to_xmm_move_src (vmode, *op)), + insn); + + if (cfun->can_throw_non_call_exceptions) + { + /* Handle REG_EH_REGION note. */ + rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); + if (note) + { + if (movabs) + eh_insn = movabs; + control_flow_insns.safe_push (eh_insn); + add_reg_note (eh_insn, REG_EH_REGION, XEXP (note, 0)); + } + } + *op = gen_rtx_SUBREG (vmode, tmp, 0); if (dump_file) @@ -1681,6 +1697,7 @@ convert_scalars_to_vector (bool timode_p) { basic_block bb; int converted_insns = 0; + auto_vec control_flow_insns; bitmap_obstack_initialize (NULL); const machine_mode cand_mode[3] = { SImode, DImode, TImode }; @@ -1759,6 +1776,11 @@ convert_scalars_to_vector (bool timode_p) fprintf (dump_file, "Chain #%d conversion is not profitable\n", chain->chain_id); + rtx_insn* iter_insn; + unsigned int ii; + FOR_EACH_VEC_ELT (chain->control_flow_insns, ii, iter_insn) + control_flow_insns.safe_push (iter_insn); + delete chain; } @@ -1826,6 +1848,24 @@ convert_scalars_to_vector (bool timode_p) DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0); } } + + if (!control_flow_insns.is_empty ()) + { + free_dominance_info (CDI_DOMINATORS); + + unsigned int i; + rtx_insn* insn; + FOR_EACH_VEC_ELT (control_flow_insns, i, insn) + if (control_flow_insn_p (insn)) + { + /* Split the block after insn. There will be a fallthru + edge, which is OK so we keep it. We have to create + the exception edges ourselves. */ + bb = BLOCK_FOR_INSN (insn); + split_block (bb, insn); + rtl_make_eh_edge (NULL, bb, BB_END (bb)); + } + } } return 0; @@ -1875,8 +1915,7 @@ class pass_insert_vzeroupper : public rtl_opt_pass /* opt_pass methods: */ virtual bool gate (function *) { - return TARGET_AVX && TARGET_VZEROUPPER - && flag_expensive_optimizations && !optimize_size; + return TARGET_AVX && TARGET_VZEROUPPER; } virtual unsigned int execute (function *) diff --git a/gcc/config/i386/i386-features.h b/gcc/config/i386/i386-features.h index 5c307607ae536..1060552948969 100644 --- a/gcc/config/i386/i386-features.h +++ b/gcc/config/i386/i386-features.h @@ -147,6 +147,7 @@ class scalar_chain bitmap defs; /* Registers used in both vector and sclar modes. */ bitmap defs_conv; + auto_vec control_flow_insns; void build (bitmap candidates, unsigned insn_uid); virtual int compute_convert_gain () = 0; diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 32cc58a764b37..2daa722b2f3a4 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -137,6 +137,11 @@ along with GCC; see the file COPYING3. If not see #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<x_recip_mask_explicit = opts->x_recip_mask_explicit; ptr->x_ix86_arch_string = opts->x_ix86_arch_string; ptr->x_ix86_tune_string = opts->x_ix86_tune_string; - ptr->x_ix86_abi = opts->x_ix86_abi; ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect; ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost; ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes; @@ -768,7 +774,9 @@ static const struct processor_costs *processor_cost_table[] = &btver2_cost, &znver1_cost, &znver2_cost, - &znver3_cost + &znver3_cost, + &znver4_cost, + &znver5_cost }; /* Guarantee that the array is aligned with enum processor_type. */ @@ -808,7 +816,6 @@ ix86_function_specific_restore (struct gcc_options *opts, opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit; opts->x_ix86_arch_string = ptr->x_ix86_arch_string; opts->x_ix86_tune_string = ptr->x_ix86_tune_string; - opts->x_ix86_abi = ptr->x_ix86_abi; opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect; opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost; opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes; @@ -1378,7 +1385,11 @@ ix86_valid_target_attribute_tree (tree fndecl, tree args, if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]) opts->x_ix86_tune_string = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]); - else if (orig_tune_defaulted) + /* If we have explicit arch string and no tune string specified, set + tune_string to NULL and later it will be overriden by arch_string + so target clones can get proper optimization. */ + else if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH] + || orig_tune_defaulted) opts->x_ix86_tune_string = NULL; /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */ @@ -1696,20 +1707,46 @@ parse_mtune_ctrl_str (struct gcc_options *opts, bool dump) curr_feature_string++; clear = true; } - for (i = 0; i < X86_TUNE_LAST; i++) - { - if (!strcmp (curr_feature_string, ix86_tune_feature_names[i])) - { - ix86_tune_features[i] = !clear; - if (dump) - fprintf (stderr, "Explicitly %s feature %s\n", - clear ? "clear" : "set", ix86_tune_feature_names[i]); - break; - } - } - if (i == X86_TUNE_LAST) - error ("unknown parameter to option %<-mtune-ctrl%>: %s", - clear ? curr_feature_string - 1 : curr_feature_string); + + if (!strcmp (curr_feature_string, "use_gather")) + { + ix86_tune_features[X86_TUNE_USE_GATHER_2PARTS] = !clear; + ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] = !clear; + ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] = !clear; + if (dump) + fprintf (stderr, "Explicitly %s features use_gather_2parts," + " use_gather_4parts, use_gather_8parts\n", + clear ? "clear" : "set"); + + } + else if (!strcmp (curr_feature_string, "use_scatter")) + { + ix86_tune_features[X86_TUNE_USE_SCATTER_2PARTS] = !clear; + ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] = !clear; + ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] = !clear; + if (dump) + fprintf (stderr, "Explicitly %s features use_scatter_2parts," + " use_scatter_4parts, use_scatter_8parts\n", + clear ? "clear" : "set"); + } + else + { + for (i = 0; i < X86_TUNE_LAST; i++) + { + if (!strcmp (curr_feature_string, ix86_tune_feature_names[i])) + { + ix86_tune_features[i] = !clear; + if (dump) + fprintf (stderr, "Explicitly %s feature %s\n", + clear ? "clear" : "set", ix86_tune_feature_names[i]); + break; + } + } + + if (i == X86_TUNE_LAST) + error ("unknown parameter to option %<-mtune-ctrl%>: %s", + clear ? curr_feature_string - 1 : curr_feature_string); + } curr_feature_string = next_feature_string; } while (curr_feature_string); @@ -2676,7 +2713,9 @@ ix86_option_override_internal (bool main_args_p, sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH"); if (!(opts_set->x_target_flags & MASK_VZEROUPPER) - && TARGET_EMIT_VZEROUPPER) + && TARGET_EMIT_VZEROUPPER + && flag_expensive_optimizations + && !optimize_size) opts->x_target_flags |= MASK_VZEROUPPER; if (!(opts_set->x_target_flags & MASK_STV)) opts->x_target_flags |= MASK_STV; @@ -2729,6 +2768,9 @@ ix86_option_override_internal (bool main_args_p, { if (TARGET_AVX512F_P (opts->x_ix86_isa_flags)) opts->x_ix86_move_max = PVW_AVX512; + /* Align with vectorizer to avoid potential STLF issue. */ + else if (TARGET_AVX_P (opts->x_ix86_isa_flags)) + opts->x_ix86_move_max = PVW_AVX256; else opts->x_ix86_move_max = PVW_AVX128; } @@ -2750,6 +2792,9 @@ ix86_option_override_internal (bool main_args_p, { if (TARGET_AVX512F_P (opts->x_ix86_isa_flags)) opts->x_ix86_store_max = PVW_AVX512; + /* Align with vectorizer to avoid potential STLF issue. */ + else if (TARGET_AVX_P (opts->x_ix86_isa_flags)) + opts->x_ix86_store_max = PVW_AVX256; else opts->x_ix86_store_max = PVW_AVX128; } @@ -2934,6 +2979,8 @@ ix86_option_override_internal (bool main_args_p, } if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS]) + SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 512); + else if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS]) SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256); else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS]) SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128); @@ -3229,28 +3276,22 @@ ix86_set_current_function (tree fndecl) if (new_tree == NULL_TREE) new_tree = target_option_default_node; - if (old_tree != new_tree) - { - cl_target_option_restore (&global_options, &global_options_set, - TREE_TARGET_OPTION (new_tree)); - if (TREE_TARGET_GLOBALS (new_tree)) - restore_target_globals (TREE_TARGET_GLOBALS (new_tree)); - else if (new_tree == target_option_default_node) - restore_target_globals (&default_target_globals); - else - TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts (); - } - else if (flag_unsafe_math_optimizations - != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations - || (flag_excess_precision - != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision)) + bool fp_flag_change + = (flag_unsafe_math_optimizations + != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations + || (flag_excess_precision + != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision)); + if (old_tree != new_tree || fp_flag_change) { cl_target_option_restore (&global_options, &global_options_set, TREE_TARGET_OPTION (new_tree)); - ix86_excess_precision = flag_excess_precision; - ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations; - DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree - = build_target_option_node (&global_options, &global_options_set); + if (fp_flag_change) + { + ix86_excess_precision = flag_excess_precision; + ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations; + DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree + = build_target_option_node (&global_options, &global_options_set); + } if (TREE_TARGET_GLOBALS (new_tree)) restore_target_globals (TREE_TARGET_GLOBALS (new_tree)); else if (new_tree == target_option_default_node) diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 3596ce81ecf2a..5b09924c9299c 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -274,11 +274,6 @@ extern bool ix86_extract_perm_from_pool_constant (int*, rtx); extern void ix86_target_macros (void); extern void ix86_register_pragmas (void); -/* In i386-d.cc */ -extern void ix86_d_target_versions (void); -extern void ix86_d_register_target_info (void); -extern bool ix86_d_has_stdcall_convention (unsigned int *, unsigned int *); - /* In winnt.cc */ extern void i386_pe_unique_section (tree, int); extern void i386_pe_declare_function_type (FILE *, const char *, int); diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index b16df5b183e14..ea25e56ad6447 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -1015,6 +1015,15 @@ ix86_function_ok_for_sibcall (tree decl, tree exp) } } + if (decl && ix86_use_pseudo_pic_reg ()) + { + /* When PIC register is used, it must be restored after ifunc + function returns. */ + cgraph_node *node = cgraph_node::get (decl); + if (node && node->ifunc_resolver) + return false; + } + /* Otherwise okay. That also includes certain types of indirect calls. */ return true; } @@ -3348,7 +3357,7 @@ ix86_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) if (POINTER_TYPE_P (arg.type)) { /* This is the pointer argument. */ - gcc_assert (TYPE_MODE (arg.type) == Pmode); + gcc_assert (TYPE_MODE (arg.type) == ptr_mode); /* It is at -WORD(AP) in the current frame in interrupt and exception handlers. */ reg = plus_constant (Pmode, arg_pointer_rtx, -UNITS_PER_WORD); @@ -3706,7 +3715,7 @@ zero_call_used_regno_mode (const unsigned int regno) else if (MASK_REGNO_P (regno)) return HImode; else if (MMX_REGNO_P (regno)) - return V4HImode; + return V2SImode; else gcc_unreachable (); } @@ -3826,19 +3835,12 @@ zero_all_mm_registers (HARD_REG_SET need_zeroed_hardregs, if (!need_zero_all_mm) return false; - rtx zero_mmx = NULL_RTX; - machine_mode mode = V4HImode; + machine_mode mode = V2SImode; for (unsigned int regno = FIRST_MMX_REG; regno <= LAST_MMX_REG; regno++) if (regno != ret_mmx_regno) { rtx reg = gen_rtx_REG (mode, regno); - if (zero_mmx == NULL_RTX) - { - zero_mmx = reg; - emit_insn (gen_rtx_SET (reg, CONST0_RTX (mode))); - } - else - emit_move_insn (reg, zero_mmx); + emit_insn (gen_rtx_SET (reg, CONST0_RTX (mode))); } return true; } @@ -3908,11 +3910,6 @@ ix86_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs) /* Now, generate instructions to zero all the other registers. */ - rtx zero_gpr = NULL_RTX; - rtx zero_vector = NULL_RTX; - rtx zero_mask = NULL_RTX; - rtx zero_mmx = NULL_RTX; - for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) { if (!TEST_HARD_REG_BIT (need_zeroed_hardregs, regno)) @@ -3923,59 +3920,34 @@ ix86_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs) SET_HARD_REG_BIT (zeroed_hardregs, regno); - rtx reg, tmp, zero_rtx; machine_mode mode = zero_call_used_regno_mode (regno); - reg = gen_rtx_REG (mode, regno); - zero_rtx = CONST0_RTX (mode); + rtx reg = gen_rtx_REG (mode, regno); + rtx tmp = gen_rtx_SET (reg, CONST0_RTX (mode)); - if (mode == SImode) - if (zero_gpr == NULL_RTX) - { - zero_gpr = reg; - tmp = gen_rtx_SET (reg, zero_rtx); - if (!TARGET_USE_MOV0 || optimize_insn_for_size_p ()) - { - rtx clob = gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (CCmode, - FLAGS_REG)); - tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, - tmp, - clob)); - } - emit_insn (tmp); - } - else - emit_move_insn (reg, zero_gpr); - else if (mode == V4SFmode) - if (zero_vector == NULL_RTX) - { - zero_vector = reg; - tmp = gen_rtx_SET (reg, zero_rtx); - emit_insn (tmp); - } - else - emit_move_insn (reg, zero_vector); - else if (mode == HImode) - if (zero_mask == NULL_RTX) - { - zero_mask = reg; - tmp = gen_rtx_SET (reg, zero_rtx); - emit_insn (tmp); - } - else - emit_move_insn (reg, zero_mask); - else if (mode == V4HImode) - if (zero_mmx == NULL_RTX) - { - zero_mmx = reg; - tmp = gen_rtx_SET (reg, zero_rtx); - emit_insn (tmp); - } - else - emit_move_insn (reg, zero_mmx); - else - gcc_unreachable (); + switch (mode) + { + case E_SImode: + if (!TARGET_USE_MOV0 || optimize_insn_for_size_p ()) + { + rtx clob = gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (CCmode, + FLAGS_REG)); + tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, + tmp, + clob)); + } + /* FALLTHRU. */ + + case E_V4SFmode: + case E_HImode: + case E_V2SImode: + emit_insn (tmp); + break; + + default: + gcc_unreachable (); + } } return zeroed_hardregs; } @@ -4808,13 +4780,31 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, examine_argument (nat_mode, type, 0, &needed_intregs, &needed_sseregs); - need_temp = (!REG_P (container) + bool container_in_reg = false; + if (REG_P (container)) + container_in_reg = true; + else if (GET_CODE (container) == PARALLEL + && GET_MODE (container) == BLKmode + && XVECLEN (container, 0) == 1) + { + /* Check if it is a PARALLEL BLKmode container of an EXPR_LIST + expression in a TImode register. In this case, temp isn't + needed. Otherwise, the TImode variable will be put in the + GPR save area which guarantees only 8-byte alignment. */ + rtx x = XVECEXP (container, 0, 0); + if (GET_CODE (x) == EXPR_LIST + && REG_P (XEXP (x, 0)) + && XEXP (x, 1) == const0_rtx) + container_in_reg = true; + } + + need_temp = (!container_in_reg && ((needed_intregs && TYPE_ALIGN (type) > 64) || TYPE_ALIGN (type) > 128)); /* In case we are passing structure, verify that it is consecutive block on the register save area. If not we need to do moves. */ - if (!need_temp && !REG_P (container)) + if (!need_temp && !container_in_reg) { /* Verify that all registers are strictly consecutive */ if (SSE_REGNO_P (REGNO (XEXP (XVECEXP (container, 0, 0), 0)))) @@ -6846,7 +6836,9 @@ ix86_compute_frame_layout (void) stack clash protections are enabled and the allocated frame is larger than the probe interval, then use pushes to save callee saved registers. */ - || (flag_stack_clash_protection && to_allocate > get_probe_interval ())) + || (flag_stack_clash_protection + && !ix86_target_stack_probe () + && to_allocate > get_probe_interval ())) frame->save_regs_using_mov = false; if (ix86_using_red_zone () @@ -8294,10 +8286,11 @@ ix86_elim_entry_set_got (rtx reg) rtx pat = PATTERN (c_insn); if (GET_CODE (pat) == PARALLEL) { - rtx vec = XVECEXP (pat, 0, 0); - if (GET_CODE (vec) == SET - && XINT (XEXP (vec, 1), 1) == UNSPEC_SET_GOT - && REGNO (XEXP (vec, 0)) == REGNO (reg)) + rtx set = XVECEXP (pat, 0, 0); + if (GET_CODE (set) == SET + && GET_CODE (SET_SRC (set)) == UNSPEC + && XINT (SET_SRC (set), 1) == UNSPEC_SET_GOT + && REGNO (SET_DEST (set)) == REGNO (reg)) delete_insn (c_insn); } } @@ -8731,8 +8724,11 @@ ix86_expand_prologue (void) sse_registers_saved = true; } - /* If stack clash protection is requested, then probe the stack. */ - if (allocate >= 0 && flag_stack_clash_protection) + /* If stack clash protection is requested, then probe the stack, unless it + is already probed on the target. */ + if (allocate >= 0 + && flag_stack_clash_protection + && !ix86_target_stack_probe ()) { ix86_adjust_stack_and_probe (allocate, int_registers_saved, false); allocate = 0; @@ -11791,7 +11787,7 @@ ix86_tls_address_pattern_p (rtx op) } /* Rewrite *LOC so that it refers to a default TLS address space. */ -void +static void ix86_rewrite_tls_address_1 (rtx *loc) { subrtx_ptr_iterator::array_type array; @@ -11813,6 +11809,13 @@ ix86_rewrite_tls_address_1 (rtx *loc) if (GET_CODE (u) == UNSPEC && XINT (u, 1) == UNSPEC_TP) { + /* NB: Since address override only applies to the + (reg32) part in fs:(reg32), return if address + override is used. */ + if (Pmode != word_mode + && REG_P (XEXP (*x, 1 - i))) + return; + addr_space_t as = DEFAULT_TLS_SEG_REG; *x = XEXP (*x, 1 - i); @@ -12261,8 +12264,8 @@ output_pic_addr_const (FILE *file, rtx x, int code) assemble_name (asm_out_file, buf); break; - case CONST_INT: - fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); + CASE_CONST_SCALAR_INT: + output_addr_const (file, x); break; case CONST: @@ -14382,9 +14385,19 @@ ix86_dirflag_mode_needed (rtx_insn *insn) static bool ix86_check_avx_upper_register (const_rtx exp) { - return (SSE_REG_P (exp) - && !EXT_REX_SSE_REG_P (exp) - && GET_MODE_BITSIZE (GET_MODE (exp)) > 128); + /* construct_container may return a parallel with expr_list + which contains the real reg and mode */ + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, exp, NONCONST) + { + const_rtx x = *iter; + if (SSE_REG_P (x) + && !EXT_REX_SSE_REG_P (x) + && GET_MODE_BITSIZE (GET_MODE (x)) > 128) + return true; + } + + return false; } /* Check if a 256bit or 512bit AVX register is referenced in stores. */ @@ -14392,7 +14405,9 @@ ix86_check_avx_upper_register (const_rtx exp) static void ix86_check_avx_upper_stores (rtx dest, const_rtx, void *data) { - if (ix86_check_avx_upper_register (dest)) + if (SSE_REG_P (dest) + && !EXT_REX_SSE_REG_P (dest) + && GET_MODE_BITSIZE (GET_MODE (dest)) > 128) { bool *used = (bool *) data; *used = true; @@ -14439,21 +14454,25 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) modes wider than 256 bits. It's only safe to issue a vzeroupper if all SSE registers are clobbered. */ const function_abi &abi = insn_callee_abi (insn); - if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], - abi.mode_clobbers (V4DImode))) + /* Should be safe to issue an vzeroupper before sibling_call_p. + Also there not mode_exit for sibling_call, so there could be + missing vzeroupper for that. */ + if (!(SIBLING_CALL_P (insn) + || hard_reg_set_subset_p (reg_class_contents[SSE_REGS], + abi.mode_clobbers (V4DImode)))) return AVX_U128_ANY; return AVX_U128_CLEAN; } - subrtx_iterator::array_type array; - rtx set = single_set (insn); if (set) { rtx dest = SET_DEST (set); rtx src = SET_SRC (set); - if (ix86_check_avx_upper_register (dest)) + if (SSE_REG_P (dest) + && !EXT_REX_SSE_REG_P (dest) + && GET_MODE_BITSIZE (GET_MODE (dest)) > 128) { /* This is an YMM/ZMM load. Return AVX_U128_DIRTY if the source isn't zero. */ @@ -14464,9 +14483,8 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) } else { - FOR_EACH_SUBRTX (iter, array, src, NONCONST) - if (ix86_check_avx_upper_register (*iter)) - return AVX_U128_DIRTY; + if (ix86_check_avx_upper_register (src)) + return AVX_U128_DIRTY; } /* This isn't YMM/ZMM load/store. */ @@ -14477,9 +14495,8 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) Hardware changes state only when a 256bit register is written to, but we need to prevent the compiler from moving optimal insertion point above eventual read from 256bit or 512 bit register. */ - FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST) - if (ix86_check_avx_upper_register (*iter)) - return AVX_U128_DIRTY; + if (ix86_check_avx_upper_register (PATTERN (insn))) + return AVX_U128_DIRTY; return AVX_U128_ANY; } @@ -14578,7 +14595,19 @@ ix86_avx_u128_mode_after (int mode, rtx_insn *insn) bool avx_upper_reg_found = false; note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found); - return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN; + if (avx_upper_reg_found) + return AVX_U128_DIRTY; + + /* If the function desn't clobber any sse registers or only clobber + 128-bit part, Then vzeroupper isn't issued before the function exit. + the status not CLEAN but ANY after the function. */ + const function_abi &abi = insn_callee_abi (insn); + if (!(SIBLING_CALL_P (insn) + || hard_reg_set_subset_p (reg_class_contents[SSE_REGS], + abi.mode_clobbers (V4DImode)))) + return AVX_U128_ANY; + + return AVX_U128_CLEAN; } /* Otherwise, return current mode. Remember that if insn @@ -16580,10 +16609,18 @@ assign_386_stack_local (machine_mode mode, enum ix86_stack_slot n) if (s->mode == mode && s->n == n) return validize_mem (copy_rtx (s->rtl)); + int align = 0; + /* For DImode with SLOT_FLOATxFDI_387 use 32-bit + alignment with -m32 -mpreferred-stack-boundary=2. */ + if (mode == DImode + && !TARGET_64BIT + && n == SLOT_FLOATxFDI_387 + && ix86_preferred_stack_boundary < GET_MODE_ALIGNMENT (DImode)) + align = 32; s = ggc_alloc (); s->n = n; s->mode = mode; - s->rtl = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); + s->rtl = assign_stack_local (mode, GET_MODE_SIZE (mode), align); s->next = ix86_stack_locals; ix86_stack_locals = s; @@ -18379,6 +18416,15 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) } break; + case IX86_BUILTIN_PBLENDVB256: + case IX86_BUILTIN_BLENDVPS256: + case IX86_BUILTIN_BLENDVPD256: + /* pcmpeqb/d/q is under avx2, w/o avx2, it's veclower + to scalar operations and not combined back. */ + if (!TARGET_AVX2) + break; + + /* FALLTHRU. */ case IX86_BUILTIN_BLENDVPD: /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2, w/o sse4.2, it's veclowered to scalar operations and @@ -18387,10 +18433,7 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) break; /* FALLTHRU. */ case IX86_BUILTIN_PBLENDVB128: - case IX86_BUILTIN_PBLENDVB256: case IX86_BUILTIN_BLENDVPS: - case IX86_BUILTIN_BLENDVPS256: - case IX86_BUILTIN_BLENDVPD256: gcc_assert (n_args == 3); arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); @@ -18405,8 +18448,10 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode ? intSI_type_node : intDI_type_node; type = get_same_sized_vectype (itype, type); - arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2); } + else + type = signed_type_for (type); + arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2); tree zero_vec = build_zero_cst (type); tree cmp_type = truth_type_for (type); tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec); @@ -18940,6 +18985,13 @@ ix86_vectorize_builtin_scatter (const_tree vectype, if (!TARGET_AVX512F) return NULL_TREE; + if (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 2u) + ? !TARGET_USE_SCATTER_2PARTS + : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u) + ? !TARGET_USE_SCATTER_4PARTS + : !TARGET_USE_SCATTER_8PARTS)) + return NULL_TREE; + if ((TREE_CODE (index_type) != INTEGER_TYPE && !POINTER_TYPE_P (index_type)) || (TYPE_MODE (index_type) != SImode @@ -20240,10 +20292,13 @@ ix86_vec_cost (machine_mode mode, int cost) if (GET_MODE_BITSIZE (mode) == 128 && TARGET_SSE_SPLIT_REGS) - return cost * 2; - if (GET_MODE_BITSIZE (mode) > 128 + return cost * GET_MODE_BITSIZE (mode) / 64; + else if (GET_MODE_BITSIZE (mode) > 128 && TARGET_AVX256_SPLIT_REGS) return cost * GET_MODE_BITSIZE (mode) / 128; + else if (GET_MODE_BITSIZE (mode) > 256 + && TARGET_AVX512_SPLIT_REGS) + return cost * GET_MODE_BITSIZE (mode) / 256; return cost; } @@ -21210,6 +21265,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, rtx this_reg, tmp, fnaddr; unsigned int tmp_regno; rtx_insn *insn; + int saved_flag_force_indirect_call = flag_force_indirect_call; if (TARGET_64BIT) tmp_regno = R10_REG; @@ -21222,6 +21278,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, tmp_regno = DX_REG; else tmp_regno = CX_REG; + + if (flag_pic) + flag_force_indirect_call = 0; } emit_note (NOTE_INSN_PROLOGUE_END); @@ -21389,6 +21448,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, final (insn, file, 1); final_end_function (); assemble_end_function (thunk_fndecl, fnname); + + flag_force_indirect_call = saved_flag_force_indirect_call; } static void @@ -21506,7 +21567,10 @@ x86_function_profiler (FILE *file, int labelno ATTRIBUTE_UNUSED) if (TARGET_64BIT) { #ifndef NO_PROFILE_COUNTERS - fprintf (file, "\tleaq\t%sP%d(%%rip),%%r11\n", LPREFIX, labelno); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, "\tlea\tr11, %sP%d[rip]\n", LPREFIX, labelno); + else + fprintf (file, "\tleaq\t%sP%d(%%rip), %%r11\n", LPREFIX, labelno); #endif if (!TARGET_PECOFF) @@ -21517,12 +21581,29 @@ x86_function_profiler (FILE *file, int labelno ATTRIBUTE_UNUSED) /* NB: R10 is caller-saved. Although it can be used as a static chain register, it is preserved when calling mcount for nested functions. */ - fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n", - mcount_name); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, "1:\tmovabs\tr10, OFFSET FLAT:%s\n" + "\tcall\tr10\n", mcount_name); + else + fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n", + mcount_name); break; case CM_LARGE_PIC: #ifdef NO_PROFILE_COUNTERS - fprintf (file, "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n"); + if (ASSEMBLER_DIALECT == ASM_INTEL) + { + fprintf (file, "1:movabs\tr11, " + "OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-1b\n"); + fprintf (file, "\tlea\tr10, 1b[rip]\n"); + fprintf (file, "\tadd\tr10, r11\n"); + fprintf (file, "\tmovabs\tr11, OFFSET FLAT:%s@PLTOFF\n", + mcount_name); + fprintf (file, "\tadd\tr10, r11\n"); + fprintf (file, "\tcall\tr10\n"); + break; + } + fprintf (file, + "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n"); fprintf (file, "\tleaq\t1b(%%rip), %%r10\n"); fprintf (file, "\taddq\t%%r11, %%r10\n"); fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name); @@ -21534,7 +21615,11 @@ x86_function_profiler (FILE *file, int labelno ATTRIBUTE_UNUSED) break; case CM_SMALL_PIC: case CM_MEDIUM_PIC: - fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, "1:\tcall\t[QWORD PTR %s@GOTPCREL[rip]]\n", + mcount_name); + else + fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name); break; default: x86_print_call_or_nop (file, mcount_name); @@ -21547,23 +21632,37 @@ x86_function_profiler (FILE *file, int labelno ATTRIBUTE_UNUSED) else if (flag_pic) { #ifndef NO_PROFILE_COUNTERS - fprintf (file, "\tleal\t%sP%d@GOTOFF(%%ebx),%%" PROFILE_COUNT_REGISTER "\n", - LPREFIX, labelno); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, + "\tlea\t" PROFILE_COUNT_REGISTER ", %sP%d@GOTOFF[ebx]\n", + LPREFIX, labelno); + else + fprintf (file, + "\tleal\t%sP%d@GOTOFF(%%ebx), %%" PROFILE_COUNT_REGISTER "\n", + LPREFIX, labelno); #endif - fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, "1:\tcall\t[DWORD PTR %s@GOT[ebx]]\n", mcount_name); + else + fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name); } else { #ifndef NO_PROFILE_COUNTERS - fprintf (file, "\tmovl\t$%sP%d,%%" PROFILE_COUNT_REGISTER "\n", - LPREFIX, labelno); + if (ASSEMBLER_DIALECT == ASM_INTEL) + fprintf (file, + "\tmov\t" PROFILE_COUNT_REGISTER ", OFFSET FLAT:%sP%d\n", + LPREFIX, labelno); + else + fprintf (file, "\tmovl\t$%sP%d, %%" PROFILE_COUNT_REGISTER "\n", + LPREFIX, labelno); #endif x86_print_call_or_nop (file, mcount_name); } if (flag_record_mcount - || lookup_attribute ("fentry_section", - DECL_ATTRIBUTES (current_function_decl))) + || lookup_attribute ("fentry_section", + DECL_ATTRIBUTES (current_function_decl))) { const char *sname = "__mcount_loc"; @@ -22545,6 +22644,13 @@ ix86_stack_protect_guard (void) return default_stack_protect_guard (); } +static bool +ix86_stack_protect_runtime_enabled_p (void) +{ + /* Naked functions should not enable stack protector. */ + return !ix86_function_naked (current_function_decl); +} + /* For 32-bit code we can save PIC register setup by using __stack_chk_fail_local hidden function instead of calling __stack_chk_fail directly. 64-bit code doesn't need to setup any PIC @@ -22817,15 +22923,22 @@ ix86_reassociation_width (unsigned int op, machine_mode mode) if (width == 1) return 1; - /* Integer vector instructions execute in FP unit + /* Znver1-4 Integer vector instructions execute in FP unit and can execute 3 additions and one multiplication per cycle. */ if ((ix86_tune == PROCESSOR_ZNVER1 || ix86_tune == PROCESSOR_ZNVER2 - || ix86_tune == PROCESSOR_ZNVER3) + || ix86_tune == PROCESSOR_ZNVER3 || ix86_tune == PROCESSOR_ZNVER4) && INTEGRAL_MODE_P (mode) && op != PLUS && op != MINUS) return 1; + /* Znver5 can do 2 integer multiplications per cycle with latency + of 3. */ + if (ix86_tune == PROCESSOR_ZNVER5 + && INTEGRAL_MODE_P (mode) && op != PLUS && op != MINUS) + width = 6; /* Account for targets that splits wide vectors into multiple parts. */ - if (TARGET_AVX256_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 128) + if (TARGET_AVX512_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 256) + div = GET_MODE_BITSIZE (mode) / 256; + else if (TARGET_AVX256_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 128) div = GET_MODE_BITSIZE (mode) / 128; else if (TARGET_SSE_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 64) div = GET_MODE_BITSIZE (mode) / 64; @@ -24548,6 +24661,10 @@ ix86_libgcc_floating_mode_supported_p #undef TARGET_STACK_PROTECT_GUARD #define TARGET_STACK_PROTECT_GUARD ix86_stack_protect_guard +#undef TARGET_STACK_PROTECT_RUNTIME_ENABLED_P +#define TARGET_STACK_PROTECT_RUNTIME_ENABLED_P \ + ix86_stack_protect_runtime_enabled_p + #if !TARGET_MACHO #undef TARGET_STACK_PROTECT_FAIL #define TARGET_STACK_PROTECT_FAIL ix86_stack_protect_fail diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 363082ba47b3a..ed988ca280eab 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -392,10 +392,16 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_AVOID_4BYTE_PREFIXES] #define TARGET_USE_GATHER_2PARTS \ ix86_tune_features[X86_TUNE_USE_GATHER_2PARTS] +#define TARGET_USE_SCATTER_2PARTS \ + ix86_tune_features[X86_TUNE_USE_SCATTER_2PARTS] #define TARGET_USE_GATHER_4PARTS \ ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] -#define TARGET_USE_GATHER \ - ix86_tune_features[X86_TUNE_USE_GATHER] +#define TARGET_USE_SCATTER_4PARTS \ + ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] +#define TARGET_USE_GATHER_8PARTS \ + ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] +#define TARGET_USE_SCATTER_8PARTS \ + ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] #define TARGET_FUSE_CMP_AND_BRANCH_32 \ ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32] #define TARGET_FUSE_CMP_AND_BRANCH_64 \ @@ -407,6 +413,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS] #define TARGET_FUSE_ALU_AND_BRANCH \ ix86_tune_features[X86_TUNE_FUSE_ALU_AND_BRANCH] +#define TARGET_FUSE_MOV_AND_ALU \ + ix86_tune_features[X86_TUNE_FUSE_MOV_AND_ALU] #define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU] #define TARGET_AVOID_LEA_FOR_ADDR \ ix86_tune_features[X86_TUNE_AVOID_LEA_FOR_ADDR] @@ -414,6 +422,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL] #define TARGET_AVX256_SPLIT_REGS \ ix86_tune_features[X86_TUNE_AVX256_SPLIT_REGS] +#define TARGET_AVX512_SPLIT_REGS \ + ix86_tune_features[X86_TUNE_AVX512_SPLIT_REGS] #define TARGET_GENERAL_REGS_SSE_SPILL \ ix86_tune_features[X86_TUNE_GENERAL_REGS_SSE_SPILL] #define TARGET_AVOID_MEM_OPND_FOR_CMOVE \ @@ -608,11 +618,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); /* Target Pragmas. */ #define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas () -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS ix86_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO ix86_d_register_target_info -#define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention - #ifndef CC1_SPEC #define CC1_SPEC "%(cc1_cpu) " #endif @@ -2257,6 +2262,8 @@ enum processor_type PROCESSOR_ZNVER1, PROCESSOR_ZNVER2, PROCESSOR_ZNVER3, + PROCESSOR_ZNVER4, + PROCESSOR_ZNVER5, PROCESSOR_max }; @@ -2328,10 +2335,9 @@ constexpr wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT constexpr wide_int_bitmask PTA_TIGERLAKE = PTA_ICELAKE_CLIENT | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_CLWB | PTA_AVX512VP2INTERSECT | PTA_KL | PTA_WIDEKL; constexpr wide_int_bitmask PTA_SAPPHIRERAPIDS = PTA_ICELAKE_SERVER | PTA_MOVDIRI - | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT | PTA_ENQCMD | PTA_CLDEMOTE - | PTA_PTWRITE | PTA_WAITPKG | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE - | PTA_AMX_INT8 | PTA_AMX_BF16 | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 - | PTA_AVX512BF16; + | PTA_MOVDIR64B | PTA_ENQCMD | PTA_CLDEMOTE | PTA_PTWRITE | PTA_WAITPKG + | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE | PTA_AMX_INT8 | PTA_AMX_BF16 + | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 | PTA_AVX512BF16; constexpr wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD | PTA_PREFETCHWT1; constexpr wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE; @@ -2350,6 +2356,23 @@ constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX | PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI; constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW | PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ; +constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 + | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 + | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 | PTA_BMI | PTA_BMI2 + | PTA_F16C | PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT + | PTA_FSGSBASE | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED + | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES | PTA_SHA | PTA_LZCNT + | PTA_POPCNT; +constexpr wide_int_bitmask PTA_ZNVER2 = PTA_ZNVER1 | PTA_CLWB | PTA_RDPID + | PTA_WBNOINVD; +constexpr wide_int_bitmask PTA_ZNVER3 = PTA_ZNVER2 | PTA_VAES | PTA_VPCLMULQDQ + | PTA_PKU; +constexpr wide_int_bitmask PTA_ZNVER4 = PTA_ZNVER3 | PTA_AVX512F | PTA_AVX512DQ + | PTA_AVX512IFMA | PTA_AVX512CD | PTA_AVX512BW | PTA_AVX512VL + | PTA_AVX512BF16 | PTA_AVX512VBMI | PTA_AVX512VBMI2 | PTA_GFNI + | PTA_AVX512VNNI | PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ; +constexpr wide_int_bitmask PTA_ZNVER5 = PTA_ZNVER4 | PTA_AVXVNNI + | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT; #ifndef GENERATOR_FILE diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c74edd1aaef38..4142d7fec4d38 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -329,6 +329,10 @@ ;; For HRESET support UNSPECV_HRESET + + ;; For AMX-TILE + UNSPECV_LDTILECFG + UNSPECV_STTILECFG ]) ;; Constants to represent rounding modes in the ROUND instruction @@ -474,7 +478,7 @@ ;; Processor type. (define_attr "cpu" "none,pentium,pentiumpro,geode,k6,athlon,k8,core2,nehalem, atom,slm,glm,haswell,generic,amdfam10,bdver1,bdver2,bdver3, - bdver4,btver2,znver1,znver2,znver3" + bdver4,btver2,znver1,znver2,znver3,znver4,znver5" (const (symbol_ref "ix86_schedule"))) ;; A basic instruction type. Refinements due to arguments to be @@ -1303,7 +1307,8 @@ (include "bdver1.md") (include "bdver3.md") (include "btver2.md") -(include "znver1.md") +(include "znver.md") +(include "zn4zn5.md") (include "geode.md") (include "atom.md") (include "slm.md") @@ -2397,7 +2402,10 @@ (clobber (reg:CC FLAGS_REG))])] { int shift = ctz_hwi (UINTVAL (operands[1])); - operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); + rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); + if (ix86_endbr_immediate_operand (op1, VOIDmode)) + FAIL; + operands[1] = op1; operands[2] = gen_int_mode (shift, QImode); }) @@ -2519,7 +2527,8 @@ "optimize_insn_for_size_p () && optimize_size > 1 && operands[1] != const0_rtx && IN_RANGE (INTVAL (operands[1]), -128, 127) - && !ix86_red_zone_used" + && !ix86_red_zone_used + && REGNO (operands[0]) != SP_REG" [(set (match_dup 2) (match_dup 1)) (set (match_dup 0) (match_dup 3))] { @@ -3580,9 +3589,9 @@ ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7. (define_insn "*movdf_internal" [(set (match_operand:DF 0 "nonimmediate_operand" - "=Yf*f,m ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,v,r ,o ,r ,m") + "=Yf*f,m ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,?r,?v,r ,o ,r ,m") (match_operand:DF 1 "general_operand" - "Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,v,r ,roF,rF,rmF,rC"))] + "Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x, v, r,roF,rF,rmF,rC"))] "!(MEM_P (operands[0]) && MEM_P (operands[1])) && (lra_in_progress || reload_completed || !CONST_DOUBLE_P (operands[1]) @@ -10399,22 +10408,25 @@ "ix86_expand_binary_operator (, mode, operands); DONE;") (define_insn_and_split "*di3_doubleword" - [(set (match_operand:DI 0 "nonimmediate_operand") + [(set (match_operand:DI 0 "nonimmediate_operand" "=ro,r") (any_or:DI - (match_operand:DI 1 "nonimmediate_operand") - (match_operand:DI 2 "x86_64_szext_general_operand"))) + (match_operand:DI 1 "nonimmediate_operand" "0,0") + (match_operand:DI 2 "x86_64_szext_general_operand" "re,o"))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT - && ix86_binary_operator_ok (, DImode, operands) - && ix86_pre_reload_split ()" + && ix86_binary_operator_ok (, DImode, operands)" "#" - "&& 1" + "&& reload_completed" [(const_int 0)] { + /* This insn may disappear completely when operands[2] == const0_rtx + and operands[0] == operands[1], which requires a NOTE_INSN_DELETED. */ + bool emit_insn_deleted_note_p = false; + split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]); if (operands[2] == const0_rtx) - emit_move_insn (operands[0], operands[1]); + emit_insn_deleted_note_p = true; else if (operands[2] == constm1_rtx) { if ( == IOR) @@ -10426,7 +10438,10 @@ ix86_expand_binary_operator (, SImode, &operands[0]); if (operands[5] == const0_rtx) - emit_move_insn (operands[3], operands[4]); + { + if (emit_insn_deleted_note_p) + emit_note (NOTE_INSN_DELETED); + } else if (operands[5] == constm1_rtx) { if ( == IOR) @@ -14152,7 +14167,8 @@ (const_int 1) (and:SI (match_operand:SI 2 "register_operand") - (match_operand 3 "const_int_operand")))]) + (match_operand 3 "const_int_operand"))) + (const_int 0)]) (label_ref (match_operand 4)) (pc))) (clobber (reg:CC FLAGS_REG))] @@ -17058,8 +17074,10 @@ "! TARGET_POPCNT" { rtx scratch = gen_reg_rtx (QImode); + rtx tmp = gen_reg_rtx (HImode); - emit_insn (gen_parityhi2_cmp (operands[1])); + emit_move_insn (tmp, operands[1]); + emit_insn (gen_parityhi2_cmp (tmp)); ix86_expand_setcc (scratch, ORDERED, gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); @@ -17990,7 +18008,7 @@ [(set (match_operand:SF 0 "register_operand" "=x,x,x") (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "0,x,m")] UNSPEC_RSQRT))] - "TARGET_SSE && TARGET_SSE_MATH" + "TARGET_SSE" "@ %vrsqrtss\t{%d1, %0|%0, %d1} %vrsqrtss\t{%d1, %0|%0, %d1} @@ -20738,7 +20756,8 @@ && REGNO (operands[2]) != REGNO (operands[1]) && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (4, operands[2]) - && !reg_overlap_mentioned_p (operands[0], operands[3])" + && !reg_overlap_mentioned_p (operands[0], operands[3]) + && !reg_mentioned_p (operands[2], operands[6])" [(parallel [(set (match_dup 7) (match_dup 8)) (set (match_dup 1) (match_dup 9))]) (set (match_dup 0) (match_dup 3)) @@ -23977,6 +23996,26 @@ DONE; }) +(define_insn "ldtilecfg" + [(unspec_volatile [(match_operand:XI 0 "memory_operand" "m")] + UNSPECV_LDTILECFG)] + "TARGET_AMX_TILE" + "ldtilecfg\t%0" + [(set_attr "type" "other") + (set_attr "prefix" "maybe_evex") + (set_attr "memory" "load") + (set_attr "mode" "XI")]) + +(define_insn "sttilecfg" + [(set (match_operand:XI 0 "memory_operand" "=m") + (unspec_volatile:XI [(const_int 0)] UNSPECV_STTILECFG))] + "TARGET_AMX_TILE" + "sttilecfg\t%0" + [(set_attr "type" "other") + (set_attr "prefix" "maybe_evex") + (set_attr "memory" "store") + (set_attr "mode" "XI")]) + (include "mmx.md") (include "sse.md") (include "sync.md") diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index a6b0e28f23853..ed31cab0a46a7 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -109,8 +109,8 @@ TargetVariable enum cmodel ix86_cmodel = CM_32 ;; -mabi= -TargetSave -enum calling_abi x_ix86_abi +TargetVariable +enum calling_abi ix86_abi = SYSV_ABI ;; -masm= TargetSave @@ -420,6 +420,10 @@ mpc80 Target RejectNegative Set 80387 floating-point precision to 80-bit. +mdaz-ftz +Target +Set the FTZ and DAZ Flags. + mpreferred-stack-boundary= Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) Attempt to keep stack aligned to this power of 2. @@ -1205,7 +1209,7 @@ Support MWAIT and MONITOR built-in functions and code generation. mavx512fp16 Target Mask(ISA2_AVX512FP16) Var(ix86_isa_flags2) Save -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512FP16 built-in functions and code generation. +Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512-FP16 built-in functions and code generation. mdirect-extern-access Target Var(ix86_direct_extern_access) Init(1) @@ -1214,3 +1218,11 @@ Do not use GOT to access external symbols. -param=x86-stlf-window-ninsns= Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param Instructions number above which STFL stall penalty can be compensated. + +mgather +Target Alias(mtune-ctrl=, use_gather, ^use_gather) +Enable vectorization for gather instruction. + +mscatter +Target Alias(mtune-ctrl=, use_scatter, ^use_scatter) +Enable vectorization for scatter instruction. diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index d3ca0cd0279df..ddbe6a4054bf6 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -197,7 +197,7 @@ along with GCC; see the file COPYING3. If not see #undef ENDFILE_SPEC #define ENDFILE_SPEC \ - "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ + "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ %{!shared:%:if-exists(default-manifest.o%s)}\ %{fvtable-verify=none:%s; \ fvtable-verify=preinit:vtv_end.o%s; \ diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 197f19e4b1a49..2ca01c144d5d4 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1211,7 +1211,10 @@ (match_operand:V2SF 1 "register_operand") 0) (match_dup 2)))] "TARGET_MMX_WITH_SSE" - "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);") +{ + operands[1] = force_reg (V2SFmode, operands[1]); + operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1); +}) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index a8cc17a054dec..ac02c61acb391 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -2019,11 +2019,11 @@ for(i = 4; i < 7; i++) { elt = XVECEXP (op, 0, i); - if (GET_CODE (elt) != SET - || GET_CODE (SET_DEST (elt)) != REG - || GET_MODE (SET_DEST (elt)) != V2DImode - || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i) - || SET_SRC (elt) != CONST0_RTX (V2DImode)) + if (GET_CODE (elt) != CLOBBER + || GET_MODE (elt) != VOIDmode + || GET_CODE (XEXP (elt, 0)) != REG + || GET_MODE (XEXP (elt, 0)) != V2DImode + || REGNO (XEXP (elt, 0)) != GET_SSE_REGNO (i)) return false; } @@ -2069,11 +2069,11 @@ for(i = 4; i < 7; i++) { elt = XVECEXP (op, 0, i + 1); - if (GET_CODE (elt) != SET - || GET_CODE (SET_DEST (elt)) != REG - || GET_MODE (SET_DEST (elt)) != V2DImode - || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i) - || SET_SRC (elt) != CONST0_RTX (V2DImode)) + if (GET_CODE (elt) != CLOBBER + || GET_MODE (elt) != VOIDmode + || GET_CODE (XEXP (elt, 0)) != REG + || GET_MODE (XEXP (elt, 0)) != V2DImode + || REGNO (XEXP (elt, 0)) != GET_SSE_REGNO (i)) return false; } diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h index eb6a451c10a02..47fd9b8a2c6a7 100644 --- a/gcc/config/i386/smmintrin.h +++ b/gcc/config/i386/smmintrin.h @@ -365,17 +365,18 @@ _mm_insert_ps (__m128 __D, __m128 __S, const int __N) extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_extract_ps (__m128 __X, const int __N) { - union { int i; float f; } __tmp; - __tmp.f = __builtin_ia32_vec_ext_v4sf ((__v4sf)__X, __N); - return __tmp.i; + union { int __i; float __f; } __tmp; + __tmp.__f = __builtin_ia32_vec_ext_v4sf ((__v4sf)__X, __N); + return __tmp.__i; } #else #define _mm_extract_ps(X, N) \ (__extension__ \ ({ \ - union { int i; float f; } __tmp; \ - __tmp.f = __builtin_ia32_vec_ext_v4sf ((__v4sf)(__m128)(X), (int)(N)); \ - __tmp.i; \ + union { int __i; float __f; } __tmp; \ + __tmp.__f = __builtin_ia32_vec_ext_v4sf ((__v4sf)(__m128)(X), \ + (int)(N)); \ + __tmp.__i; \ })) #endif diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5e93aa23b47a4..09b308e03c7cf 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1215,7 +1215,7 @@ ;; For 256-bit modes for TARGET_AVX512VL && TARGET_AVX512DQ ;; i32x4, f32x4, i64x2 or f64x2 suffixes. (define_mode_attr i128vldq - [(V8SF "f32x4") (V4DF "f64x2") + [(V16HF "i32x4") (V8SF "f32x4") (V4DF "f64x2") (V32QI "i32x4") (V16HI "i32x4") (V8SI "i32x4") (V4DI "i64x2")]) ;; Mix-n-match @@ -1411,12 +1411,12 @@ }) (define_insn "*_load_mask" - [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v") - (vec_merge:VI12_AVX512VL - (unspec:VI12_AVX512VL - [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")] + [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v") + (vec_merge:VI12HF_AVX512VL + (unspec:VI12HF_AVX512VL + [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")] UNSPEC_MASKLOAD) - (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C") + (match_operand:VI12HF_AVX512VL 2 "nonimm_or_0_operand" "0C") (match_operand: 3 "register_operand" "Yk")))] "TARGET_AVX512BW" "vmovdqu\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}" @@ -1425,9 +1425,9 @@ (set_attr "mode" "")]) (define_insn_and_split "*_load" - [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v") - (unspec:VI12_AVX512VL - [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")] + [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v") + (unspec:VI12HF_AVX512VL + [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")] UNSPEC_MASKLOAD))] "TARGET_AVX512BW" "#" @@ -1554,7 +1554,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_insn "_store_mask" +(define_insn "*_store_mask" [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m") (vec_merge:V48_AVX512VL (match_operand:V48_AVX512VL 1 "register_operand" "v") @@ -1582,7 +1582,7 @@ (set_attr "memory" "store") (set_attr "mode" "")]) -(define_insn "_store_mask" +(define_insn "*_store_mask" [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m") (vec_merge:VI12HF_AVX512VL (match_operand:VI12HF_AVX512VL 1 "register_operand" "v") @@ -3627,8 +3627,7 @@ gen_lowpart (mode, operands[1])); operands[2] = gen_lowpart (mode, operands[2]); - if (!MEM_P (operands[3])) - operands[3] = force_reg (mode, operands[3]); + operands[3] = force_reg (mode, operands[3]); operands[3] = lowpart_subreg (mode, operands[3], mode); }) @@ -3725,32 +3724,19 @@ ;; Since vpcmpd implicitly clear the upper bits of dest, transform ;; vpcmpd + zero_extend to vpcmpd since the instruction -(define_insn_and_split "*_cmp3_zero_extend" - [(set (match_operand:SWI248x 0 "register_operand") +(define_insn "*_cmp3_zero_extend" + [(set (match_operand:SWI248x 0 "register_operand" "=k") (zero_extend:SWI248x (unspec: - [(match_operand:V48H_AVX512VL 1 "nonimmediate_operand") - (match_operand:V48H_AVX512VL 2 "nonimmediate_operand") + [(match_operand:V48H_AVX512VL 1 "nonimmediate_operand" "v") + (match_operand:V48H_AVX512VL 2 "nonimmediate_operand" "vm") (match_operand:SI 3 "const_0_to_7_operand" "n")] UNSPEC_PCMP)))] "TARGET_AVX512F && (!VALID_MASK_AVX512BW_MODE (mode) || TARGET_AVX512BW) - && ix86_pre_reload_split () && (GET_MODE_NUNITS (mode) < GET_MODE_PRECISION (mode))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_PCMP))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, - operands[0], mode); -} + "vcmp\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -3778,21 +3764,22 @@ "#" "&& 1" [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_PCMP)) - (set (match_dup 4) (match_dup 0))] + (zero_extend:SWI248x + (unspec: + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_PCMP))) + (set (match_dup 4) (match_dup 5))] { - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, + operands[5] = lowpart_subreg (mode, operands[0], mode); -} - [(set_attr "type" "ssecmp") - (set_attr "length_immediate" "1") - (set_attr "prefix" "evex") - (set_attr "mode" "")]) + if (SUBREG_P (operands[5])) + { + SUBREG_PROMOTED_VAR_P (operands[5]) = 1; + SUBREG_PROMOTED_SET (operands[5], 1); + } +}) (define_insn_and_split "*_cmp3" [(set (match_operand: 0 "register_operand") @@ -3827,31 +3814,18 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_insn_and_split "*_cmp3_zero_extend" - [(set (match_operand:SWI248x 0 "register_operand") +(define_insn "*_cmp3_zero_extend" + [(set (match_operand:SWI248x 0 "register_operand" "=k") (zero_extend:SWI248x (unspec: - [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand") - (match_operand:VI12_AVX512VL 2 "nonimmediate_operand") - (match_operand:SI 3 "const_0_to_7_operand")] + [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v") + (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_7_operand" "n")] UNSPEC_PCMP)))] "TARGET_AVX512BW - && ix86_pre_reload_split () - && (GET_MODE_NUNITS (mode) - < GET_MODE_PRECISION (mode))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_PCMP))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, - operands[0], mode); -} + && (GET_MODE_NUNITS (mode) + < GET_MODE_PRECISION (mode))" + "vpcmp\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -3878,16 +3852,21 @@ "#" "&& 1" [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_PCMP)) - (set (match_dup 4) (match_dup 0))] + (zero_extend:SWI248x + (unspec: + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_PCMP))) + (set (match_dup 4) (match_dup 5))] { - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, + operands[5] = lowpart_subreg (mode, operands[0], mode); + if (SUBREG_P (operands[5])) + { + SUBREG_PROMOTED_VAR_P (operands[5]) = 1; + SUBREG_PROMOTED_SET (operands[5], 1); + } } [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") @@ -3946,31 +3925,18 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_insn_and_split "*_ucmp3_zero_extend" - [(set (match_operand:SWI248x 0 "register_operand") +(define_insn "*_ucmp3_zero_extend" + [(set (match_operand:SWI248x 0 "register_operand" "=k") (zero_extend:SWI248x (unspec: - [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand") - (match_operand:VI12_AVX512VL 2 "nonimmediate_operand") - (match_operand:SI 3 "const_0_to_7_operand")] + [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v") + (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_7_operand" "n")] UNSPEC_UNSIGNED_PCMP)))] "TARGET_AVX512BW - && ix86_pre_reload_split () && (GET_MODE_NUNITS (mode) < GET_MODE_PRECISION (mode))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_UNSIGNED_PCMP))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, - operands[0], mode); -} + "vpcmpu\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -3998,16 +3964,21 @@ "#" "&& 1" [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_UNSIGNED_PCMP)) - (set (match_dup 4) (match_dup 0))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, + (zero_extend:SWI248x + (unspec: + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_UNSIGNED_PCMP))) + (set (match_dup 4) (match_dup 5))] +{ + operands[5] = lowpart_subreg (mode, operands[0], mode); + if (SUBREG_P (operands[5])) + { + SUBREG_PROMOTED_VAR_P (operands[5]) = 1; + SUBREG_PROMOTED_SET (operands[5], 1); + } } [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") @@ -4044,32 +4015,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_insn_and_split "*_ucmp3_zero_extend" - [(set (match_operand:SWI248x 0 "register_operand") +(define_insn "*_ucmp3_zero_extend" + [(set (match_operand:SWI248x 0 "register_operand" "=k") (zero_extend:SWI248x (unspec: - [(match_operand:VI48_AVX512VL 1 "nonimmediate_operand") - (match_operand:VI48_AVX512VL 2 "nonimmediate_operand") - (match_operand:SI 3 "const_0_to_7_operand")] + [(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "v") + (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_7_operand" "n")] UNSPEC_UNSIGNED_PCMP)))] "TARGET_AVX512F && (!VALID_MASK_AVX512BW_MODE (mode) || TARGET_AVX512BW) - && ix86_pre_reload_split () && (GET_MODE_NUNITS (mode) < GET_MODE_PRECISION (mode))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_UNSIGNED_PCMP))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, - operands[0], mode); -} + "vpcmpu\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -4097,16 +4055,21 @@ "#" "&& 1" [(set (match_dup 0) - (unspec: - [(match_dup 1) - (match_dup 2) - (match_dup 3)] - UNSPEC_UNSIGNED_PCMP)) - (set (match_dup 4) (match_dup 0))] -{ - operands[1] = force_reg (mode, operands[1]); - operands[0] = lowpart_subreg (mode, + (zero_extend:SWI248x + (unspec: + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_UNSIGNED_PCMP))) + (set (match_dup 4) (match_dup 5))] +{ + operands[5] = lowpart_subreg (mode, operands[0], mode); + if (SUBREG_P (operands[5])) + { + SUBREG_PROMOTED_VAR_P (operands[5]) = 1; + SUBREG_PROMOTED_SET (operands[5], 1); + } } [(set_attr "type" "ssecmp") (set_attr "length_immediate" "1") @@ -4849,7 +4812,10 @@ (match_operand:VF1_AVX2 1 "register_operand") 0) (match_dup 2)))] "TARGET_SSE2" - "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1);") +{ + operands[1] = force_reg (mode, operands[1]); + operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1); +}) ;; Also define scalar versions. These are used for abs, neg, and ;; conditional move. Using subregs into vector modes causes register @@ -6319,6 +6285,14 @@ [(UNSPEC_COMPLEX_FMA_PAIR "fmaddc") (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")]) +(define_int_attr int_comm + [(UNSPEC_COMPLEX_FMA "") + (UNSPEC_COMPLEX_FMA_PAIR "") + (UNSPEC_COMPLEX_FCMA "") + (UNSPEC_COMPLEX_FCMA_PAIR "") + (UNSPEC_COMPLEX_FMUL "%") + (UNSPEC_COMPLEX_FCMUL "")]) + (define_int_attr conj_op [(UNSPEC_COMPLEX_FMA "") (UNSPEC_COMPLEX_FCMA "_conj") @@ -6432,7 +6406,7 @@ (define_insn "fma__" [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") (unspec:VF_AVX512FP16VL - [(match_operand:VF_AVX512FP16VL 1 "" "%v") + [(match_operand:VF_AVX512FP16VL 1 "" "v") (match_operand:VF_AVX512FP16VL 2 "" "") (match_operand:VF_AVX512FP16VL 3 "" "0")] UNSPEC_COMPLEX_F_C_MA))] @@ -6496,7 +6470,7 @@ (define_insn "fma___pair" [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v") (unspec:VF1_AVX512VL - [(match_operand:VF1_AVX512VL 1 "vector_operand" "%v") + [(match_operand:VF1_AVX512VL 1 "vector_operand" "v") (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr") (match_operand:VF1_AVX512VL 3 "vector_operand" "0")] UNSPEC_COMPLEX_F_C_MA_PAIR))] @@ -6563,7 +6537,7 @@ [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") (vec_merge:VF_AVX512FP16VL (unspec:VF_AVX512FP16VL - [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v") + [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v") (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "") (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")] UNSPEC_COMPLEX_F_C_MA) @@ -6587,7 +6561,7 @@ (define_insn "__" [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") (unspec:VF_AVX512FP16VL - [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v") + [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v") (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")] UNSPEC_COMPLEX_F_C_MUL))] "TARGET_AVX512FP16 && " @@ -9155,7 +9129,10 @@ (match_dup 2) (parallel [(const_int 0) (const_int 1)]))))] "TARGET_SSE2" - "operands[2] = gen_reg_rtx (V4SFmode);") +{ + operands[2] = gen_reg_rtx (V4SFmode); + emit_move_insn (operands[2], CONST0_RTX (V4SFmode)); +}) (define_expand "vec_unpacks_hi_v8sf" [(set (match_dup 2) @@ -13879,7 +13856,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v2div2qi2_mask_store_1" +(define_insn "avx512vl_v2div2qi2_mask_store_1" [(set (match_operand:V2QI 0 "memory_operand" "=m") (vec_merge:V2QI (any_truncate:V2QI @@ -13893,28 +13870,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v2div2qi2_mask_store_2" - [(set (match_operand:HI 0 "memory_operand") - (subreg:HI - (vec_merge:V2QI - (any_truncate:V2QI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2QI - (subreg:V4QI - (vec_concat:V2HI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2QI - (any_truncate:V2QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2QImode, 0);") +(define_expand "avx512vl_v2div2qi2_mask_store_2" + [(match_operand:HI 0 "memory_operand") + (any_truncate:V2QI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2QImode, 0); + emit_insn (gen_avx512vl_v2div2qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_insn "*avx512vl_v4qi2_store_1" [(set (match_operand:V4QI 0 "memory_operand" "=m") @@ -13983,7 +13951,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v4qi2_mask_store_1" +(define_insn "avx512vl_v4qi2_mask_store_1" [(set (match_operand:V4QI 0 "memory_operand" "=m") (vec_merge:V4QI (any_truncate:V4QI @@ -13997,29 +13965,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v4qi2_mask_store_2" - [(set (match_operand:SI 0 "memory_operand") - (subreg:SI - (vec_merge:V4QI - (any_truncate:V4QI - (match_operand:VI4_128_8_256 1 "register_operand")) - (vec_select:V4QI - (subreg:V8QI - (vec_concat:V2SI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V4QI - (any_truncate:V4QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V4QImode, 0);") +(define_expand "avx512vl_v4qi2_mask_store_2" + [(match_operand:SI 0 "memory_operand") + (any_truncate:V4QI + (match_operand:VI4_128_8_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V4QImode, 0); + emit_insn (gen_avx512vl_v4qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_mode_iterator VI2_128_BW_4_256 [(V8HI "TARGET_AVX512BW") V8SI]) @@ -14091,7 +14049,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v8qi2_mask_store_1" +(define_insn "avx512vl_v8qi2_mask_store_1" [(set (match_operand:V8QI 0 "memory_operand" "=m") (vec_merge:V8QI (any_truncate:V8QI @@ -14105,31 +14063,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v8qi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V8QI - (any_truncate:V8QI - (match_operand:VI2_128_BW_4_256 1 "register_operand")) - (vec_select:V8QI - (subreg:V16QI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3) - (const_int 4) (const_int 5) - (const_int 6) (const_int 7)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V8QI - (any_truncate:V8QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);") +(define_expand "avx512vl_v8qi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V8QI + (match_operand:VI2_128_BW_4_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V8QImode, 0); + emit_insn (gen_avx512vl_v8qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_mode_iterator PMOV_SRC_MODE_4 [V4DI V2DI V4SI]) (define_mode_attr pmov_dst_4 @@ -14251,7 +14197,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v4hi2_mask_store_1" +(define_insn "avx512vl_v4hi2_mask_store_1" [(set (match_operand:V4HI 0 "memory_operand" "=m") (vec_merge:V4HI (any_truncate:V4HI @@ -14269,30 +14215,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v4hi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V4HI - (any_truncate:V4HI - (match_operand:VI4_128_8_256 1 "register_operand")) - (vec_select:V4HI - (subreg:V8HI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V4HI - (any_truncate:V4HI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V4HImode, 0);") - +(define_expand "avx512vl_v4hi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V4HI + (match_operand:VI4_128_8_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V4HImode, 0); + emit_insn (gen_avx512vl_v4hi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_insn "*avx512vl_v2div2hi2_store_1" [(set (match_operand:V2HI 0 "memory_operand" "=m") @@ -14353,7 +14288,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v2div2hi2_mask_store_1" +(define_insn "avx512vl_v2div2hi2_mask_store_1" [(set (match_operand:V2HI 0 "memory_operand" "=m") (vec_merge:V2HI (any_truncate:V2HI @@ -14367,28 +14302,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v2div2hi2_mask_store_2" - [(set (match_operand:SI 0 "memory_operand") - (subreg:SI - (vec_merge:V2HI - (any_truncate:V2HI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2HI - (subreg:V4HI - (vec_concat:V2SI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2HI - (any_truncate:V2HI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2HImode, 0);") +(define_expand "avx512vl_v2div2hi2_mask_store_2" + [(match_operand:SI 0 "memory_operand") + (any_truncate:V2HI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2HImode, 0); + emit_insn (gen_avx512vl_v2div2hi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_expand "truncv2div2si2" [(set (match_operand:V2SI 0 "register_operand") @@ -14496,7 +14422,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_v2div2si2_mask_store_1" +(define_insn "avx512vl_v2div2si2_mask_store_1" [(set (match_operand:V2SI 0 "memory_operand" "=m") (vec_merge:V2SI (any_truncate:V2SI @@ -14510,28 +14436,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_v2div2si2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V2SI - (any_truncate:V2SI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2SI - (subreg:V4SI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2SI - (any_truncate:V2SI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2SImode, 0);") +(define_expand "avx512vl_v2div2si2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V2SI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2SImode, 0); + emit_insn (gen_avx512vl_v2div2si2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_expand "truncv8div8qi2" [(set (match_operand:V8QI 0 "register_operand") @@ -14630,7 +14547,7 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512f_v8div16qi2_mask_store_1" +(define_insn "avx512f_v8div16qi2_mask_store_1" [(set (match_operand:V8QI 0 "memory_operand" "=m") (vec_merge:V8QI (any_truncate:V8QI @@ -14644,31 +14561,19 @@ (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512f_v8div16qi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V8QI - (any_truncate:V8QI - (match_operand:V8DI 1 "register_operand")) - (vec_select:V8QI - (subreg:V16QI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3) - (const_int 4) (const_int 5) - (const_int 6) (const_int 7)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512F && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V8QI - (any_truncate:V8QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);") +(define_expand "avx512f_v8div16qi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V8QI + (match_operand:V8DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512F" +{ + operands[0] = adjust_address_nv (operands[0], V8QImode, 0); + emit_insn (gen_avx512f_v8div16qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; @@ -16351,7 +16256,7 @@ (match_dup 4))] UNSPEC_BLENDV))] { - if (INTVAL (operands[5]) == 1) + if (INTVAL (operands[5]) == 5) std::swap (operands[1], operands[2]); operands[3] = gen_lowpart (mode, operands[3]); }) @@ -16381,7 +16286,7 @@ (match_dup 4))] UNSPEC_BLENDV))] { - if (INTVAL (operands[5]) == 1) + if (INTVAL (operands[5]) == 5) std::swap (operands[1], operands[2]); }) @@ -20874,9 +20779,9 @@ (set_attr "mode" "")]) (define_insn_and_split "ssse3_palignrdi" - [(set (match_operand:DI 0 "register_operand" "=y,x,Yv") - (unspec:DI [(match_operand:DI 1 "register_operand" "0,0,Yv") - (match_operand:DI 2 "register_mmxmem_operand" "ym,x,Yv") + [(set (match_operand:DI 0 "register_operand" "=y,x,Yw") + (unspec:DI [(match_operand:DI 1 "register_operand" "0,0,Yw") + (match_operand:DI 2 "register_mmxmem_operand" "ym,x,Yw") (match_operand:SI 3 "const_0_to_255_mul_8_operand" "n,n,n")] UNSPEC_PALIGNR))] "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3" @@ -23425,7 +23330,7 @@ (match_operand:VF_128 2 "register_operand" "v") (const_int 1)))] "TARGET_AVX512ER" - "vrcp28\t{%1, %2, %0|%0, %2, %1}" + "vrcp28\t{%1, %2, %0|%0, %2, %1}" [(set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "type" "sse") @@ -25974,17 +25879,21 @@ "TARGET_AVX") (define_expand "maskload" - [(set (match_operand:V48H_AVX512VL 0 "register_operand") - (vec_merge:V48H_AVX512VL - (match_operand:V48H_AVX512VL 1 "memory_operand") + [(set (match_operand:V48_AVX512VL 0 "register_operand") + (vec_merge:V48_AVX512VL + (unspec:V48_AVX512VL + [(match_operand:V48_AVX512VL 1 "memory_operand")] + UNSPEC_MASKLOAD) (match_dup 0) (match_operand: 2 "register_operand")))] "TARGET_AVX512F") (define_expand "maskload" - [(set (match_operand:VI12_AVX512VL 0 "register_operand") - (vec_merge:VI12_AVX512VL - (match_operand:VI12_AVX512VL 1 "memory_operand") + [(set (match_operand:VI12HF_AVX512VL 0 "register_operand") + (vec_merge:VI12HF_AVX512VL + (unspec:VI12HF_AVX512VL + [(match_operand:VI12HF_AVX512VL 1 "memory_operand")] + UNSPEC_MASKLOAD) (match_dup 0) (match_operand: 2 "register_operand")))] "TARGET_AVX512BW") @@ -25999,21 +25908,66 @@ "TARGET_AVX") (define_expand "maskstore" - [(set (match_operand:V48H_AVX512VL 0 "memory_operand") - (vec_merge:V48H_AVX512VL - (match_operand:V48H_AVX512VL 1 "register_operand") - (match_dup 0) - (match_operand: 2 "register_operand")))] + [(set (match_operand:V48_AVX512VL 0 "memory_operand") + (unspec:V48_AVX512VL + [(match_operand:V48_AVX512VL 1 "register_operand") + (match_dup 0) + (match_operand: 2 "register_operand")] + UNSPEC_MASKMOV))] "TARGET_AVX512F") (define_expand "maskstore" - [(set (match_operand:VI12_AVX512VL 0 "memory_operand") - (vec_merge:VI12_AVX512VL - (match_operand:VI12_AVX512VL 1 "register_operand") - (match_dup 0) - (match_operand: 2 "register_operand")))] + [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand") + (unspec:VI12HF_AVX512VL + [(match_operand:VI12HF_AVX512VL 1 "register_operand") + (match_dup 0) + (match_operand: 2 "register_operand")] + UNSPEC_MASKMOV))] "TARGET_AVX512BW") +(define_insn "_store_mask" + [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m") + (unspec:V48_AVX512VL + [(match_operand:V48_AVX512VL 1 "register_operand" "v") + (match_dup 0) + (match_operand: 2 "register_operand" "Yk")] + UNSPEC_MASKMOV))] + "TARGET_AVX512F" +{ + if (FLOAT_MODE_P (GET_MODE_INNER (mode))) + { + if (misaligned_operand (operands[0], mode)) + return "vmovu\t{%1, %0%{%2%}|%0%{%2%}, %1}"; + else + return "vmova\t{%1, %0%{%2%}|%0%{%2%}, %1}"; + } + else + { + if (misaligned_operand (operands[0], mode)) + return "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}"; + else + return "vmovdqa\t{%1, %0%{%2%}|%0%{%2%}, %1}"; + } +} + [(set_attr "type" "ssemov") + (set_attr "prefix" "evex") + (set_attr "memory" "store") + (set_attr "mode" "")]) + +(define_insn "_store_mask" + [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m") + (unspec:VI12HF_AVX512VL + [(match_operand:VI12HF_AVX512VL 1 "register_operand" "v") + (match_dup 0) + (match_operand: 2 "register_operand" "Yk")] + UNSPEC_MASKMOV))] + "TARGET_AVX512BW" + "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}" + [(set_attr "type" "ssemov") + (set_attr "prefix" "evex") + (set_attr "memory" "store") + (set_attr "mode" "")]) + (define_expand "cbranch4" [(set (reg:CC FLAGS_REG) (compare:CC (match_operand:VI48_AVX 1 "register_operand") @@ -28405,7 +28359,7 @@ for (i = 4; i < 7; i++) XVECEXP (operands[2], 0, i) - = gen_rtx_SET (xmm_regs[i], CONST0_RTX (V2DImode)); + = gen_rtx_CLOBBER (VOIDmode, xmm_regs[i]); XVECEXP (operands[2], 0, 7) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG)); @@ -28462,7 +28416,7 @@ for (i = 4; i < 7; i++) XVECEXP (operands[2], 0, i + 1) - = gen_rtx_SET (xmm_regs[i], CONST0_RTX (V2DImode)); + = gen_rtx_CLOBBER (VOIDmode, xmm_regs[i]); XVECEXP (operands[2], 0, 8) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG)); diff --git a/gcc/config/i386/t-i386 b/gcc/config/i386/t-i386 index 4e2a0efc61515..ffdbbdfe8cefb 100644 --- a/gcc/config/i386/t-i386 +++ b/gcc/config/i386/t-i386 @@ -62,7 +62,12 @@ i386-features.o: $(srcdir)/config/i386/i386-features.cc $(COMPILE) $< $(POSTCOMPILE) +# i386-builtin-types.inc is included into i386-builtins.h. +# Below are direct users of i386-builtins.h: i386.o: i386-builtin-types.inc +i386-builtins.o: i386-builtin-types.inc +i386-expand.o: i386-builtin-types.inc +i386-features.o: i386-builtin-types.inc i386-builtin-types.inc: s-i386-bt ; @true s-i386-bt: $(srcdir)/config/i386/i386-builtin-types.awk \ diff --git a/gcc/config/i386/winnt-d.cc b/gcc/config/i386/winnt-d.cc index 3d990a12331a6..00c28c3964a41 100644 --- a/gcc/config/i386/winnt-d.cc +++ b/gcc/config/i386/winnt-d.cc @@ -21,9 +21,9 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "target.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" -#include "tm_p.h" /* Implement TARGET_D_OS_VERSIONS for Windows targets. */ diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h index 017ffa699585b..6bf09342feb03 100644 --- a/gcc/config/i386/x86-tune-costs.h +++ b/gcc/config/i386/x86-tune-costs.h @@ -1820,6 +1820,291 @@ struct processor_costs znver3_cost = { "16", /* Func alignment. */ }; +/* This table currently replicates znver3_cost table. */ +struct processor_costs znver4_cost = { + { + /* Start of register allocator costs. integer->integer move cost is 2. */ + + /* reg-reg moves are done by renaming and thus they are even cheaper than + 1 cycle. Because reg-reg move cost is 2 and following tables correspond + to doubles of latencies, we do not model this correctly. It does not + seem to make practical difference to bump prices up even more. */ + 6, /* cost for loading QImode using + movzbl. */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + 2, /* cost of reg,reg fld/fst. */ + {14, 14, 17}, /* cost of loading fp registers + in SFmode, DFmode and XFmode. */ + {12, 12, 16}, /* cost of storing fp registers + in SFmode, DFmode and XFmode. */ + 2, /* cost of moving MMX register. */ + {6, 6}, /* cost of loading MMX registers + in SImode and DImode. */ + {8, 8}, /* cost of storing MMX registers + in SImode and DImode. */ + 2, 2, 3, /* cost of moving XMM,YMM,ZMM + register. */ + {6, 6, 10, 10, 12}, /* cost of loading SSE registers + in 32,64,128,256 and 512-bit. */ + {8, 8, 8, 12, 12}, /* cost of storing SSE registers + in 32,64,128,256 and 512-bit. */ + 6, 8, /* SSE->integer and integer->SSE + moves. */ + 8, 8, /* mask->integer and integer->mask moves */ + {6, 6, 6}, /* cost of loading mask register + in QImode, HImode, SImode. */ + {8, 8, 8}, /* cost if storing mask register + in QImode, HImode, SImode. */ + 2, /* cost of moving mask register. */ + /* End of register allocator costs. */ + }, + + COSTS_N_INSNS (1), /* cost of an add instruction. */ + /* TODO: Lea with 3 components has cost 2. */ + COSTS_N_INSNS (1), /* cost of a lea instruction. */ + COSTS_N_INSNS (1), /* variable shift costs. */ + COSTS_N_INSNS (1), /* constant shift costs. */ + {COSTS_N_INSNS (3), /* cost of starting multiply for QI. */ + COSTS_N_INSNS (3), /* HI. */ + COSTS_N_INSNS (3), /* SI. */ + COSTS_N_INSNS (3), /* DI. */ + COSTS_N_INSNS (3)}, /* other. */ + 0, /* cost of multiply per each bit + set. */ + {COSTS_N_INSNS (12), /* cost of a divide/mod for QI. */ + COSTS_N_INSNS (13), /* HI. */ + COSTS_N_INSNS (13), /* SI. */ + COSTS_N_INSNS (18), /* DI. */ + COSTS_N_INSNS (18)}, /* other. */ + COSTS_N_INSNS (1), /* cost of movsx. */ + COSTS_N_INSNS (1), /* cost of movzx. */ + 8, /* "large" insn. */ + 9, /* MOVE_RATIO. */ + 6, /* CLEAR_RATIO */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + {6, 6, 10, 10, 12}, /* cost of loading SSE registers + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {8, 8, 8, 12, 12}, /* cost of storing SSE register + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {6, 6, 10, 10, 12}, /* cost of unaligned loads. */ + {8, 8, 8, 12, 12}, /* cost of unaligned stores. */ + 2, 2, 2, /* cost of moving XMM,YMM,ZMM + register. */ + 6, /* cost of moving SSE register to integer. */ + /* VGATHERDPD is 17 uops and throughput is 4, VGATHERDPS is 24 uops, + throughput 5. Approx 7 uops do not depend on vector size and every load + is 5 uops. */ + 14, 10, /* Gather load static, per_elt. */ + 14, 20, /* Gather store static, per_elt. */ + 32, /* size of l1 cache. */ + 1024, /* size of l2 cache. */ + 64, /* size of prefetch block. */ + /* New AMD processors never drop prefetches; if they cannot be performed + immediately, they are queued. We set number of simultaneous prefetches + to a large constant to reflect this (it probably is not a good idea not + to limit number of prefetches at all, as their execution also takes some + time). */ + 100, /* number of parallel prefetches. */ + 3, /* Branch cost. */ + COSTS_N_INSNS (7), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (7), /* cost of FMUL instruction. */ + /* Latency of fdiv is 8-15. */ + COSTS_N_INSNS (15), /* cost of FDIV instruction. */ + COSTS_N_INSNS (1), /* cost of FABS instruction. */ + COSTS_N_INSNS (1), /* cost of FCHS instruction. */ + /* Latency of fsqrt is 4-10. */ + COSTS_N_INSNS (25), /* cost of FSQRT instruction. */ + + COSTS_N_INSNS (1), /* cost of cheap SSE instruction. */ + COSTS_N_INSNS (3), /* cost of ADDSS/SD SUBSS/SD insns. */ + COSTS_N_INSNS (3), /* cost of MULSS instruction. */ + COSTS_N_INSNS (3), /* cost of MULSD instruction. */ + COSTS_N_INSNS (4), /* cost of FMA SS instruction. */ + COSTS_N_INSNS (4), /* cost of FMA SD instruction. */ + COSTS_N_INSNS (13), /* cost of DIVSS instruction. */ + /* 9-13. */ + COSTS_N_INSNS (13), /* cost of DIVSD instruction. */ + COSTS_N_INSNS (15), /* cost of SQRTSS instruction. */ + COSTS_N_INSNS (21), /* cost of SQRTSD instruction. */ + /* Zen can execute 4 integer operations per cycle. FP operations + take 3 cycles and it can execute 2 integer additions and 2 + multiplications thus reassociation may make sense up to with of 6. + SPEC2k6 bencharks suggests + that 4 works better than 6 probably due to register pressure. + + Integer vector operations are taken by FP unit and execute 3 vector + plus/minus operations per cycle but only one multiply. This is adjusted + in ix86_reassociation_width. */ + 4, 4, 3, 6, /* reassoc int, fp, vec_int, vec_fp. */ + znver2_memcpy, + znver2_memset, + COSTS_N_INSNS (4), /* cond_taken_branch_cost. */ + COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */ + "16", /* Loop alignment. */ + "16", /* Jump alignment. */ + "0:0:8", /* Label alignment. */ + "16", /* Func alignment. */ +}; + +/* This table currently replicates znver4_cost table. */ +struct processor_costs znver5_cost = { + { + /* Start of register allocator costs. integer->integer move cost is 2. */ + + /* reg-reg moves are done by renaming and thus they are even cheaper than + 1 cycle. Because reg-reg move cost is 2 and following tables correspond + to doubles of latencies, we do not model this correctly. It does not + seem to make practical difference to bump prices up even more. */ + 6, /* cost for loading QImode using + movzbl. */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + 2, /* cost of reg,reg fld/fst. */ + {14, 14, 17}, /* cost of loading fp registers + in SFmode, DFmode and XFmode. */ + {12, 12, 16}, /* cost of storing fp registers + in SFmode, DFmode and XFmode. */ + 2, /* cost of moving MMX register. */ + {6, 6}, /* cost of loading MMX registers + in SImode and DImode. */ + {8, 8}, /* cost of storing MMX registers + in SImode and DImode. */ + 2, 2, 3, /* cost of moving XMM,YMM,ZMM + register. */ + {6, 6, 10, 10, 12}, /* cost of loading SSE registers + in 32,64,128,256 and 512-bit. */ + {8, 8, 8, 12, 12}, /* cost of storing SSE registers + in 32,64,128,256 and 512-bit. */ + 6, 8, /* SSE->integer and integer->SSE + moves. */ + 8, 8, /* mask->integer and integer->mask moves */ + {6, 6, 6}, /* cost of loading mask register + in QImode, HImode, SImode. */ + {8, 8, 8}, /* cost if storing mask register + in QImode, HImode, SImode. */ + 2, /* cost of moving mask register. */ + /* End of register allocator costs. */ + }, + + COSTS_N_INSNS (1), /* cost of an add instruction. */ + /* TODO: Lea with 3 components has cost 2. */ + COSTS_N_INSNS (1), /* cost of a lea instruction. */ + COSTS_N_INSNS (1), /* variable shift costs. */ + COSTS_N_INSNS (1), /* constant shift costs. */ + /* mul has latency 3, executes in 3 integer units. */ + {COSTS_N_INSNS (3), /* cost of starting multiply for QI. */ + COSTS_N_INSNS (3), /* HI. */ + COSTS_N_INSNS (3), /* SI. */ + COSTS_N_INSNS (3), /* DI. */ + COSTS_N_INSNS (3)}, /* other. */ + 0, /* cost of multiply per each bit + set. */ + /* integer divide has latency of 8 cycles + plus 1 for every 9 bits of quotient. */ + {COSTS_N_INSNS (10), /* cost of a divide/mod for QI. */ + COSTS_N_INSNS (11), /* HI. */ + COSTS_N_INSNS (13), /* SI. */ + COSTS_N_INSNS (16), /* DI. */ + COSTS_N_INSNS (16)}, /* other. */ + COSTS_N_INSNS (1), /* cost of movsx. */ + COSTS_N_INSNS (1), /* cost of movzx. */ + 15, /* "large" insn. */ + 9, /* MOVE_RATIO. */ + 6, /* CLEAR_RATIO */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + {6, 6, 10, 10, 12}, /* cost of loading SSE registers + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {8, 8, 8, 12, 12}, /* cost of storing SSE register + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {6, 6, 10, 10, 12}, /* cost of unaligned loads. */ + {8, 8, 8, 12, 12}, /* cost of unaligned stores. */ + 2, 2, 2, /* cost of moving XMM,YMM,ZMM + register. */ + 6, /* cost of moving SSE register to integer. */ + + /* TODO: gather and scatter instructions are currently disabled in + x86-tune.def. In some cases they are however a win, see PR116582 + We however need good cost model for them. */ + 14, 10, /* Gather load static, per_elt. */ + 14, 20, /* Gather store static, per_elt. */ + 48, /* size of l1 cache. */ + 1024, /* size of l2 cache. */ + 64, /* size of prefetch block. */ + /* New AMD processors never drop prefetches; if they cannot be performed + immediately, they are queued. We set number of simultaneous prefetches + to a large constant to reflect this (it probably is not a good idea not + to limit number of prefetches at all, as their execution also takes some + time). */ + 100, /* number of parallel prefetches. */ + 3, /* Branch cost. */ + /* TODO x87 latencies are still based on znver4. + Probably not very important these days. */ + COSTS_N_INSNS (7), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (7), /* cost of FMUL instruction. */ + /* Latency of fdiv is 8-15. */ + COSTS_N_INSNS (15), /* cost of FDIV instruction. */ + COSTS_N_INSNS (1), /* cost of FABS instruction. */ + COSTS_N_INSNS (1), /* cost of FCHS instruction. */ + /* Latency of fsqrt is 4-10. */ + COSTS_N_INSNS (25), /* cost of FSQRT instruction. */ + + /* SSE instructions have typical throughput 4 and latency 1. */ + COSTS_N_INSNS (1), /* cost of cheap SSE instruction. */ + /* ADDSS has throughput 2 and latency 2 + (in some cases when source is another addition). */ + COSTS_N_INSNS (2), /* cost of ADDSS/SD SUBSS/SD insns. */ + /* MULSS has throughput 2 and latency 3. */ + COSTS_N_INSNS (3), /* cost of MULSS instruction. */ + COSTS_N_INSNS (3), /* cost of MULSD instruction. */ + /* FMA had throughput 2 and latency 4. */ + COSTS_N_INSNS (4), /* cost of FMA SS instruction. */ + COSTS_N_INSNS (4), /* cost of FMA SD instruction. */ + /* DIVSS has throughtput 0.4 and latency 10. */ + COSTS_N_INSNS (10), /* cost of DIVSS instruction. */ + /* DIVSD has throughtput 0.25 and latency 13. */ + COSTS_N_INSNS (13), /* cost of DIVSD instruction. */ + /* DIVSD has throughtput 0.22 and latency 14. */ + COSTS_N_INSNS (14), /* cost of SQRTSS instruction. */ + /* DIVSD has throughtput 0.13 and latency 20. */ + COSTS_N_INSNS (20), /* cost of SQRTSD instruction. */ + /* Zen5 can execute: + - integer ops: 6 per cycle, at most 3 multiplications. + latency 1 for additions, 3 for multiplications (pipelined) + + Setting width of 9 for multiplication is probably excessive + for register pressure. + - fp ops: 2 additions per cycle, latency 2-3 + 2 multiplicaitons per cycle, latency 3 + - vector intger ops: 4 additions, latency 1 + 2 multiplications, latency 4 + We increase width to 6 for multiplications + in ix86_reassociation_width. */ + 6, 6, 4, 6, /* reassoc int, fp, vec_int, vec_fp. */ + znver2_memcpy, + znver2_memset, + COSTS_N_INSNS (4), /* cond_taken_branch_cost. */ + COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */ + "16", /* Loop alignment. */ + "16", /* Jump alignment. */ + "0:0:8", /* Label alignment. */ + "16", /* Func alignment. */ +}; + /* skylake_cost should produce code tuned for Skylake familly of CPUs. */ static stringop_algs skylake_memcpy[2] = { {libcall, diff --git a/gcc/config/i386/x86-tune-sched.cc b/gcc/config/i386/x86-tune-sched.cc index e413d0467836a..f170f6476ce42 100644 --- a/gcc/config/i386/x86-tune-sched.cc +++ b/gcc/config/i386/x86-tune-sched.cc @@ -67,6 +67,8 @@ ix86_issue_rate (void) case PROCESSOR_ZNVER1: case PROCESSOR_ZNVER2: case PROCESSOR_ZNVER3: + case PROCESSOR_ZNVER4: + case PROCESSOR_ZNVER5: case PROCESSOR_CORE2: case PROCESSOR_NEHALEM: case PROCESSOR_SANDYBRIDGE: @@ -399,6 +401,8 @@ ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost, case PROCESSOR_ZNVER1: case PROCESSOR_ZNVER2: case PROCESSOR_ZNVER3: + case PROCESSOR_ZNVER4: + case PROCESSOR_ZNVER5: /* Stack engine allows to execute push&pop instructions in parall. */ if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) @@ -415,6 +419,8 @@ ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost, enum attr_unit unit = get_attr_unit (insn); int loadcost; + /* TODO: On znver5 complex addressing modes have + greater latency. */ if (unit == UNIT_INTEGER || unit == UNIT_UNKNOWN) loadcost = 4; else @@ -520,6 +526,60 @@ ix86_macro_fusion_p () return TARGET_FUSE_CMP_AND_BRANCH; } +static bool +ix86_fuse_mov_alu_p (rtx_insn *mov, rtx_insn *alu) +{ + /* Validate mov: + - It should be reg-reg move with opcode 0x89 or 0x8B. */ + rtx set1 = PATTERN (mov); + if (GET_CODE (set1) != SET + || !GENERAL_REG_P (SET_SRC (set1)) + || !GENERAL_REG_P (SET_DEST (set1))) + return false; + rtx reg = SET_DEST (set1); + /* - it should have 0x89 or 0x8B opcode. */ + if (!INTEGRAL_MODE_P (GET_MODE (reg)) + || GET_MODE_SIZE (GET_MODE (reg)) < 2 + || GET_MODE_SIZE (GET_MODE (reg)) > 8) + return false; + /* Validate ALU. */ + if (GET_CODE (PATTERN (alu)) != PARALLEL) + return false; + rtx set2 = XVECEXP (PATTERN (alu), 0, 0); + if (GET_CODE (set2) != SET) + return false; + /* Match one of: + ADD ADC AND XOR OR SUB SBB INC DEC NOT SAL SHL SHR SAR + We also may add insn attribute to handle some of sporadic + case we output those with different RTX expressions. */ + + if (GET_CODE (SET_SRC (set2)) != PLUS + && GET_CODE (SET_SRC (set2)) != MINUS + && GET_CODE (SET_SRC (set2)) != XOR + && GET_CODE (SET_SRC (set2)) != AND + && GET_CODE (SET_SRC (set2)) != IOR + && GET_CODE (SET_SRC (set2)) != NOT + && GET_CODE (SET_SRC (set2)) != ASHIFT + && GET_CODE (SET_SRC (set2)) != ASHIFTRT + && GET_CODE (SET_SRC (set2)) != LSHIFTRT) + return false; + rtx op0 = XEXP (SET_SRC (set2), 0); + rtx op1 = GET_CODE (SET_SRC (set2)) != NOT ? XEXP (SET_SRC (set2), 1) : NULL; + /* One of operands should be register. */ + if (op1 && (!REG_P (op0) || REGNO (op0) != REGNO (reg))) + std::swap (op0, op1); + if (!REG_P (op0) || REGNO (op1) != REGNO (reg)) + return false; + if (op1 + && !REG_P (op1) + && !x86_64_immediate_operand (op1, VOIDmode)) + return false; + /* Only one of two paramters must be move destination. */ + if (op1 && REG_P (op1) && REGNO (op1) == REGNO (reg)) + return false; + return true; +} + /* Check whether current microarchitecture support macro fusion for insn pair "CONDGEN + CONDJMP". Refer to "Intel Architectures Optimization Reference Manual". */ @@ -527,6 +587,9 @@ ix86_macro_fusion_p () bool ix86_macro_fusion_pair_p (rtx_insn *condgen, rtx_insn *condjmp) { + if (TARGET_FUSE_MOV_AND_ALU + && ix86_fuse_mov_alu_p (condgen, condjmp)) + return true; rtx src, dest; enum rtx_code ccode; rtx compare_set = NULL_RTX, test_if, cond; diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index d983e2f6213f8..561bd17b6e54b 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -140,8 +140,12 @@ DEF_TUNE (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS, "fuse_cmp_and_branch_soflags", jump instruction when the alu instruction produces the CCFLAG consumed by the conditional jump instruction. */ DEF_TUNE (X86_TUNE_FUSE_ALU_AND_BRANCH, "fuse_alu_and_branch", - m_SANDYBRIDGE | m_CORE_AVX2 | m_GENERIC) + m_SANDYBRIDGE | m_CORE_AVX2 | m_GENERIC | m_ZNVER5) +/* X86_TUNE_FUSE_MOV_AND_ALU: mov and alu in case mov is reg-reg mov + and the destination is used by alu. alu must be one of + ADD, ADC, AND, XOR, OR, SUB, SBB, INC, DEC, NOT, SAL, SHL, SHR, SAR. */ +DEF_TUNE (X86_TUNE_FUSE_MOV_AND_ALU, "fuse_mov_and_alu", m_ZNVER5) /*****************************************************************************/ /* Function prologue, epilogue and function calling sequences. */ @@ -467,17 +471,35 @@ DEF_TUNE (X86_TUNE_AVOID_4BYTE_PREFIXES, "avoid_4byte_prefixes", /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2 elements. */ DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts", - ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ALDERLAKE | m_GENERIC)) + ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE + | m_GENERIC | m_GDS)) + +/* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2 + elements. */ +DEF_TUNE (X86_TUNE_USE_SCATTER_2PARTS, "use_scatter_2parts", + ~(m_ZNVER4)) /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4 elements. */ DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts", - ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ALDERLAKE | m_GENERIC)) + ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE + | m_GENERIC | m_GDS)) + +/* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4 + elements. */ +DEF_TUNE (X86_TUNE_USE_SCATTER_4PARTS, "use_scatter_4parts", + ~(m_ZNVER4)) /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more elements. */ -DEF_TUNE (X86_TUNE_USE_GATHER, "use_gather", - ~(m_ZNVER1 | m_ZNVER2 | m_ALDERLAKE | m_GENERIC)) +DEF_TUNE (X86_TUNE_USE_GATHER_8PARTS, "use_gather_8parts", + ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE + | m_GENERIC | m_GDS)) + +/* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more + elements. */ +DEF_TUNE (X86_TUNE_USE_SCATTER_8PARTS, "use_scatter_8parts", + ~(m_ZNVER4)) /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or smaller FMA chain. */ @@ -485,7 +507,12 @@ DEF_TUNE (X86_TUNE_AVOID_128FMA_CHAINS, "avoid_fma_chains", m_ZNVER) /* X86_TUNE_AVOID_256FMA_CHAINS: Avoid creating loops with tight 256bit or smaller FMA chain. */ -DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3) +DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3 + | m_ALDERLAKE | m_SAPPHIRERAPIDS | m_GENERIC | m_ZNVER4 | m_ZNVER5) + +/* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or + smaller FMA chain. */ +DEF_TUNE (X86_TUNE_AVOID_512FMA_CHAINS, "avoid_fma512_chains", m_ZNVER5) /* X86_TUNE_V2DF_REDUCTION_PREFER_PHADDPD: Prefer haddpd for v2df vector reduction. */ @@ -519,6 +546,9 @@ DEF_TUNE (X86_TUNE_AVX128_OPTIMAL, "avx128_optimal", m_BDVER | m_BTVER2 instructions in the auto-vectorizer. */ DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512) +/* X86_TUNE_AVX256_SPLIT_REGS: if true, AVX512 ops are split into two AVX256 ops. */ +DEF_TUNE (X86_TUNE_AVX512_SPLIT_REGS, "avx512_split_regs", m_ZNVER4) + /* X86_TUNE_AVX256_MOVE_BY_PIECES: Optimize move_by_pieces with 256-bit AVX instructions. */ DEF_TUNE (X86_TUNE_AVX256_MOVE_BY_PIECES, "avx256_move_by_pieces", @@ -532,12 +562,12 @@ DEF_TUNE (X86_TUNE_AVX256_STORE_BY_PIECES, "avx256_store_by_pieces", /* X86_TUNE_AVX512_MOVE_BY_PIECES: Optimize move_by_pieces with 512-bit AVX instructions. */ DEF_TUNE (X86_TUNE_AVX512_MOVE_BY_PIECES, "avx512_move_by_pieces", - m_SAPPHIRERAPIDS) + m_SAPPHIRERAPIDS | m_ZNVER4 | m_ZNVER5) /* X86_TUNE_AVX512_STORE_BY_PIECES: Optimize store_by_pieces with 512-bit AVX instructions. */ DEF_TUNE (X86_TUNE_AVX512_STORE_BY_PIECES, "avx512_store_by_pieces", - m_SAPPHIRERAPIDS) + m_SAPPHIRERAPIDS | m_ZNVER4 | m_ZNVER5) /*****************************************************************************/ /*****************************************************************************/ diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index 626590806010e..f1c704a2d4325 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -109,7 +109,10 @@ typedef float __v4sf __attribute__ ((__vector_size__ (16))); extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_undefined_ps (void) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Winit-self" __m128 __Y = __Y; +#pragma GCC diagnostic pop return __Y; } diff --git a/gcc/config/i386/zn4zn5.md b/gcc/config/i386/zn4zn5.md new file mode 100644 index 0000000000000..ba9cfbb5dfcf8 --- /dev/null +++ b/gcc/config/i386/zn4zn5.md @@ -0,0 +1,1785 @@ +;; Copyright (C) 2012-2024 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . +;; + + +(define_attr "znver4_decode" "direct,vector,double" + (const_string "direct")) + +;; AMD znver4 and znver5 Scheduling +;; Modeling automatons for zen decoders, integer execution pipes, +;; AGU pipes, branch, floating point execution and fp store units. +(define_automaton "znver4, znver4_ieu, znver4_idiv, znver4_fdiv, znver4_agu, znver4_fpu, znver4_fp_store") + +;; Decoders unit has 4 decoders and all of them can decode fast path +;; and vector type instructions. +(define_cpu_unit "znver4-decode0" "znver4") +(define_cpu_unit "znver4-decode1" "znver4") +(define_cpu_unit "znver4-decode2" "znver4") +(define_cpu_unit "znver4-decode3" "znver4") + +;; Currently blocking all decoders for vector path instructions as +;; they are dispatched separetely as microcode sequence. +(define_reservation "znver4-vector" "znver4-decode0+znver4-decode1+znver4-decode2+znver4-decode3") + +;; Direct instructions can be issued to any of the four decoders. +(define_reservation "znver4-direct" "znver4-decode0|znver4-decode1|znver4-decode2|znver4-decode3") + +;; Fix me: Need to revisit this later to simulate fast path double behavior. +(define_reservation "znver4-double" "znver4-direct") + + +;; Integer unit 4 ALU pipes in znver4 6 ALU pipes in znver5. +(define_cpu_unit "znver4-ieu0" "znver4_ieu") +(define_cpu_unit "znver4-ieu1" "znver4_ieu") +(define_cpu_unit "znver4-ieu2" "znver4_ieu") +(define_cpu_unit "znver4-ieu3" "znver4_ieu") +(define_cpu_unit "znver5-ieu4" "znver4_ieu") +(define_cpu_unit "znver5-ieu5" "znver4_ieu") + +;; Znver4 has an additional branch unit. +(define_cpu_unit "znver4-bru0" "znver4_ieu") + +(define_reservation "znver4-ieu" "znver4-ieu0|znver4-ieu1|znver4-ieu2|znver4-ieu3") +(define_reservation "znver5-ieu" "znver4-ieu0|znver4-ieu1|znver4-ieu2|znver4-ieu3|znver5-ieu4|znver5-ieu5") + +;; 3 AGU pipes in znver4 and 4 AGU pipes in znver5 +(define_cpu_unit "znver4-agu0" "znver4_agu") +(define_cpu_unit "znver4-agu1" "znver4_agu") +(define_cpu_unit "znver4-agu2" "znver4_agu") +(define_cpu_unit "znver5-agu3" "znver4_agu") + +(define_reservation "znver4-agu-reserve" "znver4-agu0|znver4-agu1|znver4-agu2") +(define_reservation "znver5-agu-reserve" "znver4-agu0|znver4-agu1|znver4-agu2|znver5-agu3") + +;; Load is 4 cycles. We do not model reservation of load unit. +(define_reservation "znver4-load" "znver4-agu-reserve") +(define_reservation "znver4-store" "znver4-agu-reserve") +(define_reservation "znver5-load" "znver5-agu-reserve") +(define_reservation "znver5-store" "znver5-agu-reserve") + +;; vectorpath (microcoded) instructions are single issue instructions. +;; So, they occupy all the integer units. +;; This is used for both Znver4 and Znver5, since reserving extra units not used otherwise +;; is harmless. +(define_reservation "znver4-ivector" "znver4-ieu0+znver4-ieu1 + +znver4-ieu2+znver4-ieu3+znver5-ieu4+znver5-ieu5+znver4-bru0 + +znver4-agu0+znver4-agu1+znver4-agu2+znver5-agu3") + +;; Floating point unit 4 FP pipes in znver4 and znver5. +(define_cpu_unit "znver4-fpu0" "znver4_fpu") +(define_cpu_unit "znver4-fpu1" "znver4_fpu") +(define_cpu_unit "znver4-fpu2" "znver4_fpu") +(define_cpu_unit "znver4-fpu3" "znver4_fpu") + +(define_reservation "znver4-fpu" "znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +;; DIV units +(define_cpu_unit "znver4-idiv" "znver4_idiv") +(define_cpu_unit "znver4-fdiv" "znver4_fdiv") + +;; Separate fp store and fp-to-int store. Although there are 2 store pipes, the +;; throughput is limited to only one per cycle. +(define_cpu_unit "znver4-fp-store" "znver4_fp_store") + +;; Floating point store unit 2 FP pipes in znver5. +(define_cpu_unit "znver5-fp-store0" "znver4_fp_store") +(define_cpu_unit "znver5-fp-store1" "znver4_fp_store") + +;; This is used for both Znver4 and Znver5, since reserving extra units not used otherwise +;; is harmless. +(define_reservation "znver4-fvector" "znver4-fpu0+znver4-fpu1 + +znver4-fpu2+znver4-fpu3+znver5-fp-store0+znver5-fp-store1 + +znver4-agu0+znver4-agu1+znver4-agu2+znver5-agu3") + +(define_reservation "znver5-fp-store256" "znver5-fp-store0|znver5-fp-store1") +(define_reservation "znver5-fp-store-512" "znver5-fp-store0+znver5-fp-store1") + + +;; Integer Instructions +;; Move instructions +;; XCHG +(define_insn_reservation "znver4_imov_double" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imov") + (eq_attr "memory" "none")))) + "znver4-double,znver4-ieu") + +(define_insn_reservation "znver5_imov_double" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imov") + (eq_attr "memory" "none")))) + "znver4-double,znver5-ieu") + +(define_insn_reservation "znver4_imov_double_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imov") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-ieu") + +(define_insn_reservation "znver5_imov_double_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imov") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver5-ieu") + +;; imov, imovx +(define_insn_reservation "znver4_imov" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imov,imovx") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-ieu") + +(define_insn_reservation "znver5_imov" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "imov,imovx") + (eq_attr "memory" "none"))) + "znver4-direct,znver5-ieu") + +(define_insn_reservation "znver4_imov_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imov,imovx") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu") + +(define_insn_reservation "znver5_imov_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "imov,imovx") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver5-ieu") + +;; Push Instruction +(define_insn_reservation "znver4_push" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "push") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-store") + +(define_insn_reservation "znver5_push" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "push") + (eq_attr "memory" "store"))) + "znver4-direct,znver5-store") + +(define_insn_reservation "znver4_push_mem" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "push") + (eq_attr "memory" "both"))) + "znver4-direct,znver4-load,znver4-store") + +(define_insn_reservation "znver5_push_mem" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "push") + (eq_attr "memory" "both"))) + "znver4-direct,znver5-load,znver5-store") + +;; Pop instruction +(define_insn_reservation "znver4_pop" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "pop") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load") + +(define_insn_reservation "znver5_pop" 4 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "pop") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load") + +(define_insn_reservation "znver4_pop_mem" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "pop") + (eq_attr "memory" "both"))) + "znver4-direct,znver4-load,znver4-store") + +(define_insn_reservation "znver5_pop_mem" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "pop") + (eq_attr "memory" "both"))) + "znver4-direct,znver5-load,znver5-store") + +;; Integer Instructions or General instructions +;; Multiplications +(define_insn_reservation "znver4_imul" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "imul") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-ieu1") + +(define_insn_reservation "znver4_imul_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imul") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu1") + +(define_insn_reservation "znver5_imul_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "imul") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-ieu1") + +;; Divisions +(define_insn_reservation "znver4_idiv_DI" 18 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "none")))) + "znver4-double,znver4-idiv*10") + +(define_insn_reservation "znver4_idiv_SI" 12 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "none")))) + "znver4-double,znver4-idiv*6") + +(define_insn_reservation "znver4_idiv_HI" 10 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "HI") + (eq_attr "memory" "none")))) + "znver4-double,znver4-idiv*4") + +(define_insn_reservation "znver4_idiv_QI" 9 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "QI") + (eq_attr "memory" "none")))) + "znver4-double,znver4-idiv*4") + +(define_insn_reservation "znver4_idiv_DI_load" 22 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-idiv*10") + +(define_insn_reservation "znver5_idiv_DI_load" 22 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver4-idiv*10") + +(define_insn_reservation "znver4_idiv_SI_load" 16 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-idiv*6") + +(define_insn_reservation "znver5_idiv_SI_load" 16 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver4-idiv*6") + +(define_insn_reservation "znver4_idiv_HI_load" 14 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "HI") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-idiv*4") + +(define_insn_reservation "znver5_idiv_HI_load" 14 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "HI") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver4-idiv*4") + +(define_insn_reservation "znver4_idiv_QI_load" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "QI") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-idiv*4") + +(define_insn_reservation "znver5_idiv_QI_load" 13 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "QI") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver4-idiv*4") + +;; INTEGER/GENERAL Instructions +(define_insn_reservation "znver4_insn" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "none,unknown"))) + "znver4-direct,znver4-ieu") + +(define_insn_reservation "znver5_insn" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "none,unknown"))) + "znver4-direct,znver5-ieu") + +(define_insn_reservation "znver4_insn_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu") + +(define_insn_reservation "znver5_insn_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver5-ieu") + +(define_insn_reservation "znver4_insn2" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "icmov,setcc") + (eq_attr "memory" "none,unknown"))) + "znver4-direct,znver4-ieu0|znver4-ieu3") + +(define_insn_reservation "znver4_insn2_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "icmov,setcc") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu0|znver4-ieu3") + +(define_insn_reservation "znver5_insn2_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "icmov,setcc") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-ieu0|znver4-ieu3") + +(define_insn_reservation "znver4_rotate" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "rotate") + (eq_attr "memory" "none,unknown"))) + "znver4-direct,znver4-ieu1|znver4-ieu2") + +(define_insn_reservation "znver4_rotate_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu1|znver4-ieu2") + +(define_insn_reservation "znver5_rotate_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "rotate") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-ieu1|znver4-ieu2") + +(define_insn_reservation "znver4_insn_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu,znver4-store") + +(define_insn_reservation "znver5_insn_store" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "alu,alu1,negnot,rotate1,ishift1,test,incdec,icmp") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu,znver5-store") + +(define_insn_reservation "znver4_insn2_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "icmov,setcc") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu0|znver4-ieu3,znver4-store") + +(define_insn_reservation "znver5_insn2_store" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "icmov,setcc") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu0|znver4-ieu3,znver5-store") + +(define_insn_reservation "znver4_rotate_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu1|znver4-ieu2,znver4-store") + +(define_insn_reservation "znver5_rotate_store" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "rotate") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-ieu1|znver4-ieu2,znver5-store") + +;; alu1 instructions +(define_insn_reservation "znver4_alu1_vector" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "znver1_decode" "vector") + (and (eq_attr "type" "alu1") + (eq_attr "memory" "none,unknown")))) + "znver4-vector,znver4-ivector*3") + +(define_insn_reservation "znver4_alu1_vector_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "vector") + (and (eq_attr "type" "alu1") + (eq_attr "memory" "load")))) + "znver4-vector,znver4-load,znver4-ivector*3") + +(define_insn_reservation "znver5_alu1_vector_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "vector") + (and (eq_attr "type" "alu1") + (eq_attr "memory" "load")))) + "znver4-vector,znver5-load,znver4-ivector*3") + +;; Call Instruction +(define_insn_reservation "znver4_call" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "call,callv")) + "znver4-double,znver4-ieu0|znver4-bru0,znver4-store") + +(define_insn_reservation "znver5_call" 1 + (and (eq_attr "cpu" "znver5") + (eq_attr "type" "call,callv")) + "znver4-double,znver4-ieu0|znver4-bru0,znver5-store") + +;; Branches +(define_insn_reservation "znver4_branch" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-ieu0|znver4-bru0") + +(define_insn_reservation "znver4_branch_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-ieu0|znver4-bru0") + +(define_insn_reservation "znver5_branch_load" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-ieu0|znver4-bru0") + +(define_insn_reservation "znver4_branch_vector" 2 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "none,unknown"))) + "znver4-vector,znver4-ivector*2") + +(define_insn_reservation "znver4_branch_vector_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "load"))) + "znver4-vector,znver4-load,znver4-ivector*2") + +(define_insn_reservation "znver5_branch_vector_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "load"))) + "znver4-vector,znver5-load,znver4-ivector*2") + +;; LEA instruction with simple addressing +(define_insn_reservation "znver4_lea" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "lea")) + "znver4-direct,znver4-ieu") + +(define_insn_reservation "znver5_lea" 1 + (and (eq_attr "cpu" "znver5") + (eq_attr "type" "lea")) + "znver4-direct,znver5-ieu") +;; Leave +(define_insn_reservation "znver4_leave" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "leave")) + "znver4-double,znver4-ieu,znver4-store") + +(define_insn_reservation "znver5_leave" 1 + (and (eq_attr "cpu" "znver5") + (eq_attr "type" "leave")) + "znver4-double,znver5-ieu,znver5-store") + +;; STR and ISHIFT are microcoded. +(define_insn_reservation "znver4_str" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "str") + (eq_attr "memory" "none"))) + "znver4-vector,znver4-ivector*3") + +(define_insn_reservation "znver4_str_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "str") + (eq_attr "memory" "load"))) + "znver4-vector,znver4-load,znver4-ivector*3") + +(define_insn_reservation "znver5_str_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "str") + (eq_attr "memory" "load"))) + "znver4-vector,znver5-load,znver4-ivector*3") + +(define_insn_reservation "znver4_ishift" 2 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ishift") + (eq_attr "memory" "none"))) + "znver4-vector,znver4-ivector*2") + +(define_insn_reservation "znver4_ishift_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ishift") + (eq_attr "memory" "load"))) + "znver4-vector,znver4-load,znver4-ivector*2") + +(define_insn_reservation "znver5_ishift_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ishift") + (eq_attr "memory" "load"))) + "znver4-vector,znver5-load,znver4-ivector*2") + +;; Other vector type +(define_insn_reservation "znver4_ieu_vector" 5 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "other,multi") + (eq_attr "memory" "none,unknown"))) + "znver4-vector,znver4-ivector*5") + +(define_insn_reservation "znver4_ieu_vector_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "other,multi") + (eq_attr "memory" "load"))) + "znver4-vector,znver4-load,znver4-ivector*5") + +(define_insn_reservation "znver5_ieu_vector_load" 9 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "other,multi") + (eq_attr "memory" "load"))) + "znver4-vector,znver5-load,znver4-ivector*5") + +;; Floating Point +;; FP movs +(define_insn_reservation "znver4_fp_cmov" 4 + (and (eq_attr "cpu" "znver4,znver5") + (eq_attr "type" "fcmov")) + "znver4-vector,znver4-fvector*3") + +(define_insn_reservation "znver4_fp_mov_direct" 1 + (and (eq_attr "cpu" "znver4,znver5") + (eq_attr "type" "fmov")) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +;;FLD +(define_insn_reservation "znver4_fp_mov_direct_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "direct") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver5_fp_mov_direct_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "direct") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1") + +;;FST +(define_insn_reservation "znver4_fp_mov_direct_store" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "direct") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu0|znver4-fpu1,znver4-fp-store") + +(define_insn_reservation "znver5_fp_mov_direct_store" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "direct") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu0|znver4-fpu1,znver5-fp-store256") + +;;FILD +(define_insn_reservation "znver4_fp_mov_double_load" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1") + +(define_insn_reservation "znver5_fp_mov_double_load" 13 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1") + +;;FIST +(define_insn_reservation "znver4_fp_mov_double_store" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store")))) + "znver4-double,znver4-fpu1,znver4-fp-store") + +(define_insn_reservation "znver5_fp_mov_double_store" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store")))) + "znver4-double,znver4-fpu1,znver5-fp-store256") + +;; FSQRT +(define_insn_reservation "znver4_fsqrt" 22 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "fpspc") + (and (eq_attr "mode" "XF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*10") + +;; FPSPC instructions +(define_insn_reservation "znver4_fp_spc" 6 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "fpspc") + (eq_attr "memory" "none"))) + "znver4-vector,znver4-fvector*6") + +(define_insn_reservation "znver4_fp_insn_vector" 6 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "znver1_decode" "vector") + (eq_attr "type" "mmxcvt,sselog1,ssemov"))) + "znver4-vector,znver4-fvector*6") + +;; FADD, FSUB, FMUL +(define_insn_reservation "znver4_fp_op_mul" 7 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "fop,fmul") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0") + +(define_insn_reservation "znver4_fp_op_mul_load" 12 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fop,fmul") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fpu0") + +(define_insn_reservation "znver5_fp_op_mul_load" 12 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "fop,fmul") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fpu0") +;; FDIV +(define_insn_reservation "znver4_fp_div" 15 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fdiv*6") + +(define_insn_reservation "znver4_fp_div_load" 20 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fdiv*6") + +(define_insn_reservation "znver5_fp_div_load" 20 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fdiv*6") + +(define_insn_reservation "znver4_fp_idiv_load" 24 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fdiv") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "load")))) + "znver4-double,znver4-load,znver4-fdiv*6") + +(define_insn_reservation "znver5_fp_idiv_load" 24 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "fdiv") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "load")))) + "znver4-double,znver5-load,znver4-fdiv*6") + +;; FABS, FCHS +(define_insn_reservation "znver4_fp_fsgn" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "fsgn")) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver5_fp_fsgn" 1 + (and (eq_attr "cpu" "znver5") + (eq_attr "type" "fsgn")) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +;; FCMP +(define_insn_reservation "znver4_fp_fcmp" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "fcmp") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu1") + +(define_insn_reservation "znver4_fp_fcmp_double" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fcmp") + (and (eq_attr "znver1_decode" "double") + (eq_attr "memory" "none")))) + "znver4-double,znver4-fpu1,znver4-fpu2") + +(define_insn_reservation "znver5_fp_fcmp_double" 4 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "fcmp") + (and (eq_attr "znver1_decode" "double") + (eq_attr "memory" "none")))) + "znver4-double,znver4-fpu1,znver5-fp-store256") + +;; MMX, SSE, SSEn.n instructions +(define_insn_reservation "znver4_fp_mmx " 1 + (and (eq_attr "cpu" "znver4,znver5") + (eq_attr "type" "mmx")) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_mmx_add_cmp" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "mmxadd,mmxcmp") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu") + +(define_insn_reservation "znver4_mmx_add_cmp_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxadd,mmxcmp") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fpu") + +(define_insn_reservation "znver5_mmx_add_cmp_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxadd,mmxcmp") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fpu") + +(define_insn_reservation "znver4_mmx_insn" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1,mmxshft") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_mmx_insn" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1,mmxshft") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_mmx_insn_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1,mmxshft") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_mmx_insn_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1,mmxshft") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_mmx_mov" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-fp-store") + +(define_insn_reservation "znver5_mmx_mov" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "store"))) + "znver4-direct,znver5-fp-store256") + +(define_insn_reservation "znver4_mmx_mov_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "both"))) + "znver4-direct,znver4-load,znver4-fp-store") + +(define_insn_reservation "znver5_mmx_mov_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "both"))) + "znver4-direct,znver5-load,znver5-fp-store256") + +(define_insn_reservation "znver4_mmx_mul" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0|znver4-fpu3") + +(define_insn_reservation "znver4_mmx_mul_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu3") + +(define_insn_reservation "znver5_mmx_mul_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu3") + +;; AVX instructions +(define_insn_reservation "znver4_sse_log" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu") + +(define_insn_reservation "znver4_sse_log_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu") + +(define_insn_reservation "znver5_sse_log_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu") + +(define_insn_reservation "znver4_sse_log1" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_log1" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_log1_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "both")))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_log1_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF,QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "both")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_comi" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "store"))) + "znver4-double,znver4-fpu2|znver4-fpu3,znver4-fp-store") + +(define_insn_reservation "znver5_sse_comi" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "store"))) + "znver4-double,znver4-fpu2|znver4-fpu3,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_comi_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "both"))) + "znver4-double,znver4-load,znver4-fpu2|znver4-fpu3,znver4-fp-store") + +(define_insn_reservation "znver5_sse_comi_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "both"))) + "znver4-double,znver5-load,znver4-fpu2|znver4-fpu3,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_test" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "prefix_extra" "1") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_test_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "prefix_extra" "1") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_sse_test_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "prefix_extra" "1") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_imul" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu3") + +(define_insn_reservation "znver4_sse_imul_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver5_sse_imul_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_mov" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_mov_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_sse_mov_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_mov_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_mov_store" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_mov_fp" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu") + +(define_insn_reservation "znver4_sse_mov_fp_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu") + +(define_insn_reservation "znver5_sse_mov_fp_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu") + +(define_insn_reservation "znver4_sse_mov_fp_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fp-store") + +(define_insn_reservation "znver5_sse_mov_fp_store" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "store")))) + "znver4-direct,znver5-fp-store256") + +(define_insn_reservation "znver5_sse_mov_fp_store_512" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "store")))) + "znver4-direct,znver5-fp-store-512") + +(define_insn_reservation "znver4_sse_add" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_add_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver5_sse_add_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_add1" 4 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sseadd1") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-vector,znver4-fvector*2") + +(define_insn_reservation "znver4_sse_add1_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseadd1") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-vector,znver4-load,znver4-fvector*2") + +(define_insn_reservation "znver5_sse_add1_load" 9 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseadd1") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-vector,znver5-load,znver4-fvector*2") + +(define_insn_reservation "znver4_sse_iadd" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu") + +(define_insn_reservation "znver4_sse_iadd_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu") + +(define_insn_reservation "znver5_sse_iadd_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "QI,HI,SI,DI,TI,OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu") + +(define_insn_reservation "znver4_sse_mul" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_mul_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver5_sse_mul_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_div_pd" 13 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V4DF,V2DF,V1DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*5") + +(define_insn_reservation "znver4_sse_div_ps" 10 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8SF,V4SF,V2SF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*3") + +(define_insn_reservation "znver4_sse_div_pd_load" 18 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V4DF,V2DF,V1DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fdiv*5") + +(define_insn_reservation "znver5_sse_div_pd_load" 18 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V4DF,V2DF,V1DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fdiv*5") + +(define_insn_reservation "znver4_sse_div_ps_load" 15 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8SF,V4SF,V2SF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fdiv*3") + +(define_insn_reservation "znver5_sse_div_ps_load" 15 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8SF,V4SF,V2SF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fdiv*3") + +(define_insn_reservation "znver4_sse_cmp_avx" 1 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "vex") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_cmp_avx_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "vex") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver5_sse_cmp_avx_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "vex") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_comi_avx" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-fpu2+znver4-fpu3,znver4-fp-store") + +(define_insn_reservation "znver5_sse_comi_avx" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "store"))) + "znver4-direct,znver4-fpu2+znver4-fpu3,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_comi_avx_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "both"))) + "znver4-direct,znver4-load,znver4-fpu2+znver4-fpu3,znver4-fp-store") + +(define_insn_reservation "znver5_sse_comi_avx_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "both"))) + "znver4-direct,znver5-load,znver4-fpu2+znver4-fpu3,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_cvt" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_cvt_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver5_sse_cvt_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_icvt" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_icvt_store" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "store")))) + "znver4-double,znver4-fpu2|znver4-fpu3,znver4-fp-store") + +(define_insn_reservation "znver5_sse_icvt_store" 4 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "store")))) + "znver4-double,znver4-fpu2|znver4-fpu3,znver5-fp-store256") + +(define_insn_reservation "znver4_sse_shuf" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_sse_shuf" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_shuf_load" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu") + +(define_insn_reservation "znver5_sse_shuf_load" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu") + +(define_insn_reservation "znver4_sse_ishuf" 3 + (and (eq_attr "cpu" "znver4,znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "OI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_ishuf_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver5_sse_ishuf_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "OI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +;; AVX512 instructions +(define_insn_reservation "znver4_sse_log_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_log_evex" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_log_evex_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_log_evex_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_log1_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1*2|znver4-fpu2*2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_log1_evex" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver5-fp-store-512") + +(define_insn_reservation "znver4_sse_log1_evex_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1*2|znver4-fpu2*2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_log1_evex_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sselog1") + (and (eq_attr "mode" "V16SF,V8DF,XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2,znver5-fp-store-512") + +(define_insn_reservation "znver4_sse_mul_evex" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_mul_evex" 3 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_mul_evex_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_mul_evex_load" 9 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_imul_evex" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_imul_evex" 3 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu3") + +(define_insn_reservation "znver4_sse_imul_evex_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_imul_evex_load" 9 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseimul") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_mov_evex" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1*2|znver4-fpu2*2") + +(define_insn_reservation "znver5_sse_mov_evex" 2 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_mov_evex_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1*2|znver4-fpu2*2") + +(define_insn_reservation "znver5_sse_mov_evex_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_mov_evex_store" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1*2|znver4-fpu2*2,znver4-fp-store") + +(define_insn_reservation "znver5_sse_mov_evex_store" 3 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "store")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver5-fp-store-512") + +(define_insn_reservation "znver4_sse_add_evex" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_add_evex" 2 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_add_evex_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_add_evex_load" 8 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_iadd_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_iadd_evex" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_iadd_evex_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_iadd_evex_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseiadd") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_div_pd_evex" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*9") + +(define_insn_reservation "znver5_sse_div_pd_evex" 13 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*9") + +(define_insn_reservation "znver4_sse_div_ps_evex" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V16SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*6") + +(define_insn_reservation "znver5_sse_div_ps_evex" 10 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V16SF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fdiv*6") + +(define_insn_reservation "znver4_sse_div_pd_evex_load" 19 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fdiv*9") + +(define_insn_reservation "znver5_sse_div_pd_evex_load" 19 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fdiv*9") + +(define_insn_reservation "znver4_sse_div_ps_evex_load" 16 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V16SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fdiv*6") + +(define_insn_reservation "znver5_sse_div_ps_evex_load" 16 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "V16SF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fdiv*6") + +(define_insn_reservation "znver4_sse_cmp_avx128" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx128" 3 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cmp_avx128_load" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx128_load" 9 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cmp_avx256" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx256" 4 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cmp_avx256_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx256_load" 10 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cmp_avx512" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx512" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cmp_avx512_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_cmp_avx512_load" 11 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_cvt_evex" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1*2|znver4-fpu2*2,znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_cvt_evex" 6 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_cvt_evex_load" 12 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1*2|znver4-fpu2*2,znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_cvt_evex_load" 12 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2,znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_shuf_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_shuf_evex" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_shuf_evex_load" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_shuf_evex_load" 7 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3") + +(define_insn_reservation "znver4_sse_ishuf_evex" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1*2|znver4-fpu2*2") + +(define_insn_reservation "znver5_sse_ishuf_evex" 5 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "none")))) + "znver4-direct,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_ishuf_evex_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver4-load,znver4-fpu1*2|znver4-fpu2*2") + +(define_insn_reservation "znver5_sse_ishuf_evex_load" 10 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (and (eq_attr "mode" "XI") + (eq_attr "memory" "load")))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +(define_insn_reservation "znver4_sse_muladd" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_muladd" 4 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_muladd_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseshuf") + (eq_attr "memory" "load"))) + "znver4-direct,znver4-load,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_muladd_load" 10 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "sseshuf") + (eq_attr "memory" "load"))) + "znver4-direct,znver5-load,znver4-fpu1|znver4-fpu2") + +;; AVX512 mask instructions + +(define_insn_reservation "znver4_sse_mskmov" 2 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mskmov") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0*2|znver4-fpu1*2") + +(define_insn_reservation "znver5_sse_mskmov" 2 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "mskmov") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0|znver4-fpu1") + +(define_insn_reservation "znver4_sse_msklog" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "msklog") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu2*2|znver4-fpu3*2") + +(define_insn_reservation "znver5_sse_msklog" 1 + (and (eq_attr "cpu" "znver5") + (and (eq_attr "type" "msklog") + (eq_attr "memory" "none"))) + "znver4-direct,znver4-fpu0|znver4-fpu3") diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver.md similarity index 100% rename from gcc/config/i386/znver1.md rename to gcc/config/i386/znver.md diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index 61e7d72a0a1ec..a3107cb229418 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -58,7 +58,7 @@ EnumValue Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64) m@@OPTSTR_ISA_EXT_FPU@@= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU. m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@ @@ -92,11 +92,11 @@ EnumValue Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464) m@@OPTSTR_ARCH@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA. m@@OPTSTR_TUNE@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR. @@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. ; The code model option names for -mcmodel. @@ -175,5 +175,14 @@ EnumValue Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. + +mrelax +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION) +Take advantage of linker relaxations to reduce the number of instructions +required to materialize symbol addresses. + +mpass-mrelax-to-as +Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION) +Pass -mrelax or -mno-relax option to the assembler. diff --git a/gcc/config/loongarch/gnu-user.h b/gcc/config/loongarch/gnu-user.h index 664dc9206ad9b..28ac8b0e1f630 100644 --- a/gcc/config/loongarch/gnu-user.h +++ b/gcc/config/loongarch/gnu-user.h @@ -33,16 +33,21 @@ along with GCC; see the file COPYING3. If not see #define GLIBC_DYNAMIC_LINKER \ "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1" +#define MUSL_ABI_SPEC \ + "%{mabi=lp64d:}" \ + "%{mabi=lp64f:-sp}" \ + "%{mabi=lp64s:-sf}" + #undef MUSL_DYNAMIC_LINKER #define MUSL_DYNAMIC_LINKER \ - "/lib" ABI_GRLEN_SPEC "/ld-musl-loongarch-" ABI_SPEC ".so.1" + "/lib/ld-musl-loongarch" ABI_GRLEN_SPEC MUSL_ABI_SPEC ".so.1" #undef GNU_USER_TARGET_LINK_SPEC #define GNU_USER_TARGET_LINK_SPEC \ "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \ "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \ - "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" - + "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \ + "%{mno-relax: --no-relax}" /* Similar to standard Linux, but adding -ffast-math support. */ #undef GNU_USER_TARGET_MATHFILE_SPEC diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc index eb9c2a52f9efa..b55baeccd2fea 100644 --- a/gcc/config/loongarch/loongarch-opts.cc +++ b/gcc/config/loongarch/loongarch-opts.cc @@ -575,3 +575,25 @@ multilib_enabled_abi_list () return XOBFINISH (&msg_obstack, const char *); } + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + (void) opts_set; + + /* status of -mabi */ + opts->x_la_opt_abi_base = target->abi.base; + + /* status of -march and -mtune */ + opts->x_la_opt_cpu_arch = target->cpu_arch; + opts->x_la_opt_cpu_tune = target->cpu_tune; + + /* status of -mcmodel */ + opts->x_la_opt_cmodel = target->cmodel; + + /* status of -mfpu */ + opts->x_la_opt_fpu = target->isa.fpu; +} diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index eaa6fc0744829..0557fff630d30 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target, int opt_arch, int opt_tune, int opt_fpu, int opt_abi_base, int opt_abi_ext, int opt_cmodel, int follow_multilib_list); + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set); #endif @@ -87,4 +93,16 @@ loongarch_config_target (struct loongarch_target *target, while -m[no]-memcpy imposes a global constraint. */ #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P loongarch_do_optimize_block_move_p() +#ifndef HAVE_AS_MRELAX_OPTION +#define HAVE_AS_MRELAX_OPTION 0 +#endif + +#ifndef HAVE_AS_COND_BRANCH_RELAXATION +#define HAVE_AS_COND_BRANCH_RELAXATION 0 +#endif + +#ifndef HAVE_AS_TLS +#define HAVE_AS_TLS 0 +#endif + #endif /* LOONGARCH_OPTS_H */ diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h index 2144c2421ed43..8af82ffaa20ae 100644 --- a/gcc/config/loongarch/loongarch-protos.h +++ b/gcc/config/loongarch/loongarch-protos.h @@ -47,7 +47,7 @@ enum loongarch_symbol_type { extern rtx loongarch_emit_move (rtx, rtx); extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int); extern void loongarch_expand_prologue (void); -extern void loongarch_expand_epilogue (bool); +extern void loongarch_expand_epilogue (int); extern bool loongarch_can_use_return_insn (void); extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *); diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 80046b64006d3..a0e11f2fc666b 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -160,7 +160,7 @@ enum loongarch_load_imm_method struct loongarch_integer_op { enum rtx_code code; - unsigned HOST_WIDE_INT value; + HOST_WIDE_INT value; enum loongarch_load_imm_method method; }; @@ -189,7 +189,7 @@ const enum reg_class loongarch_regno_to_class[FIRST_PSEUDO_REGISTER] = { GR_REGS, GR_REGS, GR_REGS, GR_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, - SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, + SIBCALL_REGS, JIRL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, SIBCALL_REGS, GR_REGS, GR_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, JIRL_REGS, @@ -917,8 +917,12 @@ loongarch_compute_frame_info (void) frame->frame_pointer_offset = offset; /* Next are the callee-saved FPRs. */ if (frame->fmask) - offset += LARCH_STACK_ALIGN (num_f_saved * UNITS_PER_FP_REG); - frame->fp_sp_offset = offset - UNITS_PER_FP_REG; + { + offset += LARCH_STACK_ALIGN (num_f_saved * UNITS_PER_FP_REG); + frame->fp_sp_offset = offset - UNITS_PER_FP_REG; + } + else + frame->fp_sp_offset = offset; /* Next are the callee-saved GPRs. */ if (frame->mask) { @@ -931,8 +935,10 @@ loongarch_compute_frame_info (void) frame->save_libcall_adjustment = x_save_size; offset += x_save_size; + frame->gp_sp_offset = offset - UNITS_PER_WORD; } - frame->gp_sp_offset = offset - UNITS_PER_WORD; + else + frame->gp_sp_offset = offset; /* The hard frame pointer points above the callee-saved GPRs. */ frame->hard_frame_pointer_offset = offset; /* Above the hard frame pointer is the callee-allocated varags save area. */ @@ -1002,7 +1008,8 @@ loongarch_save_restore_reg (machine_mode mode, int regno, HOST_WIDE_INT offset, static void loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset, - loongarch_save_restore_fn fn) + loongarch_save_restore_fn fn, + bool skip_eh_data_regs_p) { HOST_WIDE_INT offset; @@ -1011,7 +1018,15 @@ loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset, for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST)) { - loongarch_save_restore_reg (word_mode, regno, offset, fn); + /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO) + when returning normally from a function that calls + __builtin_eh_return. In this case, these registers are saved but + should not be restored, or the return value may be clobbered. */ + + if (!(skip_eh_data_regs_p + && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)) + loongarch_save_restore_reg (word_mode, regno, offset, fn); + offset -= UNITS_PER_WORD; } @@ -1092,7 +1107,9 @@ loongarch_first_stack_step (struct loongarch_frame_info *frame) static void loongarch_emit_stack_tie (void) { - emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, hard_frame_pointer_rtx)); + emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, + frame_pointer_needed ? hard_frame_pointer_rtx + : stack_pointer_rtx)); } #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP) @@ -1281,7 +1298,7 @@ loongarch_expand_prologue (void) GEN_INT (-step1)); RTX_FRAME_RELATED_P (emit_insn (insn)) = 1; size -= step1; - loongarch_for_each_saved_reg (size, loongarch_save_reg); + loongarch_for_each_saved_reg (size, loongarch_save_reg, false); } @@ -1328,11 +1345,13 @@ loongarch_can_use_return_insn (void) return reload_completed && cfun->machine->frame.total_size == 0; } -/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P - says which. */ +/* Expand function epilogue using the following insn patterns: + "epilogue" (style == NORMAL_RETURN) + "sibcall_epilogue" (style == SIBCALL_RETURN) + "eh_return" (style == EXCEPTION_RETURN) */ void -loongarch_expand_epilogue (bool sibcall_p) +loongarch_expand_epilogue (int style) { /* Split the frame into two. STEP1 is the amount of stack we should deallocate before restoring the registers. STEP2 is the amount we @@ -1349,7 +1368,8 @@ loongarch_expand_epilogue (bool sibcall_p) bool need_barrier_p = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0; - if (!sibcall_p && loongarch_can_use_return_insn ()) + /* Handle simple returns. */ + if (style == NORMAL_RETURN && loongarch_can_use_return_insn ()) { emit_jump_insn (gen_return ()); return; @@ -1425,7 +1445,9 @@ loongarch_expand_epilogue (bool sibcall_p) /* Restore the registers. */ loongarch_for_each_saved_reg (frame->total_size - step2, - loongarch_restore_reg); + loongarch_restore_reg, + crtl->calls_eh_return + && style != EXCEPTION_RETURN); if (need_barrier_p) loongarch_emit_stack_tie (); @@ -1446,11 +1468,12 @@ loongarch_expand_epilogue (bool sibcall_p) } /* Add in the __builtin_eh_return stack adjustment. */ - if (crtl->calls_eh_return) + if (crtl->calls_eh_return && style == EXCEPTION_RETURN) emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx, EH_RETURN_STACKADJ_RTX)); - if (!sibcall_p) + /* Emit return unless doing sibcall. */ + if (style != SIBCALL_RETURN) emit_jump_insn (gen_simple_return_internal (ra)); } @@ -1468,7 +1491,7 @@ loongarch_build_integer (struct loongarch_integer_op *codes, unsigned int cost = 0; /* Get the lower 32 bits of the value. */ - HOST_WIDE_INT low_part = TARGET_64BIT ? value << 32 >> 32 : value; + HOST_WIDE_INT low_part = (int32_t)value; if (IMM12_OPERAND (low_part) || IMM12_OPERAND_UNSIGNED (low_part)) { @@ -1501,7 +1524,8 @@ loongarch_build_integer (struct loongarch_integer_op *codes, bool lu32i[2] = {(value & LU32I_B) == 0, (value & LU32I_B) == LU32I_B}; bool lu52i[2] = {(value & LU52I_B) == 0, (value & LU52I_B) == LU52I_B}; - int sign31 = (value & (1UL << 31)) >> 31; + int sign31 = (value & (HOST_WIDE_INT_1U << 31)) >> 31; + int sign51 = (value & (HOST_WIDE_INT_1U << 51)) >> 51; /* Determine whether the upper 32 bits are sign-extended from the lower 32 bits. If it is, the instructions to load the high order can be ommitted. */ @@ -1512,20 +1536,20 @@ loongarch_build_integer (struct loongarch_integer_op *codes, else if (lu32i[sign31]) { codes[cost].method = METHOD_LU52I; - codes[cost].value = (value >> 52) << 52; + codes[cost].value = value & LU52I_B; return cost + 1; } codes[cost].method = METHOD_LU32I; - codes[cost].value = ((value << 12) >> 44) << 32; + codes[cost].value = (value & LU32I_B) | (sign51 ? LU52I_B : 0); cost++; /* Determine whether the 52-61 bits are sign-extended from the low order, and if not, load the 52-61 bits. */ - if (!lu52i[(value & (1ULL << 51)) >> 51]) + if (!lu52i[(value & (HOST_WIDE_INT_1U << 51)) >> 51]) { codes[cost].method = METHOD_LU52I; - codes[cost].value = (value >> 52) << 52; + codes[cost].value = value & LU52I_B; cost++; } } @@ -2101,6 +2125,19 @@ loongarch_load_store_insns (rtx mem, rtx_insn *insn) return loongarch_address_insns (XEXP (mem, 0), mode, might_split_p); } +/* Return true if we need to trap on division by zero. */ + +static bool +loongarch_check_zero_div_p (void) +{ + /* if -m[no-]check-zero-division is given explicitly. */ + if (target_flags_explicit & MASK_CHECK_ZERO_DIV) + return TARGET_CHECK_ZERO_DIV; + + /* if not, don't trap for optimized code except -Og. */ + return !optimize || optimize_debug; +} + /* Return the number of instructions needed for an integer division. */ int @@ -2109,7 +2146,7 @@ loongarch_idiv_insns (machine_mode mode ATTRIBUTE_UNUSED) int count; count = 1; - if (TARGET_CHECK_ZERO_DIV) + if (loongarch_check_zero_div_p ()) count += 2; return count; @@ -4050,7 +4087,6 @@ loongarch_do_optimize_block_move_p (void) return !optimize_size; } - /* Expand a QI or HI mode atomic memory operation. GENERATOR contains a pointer to the gen_* function that generates @@ -4300,27 +4336,27 @@ loongarch_memmodel_needs_rel_acq_fence (enum memmodel model) } } -/* Return true if a FENCE should be emitted to before a memory access to - implement the release portion of memory model MODEL. */ +/* Return true if a FENCE should be emitted after a failed CAS to + implement the acquire semantic of failure_memorder. */ static bool -loongarch_memmodel_needs_release_fence (enum memmodel model) +loongarch_cas_failure_memorder_needs_acquire (enum memmodel model) { - switch (model) + switch (memmodel_base (model)) { + case MEMMODEL_ACQUIRE: case MEMMODEL_ACQ_REL: case MEMMODEL_SEQ_CST: - case MEMMODEL_SYNC_SEQ_CST: - case MEMMODEL_RELEASE: - case MEMMODEL_SYNC_RELEASE: return true; - case MEMMODEL_ACQUIRE: - case MEMMODEL_CONSUME: - case MEMMODEL_SYNC_ACQUIRE: case MEMMODEL_RELAXED: + case MEMMODEL_RELEASE: return false; + /* MEMMODEL_CONSUME is deliberately not handled because it's always + replaced by MEMMODEL_ACQUIRE as at now. If you see an ICE caused by + MEMMODEL_CONSUME, read the change (re)introducing it carefully and + decide what to do. See PR 59448 and get_memmodel in builtins.cc. */ default: gcc_unreachable (); } @@ -4347,7 +4383,8 @@ loongarch_memmodel_needs_release_fence (enum memmodel model) 'V' Print exact log2 of CONST_INT OP element 0 of a replicated CONST_VECTOR in decimal. 'A' Print a _DB suffix if the memory model requires a release. - 'G' Print a DBAR insn if the memory model requires a release. + 'G' Print a DBAR insn for CAS failure (with an acquire semantic if + needed, otherwise a simple load-load barrier). 'i' Print i if the operand is not a register. */ static void @@ -4468,8 +4505,11 @@ loongarch_print_operand (FILE *file, rtx op, int letter) break; case 'G': - if (loongarch_memmodel_needs_release_fence ((enum memmodel) INTVAL (op))) - fputs ("dbar\t0", file); + if (loongarch_cas_failure_memorder_needs_acquire ( + memmodel_from_int (INTVAL (op)))) + fputs ("dbar\t0b10100", file); + else + fputs ("dbar\t0x700", file); break; case 'i': @@ -5262,7 +5302,7 @@ loongarch_output_division (const char *division, rtx *operands) const char *s; s = division; - if (TARGET_CHECK_ZERO_DIV) + if (loongarch_check_zero_div_p ()) { output_asm_insn (s, operands); s = "bne\t%2,%.,1f\n\tbreak\t7\n1:"; @@ -5477,7 +5517,8 @@ loongarch_init_machine_status (void) } static void -loongarch_option_override_internal (struct gcc_options *opts) +loongarch_option_override_internal (struct gcc_options *opts, + struct gcc_options *opts_set) { int i, regno, mode; @@ -5489,6 +5530,8 @@ loongarch_option_override_internal (struct gcc_options *opts) la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu, la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0); + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); + if (TARGET_ABI_LP64) flag_pcc_struct_return = 0; @@ -5551,7 +5594,30 @@ loongarch_option_override_internal (struct gcc_options *opts) static void loongarch_option_override (void) { - loongarch_option_override_internal (&global_options); + loongarch_option_override_internal (&global_options, &global_options_set); +} + +/* Implement TARGET_OPTION_SAVE. */ +static void +loongarch_option_save (struct cl_target_option *, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); +} + +/* Implement TARGET_OPTION_RESTORE. */ +static void +loongarch_option_restore (struct gcc_options *, + struct gcc_options *, + struct cl_target_option *ptr) +{ + la_target.cpu_arch = ptr->x_la_opt_cpu_arch; + la_target.cpu_tune = ptr->x_la_opt_cpu_tune; + + la_target.isa.fpu = ptr->x_la_opt_fpu; + + la_target.cmodel = ptr->x_la_opt_cmodel; } /* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */ @@ -5773,6 +5839,10 @@ loongarch_starting_frame_offset (void) #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE loongarch_option_override +#define TARGET_OPTION_SAVE loongarch_option_save +#undef TARGET_OPTION_RESTORE +#define TARGET_OPTION_RESTORE loongarch_option_restore + #undef TARGET_LEGITIMIZE_ADDRESS #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index 4d107a4220942..28ab87eb660ad 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -69,8 +69,23 @@ along with GCC; see the file COPYING3. If not see #define SUBTARGET_ASM_SPEC "" #endif +#if HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION +#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mrelax}}" +#else +#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mno-relax}}" +#endif + +#if HAVE_AS_MRELAX_OPTION +#define ASM_MRELAX_SPEC \ + "%{!mno-pass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}" +#else +#define ASM_MRELAX_SPEC \ + "%{mpass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}" +#endif + #undef ASM_SPEC -#define ASM_SPEC "%{mabi=*} %{subtarget_asm_spec}" +#define ASM_SPEC \ + "%{mabi=*} " ASM_MRELAX_SPEC " %(subtarget_asm_spec)" /* Extra switches sometimes passed to the linker. */ @@ -511,7 +526,7 @@ enum reg_class #define REG_CLASS_CONTENTS \ { \ { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ - { 0x001ff000, 0x00000000, 0x00000000 }, /* SIBCALL_REGS */ \ + { 0x001fd000, 0x00000000, 0x00000000 }, /* SIBCALL_REGS */ \ { 0xff9ffff0, 0x00000000, 0x00000000 }, /* JIRL_REGS */ \ { 0xfffffffc, 0x00000000, 0x00000000 }, /* CSR_REGS */ \ { 0xffffffff, 0x00000000, 0x00000000 }, /* GR_REGS */ \ @@ -561,7 +576,8 @@ enum reg_class 64, 65, 66, 67, 68, 69, 70, 71, 72, 73} #define IMM_BITS 12 -#define IMM_REACH (1LL << IMM_BITS) +#define IMM_REACH (HOST_WIDE_INT_1 << IMM_BITS) +#define HWIT_1U HOST_WIDE_INT_1U /* True if VALUE is an unsigned 6-bit number. */ @@ -589,18 +605,20 @@ enum reg_class /* True if VALUE can be loaded into a register using LU12I. */ #define LU12I_OPERAND(VALUE) \ - (((VALUE) | ((1UL << 31) - IMM_REACH)) == ((1UL << 31) - IMM_REACH) \ - || ((VALUE) | ((1UL << 31) - IMM_REACH)) + IMM_REACH == 0) + (((VALUE) | ((HWIT_1U << 31) - IMM_REACH)) == ((HWIT_1U << 31) - IMM_REACH) \ + || ((VALUE) | ((HWIT_1U << 31) - IMM_REACH)) + IMM_REACH == 0) /* True if VALUE can be loaded into a register using LU32I. */ #define LU32I_OPERAND(VALUE) \ - (((VALUE) | (((1ULL << 19) - 1) << 32)) == (((1ULL << 19) - 1) << 32) \ - || ((VALUE) | (((1ULL << 19) - 1) << 32)) + (1ULL << 32) == 0) + (((VALUE) | (((HWIT_1U << 19) - 1) << 32)) == (((HWIT_1U << 19) - 1) << 32) \ + || ((VALUE) | (((HWIT_1U << 19) - 1) << 32)) + (HWIT_1U << 32) == 0) /* True if VALUE can be loaded into a register using LU52I. */ -#define LU52I_OPERAND(VALUE) (((VALUE) | (0xfffULL << 52)) == (0xfffULL << 52)) +#define HWIT_UC_0xFFF HOST_WIDE_INT_UC(0xfff) +#define LU52I_OPERAND(VALUE) \ + (((VALUE) | (HWIT_UC_0xFFF << 52)) == (HWIT_UC_0xFFF << 52)) /* Return a value X with the low 12 bits clear, and such that VALUE - X is a signed 12-bit value. */ @@ -669,7 +687,7 @@ enum reg_class point values. */ #define GP_RETURN (GP_REG_FIRST + 4) -#define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) +#define FP_RETURN ((TARGET_SOFT_FLOAT_ABI) ? GP_RETURN : (FP_REG_FIRST + 0)) #define MAX_ARGS_IN_REGISTERS 8 @@ -975,11 +993,6 @@ typedef struct { #define ASM_OUTPUT_ALIGN(STREAM, LOG) fprintf (STREAM, "\t.align\t%d\n", (LOG)) -/* "nop" instruction 54525952 (andi $r0,$r0,0) is - used for padding. */ -#define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, LOG) \ - fprintf (STREAM, "\t.align\t%d,54525952,4\n", (LOG)) - /* This is how to output an assembler line to advance the location counter by SIZE bytes. */ @@ -1142,6 +1155,11 @@ struct GTY (()) machine_function /* The largest type that can be passed in floating-point registers. */ /* TODO: according to mabi. */ #define UNITS_PER_FP_ARG \ - (TARGET_HARD_FLOAT ? (TARGET_DOUBLE_FLOAT ? 8 : 4) : 0) + (TARGET_HARD_FLOAT_ABI ? (TARGET_DOUBLE_FLOAT_ABI ? 8 : 4) : 0) #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) + +/* LoongArch maintains ICache/DCache coherency by hardware, + we just need "ibar" to avoid instruction hazard here. */ +#undef CLEAR_INSN_CACHE +#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0) diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index d3c809e25f34b..1361e7ba7bfc6 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -93,10 +93,16 @@ (define_constants [(RETURN_ADDR_REGNUM 1) + (TP_REGNUM 2) (T0_REGNUM 12) (T1_REGNUM 13) (S0_REGNUM 23) + ;; Return path styles + (NORMAL_RETURN 0) + (SIBCALL_RETURN 1) + (EXCEPTION_RETURN 2) + ;; PIC long branch sequences are never longer than 100 bytes. (MAX_PIC_BRANCH_LENGTH 100) ]) @@ -621,7 +627,7 @@ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))] "TARGET_64BIT" - "mul.d\t%0,%1,%2" + "mulw.d.w\t%0,%1,%2" [(set_attr "type" "imul") (set_attr "mode" "DI")]) @@ -2622,6 +2628,10 @@ } [(set_attr "type" "branch")]) +;; Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine", +;; non-returning indirect jumps through $ra would interfere with both subroutine +;; return prediction and the more general indirect branch prediction. + (define_expand "indirect_jump" [(set (pc) (match_operand 0 "register_operand"))] "" @@ -2632,7 +2642,7 @@ }) (define_insn "@indirect_jump" - [(set (pc) (match_operand:P 0 "register_operand" "r"))] + [(set (pc) (match_operand:P 0 "register_operand" "e"))] "" "jr\t%0" [(set_attr "type" "jump") @@ -2655,7 +2665,7 @@ (define_insn "@tablejump" [(set (pc) - (match_operand:P 0 "register_operand" "r")) + (match_operand:P 0 "register_operand" "e")) (use (label_ref (match_operand 1 "" "")))] "" "jr\t%0" @@ -2710,7 +2720,7 @@ [(const_int 2)] "" { - loongarch_expand_epilogue (false); + loongarch_expand_epilogue (NORMAL_RETURN); DONE; }) @@ -2718,7 +2728,7 @@ [(const_int 2)] "" { - loongarch_expand_epilogue (true); + loongarch_expand_epilogue (SIBCALL_RETURN); DONE; }) @@ -2775,6 +2785,20 @@ emit_insn (gen_eh_set_ra_di (operands[0])); else emit_insn (gen_eh_set_ra_si (operands[0])); + + emit_jump_insn (gen_eh_return_internal ()); + emit_barrier (); + DONE; +}) + +(define_insn_and_split "eh_return_internal" + [(eh_return)] + "" + "#" + "epilogue_completed" + [(const_int 0)] +{ + loongarch_expand_epilogue (EXCEPTION_RETURN); DONE; }) @@ -3291,6 +3315,12 @@ [(set_attr "length" "0") (set_attr "type" "ghost")]) +;; Named pattern for expanding thread pointer reference. +(define_expand "get_thread_pointer" + [(set (match_operand:P 0 "register_operand" "=r") + (reg:P TP_REGNUM))] + "HAVE_AS_TLS" + {}) (define_split [(match_operand 0 "small_data_pattern")] diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index 3ff0d860413aa..7aef075c8c198 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -65,7 +65,7 @@ EnumValue Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64) mfpu= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -mfpu=FPU Generate code for the given FPU. mfpu=0 @@ -99,11 +99,11 @@ EnumValue Enum(cpu_type) String(la464) Value(CPU_LA464) march= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -march=PROCESSOR Generate code for the given PROCESSOR ISA. mtune= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -mtune=PROCESSOR Generate optimized code for PROCESSOR. @@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. ; The code model option names for -mcmodel. @@ -182,5 +182,14 @@ EnumValue Enum(cmodel) String(extreme) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. + +mrelax +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION) +Take advantage of linker relaxations to reduce the number of instructions +required to materialize symbol addresses. + +mpass-mrelax-to-as +Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION) +Pass -mrelax or -mno-relax option to the assembler. diff --git a/gcc/config/loongarch/sync.md b/gcc/config/loongarch/sync.md index 0c4f1983e889d..c2f0d33ab21bb 100644 --- a/gcc/config/loongarch/sync.md +++ b/gcc/config/loongarch/sync.md @@ -129,19 +129,42 @@ (clobber (match_scratch:GPR 6 "=&r"))] "" { - return "%G5\\n\\t" - "1:\\n\\t" - "ll.\\t%0,%1\\n\\t" - "bne\\t%0,%z2,2f\\n\\t" - "or%i3\\t%6,$zero,%3\\n\\t" - "sc.\\t%6,%1\\n\\t" - "beq\\t$zero,%6,1b\\n\\t" - "b\\t3f\\n\\t" - "2:\\n\\t" - "dbar\\t0x700\\n\\t" - "3:\\n\\t"; + output_asm_insn ("1:", operands); + output_asm_insn ("ll.\t%0,%1", operands); + + /* Like the test case atomic-cas-int.C, in loongarch64, O1 and higher, the + return value of the val_without_const_folding will not be truncated and + will be passed directly to the function compare_exchange_strong. + However, the instruction 'bne' does not distinguish between 32-bit and + 64-bit operations. so if the upper 32 bits of the register are not + extended by the 32nd bit symbol, then the comparison may not be valid + here. This will affect the result of the operation. */ + + if (TARGET_64BIT && REG_P (operands[2]) + && GET_MODE (operands[2]) == SImode) + { + output_asm_insn ("addi.w\t%6,%2,0", operands); + output_asm_insn ("bne\t%0,%6,2f", operands); + } + else + output_asm_insn ("bne\t%0,%z2,2f", operands); + + output_asm_insn ("or%i3\t%6,$zero,%3", operands); + output_asm_insn ("sc.\t%6,%1", operands); + output_asm_insn ("beqz\t%6,1b", operands); + output_asm_insn ("b\t3f", operands); + output_asm_insn ("2:", operands); + output_asm_insn ("%G5", operands); + output_asm_insn ("3:", operands); + + return ""; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") + (if_then_else + (and (match_test "GET_MODE (operands[2]) == SImode") + (match_test "REG_P (operands[2])")) + (const_int 32) + (const_int 28)))]) (define_expand "atomic_compare_and_swap" [(match_operand:SI 0 "register_operand" "") ;; bool output @@ -234,8 +257,7 @@ (clobber (match_scratch:GPR 7 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%2\\n\\t" "bne\\t%7,%z4,2f\\n\\t" @@ -245,10 +267,10 @@ "beq\\t$zero,%7,1b\\n\\t" "b\\t3f\\n\\t" "2:\\n\\t" - "dbar\\t0x700\\n\\t" + "%G6\\n\\t" "3:\\n\\t"; } - [(set (attr "length") (const_int 40))]) + [(set (attr "length") (const_int 36))]) (define_expand "atomic_compare_and_swap" [(match_operand:SI 0 "register_operand" "") ;; bool output @@ -303,8 +325,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "add.w\\t%8,%0,%z5\\n\\t" @@ -314,7 +335,7 @@ "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) (define_insn "atomic_cas_value_sub_7_" [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res @@ -330,8 +351,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "sub.w\\t%8,%0,%z5\\n\\t" @@ -340,7 +360,7 @@ "sc.\\t%7,%1\\n\\t" "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) (define_insn "atomic_cas_value_and_7_" [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res @@ -356,8 +376,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "and\\t%8,%0,%z5\\n\\t" @@ -366,7 +385,7 @@ "sc.\\t%7,%1\\n\\t" "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) (define_insn "atomic_cas_value_xor_7_" [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res @@ -382,8 +401,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "xor\\t%8,%0,%z5\\n\\t" @@ -393,7 +411,7 @@ "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) (define_insn "atomic_cas_value_or_7_" [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res @@ -409,8 +427,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "or\\t%8,%0,%z5\\n\\t" @@ -420,7 +437,7 @@ "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) (define_insn "atomic_cas_value_nand_7_" [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res @@ -436,8 +453,7 @@ (clobber (match_scratch:GPR 8 "=&r"))] "" { - return "%G6\\n\\t" - "1:\\n\\t" + return "1:\\n\\t" "ll.\\t%0,%1\\n\\t" "and\\t%7,%0,%3\\n\\t" "and\\t%8,%0,%z5\\n\\t" @@ -446,7 +462,29 @@ "sc.\\t%7,%1\\n\\t" "beq\\t$zero,%7,1b"; } - [(set (attr "length") (const_int 32))]) + [(set (attr "length") (const_int 28))]) + +(define_insn "atomic_cas_value_exchange_7_" + [(set (match_operand:GPR 0 "register_operand" "=&r") + (match_operand:GPR 1 "memory_operand" "+ZC")) + (set (match_dup 1) + (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_0_operand" "rJ") + (match_operand:GPR 3 "reg_or_0_operand" "rJ") + (match_operand:GPR 4 "reg_or_0_operand" "rJ") + (match_operand:GPR 5 "reg_or_0_operand" "rJ") + (match_operand:SI 6 "const_int_operand")] ;; model + UNSPEC_SYNC_EXCHANGE)) + (clobber (match_scratch:GPR 7 "=&r"))] + "" +{ + return "1:\\n\\t" + "ll.\\t%0,%1\\n\\t" + "and\\t%7,%0,%z3\\n\\t" + "or%i5\\t%7,%7,%5\\n\\t" + "sc.\\t%7,%1\\n\\t" + "beqz\\t%7,1b\\n\\t"; +} + [(set (attr "length") (const_int 20))]) (define_expand "atomic_exchange" [(set (match_operand:SHORT 0 "register_operand") @@ -459,9 +497,9 @@ "" { union loongarch_gen_fn_ptrs generator; - generator.fn_7 = gen_atomic_cas_value_cmp_and_7_si; + generator.fn_7 = gen_atomic_cas_value_exchange_7_si; loongarch_expand_atomic_qihi (generator, operands[0], operands[1], - operands[1], operands[2], operands[3]); + const0_rtx, operands[2], operands[3]); DONE; }) diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux index 5b9796aea2b92..136b27d0a8d6a 100644 --- a/gcc/config/loongarch/t-linux +++ b/gcc/config/loongarch/t-linux @@ -40,7 +40,7 @@ ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),) MULTILIB_OSDIRNAMES = \ mabi.lp64d=../lib64$\ - $(call if_multiarch,:loongarch64-linux-gnuf64) + $(call if_multiarch,:loongarch64-linux-gnu) MULTILIB_OSDIRNAMES += \ mabi.lp64f=../lib64/f32$\ diff --git a/gcc/config/loongarch/t-loongarch b/gcc/config/loongarch/t-loongarch index 6d6e3435d5959..e73f4f437ef73 100644 --- a/gcc/config/loongarch/t-loongarch +++ b/gcc/config/loongarch/t-loongarch @@ -16,6 +16,10 @@ # along with GCC; see the file COPYING3. If not see # . +TM_H += $(srcdir)/config/loongarch/loongarch-driver.h +OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \ + $(srcdir)/config/loongarch/loongarch-tune.h + # Canonical target triplet from config.gcc LA_MULTIARCH_TRIPLET = $(patsubst LA_MULTIARCH_TRIPLET=%,%,$\ $(filter LA_MULTIARCH_TRIPLET=%,$(tm_defines))) diff --git a/gcc/config/mips/mips-d.cc b/gcc/config/mips/mips-d.cc index 41a278a08fd7a..8b6ccd106045e 100644 --- a/gcc/config/mips/mips-d.cc +++ b/gcc/config/mips/mips-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/mips/mips-d.h b/gcc/config/mips/mips-d.h new file mode 100644 index 0000000000000..7cb3ed9716e1f --- /dev/null +++ b/gcc/config/mips/mips-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the MIPS architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Routines implemented in mips-d.cc */ +extern void mips_d_target_versions (void); +extern void mips_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS mips_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO mips_d_register_target_info diff --git a/gcc/config/mips/mips-msa.md b/gcc/config/mips/mips-msa.md index cd4b6973847d7..361e3f95ae250 100644 --- a/gcc/config/mips/mips-msa.md +++ b/gcc/config/mips/mips-msa.md @@ -231,6 +231,10 @@ (V4SI "uimm5") (V2DI "uimm6")]) +;; The index of sign bit in FP vector elements. +(define_mode_attr elmsgnbit [(V2DF "63") (V4DF "63") + (V4SF "31") (V8SF "31")]) + (define_expand "vec_init" [(match_operand:MSA 0 "register_operand") (match_operand:MSA 1 "")] @@ -597,9 +601,9 @@ }) (define_expand "neg2" - [(set (match_operand:MSA 0 "register_operand") - (minus:MSA (match_dup 2) - (match_operand:MSA 1 "register_operand")))] + [(set (match_operand:IMSA 0 "register_operand") + (minus:IMSA (match_dup 2) + (match_operand:IMSA 1 "register_operand")))] "ISA_HAS_MSA" { rtx reg = gen_reg_rtx (mode); @@ -607,6 +611,14 @@ operands[2] = reg; }) +(define_insn "neg2" + [(set (match_operand:FMSA 0 "register_operand" "=f") + (neg:FMSA (match_operand:FMSA 1 "register_operand" "f")))] + "ISA_HAS_MSA" + "bnegi.\t%w0,%w1," + [(set_attr "type" "simd_bit") + (set_attr "mode" "")]) + (define_expand "msa_ldi" [(match_operand:IMSA 0 "register_operand") (match_operand 1 "const_imm10_operand")] diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index 9d0f4d90fd975..86350523c1bc3 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -388,8 +388,4 @@ extern void mips_register_frame_header_opt (void); extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rtx *); extern void mips_expand_vec_cmp_expr (rtx *); -/* Routines implemented in mips-d.cc */ -extern void mips_d_target_versions (void); -extern void mips_d_register_target_info (void); - #endif /* ! GCC_MIPS_PROTOS_H */ diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc index e64928f41131c..d26630b20cef6 100644 --- a/gcc/config/mips/mips.cc +++ b/gcc/config/mips/mips.cc @@ -3140,6 +3140,9 @@ mips_emit_call_insn (rtx pattern, rtx orig_addr, rtx addr, bool lazy_p) { rtx post_call_tmp_reg = gen_rtx_REG (word_mode, POST_CALL_TMP_REG); clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), post_call_tmp_reg); + clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); + clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), + MIPS_PROLOGUE_TEMP (word_mode)); } return insn; @@ -3236,7 +3239,13 @@ mips16_gp_pseudo_reg (void) rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); rtx_insn *insn = emit_insn_after (set, scan); INSN_LOCATION (insn) = 0; - + /* NewABI support hasn't been implement. NewABI should generate RTL + sequence instead of ASM sequence directly. */ + if (mips_current_loadgp_style () == LOADGP_OLDABI) + { + emit_clobber (MIPS16_PIC_TEMP); + emit_clobber (MIPS_PROLOGUE_TEMP (Pmode)); + } pop_topmost_sequence (); } diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 858bbba3a369a..02562d3b64420 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -680,10 +680,6 @@ struct mips_cpu_info { } \ while (0) -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS mips_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO mips_d_register_target_info - /* Default target_flags if no switches are specified */ #ifndef TARGET_DEFAULT diff --git a/gcc/config/netbsd-d.cc b/gcc/config/netbsd-d.cc index 286f010939fcf..dbabae7ab71f5 100644 --- a/gcc/config/netbsd-d.cc +++ b/gcc/config/netbsd-d.cc @@ -21,8 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" -#include "memmodel.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h index ed72c253191a5..294dd715c3d35 100644 --- a/gcc/config/nvptx/nvptx.h +++ b/gcc/config/nvptx/nvptx.h @@ -27,7 +27,7 @@ /* Run-time Target. */ -#define STARTFILE_SPEC "%{mmainkernel:crt0.o}" +#define STARTFILE_SPEC "%{mmainkernel:crt0.o%s}" #define TARGET_CPU_CPP_BUILTINS() nvptx_cpu_cpp_builtins () diff --git a/gcc/config/openbsd-d.cc b/gcc/config/openbsd-d.cc index c1a2a89807a31..bb3a3f28f6d9d 100644 --- a/gcc/config/openbsd-d.cc +++ b/gcc/config/openbsd-d.cc @@ -20,9 +20,8 @@ along with GCC; see the file COPYING3. If not see #include "config.h" #include "system.h" #include "coretypes.h" -#include "memmodel.h" #include "tm.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/pa/pa-d.cc b/gcc/config/pa/pa-d.cc index 122ad48044737..077aeb5d63442 100644 --- a/gcc/config/pa/pa-d.cc +++ b/gcc/config/pa/pa-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "target.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/pa/pa-d.h b/gcc/config/pa/pa-d.h new file mode 100644 index 0000000000000..9a9df108f61f1 --- /dev/null +++ b/gcc/config/pa/pa-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the HPPA architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Routines implemented in pa-d.cc */ +extern void pa_d_target_versions (void); +extern void pa_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS pa_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO pa_d_register_target_info diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h index d474d9efc91eb..6b587538e940e 100644 --- a/gcc/config/pa/pa-protos.h +++ b/gcc/config/pa/pa-protos.h @@ -106,12 +106,8 @@ extern void pa_asm_output_aligned_local (FILE *, const char *, unsigned int); extern void pa_hpux_asm_output_external (FILE *, tree, const char *); extern HOST_WIDE_INT pa_initial_elimination_offset (int, int); -extern HOST_WIDE_INT pa_function_arg_size (machine_mode, const_tree); +extern int pa_function_arg_size (machine_mode, const_tree); extern void pa_output_function_label (FILE *); extern void hppa_profile_hook (int); extern const int pa_magic_milli[]; - -/* Routines implemented in pa-d.cc */ -extern void pa_d_target_versions (void); -extern void pa_d_register_target_info (void); diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index 54ab486a02d6f..bd4dcc4e2b365 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -567,6 +567,9 @@ pa_option_override (void) flag_reorder_blocks = 1; } + /* Disable -fstack-protector to suppress warning. */ + flag_stack_protect = 0; + /* We can't guarantee that .dword is available for 32-bit targets. */ if (UNITS_PER_WORD == 4) targetm.asm_out.aligned_op.di = NULL; @@ -1260,6 +1263,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* If the index adds a large constant, try to scale the constant so that it can be loaded with only one insn. */ if (GET_CODE (XEXP (idx, 1)) == CONST_INT + && INTVAL (XEXP (idx, 1)) % (1 << shift_val) == 0 && VAL_14_BITS_P (INTVAL (XEXP (idx, 1)) / INTVAL (XEXP (XEXP (idx, 0), 1))) && INTVAL (XEXP (idx, 1)) % INTVAL (XEXP (XEXP (idx, 0), 1)) == 0) @@ -9781,6 +9785,8 @@ pa_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) return NULL_RTX; arg_size = pa_function_arg_size (mode, type); + if (!arg_size) + return NULL_RTX; /* If this arg would be passed partially or totally on the stack, then this routine should return zero. pa_arg_partial_bytes will @@ -9982,15 +9988,16 @@ pa_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg) CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); unsigned int max_arg_words = 8; unsigned int offset = 0; + int arg_size; if (!TARGET_64BIT) return 0; - if (pa_function_arg_size (arg.mode, arg.type) > 1 && (cum->words & 1)) + arg_size = pa_function_arg_size (arg.mode, arg.type); + if (arg_size > 1 && (cum->words & 1)) offset = 1; - if (cum->words + offset + pa_function_arg_size (arg.mode, arg.type) - <= max_arg_words) + if (cum->words + offset + arg_size <= max_arg_words) /* Arg fits fully into registers. */ return 0; else if (cum->words + offset >= max_arg_words) @@ -10394,7 +10401,7 @@ pa_asm_trampoline_template (FILE *f) fputs ("\tldw 0(%r22),%r21\n", f); fputs ("\tldw 4(%r22),%r19\n", f); fputs ("\tbve (%r21)\n", f); - fputs ("\tldw 52(%r1),%r29\n", f); + fputs ("\tldw 52(%r20),%r29\n", f); fputs ("\t.word 0\n", f); fputs ("\t.word 0\n", f); fputs ("\t.word 0\n", f); @@ -11064,17 +11071,25 @@ pa_starting_frame_offset (void) return 8; } -/* Figure out the size in words of the function argument. The size - returned by this function should always be greater than zero because - we pass variable and zero sized objects by reference. */ +/* Figure out the size in words of the function argument. */ -HOST_WIDE_INT +int pa_function_arg_size (machine_mode mode, const_tree type) { HOST_WIDE_INT size; size = mode != BLKmode ? GET_MODE_SIZE (mode) : int_size_in_bytes (type); - return CEIL (size, UNITS_PER_WORD); + + /* The 64-bit runtime does not restrict the size of stack frames, + but the gcc calling conventions limit argument sizes to 1G. Our + prologue/epilogue code limits frame sizes to just under 32 bits. + 1G is also the maximum frame size that can be handled by the HPUX + unwind descriptor. Since very large TYPE_SIZE_UNIT values can + occur for (parallel:BLK []), we need to ignore large arguments + passed by value. */ + if (size >= (1 << (HOST_BITS_PER_INT - 2))) + size = 0; + return (int) CEIL (size, UNITS_PER_WORD); } #include "gt-pa.h" diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 92d3d1841a9e5..1ce6635ae9b9c 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1310,9 +1310,5 @@ do { \ #define NEED_INDICATE_EXEC_STACK 0 -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS pa_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO pa_d_register_target_info - /* Output default function prologue for hpux. */ #define TARGET_ASM_FUNCTION_PROLOGUE pa_output_function_prologue diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 76ae35d4cfa7e..2b1ee3d32a3b3 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -4908,7 +4908,7 @@ (define_insn "fix_truncsfsi2" [(set (match_operand:SI 0 "register_operand" "=f") - (fix:SI (fix:SF (match_operand:SF 1 "register_operand" "f"))))] + (fix:SI (match_operand:SF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT" "{fcnvfxt,sgl,sgl|fcnv,t,sgl,w} %1,%0" [(set_attr "type" "fpalu") @@ -4916,7 +4916,7 @@ (define_insn "fix_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "=f") - (fix:SI (fix:DF (match_operand:DF 1 "register_operand" "f"))))] + (fix:SI (match_operand:DF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT" "{fcnvfxt,dbl,sgl|fcnv,t,dbl,w} %1,%0" [(set_attr "type" "fpalu") @@ -4924,7 +4924,7 @@ (define_insn "fix_truncsfdi2" [(set (match_operand:DI 0 "register_operand" "=f") - (fix:DI (fix:SF (match_operand:SF 1 "register_operand" "f"))))] + (fix:DI (match_operand:SF 1 "register_operand" "f")))] "TARGET_PA_11 && ! TARGET_SOFT_FLOAT" "{fcnvfxt,sgl,dbl|fcnv,t,sgl,dw} %1,%0" [(set_attr "type" "fpalu") @@ -4932,7 +4932,7 @@ (define_insn "fix_truncdfdi2" [(set (match_operand:DI 0 "register_operand" "=f") - (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "f"))))] + (fix:DI (match_operand:DF 1 "register_operand" "f")))] "TARGET_PA_11 && ! TARGET_SOFT_FLOAT" "{fcnvfxt,dbl,dbl|fcnv,t,dbl,dw} %1,%0" [(set_attr "type" "fpalu") @@ -4972,7 +4972,7 @@ (define_insn "fixuns_truncsfsi2" [(set (match_operand:SI 0 "register_operand" "=f") - (unsigned_fix:SI (fix:SF (match_operand:SF 1 "register_operand" "f"))))] + (unsigned_fix:SI (match_operand:SF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT && TARGET_PA_20" "fcnv,t,sgl,uw %1,%0" [(set_attr "type" "fpalu") @@ -4980,7 +4980,7 @@ (define_insn "fixuns_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "=f") - (unsigned_fix:SI (fix:DF (match_operand:DF 1 "register_operand" "f"))))] + (unsigned_fix:SI (match_operand:DF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT && TARGET_PA_20" "fcnv,t,dbl,uw %1,%0" [(set_attr "type" "fpalu") @@ -4988,7 +4988,7 @@ (define_insn "fixuns_truncsfdi2" [(set (match_operand:DI 0 "register_operand" "=f") - (unsigned_fix:DI (fix:SF (match_operand:SF 1 "register_operand" "f"))))] + (unsigned_fix:DI (match_operand:SF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT && TARGET_PA_20" "fcnv,t,sgl,udw %1,%0" [(set_attr "type" "fpalu") @@ -4996,7 +4996,7 @@ (define_insn "fixuns_truncdfdi2" [(set (match_operand:DI 0 "register_operand" "=f") - (unsigned_fix:DI (fix:DF (match_operand:DF 1 "register_operand" "f"))))] + (unsigned_fix:DI (match_operand:DF 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT && TARGET_PA_20" "fcnv,t,dbl,udw %1,%0" [(set_attr "type" "fpalu") @@ -5071,23 +5071,25 @@ (match_dup 2)))) (const_int 0))])] "" - "") + " +{ + if (TARGET_64BIT) + operands[2] = force_reg (DImode, operands[2]); +}") (define_insn "" - [(set (match_operand:DI 0 "register_operand" "=r,r") - (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%rM,rM") - (match_operand:DI 2 "arith11_operand" "r,I"))) + [(set (match_operand:DI 0 "register_operand" "=r") + (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%rM") + (match_operand:DI 2 "register_operand" "r"))) (trap_if (ne (plus:TI (sign_extend:TI (match_dup 1)) (sign_extend:TI (match_dup 2))) (sign_extend:TI (plus:DI (match_dup 1) (match_dup 2)))) (const_int 0))] "TARGET_64BIT" - "@ - add,tsv,* %2,%1,%0 - addi,tsv,* %2,%1,%0" - [(set_attr "type" "binary,binary") - (set_attr "length" "4,4")]) + "add,tsv,* %2,%1,%0" + [(set_attr "type" "binary") + (set_attr "length" "4")]) (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") @@ -5262,23 +5264,25 @@ (match_dup 2)))) (const_int 0))])] "" - "") + " +{ + if (TARGET_64BIT) + operands[1] = force_reg (DImode, operands[1]); +}") (define_insn "" - [(set (match_operand:DI 0 "register_operand" "=r,r") - (minus:DI (match_operand:DI 1 "arith11_operand" "r,I") - (match_operand:DI 2 "reg_or_0_operand" "rM,rM"))) + [(set (match_operand:DI 0 "register_operand" "=r") + (minus:DI (match_operand:DI 1 "register_operand" "r") + (match_operand:DI 2 "reg_or_0_operand" "rM"))) (trap_if (ne (minus:TI (sign_extend:TI (match_dup 1)) (sign_extend:TI (match_dup 2))) (sign_extend:TI (minus:DI (match_dup 1) (match_dup 2)))) (const_int 0))] "TARGET_64BIT" - "@ - {subo|sub,tsv} %1,%2,%0 - {subio|subi,tsv} %1,%2,%0" - [(set_attr "type" "binary,binary") - (set_attr "length" "4,4")]) + "sub,tsv,* %1,%2,%0" + [(set_attr "type" "binary") + (set_attr "length" "4")]) (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r,&r") @@ -5489,24 +5493,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) - (match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) - (match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a")) @@ -7330,7 +7316,7 @@ }) (define_insn "indirect_goto" - [(unspec [(match_operand 0 "register_operand" "=r")] UNSPEC_GOTO)] + [(unspec [(match_operand 0 "register_operand" "r")] UNSPEC_GOTO)] "GET_MODE (operands[0]) == word_mode" "bv%* %%r0(%0)" [(set_attr "type" "branch") @@ -9465,7 +9451,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" (pc))) (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1))) - (clobber (match_scratch:SI 4 "=X,r,r"))] + (clobber (match_scratch:SI 4 "=X,r,&r"))] "" "* return pa_output_dbra (operands, insn, which_alternative); " ;; Do not expect to understand this the first time through. @@ -10484,13 +10470,13 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" (define_insn "atomic_storedi_1" [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r")) (match_operand:DI 1 "reg_or_0_operand" "M,r")) - (clobber (match_scratch:DI 2 "=X,f"))] + (clobber (match_scratch:DI 2 "=f,f"))] "!TARGET_64BIT && !TARGET_SOFT_FLOAT" "@ - {fstds|fstd} %%fr0,0(%0) + fcpy,dbl %%fr0,%2\n\t{fstds|fstd} %2,0(%0) {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)" [(set_attr "type" "move,move") - (set_attr "length" "4,16")]) + (set_attr "length" "8,16")]) ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so ;; we need memory barriers to enforce program order for memory references diff --git a/gcc/config/pru/pru.h b/gcc/config/pru/pru.h index 8498859de5382..fa0343f79c7ff 100644 --- a/gcc/config/pru/pru.h +++ b/gcc/config/pru/pru.h @@ -566,8 +566,9 @@ do { \ #define CASE_VECTOR_MODE Pmode -/* See definition of clz pattern for rationale of value -1. */ -#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 2) +/* See definition of clz pattern for rationale of the value. */ +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ + ((VALUE) = GET_MODE_BITSIZE (MODE) - 1 - 32, 2) /* Jumps are cheap on PRU. */ #define LOGICAL_OP_NON_SHORT_CIRCUIT 0 diff --git a/gcc/config/pru/pru.md b/gcc/config/pru/pru.md index 68dcab234b09d..69a275fa3101e 100644 --- a/gcc/config/pru/pru.md +++ b/gcc/config/pru/pru.md @@ -1127,8 +1127,16 @@ [(set_attr "type" "control")]) ;; Count Leading Zeros implemented using LMBD. -;; LMBD returns 32 if bit value is not present, and we subtract 31 to get CLZ. -;; Hence we get a defined value -1 for CLZ_DEFINED_VALUE_AT_ZERO. +;; +;; LMBD returns 32 if bit value is not present, for any kind of input MODE. +;; The LMBD's search result for a "1" bit is subtracted from the +;; mode bit size minus one, in order to get CLZ. +;; +;; Hence for SImode we get a defined value -1 for CLZ_DEFINED_VALUE_AT_ZERO. +;; +;; The QImode and HImode defined values for zero inputs end up to be +;; non-standard (-25 and -17). But this is considered acceptable in +;; order to keep the CLZ expansion to only two instructions. (define_expand "clz2" [(set (match_operand:QISI 0 "register_operand") (clz:QISI (match_operand:QISI 1 "register_operand")))] @@ -1139,7 +1147,8 @@ rtx tmpval = gen_reg_rtx (mode); emit_insn (gen_pru_lmbd (mode, tmpval, src, const1_rtx)); - emit_insn (gen_sub3_insn (dst, GEN_INT (31), tmpval)); + int msb_bitn = GET_MODE_BITSIZE (mode) - 1; + emit_insn (gen_sub3_insn (dst, GEN_INT (msb_bitn), tmpval)); DONE; }) diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize index f36a2ca4593b4..8b66687cc44fd 100755 --- a/gcc/config/riscv/arch-canonicalize +++ b/gcc/config/riscv/arch-canonicalize @@ -70,9 +70,11 @@ def arch_canonicalize(arch, isa_spec): is_isa_spec_2p2 = isa_spec == '2.2' new_arch = "" extra_long_ext = [] + std_exts = [] if arch[:5] in ['rv32e', 'rv32i', 'rv32g', 'rv64i', 'rv64g']: - new_arch = arch[:5].replace("g", "imafd") + new_arch = arch[:5].replace("g", "i") if arch[:5] in ['rv32g', 'rv64g']: + std_exts = ['m', 'a', 'f', 'd'] if not is_isa_spec_2p2: extra_long_ext = ['zicsr', 'zifencei'] else: @@ -86,10 +88,10 @@ def arch_canonicalize(arch, isa_spec): if long_ext_prefixes_idx: first_long_ext_idx = min(long_ext_prefixes_idx) long_exts = arch[first_long_ext_idx:].split("_") - std_exts = list(arch[5:first_long_ext_idx]) + std_exts += list(arch[5:first_long_ext_idx]) else: long_exts = [] - std_exts = list(arch[5:]) + std_exts += list(arch[5:]) long_exts += extra_long_ext diff --git a/gcc/config/riscv/riscv-d.cc b/gcc/config/riscv/riscv-d.cc index 729de96d39854..a762a35778daf 100644 --- a/gcc/config/riscv/riscv-d.cc +++ b/gcc/config/riscv/riscv-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "target.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/riscv/riscv-d.h b/gcc/config/riscv/riscv-d.h new file mode 100644 index 0000000000000..21a989edd8c36 --- /dev/null +++ b/gcc/config/riscv/riscv-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the RISC-V architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Routines implemented in riscv-d.cc */ +extern void riscv_d_target_versions (void); +extern void riscv_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS riscv_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO riscv_d_register_target_info diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 20c2381c21aa0..65bb85f5587c2 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -78,10 +78,6 @@ extern bool riscv_gpr_save_operation_p (rtx); /* Routines implemented in riscv-c.cc. */ void riscv_cpu_cpp_builtins (cpp_reader *); -/* Routines implemented in riscv-d.cc */ -extern void riscv_d_target_versions (void); -extern void riscv_d_register_target_info (void); - /* Routines implemented in riscv-builtins.cc. */ extern void riscv_atomic_assign_expand_fenv (tree *, tree *, tree *); extern rtx riscv_expand_builtin (tree, rtx, rtx, machine_mode, int); diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index ee756aab69403..dddd72aa23785 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -220,6 +220,7 @@ struct riscv_tune_param unsigned short issue_rate; unsigned short branch_cost; unsigned short memory_cost; + unsigned short fmv_cost; bool slow_unaligned_access; }; @@ -285,6 +286,7 @@ static const struct riscv_tune_param rocket_tune_info = { 1, /* issue_rate */ 3, /* branch_cost */ 5, /* memory_cost */ + 8, /* fmv_cost */ true, /* slow_unaligned_access */ }; @@ -298,6 +300,7 @@ static const struct riscv_tune_param sifive_7_tune_info = { 2, /* issue_rate */ 4, /* branch_cost */ 3, /* memory_cost */ + 8, /* fmv_cost */ true, /* slow_unaligned_access */ }; @@ -311,6 +314,7 @@ static const struct riscv_tune_param thead_c906_tune_info = { 1, /* issue_rate */ 3, /* branch_cost */ 5, /* memory_cost */ + 8, /* fmv_cost */ false, /* slow_unaligned_access */ }; @@ -324,6 +328,7 @@ static const struct riscv_tune_param optimize_size_tune_info = { 1, /* issue_rate */ 1, /* branch_cost */ 2, /* memory_cost */ + 8, /* fmv_cost */ false, /* slow_unaligned_access */ }; @@ -415,6 +420,15 @@ riscv_build_integer_1 (struct riscv_integer_op codes[RISCV_MAX_INTEGER_OPS], /* Simply BSETI. */ codes[0].code = UNKNOWN; codes[0].value = value; + + /* RISC-V sign-extends all 32bit values that live in a 32bit + register. To avoid paradoxes, we thus need to use the + sign-extended (negative) representation (-1 << 31) for the + value, if we want to build (1 << 31) in SImode. This will + then expand to an LUI instruction. */ + if (mode == SImode && value == (HOST_WIDE_INT_1U << 31)) + codes[0].value = (HOST_WIDE_INT_M1U << 31); + return 1; } @@ -4737,6 +4751,10 @@ static int riscv_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { + if ((from == FP_REGS && to == GR_REGS) || + (from == GR_REGS && to == FP_REGS)) + return tune_param->fmv_cost; + return riscv_secondary_memory_needed (mode, from, to) ? 8 : 2; } @@ -5582,9 +5600,8 @@ riscv_asan_shadow_offset (void) /* We only have libsanitizer support for RV64 at present. This number must match kRiscv*_ShadowOffset* in the file - libsanitizer/asan/asan_mapping.h which is currently 1<<29 for rv64, - even though 1<<36 makes more sense. */ - return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0; + libsanitizer/asan/asan_mapping.h. */ + return TARGET_64BIT ? HOST_WIDE_INT_UC (0xd55550000) : 0; } /* Initialize the GCC target structure. */ diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 8a4d2cf7f85a8..b30b4576c0952 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -27,10 +27,6 @@ along with GCC; see the file COPYING3. If not see /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() riscv_cpu_cpp_builtins (pfile) -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS riscv_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO riscv_d_register_target_info - #ifdef TARGET_BIG_ENDIAN_DEFAULT #define DEFAULT_ENDIAN_SPEC "b" #else @@ -528,13 +524,10 @@ enum reg_class (((VALUE) | ((1UL<<31) - IMM_REACH)) == ((1UL<<31) - IMM_REACH) \ || ((VALUE) | ((1UL<<31) - IMM_REACH)) + IMM_REACH == 0) -/* If this is a single bit mask, then we can load it with bseti. But this - is not useful for any of the low 31 bits because we can use addi or lui - to load them. It is wrong for loading SImode 0x80000000 on rv64 because it - needs to be sign-extended. So we restrict this to the upper 32-bits - only. */ -#define SINGLE_BIT_MASK_OPERAND(VALUE) \ - (pow2p_hwi (VALUE) && (ctz_hwi (VALUE) >= 32)) +/* If this is a single bit mask, then we can load it with bseti. Special + handling of SImode 0x80000000 on RV64 is done in riscv_build_integer_1. */ +#define SINGLE_BIT_MASK_OPERAND(VALUE) \ + (pow2p_hwi (VALUE)) /* Stack layout; function entry, exit and calling. */ @@ -1004,4 +997,9 @@ extern void riscv_remove_unneeded_save_restore_calls (void); #define HARD_REGNO_RENAME_OK(FROM, TO) riscv_hard_regno_rename_ok (FROM, TO) +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ + ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2) +#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ + ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2) + #endif /* ! GCC_RISCV_H */ diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index b3c5bce842a41..c6399b1389ed1 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2821,7 +2821,7 @@ UNSPEC_SSP_SET)) (set (match_scratch:GPR 2 "=&r") (const_int 0))] "" - "\\t%2, %1\;\\t%2, %0\;li\t%2, 0" + "\t%2, %1\;\t%2, %0\;li\t%2, 0" [(set_attr "length" "12")]) (define_expand "stack_protect_test" diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 86b41e6b00a93..9a9cb8be69a65 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -129,6 +129,15 @@ (match_operand:SI 7 "const_int_operand" "")] ;; mod_f "TARGET_ATOMIC" { + if (word_mode != mode && operands[3] != const0_rtx) + { + /* We don't have SI mode compare on RV64, so we need to make sure expected + value is sign-extended. */ + rtx tmp0 = gen_reg_rtx (word_mode); + emit_insn (gen_extend_insn (tmp0, operands[3], word_mode, mode, 0)); + operands[3] = simplify_gen_subreg (mode, tmp0, word_mode, 0); + } + emit_insn (gen_atomic_cas_value_strong (operands[1], operands[2], operands[3], operands[4], operands[6], operands[7])); diff --git a/gcc/config/riscv/t-rtems b/gcc/config/riscv/t-rtems index 41f5927fc87b1..19b120308958b 100644 --- a/gcc/config/riscv/t-rtems +++ b/gcc/config/riscv/t-rtems @@ -1,8 +1,8 @@ MULTILIB_OPTIONS = MULTILIB_DIRNAMES = -MULTILIB_OPTIONS += march=rv32i/march=rv32im/march=rv32imafd/march=rv32iac/march=rv32imac/march=rv32imafc/march=rv64imafd/march=rv64imac/march=rv64imafdc -MULTILIB_DIRNAMES += rv32i rv32im rv32imafd rv32iac rv32imac rv32imafc rv64imafd rv64imac rv64imafdc +MULTILIB_OPTIONS += march=rv32i/march=rv32iac/march=rv32im/march=rv32ima/march=rv32imac/march=rv32imaf/march=rv32imafc/march=rv32imafd/march=rv32imafdc/march=rv64ima/march=rv64imac/march=rv64imafd/march=rv64imafdc +MULTILIB_DIRNAMES += rv32i rv32iac rv32im rv32ima rv32imac rv32imaf rv32imafc rv32imafd rv32imafdc rv64ima rv64imac rv64imafd rv64imafdc MULTILIB_OPTIONS += mabi=ilp32/mabi=ilp32f/mabi=ilp32d/mabi=lp64/mabi=lp64d MULTILIB_DIRNAMES += ilp32 ilp32f ilp32d lp64 lp64d @@ -12,14 +12,15 @@ MULTILIB_DIRNAMES += medany MULTILIB_REQUIRED = MULTILIB_REQUIRED += march=rv32i/mabi=ilp32 -MULTILIB_REQUIRED += march=rv32im/mabi=ilp32 -MULTILIB_REQUIRED += march=rv32imafd/mabi=ilp32d MULTILIB_REQUIRED += march=rv32iac/mabi=ilp32 +MULTILIB_REQUIRED += march=rv32im/mabi=ilp32 +MULTILIB_REQUIRED += march=rv32ima/mabi=ilp32 MULTILIB_REQUIRED += march=rv32imac/mabi=ilp32 +MULTILIB_REQUIRED += march=rv32imaf/mabi=ilp32f MULTILIB_REQUIRED += march=rv32imafc/mabi=ilp32f -MULTILIB_REQUIRED += march=rv64imafd/mabi=lp64d -MULTILIB_REQUIRED += march=rv64imafd/mabi=lp64d/mcmodel=medany -MULTILIB_REQUIRED += march=rv64imac/mabi=lp64 +MULTILIB_REQUIRED += march=rv32imafd/mabi=ilp32d +MULTILIB_REQUIRED += march=rv32imafdc/mabi=ilp32d +MULTILIB_REQUIRED += march=rv64ima/mabi=lp64/mcmodel=medany MULTILIB_REQUIRED += march=rv64imac/mabi=lp64/mcmodel=medany -MULTILIB_REQUIRED += march=rv64imafdc/mabi=lp64d +MULTILIB_REQUIRED += march=rv64imafd/mabi=lp64d/mcmodel=medany MULTILIB_REQUIRED += march=rv64imafdc/mabi=lp64d/mcmodel=medany diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index efc8ae35c2e78..50689e418ede7 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -385,14 +385,22 @@ (define_insn_and_split "sldoi_to_mov" [(set (match_operand:VM 0 "altivec_register_operand") - (unspec:VM [(match_operand:VM 1 "easy_vector_constant") + (unspec:VM [(match_operand:VM 1 "const_vector_each_byte_same") (match_dup 1) (match_operand:QI 2 "u5bit_cint_operand")] UNSPEC_VSLDOI))] - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()" + "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()" "#" "&& 1" - [(set (match_dup 0) (match_dup 1))]) + [(set (match_dup 0) (match_dup 1))] + "{ + if (!easy_vector_constant (operands[1], mode)) + { + rtx dest = gen_reg_rtx (mode); + emit_move_insn (dest, operands[1]); + operands[1] = dest; + } + }") (define_insn "get_vrsave_internal" [(set (match_operand:SI 0 "register_operand" "=r") @@ -1144,15 +1152,16 @@ (use (match_operand:V16QI 2 "register_operand"))] "TARGET_ALTIVEC" { - rtx (*fun) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN ? gen_altivec_vmrghb_direct - : gen_altivec_vmrglb_direct; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn ( + gen_altivec_vmrghb_direct_be (operands[0], operands[1], operands[2])); + else + emit_insn ( + gen_altivec_vmrglb_direct_le (operands[0], operands[2], operands[1])); DONE; }) -(define_insn "altivec_vmrghb_direct" +(define_insn "altivec_vmrghb_direct_be" [(set (match_operand:V16QI 0 "register_operand" "=v") (vec_select:V16QI (vec_concat:V32QI @@ -1166,7 +1175,25 @@ (const_int 5) (const_int 21) (const_int 6) (const_int 22) (const_int 7) (const_int 23)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "vmrghb %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrghb_direct_le" + [(set (match_operand:V16QI 0 "register_operand" "=v") + (vec_select:V16QI + (vec_concat:V32QI + (match_operand:V16QI 2 "register_operand" "v") + (match_operand:V16QI 1 "register_operand" "v")) + (parallel [(const_int 8) (const_int 24) + (const_int 9) (const_int 25) + (const_int 10) (const_int 26) + (const_int 11) (const_int 27) + (const_int 12) (const_int 28) + (const_int 13) (const_int 29) + (const_int 14) (const_int 30) + (const_int 15) (const_int 31)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "vmrghb %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -1176,17 +1203,18 @@ (use (match_operand:V8HI 2 "register_operand"))] "TARGET_ALTIVEC" { - rtx (*fun) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN ? gen_altivec_vmrghh_direct - : gen_altivec_vmrglh_direct; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn ( + gen_altivec_vmrghh_direct_be (operands[0], operands[1], operands[2])); + else + emit_insn ( + gen_altivec_vmrglh_direct_le (operands[0], operands[2], operands[1])); DONE; }) -(define_insn "altivec_vmrghh_direct" +(define_insn "altivec_vmrghh_direct_be" [(set (match_operand:V8HI 0 "register_operand" "=v") - (vec_select:V8HI + (vec_select:V8HI (vec_concat:V16HI (match_operand:V8HI 1 "register_operand" "v") (match_operand:V8HI 2 "register_operand" "v")) @@ -1194,7 +1222,21 @@ (const_int 1) (const_int 9) (const_int 2) (const_int 10) (const_int 3) (const_int 11)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "vmrghh %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrghh_direct_le" + [(set (match_operand:V8HI 0 "register_operand" "=v") + (vec_select:V8HI + (vec_concat:V16HI + (match_operand:V8HI 2 "register_operand" "v") + (match_operand:V8HI 1 "register_operand" "v")) + (parallel [(const_int 4) (const_int 12) + (const_int 5) (const_int 13) + (const_int 6) (const_int 14) + (const_int 7) (const_int 15)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "vmrghh %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -1204,16 +1246,18 @@ (use (match_operand:V4SI 2 "register_operand"))] "VECTOR_MEM_ALTIVEC_P (V4SImode)" { - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrghw_direct_v4si - : gen_altivec_vmrglw_direct_v4si; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn (gen_altivec_vmrghw_direct_v4si_be (operands[0], + operands[1], + operands[2])); + else + emit_insn (gen_altivec_vmrglw_direct_v4si_le (operands[0], + operands[2], + operands[1])); DONE; }) -(define_insn "altivec_vmrghw_direct_" +(define_insn "altivec_vmrghw_direct__be" [(set (match_operand:VSX_W 0 "register_operand" "=wa,v") (vec_select:VSX_W (vec_concat: @@ -1221,7 +1265,21 @@ (match_operand:VSX_W 2 "register_operand" "wa,v")) (parallel [(const_int 0) (const_int 4) (const_int 1) (const_int 5)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "@ + xxmrghw %x0,%x1,%x2 + vmrghw %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrghw_direct__le" + [(set (match_operand:VSX_W 0 "register_operand" "=wa,v") + (vec_select:VSX_W + (vec_concat: + (match_operand:VSX_W 2 "register_operand" "wa,v") + (match_operand:VSX_W 1 "register_operand" "wa,v")) + (parallel [(const_int 2) (const_int 6) + (const_int 3) (const_int 7)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "@ xxmrghw %x0,%x1,%x2 vmrghw %0,%1,%2" @@ -1250,15 +1308,16 @@ (use (match_operand:V16QI 2 "register_operand"))] "TARGET_ALTIVEC" { - rtx (*fun) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN ? gen_altivec_vmrglb_direct - : gen_altivec_vmrghb_direct; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn ( + gen_altivec_vmrglb_direct_be (operands[0], operands[1], operands[2])); + else + emit_insn ( + gen_altivec_vmrghb_direct_le (operands[0], operands[2], operands[1])); DONE; }) -(define_insn "altivec_vmrglb_direct" +(define_insn "altivec_vmrglb_direct_be" [(set (match_operand:V16QI 0 "register_operand" "=v") (vec_select:V16QI (vec_concat:V32QI @@ -1272,7 +1331,25 @@ (const_int 13) (const_int 29) (const_int 14) (const_int 30) (const_int 15) (const_int 31)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "vmrglb %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrglb_direct_le" + [(set (match_operand:V16QI 0 "register_operand" "=v") + (vec_select:V16QI + (vec_concat:V32QI + (match_operand:V16QI 2 "register_operand" "v") + (match_operand:V16QI 1 "register_operand" "v")) + (parallel [(const_int 0) (const_int 16) + (const_int 1) (const_int 17) + (const_int 2) (const_int 18) + (const_int 3) (const_int 19) + (const_int 4) (const_int 20) + (const_int 5) (const_int 21) + (const_int 6) (const_int 22) + (const_int 7) (const_int 23)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "vmrglb %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -1282,15 +1359,16 @@ (use (match_operand:V8HI 2 "register_operand"))] "TARGET_ALTIVEC" { - rtx (*fun) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN ? gen_altivec_vmrglh_direct - : gen_altivec_vmrghh_direct; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn ( + gen_altivec_vmrglh_direct_be (operands[0], operands[1], operands[2])); + else + emit_insn ( + gen_altivec_vmrghh_direct_le (operands[0], operands[2], operands[1])); DONE; }) -(define_insn "altivec_vmrglh_direct" +(define_insn "altivec_vmrglh_direct_be" [(set (match_operand:V8HI 0 "register_operand" "=v") (vec_select:V8HI (vec_concat:V16HI @@ -1300,7 +1378,21 @@ (const_int 5) (const_int 13) (const_int 6) (const_int 14) (const_int 7) (const_int 15)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "vmrglh %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrglh_direct_le" + [(set (match_operand:V8HI 0 "register_operand" "=v") + (vec_select:V8HI + (vec_concat:V16HI + (match_operand:V8HI 2 "register_operand" "v") + (match_operand:V8HI 1 "register_operand" "v")) + (parallel [(const_int 0) (const_int 8) + (const_int 1) (const_int 9) + (const_int 2) (const_int 10) + (const_int 3) (const_int 11)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "vmrglh %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -1310,16 +1402,18 @@ (use (match_operand:V4SI 2 "register_operand"))] "VECTOR_MEM_ALTIVEC_P (V4SImode)" { - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrglw_direct_v4si - : gen_altivec_vmrghw_direct_v4si; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn (gen_altivec_vmrglw_direct_v4si_be (operands[0], + operands[1], + operands[2])); + else + emit_insn (gen_altivec_vmrghw_direct_v4si_le (operands[0], + operands[2], + operands[1])); DONE; }) -(define_insn "altivec_vmrglw_direct_" +(define_insn "altivec_vmrglw_direct__be" [(set (match_operand:VSX_W 0 "register_operand" "=wa,v") (vec_select:VSX_W (vec_concat: @@ -1327,7 +1421,21 @@ (match_operand:VSX_W 2 "register_operand" "wa,v")) (parallel [(const_int 2) (const_int 6) (const_int 3) (const_int 7)])))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC && BYTES_BIG_ENDIAN" + "@ + xxmrglw %x0,%x1,%x2 + vmrglw %0,%1,%2" + [(set_attr "type" "vecperm")]) + +(define_insn "altivec_vmrglw_direct__le" + [(set (match_operand:VSX_W 0 "register_operand" "=wa,v") + (vec_select:VSX_W + (vec_concat: + (match_operand:VSX_W 2 "register_operand" "wa,v") + (match_operand:VSX_W 1 "register_operand" "wa,v")) + (parallel [(const_int 0) (const_int 4) + (const_int 1) (const_int 5)])))] + "TARGET_ALTIVEC && !BYTES_BIG_ENDIAN" "@ xxmrglw %x0,%x1,%x2 vmrglw %0,%1,%2" @@ -3699,13 +3807,13 @@ { emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrghh (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrglh (operands[0], ve, vo)); } DONE; }) @@ -3724,13 +3832,13 @@ { emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrglh (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrghh (operands[0], ve, vo)); } DONE; }) @@ -3749,13 +3857,13 @@ { emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrghh (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrglh (operands[0], ve, vo)); } DONE; }) @@ -3774,13 +3882,13 @@ { emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrglh (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrghh (operands[0], ve, vo)); } DONE; }) @@ -3799,13 +3907,13 @@ { emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghw_direct_v4si (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrghw (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghw_direct_v4si (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrglw (operands[0], ve, vo)); } DONE; }) @@ -3824,13 +3932,13 @@ { emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglw_direct_v4si (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrglw (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglw_direct_v4si (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrghw (operands[0], ve, vo)); } DONE; }) @@ -3849,13 +3957,13 @@ { emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghw_direct_v4si (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrghw (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrghw_direct_v4si (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrglw (operands[0], ve, vo)); } DONE; }) @@ -3874,13 +3982,13 @@ { emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglw_direct_v4si (operands[0], ve, vo)); + emit_insn (gen_altivec_vmrglw (operands[0], ve, vo)); } else { emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2])); emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2])); - emit_insn (gen_altivec_vmrglw_direct_v4si (operands[0], vo, ve)); + emit_insn (gen_altivec_vmrghw (operands[0], ve, vo)); } DONE; }) @@ -4195,9 +4303,11 @@ [(set_attr "type" "vecsimple")]) ;; Vector parity -(define_insn "*p9v_parity2" - [(set (match_operand:VParity 0 "register_operand" "=v") - (parity:VParity (match_operand:VParity 1 "register_operand" "v")))] +(define_insn "rs6000_vprtyb2" + [(set (match_operand:VEC_IP 0 "register_operand" "=v") + (unspec:VEC_IP + [(match_operand:VEC_IP 1 "register_operand" "v")] + UNSPEC_PARITY))] "TARGET_P9_VECTOR" "vprtyb %0,%1" [(set_attr "type" "vecsimple")]) diff --git a/gcc/config/rs6000/amo.h b/gcc/config/rs6000/amo.h index ea4668e0547fe..47d19ee181c2c 100644 --- a/gcc/config/rs6000/amo.h +++ b/gcc/config/rs6000/amo.h @@ -46,7 +46,7 @@ enum _AMO_LD { _AMO_LD_CS_NE = 0x10, /* Compare and Swap Not Equal. */ _AMO_LD_INC_BOUNDED = 0x18, /* Fetch and Increment Bounded. */ _AMO_LD_INC_EQUAL = 0x19, /* Fetch and Increment Equal. */ - _AMO_LD_DEC_BOUNDED = 0x1A /* Fetch and Decrement Bounded. */ + _AMO_LD_DEC_BOUNDED = 0x1C /* Fetch and Decrement Bounded. */ }; /* Implementation of the simple LWAT/LDAT operations that take one register and diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h index b5cef42610f76..626b40dab29d4 100644 --- a/gcc/config/rs6000/darwin.h +++ b/gcc/config/rs6000/darwin.h @@ -98,7 +98,7 @@ Include libmx when targeting Darwin 7.0 and above, but before libSystem, since the functions are actually in libSystem but for 7.x compatibility we want them to be looked for in libmx first. - Include libSystemStubs when compiling against 10.3 - 10.5 SDKs (we assume + Include libSystemStubs when compiling against 10.3 - 10.6 SDKs (we assume this is the case when targetting these) - but not for 64-bit long double. Don't do either for m64, the library is either a dummy or non-existent. */ @@ -107,8 +107,8 @@ #define LIB_SPEC \ "%{!static: \ %{!m64:%{!mlong-double-64: \ - %{pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs_profile)} \ - %{!pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs)} \ + %{pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs_profile)} \ + %{!pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs)} \ %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}} \ -lSystem \ }" diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index 15f0c16f7053f..4067ee762155d 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -22,7 +22,7 @@ ;; load mode is DI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -43,7 +43,7 @@ ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") + (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -64,7 +64,7 @@ ;; load mode is DI result mode is DI compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -85,7 +85,7 @@ ;; load mode is DI result mode is DI compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") + (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -104,17 +104,17 @@ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ;; load mode is SI result mode is clobber compare mode is CC extend is none -(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" +(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION)" - "lwa%X1 %0,%1\;cmpdi %2,%0,%3" + "lwz%X1 %0,%1\;cmpwi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), - SImode, NON_PREFIXED_DS))" + SImode, NON_PREFIXED_D))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) (compare:CC (match_dup 0) (match_dup 3)))] @@ -146,17 +146,17 @@ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ;; load mode is SI result mode is SI compare mode is CC extend is none -(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" +(define_insn_and_split "*lwz_cmpwi_cr0_SI_SI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" - "lwa%X1 %0,%1\;cmpdi %2,%0,%3" + "lwz%X1 %0,%1\;cmpwi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), - SImode, NON_PREFIXED_DS))" + SImode, NON_PREFIXED_D))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) (compare:CC (match_dup 0) (match_dup 3)))] @@ -190,7 +190,7 @@ ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION)" @@ -205,6 +205,7 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") + (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index 81cc2255f5334..d0517970ace4a 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -53,92 +53,136 @@ sub mode_to_ldst_char return '?'; } +sub gen_ld_cmpi_p10_one +{ + my ($lmode, $result, $ccmode) = @_; + + my $np = "NON_PREFIXED_D"; + my $mempred = "non_update_memory_operand"; + my $extend; + + # We need to special case lwa. The prefixed_load_p function in rs6000.cc + # (which determines if a load instruction is prefixed) uses the fact that the + # register mode is different from the memory mode, and that the sign_extend + # attribute is set to use DS-form rules for the address instead of D-form. + # If the register size is the same, prefixed_load_p assumes we are doing a + # lwz. We change to use an lwz and word compare if we don't need to sign + # extend the SImode value. Otherwise if we need the value, we need to + # make sure the insn is marked as ds-form. + my $cmp_size_char = ($lmode eq "SI" + && $ccmode eq "CC" + && $result !~ /^EXT|^DI$/) ? "w" : "d"; + + if ($ccmode eq "CC") { + # ld and lwa are both DS-FORM. + ($lmode eq "DI") and $np = "NON_PREFIXED_DS"; + ($lmode eq "SI" && $cmp_size_char eq "d") and $np = "NON_PREFIXED_DS"; + } else { + if ($lmode eq "DI") { + # ld is DS-form, but lwz is not. + $np = "NON_PREFIXED_DS"; + } + } + + my $cmpl = ($ccmode eq "CC") ? "" : "l"; + my $echr = ($ccmode eq "CC" && $cmp_size_char eq "d") ? "a" : "z"; + if ($lmode eq "DI") { $echr = ""; } + my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand" + : "const_0_to_1_operand"; + + # For clobber, we need a SI/DI reg in case we + # split because we have to sign/zero extend. + my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode; + if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") { + # We always need extension if result > lmode. + $extend = ($ccmode eq "CC") ? "sign" : "zero"; + } else { + # Result of SI/DI does not need sign extension. + $extend = "none"; + } + + my $ldst = mode_to_ldst_char($lmode); + + # DS-form addresses need YZ, and not m. + my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m"; + print < lmode. - if ( $ccmode eq 'CC' ) { - $extend = "sign"; - } else { - $extend = "zero"; - } - } else { - # Result of SI/DI does not need sign extension. - $extend = "none"; - } - print ";; load-cmpi fusion pattern generated by gen_ld_cmpi_p10\n"; - print ";; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend\n"; - - print "(define_insn_and_split \"*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}\"\n"; - print " [(set (match_operand:${ccmode} 2 \"cc_reg_operand\" \"=x\")\n"; - print " (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"m\")\n"; - if ($ccmode eq 'CCUNS') { print " "; } - print " (match_operand:${lmode} 3 \"${constpred}\" \"n\")))\n"; - if ($result eq 'clobber') { - print " (clobber (match_scratch:${clobbermode} 0 \"=r\"))]\n"; - } elsif ($result eq $lmode) { - print " (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (match_dup 1))]\n"; - } else { - print " (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (${extend}_extend:${result} (match_dup 1)))]\n"; - } - print " \"(TARGET_P10_FUSION)\"\n"; - print " \"l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3\"\n"; - print " \"&& reload_completed\n"; - print " && (cc_reg_not_cr0_operand (operands[2], CCmode)\n"; - print " || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),\n"; - print " ${lmode}mode, ${np}))\"\n"; - - if ($extend eq "none") { - print " [(set (match_dup 0) (match_dup 1))\n"; - } else { - $resultmode = $result; - if ( $result eq 'clobber' ) { $resultmode = $clobbermode } - print " [(set (match_dup 0) (${extend}_extend:${resultmode} (match_dup 1)))\n"; - } - print " (set (match_dup 2)\n"; - print " (compare:${ccmode} (match_dup 0) (match_dup 3)))]\n"; - print " \"\"\n"; - print " [(set_attr \"type\" \"fused_load_cmpi\")\n"; - print " (set_attr \"cost\" \"8\")\n"; - print " (set_attr \"length\" \"8\")])\n"; - print "\n"; + foreach my $lmode (qw/DI SI HI QI/) { + foreach my $result ("clobber", $lmode, "EXT$lmode") { + # EXTDI does not exist, and we cannot directly produce HI/QI results. + next if $result =~ /^(QI|HI|EXTDI)$/; + + # Don't allow EXTQI because that would allow HI result which we can't do. + $result = "GPR" if $result eq "EXTQI"; + + foreach my $ccmode (qw/CC CCUNS/) { + # We do not have signed single-byte loads. + next if ($lmode eq "QI" and $ccmode eq "CC"); + + gen_ld_cmpi_p10_one($lmode, $result, $ccmode); } } } diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md index 907c9d6d516fd..d580ffa0e1c98 100644 --- a/gcc/config/rs6000/mma.md +++ b/gcc/config/rs6000/mma.md @@ -268,15 +268,33 @@ (define_expand "movoo" [(set (match_operand:OO 0 "nonimmediate_operand") (match_operand:OO 1 "input_operand"))] - "TARGET_MMA" + "" { - rs6000_emit_move (operands[0], operands[1], OOmode); - DONE; + if (TARGET_MMA) + { + rs6000_emit_move (operands[0], operands[1], OOmode); + DONE; + } + else if (currently_expanding_to_rtl && seen_error ()) + { + /* PR103353 shows we may want to continue to expand the __builtin_vsx_lxvp + built-in function, even if we have already emitted error messages about + some missing required conditions. As shown in that PR, without one + explicit mov optab on OOmode provided, it would call emit_move_insn + recursively. So we allow this pattern to be generated when we are + expanding to RTL and have seen errors. It would not cause further ICEs + as the compilation would stop soon after expanding. */ + } + else if (rs6000_opaque_type_invalid_use_p (currently_expanding_gimple_stmt)) + ; + else + /* Catch unexpected cases. */ + gcc_assert (false); }) (define_insn_and_split "*movoo" - [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,m,wa") - (match_operand:OO 1 "input_operand" "m,wa,wa"))] + [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa") + (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))] "TARGET_MMA && (gpc_reg_operand (operands[0], OOmode) || gpc_reg_operand (operands[1], OOmode))" @@ -300,15 +318,30 @@ (define_expand "movxo" [(set (match_operand:XO 0 "nonimmediate_operand") (match_operand:XO 1 "input_operand"))] - "TARGET_MMA" + "" { - rs6000_emit_move (operands[0], operands[1], XOmode); - DONE; + if (TARGET_MMA) + { + rs6000_emit_move (operands[0], operands[1], XOmode); + DONE; + } + else if (currently_expanding_to_rtl && seen_error ()) + { + /* PR103353 shows we may want to continue to expand the __builtin_vsx_lxvp + built-in function, even if we have already emitted error messages about + some missing required conditions. So do the same handlings for XOmode + as OOmode here. */ + } + else if (rs6000_opaque_type_invalid_use_p (currently_expanding_gimple_stmt)) + ; + else + /* Catch unexpected cases. */ + gcc_assert (false); }) (define_insn_and_split "*movxo" - [(set (match_operand:XO 0 "nonimmediate_operand" "=d,m,d") - (match_operand:XO 1 "input_operand" "m,d,d"))] + [(set (match_operand:XO 0 "nonimmediate_operand" "=d,ZwO,d") + (match_operand:XO 1 "input_operand" "ZwO,d,d"))] "TARGET_MMA && (gpc_reg_operand (operands[0], XOmode) || gpc_reg_operand (operands[1], XOmode))" @@ -490,50 +523,50 @@ [(set_attr "type" "mma")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")] MMA_VV))] "TARGET_MMA" " %A0,%x1,%x2" [(set_attr "type" "mma")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")] MMA_AVV))] "TARGET_MMA" " %A0,%x2,%x3" [(set_attr "type" "mma")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:OO 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")] MMA_PV))] "TARGET_MMA" " %A0,%x1,%x2" [(set_attr "type" "mma")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:OO 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:OO 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")] MMA_APV))] "TARGET_MMA" " %A0,%x2,%x3" [(set_attr "type" "mma")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:SI 3 "const_0_to_15_operand" "n") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "u8bit_cint_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:SI 3 "const_0_to_15_operand" "n,n") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "u8bit_cint_operand" "n,n")] MMA_VVI4I4I8))] "TARGET_MMA" " %A0,%x1,%x2,%3,%4,%5" @@ -541,13 +574,13 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_15_operand" "n") - (match_operand:SI 6 "u8bit_cint_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_15_operand" "n,n") + (match_operand:SI 6 "u8bit_cint_operand" "n,n")] MMA_AVVI4I4I8))] "TARGET_MMA" " %A0,%x2,%x3,%4,%5,%6" @@ -555,12 +588,12 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:SI 3 "const_0_to_15_operand" "n") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_3_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:SI 3 "const_0_to_15_operand" "n,n") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_3_operand" "n,n")] MMA_VVI4I4I2))] "TARGET_MMA" " %A0,%x1,%x2,%3,%4,%5" @@ -568,13 +601,13 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_15_operand" "n") - (match_operand:SI 6 "const_0_to_3_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_15_operand" "n,n") + (match_operand:SI 6 "const_0_to_3_operand" "n,n")] MMA_AVVI4I4I2))] "TARGET_MMA" " %A0,%x2,%x3,%4,%5,%6" @@ -582,11 +615,11 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:SI 3 "const_0_to_15_operand" "n") - (match_operand:SI 4 "const_0_to_15_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:SI 3 "const_0_to_15_operand" "n,n") + (match_operand:SI 4 "const_0_to_15_operand" "n,n")] MMA_VVI4I4))] "TARGET_MMA" " %A0,%x1,%x2,%3,%4" @@ -594,12 +627,12 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_15_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_15_operand" "n,n")] MMA_AVVI4I4))] "TARGET_MMA" " %A0,%x2,%x3,%4,%5" @@ -607,11 +640,11 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:OO 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:SI 3 "const_0_to_15_operand" "n") - (match_operand:SI 4 "const_0_to_3_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:SI 3 "const_0_to_15_operand" "n,n") + (match_operand:SI 4 "const_0_to_3_operand" "n,n")] MMA_PVI4I2))] "TARGET_MMA" " %A0,%x1,%x2,%3,%4" @@ -619,12 +652,12 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:OO 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_3_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:OO 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_3_operand" "n,n")] MMA_APVI4I2))] "TARGET_MMA" " %A0,%x2,%x3,%4,%5" @@ -632,12 +665,12 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:SI 3 "const_0_to_15_operand" "n") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_15_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:SI 3 "const_0_to_15_operand" "n,n") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_15_operand" "n,n")] MMA_VVI4I4I4))] "TARGET_MMA" " %A0,%x1,%x2,%3,%4,%5" @@ -645,13 +678,13 @@ (set_attr "prefixed" "yes")]) (define_insn "mma_" - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") - (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0") - (match_operand:V16QI 2 "vsx_register_operand" "wa") - (match_operand:V16QI 3 "vsx_register_operand" "wa") - (match_operand:SI 4 "const_0_to_15_operand" "n") - (match_operand:SI 5 "const_0_to_15_operand" "n") - (match_operand:SI 6 "const_0_to_15_operand" "n")] + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") + (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0") + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa") + (match_operand:V16QI 3 "vsx_register_operand" "v,?wa") + (match_operand:SI 4 "const_0_to_15_operand" "n,n") + (match_operand:SI 5 "const_0_to_15_operand" "n,n") + (match_operand:SI 6 "const_0_to_15_operand" "n,n")] MMA_AVVI4I4I4))] "TARGET_MMA" " %A0,%x2,%x3,%4,%5,%6" diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index b1fcc69bb6075..791b71ac94994 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -798,6 +798,43 @@ (and (match_test "easy_altivec_constant (op, mode)") (match_test "vspltis_shifted (op) != 0"))))) +;; Return true if this is a vector constant and each byte in +;; it is the same. +(define_predicate "const_vector_each_byte_same" + (match_code "const_vector") +{ + rtx elt; + if (!const_vec_duplicate_p (op, &elt)) + return false; + + machine_mode emode = GET_MODE_INNER (mode); + unsigned HOST_WIDE_INT eval; + if (CONST_INT_P (elt)) + eval = INTVAL (elt); + else if (CONST_DOUBLE_AS_FLOAT_P (elt)) + { + gcc_assert (emode == SFmode || emode == DFmode); + long l[2]; + real_to_target (l, CONST_DOUBLE_REAL_VALUE (elt), emode); + /* real_to_target puts 32-bit pieces in each long. */ + eval = zext_hwi (l[0], 32); + eval |= zext_hwi (l[1], 32) << 32; + } + else + return false; + + unsigned int esize = GET_MODE_SIZE (emode); + unsigned char byte0 = eval & 0xff; + for (unsigned int i = 1; i < esize; i++) + { + eval >>= BITS_PER_UNIT; + if (byte0 != (eval & 0xff)) + return false; + } + + return true; +}) + ;; Return 1 if operand is a vector int register or is either a vector constant ;; of all 0 bits of a vector constant of all 1 bits. (define_predicate "vector_int_reg_or_same_bit" @@ -876,7 +913,7 @@ (define_predicate "vsx_quad_dform_memory_operand" (match_code "mem") { - if (!TARGET_P9_VECTOR || !MEM_P (op) || GET_MODE_SIZE (mode) != 16) + if (!TARGET_P9_VECTOR) return false; return quad_address_p (XEXP (op, 0), mode, false); @@ -1088,20 +1125,6 @@ return INTVAL (offset) % 4 == 0; }) -;; Return 1 if the operand is a memory operand that has a valid address for -;; a DS-form instruction. I.e. the address has to be either just a register, -;; or register + const where the two low order bits of const are zero. -(define_predicate "ds_form_mem_operand" - (match_code "subreg,mem") -{ - if (!any_memory_operand (op, mode)) - return false; - - rtx addr = XEXP (op, 0); - - return address_to_insn_form (addr, mode, NON_PREFIXED_DS) == INSN_FORM_DS; -}) - ;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF. (define_predicate "symbol_ref_operand" (and (match_code "symbol_ref") diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index e925ba9fad9cc..f01f3aded3628 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -168,7 +168,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) case ENB_P7_64: return TARGET_POPCNTD && TARGET_POWERPC64; case ENB_P8: - return TARGET_DIRECT_MOVE; + return TARGET_POWER8; case ENB_P8V: return TARGET_P8_VECTOR; case ENB_P9: @@ -869,7 +869,7 @@ rs6000_init_builtins (void) continue; if (e == ENB_MMA && !TARGET_MMA) continue; - tree fntype = rs6000_builtin_info[i].fntype; + tree fntype = rs6000_builtin_info_fntype[i]; tree t = TREE_TYPE (fntype); fprintf (stderr, "%s %s (", rs6000_type_string (t), rs6000_builtin_info[i].bifname); @@ -1121,7 +1121,12 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, unsigned nvec = (fncode == RS6000_BIF_DISASSEMBLE_ACC) ? 4 : 2; tree dst_ptr = gimple_call_arg (stmt, 0); tree src_ptr = gimple_call_arg (stmt, 1); - tree src_type = TREE_TYPE (src_ptr); + tree src_type = (fncode == RS6000_BIF_DISASSEMBLE_ACC) + ? build_pointer_type (vector_quad_type_node) + : build_pointer_type (vector_pair_type_node); + if (TREE_TYPE (src_ptr) != src_type) + src_ptr = build1 (NOP_EXPR, src_type, src_ptr); + tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type)); gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq); @@ -1294,6 +1299,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) enum tree_code bcode; gimple *g; + /* For an unresolved overloaded builtin, return early here since there + is no builtin info for it and we are unable to fold it. */ + if (fn_code > RS6000_OVLD_NONE) + return false; + size_t uns_fncode = (size_t) fn_code; enum insn_code icode = rs6000_builtin_info[uns_fncode].icode; const char *fn_name1 = rs6000_builtin_info[uns_fncode].bifname; @@ -1910,7 +1920,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) tree lhs_type = TREE_TYPE (lhs); /* In GIMPLE the type of the MEM_REF specifies the alignment. The required alignment (power) is 4 bytes regardless of data type. */ - tree align_ltype = build_aligned_type (lhs_type, 4); + tree align_ltype = build_aligned_type (lhs_type, 32); /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create the tree using the value from arg0. The resulting type will match the type of arg1. */ @@ -1954,7 +1964,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) tree arg2_type = ptr_type_node; /* In GIMPLE the type of the MEM_REF specifies the alignment. The required alignment (power) is 4 bytes regardless of data type. */ - tree align_stype = build_aligned_type (arg0_type, 4); + tree align_stype = build_aligned_type (arg0_type, 32); /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create the tree using the value from arg1. */ gimple_seq stmts = NULL; @@ -2859,17 +2869,17 @@ lxvrse_expand_builtin (rtx target, insn_code icode, rtx *op, if (icode == CODE_FOR_vsx_lxvrbx) { temp1 = simplify_gen_subreg (V16QImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_qi_v2di (discratch, temp1)); + emit_insn (gen_vsx_sign_extend_v16qi_v2di (discratch, temp1)); } else if (icode == CODE_FOR_vsx_lxvrhx) { temp1 = simplify_gen_subreg (V8HImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_hi_v2di (discratch, temp1)); + emit_insn (gen_vsx_sign_extend_v8hi_v2di (discratch, temp1)); } else if (icode == CODE_FOR_vsx_lxvrwx) { temp1 = simplify_gen_subreg (V4SImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_si_v2di (discratch, temp1)); + emit_insn (gen_vsx_sign_extend_v4si_v2di (discratch, temp1)); } else if (icode == CODE_FOR_vsx_lxvrdx) discratch = simplify_gen_subreg (V2DImode, tiscratch, TImode, 0); @@ -2952,7 +2962,7 @@ stv_expand_builtin (insn_code icode, rtx *op, rtx addr; if (op[1] == const0_rtx) - addr = gen_rtx_MEM (Pmode, op[2]); + addr = gen_rtx_MEM (tmode, op[2]); else { op[1] = copy_to_mode_reg (Pmode, op[1]); @@ -3295,6 +3305,14 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); enum rs6000_gen_builtins fcode = (enum rs6000_gen_builtins) DECL_MD_FUNCTION_CODE (fndecl); + + /* Emit error message if it's an unresolved overloaded builtin. */ + if (fcode > RS6000_OVLD_NONE) + { + error ("unresolved overload for builtin %qF", fndecl); + return const0_rtx; + } + size_t uns_fcode = (size_t)fcode; enum insn_code icode = rs6000_builtin_info[uns_fcode].icode; diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index f4a9f24bcc5c9..d2c0565dc6230 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2008,6 +2008,13 @@ const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>); XXSPLTD_V2DI vsx_xxspltd_v2di {} + const vsq __builtin_pack_vector_int128 (unsigned long long, \ + unsigned long long); + PACK_V1TI packv1ti {} + + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); + UNPACK_V1TI unpackv1ti {} + ; Power7 builtins (ISA 2.06). [power7] @@ -2029,16 +2036,9 @@ const unsigned int __builtin_divweu (unsigned int, unsigned int); DIVWEU diveu_si {} - const vsq __builtin_pack_vector_int128 (unsigned long long, \ - unsigned long long); - PACK_V1TI packv1ti {} - void __builtin_ppc_speculation_barrier (); SPECBARR speculation_barrier {} - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); - UNPACK_V1TI unpackv1ti {} - ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing). [power7-64] @@ -2665,13 +2665,13 @@ VMSUMUDM altivec_vmsumudm {} const vsll __builtin_altivec_vprtybd (vsll); - VPRTYBD parityv2di2 {} + VPRTYBD rs6000_vprtybv2di2 {} const vsq __builtin_altivec_vprtybq (vsq); - VPRTYBQ parityv1ti2 {} + VPRTYBQ rs6000_vprtybv1ti2 {} const vsi __builtin_altivec_vprtybw (vsi); - VPRTYBW parityv4si2 {} + VPRTYBW rs6000_vprtybv4si2 {} const vsll __builtin_altivec_vrldmi (vsll, vsll, vsll); VRLDMI altivec_vrldmi {} @@ -2686,19 +2686,19 @@ VRLWNM altivec_vrlwnm {} const vsll __builtin_altivec_vsignextsb2d (vsc); - VSIGNEXTSB2D vsignextend_qi_v2di {} + VSIGNEXTSB2D vsx_sign_extend_v16qi_v2di {} const vsi __builtin_altivec_vsignextsb2w (vsc); - VSIGNEXTSB2W vsignextend_qi_v4si {} + VSIGNEXTSB2W vsx_sign_extend_v16qi_v4si {} const vsll __builtin_altivec_visgnextsh2d (vss); - VSIGNEXTSH2D vsignextend_hi_v2di {} + VSIGNEXTSH2D vsx_sign_extend_v8hi_v2di {} const vsi __builtin_altivec_vsignextsh2w (vss); - VSIGNEXTSH2W vsignextend_hi_v4si {} + VSIGNEXTSH2W vsx_sign_extend_v8hi_v4si {} const vsll __builtin_altivec_vsignextsw2d (vsi); - VSIGNEXTSW2D vsignextend_si_v2di {} + VSIGNEXTSW2D vsx_sign_extend_v4si_v2di {} const vsc __builtin_altivec_vslv (vsc, vsc); VSLV vslv {} @@ -2796,6 +2796,19 @@ const vsi __builtin_vsx_xxbrw_v4si (vsi); XXBRW_V4SI p9_xxbrw_v4si {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); + VSCEQPEQ xscmpexpqp_eq_kf {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); + VSCEQPGT xscmpexpqp_gt_kf {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); + VSCEQPLT xscmpexpqp_lt_kf {} + + const signed int \ + __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); + VSCEQPUO xscmpexpqp_unordered_kf {} + ; Miscellaneous P9 functions [power9] @@ -2878,19 +2891,6 @@ fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128); MULF128_ODD mulkf3_odd {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); - VSCEQPEQ xscmpexpqp_eq_kf {} - - const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); - VSCEQPGT xscmpexpqp_gt_kf {} - - const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); - VSCEQPLT xscmpexpqp_lt_kf {} - - const signed int \ - __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); - VSCEQPUO xscmpexpqp_unordered_kf {} - fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128); SQRTF128_ODD sqrtkf2_odd {} @@ -3439,7 +3439,7 @@ VRLQNM altivec_vrlqnm {} const vsq __builtin_altivec_vsignext (vsll); - VSIGNEXTSD2Q vsignextend_v2di_v1ti {} + VSIGNEXTSD2Q vsx_sign_extend_v2di_v1ti {} const vsc __builtin_altivec_vsldb_v16qi (vsc, vsc, const int<3>); VSLDB_V16QI vsldb_v16qi {} diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 84bb98f94fb62..6106aa91ede0f 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -432,19 +432,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6"); if ((flags & OPTION_MASK_POPCNTD) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7"); - /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically - turned on in the following condition: - 1. TARGET_P8_VECTOR is enabled and OPTION_MASK_DIRECT_MOVE is not - explicitly disabled. - Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to - have been turned on explicitly. - Note that the OPTION_MASK_DIRECT_MOVE flag is automatically - turned off in any of the following conditions: - 1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly - disabled and OPTION_MASK_DIRECT_MOVE was not explicitly - enabled. - 2. TARGET_VSX is off. */ - if ((flags & OPTION_MASK_DIRECT_MOVE) != 0) + if ((flags & OPTION_MASK_POWER8) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8"); if ((flags & OPTION_MASK_MODULO) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9"); @@ -1675,34 +1663,37 @@ resolve_vec_step (resolution *res, vec *arglist, unsigned nargs) UNSUPPORTED_BUILTIN to true. If we don't match, return error_mark_node and leave UNSUPPORTED_BUILTIN alone. */ -tree -find_instance (bool *unsupported_builtin, ovlddata **instance, +static tree +find_instance (bool *unsupported_builtin, int *instance, rs6000_gen_builtins instance_code, rs6000_gen_builtins fcode, tree *types, tree *args) { - while (*instance && (*instance)->bifid != instance_code) - *instance = (*instance)->next; + while (*instance != -1 + && rs6000_instance_info[*instance].bifid != instance_code) + *instance = rs6000_instance_info[*instance].next; - ovlddata *inst = *instance; - gcc_assert (inst != NULL); + int inst = *instance; + gcc_assert (inst != -1); /* It is possible for an instance to require a data type that isn't - defined on this target, in which case inst->fntype will be NULL. */ - if (!inst->fntype) + defined on this target, in which case rs6000_instance_info_fntype[inst] + will be NULL. */ + if (!rs6000_instance_info_fntype[inst]) return error_mark_node; - tree fntype = rs6000_builtin_info[inst->bifid].fntype; + rs6000_gen_builtins bifid = rs6000_instance_info[inst].bifid; + tree fntype = rs6000_builtin_info_fntype[bifid]; tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); if (rs6000_builtin_type_compatible (types[0], parmtype0) && rs6000_builtin_type_compatible (types[1], parmtype1)) { - if (rs6000_builtin_decl (inst->bifid, false) != error_mark_node - && rs6000_builtin_is_supported (inst->bifid)) + if (rs6000_builtin_decl (bifid, false) != error_mark_node + && rs6000_builtin_is_supported (bifid)) { - tree ret_type = TREE_TYPE (inst->fntype); + tree ret_type = TREE_TYPE (rs6000_instance_info_fntype[inst]); return altivec_build_resolved_builtin (args, 2, fntype, ret_type, - inst->bifid, fcode); + bifid, fcode); } else *unsupported_builtin = true; @@ -1755,6 +1746,36 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec *arglist = static_cast *> (passed_arglist); unsigned int nargs = vec_safe_length (arglist); + /* If the number of arguments did not match the prototype, return NULL + and the generic code will issue the appropriate error message. Skip + this test for functions where we don't fully describe all the possible + overload signatures in rs6000-overload.def (because they aren't relevant + to the expansion here). If we don't, we get confusing error messages. */ + /* As an example, for vec_splats we have: + +; There are no actual builtins for vec_splats. There is special handling for +; this in altivec_resolve_overloaded_builtin in rs6000-c.cc, where the call +; is replaced by a constructor. The single overload here causes +; __builtin_vec_splats to be registered with the front end so that can happen. +[VEC_SPLATS, vec_splats, __builtin_vec_splats] + vsi __builtin_vec_splats (vsi); + ABS_V4SI SPLATS_FAKERY + + So even though __builtin_vec_splats accepts all vector types, the + infrastructure cheats and just records one prototype. We end up getting + an error message that refers to this specific prototype even when we + are handling a different argument type. That is completely confusing + to the user, so it's best to let these cases be handled individually + in the resolve_vec_splats, etc., helper functions. */ + + if (expected_args != nargs + && !(fcode == RS6000_OVLD_VEC_PROMOTE + || fcode == RS6000_OVLD_VEC_SPLATS + || fcode == RS6000_OVLD_VEC_EXTRACT + || fcode == RS6000_OVLD_VEC_INSERT + || fcode == RS6000_OVLD_VEC_STEP)) + return NULL; + for (n = 0; !VOID_TYPE_P (TREE_VALUE (fnargs)) && n < nargs; fnargs = TREE_CHAIN (fnargs), n++) @@ -1815,36 +1836,6 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, types[n] = type; } - /* If the number of arguments did not match the prototype, return NULL - and the generic code will issue the appropriate error message. Skip - this test for functions where we don't fully describe all the possible - overload signatures in rs6000-overload.def (because they aren't relevant - to the expansion here). If we don't, we get confusing error messages. */ - /* As an example, for vec_splats we have: - -; There are no actual builtins for vec_splats. There is special handling for -; this in altivec_resolve_overloaded_builtin in rs6000-c.cc, where the call -; is replaced by a constructor. The single overload here causes -; __builtin_vec_splats to be registered with the front end so that can happen. -[VEC_SPLATS, vec_splats, __builtin_vec_splats] - vsi __builtin_vec_splats (vsi); - ABS_V4SI SPLATS_FAKERY - - So even though __builtin_vec_splats accepts all vector types, the - infrastructure cheats and just records one prototype. We end up getting - an error message that refers to this specific prototype even when we - are handling a different argument type. That is completely confusing - to the user, so it's best to let these cases be handled individually - in the resolve_vec_splats, etc., helper functions. */ - - if (n != expected_args - && !(fcode == RS6000_OVLD_VEC_PROMOTE - || fcode == RS6000_OVLD_VEC_SPLATS - || fcode == RS6000_OVLD_VEC_EXTRACT - || fcode == RS6000_OVLD_VEC_INSERT - || fcode == RS6000_OVLD_VEC_STEP)) - return NULL; - /* Some overloads require special handling. */ tree returned_expr = NULL; resolution res = unresolved; @@ -1885,11 +1876,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, bool unsupported_builtin = false; rs6000_gen_builtins instance_code; bool supported = false; - ovlddata *instance = rs6000_overload_info[adj_fcode].first_instance; - gcc_assert (instance != NULL); + int instance = rs6000_overload_info[adj_fcode].first_instance; + gcc_assert (instance != -1); /* Functions with no arguments can have only one overloaded instance. */ - gcc_assert (nargs > 0 || !instance->next); + gcc_assert (nargs > 0 || rs6000_instance_info[instance].next == -1); /* Standard overload processing involves determining whether an instance exists that is type-compatible with the overloaded function call. In @@ -1963,16 +1954,18 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, /* Standard overload processing. Look for an instance with compatible parameter types. If it is supported in the current context, resolve the overloaded call to that instance. */ - for (; instance != NULL; instance = instance->next) + for (; instance != -1; instance = rs6000_instance_info[instance].next) { + tree fntype = rs6000_instance_info_fntype[instance]; + rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid; /* It is possible for an instance to require a data type that isn't - defined on this target, in which case instance->fntype will be + defined on this target, in which case fntype will be NULL. */ - if (!instance->fntype) + if (!fntype) continue; bool mismatch = false; - tree nextparm = TYPE_ARG_TYPES (instance->fntype); + tree nextparm = TYPE_ARG_TYPES (fntype); for (unsigned int arg_i = 0; arg_i < nargs && nextparm != NULL; @@ -1990,15 +1983,14 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, if (mismatch) continue; - supported = rs6000_builtin_is_supported (instance->bifid); - if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node + supported = rs6000_builtin_is_supported (bifid); + if (rs6000_builtin_decl (bifid, false) != error_mark_node && supported) { - tree fntype = rs6000_builtin_info[instance->bifid].fntype; - tree ret_type = TREE_TYPE (instance->fntype); + tree ret_type = TREE_TYPE (fntype); + fntype = rs6000_builtin_info_fntype[bifid]; return altivec_build_resolved_builtin (args, nargs, fntype, - ret_type, instance->bifid, - fcode); + ret_type, bifid, fcode); } else { @@ -2015,12 +2007,12 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, { /* Indicate that the instantiation of the overloaded builtin name is not available with the target flags in effect. */ - rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid; + rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid; + rs6000_gen_builtins fcode = (rs6000_gen_builtins) bifid; rs6000_invalid_builtin (fcode); /* Provide clarity of the relationship between the overload and the instantiation. */ - const char *internal_name - = rs6000_builtin_info[instance->bifid].bifname; + const char *internal_name = rs6000_builtin_info[bifid].bifname; rich_location richloc (line_table, input_location); inform (&richloc, "overloaded builtin %qs is implemented by builtin %qs", diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index f06c69252b2f8..d27df7b25ac05 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -1111,6 +1111,12 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, { cum->vregno += n_elts; + /* If we are not splitting Complex IEEE128 args then account for the + fact that they are passed in 2 VSX regs. */ + if (!targetm.calls.split_complex_arg && type + && TREE_CODE (type) == COMPLEX_TYPE && elt_mode == KCmode) + cum->vregno++; + if (!TARGET_ALTIVEC) error ("cannot pass argument in vector register because" " altivec instructions are disabled, use %qs" diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 963947f693929..a052914b24686 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -47,9 +47,9 @@ fusion here, instead set it in rs6000.cc if we are tuning for a power8 system. */ #define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \ + | OPTION_MASK_POWER8 \ | OPTION_MASK_P8_VECTOR \ | OPTION_MASK_CRYPTO \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC) @@ -94,7 +94,6 @@ /* Flags that need to be turned off if -mno-power8-vector. */ #define OTHER_P8_VECTOR_MASKS (OTHER_P9_VECTOR_MASKS \ | OPTION_MASK_P9_VECTOR \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_CRYPTO) /* Flags that need to be turned off if -mno-vsx. */ @@ -125,7 +124,6 @@ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_DLMZB \ | OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_FLOAT128_HW \ @@ -140,6 +138,7 @@ | OPTION_MASK_MODULO \ | OPTION_MASK_MULHW \ | OPTION_MASK_NO_UPDATE \ + | OPTION_MASK_POWER8 \ | OPTION_MASK_P8_FUSION \ | OPTION_MASK_P8_VECTOR \ | OPTION_MASK_P9_MINMAX \ diff --git a/gcc/config/rs6000/rs6000-d.cc b/gcc/config/rs6000/rs6000-d.cc index 74e78cf9e4d93..7b9ca5a855e1d 100644 --- a/gcc/config/rs6000/rs6000-d.cc +++ b/gcc/config/rs6000/rs6000-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/rs6000/rs6000-d.h b/gcc/config/rs6000/rs6000-d.h new file mode 100644 index 0000000000000..c805b304245f8 --- /dev/null +++ b/gcc/config/rs6000/rs6000-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the PowerPC architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Declare functions in rs6000-d.cc */ +extern void rs6000_d_target_versions (void); +extern void rs6000_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS rs6000_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO rs6000_d_register_target_info diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc index 0bd7a535e5f52..e04ed832e729e 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.cc +++ b/gcc/config/rs6000/rs6000-gen-builtins.cc @@ -2261,20 +2261,19 @@ write_decls (void) fprintf (header_file, "};\n\n"); fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n"); - fprintf (header_file, "struct GTY(()) bifdata\n"); + fprintf (header_file, "struct bifdata\n"); fprintf (header_file, "{\n"); - fprintf (header_file, " const char *GTY((skip(\"\"))) bifname;\n"); - fprintf (header_file, " bif_enable GTY((skip(\"\"))) enable;\n"); - fprintf (header_file, " tree fntype;\n"); - fprintf (header_file, " insn_code GTY((skip(\"\"))) icode;\n"); - fprintf (header_file, " int nargs;\n"); - fprintf (header_file, " int bifattrs;\n"); - fprintf (header_file, " int restr_opnd[PPC_MAXRESTROPNDS];\n"); - fprintf (header_file, " restriction GTY((skip(\"\"))) restr[PPC_MAXRESTROPNDS];\n"); - fprintf (header_file, " int restr_val1[PPC_MAXRESTROPNDS];\n"); - fprintf (header_file, " int restr_val2[PPC_MAXRESTROPNDS];\n"); - fprintf (header_file, " const char *GTY((skip(\"\"))) attr_string;\n"); - fprintf (header_file, " rs6000_gen_builtins GTY((skip(\"\"))) assoc_bif;\n"); + fprintf (header_file, " const char *bifname;\n"); + fprintf (header_file, " bif_enable enable;\n"); + fprintf (header_file, " insn_code icode;\n"); + fprintf (header_file, " int nargs;\n"); + fprintf (header_file, " int bifattrs;\n"); + fprintf (header_file, " int restr_opnd[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " restriction restr[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " int restr_val1[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " int restr_val2[PPC_MAXRESTROPNDS];\n"); + fprintf (header_file, " const char *attr_string;\n"); + fprintf (header_file, " rs6000_gen_builtins assoc_bif;\n"); fprintf (header_file, "};\n\n"); fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n"); @@ -2353,24 +2352,28 @@ write_decls (void) fprintf (header_file, "\n"); fprintf (header_file, - "extern GTY(()) bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n"); + "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n"); - fprintf (header_file, "struct GTY(()) ovlddata\n"); + fprintf (header_file, + "extern GTY(()) tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n"); + + fprintf (header_file, "struct ovlddata\n"); fprintf (header_file, "{\n"); - fprintf (header_file, " const char *GTY((skip(\"\"))) bifname;\n"); - fprintf (header_file, " rs6000_gen_builtins GTY((skip(\"\"))) bifid;\n"); - fprintf (header_file, " tree fntype;\n"); - fprintf (header_file, " ovlddata *GTY((skip(\"\"))) next;\n"); + fprintf (header_file, " const char *bifname;\n"); + fprintf (header_file, " rs6000_gen_builtins bifid;\n"); + fprintf (header_file, " int next;\n"); fprintf (header_file, "};\n\n"); fprintf (header_file, "struct ovldrecord\n"); fprintf (header_file, "{\n"); fprintf (header_file, " const char *ovld_name;\n"); - fprintf (header_file, " ovlddata *first_instance;\n"); + fprintf (header_file, " int first_instance;\n"); fprintf (header_file, "};\n\n"); fprintf (header_file, - "extern GTY(()) ovlddata rs6000_instance_info[RS6000_INST_MAX];\n"); + "extern ovlddata rs6000_instance_info[RS6000_INST_MAX];\n"); + fprintf (header_file, "extern GTY(()) tree " + "rs6000_instance_info_fntype[RS6000_INST_MAX];\n"); fprintf (header_file, "extern ovldrecord rs6000_overload_info[];\n\n"); fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n"); @@ -2481,7 +2484,7 @@ write_bif_static_init (void) fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n"); fprintf (init_file, " {\n"); fprintf (init_file, " { /* RS6000_BIF_NONE: */\n"); - fprintf (init_file, " \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n"); + fprintf (init_file, " \"\", ENB_ALWAYS, CODE_FOR_nothing, 0,\n"); fprintf (init_file, " 0, {0, 0, 0}, {RES_NONE, RES_NONE, RES_NONE},\n"); fprintf (init_file, " {0, 0, 0}, {0, 0, 0}, \"\", RS6000_BIF_NONE\n"); fprintf (init_file, " },\n"); @@ -2493,8 +2496,6 @@ write_bif_static_init (void) bifp->proto.bifname); fprintf (init_file, " /* enable*/\t%s,\n", enable_string[bifp->stanza]); - /* Type must be instantiated at run time. */ - fprintf (init_file, " /* fntype */\t0,\n"); fprintf (init_file, " /* icode */\tCODE_FOR_%s,\n", bifp->patname); fprintf (init_file, " /* nargs */\t%d,\n", @@ -2586,6 +2587,8 @@ write_bif_static_init (void) fprintf (init_file, " },\n"); } fprintf (init_file, " };\n\n"); + + fprintf (init_file, "tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n"); } /* Write the decls and initializers for rs6000_overload_info[] and @@ -2598,7 +2601,7 @@ write_ovld_static_init (void) "- RS6000_OVLD_NONE] =\n"); fprintf (init_file, " {\n"); fprintf (init_file, " { /* RS6000_OVLD_NONE: */\n"); - fprintf (init_file, " \"\", NULL\n"); + fprintf (init_file, " \"\", -1\n"); fprintf (init_file, " },\n"); for (int i = 0; i <= curr_ovld_stanza; i++) { @@ -2607,7 +2610,7 @@ write_ovld_static_init (void) fprintf (init_file, " /* ovld_name */\t\"%s\",\n", ovld_stanzas[i].intern_name); /* First-instance must currently be instantiated at run time. */ - fprintf (init_file, " /* first_instance */\tNULL\n"); + fprintf (init_file, " /* first_instance */\t-1\n"); fprintf (init_file, " },\n"); } fprintf (init_file, " };\n\n"); @@ -2615,7 +2618,7 @@ write_ovld_static_init (void) fprintf (init_file, "ovlddata rs6000_instance_info[RS6000_INST_MAX] =\n"); fprintf (init_file, " {\n"); fprintf (init_file, " { /* RS6000_INST_NONE: */\n"); - fprintf (init_file, " \"\", RS6000_BIF_NONE, NULL_TREE, NULL\n"); + fprintf (init_file, " \"\", RS6000_BIF_NONE, -1\n"); fprintf (init_file, " },\n"); for (int i = 0; i <= curr_ovld; i++) { @@ -2625,19 +2628,20 @@ write_ovld_static_init (void) ovlds[i].proto.bifname); fprintf (init_file, " /* bifid */\tRS6000_BIF_%s,\n", ovlds[i].bif_id_name); - /* Type must be instantiated at run time. */ - fprintf (init_file, " /* fntype */\t0,\n"); fprintf (init_file, " /* next */\t"); if (i < curr_ovld && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname)) fprintf (init_file, - "&rs6000_instance_info[RS6000_INST_%s]\n", + "RS6000_INST_%s\n", ovlds[i+1].ovld_id_name); else - fprintf (init_file, "NULL\n"); + fprintf (init_file, "-1\n"); fprintf (init_file, " },\n"); } fprintf (init_file, " };\n\n"); + + fprintf (init_file, + "tree rs6000_instance_info_fntype[RS6000_INST_MAX];\n\n"); } /* Write code to initialize the built-in function table. */ @@ -2647,7 +2651,7 @@ write_init_bif_table (void) for (int i = 0; i <= curr_bif; i++) { fprintf (init_file, - " rs6000_builtin_info[RS6000_BIF_%s].fntype" + " rs6000_builtin_info_fntype[RS6000_BIF_%s]" "\n = %s;\n", bifs[i].idname, bifs[i].fndecl); @@ -2736,7 +2740,7 @@ write_init_ovld_table (void) for (int i = 0; i <= curr_ovld; i++) { fprintf (init_file, - " rs6000_instance_info[RS6000_INST_%s].fntype" + " rs6000_instance_info_fntype[RS6000_INST_%s]" "\n = %s;\n", ovlds[i].ovld_id_name, ovlds[i].fndecl); @@ -2793,7 +2797,7 @@ write_init_ovld_table (void) ".first_instance\n", stanza->stanza_id); fprintf (init_file, - " = &rs6000_instance_info[RS6000_INST_%s];\n\n", + " = RS6000_INST_%s;\n\n", ovlds[i].ovld_id_name); } } diff --git a/gcc/config/rs6000/rs6000-logue.cc b/gcc/config/rs6000/rs6000-logue.cc index 59fe1c8cb8bb9..d891d43c074e6 100644 --- a/gcc/config/rs6000/rs6000-logue.cc +++ b/gcc/config/rs6000/rs6000-logue.cc @@ -595,21 +595,21 @@ rs6000_savres_strategy (rs6000_stack_t *info, +---------------------------------------+ | Parameter save area (+padding*) (P) | 32 +---------------------------------------+ - | Optional ROP hash slot (R) | 32+P + | Alloca space (A) | 32+P +---------------------------------------+ - | Alloca space (A) | 32+P+R + | Local variable space (L) | 32+P+A +---------------------------------------+ - | Local variable space (L) | 32+P+R+A + | Optional ROP hash slot (R) | 32+P+A+L +---------------------------------------+ - | Save area for AltiVec registers (W) | 32+P+R+A+L + | Save area for AltiVec registers (W) | 32+P+A+L+R +---------------------------------------+ - | AltiVec alignment padding (Y) | 32+P+R+A+L+W + | AltiVec alignment padding (Y) | 32+P+A+L+R+W +---------------------------------------+ - | Save area for GP registers (G) | 32+P+R+A+L+W+Y + | Save area for GP registers (G) | 32+P+A+L+R+W+Y +---------------------------------------+ - | Save area for FP registers (F) | 32+P+R+A+L+W+Y+G + | Save area for FP registers (F) | 32+P+A+L+R+W+Y+G +---------------------------------------+ - old SP->| back chain to caller's caller | 32+P+R+A+L+W+Y+G+F + old SP->| back chain to caller's caller | 32+P+A+L+R+W+Y+G+F +---------------------------------------+ * If the alloca area is present, the parameter save area is @@ -720,17 +720,11 @@ rs6000_stack_info (void) info->calls_p = (!crtl->is_leaf || cfun->machine->ra_needs_full_frame); info->rop_hash_size = 0; - if (TARGET_POWER10 - && info->calls_p - && DEFAULT_ABI == ABI_ELFv2 - && rs6000_rop_protect) + /* If we want ROP protection and this function makes a call, indicate + we need to create a stack slot to save the hashed return address in. */ + if (rs6000_rop_protect + && info->calls_p) info->rop_hash_size = 8; - else if (rs6000_rop_protect && DEFAULT_ABI != ABI_ELFv2) - { - /* We can't check this in rs6000_option_override_internal since - DEFAULT_ABI isn't established yet. */ - error ("%qs requires the ELFv2 ABI", "-mrop-protect"); - } /* Determine if we need to save the condition code registers. */ if (save_reg_p (CR2_REGNO) @@ -821,17 +815,16 @@ rs6000_stack_info (void) gcc_assert (info->altivec_size == 0 || info->altivec_save_offset % 16 == 0); - /* Adjust for AltiVec case. */ - info->ehrd_offset = info->altivec_save_offset - ehrd_size; - /* Adjust for ROP protection. */ info->rop_hash_save_offset = info->altivec_save_offset - info->rop_hash_size; - info->ehrd_offset -= info->rop_hash_size; } else - info->ehrd_offset = info->gp_save_offset - ehrd_size; + /* Adjust for ROP protection. */ + info->rop_hash_save_offset + = info->gp_save_offset - info->rop_hash_size; + info->ehrd_offset = info->rop_hash_save_offset - ehrd_size; info->ehcr_offset = info->ehrd_offset - ehcr_size; info->cr_save_offset = reg_size; /* first word when 64-bit. */ info->lr_save_offset = 2*reg_size; @@ -3280,9 +3273,8 @@ rs6000_emit_prologue (void) /* NOTE: The hashst isn't needed if we're going to do a sibcall, but there's no way to know that here. Harmless except for performance, of course. */ - if (TARGET_POWER10 && rs6000_rop_protect && info->rop_hash_size != 0) + if (info->rop_hash_size) { - gcc_assert (DEFAULT_ABI == ABI_ELFv2); rtx stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); rtx addr = gen_rtx_PLUS (Pmode, stack_ptr, GEN_INT (info->rop_hash_save_offset)); @@ -4283,9 +4275,6 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) rs6000_stack_t *info = rs6000_stack_info (); - if (epilogue_type == EPILOGUE_TYPE_NORMAL && crtl->calls_eh_return) - epilogue_type = EPILOGUE_TYPE_EH_RETURN; - int strategy = info->savres_strategy; bool using_load_multiple = !!(strategy & REST_MULTIPLE); bool restoring_GPRs_inline = !!(strategy & REST_INLINE_GPRS); @@ -4763,7 +4752,9 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) /* In the ELFv2 ABI we need to restore all call-saved CR fields from *separate* slots if the routine calls __builtin_eh_return, so - that they can be independently restored by the unwinder. */ + that they can be independently restored by the unwinder. Since + it is for CR fields restoring, it should be done for any epilogue + types (not EPILOGUE_TYPE_EH_RETURN specific). */ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return) { int i, cr_off = info->ehcr_offset; @@ -4924,7 +4915,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) a REG_CFA_DEF_CFA note, but that's OK; A duplicate is discarded by dwarf2cfi.cc/dwarf2out.cc, and in any case would be harmless if emitted. */ - if (frame_pointer_needed) + if (frame_pointer_needed_indeed) { insn = get_last_insn (); add_reg_note (insn, REG_CFA_DEF_CFA, @@ -5028,12 +5019,9 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) /* The ROP hash check must occur after the stack pointer is restored (since the hash involves r1), and is not performed for a sibcall. */ - if (TARGET_POWER10 - && rs6000_rop_protect - && info->rop_hash_size != 0 + if (info->rop_hash_size && epilogue_type != EPILOGUE_TYPE_SIBCALL) { - gcc_assert (DEFAULT_ABI == ABI_ELFv2); rtx stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); rtx addr = gen_rtx_PLUS (Pmode, stack_ptr, GEN_INT (info->rop_hash_save_offset)); diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 44e2945aaa0e5..9135b8d69666d 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -5930,7 +5930,7 @@ unsigned int __builtin_vec_scalar_test_data_class_sp (float, const int); VSTDCSP VSTDCSP_DEPR1 -[VEC_VSUBCUQ, vec_vsubcuqP, __builtin_vec_vsubcuq] +[VEC_VSUBCUQ, vec_vsubcuq, __builtin_vec_vsubcuq] vsq __builtin_vec_vsubcuq (vsq, vsq); VSUBCUQ VSUBCUQ_DEPR1 vuq __builtin_vec_vsubcuq (vuq, vuq); diff --git a/gcc/config/rs6000/rs6000-p8swap.cc b/gcc/config/rs6000/rs6000-p8swap.cc index d301bc3fe59ec..e97a32b4c2367 100644 --- a/gcc/config/rs6000/rs6000-p8swap.cc +++ b/gcc/config/rs6000/rs6000-p8swap.cc @@ -1688,7 +1688,15 @@ replace_swapped_aligned_store (swap_web_entry *insn_entry, gcc_assert ((GET_CODE (new_body) == SET) && MEM_P (SET_DEST (new_body))); - set_block_for_insn (new_insn, BLOCK_FOR_INSN (store_insn)); + basic_block bb = BLOCK_FOR_INSN (store_insn); + set_block_for_insn (new_insn, bb); + /* Handle REG_EH_REGION note. */ + if (cfun->can_throw_non_call_exceptions && BB_END (bb) == store_insn) + { + rtx note = find_reg_note (store_insn, REG_EH_REGION, NULL_RTX); + if (note) + add_reg_note (new_insn, REG_EH_REGION, XEXP (note, 0)); + } df_insn_rescan (new_insn); df_insn_delete (store_insn); @@ -1782,7 +1790,15 @@ replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn) gcc_assert ((GET_CODE (new_body) == SET) && MEM_P (SET_SRC (new_body))); - set_block_for_insn (new_insn, BLOCK_FOR_INSN (def_insn)); + basic_block bb = BLOCK_FOR_INSN (def_insn); + set_block_for_insn (new_insn, bb); + /* Handle REG_EH_REGION note. */ + if (cfun->can_throw_non_call_exceptions && BB_END (bb) == def_insn) + { + rtx note = find_reg_note (def_insn, REG_EH_REGION, NULL_RTX); + if (note) + add_reg_note (new_insn, REG_EH_REGION, XEXP (note, 0)); + } df_insn_rescan (new_insn); df_insn_delete (def_insn); @@ -2451,10 +2467,10 @@ rs6000_analyze_swaps (function *fun) mode = V4SImode; } - if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || mode == TImode) + if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || TI_OR_PTI_MODE (mode)) { insn_entry[uid].is_relevant = 1; - if (mode == TImode || mode == V1TImode + if (TI_OR_PTI_MODE (mode) || mode == V1TImode || FLOAT128_VECTOR_P (mode)) insn_entry[uid].is_128_int = 1; if (DF_REF_INSN_INFO (mention)) @@ -2479,10 +2495,10 @@ rs6000_analyze_swaps (function *fun) && ALTIVEC_OR_VSX_VECTOR_MODE (GET_MODE (SET_DEST (insn)))) mode = GET_MODE (SET_DEST (insn)); - if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || mode == TImode) + if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || TI_OR_PTI_MODE (mode)) { insn_entry[uid].is_relevant = 1; - if (mode == TImode || mode == V1TImode + if (TI_OR_PTI_MODE (mode) || mode == V1TImode || FLOAT128_VECTOR_P (mode)) insn_entry[uid].is_128_int = 1; if (DF_REF_INSN_INFO (mention)) diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 3ea010236090b..36f7f7faac375 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -324,10 +324,6 @@ extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT); extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT); -/* Declare functions in rs6000-d.cc */ -extern void rs6000_d_target_versions (void); -extern void rs6000_d_register_target_info (void); - #ifdef NO_DOLLAR_IN_LABEL const char * rs6000_xcoff_strip_dollar (const char *); #endif @@ -349,4 +345,6 @@ extern rtx rs6000_gen_lvx (enum machine_mode, rtx, rtx); extern rtx rs6000_gen_stvx (enum machine_mode, rtx, rtx); extern void rs6000_emit_xxspltidp_v2df (rtx, long value); +extern gimple *currently_expanding_gimple_stmt; +extern bool rs6000_opaque_type_invalid_use_p (gimple *); #endif /* rs6000-protos.h */ diff --git a/gcc/config/rs6000/rs6000-string.cc b/gcc/config/rs6000/rs6000-string.cc index 59d901ac68d16..162f8562897fb 100644 --- a/gcc/config/rs6000/rs6000-string.cc +++ b/gcc/config/rs6000/rs6000-string.cc @@ -2811,11 +2811,17 @@ expand_block_move (rtx operands[], bool might_overlap) gen_func.mov = gen_vsx_movv2di_64bit; } else if (TARGET_BLOCK_OPS_UNALIGNED_VSX - && TARGET_POWER10 && bytes < 16 + /* Only use lxvl/stxvl on 64bit POWER10. */ + && TARGET_POWER10 + && TARGET_64BIT + && bytes < 16 && orig_bytes > 16 - && !(bytes == 1 || bytes == 2 - || bytes == 4 || bytes == 8) - && (align >= 128 || !STRICT_ALIGNMENT)) + && !(bytes == 1 + || bytes == 2 + || bytes == 4 + || bytes == 8) + && (align >= 128 + || !STRICT_ALIGNMENT)) { /* Only use lxvl/stxvl if it could replace multiple ordinary loads+stores. Also don't use it unless we likely already diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index bc619592b9e1e..cf0d089d06ba1 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3826,11 +3826,10 @@ rs6000_option_override_internal (bool global_init_p) "-mmultiple"); } - /* If little-endian, default to -mstrict-align on older processors. - Testing for direct_move matches power8 and later. */ + /* If little-endian, default to -mstrict-align on older processors. */ if (!BYTES_BIG_ENDIAN && !(processor_target_table[tune_index].target_enable - & OPTION_MASK_DIRECT_MOVE)) + & OPTION_MASK_POWER8)) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; /* Add some warnings for VSX. */ @@ -3872,8 +3871,7 @@ rs6000_option_override_internal (bool global_init_p) && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT | OPTION_MASK_ALTIVEC | OPTION_MASK_VSX)) != 0) - rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO - | OPTION_MASK_DIRECT_MOVE) + rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO) & ~rs6000_isa_flags_explicit); if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) @@ -3917,7 +3915,7 @@ rs6000_option_override_internal (bool global_init_p) else rs6000_isa_flags |= ISA_3_0_MASKS_SERVER; } - else if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO) + else if (TARGET_P8_VECTOR || TARGET_POWER8 || TARGET_CRYPTO) rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks); else if (TARGET_VSX) rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks); @@ -3958,13 +3956,6 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FPRND; } - if (TARGET_DIRECT_MOVE && !TARGET_VSX) - { - if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE) - error ("%qs requires %qs", "-mdirect-move", "-mvsx"); - rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE; - } - if (TARGET_P8_VECTOR && !TARGET_ALTIVEC) { if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR) @@ -4149,14 +4140,6 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX; } - if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR)) - { - if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX) - rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR; - else - rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR; - } - /* Use long double size to select the appropriate long double. We use TYPE_PRECISION to differentiate the 3 different long double types. We map 128 into the precision used for TFmode. */ @@ -4905,6 +4888,18 @@ rs6000_option_override_internal (bool global_init_p) rs6000_print_builtin_options (stderr, 0, "builtin mask", rs6000_builtin_mask); + /* We only support ROP protection on certain targets. */ + if (rs6000_rop_protect) + { + /* Disallow CPU targets we don't support. */ + if (!TARGET_POWER8) + error ("%<-mrop-protect%> requires %<-mcpu=power8%> or later"); + + /* Disallow ABI targets we don't support. */ + if (DEFAULT_ABI != ABI_ELFv2) + error ("%<-mrop-protect%> requires the ELFv2 ABI"); + } + /* Initialize all of the registers. */ rs6000_init_hard_regno_mode_ok (global_init_p); @@ -5830,7 +5825,8 @@ rs6000_machine_from_flags (void) HOST_WIDE_INT flags = rs6000_isa_flags; /* Disable the flags that should never influence the .machine selection. */ - flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL); + flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL + | OPTION_MASK_ALTIVEC); if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) return "power10"; @@ -5855,6 +5851,8 @@ void emit_asm_machine (void) { fprintf (asm_out_file, "\t.machine %s\n", rs6000_machine); + if (TARGET_ALTIVEC) + fprintf (asm_out_file, "\t.machine altivec\n"); } #endif @@ -7164,23 +7162,29 @@ rs6000_expand_vector_set_var_p9 (rtx target, rtx val, rtx idx) machine_mode idx_mode = GET_MODE (idx); machine_mode shift_mode; - rtx (*gen_ashl)(rtx, rtx, rtx); - rtx (*gen_lvsl)(rtx, rtx); - rtx (*gen_lvsr)(rtx, rtx); + /* Gen function pointers for shifting left and generation of permutation + control vectors. */ + rtx (*gen_ashl) (rtx, rtx, rtx); + rtx (*gen_pcvr1) (rtx, rtx); + rtx (*gen_pcvr2) (rtx, rtx); if (TARGET_POWERPC64) { shift_mode = DImode; gen_ashl = gen_ashldi3; - gen_lvsl = gen_altivec_lvsl_reg_di; - gen_lvsr = gen_altivec_lvsr_reg_di; + gen_pcvr1 = BYTES_BIG_ENDIAN ? gen_altivec_lvsl_reg_di + : gen_altivec_lvsr_reg_di; + gen_pcvr2 = BYTES_BIG_ENDIAN ? gen_altivec_lvsr_reg_di + : gen_altivec_lvsl_reg_di; } else { shift_mode = SImode; gen_ashl = gen_ashlsi3; - gen_lvsl = gen_altivec_lvsl_reg_si; - gen_lvsr = gen_altivec_lvsr_reg_si; + gen_pcvr1 = BYTES_BIG_ENDIAN ? gen_altivec_lvsl_reg_si + : gen_altivec_lvsr_reg_si; + gen_pcvr2 = BYTES_BIG_ENDIAN ? gen_altivec_lvsr_reg_si + : gen_altivec_lvsl_reg_si; } /* Generate the IDX for permute shift, width is the vector element size. idx = idx * width. */ @@ -7189,25 +7193,29 @@ rs6000_expand_vector_set_var_p9 (rtx target, rtx val, rtx idx) emit_insn (gen_ashl (tmp, idx, GEN_INT (shift))); - /* lvsr v1,0,idx. */ - rtx pcvr = gen_reg_rtx (V16QImode); - emit_insn (gen_lvsr (pcvr, tmp)); - - /* lvsl v2,0,idx. */ - rtx pcvl = gen_reg_rtx (V16QImode); - emit_insn (gen_lvsl (pcvl, tmp)); + /* Generate one permutation control vector used for rotating the element + at to-insert position to element zero in target vector. lvsl is + used for big endianness while lvsr is used for little endianness: + lvs[lr] v1,0,idx. */ + rtx pcvr1 = gen_reg_rtx (V16QImode); + emit_insn (gen_pcvr1 (pcvr1, tmp)); rtx sub_target = simplify_gen_subreg (V16QImode, target, mode, 0); + rtx perm1 = gen_altivec_vperm_v8hiv16qi (sub_target, sub_target, sub_target, + pcvr1); + emit_insn (perm1); - rtx permr - = gen_altivec_vperm_v8hiv16qi (sub_target, sub_target, sub_target, pcvr); - emit_insn (permr); - + /* Insert val into element 0 of target vector. */ rs6000_expand_vector_set (target, val, const0_rtx); - rtx perml - = gen_altivec_vperm_v8hiv16qi (sub_target, sub_target, sub_target, pcvl); - emit_insn (perml); + /* Rotate back with a reversed permutation control vector generated from: + lvs[rl] v2,0,idx. */ + rtx pcvr2 = gen_reg_rtx (V16QImode); + emit_insn (gen_pcvr2 (pcvr2, tmp)); + + rtx perm2 = gen_altivec_vperm_v8hiv16qi (sub_target, sub_target, sub_target, + pcvr2); + emit_insn (perm2); } /* Insert VAL into IDX of TARGET, VAL size is same of the vector element, IDX @@ -8126,7 +8134,8 @@ darwin_rs6000_special_round_type_align (tree type, unsigned int computed, type = TREE_TYPE (type); } while (AGGREGATE_TYPE_P (type)); - if (! AGGREGATE_TYPE_P (type) && type != error_mark_node) + if (type != error_mark_node && ! AGGREGATE_TYPE_P (type) + && ! TYPE_PACKED (type) && maximum_field_alignment == 0) align = MAX (align, TYPE_ALIGN (type)); return align; @@ -11040,26 +11049,6 @@ init_float128_ibm (machine_mode mode) } } -/* Create a decl for either complex long double multiply or complex long double - divide when long double is IEEE 128-bit floating point. We can't use - __multc3 and __divtc3 because the original long double using IBM extended - double used those names. The complex multiply/divide functions are encoded - as builtin functions with a complex result and 4 scalar inputs. */ - -static void -create_complex_muldiv (const char *name, built_in_function fncode, tree fntype) -{ - tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL, - name, NULL_TREE); - - set_builtin_decl (fncode, fndecl, true); - - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "create complex %s, fncode: %d\n", name, (int) fncode); - - return; -} - /* Set up IEEE 128-bit floating point routines. Use different names if the arguments can be passed in a vector register. The historical PowerPC implementation of IEEE 128-bit floating point used _q_ for the names, so @@ -11071,32 +11060,6 @@ init_float128_ieee (machine_mode mode) { if (FLOAT128_VECTOR_P (mode)) { - static bool complex_muldiv_init_p = false; - - /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If - we have clone or target attributes, this will be called a second - time. We want to create the built-in function only once. */ - if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p) - { - complex_muldiv_init_p = true; - built_in_function fncode_mul = - (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode - - MIN_MODE_COMPLEX_FLOAT); - built_in_function fncode_div = - (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode - - MIN_MODE_COMPLEX_FLOAT); - - tree fntype = build_function_type_list (complex_long_double_type_node, - long_double_type_node, - long_double_type_node, - long_double_type_node, - long_double_type_node, - NULL_TREE); - - create_complex_muldiv ("__mulkc3", fncode_mul, fntype); - create_complex_muldiv ("__divkc3", fncode_div, fntype); - } - set_optab_libfunc (add_optab, mode, "__addkf3"); set_optab_libfunc (sub_optab, mode, "__subkf3"); set_optab_libfunc (neg_optab, mode, "__negkf2"); @@ -11331,7 +11294,16 @@ bool rs6000_is_valid_rotate_dot_mask (rtx mask, machine_mode mode) { int nb, ne; - return rs6000_is_valid_mask (mask, &nb, &ne, mode) && nb >= ne && ne > 0; + if (rs6000_is_valid_mask (mask, &nb, &ne, mode) && nb >= ne && ne > 0) + { + if (TARGET_64BIT) + return true; + /* *rotldi3_mask_dot requires for -m32 -mpowerpc64 that the mask is + <= 0x7fffffff. */ + return (UINTVAL (mask) << (63 - nb)) <= 0x7fffffff; + } + + return false; } /* Return whether MASK (a CONST_INT) is a valid mask for any rlwinm, rldicl, @@ -17151,7 +17123,7 @@ output_toc (FILE *file, rtx x, int labelno, machine_mode mode) if (DECIMAL_FLOAT_MODE_P (GET_MODE (x))) REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k); else - REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), k); + real_to_target (k, CONST_DOUBLE_REAL_VALUE (x), GET_MODE (x)); if (TARGET_64BIT) { @@ -21941,7 +21913,9 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, *total = rs6000_cost->divsi; } /* Add in shift and subtract for MOD unless we have a mod instruction. */ - if (!TARGET_MODULO && (code == MOD || code == UMOD)) + if ((!TARGET_MODULO + || (RS6000_DISABLE_SCALAR_MODULO && SCALAR_INT_MODE_P (mode))) + && (code == MOD || code == UMOD)) *total += COSTS_N_INSNS (2); return false; @@ -23012,28 +22986,28 @@ altivec_expand_vec_perm_const (rtx target, rtx op0, rtx op1, CODE_FOR_altivec_vpkuwum_direct, {2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghb_direct - : CODE_FOR_altivec_vmrglb_direct, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghb_direct_be + : CODE_FOR_altivec_vmrglb_direct_le, {0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghh_direct - : CODE_FOR_altivec_vmrglh_direct, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghh_direct_be + : CODE_FOR_altivec_vmrglh_direct_le, {0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghw_direct_v4si - : CODE_FOR_altivec_vmrglw_direct_v4si, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghw_direct_v4si_be + : CODE_FOR_altivec_vmrglw_direct_v4si_le, {0, 1, 2, 3, 16, 17, 18, 19, 4, 5, 6, 7, 20, 21, 22, 23}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglb_direct - : CODE_FOR_altivec_vmrghb_direct, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglb_direct_be + : CODE_FOR_altivec_vmrghb_direct_le, {8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglh_direct - : CODE_FOR_altivec_vmrghh_direct, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglh_direct_be + : CODE_FOR_altivec_vmrghh_direct_le, {8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31}}, {OPTION_MASK_ALTIVEC, - BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglw_direct_v4si - : CODE_FOR_altivec_vmrghw_direct_v4si, + BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglw_direct_v4si_be + : CODE_FOR_altivec_vmrghw_direct_v4si_le, {8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31}}, {OPTION_MASK_P8_VECTOR, BYTES_BIG_ENDIAN ? CODE_FOR_p8_vmrgew_v4sf_direct @@ -23989,7 +23963,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = false, true }, { "cmpb", OPTION_MASK_CMPB, false, true }, { "crypto", OPTION_MASK_CRYPTO, false, true }, - { "direct-move", OPTION_MASK_DIRECT_MOVE, false, true }, + { "direct-move", 0, false, true }, { "dlmzb", OPTION_MASK_DLMZB, false, true }, { "efficient-unaligned-vsx", OPTION_MASK_EFFICIENT_UNALIGNED_VSX, false, true }, @@ -25285,15 +25259,21 @@ rs6000_need_ipa_fn_target_info (const_tree decl, static bool rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) { +#ifndef HAVE_AS_POWER10_HTM /* Assume inline asm can use any instruction features. */ if (gimple_code (stmt) == GIMPLE_ASM) { - /* Should set any bits we concerned, for now OPTION_MASK_HTM is - the only bit we care about. */ - info |= RS6000_FN_TARGET_INFO_HTM; + const char *asm_str = gimple_asm_string (as_a (stmt)); + /* Ignore empty inline asm string. */ + if (strlen (asm_str) > 0) + /* Should set any bits we concerned, for now OPTION_MASK_HTM is + the only bit we care about. */ + info |= RS6000_FN_TARGET_INFO_HTM; return false; } - else if (gimple_code (stmt) == GIMPLE_CALL) +#endif + + if (gimple_code (stmt) == GIMPLE_CALL) { tree fndecl = gimple_call_fndecl (stmt); if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD)) @@ -25321,45 +25301,45 @@ rs6000_can_inline_p (tree caller, tree callee) tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller); tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee); - /* If the callee has no option attributes, then it is ok to inline. */ + /* If the caller/callee has option attributes, then use them. + Otherwise, use the command line options. */ if (!callee_tree) - ret = true; + callee_tree = target_option_default_node; + if (!caller_tree) + caller_tree = target_option_default_node; - else - { - HOST_WIDE_INT caller_isa; - struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree); - HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags; - HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit; + struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree); + struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree); - /* If the caller has option attributes, then use them. - Otherwise, use the command line options. */ - if (caller_tree) - caller_isa = TREE_TARGET_OPTION (caller_tree)->x_rs6000_isa_flags; - else - caller_isa = rs6000_isa_flags; + HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags; + HOST_WIDE_INT caller_isa = caller_opts->x_rs6000_isa_flags; + HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit; - cgraph_node *callee_node = cgraph_node::get (callee); - if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL) + cgraph_node *callee_node = cgraph_node::get (callee); + if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL) + { + unsigned int info = ipa_fn_summaries->get (callee_node)->target_info; + if ((info & RS6000_FN_TARGET_INFO_HTM) == 0) { - unsigned int info = ipa_fn_summaries->get (callee_node)->target_info; - if ((info & RS6000_FN_TARGET_INFO_HTM) == 0) - { - callee_isa &= ~OPTION_MASK_HTM; - explicit_isa &= ~OPTION_MASK_HTM; - } + callee_isa &= ~OPTION_MASK_HTM; + explicit_isa &= ~OPTION_MASK_HTM; } - - /* The callee's options must be a subset of the caller's options, i.e. - a vsx function may inline an altivec function, but a no-vsx function - must not inline a vsx function. However, for those options that the - callee has explicitly enabled or disabled, then we must enforce that - the callee's and caller's options match exactly; see PR70010. */ - if (((caller_isa & callee_isa) == callee_isa) - && (caller_isa & explicit_isa) == (callee_isa & explicit_isa)) - ret = true; } + /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining + purposes. */ + callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); + explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); + + /* The callee's options must be a subset of the caller's options, i.e. + a vsx function may inline an altivec function, but a no-vsx function + must not inline a vsx function. However, for those options that the + callee has explicitly enabled or disabled, then we must enforce that + the callee's and caller's options match exactly; see PR70010. */ + if (((caller_isa & callee_isa) == callee_isa) + && (caller_isa & explicit_isa) == (callee_isa & explicit_isa)) + ret = true; + if (TARGET_DEBUG_TARGET) fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n", get_decl_name (caller), get_decl_name (callee), @@ -28072,6 +28052,27 @@ rs6000_starting_frame_offset (void) return RS6000_STARTING_FRAME_OFFSET; } +/* Internal function to return the built-in function id for the complex + multiply operation for a given mode. */ + +static inline built_in_function +complex_multiply_builtin_code (machine_mode mode) +{ + gcc_assert (IN_RANGE (mode, MIN_MODE_COMPLEX_FLOAT, MAX_MODE_COMPLEX_FLOAT)); + int func = BUILT_IN_COMPLEX_MUL_MIN + mode - MIN_MODE_COMPLEX_FLOAT; + return (built_in_function) func; +} + +/* Internal function to return the built-in function id for the complex divide + operation for a given mode. */ + +static inline built_in_function +complex_divide_builtin_code (machine_mode mode) +{ + gcc_assert (IN_RANGE (mode, MIN_MODE_COMPLEX_FLOAT, MAX_MODE_COMPLEX_FLOAT)); + int func = BUILT_IN_COMPLEX_DIV_MIN + mode - MIN_MODE_COMPLEX_FLOAT; + return (built_in_function) func; +} /* On 64-bit Linux and Freebsd systems, possibly switch the long double library function names from l to f128 if the default long double type is @@ -28090,11 +28091,53 @@ rs6000_starting_frame_offset (void) only do this transformation if the __float128 type is enabled. This prevents us from doing the transformation on older 32-bit ports that might have enabled using IEEE 128-bit floating point as the default long double - type. */ + type. + + We also use the TARGET_MANGLE_DECL_ASSEMBLER_NAME hook to change the + function names used for complex multiply and divide to the appropriate + names. */ static tree rs6000_mangle_decl_assembler_name (tree decl, tree id) { + /* Handle complex multiply/divide. For IEEE 128-bit, use __mulkc3 or + __divkc3 and for IBM 128-bit use __multc3 and __divtc3. */ + if (TARGET_FLOAT128_TYPE + && TREE_CODE (decl) == FUNCTION_DECL + && DECL_IS_UNDECLARED_BUILTIN (decl) + && DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL) + { + built_in_function id = DECL_FUNCTION_CODE (decl); + const char *newname = NULL; + + if (id == complex_multiply_builtin_code (KCmode)) + newname = "__mulkc3"; + + else if (id == complex_multiply_builtin_code (ICmode)) + newname = "__multc3"; + + else if (id == complex_multiply_builtin_code (TCmode)) + newname = (TARGET_IEEEQUAD) ? "__mulkc3" : "__multc3"; + + else if (id == complex_divide_builtin_code (KCmode)) + newname = "__divkc3"; + + else if (id == complex_divide_builtin_code (ICmode)) + newname = "__divtc3"; + + else if (id == complex_divide_builtin_code (TCmode)) + newname = (TARGET_IEEEQUAD) ? "__divkc3" : "__divtc3"; + + if (newname) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "Map complex mul/div => %s\n", newname); + + return get_identifier (newname); + } + } + + /* Map long double built-in functions if long double is IEEE 128-bit. */ if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 && TREE_CODE (decl) == FUNCTION_DECL && DECL_IS_UNDECLARED_BUILTIN (decl) @@ -28290,28 +28333,6 @@ rs6000_invalid_conversion (const_tree fromtype, const_tree totype) if (tomode == OOmode) return N_("invalid conversion to type %<__vector_pair%>"); } - else if (POINTER_TYPE_P (fromtype) && POINTER_TYPE_P (totype)) - { - /* We really care about the modes of the base types. */ - frommode = TYPE_MODE (TREE_TYPE (fromtype)); - tomode = TYPE_MODE (TREE_TYPE (totype)); - - /* Do not allow conversions to/from XOmode and OOmode pointer - types, except to/from void pointers. */ - if (frommode != tomode - && frommode != VOIDmode - && tomode != VOIDmode) - { - if (frommode == XOmode) - return N_("invalid conversion from type %<* __vector_quad%>"); - if (tomode == XOmode) - return N_("invalid conversion to type %<* __vector_quad%>"); - if (frommode == OOmode) - return N_("invalid conversion from type %<* __vector_pair%>"); - if (tomode == OOmode) - return N_("invalid conversion to type %<* __vector_pair%>"); - } - } /* Conversion allowed. */ return NULL; @@ -28592,7 +28613,6 @@ vec_const_128bit_to_bytes (rtx op, info->all_words_same = (info->words[0] == info->words[1] - && info->words[0] == info->words[1] && info->words[0] == info->words[2] && info->words[0] == info->words[3]); @@ -28795,7 +28815,86 @@ constant_generates_xxspltidp (vec_const_128bit_type *vsx_const) return sf_value; } - +/* Now we have only two opaque types, they are __vector_quad and + __vector_pair built-in types. They are target specific and + only available when MMA is supported. With MMA supported, it + simply returns true, otherwise it checks if the given gimple + STMT is an assignment, asm or call stmt and uses either of + these two opaque types unexpectedly, if yes, it would raise + an error message and returns true, otherwise it returns false. */ + +bool +rs6000_opaque_type_invalid_use_p (gimple *stmt) +{ + if (TARGET_MMA) + return false; + + /* If the given TYPE is one MMA opaque type, emit the corresponding + error messages and return true, otherwise return false. */ + auto check_and_error_invalid_use = [](tree type) + { + tree mv = TYPE_MAIN_VARIANT (type); + if (mv == vector_quad_type_node) + { + error ("type %<__vector_quad%> requires the %qs option", "-mmma"); + return true; + } + else if (mv == vector_pair_type_node) + { + error ("type %<__vector_pair%> requires the %qs option", "-mmma"); + return true; + } + return false; + }; + + if (stmt) + { + /* The usage of MMA opaque types is very limited for now, + to check with gassign, gasm and gcall is enough so far. */ + if (gassign *ga = dyn_cast (stmt)) + { + tree lhs = gimple_assign_lhs (ga); + tree type = TREE_TYPE (lhs); + if (check_and_error_invalid_use (type)) + return true; + } + else if (gasm *gs = dyn_cast (stmt)) + { + unsigned ninputs = gimple_asm_ninputs (gs); + for (unsigned i = 0; i < ninputs; i++) + { + tree op = gimple_asm_input_op (gs, i); + tree val = TREE_VALUE (op); + tree type = TREE_TYPE (val); + if (check_and_error_invalid_use (type)) + return true; + } + unsigned noutputs = gimple_asm_noutputs (gs); + for (unsigned i = 0; i < noutputs; i++) + { + tree op = gimple_asm_output_op (gs, i); + tree val = TREE_VALUE (op); + tree type = TREE_TYPE (val); + if (check_and_error_invalid_use (type)) + return true; + } + } + else if (gcall *gc = dyn_cast (stmt)) + { + unsigned nargs = gimple_call_num_args (gc); + for (unsigned i = 0; i < nargs; i++) + { + tree arg = gimple_call_arg (gc, i); + tree type = TREE_TYPE (arg); + if (check_and_error_invalid_use (type)) + return true; + } + } + } + + return false; +} + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-rs6000.h" diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 523256a5c9d5c..48ba4df1da5cf 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -81,12 +81,15 @@ # define SUBTARGET_DRIVER_SELF_SPECS "" #endif -/* Only for use in the testsuite: -mdejagnu-cpu= simply overrides -mcpu=. +/* Only for use in the testsuite: -mdejagnu-cpu= filters out all + -mcpu= as well as -mtune= options then simply adds -mcpu=, + while -mdejagnu-tune= filters out all -mtune= options then + simply adds -mtune=. With older versions of Dejagnu the command line arguments you set in - RUNTESTFLAGS override those set in the testcases; with this option, - the testcase will always win. Ditto for -mdejagnu-tune=. */ + RUNTESTFLAGS override those set in the testcases; with these options, + the testcase will always win. */ #define DRIVER_SELF_SPECS \ - "%{mdejagnu-cpu=*: %mode, operands[2]); + + if (RS6000_DISABLE_SCALAR_MODULO) + { + temp1 = gen_reg_rtx (mode); + temp2 = gen_reg_rtx (mode); + + emit_insn (gen_div3 (temp1, operands[1], operands[2])); + emit_insn (gen_mul3 (temp2, temp1, operands[2])); + emit_insn (gen_sub3 (operands[0], operands[1], temp2)); + DONE; + } } else { @@ -3378,17 +3393,36 @@ [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") (match_operand:GPR 2 "gpc_reg_operand" "r")))] - "TARGET_MODULO" + "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" "mods %0,%1,%2" [(set_attr "type" "div") (set_attr "size" "")]) +;; This define_expand can be removed when RS6000_DISABLE_SCALAR_MODULO is +;; removed. +(define_expand "umod3" + [(set (match_operand:GPR 0 "gpc_reg_operand") + (umod:GPR (match_operand:GPR 1 "gpc_reg_operand") + (match_operand:GPR 2 "gpc_reg_operand")))] + "TARGET_MODULO" +{ + if (RS6000_DISABLE_SCALAR_MODULO) + { + rtx temp1 = gen_reg_rtx (mode); + rtx temp2 = gen_reg_rtx (mode); + + emit_insn (gen_udiv3 (temp1, operands[1], operands[2])); + emit_insn (gen_mul3 (temp2, temp1, operands[2])); + emit_insn (gen_sub3 (operands[0], operands[1], temp2)); + DONE; + } +}) -(define_insn "umod3" +(define_insn "*umod3" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") (match_operand:GPR 2 "gpc_reg_operand" "r")))] - "TARGET_MODULO" + "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" "modu %0,%1,%2" [(set_attr "type" "div") (set_attr "size" "")]) @@ -3445,7 +3479,7 @@ [(set (match_operand:TI 0 "altivec_register_operand" "=v") (umod:TI (match_operand:TI 1 "altivec_register_operand" "v") (match_operand:TI 2 "altivec_register_operand" "v")))] - "TARGET_POWER10 && TARGET_POWERPC64" + "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" "vmoduq %0,%1,%2" [(set_attr "type" "vecdiv") (set_attr "size" "128")]) @@ -3454,7 +3488,7 @@ [(set (match_operand:TI 0 "altivec_register_operand" "=v") (mod:TI (match_operand:TI 1 "altivec_register_operand" "v") (match_operand:TI 2 "altivec_register_operand" "v")))] - "TARGET_POWER10 && TARGET_POWERPC64" + "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" "vmodsq %0,%1,%2" [(set_attr "type" "vecdiv") (set_attr "size" "128")]) @@ -4178,7 +4212,8 @@ (match_operand:GPR 4 "const_int_operand" "n")) (ashift:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "n"))))] - "INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" + "INTVAL (operands[2]) > 0 + && INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" { if (mode == SImode) return "rlwimi %0,%1,%h2,0,31-%h2"; @@ -4187,6 +4222,24 @@ } [(set_attr "type" "insert")]) +; Canonicalize the PLUS and XOR forms to IOR for rotl3_insert_3 +(define_code_iterator plus_xor [plus xor]) + +(define_insn_and_split "*rotl3_insert_3_" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (plus_xor:GPR + (and:GPR (match_operand:GPR 3 "gpc_reg_operand" "0") + (match_operand:GPR 4 "const_int_operand" "n")) + (ashift:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") + (match_operand:SI 2 "const_int_operand" "n"))))] + "INTVAL (operands[2]) > 0 + && INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" + "#" + "&& 1" + [(set (match_dup 0) + (ior:GPR (and:GPR (match_dup 3) (match_dup 4)) + (ashift:GPR (match_dup 1) (match_dup 2))))]) + (define_code_iterator plus_ior_xor [plus ior xor]) (define_split @@ -7741,7 +7794,7 @@ rtx op0_v16qi = gen_rtx_REG (V16QImode, r); emit_insn (gen_xxspltib_v16qi (op0_v16qi, op1)); - emit_insn (gen_vsx_sign_extend_qi_si (operands[0], op0_v16qi)); + emit_insn (gen_vsx_sign_extend_v16qi_si (operands[0], op0_v16qi)); DONE; }) @@ -9708,9 +9761,9 @@ emit_insn (gen_xxspltib_v16qi (op0_v16qi, op1)); if (mode == DImode) - emit_insn (gen_vsx_sign_extend_qi_di (operands[0], op0_v16qi)); + emit_insn (gen_vsx_sign_extend_v16qi_di (operands[0], op0_v16qi)); else if (mode == SImode) - emit_insn (gen_vsx_sign_extend_qi_si (operands[0], op0_v16qi)); + emit_insn (gen_vsx_sign_extend_v16qi_si (operands[0], op0_v16qi)); else if (mode == HImode) { rtx op0_v8hi = gen_rtx_REG (V8HImode, r); @@ -12196,33 +12249,26 @@ DONE; }) -(define_insn "stack_protect_setsi" - [(set (match_operand:SI 0 "memory_operand" "=m") - (unspec:SI [(match_operand:SI 1 "memory_operand" "m")] UNSPEC_SP_SET)) - (set (match_scratch:SI 2 "=&r") (const_int 0))] - "TARGET_32BIT" - "lwz%U1%X1 %2,%1\;stw%U0%X0 %2,%0\;li %2,0" - [(set_attr "type" "three") - (set_attr "length" "12")]) - ;; We can't use the prefixed attribute here because there are two memory ;; instructions. We can't split the insn due to the fact that this operation ;; needs to be done in one piece. -(define_insn "stack_protect_setdi" - [(set (match_operand:DI 0 "memory_operand" "=Y") - (unspec:DI [(match_operand:DI 1 "memory_operand" "Y")] UNSPEC_SP_SET)) - (set (match_scratch:DI 2 "=&r") (const_int 0))] - "TARGET_64BIT" +(define_insn "stack_protect_set" + [(set (match_operand:P 0 "memory_operand" "=YZ") + (unspec:P [(match_operand:P 1 "memory_operand" "YZ")] UNSPEC_SP_SET)) + (set (match_scratch:P 2 "=&r") (const_int 0))] + "" { - if (prefixed_memory (operands[1], DImode)) - output_asm_insn ("pld %2,%1", operands); + if (prefixed_memory (operands[1], mode)) + /* Prefixed load only supports D-form but no update and X-form. */ + output_asm_insn ("p %2,%1", operands); else - output_asm_insn ("ld%U1%X1 %2,%1", operands); + output_asm_insn ("%U1%X1 %2,%1", operands); - if (prefixed_memory (operands[0], DImode)) - output_asm_insn ("pstd %2,%0", operands); + if (prefixed_memory (operands[0], mode)) + /* Prefixed store only supports D-form but no update and X-form. */ + output_asm_insn ("pst %2,%0", operands); else - output_asm_insn ("std%U0%X0 %2,%0", operands); + output_asm_insn ("st%U0%X0 %2,%0", operands); return "li %2,0"; } @@ -12268,45 +12314,33 @@ DONE; }) -(define_insn "stack_protect_testsi" - [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y") - (unspec:CCEQ [(match_operand:SI 1 "memory_operand" "m,m") - (match_operand:SI 2 "memory_operand" "m,m")] - UNSPEC_SP_TEST)) - (set (match_scratch:SI 4 "=r,r") (const_int 0)) - (clobber (match_scratch:SI 3 "=&r,&r"))] - "TARGET_32BIT" - "@ - lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;xor. %3,%3,%4\;li %4,0 - lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;cmplw %0,%3,%4\;li %3,0\;li %4,0" - [(set_attr "length" "16,20")]) - ;; We can't use the prefixed attribute here because there are two memory ;; instructions. We can't split the insn due to the fact that this operation ;; needs to be done in one piece. -(define_insn "stack_protect_testdi" +(define_insn "stack_protect_test" [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y") - (unspec:CCEQ [(match_operand:DI 1 "memory_operand" "Y,Y") - (match_operand:DI 2 "memory_operand" "Y,Y")] + (unspec:CCEQ [(match_operand:P 1 "memory_operand" "YZ,YZ") + (match_operand:P 2 "memory_operand" "YZ,YZ")] UNSPEC_SP_TEST)) - (set (match_scratch:DI 4 "=r,r") (const_int 0)) - (clobber (match_scratch:DI 3 "=&r,&r"))] - "TARGET_64BIT" + (set (match_scratch:P 4 "=r,r") (const_int 0)) + (clobber (match_scratch:P 3 "=&r,&r"))] + "" { - if (prefixed_memory (operands[1], DImode)) - output_asm_insn ("pld %3,%1", operands); + if (prefixed_memory (operands[1], mode)) + /* Prefixed load only supports D-form but no update and X-form. */ + output_asm_insn ("p %3,%1", operands); else - output_asm_insn ("ld%U1%X1 %3,%1", operands); + output_asm_insn ("%U1%X1 %3,%1", operands); - if (prefixed_memory (operands[2], DImode)) - output_asm_insn ("pld %4,%2", operands); + if (prefixed_memory (operands[2], mode)) + output_asm_insn ("p %4,%2", operands); else - output_asm_insn ("ld%U2%X2 %4,%2", operands); + output_asm_insn ("%U2%X2 %4,%2", operands); if (which_alternative == 0) output_asm_insn ("xor. %3,%3,%4", operands); else - output_asm_insn ("cmpld %0,%3,%4\;li %3,0", operands); + output_asm_insn ("cmpl %0,%3,%4\;li %3,0", operands); return "li %4,0"; } @@ -14005,6 +14039,8 @@ "" { emit_insn (gen_eh_set_lr (Pmode, operands[0])); + emit_jump_insn (gen_eh_return_internal ()); + emit_barrier (); DONE; }) @@ -14021,6 +14057,19 @@ DONE; }) +(define_insn_and_split "eh_return_internal" + [(eh_return)] + "" + "#" + "epilogue_completed" + [(const_int 0)] +{ + if (!TARGET_SCHED_PROLOG) + emit_insn (gen_blockage ()); + rs6000_emit_epilogue (EPILOGUE_TYPE_EH_RETURN); + DONE; +}) + (define_insn "prefetch" [(prefetch (match_operand 0 "indexed_or_indirect_address" "a") (match_operand:SI 1 "const_int_operand" "n") @@ -14033,7 +14082,7 @@ AIX does not support the dcbtstt and dcbtt extended mnemonics. The AIX assembler does not support the three operand form of dcbt and dcbtst on Power 7 (-mpwr7). */ - int inst_select = INTVAL (operands[2]) || !TARGET_DIRECT_MOVE; + int inst_select = INTVAL (operands[2]) || !TARGET_POWER8; if (REG_P (operands[0])) { @@ -15508,9 +15557,9 @@ (define_insn "hashst" [(set (match_operand:DI 0 "simple_offsettable_mem_operand" "=m") - (unspec_volatile:DI [(match_operand:DI 1 "int_reg_operand" "r")] + (unspec_volatile:DI [(match_operand:DI 1 "int_reg_operand" "r")] UNSPEC_HASHST))] - "TARGET_POWER10 && rs6000_rop_protect" + "rs6000_rop_protect" { static char templ[32]; const char *p = rs6000_privileged ? "p" : ""; @@ -15523,7 +15572,7 @@ [(unspec_volatile [(match_operand:DI 0 "int_reg_operand" "r") (match_operand:DI 1 "simple_offsettable_mem_operand" "m")] UNSPEC_HASHCHK)] - "TARGET_POWER10 && rs6000_rop_protect" + "rs6000_rop_protect" { static char templ[32]; const char *p = rs6000_privileged ? "p" : ""; diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 4931d781c4e0d..46f7be748c78d 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -474,6 +474,10 @@ Save the TOC in the prologue for indirect calls rather than inline. mvsx-timode Target RejectNegative Undocumented Ignore +;; This option exists only to create its MASK. It is not intended for users. +mpower8-internal +Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use %<-mpower8-internal%>; use %<-mcpu=power8%> instead) + mpower8-fusion Target Mask(P8_FUSION) Var(rs6000_isa_flags) Fuse certain integer operations together for better performance on power8. @@ -495,7 +499,7 @@ Target Mask(CRYPTO) Var(rs6000_isa_flags) Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions. mdirect-move -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved +Target Undocumented WarnRemoved mhtm Target Mask(HTM) Var(rs6000_isa_flags) diff --git a/gcc/config/rs6000/rtems.h b/gcc/config/rs6000/rtems.h index 8aa41d5448dca..84370150dc41f 100644 --- a/gcc/config/rs6000/rtems.h +++ b/gcc/config/rs6000/rtems.h @@ -23,6 +23,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ +/* Undef gnu-user.h macro we don't want. */ +#undef CPLUSPLUS_CPP_SPEC + /* Copy and paste from linux64.h and freebsd64.h */ #ifdef IN_LIBGCC2 #undef TARGET_64BIT @@ -252,7 +255,8 @@ %{mcpu=821: %{!Dppc*: %{!Dmpc*: -Dmpc821} } } \ %{mcpu=860: %{!Dppc*: %{!Dmpc*: -Dmpc860} } } \ %{mcpu=8540: %{!Dppc*: %{!Dmpc*: -Dppc8540} } } \ -%{mcpu=e6500: -D__PPC_CPU_E6500__}" +%{mcpu=e6500: -D__PPC_CPU_E6500__} \ +%{mvrsave: -D__PPC_VRSAVE__}" #undef ASM_SPEC #define ASM_SPEC "%{!m64:%(asm_spec32)}%{m64:%(asm_spec64)} %(asm_spec_common)" diff --git a/gcc/config/rs6000/t-rtems b/gcc/config/rs6000/t-rtems index 4f8c147be3e74..9da2da6154b50 100644 --- a/gcc/config/rs6000/t-rtems +++ b/gcc/config/rs6000/t-rtems @@ -36,6 +36,9 @@ MULTILIB_DIRNAMES += nof MULTILIB_OPTIONS += mno-altivec MULTILIB_DIRNAMES += noaltivec +MULTILIB_OPTIONS += mvrsave +MULTILIB_DIRNAMES += vrsave + MULTILIB_MATCHES += ${MULTILIB_MATCHES_ENDIAN} MULTILIB_MATCHES += ${MULTILIB_MATCHES_SYSV} # Map 405 to 403 @@ -70,5 +73,7 @@ MULTILIB_REQUIRED += mcpu=7400/msoft-float MULTILIB_REQUIRED += mcpu=8540/msoft-float MULTILIB_REQUIRED += mcpu=860 MULTILIB_REQUIRED += mcpu=e6500/m32 +MULTILIB_REQUIRED += mcpu=e6500/m32/mvrsave MULTILIB_REQUIRED += mcpu=e6500/m32/msoft-float/mno-altivec MULTILIB_REQUIRED += mcpu=e6500/m64 +MULTILIB_REQUIRED += mcpu=e6500/m64/mvrsave diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index 4d0797c48f8f3..86687a99cb928 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -1286,7 +1286,16 @@ (define_expand "parity2" [(set (match_operand:VEC_IP 0 "register_operand") (parity:VEC_IP (match_operand:VEC_IP 1 "register_operand")))] - "TARGET_P9_VECTOR") + "TARGET_P9_VECTOR" +{ + rtx op1 = gen_lowpart (V16QImode, operands[1]); + rtx res = gen_reg_rtx (V16QImode); + emit_insn (gen_popcountv16qi2 (res, op1)); + emit_insn (gen_rs6000_vprtyb2 (operands[0], + gen_lowpart (mode, res))); + + DONE; +}) ;; Same size conversions @@ -1535,7 +1544,7 @@ [(match_operand:VEC_L 0 "vlogical_operand") (match_operand:VEC_L 1 "vlogical_operand") (match_operand:QI 2 "reg_or_short_operand")] - "TARGET_ALTIVEC" + "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" { rtx bitshift = operands[2]; rtx shift; diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 1b75538f42f96..226a1049917f0 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1167,10 +1167,10 @@ emit_insn (gen_xxspltib_v16qi (tmp, GEN_INT (value))); if (mode == V2DImode) - emit_insn (gen_vsx_sign_extend_qi_v2di (op0, tmp)); + emit_insn (gen_vsx_sign_extend_v16qi_v2di (op0, tmp)); else if (mode == V4SImode) - emit_insn (gen_vsx_sign_extend_qi_v4si (op0, tmp)); + emit_insn (gen_vsx_sign_extend_v16qi_v4si (op0, tmp)); else if (mode == V8HImode) emit_insn (gen_altivec_vupkhsb (op0, tmp)); @@ -2018,22 +2018,20 @@ "xtsqrtp %0,%x1" [(set_attr "type" "")]) -;; Fused vector multiply/add instructions. Support the classical Altivec -;; versions of fma, which allows the target to be a separate register from the -;; 3 inputs. Under VSX, the target must be either the addend or the first -;; multiply. - +;; Fused vector multiply/add instructions. Do not generate the Altivec versions +;; of fma (vmaddfp and vnmsubfp). These instructions allows the target to be a +;; separate register from the 3 inputs, but they have different rounding +;; behaviors than the VSX instructions. (define_insn "*vsx_fmav4sf4" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v") + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa") (fma:V4SF - (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v") - (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v") - (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))] + (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa") + (match_operand:V4SF 2 "vsx_register_operand" "wa,0") + (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))] "VECTOR_UNIT_VSX_P (V4SFmode)" "@ xvmaddasp %x0,%x1,%x2 - xvmaddmsp %x0,%x1,%x3 - vmaddfp %0,%1,%2,%3" + xvmaddmsp %x0,%x1,%x3" [(set_attr "type" "vecfloat")]) (define_insn "*vsx_fmav2df4" @@ -2075,18 +2073,17 @@ [(set_attr "type" "")]) (define_insn "*vsx_nfmsv4sf4" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v") + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa") (neg:V4SF (fma:V4SF - (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v") - (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v") + (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa") + (match_operand:V4SF 2 "vsx_register_operand" "wa,0") (neg:V4SF - (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))))] + (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))))] "VECTOR_UNIT_VSX_P (V4SFmode)" "@ xvnmsubasp %x0,%x1,%x2 - xvnmsubmsp %x0,%x1,%x3 - vnmsubfp %0,%1,%2,%3" + xvnmsubmsp %x0,%x1,%x3" [(set_attr "type" "vecfloat")]) (define_insn "*vsx_nfmsv2df4" @@ -4565,8 +4562,8 @@ rtx op1 = operands[1]; if (MEM_P (op1)) operands[1] = rs6000_force_indexed_or_indirect_mem (op1); - else if (!REG_P (op1)) - op1 = force_reg (mode, op1); + else + operands[1] = force_reg (mode, op1); }) (define_insn "vsx_splat__reg" @@ -4697,12 +4694,14 @@ (const_int 1) (const_int 5)])))] "VECTOR_MEM_VSX_P (mode)" { - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrghw_direct_ - : gen_altivec_vmrglw_direct_; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn (gen_altivec_vmrghw_direct_v4si_be (operands[0], + operands[1], + operands[2])); + else + emit_insn (gen_altivec_vmrglw_direct_v4si_le (operands[0], + operands[2], + operands[1])); DONE; } [(set_attr "type" "vecperm")]) @@ -4717,12 +4716,14 @@ (const_int 3) (const_int 7)])))] "VECTOR_MEM_VSX_P (mode)" { - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrglw_direct_ - : gen_altivec_vmrghw_direct_; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); + if (BYTES_BIG_ENDIAN) + emit_insn (gen_altivec_vmrglw_direct_v4si_be (operands[0], + operands[1], + operands[2])); + else + emit_insn (gen_altivec_vmrghw_direct_v4si_le (operands[0], + operands[2], + operands[1])); DONE; } [(set_attr "type" "vecperm")]) @@ -4919,27 +4920,9 @@ "vextsd2q %0,%1" [(set_attr "type" "vecexts")]) -(define_expand "vsignextend_v2di_v1ti" - [(set (match_operand:V1TI 0 "vsx_register_operand" "=v") - (unspec:V1TI [(match_operand:V2DI 1 "vsx_register_operand" "v")] - UNSPEC_VSX_SIGN_EXTEND))] - "TARGET_POWER10" -{ - if (BYTES_BIG_ENDIAN) - { - rtx tmp = gen_reg_rtx (V2DImode); - - emit_insn (gen_altivec_vrevev2di2(tmp, operands[1])); - emit_insn (gen_vsx_sign_extend_v2di_v1ti(operands[0], tmp)); - DONE; - } - - emit_insn (gen_vsx_sign_extend_v2di_v1ti(operands[0], operands[1])); -}) - ;; ISA 3.0 vector extend sign support -(define_insn "vsx_sign_extend_qi_" +(define_insn "vsx_sign_extend_v16qi_" [(set (match_operand:VSINT_84 0 "vsx_register_operand" "=v") (unspec:VSINT_84 [(match_operand:V16QI 1 "vsx_register_operand" "v")] @@ -4948,25 +4931,7 @@ "vextsb2 %0,%1" [(set_attr "type" "vecexts")]) -(define_expand "vsignextend_qi_" - [(set (match_operand:VIlong 0 "vsx_register_operand" "=v") - (unspec:VIlong - [(match_operand:V16QI 1 "vsx_register_operand" "v")] - UNSPEC_VSX_SIGN_EXTEND))] - "TARGET_P9_VECTOR" -{ - if (BYTES_BIG_ENDIAN) - { - rtx tmp = gen_reg_rtx (V16QImode); - emit_insn (gen_altivec_vrevev16qi2(tmp, operands[1])); - emit_insn (gen_vsx_sign_extend_qi_(operands[0], tmp)); - } - else - emit_insn (gen_vsx_sign_extend_qi_(operands[0], operands[1])); - DONE; -}) - -(define_insn "vsx_sign_extend_hi_" +(define_insn "vsx_sign_extend_v8hi_" [(set (match_operand:VSINT_84 0 "vsx_register_operand" "=v") (unspec:VSINT_84 [(match_operand:V8HI 1 "vsx_register_operand" "v")] @@ -4975,25 +4940,7 @@ "vextsh2 %0,%1" [(set_attr "type" "vecexts")]) -(define_expand "vsignextend_hi_" - [(set (match_operand:VIlong 0 "vsx_register_operand" "=v") - (unspec:VIlong - [(match_operand:V8HI 1 "vsx_register_operand" "v")] - UNSPEC_VSX_SIGN_EXTEND))] - "TARGET_P9_VECTOR" -{ - if (BYTES_BIG_ENDIAN) - { - rtx tmp = gen_reg_rtx (V8HImode); - emit_insn (gen_altivec_vrevev8hi2(tmp, operands[1])); - emit_insn (gen_vsx_sign_extend_hi_(operands[0], tmp)); - } - else - emit_insn (gen_vsx_sign_extend_hi_(operands[0], operands[1])); - DONE; -}) - -(define_insn "vsx_sign_extend_si_v2di" +(define_insn "vsx_sign_extend_v4si_v2di" [(set (match_operand:V2DI 0 "vsx_register_operand" "=v") (unspec:V2DI [(match_operand:V4SI 1 "vsx_register_operand" "v")] UNSPEC_VSX_SIGN_EXTEND))] @@ -5001,24 +4948,6 @@ "vextsw2d %0,%1" [(set_attr "type" "vecexts")]) -(define_expand "vsignextend_si_v2di" - [(set (match_operand:V2DI 0 "vsx_register_operand" "=v") - (unspec:V2DI [(match_operand:V4SI 1 "vsx_register_operand" "v")] - UNSPEC_VSX_SIGN_EXTEND))] - "TARGET_P9_VECTOR" -{ - if (BYTES_BIG_ENDIAN) - { - rtx tmp = gen_reg_rtx (V4SImode); - - emit_insn (gen_altivec_vrevev4si2(tmp, operands[1])); - emit_insn (gen_vsx_sign_extend_si_v2di(operands[0], tmp)); - } - else - emit_insn (gen_vsx_sign_extend_si_v2di(operands[0], operands[1])); - DONE; -}) - ;; Sign extend DI to TI. We provide both GPR targets and Altivec targets on ;; power10. On earlier systems, the machine independent code will generate a ;; shift left to sign extend the 64-bit value to 128-bit. @@ -6632,7 +6561,7 @@ (match_operand:QI 4 "u8bit_cint_operand" "n")] UNSPEC_XXEVAL))] "TARGET_POWER10" - "xxeval %0,%1,%2,%3,%4" + "xxeval %x0,%x1,%x2,%x3,%4" [(set_attr "type" "vecperm") (set_attr "prefixed" "yes")]) diff --git a/gcc/config/s390/3931.md b/gcc/config/s390/3931.md index bc97bc50b7860..ecd290abc0838 100644 --- a/gcc/config/s390/3931.md +++ b/gcc/config/s390/3931.md @@ -404,7 +404,6 @@ vlvgg, vlvgh, vlvgp, vst, -vstbr, vstbrf, vstbrg, vstbrh, @@ -627,7 +626,6 @@ tm, tmy, vl, vlbb, -vlbr, vlbrf, vlbrg, vlbrh, @@ -661,7 +659,6 @@ vlreph, vlrl, vlrlr, vst, -vstbr, vstbrf, vstbrg, vstbrh, @@ -1077,7 +1074,6 @@ vrepb, vrepf, vrepg, vreph, -vrepi, vrepib, vrepif, vrepig, @@ -1930,7 +1926,6 @@ vrepb, vrepf, vrepg, vreph, -vrepi, vrepib, vrepif, vrepig, @@ -2156,7 +2151,6 @@ vistrfs, vistrhs, vl, vlbb, -vlbr, vlbrf, vlbrg, vlbrh, @@ -2248,7 +2242,6 @@ tbegin, tbeginc, tend, vst, -vstbr, vstbrf, vstbrg, vstbrh, diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md index 33194d3f3d64d..430cf6edfd6c4 100644 --- a/gcc/config/s390/predicates.md +++ b/gcc/config/s390/predicates.md @@ -594,3 +594,15 @@ (define_predicate "addv_const_operand" (and (match_code "const_int") (match_test "INTVAL (op) >= -32768 && INTVAL (op) <= 32767"))) + +; Match (subreg (reg ...)) operands. +; Used for movstrict destination operands +; When replacing pseudos with hard regs reload strips away the +; subregs. Accept also plain registers then to prevent the insn from +; becoming unrecognizable. +(define_predicate "subreg_register_operand" + (ior (and (match_code "subreg") + (match_test "register_operand (SUBREG_REG (op), GET_MODE (SUBREG_REG (op)))")) + (and (match_code "reg") + (match_test "reload_completed || reload_in_progress") + (match_test "register_operand (op, GET_MODE (op))")))) diff --git a/gcc/config/s390/s390-d.cc b/gcc/config/s390/s390-d.cc index 8e631859e6745..0dd4b5c999bb1 100644 --- a/gcc/config/s390/s390-d.cc +++ b/gcc/config/s390/s390-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/s390/s390-d.h b/gcc/config/s390/s390-d.h new file mode 100644 index 0000000000000..703031b3c8190 --- /dev/null +++ b/gcc/config/s390/s390-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the IBM S/390 and zSeries architectures. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* s390-d.cc routines */ +extern void s390_d_target_versions (void); +extern void s390_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS s390_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO s390_d_register_target_info diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index fd4acaae44acd..7ce4c52abe9b5 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -174,10 +174,6 @@ extern void s390_register_target_pragmas (void); /* Routines for s390-c.cc */ extern bool s390_const_operand_ok (tree, int, int, tree); -/* s390-d.cc routines */ -extern void s390_d_target_versions (void); -extern void s390_d_register_target_info (void); - /* Pass management. */ namespace gcc { class context; } class rtl_opt_pass; diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc index 7c3bd6cbe7f8c..a8f804ffe4f78 100644 --- a/gcc/config/s390/s390.cc +++ b/gcc/config/s390/s390.cc @@ -3405,6 +3405,18 @@ s390_mem_constraint (const char *str, rtx op) if ((reload_completed || reload_in_progress) ? !offsettable_memref_p (op) : !offsettable_nonstrict_memref_p (op)) return 0; + /* offsettable_memref_p ensures only that any positive offset added to + the address forms a valid general address. For AQ and AR constraints + we also have to verify that the resulting displacement after adding + any positive offset less than the size of the object being referenced + is still valid. */ + if (str[1] == 'Q' || str[1] == 'R') + { + int o = GET_MODE_SIZE (GET_MODE (op)) - 1; + rtx tmp = adjust_address (op, QImode, o); + if (!s390_check_qrst_address (str[1], XEXP (tmp, 0), true)) + return 0; + } return s390_check_qrst_address (str[1], XEXP (op, 0), true); case 'B': /* Check for non-literal-pool variants of memory constraints. */ @@ -6520,14 +6532,20 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) if (smode_bsize == bitsize && bitpos == mode_bsize - smode_bsize) { rtx low_dest = gen_lowpart (smode, dest); - rtx low_src = gen_lowpart (smode, src); - - switch (smode) + if (SUBREG_P (low_dest) && !paradoxical_subreg_p (low_dest)) { - case E_QImode: emit_insn (gen_movstrictqi (low_dest, low_src)); return true; - case E_HImode: emit_insn (gen_movstricthi (low_dest, low_src)); return true; - case E_SImode: emit_insn (gen_movstrictsi (low_dest, low_src)); return true; - default: break; + poly_int64 offset = GET_MODE_SIZE (mode) - GET_MODE_SIZE (smode); + rtx low_src = adjust_address (src, smode, offset); + switch (smode) + { + case E_QImode: emit_insn (gen_movstrictqi (low_dest, low_src)); + return true; + case E_HImode: emit_insn (gen_movstricthi (low_dest, low_src)); + return true; + case E_SImode: emit_insn (gen_movstrictsi (low_dest, low_src)); + return true; + default: break; + } } } @@ -8010,7 +8028,6 @@ print_operand_address (FILE *file, rtx addr) CONST_VECTOR: Generate a bitmask for vgbm instruction. 'x': print integer X as if it's an unsigned halfword. 'v': print register number as vector register (v1 instead of f1). - 'V': print the second word of a TFmode operand as vector register. */ void @@ -8203,13 +8220,13 @@ print_operand (FILE *file, rtx x, int code) case REG: /* Print FP regs as fx instead of vx when they are accessed through non-vector mode. */ - if ((code == 'v' || code == 'V') + if (code == 'v' || VECTOR_NOFP_REG_P (x) || (FP_REG_P (x) && VECTOR_MODE_P (GET_MODE (x))) || (VECTOR_REG_P (x) && (GET_MODE_SIZE (GET_MODE (x)) / s390_class_max_nregs (FP_REGS, GET_MODE (x))) > 8)) - fprintf (file, "%%v%s", reg_names[REGNO (x) + (code == 'V')] + 2); + fprintf (file, "%%v%s", reg_names[REGNO (x)] + 2); else fprintf (file, "%s", reg_names[REGNO (x)]); break; @@ -13711,36 +13728,37 @@ s390_call_saved_register_used (tree call_expr) function_arg_info arg (TREE_TYPE (parameter), /*named=*/true); apply_pass_by_reference_rules (&cum_v, arg); - parm_rtx = s390_function_arg (cum, arg); + parm_rtx = s390_function_arg (cum, arg); - s390_function_arg_advance (cum, arg); + s390_function_arg_advance (cum, arg); - if (!parm_rtx) - continue; - - if (REG_P (parm_rtx)) - { - for (reg = 0; reg < REG_NREGS (parm_rtx); reg++) - if (!call_used_or_fixed_reg_p (reg + REGNO (parm_rtx))) - return true; - } + if (!parm_rtx) + continue; - if (GET_CODE (parm_rtx) == PARALLEL) - { - int i; + if (REG_P (parm_rtx)) + { + int size = s390_function_arg_size (arg.mode, arg.type); + int nregs = (size + UNITS_PER_LONG - 1) / UNITS_PER_LONG; - for (i = 0; i < XVECLEN (parm_rtx, 0); i++) - { - rtx r = XEXP (XVECEXP (parm_rtx, 0, i), 0); + for (reg = 0; reg < nregs; reg++) + if (!call_used_or_fixed_reg_p (reg + REGNO (parm_rtx))) + return true; + } + else if (GET_CODE (parm_rtx) == PARALLEL) + { + int i; - gcc_assert (REG_P (r)); + for (i = 0; i < XVECLEN (parm_rtx, 0); i++) + { + rtx r = XEXP (XVECEXP (parm_rtx, 0, i), 0); - for (reg = 0; reg < REG_NREGS (r); reg++) - if (!call_used_or_fixed_reg_p (reg + REGNO (r))) - return true; - } - } + gcc_assert (REG_P (r)); + gcc_assert (REG_NREGS (r) == 1); + if (!call_used_or_fixed_reg_p (REGNO (r))) + return true; + } + } } return false; } diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 2e1bc71e73afd..1114222cd4afb 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -247,10 +247,6 @@ enum processor_flags /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile) -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS s390_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO s390_d_register_target_info - #ifdef DEFAULT_TARGET_64BIT #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \ | MASK_OPT_HTM | MASK_OPT_VX) diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 55c0064bba84e..335aff9884e20 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -244,6 +244,8 @@ UNSPEC_VEC_ELTSWAP + UNSPEC_TF_TO_FPRX2 + UNSPEC_NNPA_VCLFNHS_V8HI UNSPEC_NNPA_VCLFNLS_V8HI UNSPEC_NNPA_VCRNFS_V8HI @@ -745,7 +747,7 @@ ;; In FP templates, a in "mr" will expand to "mxr" in ;; TF/TDmode, "mdr" in DF/DDmode, "meer" in SFmode and "mer in ;; SDmode. -(define_mode_attr xdee [(TF "x") (DF "d") (SF "ee") (TD "x") (DD "d") (SD "e")]) +(define_mode_attr xdee [(TF "x") (FPRX2 "x") (DF "d") (SF "ee") (TD "x") (DD "d") (SD "e")]) ;; The decimal floating point variants of add, sub, div and mul support 3 ;; fp register operands. The following attributes allow to merge the bfp and @@ -2522,13 +2524,14 @@ [(set (match_dup 0) (match_dup 2))] "operands[2] = get_pool_constant (operands[1]);") + ; -; movstrictqi instruction pattern(s). +; movstrict instruction pattern(s). ; (define_insn "movstrictqi" - [(set (strict_low_part (match_operand:QI 0 "register_operand" "+d,d")) - (match_operand:QI 1 "memory_operand" "R,T"))] + [(set (strict_low_part (match_operand:QI 0 "subreg_register_operand" "+d,d")) + (match_operand:QI 1 "memory_operand" "R,T"))] "" "@ ic\t%0,%1 @@ -2537,13 +2540,9 @@ (set_attr "cpu_facility" "*,longdisp") (set_attr "z10prop" "z10_super_E1,z10_super_E1")]) -; -; movstricthi instruction pattern(s). -; - (define_insn "movstricthi" - [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d,d")) - (match_operand:HI 1 "memory_operand" "Q,S")) + [(set (strict_low_part (match_operand:HI 0 "subreg_register_operand" "+d,d")) + (match_operand:HI 1 "memory_operand" "Q,S")) (clobber (reg:CC CC_REGNUM))] "" "@ @@ -2553,13 +2552,9 @@ (set_attr "cpu_facility" "*,longdisp") (set_attr "z10prop" "z10_super_E1,z10_super_E1")]) -; -; movstrictsi instruction pattern(s). -; - (define_insn "movstrictsi" - [(set (strict_low_part (match_operand:SI 0 "register_operand" "+d,d,d,d")) - (match_operand:SI 1 "general_operand" "d,R,T,t"))] + [(set (strict_low_part (match_operand:SI 0 "subreg_register_operand" "+d,d,d,d")) + (match_operand:SI 1 "general_operand" "d,R,T,t"))] "TARGET_ZARCH" "@ lr\t%0,%1 @@ -9478,7 +9473,8 @@ (define_insn "*icjump_64" [(set (pc) (if_then_else - (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)]) + (match_operator 1 "s390_comparison" [(reg CC_REGNUM) + (match_operand 2 "const_int_operand" "")]) (pc) (label_ref (match_operand 0 "" ""))))] "" diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index a6c4b4eb9744d..ac3816a6f5c66 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -63,6 +63,12 @@ V1DF V2DF (V1TF "TARGET_VXE") (TF "TARGET_VXE")]) +; All modes present in V_HW and VFT. +(define_mode_iterator V_HW_FT [V16QI V8HI V4SI V2DI (V1TI "TARGET_VXE") V1DF + V2DF (V1SF "TARGET_VXE") (V2SF "TARGET_VXE") + (V4SF "TARGET_VXE") (V1TF "TARGET_VXE") + (TF "TARGET_VXE")]) + ; FP vector modes directly supported by the HW. This does not include ; vector modes using only part of a vector register and should be used ; for instructions which might trigger IEEE exceptions. @@ -128,7 +134,7 @@ (V1TI "q") (TI "q") (V1SF "f") (V2SF "f") (V4SF "f") (V1DF "g") (V2DF "g") - (V1TF "q")]) + (V1TF "q") (TF "q")]) ; This is for vmalhw. It gets an 'w' attached to avoid confusion with ; multiply and add logical high vmalh. @@ -351,8 +357,8 @@ lr\t%0,%1 mvi\t%0,0 mviy\t%0,0 - mvi\t%0,-1 - mviy\t%0,-1 + mvi\t%0,255 + mviy\t%0,255 lhi\t%0,0 lhi\t%0,-1 llc\t%0,%1 @@ -894,36 +900,45 @@ "vmrlg\t%0,%1,%2"; [(set_attr "op_type" "VRR")]) - -(define_insn "*tf_to_fprx2_0" - [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "+f") 0) - (subreg:DF (match_operand:TF 1 "general_operand" "v") 0))] - "TARGET_VXE" - ; M4 == 1 corresponds to %v0[0] = %v1[0]; %v0[1] = %v0[1]; - "vpdi\t%v0,%v1,%v0,1" - [(set_attr "op_type" "VRR")]) - -(define_insn "*tf_to_fprx2_1" - [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "+f") 8) - (subreg:DF (match_operand:TF 1 "general_operand" "v") 8))] - "TARGET_VXE" - ; M4 == 5 corresponds to %V0[0] = %v1[1]; %V0[1] = %V0[1]; - "vpdi\t%V0,%v1,%V0,5" - [(set_attr "op_type" "VRR")]) - -(define_insn_and_split "tf_to_fprx2" - [(set (match_operand:FPRX2 0 "nonimmediate_operand" "=f,f") - (subreg:FPRX2 (match_operand:TF 1 "general_operand" "v,AR") 0))] +(define_insn "tf_to_fprx2" + [(set (match_operand:FPRX2 0 "register_operand" "=f,f ,f") + (unspec:FPRX2 [(match_operand:TF 1 "general_operand" "v,AR,AT")] + UNSPEC_TF_TO_FPRX2))] "TARGET_VXE" - "#" - "!(MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))" - [(set (match_dup 2) (match_dup 3)) - (set (match_dup 4) (match_dup 5))] { - operands[2] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 0); - operands[3] = simplify_gen_subreg (DFmode, operands[1], TFmode, 0); - operands[4] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 8); - operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, 8); + char buf[64]; + const char *reg_pair = reg_names[REGNO (operands[0]) + 1]; + switch (which_alternative) + { + case 0: + if (REGNO (operands[0]) == REGNO (operands[1])) + { + reg_pair += 2; // get rid of prefix %f + snprintf (buf, sizeof (buf), "vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair); + output_asm_insn (buf, operands); + return ""; + } + else + { + reg_pair += 2; // get rid of prefix %f + snprintf (buf, sizeof (buf), "ldr\t%%f0,%%f1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair); + output_asm_insn (buf, operands); + return ""; + } + case 1: + { + snprintf (buf, sizeof (buf), "ld\t%%f0,%%1;ld\t%%%s,8+%%1", reg_pair); + output_asm_insn (buf, operands); + return ""; + } + case 2: + { + snprintf (buf, sizeof (buf), "ldy\t%%f0,%%1;ldy\t%%%s,8+%%1", reg_pair); + output_asm_insn (buf, operands); + return ""; + } + default: gcc_unreachable (); + } }) @@ -2542,9 +2557,8 @@ ; There is no instruction for rounding an extended BFP operand in a VR into ; a signed integer, therefore copy it into a FPR pair first. (define_expand "fix_trunctf2_vr" - [(set (subreg:DF (match_dup 2) 0) - (subreg:DF (match_operand:TF 1 "register_operand" "") 0)) - (set (subreg:DF (match_dup 2) 8) (subreg:DF (match_dup 1) 8)) + [(set (match_dup 2) + (unspec:FPRX2 [(match_operand:TF 1 "register_operand")] UNSPEC_TF_TO_FPRX2)) (parallel [(set (match_operand:GPR 0 "register_operand" "") (fix:GPR (match_dup 2))) (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND) @@ -2576,9 +2590,8 @@ ; There is no instruction for rounding an extended BFP operand in a VR into ; an unsigned integer, therefore copy it into a FPR pair first. (define_expand "fixuns_trunctf2_vr" - [(set (subreg:DF (match_dup 2) 0) - (subreg:DF (match_operand:TF 1 "register_operand" "") 0)) - (set (subreg:DF (match_dup 2) 8) (subreg:DF (match_dup 1) 8)) + [(set (match_dup 2) + (unspec:FPRX2 [(match_operand:TF 1 "register_operand")] UNSPEC_TF_TO_FPRX2)) (parallel [(set (match_operand:GPR 0 "register_operand" "") (unsigned_fix:GPR (match_dup 2))) (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND) diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index d51307998044c..98ee08b26833e 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -517,12 +517,12 @@ ; swapped in s390-c.cc when we get here. (define_insn "vsel" - [(set (match_operand:V_HW 0 "register_operand" "=v") - (ior:V_HW - (and:V_HW (match_operand:V_HW 1 "register_operand" "v") - (match_operand:V_HW 3 "register_operand" "v")) - (and:V_HW (not:V_HW (match_dup 3)) - (match_operand:V_HW 2 "register_operand" "v"))))] + [(set (match_operand:V_HW_FT 0 "register_operand" "=v") + (ior:V_HW_FT + (and:V_HW_FT (match_operand:V_HW_FT 1 "register_operand" "v") + (match_operand:V_HW_FT 3 "register_operand" "v")) + (and:V_HW_FT (not:V_HW_FT (match_dup 3)) + (match_operand:V_HW_FT 2 "register_operand" "v"))))] "TARGET_VX" "vsel\t%v0,%1,%2,%3" [(set_attr "op_type" "VRR")]) diff --git a/gcc/config/sh/sh.cc b/gcc/config/sh/sh.cc index 8d4056338a54f..5455c3fddaaf2 100644 --- a/gcc/config/sh/sh.cc +++ b/gcc/config/sh/sh.cc @@ -10762,6 +10762,12 @@ sh_register_move_cost (machine_mode mode, && ! REGCLASS_HAS_GENERAL_REG (dstclass)) return 2 * ((GET_MODE_SIZE (mode) + 7) / 8U); + if (((dstclass == FP_REGS || dstclass == DF_REGS) + && (srcclass == PR_REGS)) + || ((srcclass == FP_REGS || srcclass == DF_REGS) + && (dstclass == PR_REGS))) + return 7; + return 2 * ((GET_MODE_SIZE (mode) + 3) / 4U); } @@ -11760,7 +11766,8 @@ sh_insn_operands_modified_between_p (rtx_insn* operands_insn, bool sh_is_nott_insn (const rtx_insn* i) { - return i != NULL && GET_CODE (PATTERN (i)) == SET + return i != NULL_RTX && PATTERN (i) != NULL_RTX + && GET_CODE (PATTERN (i)) == SET && t_reg_operand (XEXP (PATTERN (i), 0), VOIDmode) && negt_reg_operand (XEXP (PATTERN (i), 1), VOIDmode); } @@ -12271,7 +12278,17 @@ sh_recog_treg_set_expr (rtx op, machine_mode mode) have to capture its current state and restore it afterwards. */ recog_data_d prev_recog_data = recog_data; - rtx_insn* i = make_insn_raw (gen_rtx_SET (get_t_reg_rtx (), op)); + /* Note we can't use insn_raw here since that increases the uid + and could cause debug compare differences; this insn never leaves + this function so create a dummy one. */ + rtx_insn* i = as_a (rtx_alloc (INSN)); + + INSN_UID (i) = 1; + PATTERN (i) = gen_rtx_SET (get_t_reg_rtx (), op); + INSN_CODE (i) = -1; + REG_NOTES (i) = NULL; + INSN_LOCATION (i) = curr_insn_location (); + BLOCK_FOR_INSN (i) = NULL; SET_PREV_INSN (i) = NULL; SET_NEXT_INSN (i) = NULL; diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 59a7b21643381..e11e8a5a40df6 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -842,7 +842,7 @@ if (SUBREG_P (reg)) reg = SUBREG_REG (reg); gcc_assert (REG_P (reg)); - if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) != NULL_RTX) + if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) == NULL_RTX) FAIL; /* FIXME: Maybe also search the predecessor basic blocks to catch @@ -10680,6 +10680,45 @@ && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[0])" [(const_int 0)] { + if (MEM_P (operands[3]) && reg_overlap_mentioned_p (operands[0], operands[3])) + { + // Take care when the eliminated operand[0] register is part of + // the destination memory address. + rtx addr = XEXP (operands[3], 0); + + if (REG_P (addr)) + operands[3] = replace_equiv_address (operands[3], operands[1]); + + else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0)) + && CONST_INT_P (XEXP (addr, 1)) + && REGNO (operands[0]) == REGNO (XEXP (addr, 0))) + operands[3] = replace_equiv_address (operands[3], + gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1))); + + else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0)) + && REG_P (XEXP (addr, 1))) + { + // register + register address @(R0, Rn) + // can change only the Rn in the address, not R0. + if (REGNO (operands[0]) == REGNO (XEXP (addr, 0)) + && REGNO (XEXP (addr, 0)) != 0) + { + operands[3] = replace_equiv_address (operands[3], + gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1))); + } + else if (REGNO (operands[0]) == REGNO (XEXP (addr, 1)) + && REGNO (XEXP (addr, 1)) != 0) + { + operands[3] = replace_equiv_address (operands[3], + gen_rtx_PLUS (SImode, XEXP (addr, 0), operands[1])); + } + else + FAIL; + } + else + FAIL; + } + emit_insn (gen_addsi3 (operands[1], operands[1], operands[2])); sh_peephole_emit_move_insn (operands[3], operands[1]); }) diff --git a/gcc/config/sh/sh_treg_combine.cc b/gcc/config/sh/sh_treg_combine.cc index f6553c04a0dca..685ca542046f2 100644 --- a/gcc/config/sh/sh_treg_combine.cc +++ b/gcc/config/sh/sh_treg_combine.cc @@ -732,7 +732,14 @@ sh_treg_combine::record_set_of_reg (rtx reg, rtx_insn *start_insn, } else if (REG_P (new_entry.cstore.set_src ())) { - // If it's a reg-reg copy follow the copied reg. + // If it's a reg-reg copy follow the copied reg, but ignore + // nop copies of the reg onto itself. + if (REGNO (new_entry.cstore.set_src ()) == REGNO (reg)) + { + i = prev_nonnote_nondebug_insn_bb (i); + continue; + } + new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore); reg = new_entry.cstore.set_src (); i = new_entry.cstore.insn; diff --git a/gcc/config/sol2-d.cc b/gcc/config/sol2-d.cc index 9caa82e84908c..cecb49cc8269f 100644 --- a/gcc/config/sol2-d.cc +++ b/gcc/config/sol2-d.cc @@ -19,8 +19,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" -#include "memmodel.h" -#include "tm_p.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/sparc/sparc-d.cc b/gcc/config/sparc/sparc-d.cc index 1f3a9666b97ef..f8a3cf30f25fd 100644 --- a/gcc/config/sparc/sparc-d.cc +++ b/gcc/config/sparc/sparc-d.cc @@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "tm_d.h" #include "d/d-target.h" #include "d/d-target-def.h" diff --git a/gcc/config/sparc/sparc-d.h b/gcc/config/sparc/sparc-d.h new file mode 100644 index 0000000000000..b9d8ccf15ab14 --- /dev/null +++ b/gcc/config/sparc/sparc-d.h @@ -0,0 +1,24 @@ +/* Definitions for the D front end on the SPARC architecture. + Copyright (C) 2022 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +/* Routines implemented in sparc-d.cc */ +extern void sparc_d_target_versions (void); +extern void sparc_d_register_target_info (void); + +/* Target hooks for D language. */ +#define TARGET_D_CPU_VERSIONS sparc_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO sparc_d_register_target_info diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index f9e1c74554d3a..4ddd00c81e1a9 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -112,8 +112,4 @@ unsigned int sparc_regmode_natural_size (machine_mode); extern rtl_opt_pass *make_pass_work_around_errata (gcc::context *); -/* Routines implemented in sparc-d.cc */ -extern void sparc_d_target_versions (void); -extern void sparc_d_register_target_info (void); - #endif /* __SPARC_PROTOS_H__ */ diff --git a/gcc/config/sparc/sparc.cc b/gcc/config/sparc/sparc.cc index 467a9f171d2c0..27db12e6baf31 100644 --- a/gcc/config/sparc/sparc.cc +++ b/gcc/config/sparc/sparc.cc @@ -6050,6 +6050,9 @@ sparc_expand_prologue (void) } RTX_FRAME_RELATED_P (insn) = 1; + + /* Ensure no memory access is done before the frame is established. */ + emit_insn (gen_frame_blockage ()); } else { @@ -6064,13 +6067,7 @@ sparc_expand_prologue (void) /* %sp is not the CFA register anymore. */ emit_insn (gen_stack_pointer_inc (GEN_INT (4096 - size))); - /* Make sure no %fp-based store is issued until after the frame is - established. The offset between the frame pointer and the stack - pointer is calculated relative to the value of the stack pointer - at the end of the function prologue, and moving instructions that - access the stack via the frame pointer between the instructions - that decrement the stack pointer could result in accessing the - register window save area, which is volatile. */ + /* Likewise. */ emit_insn (gen_frame_blockage ()); } else @@ -6166,8 +6163,8 @@ sparc_flat_expand_prologue (void) } RTX_FRAME_RELATED_P (insn) = 1; - /* Ensure nothing is scheduled until after the frame is established. */ - emit_insn (gen_blockage ()); + /* Ensure no memory access is done before the frame is established. */ + emit_insn (gen_frame_blockage ()); if (frame_pointer_needed) { @@ -6254,6 +6251,9 @@ sparc_expand_epilogue (bool for_eh) ; /* do nothing. */ else if (sparc_leaf_function_p) { + /* Ensure no memory access is done after the frame is destroyed. */ + emit_insn (gen_frame_blockage ()); + if (size <= 4096) emit_insn (gen_stack_pointer_inc (GEN_INT (size))); else if (size <= 8192) @@ -6304,15 +6304,15 @@ sparc_flat_expand_epilogue (bool for_eh) ; /* do nothing. */ else if (frame_pointer_needed) { - /* Make sure the frame is destroyed after everything else is done. */ - emit_insn (gen_blockage ()); + /* Ensure no memory access is done after the frame is destroyed. */ + emit_insn (gen_frame_blockage ()); emit_move_insn (stack_pointer_rtx, gen_rtx_REG (Pmode, 1)); } else { /* Likewise. */ - emit_insn (gen_blockage ()); + emit_insn (gen_frame_blockage ()); if (size <= 4096) emit_insn (gen_stack_pointer_inc (GEN_INT (size))); @@ -13041,9 +13041,9 @@ sparc_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0, if (!TARGET_VIS2) return false; - /* All permutes are supported. */ + /* All 8-byte permutes are supported. */ if (!target) - return true; + return GET_MODE_SIZE (vmode) == 8; /* Force target-independent code to convert constant permutations on other modes down to V8QI. Rely on this to avoid the complexity of the byte @@ -13657,18 +13657,16 @@ sparc_expand_conditional_move (machine_mode mode, rtx *operands) void sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode) { + enum rtx_code code = signed_condition (GET_CODE (operands[3])); rtx mask, cop0, cop1, fcmp, cmask, bshuf, gsr; - enum rtx_code code = GET_CODE (operands[3]); mask = gen_reg_rtx (Pmode); cop0 = operands[4]; cop1 = operands[5]; if (code == LT || code == GE) { - rtx t; - code = swap_condition (code); - t = cop0; cop0 = cop1; cop1 = t; + std::swap (cop0, cop1); } gsr = gen_rtx_REG (DImode, SPARC_GSR_REG); diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 2e17fca197a33..91917c3eaadbf 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -27,10 +27,6 @@ along with GCC; see the file COPYING3. If not see #define TARGET_CPU_CPP_BUILTINS() sparc_target_macros () -/* Target hooks for D language. */ -#define TARGET_D_CPU_VERSIONS sparc_d_target_versions -#define TARGET_D_REGISTER_CPU_TARGET_INFO sparc_d_register_target_info - /* Specify this in a cover file to provide bi-architecture (32/64) support. */ /* #define SPARC_BI_ARCH */ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 691e707863a2e..a6775ac5c042e 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -9033,6 +9033,50 @@ visl") DONE; }) +(define_expand "vcondv8qiv8qi" + [(match_operand:V8QI 0 "register_operand" "") + (match_operand:V8QI 1 "register_operand" "") + (match_operand:V8QI 2 "register_operand" "") + (match_operator 3 "" + [(match_operand:V8QI 4 "register_operand" "") + (match_operand:V8QI 5 "register_operand" "")])] + "TARGET_VIS4" +{ + sparc_expand_vcond (V8QImode, operands, UNSPEC_CMASK8, UNSPEC_FCMP); + DONE; +}) + +(define_insn "fucmp8_vis" + [(set (match_operand:P 0 "register_operand" "=r") + (unspec:P [(gcond:V8QI (match_operand:V8QI 1 "register_operand" "e") + (match_operand:V8QI 2 "register_operand" "e"))] + UNSPEC_FUCMP))] + "TARGET_VIS3" + "fucmp8\t%1, %2, %0" + [(set_attr "type" "viscmp")]) + +(define_insn "fpcmpu_vis" + [(set (match_operand:P 0 "register_operand" "=r") + (unspec:P [(gcond:GCM (match_operand:GCM 1 "register_operand" "e") + (match_operand:GCM 2 "register_operand" "e"))] + UNSPEC_FUCMP))] + "TARGET_VIS4" + "fpcmpu\t%1, %2, %0" + [(set_attr "type" "viscmp")]) + +(define_expand "vcondu" + [(match_operand:GCM 0 "register_operand" "") + (match_operand:GCM 1 "register_operand" "") + (match_operand:GCM 2 "register_operand" "") + (match_operator 3 "" + [(match_operand:GCM 4 "register_operand" "") + (match_operand:GCM 5 "register_operand" "")])] + "TARGET_VIS4" +{ + sparc_expand_vcond (mode, operands, UNSPEC_CMASK, UNSPEC_FUCMP); + DONE; +}) + (define_expand "vconduv8qiv8qi" [(match_operand:V8QI 0 "register_operand" "") (match_operand:V8QI 1 "register_operand" "") @@ -9351,24 +9395,6 @@ visl") [(set_attr "type" "fga") (set_attr "subtype" "other")]) -(define_insn "fucmp8_vis" - [(set (match_operand:P 0 "register_operand" "=r") - (unspec:P [(gcond:V8QI (match_operand:V8QI 1 "register_operand" "e") - (match_operand:V8QI 2 "register_operand" "e"))] - UNSPEC_FUCMP))] - "TARGET_VIS3" - "fucmp8\t%1, %2, %0" - [(set_attr "type" "viscmp")]) - -(define_insn "fpcmpu_vis" - [(set (match_operand:P 0 "register_operand" "=r") - (unspec:P [(gcond:GCM (match_operand:GCM 1 "register_operand" "e") - (match_operand:GCM 2 "register_operand" "e"))] - UNSPEC_FUCMP))] - "TARGET_VIS4" - "fpcmpu\t%1, %2, %0" - [(set_attr "type" "viscmp")]) - (define_insn "*naddsf3" [(set (match_operand:SF 0 "register_operand" "=f") (neg:SF (plus:SF (match_operand:SF 1 "register_operand" "f") diff --git a/gcc/config/tilepro/gen-mul-tables.cc b/gcc/config/tilepro/gen-mul-tables.cc index c9649fb9c70eb..ff7c3c905bc97 100644 --- a/gcc/config/tilepro/gen-mul-tables.cc +++ b/gcc/config/tilepro/gen-mul-tables.cc @@ -1190,11 +1190,11 @@ tilegx_emit (long long multiplier, int num_ops) long long next_pow10; while (((j * 10) < abs_multiplier) - && (j < (INTMAX_MAX / 10))) + && (j < (j * 10))) j = j * 10; prev_pow10 = j; - next_pow10 = (j > (INTMAX_MAX / 10)) ? 0 : j * 10; + next_pow10 = j * 10; if ((abs_multiplier - prev_pow10 <= 100) || (next_pow10 diff --git a/gcc/config/vax/vax.cc b/gcc/config/vax/vax.cc index f44e23d1796a2..db797dc393ac7 100644 --- a/gcc/config/vax/vax.cc +++ b/gcc/config/vax/vax.cc @@ -1833,7 +1833,9 @@ nonindexed_address_p (rtx x, bool strict) } /* True if PROD is either a reg times size of mode MODE and MODE is less - than or equal 8 bytes, or just a reg if MODE is one byte. */ + than or equal 8 bytes, or just a reg if MODE is one byte. For a MULT + RTX we accept its operands in either order, however ASHIFT is not + commutative, so in that case reg has to be the left operand. */ static bool index_term_p (rtx prod, machine_mode mode, bool strict) @@ -1852,8 +1854,9 @@ index_term_p (rtx prod, machine_mode mode, bool strict) xfoo0 = XEXP (prod, 0); xfoo1 = XEXP (prod, 1); - if (CONST_INT_P (xfoo0) - && GET_MODE_SIZE (mode) == (log_p ? 1 << INTVAL (xfoo0) : INTVAL (xfoo0)) + if (!log_p + && CONST_INT_P (xfoo0) + && GET_MODE_SIZE (mode) == INTVAL (xfoo0) && INDEX_REGISTER_P (xfoo1, strict)) return true; diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 3b61e5d40979b..25542353300bd 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -754,11 +754,14 @@ because of offering further optimization opportunities. */ if (register_operand (operands[0], DImode)) { - rtx first, second; - - split_double (operands[1], &first, &second); - emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]), first)); - emit_insn (gen_movsi (gen_highpart (SImode, operands[0]), second)); + rtx lowpart, highpart; + + if (TARGET_BIG_ENDIAN) + split_double (operands[1], &highpart, &lowpart); + else + split_double (operands[1], &lowpart, &highpart); + emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]), lowpart)); + emit_insn (gen_movsi (gen_highpart (SImode, operands[0]), highpart)); DONE; } diff --git a/gcc/configure b/gcc/configure index 5ce0557719a9f..f697874f2d8d2 100755 --- a/gcc/configure +++ b/gcc/configure @@ -3750,31 +3750,54 @@ gcc_gxx_libcxx_include_dir= if test "${with_gxx_libcxx_include_dir+set}" = set; then : withval=$with_gxx_libcxx_include_dir; case "${withval}" in yes) as_fn_error $? "bad value ${withval} given for libc++ include directory" "$LINENO" 5 ;; -no) ;; *) gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;; esac fi +# --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option. +# if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option. +# if --with-gxx-libcxx-include-dir is unset we enable the stdlib option +# based on the platform (to be available on platform versions where it is the +# default for the system tools). We also use a default path within the compiler +# install tree. +# Otherwise, we use the path provided and enable the stdlib option. # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we # check to see if the latter starts with the former and, upon success, compute # gcc_gxx_libcxx_include_dir as relative to the sysroot. gcc_gxx_libcxx_include_dir_add_sysroot=0 - +gcc_enable_stdlib_opt=0 if test x${gcc_gxx_libcxx_include_dir} != x; then + if test x${gcc_gxx_libcxx_include_dir} = xno; then + # set defaults for the dir, but the option is disabled anyway. + gcc_gxx_libcxx_include_dir= + else + gcc_enable_stdlib_opt=1 + fi +else + case $target in + *-darwin1[1-9]* | *-darwin2*) + # Default this on for Darwin versions which default to libcxx, + # and embed the path in the compiler install so that we get a + # self-contained toolchain. + gcc_enable_stdlib_opt=1 + ;; + *) ;; + esac +fi -$as_echo "#define ENABLE_STDLIB_OPTION 1" >>confdefs.h +cat >>confdefs.h <<_ACEOF +#define ENABLE_STDLIB_OPTION $gcc_enable_stdlib_opt +_ACEOF -else - $as_echo "#define ENABLE_STDLIB_OPTION 0" >>confdefs.h -fi -# ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO. +# Sysroot behaviour as for gxx-include-dir if test x${gcc_gxx_libcxx_include_dir} = x; then + # default path,embedded in the compiler tree. + libcxx_incdir='include/c++/v1' if test x${enable_version_specific_runtime_libs} = xyes; then - gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1' + gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir' else - libcxx_incdir='libc++_include/c++/$(version)/v1' if test x$host != x$target; then libcxx_incdir="$target_alias/$libcxx_incdir" fi @@ -13008,7 +13031,6 @@ fi tm_file="${tm_file} defaults.h" tm_p_file="${tm_p_file} tm-preds.h" -tm_d_file="${tm_d_file} defaults.h" host_xm_file="auto-host.h ansidecl.h ${host_xm_file}" build_xm_file="${build_auto} ansidecl.h ${build_xm_file}" # We don't want ansidecl.h in target files, write code there in ISO/GNU C. @@ -13403,13 +13425,9 @@ for f in $tm_p_file; do done tm_d_file_list= -tm_d_include_list="options.h insn-constants.h" +tm_d_include_list= for f in $tm_d_file; do case $f in - defaults.h ) - tm_d_file_list="${tm_d_file_list} \$(srcdir)/$f" - tm_d_include_list="${tm_d_include_list} $f" - ;; * ) tm_d_file_list="${tm_d_file_list} \$(srcdir)/config/$f" tm_d_include_list="${tm_d_include_list} config/$f" @@ -19673,7 +19691,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 19676 "configure" +#line 19694 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -19779,7 +19797,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 19782 "configure" +#line 19800 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -26107,6 +26125,39 @@ $as_echo "#define HAVE_AS_MMACOSX_VERSION_MIN_OPTION 1" >>confdefs.h fi + if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .build_version" >&5 +$as_echo_n "checking assembler for .build_version... " >&6; } +if ${gcc_cv_as_darwin_build_version+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_darwin_build_version=no + if test x$gcc_cv_as != x; then + $as_echo ' .build_version macos, 10, 14 sdk_version 10, 14' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mmacosx-version-min=10.14 -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_darwin_build_version=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_darwin_build_version" >&5 +$as_echo "$gcc_cv_as_darwin_build_version" >&6; } +if test $gcc_cv_as_darwin_build_version = yes; then + +$as_echo "#define HAVE_AS_MACOS_BUILD_VERSION 1" >>confdefs.h + +fi + + fi ;; esac @@ -27964,6 +28015,49 @@ if test $gcc_cv_as_powerpc_mfcrf = yes; then $as_echo "#define HAVE_AS_MFCRF 1" >>confdefs.h +fi + + + case $target in + *-*-aix*) conftest_s=' .machine "pwr10" + .csect .text[PR] + tend. 0';; + *-*-darwin*) conftest_s=' .text + tend. 0';; + *) conftest_s=' .machine power10 + .text + tend. 0';; + esac + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for htm support on Power10" >&5 +$as_echo_n "checking assembler for htm support on Power10... " >&6; } +if ${gcc_cv_as_power10_htm+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_power10_htm=no + if test x$gcc_cv_as != x; then + $as_echo "$conftest_s" > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_power10_htm=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_power10_htm" >&5 +$as_echo "$gcc_cv_as_power10_htm" >&6; } +if test $gcc_cv_as_power10_htm = yes; then + +$as_echo "#define HAVE_AS_POWER10_HTM 1" >>confdefs.h + fi @@ -28833,6 +28927,72 @@ if test $gcc_cv_as_loongarch_dtprelword != yes; then $as_echo "#define HAVE_AS_DTPRELWORD 1" >>confdefs.h fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mrelax option" >&5 +$as_echo_n "checking assembler for -mrelax option... " >&6; } +if ${gcc_cv_as_loongarch_relax+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_loongarch_relax=no + if test x$gcc_cv_as != x; then + $as_echo '.text' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mrelax -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_loongarch_relax=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_relax" >&5 +$as_echo "$gcc_cv_as_loongarch_relax" >&6; } +if test $gcc_cv_as_loongarch_relax = yes; then + +$as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h + +fi + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for conditional branch relaxation support" >&5 +$as_echo_n "checking assembler for conditional branch relaxation support... " >&6; } +if ${gcc_cv_as_loongarch_cond_branch_relax+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_loongarch_cond_branch_relax=no + if test x$gcc_cv_as != x; then + $as_echo 'a: + .rept 32769 + nop + .endr + beq $a0,$a1,a' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags --fatal-warnings -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_loongarch_cond_branch_relax=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_cond_branch_relax" >&5 +$as_echo "$gcc_cv_as_loongarch_cond_branch_relax" >&6; } +if test $gcc_cv_as_loongarch_cond_branch_relax = yes; then + +$as_echo "#define HAVE_AS_COND_BRANCH_RELAXATION 1" >>confdefs.h + +fi + ;; s390*-*-*) { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5 @@ -30725,7 +30885,8 @@ $as_echo "$gcc_cv_ld64_major" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5 $as_echo_n "checking linker version... " >&6; } if test x"${gcc_cv_ld64_version}" = x; then - gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'` + gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \ + | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'` fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5 $as_echo "$gcc_cv_ld64_version" >&6; } @@ -30795,7 +30956,7 @@ $as_echo_n "checking dsymutil version \"$dsymutil_temp\"... " >&6; } dsymutil_kind=LLVM dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([0-9\.]*\).*/\1/'` else - dsymutil_kind=UNKNOWN + dsymutil_kind=DET_UNKNOWN dsymutil_vers="0.0" fi dsymutil_major=`expr "$dsymutil_vers" : '\([0-9]*\)'` diff --git a/gcc/configure.ac b/gcc/configure.ac index 23bee7010a37b..fec897c2c08e6 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -236,27 +236,49 @@ AC_ARG_WITH(gxx-libcxx-include-dir, [specifies directory to find libc++ header files])], [case "${withval}" in yes) AC_MSG_ERROR(bad value ${withval} given for libc++ include directory) ;; -no) ;; *) gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;; esac]) +# --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option. +# if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option. +# if --with-gxx-libcxx-include-dir is unset we enable the stdlib option +# based on the platform (to be available on platform versions where it is the +# default for the system tools). We also use a default path within the compiler +# install tree. +# Otherwise, we use the path provided and enable the stdlib option. # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we # check to see if the latter starts with the former and, upon success, compute # gcc_gxx_libcxx_include_dir as relative to the sysroot. gcc_gxx_libcxx_include_dir_add_sysroot=0 - +gcc_enable_stdlib_opt=0 if test x${gcc_gxx_libcxx_include_dir} != x; then - AC_DEFINE(ENABLE_STDLIB_OPTION, 1, - [Define if the -stdlib= option should be enabled.]) + if test x${gcc_gxx_libcxx_include_dir} = xno; then + # set defaults for the dir, but the option is disabled anyway. + gcc_gxx_libcxx_include_dir= + else + gcc_enable_stdlib_opt=1 + fi else - AC_DEFINE(ENABLE_STDLIB_OPTION, 0) + case $target in + *-darwin1[[1-9]]* | *-darwin2*) + # Default this on for Darwin versions which default to libcxx, + # and embed the path in the compiler install so that we get a + # self-contained toolchain. + gcc_enable_stdlib_opt=1 + ;; + *) ;; + esac fi -# ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO. +AC_DEFINE_UNQUOTED(ENABLE_STDLIB_OPTION, $gcc_enable_stdlib_opt, + [Define if the -stdlib= option should be enabled.]) + +# Sysroot behaviour as for gxx-include-dir if test x${gcc_gxx_libcxx_include_dir} = x; then + # default path,embedded in the compiler tree. + libcxx_incdir='include/c++/v1' if test x${enable_version_specific_runtime_libs} = xyes; then - gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1' + gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir' else - libcxx_incdir='libc++_include/c++/$(version)/v1' if test x$host != x$target; then libcxx_incdir="$target_alias/$libcxx_incdir" fi @@ -2113,7 +2135,6 @@ AC_SUBST(HAVE_AUTO_BUILD) tm_file="${tm_file} defaults.h" tm_p_file="${tm_p_file} tm-preds.h" -tm_d_file="${tm_d_file} defaults.h" host_xm_file="auto-host.h ansidecl.h ${host_xm_file}" build_xm_file="${build_auto} ansidecl.h ${build_xm_file}" # We don't want ansidecl.h in target files, write code there in ISO/GNU C. @@ -2357,13 +2378,9 @@ for f in $tm_p_file; do done tm_d_file_list= -tm_d_include_list="options.h insn-constants.h" +tm_d_include_list= for f in $tm_d_file; do case $f in - defaults.h ) - tm_d_file_list="${tm_d_file_list} \$(srcdir)/$f" - tm_d_include_list="${tm_d_include_list} $f" - ;; * ) tm_d_file_list="${tm_d_file_list} \$(srcdir)/config/$f" tm_d_include_list="${tm_d_include_list} config/$f" @@ -4314,7 +4331,15 @@ case "$target_os" in gcc_cv_as_mmacosx_version_min, [-mmacosx-version-min=10.1], [.text],, [AC_DEFINE(HAVE_AS_MMACOSX_VERSION_MIN_OPTION, 1, - [Define if your Mac OS X assembler supports the -mmacos-version-min option.])]) + [Define if your macOS assembler supports the -mmacos-version-min option.])]) + if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then + gcc_GAS_CHECK_FEATURE([.build_version], + gcc_cv_as_darwin_build_version, + [-mmacosx-version-min=10.14], + [ .build_version macos, 10, 14 sdk_version 10, 14],, + [AC_DEFINE(HAVE_AS_MACOS_BUILD_VERSION, 1, + [Define if your macOS assembler supports .build_version directives])]) + fi ;; esac @@ -5037,6 +5062,23 @@ gd: [AC_DEFINE(HAVE_AS_MFCRF, 1, [Define if your assembler supports mfcr field.])]) + case $target in + *-*-aix*) conftest_s=' .machine "pwr10" + .csect .text[[PR]] + tend. 0';; + *-*-darwin*) conftest_s=' .text + tend. 0';; + *) conftest_s=' .machine power10 + .text + tend. 0';; + esac + + gcc_GAS_CHECK_FEATURE([htm support on Power10], + gcc_cv_as_power10_htm,, + [$conftest_s],, + [AC_DEFINE(HAVE_AS_POWER10_HTM, 1, + [Define if your assembler supports htm insns on power10.])]) + case $target in *-*-aix*) conftest_s=' .csect .text[[PR]] LCF..0: @@ -5324,6 +5366,20 @@ x: .dtprelword x+0x8000],, [AC_DEFINE(HAVE_AS_DTPRELWORD, 1, [Define if your assembler supports .dtprelword.])]) + gcc_GAS_CHECK_FEATURE([-mrelax option], gcc_cv_as_loongarch_relax, + [-mrelax], [.text],, + [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1, + [Define if your assembler supports -mrelax option.])]) + gcc_GAS_CHECK_FEATURE([conditional branch relaxation support], + gcc_cv_as_loongarch_cond_branch_relax, + [--fatal-warnings], + [a: + .rept 32769 + nop + .endr + beq $a0,$a1,a],, + [AC_DEFINE(HAVE_AS_COND_BRANCH_RELAXATION, 1, + [Define if your assembler supports conditional branch relaxation.])]) ;; s390*-*-*) gcc_GAS_CHECK_FEATURE([.gnu_attribute support], @@ -6358,7 +6414,8 @@ if test x"$ld64_flag" = x"yes"; then # If the version was not specified, try to find it. AC_MSG_CHECKING(linker version) if test x"${gcc_cv_ld64_version}" = x; then - gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'` + gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \ + | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'` fi AC_MSG_RESULT($gcc_cv_ld64_version) @@ -6412,7 +6469,7 @@ if test x"$dsymutil_flag" = x"yes"; then dsymutil_kind=LLVM dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([[0-9\.]]*\).*/\1/'` else - dsymutil_kind=UNKNOWN + dsymutil_kind=DET_UNKNOWN dsymutil_vers="0.0" fi dsymutil_major=`expr "$dsymutil_vers" : '\([[0-9]]*\)'` diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 3ef9e8959a96c..f7830dd119aa8 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,1463 @@ +2024-12-05 Simon Martin + + Backported from master: + 2024-12-04 Simon Martin + + PR c++/117615 + * constexpr.cc (cxx_eval_constant_expression): Don't reject + INTEGER_CSTs with type POINTER_TYPE to METHOD_TYPE. + +2024-11-05 Simon Martin + + Backported from master: + 2024-11-05 Simon Martin + + PR c++/117158 + * typeck.cc (cp_build_array_ref): Only wrap array expression + into a SAVE_EXPR at template instantiation time. + +2024-09-17 Marek Polacek + + Backported from master: + 2024-09-17 Marek Polacek + + PR c++/116676 + * constexpr.cc (maybe_warn_about_constant_value): Check DECL_NAME. + +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-12 Jakub Jelinek + + PR c++/114691 + * semantics.cc (simplify_loop_decl_cond): Use cp_build_unary_op with + TRUTH_NOT_EXPR on ANNOTATE_EXPR argument (if any) rather than + ANNOTATE_EXPR itself. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-09 Jakub Jelinek + + PR c++/114580 + * semantics.cc (finish_if_stmt_cond): Call + maybe_warn_for_constant_evaluated with IF_STMT_CONSTEXPR_P (if_stmt) + as the second argument, rather than true/false depending on if + it is if constexpr with non-dependent constant expression with + bool type. + +2024-06-11 Jakub Jelinek + + Backported from master: + 2024-04-05 Jakub Jelinek + + PR c++/114572 + * cp-gimplify.cc (cxx_omp_clause_apply_fn): Call build_cplus_new + on build_call_a result if it has class type. + +2024-05-24 Jason Merrill + + Backported from master: + 2024-03-28 Jason Merrill + + PR c++/100667 + * semantics.cc (same_type_ref_bind_p): New. + (finish_trait_expr): Use it. + +2024-05-24 Jason Merrill + + * pt.cc (tsubst_copy_and_build): Move ANNOTATE_EXPR out of + fallthrough path. + +2024-05-24 Jason Merrill + + Backported from master: + 2023-09-22 Jason Merrill + + PR c++/111529 + * parser.cc (cp_parser_lambda_declarator_opt): Don't suggest + -std=c++14 for lambda templates. + * pt.cc (tsubst_expr): Move ANNOTATE_EXPR handling... + (tsubst_copy_and_build): ...here. + +2024-05-24 Jason Merrill + + Backported from master: + 2024-01-25 Jason Merrill + + PR c++/113598 + * init.cc (build_vec_init): Don't use {} for PMF. + +2024-05-24 Jason Merrill + + Backported from master: + 2024-04-02 Jason Merrill + + PR c++/114561 + PR c++/114562 + * call.cc (convert_like_internal): Avoid adding qualification + conversion in direct reference binding. + +2024-05-08 Andrew Pinski + + Backported from master: + 2024-05-07 Andrew Pinski + + PR c++/89224 + * constexpr.cc (cxx_eval_array_reference): Compare main variants + for the vector/array types instead of the types directly. + +2024-04-12 Iain Sandoe + + Backported from master: + 2022-12-23 Iain Sandoe + + * g++spec.cc (lang_specific_driver): Preserve -static-libstdc++ in + the driver command line for targets without -Bstatic/dynamic support + in their static linker. + +2024-02-06 Jason Merrill + + Backported from master: + 2024-02-06 Jason Merrill + + PR c++/107291 + * method.cc (early_check_defaulted_comparison): Fail if not friend. + +2024-02-05 Jason Merrill + + Backported from master: + 2024-02-05 Jason Merrill + + PR c++/111286 + * tree.cc (rvalue): Don't drop cv-quals from an array. + +2024-02-02 Jason Merrill + + Backported from master: + 2024-02-02 Jason Merrill + + PR c++/110084 + * pt.cc (tsubst_function_decl): Only check a function defaulted + outside the class if the class is complete. + +2024-02-01 Marek Polacek + + Backported from master: + 2024-02-01 Marek Polacek + + PR c++/112437 + * typeck.cc (treat_lvalue_as_rvalue_p): Bail out on sk_namespace in + the move on throw of parms loop. + +2024-01-24 Jason Merrill + + Backported from master: + 2024-01-24 Jason Merrill + + PR c++/113347 + * semantics.cc (finalize_nrv_r): Handle null + current_retval_sentinel. + +2024-01-24 Jason Merrill + + Backported from master: + 2023-12-20 Jason Merrill + + PR c++/103185 + * typeck.cc (cp_build_array_ref): Handle swapped operands. + +2024-01-24 Jason Merrill + + Backported from master: + 2023-12-20 Jason Merrill + + PR c++/113088 + PR c++/33799 + * except.cc (maybe_splice_retval_cleanup): Handle an empty block. + +2024-01-24 Jason Merrill + + Backported from master: + 2023-08-31 Jason Merrill + + PR c++/92407 + * cp-tree.h (struct language_function): Add backward_goto. + * decl.cc (check_goto): Set it. + * typeck.cc (check_return_expr): Prevent NRV if set. + +2024-01-15 Patrick Palka + + Backported from master: + 2024-01-15 Patrick Palka + + PR c++/109899 + * init.cc (build_vec_delete_1): Assume expr_noexcept_p returns + false in a template context. + +2023-12-24 Patrick Palka + + Backported from master: + 2023-09-22 Patrick Palka + + PR c++/111485 + * pt.cc (is_compatible_template_arg): New parameter 'args'. + Add the outer template arguments 'args' to 'new_args'. + (convert_template_argument): Pass 'args' to + is_compatible_template_arg. + +2023-12-20 Patrick Palka + + Backported from master: + 2023-04-25 Patrick Palka + + PR c++/108975 + * pt.cc (value_dependent_expression_p) : + Suppress conservative early exit for reference variables + when DECL_HAS_VALUE_EXPR_P. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-12-08 Jakub Jelinek + + PR sanitizer/112727 + * cp-gimplify.cc (cp_fold): If SAVE_EXPR has been previously + folded, unshare_expr what is returned. + +2023-12-16 Jakub Jelinek + + Backported from master: + 2023-12-04 Jakub Jelinek + + PR c++/112795 + * parser.cc (cp_parser_pragma_unroll): Use fold_non_dependent_expr + instead of maybe_constant_value. + +2023-11-27 Patrick Palka + + Backported from master: + 2023-11-16 Patrick Palka + + PR c++/111703 + PR c++/107939 + * constexpr.cc (potential_constant_expression_1) : + Fix FUNCTION_POINTER_TYPE_P test. + +2023-11-27 Patrick Palka + + Backported from master: + 2023-11-15 Patrick Palka + + PR c++/111703 + PR c++/112269 + * constexpr.cc (potential_constant_expression_1) : + Only consider var_in_maybe_constexpr_fn if 'now' is false. + : Likewise. + +2023-11-17 Jason Merrill + + PR c++/112301 + PR c++/102191 + PR c++/33799 + * except.cc (maybe_splice_retval_cleanup): Clear + current_retval_sentinel when destroying retval. + * semantics.cc (nrv_data): Add in_nrv_cleanup. + (finalize_nrv): Set it. + (finalize_nrv_r): Fix handling of throwing cleanups. + +2023-11-17 Jason Merrill + + * semantics.cc (finalize_nrv_r): [RETURN_EXPR]: Only replace the + INIT_EXPR. + +2023-11-17 Jason Merrill + + PR c++/33799 + * except.cc (maybe_splice_retval_cleanup): Change + recognition of function body and try scopes. + * semantics.cc (do_poplevel): Call it after poplevel. + (at_try_scope): New. + * cp-tree.h (maybe_splice_retval_cleanup): Adjust. + +2023-08-11 Jason Merrill + + PR c++/106310 + * parser.cc (cp_parser_template_name): Skip non-member + lookup after the template keyword. + (cp_parser_lookup_name): Pass down template_keyword_p. + +2023-08-11 Jason Merrill + + PR c++/106890 + PR c++/109666 + * name-lookup.cc (maybe_push_to_top_level) + (maybe_pop_from_top_level): Split out... + * pt.cc (instantiate_body): ...from here. + * init.cc (maybe_instantiate_nsdmi_init): Use them. + * name-lookup.h: Declare them.. + +2023-08-11 Jason Merrill + + PR c++/108099 + * decl.cc (grokdeclarator): Don't clear typedef_decl after 'unsigned + typedef' pedwarn. Use c_common_signed_or_unsigned_type. Also + handle 'signed typedef'. + +2023-08-07 Patrick Palka + + Backported from master: + 2023-05-09 Patrick Palka + + PR c++/109761 + * parser.cc (cp_parser_class_specifier): Don't pass a class + context to noexcept_override_late_checks. + (noexcept_override_late_checks): Remove 'type' parameter + and use DECL_CONTEXT of 'fndecl' instead. + +2023-07-12 Patrick Palka + + Backported from master: + 2023-06-29 Patrick Palka + + PR c++/110468 + * init.cc (maybe_instantiate_nsdmi_init): Mask out all + tsubst flags except for tf_warning_or_error. + +2023-05-17 Jakub Jelinek + + Backported from master: + 2023-05-17 Jakub Jelinek + + PR c++/109868 + * init.cc (build_zero_init_1): Don't initialize zero-width bitfields. + For unions only initialize the first FIELD_DECL. + +2023-05-15 Jason Merrill + + PR c++/109241 + * pt.cc (find_parameter_packs_r): Handle null TREE_BINFO. + +2023-05-09 Patrick Palka + + Backported from master: + 2023-04-01 Patrick Palka + + PR c++/109160 + * cp-tree.h (do_auto_deduction): Add defaulted tmpl parameter. + * pt.cc (convert_template_argument): Pass 'in_decl' as 'tmpl' to + do_auto_deduction. + (tsubst_decl) : Pass 'tmpl' instead of 't' as + 'in_decl' to coerce_template_parms. + (unify) : Pass TPARMS_PRIMARY_TEMPLATE + as 'tmpl' to do_auto_deduction. + (do_auto_deduction): Document default arguments. Rename local + variable 'tmpl' to 'ctmpl'. Use 'tmpl' to obtain a full set of + template arguments for satisfaction in the adc_unify case. + +2023-05-09 Jason Merrill + + PR c++/106740 + PR c++/105852 + * decl.cc (duplicate_decls): Change non-templated friend + check to an assert. + * pt.cc (tsubst_function_decl): Don't set DECL_TEMPLATE_INFO + on non-templated friends. + (tsubst_friend_function): Adjust. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-05-04 Jason Merrill + + Revert: + 2023-04-18 Jason Merrill + + PR c++/106890 + * init.cc (maybe_instantiate_nsdmi_init): Don't leave + current_function_decl set to a constructor. + +2023-05-03 Jakub Jelinek + + Backported from master: + 2023-05-03 Jakub Jelinek + + * cp-gimplify.cc (cp_fold_data): Move definition earlier. + (cp_gimplify_expr): Pass address of genericize = true + constructed data rather than &pset to cp_walk_tree with cp_fold_r. + +2023-04-30 Iain Sandoe + + Backported from master: + 2023-04-09 Iain Sandoe + + * coroutines.cc (coro_rewrite_function_body): Ensure that added + bind expressions have scope blocks. + +2023-04-30 Iain Sandoe + + Backported from master: + 2023-04-01 Iain Sandoe + + PR c++/101118 + * coroutines.cc (flatten_await_stmt): Use the current count of + promoted temporaries to build a unique name for the frame entries. + +2023-04-30 Andrew Pinski + + Backported from master: + 2022-12-16 Andrew Pinski + Iain Sandoe + + PR c++/107768 + * coroutines.cc (coro_rewrite_function_body): Initialize pointers + from nullptr_node. (morph_fn_to_coro): Likewise. + +2023-04-28 Patrick Palka + + Backported from master: + 2023-03-24 Patrick Palka + + PR c++/106969 + * parser.cc (cp_parser_class_specifier): Clear current_class_ptr + and current_class_ref sooner, before parsing a class definition. + +2023-04-28 Patrick Palka + + Backported from master: + 2023-03-01 Patrick Palka + Jason Merrill + + PR c++/108219 + PR c++/108218 + * constexpr.cc (fold_to_constant): Define. + (maybe_constant_value): Move up early exit test for unevaluated + operands. Try reducing an unevaluated operand to a constant via + fold_to_constant. + (fold_non_dependent_expr_template): Add early exit test for + CONSTANT_CLASS_P nodes. Try reducing an unevaluated operand + to a constant via fold_to_constant. + * cp-tree.h (fold_to_constant): Declare. + +2023-04-21 Jason Merrill + + PR c++/108795 + * semantics.cc (finish_id_expression_1): Check scope before + returning id_expression. + +2023-04-20 Jason Merrill + + Revert: + 2023-04-18 Jason Merrill + + PR c++/108099 + * decl.cc (grokdeclarator): Handle non-typedef typedef_decl. + +2023-04-19 Jason Merrill + + PR c++/108099 + * decl.cc (grokdeclarator): Keep typedef_decl for __int128_t. + +2023-04-18 Jason Merrill + + PR c++/109357 + * constexpr.cc (cxx_eval_constant_expression) [TARGET_EXPR]: + Check for complex initializer. + +2023-04-18 Jason Merrill + + PR c++/105481 + * pt.cc (type_unification_real): Adjust for partial ordering. + +2023-04-18 Jason Merrill + + PR c++/105996 + * typeck.cc (build_ptrmemfunc): Drop 0-offset optimization + and location wrappers. + +2023-04-18 Jason Merrill + + PR c++/106890 + * init.cc (maybe_instantiate_nsdmi_init): Don't leave + current_function_decl set to a constructor. + +2023-04-18 Jason Merrill + + PR c++/108975 + * lambda.cc (prune_lambda_captures): Don't bother in a template. + +2023-04-18 Jason Merrill + + PR c++/69410 + * friend.cc (do_friend): Handle namespace as scope argument. + * decl.cc (grokdeclarator): Pass down in_namespace. + +2023-04-18 Jason Merrill + + PR c++/105809 + * init.cc (get_nsdmi): Split out... + (maybe_instantiate_nsdmi_init): ...this function. + * cp-tree.h: Declare it. + * pt.cc (tsubst_expr): Use it. + +2023-04-18 Jason Merrill + + PR c++/108242 + * pt.cc (tsubst_expr) [TAG_DEFN]: Handle partial instantiation. + +2023-04-18 Jason Merrill + + PR c++/101869 + * semantics.cc (finish_qualified_id_expr): Don't try to build a + pointer-to-member if the scope is an enumeration. + +2023-04-18 Jason Merrill + + PR c++/105406 + * coroutines.cc (build_co_await): Handle lvalue 'o'. + +2023-04-18 Jason Merrill + + PR c++/103871 + PR c++/98056 + * typeck.cc (cp_build_modify_expr): Allow array initialization of + DECL_ARTIFICIAL variable. + +2023-04-18 Jason Merrill + + PR c++/108468 + * pt.cc (unify_pack_expansion): Check that TPARMS_PRIMARY_TEMPLATE + is non-null. + +2023-04-18 Jason Merrill + + PR c++/107310 + * cp-gimplify.cc (genericize_if_stmt): Restore folding + of constant conditions. + +2023-04-18 Jason Merrill + + PR c++/108566 + * mangle.cc (anon_aggr_naming_decl): New. + (write_unqualified_name): Use it. + +2023-04-18 Jason Merrill + + PR c++/107154 + * cp-gimplify.cc (cp_genericize_init_expr): Use iloc_sentinel. + (cp_genericize_target_expr): Likewise. + +2023-04-18 Jason Merrill + + PR c++/108099 + * decl.cc (grokdeclarator): Handle non-typedef typedef_decl. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-04-12 Jakub Jelinek + + * Make-lang.in (s-cp-module-version): New target. + (cp/module.o): Depend on it. + (MODULE_VERSION): Remove variable. + (CFLAGS-cp/module.o): For -DMODULE_VERSION= argument just + cat s-cp-module-version. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-30 Jakub Jelinek + + PR c++/109319 + * decl2.cc (grok_array_decl): After emitting a pedwarn for + -Wcomma-subscript, if processing_template_decl set orig_index_exp + to compound expr from orig_index_exp_list. + +2023-04-18 Jakub Jelinek + + Backported from master: + 2023-03-20 Jakub Jelinek + + PR c++/109164 + * cp-tree.h (var_needs_tls_wrapper): Declare. + * decl2.cc (var_needs_tls_wrapper): No longer static. + * decl.cc (cp_finish_decl): Clear TREE_READONLY on TLS variables + for which a TLS wrapper will be needed. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-14 Jakub Jelinek + + PR c++/109096 + * tree.cc (record_has_unique_obj_representations): Ignore unnamed + bitfields. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-10 Jakub Jelinek + + PR c++/107558 + * decl.cc (cp_finish_decl): Don't clear TREE_READONLY on + automatic non-aggregate variables just because of + -fmerge-all-constants. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-10 Jakub Jelinek + + PR c++/109039 + * class.cc (end_of_class): For bit-fields, instead of computing + offset as sum of byte_position (field) and DECL_SIZE_UNIT (field), + compute it as sum of bit_position (field) and DECL_SIZE (field) + divided by BITS_PER_UNIT rounded up. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-10 Jakub Jelinek + + PR c/108079 + * decl.cc (poplevel): Suppress OPT_Wunused_variable warning + after diagnosing it. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-02 Jakub Jelinek + + PR debug/108716 + * cp-gimplify.cc (cp_genericize_r) : Set + DECL_SOURCE_LOCATION on IMPORTED_DECL to expression location + of USING_STMT or input_location. + +2023-03-15 Marek Polacek + + Backported from master: + 2023-03-15 Marek Polacek + + PR c++/107280 + * constexpr.cc (cxx_eval_store_expression): Strip location wrappers. + +2023-03-13 Arsen Arsenović + + PR c++/106188 + PR c++/106713 + * coroutines.cc (coro_rewrite_function_body): Ensure we have a + BIND_EXPR wrapping the function body. + +2023-03-07 Marek Polacek + + Backported from master: + 2023-02-10 Marek Polacek + + PR c++/107079 + * call.cc (set_up_extended_ref_temp): Pass var to maybe_constant_init. + +2023-03-07 Marek Polacek + + Backported from master: + 2023-03-07 Marek Polacek + + PR c++/107939 + * constexpr.cc (potential_constant_expression_1) : Pass + 'any' when recursing on a VAR_DECL and not a pointer to function. + +2023-03-07 Patrick Palka + + Backported from master: + 2023-03-03 Patrick Palka + + PR c++/108998 + * pt.cc (el_data::skipped_trees): New data member. + (extract_locals_r): Push to skipped_trees any unevaluated + contexts that we skipped over. + (extract_local_specs): For the second walk, start from each + tree in skipped_trees. + +2023-03-07 Patrick Palka + + Backported from master: + 2022-12-23 Patrick Palka + + PR c++/108116 + * constexpr.cc (maybe_constant_value): Clear + processing_template_decl before calling break_out_target_exprs. + * init.cc (get_nsdmi): Likewise. + * tree.cc (break_out_target_exprs): Assert processing_template_decl + is cleared. + +2023-03-07 Patrick Palka + + Backported from master: + 2022-12-23 Patrick Palka + + PR c++/107853 + * constraint.cc (maybe_substitute_reqs_for): Substitute into + the template-head requirements of a template friend using only + its outer arguments via outer_template_args. + * cp-tree.h (outer_template_args): Declare. + * pt.cc (outer_template_args): Define, factored out and + generalized from ... + (ctor_deduction_guides_for): ... here. + +2023-03-07 Patrick Palka + + Backported from master: + 2022-11-29 Patrick Palka + + PR c++/107864 + * decl.cc (function_requirements_equivalent_p): Don't check + DECL_TEMPLATE_SPECIALIZATION. + * pt.cc (determine_specialization): Propagate constraints when + specializing a function template too. Simplify by using + add_outermost_template_args. + +2023-03-07 Patrick Palka + + Backported from master: + 2022-11-03 Patrick Palka + + PR c++/107179 + * constraint.cc (tsubst_requires_expr): Make sure we're not + deferring access checks. + +2023-03-04 Marek Polacek + + PR c++/108550 + * pt.cc (lookup_and_finish_template_variable): Clear tf_partial. + +2023-03-04 Marek Polacek + + Backported from master: + 2023-03-02 Marek Polacek + + PR c++/106259 + * parser.cc (class_decl_loc_t::diag_mismatched_tags): If the first + lookup of SPEC didn't find anything, try to look for + most_general_template. + +2023-03-04 Marek Polacek + + Backported from master: + 2023-03-01 Marek Polacek + + PR c++/107574 + * constexpr.cc (cxx_eval_constant_expression): Emit an error when + a PTRMEM_CST cannot be evaluated. + +2023-02-20 Marek Polacek + + Backported from master: + 2023-02-20 Marek Polacek + + PR c++/108829 + * pt.cc (prepend_one_capture): Set LAMBDA_CAPTURE_EXPLICIT_P. + (tsubst_lambda_expr): Pass LAMBDA_CAPTURE_EXPLICIT_P to + prepend_one_capture. + +2023-02-15 Marek Polacek + + Backported from master: + 2023-02-15 Marek Polacek + + PR c++/106675 + * call.cc (joust_maybe_elide_copy): Return false for ck_ambig. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-16 Jakub Jelinek + + PR c++/105593 + * decl.cc (cp_finish_decl): Check warning_enabled_at + at the DECL_SOURCE_LOCATION (decl) for OPT_Winit_self instead + of warn_init_self. + +2023-02-10 Marek Polacek + + Backported from master: + 2022-08-11 Marek Polacek + + PR middle-end/102633 + * decl.cc (cp_finish_decl): Call suppress_warning. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-24 Jakub Jelinek + + PR c++/108474 + * cp-gimplify.cc (cp_fold_r): Handle structured bindings + vars like anon union artificial vars. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-14 Jakub Jelinek + + PR c++/108365 + * typeck.cc (cp_build_binary_op): For integral division or modulo, + shorten if type0 is unsigned, or op0 is cast from narrower unsigned + integral type or stripped_op1 is INTEGER_CST other than -1. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-02-01 Jakub Jelinek + + PR c++/108607 + * constexpr.cc (cxx_eval_constant_expression): Handle OMP_* + and OACC_* constructs as non-constant. + (potential_constant_expression_1): Handle OMP_SCAN and OMP_SCOPE. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-19 Jakub Jelinek + + PR c++/53932 + * cp-gimplify.cc (cp_fold_r): During cp_fully_fold_init replace + DECL_ANON_UNION_VAR_P VAR_DECLs with their corresponding + DECL_VALUE_EXPR. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-05 Jakub Jelinek + + PR c++/108286 + * semantics.cc (finish_omp_target_clauses): Ignore clauses other than + OMP_CLAUSE_MAP. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-04 Jakub Jelinek + + PR c++/108206 + * decl.cc (merge_default_template_args): Return false if either + new_parm or old_parm are erroneous. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-21 Jakub Jelinek + + PR c++/108180 + * pt.cc (tsubst_expr): Don't call cp_finish_decl on + DECL_OMP_PRIVATIZED_MEMBER vars. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2022-12-15 Jakub Jelinek + + PR c++/107065 + * typeck.cc (cp_build_unary_op) : If + invert_truthvalue_loc returns obvalue_p, wrap it into NON_LVALUE_EXPR. + * parser.cc (cp_parser_binary_expression): Don't call + warn_logical_not_parentheses if current.lhs is a NON_LVALUE_EXPR + of a decl with boolean type. + +2023-02-06 Patrick Palka + + Backported from master: + 2023-02-06 Patrick Palka + + PR c++/107461 + * cp-tree.h (call_expr_dependent_name): Declare. + * pt.cc (iterative_hash_template_arg) : Use + call_expr_dependent_name instead of dependent_name. + * tree.cc (call_expr_dependent_name): Define. + (called_fns_equal): Adjust to take two CALL_EXPRs instead of + CALL_EXPR_FNs thereof. Use call_expr_dependent_name instead + of dependent_name. + (cp_tree_equal) : Adjust call to called_fns_equal. + +2023-02-03 Patrick Palka + + Backported from master: + 2023-02-03 Patrick Palka + + PR c++/107461 + * semantics.cc (finish_call_expr): Strip ADDR_EXPR from + the selected callee during overload set pruning. + +2023-02-01 Marek Polacek + + Backported from master: + 2023-02-01 Marek Polacek + + PR c++/107755 + * call.cc (build_new_op): Don't call warn_logical_operator when + processing a template. + +2023-01-31 Marek Polacek + + PR c++/107593 + PR c++/108597 + * cp-tree.h (instantiation_dependent_expression_p): Don't + declare here. + +2023-01-04 Patrick Palka + + Backported from master: + 2023-01-04 Patrick Palka + + PR c++/108282 + * decl2.cc (mark_single_function): Ignore mark_used failure + only in a non-SFINAE context rather than in a SFINAE one. + +2022-12-19 Patrick Palka + + Backported from master: + 2022-12-15 Patrick Palka + + PR c++/100295 + PR c++/107579 + * pt.cc (el_data::skip_unevaluated_operands): New data member. + (extract_locals_r): If skip_unevaluated_operands is true, + don't walk into unevaluated contexts. + (extract_local_specs): Walk the pattern twice, first with + skip_unevaluated_operands true followed by it set to false. + +2022-12-19 Patrick Palka + + Backported from master: + 2022-12-15 Patrick Palka + + PR c++/108104 + * pt.cc (unify) : Relax assert to accept any + CONSTRUCTOR parm, not just COMPOUND_LITERAL_P one. + +2022-12-19 Patrick Palka + + Backported from master: + 2022-12-04 Patrick Palka + + PR c++/107417 + * pt.cc (for_each_template_parm_r) : Move + walking of the TREE_TYPE of each parameter to ... + * tree.cc (cp_walk_subtrees) : ... here. + +2022-12-19 Patrick Palka + + Backported from master: + 2022-12-03 Patrick Palka + + PR c++/103081 + * pt.cc (tsubst_copy) : Generalize + early exit test for namespace-scope decls to check dependence of + the enclosing scope instead. Remove dead early exit test. + +2022-12-19 Patrick Palka + + Backported from master: + 2022-11-30 Patrick Palka + + PR c++/107542 + * typeck.cc (cp_build_binary_op): In the SPACESHIP_EXPR case, + handle an error_mark_node result type. + +2022-11-20 Jakub Jelinek + + Backported from master: + 2022-11-15 Jakub Jelinek + + * cp-tree.h (next_common_initial_seqence): Rename to ... + (next_common_initial_sequence): ... this. + * typeck.cc (next_common_initial_seqence): Rename to ... + (next_common_initial_sequence): ... this. + (layout_compatible_type_p): Call next_common_initial_sequence + rather than next_common_initial_seqence. + * semantics.cc (is_corresponding_member_aggr): Likewise. + +2022-11-18 Marek Polacek + + Backported from master: + 2022-11-18 Marek Polacek + + PR c++/104066 + * decl.cc (grokdeclarator): Check funcdecl_p before complaining + about constinit. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-10-24 Jakub Jelinek + + PR c++/105774 + * constexpr.cc (cxx_eval_increment_expression): For signed types + that promote to int, evaluate PLUS_EXPR or MINUS_EXPR in int type. + +2022-11-03 Jakub Jelinek + + Backported from master: + 2022-09-07 Jakub Jelinek + + PR c++/106829 + * semantics.cc (finish_omp_target_clauses): If current_function_decl + isn't a nonstatic member function, don't set data.current_object to + non-NULL. + +2022-10-13 Marek Polacek + + Backported from master: + 2022-10-13 Marek Polacek + + PR c++/106925 + * except.cc (maybe_splice_retval_cleanup): Check current_function_decl. + Make the bool const. + +2022-09-29 Jason Merrill + + * class.cc (check_methods): Call constraints_satisfied_p. + +2022-09-12 Jason Merrill + + PR c++/93259 + * pt.cc (type_dependent_expression_p): Treat a compound + literal of array-of-unknown-bound type like a variable. + +2022-09-12 Jason Merrill + + PR c++/106893 + PR c++/90451 + * decl.cc (cp_finish_decl): Call mark_single_function. + +2022-08-30 Marek Polacek + + Backported from master: + 2022-08-30 Marek Polacek + + PR c++/106759 + * cp-objcp-common.cc (names_builtin_p): Handle RID_IS_NOTHROW_ASSIGNABLE + and RID_IS_NOTHROW_CONSTRUCTIBLE. + +2022-08-29 Jakub Jelinek + + Backported from master: + 2022-08-16 Jakub Jelinek + + * typeck.cc (cp_build_modify_expr): Implement + P2327R1 - De-deprecating volatile compound operations. Don't warn + for |=, &= or ^= with volatile lhs. + * expr.cc (mark_use) : Adjust warning wording, + leave out simple. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-12 Jason Merrill + + Backported from master: + 2022-07-31 Jason Merrill + + PR c++/106369 + * constexpr.cc (reduced_constant_expression_p): Return false + if a CONSTRUCTOR initializes an empty field. + +2022-08-12 Marek Polacek + + Backported from master: + 2022-04-29 Marek Polacek + + PR c++/67048 + * parser.cc (cp_parser_enum_specifier): Warn about empty unnamed enum + only when it's followed by a semicolon. + +2022-07-26 Marek Polacek + + Backported from master: + 2022-07-26 Marek Polacek + + PR c++/106311 + * pt.cc (redeclare_class_template): Check DECL_P before accessing + DECL_SOURCE_LOCATION. + +2022-07-26 Jason Merrill + + PR c++/106230 + * semantics.cc (finish_for_stmt): Check stmts_are_full_exprs_p. + +2022-07-21 Jason Merrill + + PR c++/106361 + * decl.cc (move_fn_p): Remove assert. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-07-13 Patrick Palka + + PR c++/105912 + * call.cc (extract_call_expr): Return a NULL_TREE on failure + instead of asserting. + * pt.cc (tsubst_copy_and_build) : Guard against + NULL_TREE extract_call_expr result. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-07-13 Patrick Palka + + PR c++/105842 + * constraint.cc (satisfy_declaration_constraints): Refine early + exit test for argument dependence. + * cp-tree.h (uses_outer_template_parms_in_constraints): Declare. + * pt.cc (template_class_depth): Handle TI_TEMPLATE being a + FIELD_DECL. + (usse_outer_template_parms): Factor out constraint dependence + test into ... + (uses_outer_template_parms_in_constraints): ... here. + (type_dependent_expression_p): Use it for FUNCTION_DECL. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-06-06 Patrick Palka + + PR c++/53164 + PR c++/105848 + * pt.cc (tsubst_copy_and_build) : Look through an + ADDR_EXPR callee when calling mark_used. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-06-03 Patrick Palka + + PR c++/105637 + * tree.cc (maybe_dummy_object): When returning a dummy + object, respect the cv-quals of 'this' if available. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-06-03 Patrick Palka + + PR c++/100374 + * pt.cc (determine_specialization): Compare overall constraints + not just the trailing constraints. + (tsubst_each_template_parm_constraints): Define. + (tsubst_friend_function): Use it. + (tsubst_friend_class): Use it. + (tsubst_template_parm): Don't substitute TEMPLATE_PARM_CONSTRAINTS. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-05-31 Patrick Palka + + PR c++/105758 + * call.cc (build_over_call): Use z_candidate::conversion_path + and ::access_path instead of TYPE_BINFO when building the + BASELINK for the templated form. + +2022-07-21 Patrick Palka + + Backported from master: + 2022-05-26 Patrick Palka + + PR c++/96363 + * decl.cc (shadow_tag): Use the return value of + maybe_process_partial_specialization. + * parser.cc (cp_parser_single_declaration): Call shadow_tag + before associate_classtype_constraints. + * pt.cc (maybe_new_partial_specialization): Change return type + to bool. Take 'type' argument by mutable reference. Set 'type' + to point to the correct constrained specialization when + appropriate. + (maybe_process_partial_specialization): Adjust accordingly. + +2022-07-19 Marek Polacek + + PR c++/105634 + * call.cc (maybe_warn_class_memaccess): Avoid % by zero. + +2022-07-02 Sergei Trofimovich + + Backported from master: + 2022-06-27 Sergei Trofimovich + + PR c++/106102 + * mapper-client.cc: Include via "system.h". + * mapper-resolver.cc: Ditto. + * module.cc: Ditto. + +2022-07-01 Jason Merrill + + PR c++/106024 + * parser.cc (cp_parser_lookup_name): Limit previous change to + lambdas. + +2022-07-01 Jason Merrill + + PR c++/105541 + * cp-tree.h (TMPL_ARGS_DEPTH): 0 for null args. + * parser.cc (cp_parser_enclosed_template_argument_list): + Use 0-length TREE_VEC for <>. + +2022-07-01 Jason Merrill + + PR c++/105779 + * call.cc (resolve_args): Use complain. + +2022-07-01 Jason Merrill + + PR c++/106024 + * parser.cc (missing_template_diag): Factor out... + (cp_parser_id_expression): ...from here. + (cp_parser_lookup_name): Don't look in dependent object_type. + +2022-06-24 Patrick Palka + + Backported from master: + 2022-06-23 Patrick Palka + + PR c++/105931 + * expr.cc (fold_for_warn): Don't fold when in an unevaluated + context. + +2022-06-23 Jason Merrill + + PR c++/105925 + * decl.cc (reshape_init_array_1): Set + CONSTRUCTOR_IS_DESIGNATED_INIT here. + (reshape_init_class): And here. + +2022-06-23 Jason Merrill + + PR c++/105885 + * pt.cc (tsubst_copy_and_build): Also suppress -Waddress for + comparison of dependent operands. + +2022-06-23 Jason Merrill + + PR c++/105964 + * pt.cc (type_dependent_expression_p): Look through BASELINK. + +2022-06-23 Jason Merrill + + PR c++/105908 + * name-lookup.cc (outer_binding): Strip BASELINK. + +2022-06-19 Jakub Jelinek + + Backported from master: + 2022-06-17 Jakub Jelinek + + PR c++/106001 + * typeck.cc (build_x_shufflevector): Use fold_non_dependent_expr + instead of maybe_constant_value. + +2022-06-19 Jakub Jelinek + + Backported from master: + 2022-06-09 Jakub Jelinek + + PR c++/105871 + * constexpr.cc (cxx_eval_bit_field_ref): For BIT_FIELD_REF with + non-integral result type use fold_ternary too like for BIT_FIELD_REFs + from VECTOR_CST. If fold_ternary returns NULL, diagnose non-constant + expression, set *non_constant_p and return t, instead of returning + NULL. + +2022-06-11 Patrick Palka + + Backported from master: + 2022-06-03 Patrick Palka + + PR c++/105756 + * typeck.cc (cp_build_binary_op): Don't fold operands + when c_inhibit_evaluation_warnings. + +2022-06-08 Jason Merrill + + PR c++/105852 + PR c++/105761 + * decl.cc (duplicate_decls): Avoid copying template info + from non-templated friend even if newdecl isn't a definition. + Correct handling of DECL_UNIQUE_FRIEND_P on templates. + * pt.cc (non_templated_friend_p): New. + * cp-tree.h (non_templated_friend_p): Declare it. + +2022-06-03 Jason Merrill + + PR c++/105761 + * decl.cc (duplicate_decls): Don't copy DECL_TEMPLATE_INFO + from a hidden friend. + +2022-06-02 Jason Merrill + + PR c++/105795 + * constexpr.cc (cxx_eval_bare_aggregate): Always call + init_subob_ctx. + +2022-06-01 Jason Merrill + + PR c++/105734 + * parser.cc (cp_parser_postfix_dot_deref_expression): Use typeof + if the expression has auto type. + +2022-06-01 Jason Merrill + + PR c++/105779 + * call.cc (resolve_args): Call mark_single_function here. + * pt.cc (unify_one_argument): Not here. + +2022-06-01 Patrick Palka + + Backported from master: + 2022-05-09 Patrick Palka + + PR c++/105491 + * constexpr.cc (reduced_constant_expression_p): Use + next_subobject_field instead. + * cp-tree.h (next_subobject_field): Declare. + * decl.cc (next_subobject_field): Define. + +2022-05-31 Jason Merrill + + PR c++/105652 + * pt.cc (tsubst_lambda_expr): Don't let a namespace-scope lambda + instantiate into a class-scope lambda. + +2022-05-31 Jason Merrill + + PR c++/105655 + * pt.cc (build_template_decl): Add assert. + (tsubst_function_decl): Don't return a template. + +2022-05-31 Jason Merrill + + PR c++/105623 + * decl2.cc (mark_used): Copy type from fn to BASELINK. + * pt.cc (unify_one_argument): Call mark_single_function. + +2022-05-31 Jason Merrill + + PR c++/102307 + * decl.cc (check_initializer): Use build_cplus_new in case of + constexpr failure. + +2022-05-27 Marek Polacek + + Backported from master: + 2022-05-27 Marek Polacek + + PR c++/105725 + * parser.cc (class_decl_loc_t::add): Check CLASS_TYPE_P. + +2022-05-15 Jason Merrill + + PR c++/105589 + PR c++/105191 + PR c++/92385 + * init.cc (build_value_init): Handle class in template. + +2022-05-15 Jason Merrill + + PR c++/104470 + * cp-tree.h (enum tsubst_flags): Add tf_dguide. + * pt.cc (tsubst_aggr_type): Check it. + (tsubst_baselink, tsubst_copy): Check it. + (maybe_dependent_member_ref): Check it. + (instantiate_alias_template): Handle it. + (build_deduction_guide): Set it. + +2022-05-15 Jason Merrill + + PR c++/102651 + PR c++/49387 + * rtti.cc (get_tinfo_decl_direct): Don't complete_type. + (emit_tinfo_decl): Update tdesc type if needed. + +2022-05-06 Patrick Palka + + Backported from master: + 2022-05-04 Patrick Palka + + PR c++/105476 + * pt.cc (maybe_aggr_guide): Set processing_template_decl when + partially instantiating the guide's parameter list. + +2022-05-06 Jakub Jelinek + + Backported from master: + 2022-05-04 Jakub Jelinek + + * lambda.cc: Include decl.h. + (maybe_add_lambda_conv_op): Temporarily override deprecated_state to + UNAVAILABLE_DEPRECATED_SUPPRESS. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + +2022-04-29 Iain Sandoe + + Backported from master: + 2022-04-29 Iain Sandoe + + PR c++/105426 + * coroutines.cc (register_local_var_uses): Allow promotion of unnamed + temporaries to coroutine frame copies. + +2022-04-28 Patrick Palka + + Backported from master: + 2022-04-28 Patrick Palka + + PR c++/105425 + * pt.cc (unify) : Treat + DEPENDENT_OPERATOR_TYPE like an empty type. + +2022-04-28 Iain Sandoe + + PR c++/104051 + * coroutines.cc (coro_diagnose_throwing_final_aw_expr): Handle + non-target expression inputs. + +2022-04-28 Iain Sandoe + + PR c++/105301 + * coroutines.cc (coro_promise_type_found_p): Account for possible + mutliple overloads of the promise return_value() method. + +2022-04-28 Iain Sandoe + + PR c++/105287 + * coroutines.cc (maybe_promote_temps): Ensure generated temporaries + are added to the bind expr. + (add_var_to_bind): Fix local var naming to use portable punctuation. + (register_local_var_uses): Do not add synthetic names to unnamed + temporaries. + +2022-04-28 Nathan Sidwell + Iain Sandoe + + PR c++/103868 + * coroutines.cc (finish_co_await_expr): Do not process non-dependent + coroutine expressions at template definition time. + (finish_co_yield_expr): Likewise. + (finish_co_return_stmt): Likewise. + +2022-04-28 Marek Polacek + + PR c++/90107 + * parser.cc (cp_parser_class_specifier_1): Accept :: after a class + definition. + 2022-04-27 Jason Merrill * tree.cc (strip_typedefs): Add default argument comments. diff --git a/gcc/cp/Make-lang.in b/gcc/cp/Make-lang.in index 2de4e47c659ae..ed72339946698 100644 --- a/gcc/cp/Make-lang.in +++ b/gcc/cp/Make-lang.in @@ -59,12 +59,21 @@ CFLAGS-cp/module.o += -DHOST_MACHINE=\"$(host)\" \ # In non-release builds, use a date-related module version. ifneq ($(DEVPHASE_c),) -# Some date's don't grok 'r', if so, simply use today's -# date (don't bootstrap at midnight). -MODULE_VERSION := $(shell date -r $(srcdir)/cp/module.cc '+%y%m%d-%H%M' \ - 2>/dev/null || date '+%y%m%d-0000' 2>/dev/null || echo 0) - -CFLAGS-cp/module.o += -DMODULE_VERSION='($(subst -,,$(MODULE_VERSION))U)' +# Some date's don't grok 'r', if so, simply use today's date, +# but use date from previous stage if bootstrapping to avoid breaking +# bootstraps across midnight. +s-cp-module-version: $(srcdir)/cp/module.cc + MODULE_VERSION=`if date -r $(srcdir)/cp/module.cc '+%y%m%d%H%MU' \ + 2>/dev/null; then :; \ + elif test ../prev-gcc/s-cp-module-version -nt \ + $(srcdir)/cp/module.cc; then \ + cat ../prev-gcc/s-cp-module-version; \ + else \ + date '+%y%m%d0000U' 2>/dev/null; \ + fi`; \ + echo $${MODULE_VERSION} > s-cp-module-version +cp/module.o: s-cp-module-version +CFLAGS-cp/module.o += -DMODULE_VERSION='$(shell cat s-cp-module-version)' endif # Create the compiler driver for g++. diff --git a/gcc/cp/call.cc b/gcc/cp/call.cc index fa18d7f8f9d12..6fd6da4b2dd37 100644 --- a/gcc/cp/call.cc +++ b/gcc/cp/call.cc @@ -4672,6 +4672,11 @@ resolve_args (vec *args, tsubst_flags_t complain) } else if (invalid_nonstatic_memfn_p (EXPR_LOCATION (arg), arg, complain)) return NULL; + + /* Force auto deduction now. Omit tf_warning to avoid redundant + deprecated warning on deprecated-14.C. */ + if (!mark_single_function (arg, complain & ~tf_warning)) + return NULL; } return args; } @@ -6896,7 +6901,7 @@ build_new_op (const op_location_t &loc, enum tree_code code, int flags, case TRUTH_ORIF_EXPR: case TRUTH_AND_EXPR: case TRUTH_OR_EXPR: - if (complain & tf_warning) + if ((complain & tf_warning) && !processing_template_decl) warn_logical_operator (loc, code, boolean_type_node, code_orig_arg1, arg1, code_orig_arg2, arg2); @@ -7111,9 +7116,10 @@ extract_call_expr (tree call) default:; } - gcc_assert (TREE_CODE (call) == CALL_EXPR - || TREE_CODE (call) == AGGR_INIT_EXPR - || call == error_mark_node); + if (TREE_CODE (call) != CALL_EXPR + && TREE_CODE (call) != AGGR_INIT_EXPR + && call != error_mark_node) + return NULL_TREE; return call; } @@ -8129,7 +8135,15 @@ convert_like_internal (conversion *convs, tree expr, tree fn, int argnum, break; }; - expr = convert_like (next_conversion (convs), expr, fn, argnum, + conversion *nc = next_conversion (convs); + if (convs->kind == ck_ref_bind && nc->kind == ck_qual + && !convs->need_temporary_p) + /* direct_reference_binding might have inserted a ck_qual under + this ck_ref_bind for the benefit of conversion sequence ranking. + Don't actually perform that conversion. */ + nc = next_conversion (nc); + + expr = convert_like (nc, expr, fn, argnum, convs->kind == ck_ref_bind ? issue_conversion_warnings : false, c_cast_p, complain & ~tf_no_cleanup); @@ -8210,19 +8224,6 @@ convert_like_internal (conversion *convs, tree expr, tree fn, int argnum, { tree ref_type = totype; - /* direct_reference_binding might have inserted a ck_qual under - this ck_ref_bind for the benefit of conversion sequence ranking. - Ignore the conversion; we'll create our own below. */ - if (next_conversion (convs)->kind == ck_qual - && !convs->need_temporary_p) - { - gcc_assert (same_type_p (TREE_TYPE (expr), - next_conversion (convs)->type)); - /* Strip the cast created by the ck_qual; cp_build_addr_expr - below expects an lvalue. */ - STRIP_NOPS (expr); - } - if (convs->bad_p && !next_conversion (convs)->bad_p) { tree extype = TREE_TYPE (expr); @@ -9243,8 +9244,8 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain) } else { - tree binfo = TYPE_BINFO (TREE_TYPE (first_arg)); - callee = build_baselink (binfo, binfo, fn, NULL_TREE); + callee = build_baselink (cand->conversion_path, cand->access_path, + fn, NULL_TREE); callee = build_min (COMPONENT_REF, TREE_TYPE (fn), first_arg, callee, NULL_TREE); } @@ -10328,6 +10329,8 @@ maybe_warn_class_memaccess (location_t loc, tree fndecl, /* Finally, warn on partial copies. */ unsigned HOST_WIDE_INT typesize = tree_to_uhwi (TYPE_SIZE_UNIT (desttype)); + if (typesize == 0) + break; if (unsigned HOST_WIDE_INT partial = tree_to_uhwi (sz) % typesize) warned = warning_at (loc, OPT_Wclass_memaccess, (typesize - partial > 1 @@ -11958,6 +11961,8 @@ joust_maybe_elide_copy (z_candidate *&cand) if (!DECL_COPY_CONSTRUCTOR_P (fn) && !DECL_MOVE_CONSTRUCTOR_P (fn)) return false; conversion *conv = cand->convs[0]; + if (conv->kind == ck_ambig) + return false; gcc_checking_assert (conv->kind == ck_ref_bind); conv = next_conversion (conv); if (conv->kind == ck_user && !TYPE_REF_P (conv->type)) @@ -12941,7 +12946,7 @@ set_up_extended_ref_temp (tree decl, tree expr, vec **cleanups, /* If the initializer is constant, put it in DECL_INITIAL so we get static initialization and use in constant expressions. */ - init = maybe_constant_init (expr); + init = maybe_constant_init (expr, var, /*manifestly_const_eval=*/true); /* As in store_init_value. */ init = cp_fully_fold (init); if (TREE_CONSTANT (init)) diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc index bfda0065bf467..7fa53e47a3c7b 100644 --- a/gcc/cp/class.cc +++ b/gcc/cp/class.cc @@ -4780,8 +4780,9 @@ check_methods (tree t) /* Check whether the eligible special member functions (P0848) are user-provided. add_method arranged that the CLASSTYPE_MEMBER_VEC only - has the eligible ones; TYPE_FIELDS also contains ineligible overloads, - which is why this needs to be separate from the loop above. */ + has the eligible ones, unless none are eligible; TYPE_FIELDS also contains + ineligible overloads, which is why this needs to be separate from the loop + above. */ if (tree dtor = CLASSTYPE_DESTRUCTOR (t)) { @@ -4804,6 +4805,10 @@ check_methods (tree t) { if (!user_provided_p (fn)) /* Might be trivial. */; + else if (TREE_CODE (fn) == TEMPLATE_DECL) + /* Templates are never special members. */; + else if (!constraints_satisfied_p (fn)) + /* Not eligible. */; else if (copy_fn_p (fn)) TYPE_HAS_COMPLEX_COPY_CTOR (t) = true; else if (move_fn_p (fn)) @@ -4814,6 +4819,10 @@ check_methods (tree t) { if (!user_provided_p (fn)) /* Might be trivial. */; + else if (TREE_CODE (fn) == TEMPLATE_DECL) + /* Templates are never special members. */; + else if (!constraints_satisfied_p (fn)) + /* Not eligible. */; else if (copy_fn_p (fn)) TYPE_HAS_COMPLEX_COPY_ASSIGN (t) = true; else if (move_fn_p (fn)) @@ -6436,7 +6445,15 @@ end_of_class (tree t, eoc_mode mode) size of the type (usually 1) for computing nvsize. */ size = TYPE_SIZE_UNIT (TREE_TYPE (field)); - offset = size_binop (PLUS_EXPR, byte_position (field), size); + if (DECL_BIT_FIELD_TYPE (field)) + { + offset = size_binop (PLUS_EXPR, bit_position (field), + DECL_SIZE (field)); + offset = size_binop (CEIL_DIV_EXPR, offset, bitsize_unit_node); + offset = fold_convert (sizetype, offset); + } + else + offset = size_binop (PLUS_EXPR, byte_position (field), size); if (tree_int_cst_lt (result, offset)) result = offset; } diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc index 47d5113ace267..6c8d8ab17f291 100644 --- a/gcc/cp/constexpr.cc +++ b/gcc/cp/constexpr.cc @@ -3053,7 +3053,7 @@ reduced_constant_expression_p (tree t) field = NULL_TREE; } else - field = next_initializable_field (TYPE_FIELDS (TREE_TYPE (t))); + field = next_subobject_field (TYPE_FIELDS (TREE_TYPE (t))); } else field = NULL_TREE; @@ -3063,17 +3063,23 @@ reduced_constant_expression_p (tree t) element. */ if (!reduced_constant_expression_p (e.value)) return false; - /* Empty class field may or may not have an initializer. */ + /* We want to remove initializers for empty fields in a struct to + avoid confusing output_constructor. */ + if (is_empty_field (e.index) + && TREE_CODE (TREE_TYPE (t)) == RECORD_TYPE) + return false; + /* Check for non-empty fields between initialized fields when + CONSTRUCTOR_NO_CLEARING. */ for (; field && e.index != field; - field = next_initializable_field (DECL_CHAIN (field))) + field = next_subobject_field (DECL_CHAIN (field))) if (!is_really_empty_class (TREE_TYPE (field), /*ignore_vptr*/false)) return false; if (field) - field = next_initializable_field (DECL_CHAIN (field)); + field = next_subobject_field (DECL_CHAIN (field)); } /* There could be a non-empty field at the end. */ - for (; field; field = next_initializable_field (DECL_CHAIN (field))) + for (; field; field = next_subobject_field (DECL_CHAIN (field))) if (!is_really_empty_class (TREE_TYPE (field), /*ignore_vptr*/false)) return false; ok: @@ -3926,7 +3932,8 @@ cxx_eval_array_reference (const constexpr_ctx *ctx, tree t, if (!lval && TREE_CODE (ary) == VIEW_CONVERT_EXPR && VECTOR_TYPE_P (TREE_TYPE (TREE_OPERAND (ary, 0))) - && TREE_TYPE (t) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0)))) + && (TYPE_MAIN_VARIANT (TREE_TYPE (t)) + == TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0)))))) ary = TREE_OPERAND (ary, 0); tree oldidx = TREE_OPERAND (t, 1); @@ -4181,9 +4188,16 @@ cxx_eval_bit_field_ref (const constexpr_ctx *ctx, tree t, if (*non_constant_p) return t; - if (TREE_CODE (whole) == VECTOR_CST) - return fold_ternary (BIT_FIELD_REF, TREE_TYPE (t), whole, - TREE_OPERAND (t, 1), TREE_OPERAND (t, 2)); + if (TREE_CODE (whole) == VECTOR_CST || !INTEGRAL_TYPE_P (TREE_TYPE (t))) + { + if (tree r = fold_ternary (BIT_FIELD_REF, TREE_TYPE (t), whole, + TREE_OPERAND (t, 1), TREE_OPERAND (t, 2))) + return r; + if (!ctx->quiet) + error ("%qE is not a constant expression", orig_whole); + *non_constant_p = true; + return t; + } start = TREE_OPERAND (t, 2); istart = tree_to_shwi (start); @@ -4760,12 +4774,9 @@ cxx_eval_bare_aggregate (const constexpr_ctx *ctx, tree t, tree orig_value = value; /* Like in cxx_eval_store_expression, omit entries for empty fields. */ bool no_slot = TREE_CODE (type) == RECORD_TYPE && is_empty_field (index); - if (no_slot) - new_ctx = *ctx; - else - init_subob_ctx (ctx, new_ctx, index, value); + init_subob_ctx (ctx, new_ctx, index, value); int pos_hint = -1; - if (new_ctx.ctor != ctx->ctor) + if (new_ctx.ctor != ctx->ctor && !no_slot) { /* If we built a new CONSTRUCTOR, attach it now so that other initializers can refer to it. */ @@ -5725,7 +5736,8 @@ cxx_eval_store_expression (const constexpr_ctx *ctx, tree t, *valp = build_constructor (type, NULL); CONSTRUCTOR_NO_CLEARING (*valp) = no_zero_init; } - else if (TREE_CODE (*valp) == STRING_CST) + else if (STRIP_ANY_LOCATION_WRAPPER (*valp), + TREE_CODE (*valp) == STRING_CST) { /* An array was initialized with a string constant, and now we're writing into one of its elements. Explode the @@ -6030,6 +6042,18 @@ cxx_eval_increment_expression (const constexpr_ctx *ctx, tree t, offset = fold_build1 (NEGATE_EXPR, TREE_TYPE (offset), offset); mod = fold_build2 (POINTER_PLUS_EXPR, type, val, offset); } + else if (c_promoting_integer_type_p (type) + && !TYPE_UNSIGNED (type) + && TYPE_PRECISION (type) < TYPE_PRECISION (integer_type_node)) + { + offset = fold_convert (integer_type_node, offset); + mod = fold_convert (integer_type_node, val); + tree t = fold_build2 (inc ? PLUS_EXPR : MINUS_EXPR, integer_type_node, + mod, offset); + mod = fold_convert (type, t); + if (TREE_OVERFLOW_P (mod) && !TREE_OVERFLOW_P (t)) + TREE_OVERFLOW (mod) = false; + } else mod = fold_build2 (inc ? PLUS_EXPR : MINUS_EXPR, type, val, offset); if (!ptr) @@ -6410,6 +6434,7 @@ maybe_warn_about_constant_value (location_t loc, tree decl) && warn_interference_size && !OPTION_SET_P (param_destruct_interfere_size) && DECL_CONTEXT (decl) == std_node + && DECL_NAME (decl) && id_equal (DECL_NAME (decl), "hardware_destructive_interference_size") && (LOCATION_FILE (input_location) != main_input_filename || module_exporting_p ()) @@ -6830,16 +6855,23 @@ cxx_eval_constant_expression (const constexpr_ctx *ctx, tree t, non_constant_p, overflow_p); if (*non_constant_p) break; - /* Adjust the type of the result to the type of the temporary. */ - r = adjust_temp_type (type, r); + /* If the initializer is complex, evaluate it to initialize slot. */ + bool is_complex = target_expr_needs_replace (t); + if (!is_complex) + { + r = unshare_constructor (r); + /* Adjust the type of the result to the type of the temporary. */ + r = adjust_temp_type (type, r); + ctx->global->values.put (slot, r); + } if (TARGET_EXPR_CLEANUP (t) && !CLEANUP_EH_ONLY (t)) ctx->global->cleanups->safe_push (TARGET_EXPR_CLEANUP (t)); - r = unshare_constructor (r); - ctx->global->values.put (slot, r); if (ctx->save_exprs) ctx->save_exprs->safe_push (slot); if (lval) return slot; + if (is_complex) + r = *ctx->global->values.get (slot); } break; @@ -7288,7 +7320,18 @@ cxx_eval_constant_expression (const constexpr_ctx *ctx, tree t, } if (TREE_CODE (op) == PTRMEM_CST && !TYPE_PTRMEM_P (type)) - op = cplus_expand_constant (op); + { + op = cplus_expand_constant (op); + if (TREE_CODE (op) == PTRMEM_CST) + { + if (!ctx->quiet) + error_at (loc, "%qE is not a constant expression when the " + "class %qT is still incomplete", op, + PTRMEM_CST_CLASS (op)); + *non_constant_p = true; + return t; + } + } if (TREE_CODE (op) == PTRMEM_CST && tcode == NOP_EXPR) { @@ -7310,6 +7353,12 @@ cxx_eval_constant_expression (const constexpr_ctx *ctx, tree t, return t; } } + else if (TYPE_PTR_P (type) + && TREE_CODE (TREE_TYPE (type)) == METHOD_TYPE) + /* INTEGER_CST with pointer-to-method type is only used + for a virtual method in a pointer to member function. + Don't reject those. */ + ; else { /* This detects for example: @@ -7576,6 +7625,51 @@ cxx_eval_constant_expression (const constexpr_ctx *ctx, tree t, r = cxx_eval_bit_cast (ctx, t, non_constant_p, overflow_p); break; + case OMP_PARALLEL: + case OMP_TASK: + case OMP_FOR: + case OMP_SIMD: + case OMP_DISTRIBUTE: + case OMP_TASKLOOP: + case OMP_LOOP: + case OMP_TEAMS: + case OMP_TARGET_DATA: + case OMP_TARGET: + case OMP_SECTIONS: + case OMP_ORDERED: + case OMP_CRITICAL: + case OMP_SINGLE: + case OMP_SCAN: + case OMP_SCOPE: + case OMP_SECTION: + case OMP_MASTER: + case OMP_MASKED: + case OMP_TASKGROUP: + case OMP_TARGET_UPDATE: + case OMP_TARGET_ENTER_DATA: + case OMP_TARGET_EXIT_DATA: + case OMP_ATOMIC: + case OMP_ATOMIC_READ: + case OMP_ATOMIC_CAPTURE_OLD: + case OMP_ATOMIC_CAPTURE_NEW: + case OMP_DEPOBJ: + case OACC_PARALLEL: + case OACC_KERNELS: + case OACC_SERIAL: + case OACC_DATA: + case OACC_HOST_DATA: + case OACC_LOOP: + case OACC_CACHE: + case OACC_DECLARE: + case OACC_ENTER_DATA: + case OACC_EXIT_DATA: + case OACC_UPDATE: + if (!ctx->quiet) + error_at (EXPR_LOCATION (t), + "statement is not a constant expression"); + *non_constant_p = true; + break; + default: if (STATEMENT_CODE_P (TREE_CODE (t))) { @@ -8058,6 +8152,19 @@ fold_simple (tree t) return t; } +/* Try folding the expression T to a simple constant. + Returns that constant, otherwise returns T. */ + +tree +fold_to_constant (tree t) +{ + tree r = fold (t); + if (CONSTANT_CLASS_P (r) && !TREE_OVERFLOW (r)) + return r; + else + return t; +} + /* If T is a constant expression, returns its reduced value. Otherwise, if T does not have TREE_CONSTANT set, returns T. Otherwise, returns a version of T without TREE_CONSTANT. @@ -8092,15 +8199,20 @@ maybe_constant_value (tree t, tree decl, bool manifestly_const_eval) r = *cached; if (r != t) { + /* Clear processing_template_decl for sake of break_out_target_exprs; + entries in the cv_cache are non-templated. */ + processing_template_decl_sentinel ptds; + r = break_out_target_exprs (r, /*clear_loc*/true); protected_set_expr_location (r, EXPR_LOCATION (t)); } return r; } - /* Don't evaluate an unevaluated operand. */ + /* Don't constant evaluate an unevaluated non-manifestly-constant operand, + but at least try folding it to a simple constant. */ if (cp_unevaluated_operand) - return t; + return fold_to_constant (t); uid_sensitive_constexpr_evaluation_checker c; r = cxx_eval_outermost_constant_expr (t, true, true, false, false, decl); @@ -8164,9 +8276,14 @@ fold_non_dependent_expr_template (tree t, tsubst_flags_t complain, } return t; } + else if (CONSTANT_CLASS_P (t)) + /* No evaluation needed. */ + return t; + /* Don't constant evaluate an unevaluated non-manifestly-constant operand, + but at least try folding it to a simple constant. */ if (cp_unevaluated_operand && !manifestly_const_eval) - return t; + return fold_to_constant (t); tree r = cxx_eval_outermost_constant_expr (t, true, true, manifestly_const_eval, @@ -8668,8 +8785,17 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, } else if (fun) { - if (RECUR (fun, rval)) - /* Might end up being a constant function pointer. */; + if (TREE_TYPE (fun) + && FUNCTION_POINTER_TYPE_P (TREE_TYPE (fun))) + want_rval = rval; + else + want_rval = any; + if (RECUR (fun, want_rval)) + /* Might end up being a constant function pointer. But it + could also be a function object with constexpr op(), so + we pass 'any' so that the underlying VAR_DECL is deemed + as potentially-constant even though it wasn't declared + constexpr. */; else return false; } @@ -8734,7 +8860,7 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, return RECUR (DECL_VALUE_EXPR (t), rval); } if (want_rval - && !var_in_maybe_constexpr_fn (t) + && (now || !var_in_maybe_constexpr_fn (t)) && !type_dependent_expression_p (t) && !decl_maybe_constant_var_p (t) && (strict @@ -8843,7 +8969,7 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, STRIP_NOPS (x); if (is_this_parameter (x) && !is_capture_proxy (x)) { - if (!var_in_maybe_constexpr_fn (x)) + if (now || !var_in_maybe_constexpr_fn (x)) { if (flags & tf_error) error_at (loc, "use of % in a constant expression"); @@ -9019,6 +9145,8 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, case OMP_ORDERED: case OMP_CRITICAL: case OMP_SINGLE: + case OMP_SCAN: + case OMP_SCOPE: case OMP_SECTION: case OMP_MASTER: case OMP_MASKED: diff --git a/gcc/cp/constraint.cc b/gcc/cp/constraint.cc index 94f6222b436c8..5ac0ca2aadfa9 100644 --- a/gcc/cp/constraint.cc +++ b/gcc/cp/constraint.cc @@ -1277,11 +1277,12 @@ maybe_substitute_reqs_for (tree reqs, const_tree decl) if (DECL_UNIQUE_FRIEND_P (decl) && DECL_TEMPLATE_INFO (decl)) { tree tmpl = DECL_TI_TEMPLATE (decl); - tree gargs = generic_targs_for (tmpl); + tree outer_args = outer_template_args (tmpl); processing_template_decl_sentinel s; - if (uses_template_parms (gargs)) + if (PRIMARY_TEMPLATE_P (tmpl) + || uses_template_parms (outer_args)) ++processing_template_decl; - reqs = tsubst_constraint (reqs, gargs, + reqs = tsubst_constraint (reqs, outer_args, tf_warning_or_error, NULL_TREE); } return reqs; @@ -2252,6 +2253,9 @@ tsubst_requires_expr (tree t, tree args, sat_info info) { local_specialization_stack stack (lss_copy); + /* We need to check access during the substitution. */ + deferring_access_check_sentinel acs (dk_no_deferred); + /* A requires-expression is an unevaluated context. */ cp_unevaluated u; @@ -3179,9 +3183,15 @@ satisfy_declaration_constraints (tree t, sat_info info) args = regen_args; } - /* If any arguments depend on template parameters, we can't - check constraints. Pretend they're satisfied for now. */ - if (uses_template_parms (args)) + /* If the innermost arguments are dependent, or if the outer arguments + are dependent and are needed by the constraints, we can't check + satisfaction yet so pretend they're satisfied for now. */ + if (uses_template_parms (args) + && ((DECL_TEMPLATE_INFO (t) + && PRIMARY_TEMPLATE_P (DECL_TI_TEMPLATE (t)) + && (TMPL_ARGS_DEPTH (args) == 1 + || uses_template_parms (INNERMOST_TEMPLATE_ARGS (args)))) + || uses_outer_template_parms_in_constraints (t))) return boolean_true_node; /* Get the normalized constraints. */ @@ -3243,9 +3253,13 @@ satisfy_declaration_constraints (tree t, tree args, sat_info info) else args = add_outermost_template_args (t, args); - /* If any arguments depend on template parameters, we can't - check constraints. Pretend they're satisfied for now. */ - if (uses_template_parms (args)) + /* If the innermost arguments are dependent, or if the outer arguments + are dependent and are needed by the constraints, we can't check + satisfaction yet so pretend they're satisfied for now. */ + if (uses_template_parms (args) + && (TMPL_ARGS_DEPTH (args) == 1 + || uses_template_parms (INNERMOST_TEMPLATE_ARGS (args)) + || uses_outer_template_parms_in_constraints (t))) return boolean_true_node; tree result = boolean_true_node; diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc index 551ddc9cc4139..85a760d822011 100644 --- a/gcc/cp/coroutines.cc +++ b/gcc/cp/coroutines.cc @@ -1024,9 +1024,13 @@ build_co_await (location_t loc, tree a, suspend_point_kind suspend_kind) } else { - e_proxy = get_awaitable_var (suspend_kind, o_type); + tree p_type = o_type; + if (glvalue_p (o)) + p_type = cp_build_reference_type (p_type, !lvalue_p (o)); + e_proxy = get_awaitable_var (suspend_kind, p_type); o = cp_build_modify_expr (loc, e_proxy, INIT_EXPR, o, tf_warning_or_error); + e_proxy = convert_from_reference (e_proxy); } /* I suppose we could check that this is contextually convertible to bool. */ @@ -1120,6 +1124,9 @@ build_co_await (location_t loc, tree a, suspend_point_kind suspend_kind) } TREE_VEC_ELT (awaiter_calls, 2) = awrs_call; /* await_resume(). */ + if (REFERENCE_REF_P (e_proxy)) + e_proxy = TREE_OPERAND (e_proxy, 0); + tree await_expr = build5_loc (loc, CO_AWAIT_EXPR, TREE_TYPE (TREE_TYPE (awrs_func)), a, e_proxy, o, awaiter_calls, @@ -2876,7 +2883,7 @@ flatten_await_stmt (var_nest_node *n, hash_set *promoted, tree init = t; temps_used->add (init); tree var_type = TREE_TYPE (init); - char *buf = xasprintf ("D.%d", DECL_UID (TREE_OPERAND (init, 0))); + char *buf = xasprintf ("T%03u", (unsigned) temps_used->elements ()); tree var = build_lang_decl (VAR_DECL, get_identifier (buf), var_type); DECL_ARTIFICIAL (var) = true; free (buf); @@ -3913,6 +3920,7 @@ register_local_var_uses (tree *stmt, int *do_subtree, void *d) if (TREE_CODE (*stmt) == BIND_EXPR) { tree lvar; + unsigned serial = 0; for (lvar = BIND_EXPR_VARS (*stmt); lvar != NULL; lvar = DECL_CHAIN (lvar)) { @@ -3973,14 +3981,15 @@ register_local_var_uses (tree *stmt, int *do_subtree, void *d) else if (lvname != NULL_TREE) buf = xasprintf ("%s_%u_%u", IDENTIFIER_POINTER (lvname), lvd->nest_depth, lvd->bind_indx); + else + buf = xasprintf ("_D%u_%u_%u", lvd->nest_depth, lvd->bind_indx, + serial++); + /* TODO: Figure out if we should build a local type that has any excess alignment or size from the original decl. */ - if (buf) - { - local_var.field_id = coro_make_frame_entry (lvd->field_list, buf, - lvtype, lvd->loc); - free (buf); - } + local_var.field_id = coro_make_frame_entry (lvd->field_list, buf, + lvtype, lvd->loc); + free (buf); /* We don't walk any of the local var sub-trees, they won't contain any bind exprs. */ } @@ -4093,6 +4102,19 @@ coro_rewrite_function_body (location_t fn_start, tree fnbody, tree orig, BLOCK_SUPERCONTEXT (replace_blk) = top_block; BLOCK_SUBBLOCKS (top_block) = replace_blk; } + else + { + /* We are missing a top level BIND_EXPR. We need one to ensure that we + don't shuffle around the coroutine frame and corrupt it. */ + tree bind_wrap = build3_loc (fn_start, BIND_EXPR, void_type_node, + NULL, NULL, NULL); + BIND_EXPR_BODY (bind_wrap) = fnbody; + /* Ensure we have a block to connect up the scopes. */ + tree new_blk = make_node (BLOCK); + BIND_EXPR_BLOCK (bind_wrap) = new_blk; + BLOCK_SUBBLOCKS (top_block) = new_blk; + fnbody = bind_wrap; + } /* Wrap the function body in a try {} catch (...) {} block, if exceptions are enabled. */ @@ -4117,7 +4139,7 @@ coro_rewrite_function_body (location_t fn_start, tree fnbody, tree orig, /* We will need to be able to set the resume function pointer to nullptr to signal that the coroutine is 'done'. */ tree zero_resume - = build1 (CONVERT_EXPR, resume_fn_ptr_type, integer_zero_node); + = build1 (CONVERT_EXPR, resume_fn_ptr_type, nullptr_node); /* The pointer to the destroy function. */ tree var = coro_build_artificial_var (fn_start, coro_destroy_fn_id, @@ -4504,7 +4526,7 @@ morph_fn_to_coro (tree orig, tree *resumer, tree *destroyer) tree ramp_body = push_stmt_list (); tree zeroinit = build1_loc (fn_start, CONVERT_EXPR, - coro_frame_ptr, integer_zero_node); + coro_frame_ptr, nullptr_node); tree coro_fp = coro_build_artificial_var (fn_start, "_Coro_frameptr", coro_frame_ptr, orig, zeroinit); tree varlist = coro_fp; @@ -4739,7 +4761,7 @@ morph_fn_to_coro (tree orig, tree *resumer, tree *destroyer) gcc_checking_assert (same_type_p (fn_return_type, TREE_TYPE (grooaf))); tree if_stmt = begin_if_stmt (); - tree cond = build1 (CONVERT_EXPR, coro_frame_ptr, integer_zero_node); + tree cond = build1 (CONVERT_EXPR, coro_frame_ptr, nullptr_node); cond = build2 (EQ_EXPR, boolean_type_node, coro_fp, cond); finish_if_stmt_cond (cond, if_stmt); if (VOID_TYPE_P (fn_return_type)) diff --git a/gcc/cp/cp-gimplify.cc b/gcc/cp/cp-gimplify.cc index e4c2644af15b6..4b7e5729ef1b5 100644 --- a/gcc/cp/cp-gimplify.cc +++ b/gcc/cp/cp-gimplify.cc @@ -43,6 +43,14 @@ along with GCC; see the file COPYING3. If not see #include "omp-general.h" #include "opts.h" +struct cp_fold_data +{ + hash_set pset; + bool genericize; // called from cp_fold_function? + + cp_fold_data (bool g): genericize (g) {} +}; + /* Forward declarations. */ static tree cp_genericize_r (tree *, int *, void *); @@ -176,6 +184,12 @@ genericize_if_stmt (tree *stmt_p) } else if (IF_STMT_CONSTEXPR_P (stmt)) stmt = integer_nonzerop (cond) ? then_ : else_; + /* ??? This optimization doesn't seem to belong here, but removing it + causes -Wreturn-type regressions (e.g. 107310). */ + else if (integer_nonzerop (cond) && !TREE_SIDE_EFFECTS (else_)) + stmt = then_; + else if (integer_zerop (cond) && !TREE_SIDE_EFFECTS (then_)) + stmt = else_; else stmt = build3 (COND_EXPR, void_type_node, cond, then_, else_); protected_set_expr_location_if_unset (stmt, locus); @@ -481,8 +495,8 @@ cp_gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) *expr_p = expand_vec_init_expr (NULL_TREE, *expr_p, tf_warning_or_error); - hash_set pset; - cp_walk_tree (expr_p, cp_fold_r, &pset, NULL); + cp_fold_data data (/*genericize*/true); + cp_walk_tree (expr_p, cp_fold_r, &data, NULL); cp_genericize_tree (expr_p, false); copy_if_shared (expr_p); ret = GS_OK; @@ -915,6 +929,7 @@ cp_genericize_init (tree *replace, tree from, tree to) static void cp_genericize_init_expr (tree *stmt_p) { + iloc_sentinel ils = EXPR_LOCATION (*stmt_p); tree to = TREE_OPERAND (*stmt_p, 0); tree from = TREE_OPERAND (*stmt_p, 1); if (SIMPLE_TARGET_EXPR_P (from) @@ -930,6 +945,7 @@ cp_genericize_init_expr (tree *stmt_p) static void cp_genericize_target_expr (tree *stmt_p) { + iloc_sentinel ils = EXPR_LOCATION (*stmt_p); tree slot = TARGET_EXPR_SLOT (*stmt_p); cp_genericize_init (&TARGET_EXPR_INITIAL (*stmt_p), TARGET_EXPR_INITIAL (*stmt_p), slot); @@ -955,14 +971,6 @@ struct cp_genericize_data in fold-const, we need to perform this before transformation to GIMPLE-form. */ -struct cp_fold_data -{ - hash_set pset; - bool genericize; // called from cp_fold_function? - - cp_fold_data (bool g): genericize (g) {} -}; - static tree cp_fold_r (tree *stmt_p, int *walk_subtrees, void *data_) { @@ -1004,6 +1012,20 @@ cp_fold_r (tree *stmt_p, int *walk_subtrees, void *data_) *stmt_p = stmt = cxx_constant_value (stmt); break; + case VAR_DECL: + /* In initializers replace anon union artificial VAR_DECLs + with their DECL_VALUE_EXPRs, as nothing will do it later. + Ditto for structured bindings. */ + if (!data->genericize + && DECL_HAS_VALUE_EXPR_P (stmt) + && (DECL_ANON_UNION_VAR_P (stmt) + || (DECL_DECOMPOSITION_P (stmt) && DECL_DECOMP_BASE (stmt)))) + { + *stmt_p = stmt = unshare_expr (DECL_VALUE_EXPR (stmt)); + break; + } + break; + default: break; } @@ -1434,6 +1456,8 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) tree using_directive = make_node (IMPORTED_DECL); TREE_TYPE (using_directive) = void_type_node; DECL_CONTEXT (using_directive) = current_function_decl; + DECL_SOURCE_LOCATION (using_directive) + = cp_expr_loc_or_input_loc (stmt); IMPORTED_DECL_ASSOCIATED_DECL (using_directive) = decl; DECL_CHAIN (using_directive) = BLOCK_VARS (block); @@ -2014,6 +2038,8 @@ cxx_omp_clause_apply_fn (tree fn, tree arg1, tree arg2) TREE_PURPOSE (parm), fn, i - is_method, tf_warning_or_error); t = build_call_a (fn, i, argarray); + if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t))) + t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error); t = fold_convert (void_type_node, t); t = fold_build_cleanup_point_expr (TREE_TYPE (t), t); append_to_statement_list (t, &ret); @@ -2047,6 +2073,8 @@ cxx_omp_clause_apply_fn (tree fn, tree arg1, tree arg2) TREE_PURPOSE (parm), fn, i - is_method, tf_warning_or_error); t = build_call_a (fn, i, argarray); + if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t))) + t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error); t = fold_convert (void_type_node, t); return fold_build_cleanup_point_expr (TREE_TYPE (t), t); } @@ -2429,7 +2457,14 @@ cp_fold (tree x) fold_cache = hash_map::create_ggc (101); if (tree *cached = fold_cache->get (x)) - return *cached; + { + /* unshare_expr doesn't recurse into SAVE_EXPRs. If SAVE_EXPR's + argument has been folded into a tree invariant, make sure it is + unshared. See PR112727. */ + if (TREE_CODE (x) == SAVE_EXPR && *cached != x) + return unshare_expr (*cached); + return *cached; + } uid_sensitive_constexpr_evaluation_checker c; diff --git a/gcc/cp/cp-objcp-common.cc b/gcc/cp/cp-objcp-common.cc index 0b70d5567e47e..f40fd588176f3 100644 --- a/gcc/cp/cp-objcp-common.cc +++ b/gcc/cp/cp-objcp-common.cc @@ -460,6 +460,8 @@ names_builtin_p (const char *name) case RID_IS_UNION: case RID_IS_ASSIGNABLE: case RID_IS_CONSTRUCTIBLE: + case RID_IS_NOTHROW_ASSIGNABLE: + case RID_IS_NOTHROW_CONSTRUCTIBLE: case RID_UNDERLYING_TYPE: return true; default: diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h index e9a3d09ac4c6f..132929375ea0d 100644 --- a/gcc/cp/cp-tree.h +++ b/gcc/cp/cp-tree.h @@ -2077,6 +2077,7 @@ struct GTY(()) language_function { BOOL_BITFIELD invalid_constexpr : 1; BOOL_BITFIELD throwing_cleanup : 1; + BOOL_BITFIELD backward_goto : 1; hash_table *x_named_labels; @@ -3779,11 +3780,13 @@ struct GTY(()) lang_decl { /* The depth of a template argument vector. When called directly by the parser, we use a TREE_LIST rather than a TREE_VEC to represent - template arguments. In fact, we may even see NULL_TREE if there - are no template arguments. In both of those cases, there is only - one level of template arguments. */ -#define TMPL_ARGS_DEPTH(NODE) \ - (TMPL_ARGS_HAVE_MULTIPLE_LEVELS (NODE) ? TREE_VEC_LENGTH (NODE) : 1) + template arguments. In that case, there is only one level of template + arguments. We may even see NULL_TREE if there are 0 levels of + template arguments, as in cp_parser_requires_expression. */ +#define TMPL_ARGS_DEPTH(NODE) \ + ((NODE) == NULL_TREE ? 0 \ + : TMPL_ARGS_HAVE_MULTIPLE_LEVELS (NODE) ? TREE_VEC_LENGTH (NODE) \ + : 1) /* The LEVELth level of the template ARGS. The outermost level of args is level 1, not level 0. */ @@ -5565,6 +5568,7 @@ enum tsubst_flags { constraint normalization. */ tf_tst_ok = 1 << 12, /* Allow a typename-specifier to name a template (C++17 or later). */ + tf_dguide = 1 << 13, /* Building a deduction guide from a ctor. */ /* Convenient substitution flags combinations. */ tf_warning_or_error = tf_warning | tf_error }; @@ -6884,6 +6888,7 @@ extern void initialize_artificial_var (tree, vec *); extern tree check_var_type (tree, tree, location_t); extern tree reshape_init (tree, tree, tsubst_flags_t); extern tree next_initializable_field (tree); +extern tree next_subobject_field (tree); extern tree first_field (const_tree); extern tree fndecl_declared_return_type (tree); extern bool undeduced_auto_decl (tree); @@ -6953,6 +6958,7 @@ extern void copy_linkage (tree, tree); extern tree get_guard (tree); extern tree get_guard_cond (tree, bool); extern tree set_guard (tree); +extern bool var_needs_tls_wrapper (tree); extern tree maybe_get_tls_wrapper_call (tree); extern void mark_needed (tree); extern bool decl_needed_p (tree); @@ -7009,12 +7015,13 @@ extern tree begin_eh_spec_block (void); extern void finish_eh_spec_block (tree, tree); extern tree build_eh_type_type (tree); extern tree cp_protect_cleanup_actions (void); -extern void maybe_splice_retval_cleanup (tree); +extern void maybe_splice_retval_cleanup (tree, bool); extern tree maybe_set_retval_sentinel (void); extern tree template_parms_to_args (tree); extern tree template_parms_level_to_args (tree); extern tree generic_targs_for (tree); +extern tree outer_template_args (tree); /* in expr.cc */ extern tree cplus_expand_constant (tree); @@ -7050,6 +7057,7 @@ extern bool is_copy_initialization (tree); extern tree build_zero_init (tree, tree, bool); extern tree build_value_init (tree, tsubst_flags_t); extern tree build_value_init_noctor (tree, tsubst_flags_t); +extern tree maybe_instantiate_nsdmi_init (tree, tsubst_flags_t); extern tree get_nsdmi (tree, bool, tsubst_flags_t); extern tree build_offset_ref (tree, tree, bool, tsubst_flags_t); @@ -7288,7 +7296,8 @@ extern tree do_auto_deduction (tree, tree, tree, auto_deduction_context = adc_unspecified, tree = NULL_TREE, - int = LOOKUP_NORMAL); + int = LOOKUP_NORMAL, + tree = NULL_TREE); extern tree type_uses_auto (tree); extern tree type_uses_auto_or_concept (tree); extern void append_type_to_template_for_access_check (tree, tree, tree, @@ -7313,6 +7322,7 @@ extern tree lookup_template_function (tree, tree); extern tree lookup_template_variable (tree, tree); extern int uses_template_parms (tree); extern bool uses_template_parms_level (tree, int); +extern bool uses_outer_template_parms_in_constraints (tree); extern bool in_template_function (void); extern bool need_generic_capture (void); extern tree instantiate_class_template (tree); @@ -7385,7 +7395,6 @@ extern bool any_type_dependent_arguments_p (const vec *); extern bool any_type_dependent_elements_p (const_tree); extern bool type_dependent_expression_p_push (tree); extern bool value_dependent_expression_p (tree); -extern bool instantiation_dependent_expression_p (tree); extern bool instantiation_dependent_uneval_expression_p (tree); extern bool any_value_dependent_elements_p (const_tree); extern bool dependent_omp_for_p (tree, tree, tree, tree); @@ -7412,6 +7421,7 @@ extern bool push_tinst_level_loc (tree, location_t); extern bool push_tinst_level_loc (tree, tree, location_t); extern void pop_tinst_level (void); extern struct tinst_level *outermost_tinst_level(void); +extern bool non_templated_friend_p (tree); extern void init_template_processing (void); extern void print_template_statistics (void); bool template_template_parameter_p (const_tree); @@ -7855,6 +7865,7 @@ extern tree lookup_maybe_add (tree fns, tree lookup, extern int is_overloaded_fn (tree) ATTRIBUTE_PURE; extern bool really_overloaded_fn (tree) ATTRIBUTE_PURE; extern tree dependent_name (tree); +extern tree call_expr_dependent_name (tree); extern tree maybe_get_fns (tree) ATTRIBUTE_PURE; extern tree get_fns (tree) ATTRIBUTE_PURE; extern tree get_first_fn (tree) ATTRIBUTE_PURE; @@ -7951,7 +7962,7 @@ extern bool comp_except_specs (const_tree, const_tree, int); extern bool comptypes (tree, tree, int); extern bool same_type_ignoring_top_level_qualifiers_p (tree, tree); extern bool similar_type_p (tree, tree); -extern bool next_common_initial_seqence (tree &, tree &); +extern bool next_common_initial_sequence (tree &, tree &); extern bool layout_compatible_type_p (tree, tree); extern bool compparms (const_tree, const_tree); extern int comp_cv_qualification (const_tree, const_tree); @@ -8429,6 +8440,7 @@ extern tree fold_non_dependent_init (tree, tsubst_flags_t = tf_warning_or_error, bool = false, tree = NULL_TREE); extern tree fold_simple (tree); +extern tree fold_to_constant (tree); extern bool reduced_constant_expression_p (tree); extern bool is_instantiation_of_constexpr (tree); extern bool var_in_constexpr_fn (tree); diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc index 2852093d6245e..878b14fe771d0 100644 --- a/gcc/cp/decl.cc +++ b/gcc/cp/decl.cc @@ -691,6 +691,7 @@ poplevel (int keep, int reverse, int functionbody) else warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wunused_variable, "unused variable %qD", decl); + suppress_warning (decl, OPT_Wunused_variable); } else if (DECL_CONTEXT (decl) == current_function_decl // For -Wunused-but-set-variable leave references alone. @@ -954,9 +955,7 @@ static bool function_requirements_equivalent_p (tree newfn, tree oldfn) { /* In the concepts TS, the combined constraints are compared. */ - if (cxx_dialect < cxx20 - && (DECL_TEMPLATE_SPECIALIZATION (newfn) - <= DECL_TEMPLATE_SPECIALIZATION (oldfn))) + if (cxx_dialect < cxx20) { tree ci1 = get_constraints (oldfn); tree ci2 = get_constraints (newfn); @@ -1490,6 +1489,8 @@ merge_default_template_args (tree new_parms, tree old_parms, bool class_p) tree old_parm = TREE_VALUE (TREE_VEC_ELT (old_parms, i)); tree& new_default = TREE_PURPOSE (TREE_VEC_ELT (new_parms, i)); tree& old_default = TREE_PURPOSE (TREE_VEC_ELT (old_parms, i)); + if (error_operand_p (new_parm) || error_operand_p (old_parm)) + return false; if (new_default != NULL_TREE && old_default != NULL_TREE) { auto_diagnostic_group d; @@ -2295,8 +2296,8 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden) merge_default_template_args (new_parms, old_parms, /*class_p=*/false); } - if (!DECL_UNIQUE_FRIEND_P (old_result)) - DECL_UNIQUE_FRIEND_P (new_result) = false; + if (!DECL_UNIQUE_FRIEND_P (new_result)) + DECL_UNIQUE_FRIEND_P (old_result) = false; check_default_args (newdecl); @@ -2664,6 +2665,11 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden) TINFO_USED_TEMPLATE_ID (DECL_TEMPLATE_INFO (olddecl)) = TINFO_USED_TEMPLATE_ID (new_template_info); } + + /* We don't want to copy template info from a non-templated friend + (PR105761), but these shouldn't have DECL_TEMPLATE_INFO now. */ + gcc_checking_assert (!DECL_TEMPLATE_INFO (olddecl) + || !non_templated_friend_p (olddecl)); DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl); } @@ -3644,6 +3650,8 @@ check_goto (tree decl) return; } + cp_function_chain->backward_goto = true; + bool saw_catch = false, complained = false; int identified = 0; tree bad; @@ -5470,7 +5478,8 @@ shadow_tag (cp_decl_specifier_seq *declspecs) if (!t) return NULL_TREE; - if (maybe_process_partial_specialization (t) == error_mark_node) + t = maybe_process_partial_specialization (t); + if (t == error_mark_node) return NULL_TREE; /* This is where the variables in an anonymous union are @@ -6409,6 +6418,25 @@ next_initializable_field (tree field) return field; } +/* FIELD is an element of TYPE_FIELDS or NULL. In the former case, the value + returned is the next FIELD_DECL (possibly FIELD itself) that corresponds + to a subobject. If there are no more such fields, the return value will be + NULL. */ + +tree +next_subobject_field (tree field) +{ + while (field + && (TREE_CODE (field) != FIELD_DECL + || DECL_UNNAMED_BIT_FIELD (field) + || (DECL_ARTIFICIAL (field) + && !DECL_FIELD_IS_BASE (field) + && !DECL_VIRTUAL_P (field)))) + field = DECL_CHAIN (field); + + return field; +} + /* Return true for [dcl.init.list] direct-list-initialization from single element of enumeration with a fixed underlying type. */ @@ -6480,6 +6508,8 @@ reshape_init_array_1 (tree elt_type, tree max_index, reshape_iter *d, tree elt_init; constructor_elt *old_cur = d->cur; + if (d->cur->index) + CONSTRUCTOR_IS_DESIGNATED_INIT (new_init) = true; check_array_designated_initializer (d->cur, index); elt_init = reshape_init_r (elt_type, d, /*first_initializer_p=*/NULL_TREE, @@ -6647,6 +6677,7 @@ reshape_init_class (tree type, reshape_iter *d, bool first_initializer_p, } else if (TREE_CODE (d->cur->index) == IDENTIFIER_NODE) { + CONSTRUCTOR_IS_DESIGNATED_INIT (new_init) = true; field = get_class_binding (type, d->cur->index); direct_desig = true; } @@ -7397,12 +7428,19 @@ check_initializer (tree decl, tree init, int flags, vec **cleanups) /* Declared constexpr or constinit, but no suitable initializer; massage init appropriately so we can pass it into store_init_value for the error. */ - if (CLASS_TYPE_P (type) - && (!init || TREE_CODE (init) == TREE_LIST)) + tree new_init = NULL_TREE; + if (!processing_template_decl + && TREE_CODE (init_code) == CALL_EXPR) + new_init = build_cplus_new (type, init_code, tf_none); + else if (CLASS_TYPE_P (type) + && (!init || TREE_CODE (init) == TREE_LIST)) + new_init = build_functional_cast (input_location, type, + init, tf_none); + if (new_init) { - init = build_functional_cast (input_location, type, - init, tf_none); - if (TREE_CODE (init) == TARGET_EXPR) + init = new_init; + if (TREE_CODE (init) == TARGET_EXPR + && !(flags & LOOKUP_ONLYCONVERTING)) TARGET_EXPR_DIRECT_INIT_P (init) = true; } init_code = NULL_TREE; @@ -8103,6 +8141,9 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p, d_init = build_x_compound_expr_from_list (d_init, ELK_INIT, tf_warning_or_error); d_init = resolve_nondeduced_context (d_init, tf_warning_or_error); + /* Force auto deduction now. Use tf_none to avoid redundant warnings + on deprecated-14.C. */ + mark_single_function (d_init, tf_none); } enum auto_deduction_context adc = adc_variable_type; if (VAR_P (decl) && DECL_DECOMPOSITION_P (decl)) @@ -8201,6 +8242,14 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p, && !TYPE_REF_P (type)) TREE_CONSTANT (decl) = 1; } + /* This is handled mostly by gimplify.cc, but we have to deal with + not warning about int x = x; as it is a GCC extension to turn off + this warning but only if warn_init_self is zero. */ + if (!DECL_EXTERNAL (decl) + && !TREE_STATIC (decl) + && decl == tree_strip_any_location_wrapper (init) + && !warning_enabled_at (DECL_SOURCE_LOCATION (decl), OPT_Winit_self)) + suppress_warning (decl, OPT_Winit_self); } if (flag_openmp @@ -8475,8 +8524,10 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p, if (var_definition_p /* With -fmerge-all-constants, gimplify_init_constructor - might add TREE_STATIC to the variable. */ - && (TREE_STATIC (decl) || flag_merge_constants >= 2)) + might add TREE_STATIC to aggregate variables. */ + && (TREE_STATIC (decl) + || (flag_merge_constants >= 2 + && AGGREGATE_TYPE_P (type)))) { /* If a TREE_READONLY variable needs initialization at runtime, it is no longer readonly and we need to @@ -8494,6 +8545,18 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p, if (!decl_maybe_constant_destruction (decl, type)) TREE_READONLY (decl) = 0; } + else if (VAR_P (decl) + && CP_DECL_THREAD_LOCAL_P (decl) + && (!DECL_EXTERNAL (decl) || flag_extern_tls_init) + && (was_readonly || TREE_READONLY (decl)) + && var_needs_tls_wrapper (decl)) + { + /* TLS variables need dynamic initialization by the TLS wrapper + function, we don't want to hoist accesses to it before the + wrapper. */ + was_readonly = 0; + TREE_READONLY (decl) = 0; + } make_rtl_for_nonlocal_decl (decl, init, asmspec); @@ -12240,11 +12303,14 @@ grokdeclarator (const cp_declarator *declarator, { if (typedef_decl) { - pedwarn (loc, OPT_Wpedantic, "%qs specified with %qT", - key, type); + pedwarn (loc, OPT_Wpedantic, + "%qs specified with typedef-name %qD", + key, typedef_decl); ok = !flag_pedantic_errors; - type = DECL_ORIGINAL_TYPE (typedef_decl); - typedef_decl = NULL_TREE; + /* PR108099: __int128_t comes from c_common_nodes_and_builtins, + and is not built as a typedef. */ + if (is_typedef_decl (typedef_decl)) + type = DECL_ORIGINAL_TYPE (typedef_decl); } else if (declspecs->decltype_p) error_at (loc, "%qs specified with %", key); @@ -12297,7 +12363,7 @@ grokdeclarator (const cp_declarator *declarator, else if (type == char_type_node) type = unsigned_char_type_node; else if (typedef_decl) - type = unsigned_type_for (type); + type = c_common_unsigned_type (type); else type = unsigned_type_node; } @@ -12311,6 +12377,8 @@ grokdeclarator (const cp_declarator *declarator, type = long_integer_type_node; else if (short_p) type = short_integer_type_node; + else if (signed_p && typedef_decl) + type = c_common_signed_type (type); if (decl_spec_seq_has_spec_p (declspecs, ds_complex)) { @@ -12926,7 +12994,7 @@ grokdeclarator (const cp_declarator *declarator, "an array", name); return error_mark_node; } - if (constinit_p) + if (constinit_p && funcdecl_p) { error_at (declspecs->locations[ds_constinit], "% on function return type is not " @@ -14141,7 +14209,8 @@ grokdeclarator (const cp_declarator *declarator, return error_mark_node; } - decl = do_friend (ctype, unqualified_id, decl, + tree scope = ctype ? ctype : in_namespace; + decl = do_friend (scope, unqualified_id, decl, flags, funcdef_flag); return decl; } @@ -14982,8 +15051,6 @@ copy_fn_p (const_tree d) bool move_fn_p (const_tree d) { - gcc_assert (DECL_FUNCTION_MEMBER_P (d)); - if (cxx_dialect == cxx98) /* There are no move constructors if we are in C++98 mode. */ return false; diff --git a/gcc/cp/decl2.cc b/gcc/cp/decl2.cc index d2b29208ed5c5..c5e5fbfba4a43 100644 --- a/gcc/cp/decl2.cc +++ b/gcc/cp/decl2.cc @@ -441,11 +441,23 @@ grok_array_decl (location_t loc, tree array_expr, tree index_exp, &overload, complain); } else - /* If it would be valid albeit deprecated expression in C++20, - just pedwarn on it and treat it as if wrapped in (). */ - pedwarn (loc, OPT_Wcomma_subscript, - "top-level comma expression in array subscript " - "changed meaning in C++23"); + { + /* If it would be valid albeit deprecated expression in + C++20, just pedwarn on it and treat it as if wrapped + in (). */ + pedwarn (loc, OPT_Wcomma_subscript, + "top-level comma expression in array subscript " + "changed meaning in C++23"); + if (processing_template_decl) + { + orig_index_exp + = build_x_compound_expr_from_vec (orig_index_exp_list, + NULL, complain); + if (orig_index_exp == error_mark_node) + expr = error_mark_node; + release_tree_vector (orig_index_exp_list); + } + } } } } @@ -486,6 +498,15 @@ grok_array_decl (location_t loc, tree array_expr, tree index_exp, return error_mark_node; } index_exp = idx; + if (processing_template_decl) + { + orig_index_exp + = build_x_compound_expr_from_vec (orig_index_exp_list, + NULL, complain); + release_tree_vector (orig_index_exp_list); + if (orig_index_exp == error_mark_node) + return error_mark_node; + } } if (TREE_CODE (TREE_TYPE (index_exp)) == ARRAY_TYPE) @@ -3604,7 +3625,7 @@ var_defined_without_dynamic_init (tree var) /* Returns true iff VAR is a variable that needs uses to be wrapped for possible dynamic initialization. */ -static bool +bool var_needs_tls_wrapper (tree var) { return (!error_operand_p (var) @@ -5779,7 +5800,7 @@ mark_single_function (tree expr, tsubst_flags_t complain) if (is_overloaded_fn (expr) == 1 && !mark_used (expr, complain) - && (complain & tf_error)) + && !(complain & tf_error)) return false; return true; } @@ -5804,10 +5825,15 @@ mark_used (tree decl, tsubst_flags_t complain) actually used until after overload resolution. */ if (BASELINK_P (decl)) { - decl = BASELINK_FUNCTIONS (decl); - if (really_overloaded_fn (decl)) + tree fns = BASELINK_FUNCTIONS (decl); + if (really_overloaded_fn (fns)) return true; - decl = OVL_FIRST (decl); + fns = OVL_FIRST (fns); + if (!mark_used (fns, complain)) + return false; + /* We might have deduced its return type. */ + TREE_TYPE (decl) = TREE_TYPE (fns); + return true; } if (!DECL_P (decl)) diff --git a/gcc/cp/except.cc b/gcc/cp/except.cc index da0a65c613d3b..96e19b18a716c 100644 --- a/gcc/cp/except.cc +++ b/gcc/cp/except.cc @@ -1318,18 +1318,20 @@ maybe_set_retval_sentinel () on throw. */ void -maybe_splice_retval_cleanup (tree compound_stmt) +maybe_splice_retval_cleanup (tree compound_stmt, bool is_try) { - /* If we need a cleanup for the return value, add it in at the same level as + if (!current_function_decl || !cfun + || DECL_CONSTRUCTOR_P (current_function_decl) + || DECL_DESTRUCTOR_P (current_function_decl) + || !current_retval_sentinel) + return; + + /* if we need a cleanup for the return value, add it in at the same level as pushdecl_outermost_localscope. And also in try blocks. */ - bool function_body - = (current_binding_level->level_chain - && current_binding_level->level_chain->kind == sk_function_parms); - - if ((function_body || current_binding_level->kind == sk_try) - && !DECL_CONSTRUCTOR_P (current_function_decl) - && !DECL_DESTRUCTOR_P (current_function_decl) - && current_retval_sentinel) + cp_binding_level *b = current_binding_level; + const bool function_body = b->kind == sk_function_parms; + + if (function_body || is_try) { location_t loc = DECL_SOURCE_LOCATION (current_function_decl); tree_stmt_iterator iter = tsi_start (compound_stmt); @@ -1343,9 +1345,13 @@ maybe_splice_retval_cleanup (tree compound_stmt) } /* Skip past other decls, they can't contain a return. */ - while (TREE_CODE (tsi_stmt (iter)) == DECL_EXPR) + while (!tsi_end_p (iter) + && TREE_CODE (tsi_stmt (iter)) == DECL_EXPR) tsi_next (&iter); - gcc_assert (!tsi_end_p (iter)); + + if (tsi_end_p (iter)) + /* Nothing to wrap. */ + return; /* Wrap the rest of the STATEMENT_LIST in a CLEANUP_STMT. */ tree stmts = NULL_TREE; @@ -1355,6 +1361,14 @@ maybe_splice_retval_cleanup (tree compound_stmt) tsi_delink (&iter); } tree dtor = build_cleanup (retval); + if (!function_body) + { + /* Clear the sentinel so we don't try to destroy the retval again on + rethrow (c++/112301). */ + tree clear = build2 (MODIFY_EXPR, boolean_type_node, + current_retval_sentinel, boolean_false_node); + dtor = build2 (COMPOUND_EXPR, void_type_node, clear, dtor); + } tree cond = build3 (COND_EXPR, void_type_node, current_retval_sentinel, dtor, void_node); tree cleanup = build_stmt (loc, CLEANUP_STMT, diff --git a/gcc/cp/expr.cc b/gcc/cp/expr.cc index 31fe098033729..f3e155b7ba334 100644 --- a/gcc/cp/expr.cc +++ b/gcc/cp/expr.cc @@ -220,7 +220,7 @@ mark_use (tree expr, bool rvalue_p, bool read_p, case MODIFY_EXPR: { tree lhs = TREE_OPERAND (expr, 0); - /* [expr.ass] "A simple assignment whose left operand is of + /* [expr.ass] "An assignment whose left operand is of a volatile-qualified type is deprecated unless the assignment is either a discarded-value expression or appears in an unevaluated context." */ @@ -230,7 +230,7 @@ mark_use (tree expr, bool rvalue_p, bool read_p, && !TREE_THIS_VOLATILE (expr)) { if (warning_at (location_of (expr), OPT_Wvolatile, - "using value of simple assignment with " + "using value of assignment with " "%-qualified left operand is " "deprecated")) /* Make sure not to warn about this assignment again. */ @@ -397,6 +397,11 @@ fold_for_warn (tree x) { /* C++ implementation. */ + if (cp_unevaluated_operand) + /* In an unevaluated context we don't care about the reduced value + of an expression, so neither should any warnings. */ + return x; + /* Prevent warning-dependent constexpr evaluation from changing DECL_UID (which breaks -fcompare-debug) and from instantiating templates. */ diff --git a/gcc/cp/friend.cc b/gcc/cp/friend.cc index acbe0eccb8ed8..18c56cc67d25c 100644 --- a/gcc/cp/friend.cc +++ b/gcc/cp/friend.cc @@ -485,19 +485,32 @@ make_friend_class (tree type, tree friend_type, bool complain) } /* Record DECL (a FUNCTION_DECL) as a friend of the - CURRENT_CLASS_TYPE. If DECL is a member function, CTYPE is the + CURRENT_CLASS_TYPE. If DECL is a member function, SCOPE is the class of which it is a member, as named in the friend declaration. + If the friend declaration was explicitly namespace-qualified, SCOPE + is that namespace. DECLARATOR is the name of the friend. FUNCDEF_FLAG is true if the friend declaration is a definition of the function. FLAGS is as for grokclass fn. */ tree -do_friend (tree ctype, tree declarator, tree decl, +do_friend (tree scope, tree declarator, tree decl, enum overload_flags flags, bool funcdef_flag) { gcc_assert (TREE_CODE (decl) == FUNCTION_DECL); - gcc_assert (!ctype || MAYBE_CLASS_TYPE_P (ctype)); + + tree ctype = NULL_TREE; + tree in_namespace = NULL_TREE; + if (!scope) + ; + else if (MAYBE_CLASS_TYPE_P (scope)) + ctype = scope; + else + { + gcc_checking_assert (TREE_CODE (scope) == NAMESPACE_DECL); + in_namespace = scope; + } /* Friend functions are unique, until proved otherwise. */ DECL_UNIQUE_FRIEND_P (decl) = 1; @@ -617,7 +630,7 @@ do_friend (tree ctype, tree declarator, tree decl, parameters. Instead, we call pushdecl when the class is instantiated. */ decl = push_template_decl (decl, /*is_friend=*/true); - else if (current_function_decl) + else if (current_function_decl && !in_namespace) /* pushdecl will check there's a local decl already. */ decl = pushdecl (decl, /*hiding=*/true); else diff --git a/gcc/cp/g++spec.cc b/gcc/cp/g++spec.cc index 8174d652776b1..2e1e06e6ac9b4 100644 --- a/gcc/cp/g++spec.cc +++ b/gcc/cp/g++spec.cc @@ -222,7 +222,12 @@ lang_specific_driver (struct cl_decoded_option **in_decoded_options, case OPT_static_libstdc__: library = library >= 0 ? 2 : library; +#ifdef HAVE_LD_STATIC_DYNAMIC + /* Remove -static-libstdc++ from the command only if target supports + LD_STATIC_DYNAMIC. When not supported, it is left in so that a + back-end target can use outfile substitution. */ args[i] |= SKIPOPT; +#endif break; case OPT_stdlib_: diff --git a/gcc/cp/init.cc b/gcc/cp/init.cc index 75ab965a21849..a0a28f2a00231 100644 --- a/gcc/cp/init.cc +++ b/gcc/cp/init.cc @@ -189,15 +189,21 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, init = build_zero_cst (type); else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type))) { - tree field; + tree field, next; vec *v = NULL; /* Iterate over the fields, building initializations. */ - for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) + for (field = TYPE_FIELDS (type); field; field = next) { + next = DECL_CHAIN (field); + if (TREE_CODE (field) != FIELD_DECL) continue; + /* For unions, only the first field is initialized. */ + if (TREE_CODE (type) == UNION_TYPE) + next = NULL_TREE; + if (TREE_TYPE (field) == error_mark_node) continue; @@ -212,6 +218,11 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, continue; } + /* Don't add zero width bitfields. */ + if (DECL_C_BIT_FIELD (field) + && integer_zerop (DECL_SIZE (field))) + continue; + /* Note that for class types there will be FIELD_DECLs corresponding to base classes as well. Thus, iterating over TYPE_FIELDs will result in correct initialization of @@ -230,10 +241,6 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, if (value) CONSTRUCTOR_APPEND_ELT(v, field, value); } - - /* For unions, only the first field is initialized. */ - if (TREE_CODE (type) == UNION_TYPE) - break; } /* Build a constructor to contain the initializations. */ @@ -343,10 +350,6 @@ build_value_init (tree type, tsubst_flags_t complain) A program that calls for default-initialization or value-initialization of an entity of reference type is ill-formed. */ - /* The AGGR_INIT_EXPR tweaking below breaks in templates. */ - gcc_assert (!processing_template_decl - || (SCALAR_TYPE_P (type) || TREE_CODE (type) == ARRAY_TYPE)); - if (CLASS_TYPE_P (type) && type_build_ctor_call (type)) { tree ctor @@ -354,6 +357,9 @@ build_value_init (tree type, tsubst_flags_t complain) NULL, type, LOOKUP_NORMAL, complain); if (ctor == error_mark_node || TREE_CONSTANT (ctor)) return ctor; + if (processing_template_decl) + /* The AGGR_INIT_EXPR tweaking below breaks in templates. */ + return build_min (CAST_EXPR, type, NULL_TREE); tree fn = NULL_TREE; if (TREE_CODE (ctor) == CALL_EXPR) fn = get_callee_fndecl (ctor); @@ -562,19 +568,21 @@ perform_target_ctor (tree init) return init; } -/* Return the non-static data initializer for FIELD_DECL MEMBER. */ +/* Instantiate the default member initializer of MEMBER, if needed. + Only get_nsdmi should use the return value of this function. */ static GTY((cache)) decl_tree_cache_map *nsdmi_inst; tree -get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain) +maybe_instantiate_nsdmi_init (tree member, tsubst_flags_t complain) { - tree init; - tree save_ccp = current_class_ptr; - tree save_ccr = current_class_ref; - - if (DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member)) + tree init = DECL_INITIAL (member); + if (init && DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member)) { + /* Clear any special tsubst flags; the result of NSDMI instantiation + should be independent of the substitution context. */ + complain &= tf_warning_or_error; + init = DECL_INITIAL (DECL_TI_TEMPLATE (member)); location_t expr_loc = cp_expr_loc_or_loc (init, DECL_SOURCE_LOCATION (member)); @@ -602,15 +610,9 @@ get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain) bool pushed = false; tree ctx = DECL_CONTEXT (member); - processing_template_decl_sentinel ptds (/*reset*/false); + bool push_to_top = maybe_push_to_top_level (member); if (!currently_open_class (ctx)) { - if (!LOCAL_CLASS_P (ctx)) - push_to_top_level (); - else - /* push_to_top_level would lose the necessary function context, - just reset processing_template_decl. */ - processing_template_decl = 0; push_nested_class (ctx); push_deferring_access_checks (dk_no_deferred); pushed = true; @@ -638,15 +640,25 @@ get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain) { pop_deferring_access_checks (); pop_nested_class (); - if (!LOCAL_CLASS_P (ctx)) - pop_from_top_level (); } + maybe_pop_from_top_level (push_to_top); input_location = sloc; } } - else - init = DECL_INITIAL (member); + + return init; +} + +/* Return the non-static data initializer for FIELD_DECL MEMBER. */ + +tree +get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain) +{ + tree save_ccp = current_class_ptr; + tree save_ccr = current_class_ref; + + tree init = maybe_instantiate_nsdmi_init (member, complain); if (init && TREE_CODE (init) == DEFERRED_PARSE) { @@ -673,6 +685,10 @@ get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain) current_class_ptr = build_address (current_class_ref); } + /* Clear processing_template_decl for sake of break_out_target_exprs; + INIT is always non-templated. */ + processing_template_decl_sentinel ptds; + /* Strip redundant TARGET_EXPR so we don't need to remap it, and so the aggregate init code below will see a CONSTRUCTOR. */ bool simple_target = (init && SIMPLE_TARGET_EXPR_P (init)); @@ -4142,7 +4158,8 @@ build_vec_delete_1 (location_t loc, tree base, tree maxindex, tree type, /* If one destructor throws, keep trying to clean up the rest, unless we're already in a build_vec_init cleanup. */ - if (flag_exceptions && !in_cleanup && !expr_noexcept_p (tmp, tf_none)) + if (flag_exceptions && !in_cleanup && !processing_template_decl + && !expr_noexcept_p (tmp, tf_none)) { loop = build2 (TRY_CATCH_EXPR, void_type_node, loop, unshare_expr (loop)); @@ -4743,7 +4760,9 @@ build_vec_init (tree base, tree maxindex, tree init, But for non-classes, that's the same as value-initialization. */ if (empty_list) { - if (cxx_dialect >= cxx11 && AGGREGATE_TYPE_P (type)) + if (cxx_dialect >= cxx11 + && (CLASS_TYPE_P (type) + || TREE_CODE (type) == ARRAY_TYPE)) { init = build_constructor (init_list_type_node, NULL); } diff --git a/gcc/cp/lambda.cc b/gcc/cp/lambda.cc index 65579edc316d9..5bbdddfb0b9b8 100644 --- a/gcc/cp/lambda.cc +++ b/gcc/cp/lambda.cc @@ -31,6 +31,7 @@ along with GCC; see the file COPYING3. If not see #include "toplev.h" #include "gimplify.h" #include "target.h" +#include "decl.h" /* Constructor for a lambda expression. */ @@ -1193,9 +1194,14 @@ maybe_add_lambda_conv_op (tree type) } } else - call = build_call_a (callop, - direct_argvec->length (), - direct_argvec->address ()); + { + /* Don't warn on deprecated or unavailable lambda declarations, unless + the lambda is actually called. */ + auto du = make_temp_override (deprecated_state, + UNAVAILABLE_DEPRECATED_SUPPRESS); + call = build_call_a (callop, direct_argvec->length (), + direct_argvec->address ()); + } CALL_FROM_THUNK_P (call) = 1; SET_EXPR_LOCATION (call, UNKNOWN_LOCATION); @@ -1553,6 +1559,9 @@ prune_lambda_captures (tree body) if (LAMBDA_EXPR_DEFAULT_CAPTURE_MODE (lam) == CPLD_NONE) /* No default captures, and we don't prune explicit captures. */ return; + /* Don't bother pruning in a template, we'll prune at instantiation time. */ + if (dependent_type_p (TREE_TYPE (lam))) + return; hash_map const_vars; diff --git a/gcc/cp/mangle.cc b/gcc/cp/mangle.cc index eb53e0ebeb435..4660514dc628b 100644 --- a/gcc/cp/mangle.cc +++ b/gcc/cp/mangle.cc @@ -1371,6 +1371,28 @@ find_decomp_unqualified_name (tree decl, size_t *len) return p; } +/* "For the purposes of mangling, the name of an anonymous union is considered + to be the name of the first named data member found by a pre-order, + depth-first, declaration-order walk of the data members of the anonymous + union. If there is no such data member (i.e., if all of the data members in + the union are unnamed), then there is no way for a program to refer to the + anonymous union, and there is therefore no need to mangle its name." */ + +static tree +anon_aggr_naming_decl (tree type) +{ + tree field = next_initializable_field (TYPE_FIELDS (type)); + for (; field; field = next_initializable_field (DECL_CHAIN (field))) + { + if (DECL_NAME (field)) + return field; + if (ANON_AGGR_TYPE_P (TREE_TYPE (field))) + if (tree sub = anon_aggr_naming_decl (TREE_TYPE (field))) + return sub; + } + return NULL_TREE; +} + /* We don't need to handle thunks, vtables, or VTTs here. Those are mangled through special entry points. @@ -1414,7 +1436,10 @@ write_unqualified_name (tree decl) bool found = false; - if (DECL_NAME (decl) == NULL_TREE) + if (DECL_NAME (decl) == NULL_TREE + && ANON_AGGR_TYPE_P (TREE_TYPE (decl))) + decl = anon_aggr_naming_decl (TREE_TYPE (decl)); + else if (DECL_NAME (decl) == NULL_TREE) { found = true; gcc_assert (DECL_ASSEMBLER_NAME_SET_P (decl)); diff --git a/gcc/cp/mapper-client.cc b/gcc/cp/mapper-client.cc index 8603a886a099d..fe9544b5ba43e 100644 --- a/gcc/cp/mapper-client.cc +++ b/gcc/cp/mapper-client.cc @@ -27,6 +27,7 @@ along with GCC; see the file COPYING3. If not see #define INCLUDE_STRING #define INCLUDE_VECTOR #define INCLUDE_MAP +#define INCLUDE_MEMORY #include "system.h" #include "line-map.h" diff --git a/gcc/cp/mapper-resolver.cc b/gcc/cp/mapper-resolver.cc index e3d29fb5ada16..e70d1b4ae2cae 100644 --- a/gcc/cp/mapper-resolver.cc +++ b/gcc/cp/mapper-resolver.cc @@ -25,6 +25,7 @@ along with GCC; see the file COPYING3. If not see #define INCLUDE_VECTOR #define INCLUDE_ALGORITHM #define INCLUDE_MAP +#define INCLUDE_MEMORY #include "system.h" // We don't want or need to be aware of networking diff --git a/gcc/cp/method.cc b/gcc/cp/method.cc index 903ee666ef396..be9406e330393 100644 --- a/gcc/cp/method.cc +++ b/gcc/cp/method.cc @@ -1222,7 +1222,11 @@ early_check_defaulted_comparison (tree fn) /* Defaulted outside the class body. */ ctx = TYPE_MAIN_VARIANT (parmtype); if (!is_friend (ctx, fn)) - error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx); + { + error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx); + inform (location_of (ctx), "declared here"); + ok = false; + } } else if (!same_type_ignoring_top_level_qualifiers_p (parmtype, ctx)) saw_bad = true; diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc index cebf9c35c1dea..5c5d02bb52386 100644 --- a/gcc/cp/module.cc +++ b/gcc/cp/module.cc @@ -202,6 +202,7 @@ Classes used: #define _DEFAULT_SOURCE 1 /* To get TZ field of struct tm, if available. */ #include "config.h" +#define INCLUDE_MEMORY #define INCLUDE_STRING #define INCLUDE_VECTOR #include "system.h" diff --git a/gcc/cp/name-lookup.cc b/gcc/cp/name-lookup.cc index 7b0638d316679..48c7badc865c4 100644 --- a/gcc/cp/name-lookup.cc +++ b/gcc/cp/name-lookup.cc @@ -7626,6 +7626,10 @@ outer_binding (tree name, /* Thread this new class-scope binding onto the IDENTIFIER_BINDING list so that future lookups find it quickly. */ + if (BASELINK_P (class_binding->value)) + /* Don't put a BASELINK in IDENTIFIER_BINDING. */ + class_binding->value + = BASELINK_FUNCTIONS (class_binding->value); class_binding->previous = outer; if (binding) binding->previous = class_binding; @@ -8447,6 +8451,43 @@ pop_from_top_level (void) free_saved_scope = s; } +/* Like push_to_top_level, but not if D is function-local. Returns whether we + did push to top. */ + +bool +maybe_push_to_top_level (tree d) +{ + /* Push if D isn't function-local, or is a lambda function, for which name + resolution is already done. */ + bool push_to_top + = !(current_function_decl + && !LAMBDA_FUNCTION_P (d) + && decl_function_context (d) == current_function_decl); + + if (push_to_top) + push_to_top_level (); + else + { + gcc_assert (!processing_template_decl); + push_function_context (); + cp_unevaluated_operand = 0; + c_inhibit_evaluation_warnings = 0; + } + + return push_to_top; +} + +/* Return from whatever maybe_push_to_top_level did. */ + +void +maybe_pop_from_top_level (bool push_to_top) +{ + if (push_to_top) + pop_from_top_level (); + else + pop_function_context (); +} + /* Push into the scope of the namespace NS, even if it is deeply nested within another namespace. */ diff --git a/gcc/cp/name-lookup.h b/gcc/cp/name-lookup.h index fa039028847ae..7336df767410b 100644 --- a/gcc/cp/name-lookup.h +++ b/gcc/cp/name-lookup.h @@ -468,6 +468,8 @@ extern void push_nested_namespace (tree); extern void pop_nested_namespace (tree); extern void push_to_top_level (void); extern void pop_from_top_level (void); +extern bool maybe_push_to_top_level (tree); +extern void maybe_pop_from_top_level (bool); extern void push_using_decl_bindings (tree, tree); /* Lower level interface for modules. */ diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc index 2235da10c7c4d..9c1bd32cff1cc 100644 --- a/gcc/cp/parser.cc +++ b/gcc/cp/parser.cc @@ -249,7 +249,7 @@ static cp_token_cache *cp_token_cache_new static tree cp_parser_late_noexcept_specifier (cp_parser *, tree); static void noexcept_override_late_checks - (tree, tree); + (tree); static void cp_parser_initial_pragma (cp_token *); @@ -2660,7 +2660,7 @@ static tree cp_parser_objc_struct_declaration /* Utility Routines */ static cp_expr cp_parser_lookup_name - (cp_parser *, tree, enum tag_types, bool, bool, bool, tree *, location_t); + (cp_parser *, tree, enum tag_types, int, bool, bool, tree *, location_t); static tree cp_parser_lookup_name_simple (cp_parser *, tree, location_t); static tree cp_parser_maybe_treat_template_as_class @@ -8254,7 +8254,7 @@ cp_parser_postfix_dot_deref_expression (cp_parser *parser, tree type = TREE_TYPE (postfix_expression); /* If we don't have a (type-dependent) object of class type, use typeof to figure out the type of the object. */ - if (type == NULL_TREE) + if (type == NULL_TREE || is_auto (type)) type = finish_typeof (postfix_expression); parser->context->object_type = type; } @@ -10157,7 +10157,10 @@ cp_parser_binary_expression (cp_parser* parser, bool cast_p, || (TREE_CODE (TREE_TYPE (TREE_OPERAND (current.lhs, 0))) != BOOLEAN_TYPE)))) /* Avoid warning for !!b == y where b is boolean. */ - && (!DECL_P (tree_strip_any_location_wrapper (current.lhs)) + && (!(DECL_P (tree_strip_any_location_wrapper (current.lhs)) + || (TREE_CODE (current.lhs) == NON_LVALUE_EXPR + && DECL_P (tree_strip_any_location_wrapper + (TREE_OPERAND (current.lhs, 0))))) || TREE_TYPE (current.lhs) == NULL_TREE || TREE_CODE (TREE_TYPE (current.lhs)) != BOOLEAN_TYPE)) warn_logical_not_parentheses (current.loc, current.tree_type, @@ -11510,11 +11513,8 @@ cp_parser_lambda_declarator_opt (cp_parser* parser, tree lambda_expr) an opening angle if present. */ if (cp_lexer_next_token_is (parser->lexer, CPP_LESS)) { - if (cxx_dialect < cxx14) - pedwarn (parser->lexer->next_token->location, OPT_Wc__14_extensions, - "lambda templates are only available with " - "%<-std=c++14%> or %<-std=gnu++14%>"); - else if (pedantic && cxx_dialect < cxx20) + if (cxx_dialect < cxx20 + && (pedantic || cxx_dialect < cxx14)) pedwarn (parser->lexer->next_token->location, OPT_Wc__20_extensions, "lambda templates are only available with " "%<-std=c++20%> or %<-std=gnu++20%>"); @@ -18587,7 +18587,7 @@ cp_parser_template_name (cp_parser* parser, /* Look up the name. */ decl = cp_parser_lookup_name (parser, identifier, tag_type, - /*is_template=*/true, + /*is_template=*/1 + template_keyword_p, /*is_namespace=*/false, check_dependency_p, /*ambiguous_decls=*/NULL, @@ -21007,7 +21007,9 @@ cp_parser_enum_specifier (cp_parser* parser) /* If the next token is not '}', then there are some enumerators. */ else if (cp_lexer_next_token_is (parser->lexer, CPP_CLOSE_BRACE)) { - if (is_unnamed && !scoped_enum_p) + if (is_unnamed && !scoped_enum_p + /* Don't warn for enum {} a; here. */ + && cp_lexer_nth_token_is (parser->lexer, 2, CPP_SEMICOLON)) pedwarn (type_start_token->location, OPT_Wpedantic, "ISO C++ forbids empty unnamed enum"); } @@ -25872,6 +25874,11 @@ cp_parser_class_specifier_1 (cp_parser* parser) saved_in_unbraced_linkage_specification_p = parser->in_unbraced_linkage_specification_p; parser->in_unbraced_linkage_specification_p = false; + /* 'this' from an enclosing non-static member function is unavailable. */ + tree saved_ccp = current_class_ptr; + tree saved_ccr = current_class_ref; + current_class_ptr = NULL_TREE; + current_class_ref = NULL_TREE; /* Start the class. */ if (nested_name_specifier_p) @@ -26090,8 +26097,6 @@ cp_parser_class_specifier_1 (cp_parser* parser) /* If there are noexcept-specifiers that have not yet been processed, take care of them now. Do this before processing NSDMIs as they may depend on noexcept-specifiers already having been processed. */ - tree save_ccp = current_class_ptr; - tree save_ccr = current_class_ref; FOR_EACH_VEC_SAFE_ELT (unparsed_noexcepts, ix, decl) { tree ctx = DECL_CONTEXT (decl); @@ -26143,7 +26148,7 @@ cp_parser_class_specifier_1 (cp_parser* parser) /* The finish_struct call above performed various override checking, but it skipped unparsed noexcept-specifier operands. Now that we have resolved them, check again. */ - noexcept_override_late_checks (type, decl); + noexcept_override_late_checks (decl); /* Remove any member-function parameters from the symbol table. */ pop_injected_parms (); @@ -26167,8 +26172,8 @@ cp_parser_class_specifier_1 (cp_parser* parser) cp_parser_late_parsing_nsdmi (parser, decl); } vec_safe_truncate (unparsed_nsdmis, 0); - current_class_ptr = save_ccp; - current_class_ref = save_ccr; + current_class_ptr = NULL_TREE; + current_class_ref = NULL_TREE; if (pushed_scope) pop_scope (pushed_scope); @@ -26200,6 +26205,8 @@ cp_parser_class_specifier_1 (cp_parser* parser) = saved_num_template_parameter_lists; parser->in_unbraced_linkage_specification_p = saved_in_unbraced_linkage_specification_p; + current_class_ptr = saved_ccp; + current_class_ref = saved_ccr; return type; } @@ -27866,14 +27873,13 @@ cp_parser_late_noexcept_specifier (cp_parser *parser, tree default_arg) } /* Perform late checking of overriding function with respect to their - noexcept-specifiers. TYPE is the class and FNDECL is the function - that potentially overrides some virtual function with the same - signature. */ + noexcept-specifiers. FNDECL is the member function that potentially + overrides some virtual function with the same signature. */ static void -noexcept_override_late_checks (tree type, tree fndecl) +noexcept_override_late_checks (tree fndecl) { - tree binfo = TYPE_BINFO (type); + tree binfo = TYPE_BINFO (DECL_CONTEXT (fndecl)); tree base_binfo; if (DECL_STATIC_FUNCTION_P (fndecl)) @@ -30379,7 +30385,7 @@ prefer_type_arg (tag_types tag_type) refer to types are ignored. If IS_TEMPLATE is TRUE, bindings that do not refer to templates are - ignored. + ignored. If IS_TEMPLATE IS 2, the 'template' keyword was specified. If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces are ignored. @@ -30394,7 +30400,7 @@ prefer_type_arg (tag_types tag_type) static cp_expr cp_parser_lookup_name (cp_parser *parser, tree name, enum tag_types tag_type, - bool is_template, + int is_template, bool is_namespace, bool check_dependency, tree *ambiguous_decls, @@ -30561,9 +30567,12 @@ cp_parser_lookup_name (cp_parser *parser, tree name, } else if (object_type) { + bool dep = dependent_scope_p (object_type); + /* Look up the name in the scope of the OBJECT_TYPE, unless the OBJECT_TYPE is not a class. */ - if (CLASS_TYPE_P (object_type)) + if (CLASS_TYPE_P (object_type) + && !(dep && LAMBDA_TYPE_P (object_type))) /* If the OBJECT_TYPE is a template specialization, it may be instantiated during name lookup. In that case, errors may be issued. Even if we rollback the current tentative @@ -30576,7 +30585,14 @@ cp_parser_lookup_name (cp_parser *parser, tree name, else decl = NULL_TREE; - if (!decl) + /* If we didn't find a member and have dependent bases, the member lookup + is now dependent. */ + if (!dep && !decl && any_dependent_bases_p (object_type)) + dep = true; + + if (dep && is_template == 2) + /* The template keyword specifies a dependent template. */; + else if (!decl) /* Look it up in the enclosing context. DR 141: When looking for a template-name after -> or ., only consider class templates. */ decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE @@ -30589,8 +30605,7 @@ cp_parser_lookup_name (cp_parser *parser, tree name, /* If we know we're looking for a type (e.g. A in p->A::x), mock up a typename. */ - if (!decl && object_type && tag_type != none_type - && dependentish_scope_p (object_type)) + if (!decl && dep && tag_type != none_type) { tree type = build_typename_type (object_type, name, name, typename_type); @@ -31694,12 +31709,6 @@ cp_parser_single_declaration (cp_parser* parser, if (cp_parser_declares_only_class_p (parser) || (declares_class_or_enum & 2)) { - /* If this is a declaration, but not a definition, associate - any constraints with the type declaration. Constraints - are associated with definitions in cp_parser_class_specifier. */ - if (declares_class_or_enum == 1) - associate_classtype_constraints (decl_specifiers.type); - decl = shadow_tag (&decl_specifiers); /* In this case: @@ -31721,6 +31730,12 @@ cp_parser_single_declaration (cp_parser* parser, else decl = error_mark_node; + /* If this is a declaration, but not a definition, associate + any constraints with the type declaration. Constraints + are associated with definitions in cp_parser_class_specifier. */ + if (declares_class_or_enum == 1) + associate_classtype_constraints (TREE_TYPE (decl)); + /* Perform access checks for template parameters. */ cp_parser_perform_template_parameter_access_checks (checks); @@ -32046,7 +32061,10 @@ cp_parser_enclosed_template_argument_list (cp_parser* parser) /* Parse the template-argument-list itself. */ if (cp_lexer_next_token_is (parser->lexer, CPP_GREATER) || cp_lexer_next_token_is (parser->lexer, CPP_RSHIFT)) - arguments = NULL_TREE; + { + arguments = make_tree_vec (0); + SET_NON_DEFAULT_TEMPLATE_ARGS_COUNT (arguments, 0); + } else arguments = cp_parser_template_argument_list (parser); /* Look for the `>' that ends the template-argument-list. If we find @@ -33508,7 +33526,8 @@ class_decl_loc_t::add (cp_parser *parser, location_t key_loc, bool key_redundant = (!def_p && !decl_p && (decl == type_decl || TREE_CODE (decl) == TEMPLATE_DECL - || TYPE_BEING_DEFINED (type))); + || (CLASS_TYPE_P (type) + && TYPE_BEING_DEFINED (type)))); if (key_redundant && class_key != class_type @@ -33546,7 +33565,7 @@ class_decl_loc_t::add (cp_parser *parser, location_t key_loc, } else { - /* TYPE was previously defined in some unknown precompiled hdeader. + /* TYPE was previously defined in some unknown precompiled header. Simply add a record of its definition at an unknown location and proceed below to add a reference to it at the current location. (Declarations in precompiled headers that are not definitions @@ -33658,14 +33677,32 @@ class_decl_loc_t::diag_mismatched_tags (tree type_decl) be (and inevitably is) at index zero. */ tree spec = specialization_of (type); cdlguide = class2loc.get (spec); + /* It's possible that we didn't find SPEC. Consider: + + template struct A { + template struct W { }; + }; + struct A::W w; // #1 + + where while parsing A and #1 we've stashed + A + A::W + A::W + into CLASS2LOC. If TYPE is A::W, specialization_of + will yield A::W which may be in CLASS2LOC if we had + an A class specialization, but otherwise won't be in it. + So try to look up A::W. */ + if (!cdlguide) + { + spec = DECL_TEMPLATE_RESULT (most_general_template (spec)); + cdlguide = class2loc.get (spec); + } + /* Now we really should have found something. */ gcc_assert (cdlguide != NULL); } - else - { - /* Skip declarations that consistently use the same class-key. */ - if (def_class_key != none_type) - return; - } + /* Skip declarations that consistently use the same class-key. */ + else if (def_class_key != none_type) + return; /* Set if a definition for the class has been seen. */ const bool def_p = cdlguide->def_p (); @@ -47629,7 +47666,7 @@ cp_parser_pragma_unroll (cp_parser *parser, cp_token *pragma_tok) location_t location = cp_lexer_peek_token (parser->lexer)->location; tree expr = cp_parser_constant_expression (parser); unsigned short unroll; - expr = maybe_constant_value (expr); + expr = fold_non_dependent_expr (expr); HOST_WIDE_INT lunroll = 0; if (!INTEGRAL_TYPE_P (TREE_TYPE (expr)) || TREE_CODE (expr) != INTEGER_CST diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc index e785c5db14208..d6cdab5ad80af 100644 --- a/gcc/cp/pt.cc +++ b/gcc/cp/pt.cc @@ -184,6 +184,7 @@ static int unify_pack_expansion (tree, tree, tree, tree, unification_kind_t, bool, bool); static tree copy_template_args (tree); static tree tsubst_template_parms (tree, tree, tsubst_flags_t); +static void tsubst_each_template_parm_constraints (tree, tree, tsubst_flags_t); tree most_specialized_partial_spec (tree, tsubst_flags_t); static tree tsubst_aggr_type (tree, tree, tsubst_flags_t, tree, int); static tree tsubst_arg_types (tree, tree, tree, tsubst_flags_t, tree); @@ -388,7 +389,9 @@ template_class_depth (tree type) { tree tinfo = get_template_info (type); - if (tinfo && PRIMARY_TEMPLATE_P (TI_TEMPLATE (tinfo)) + if (tinfo + && TREE_CODE (TI_TEMPLATE (tinfo)) == TEMPLATE_DECL + && PRIMARY_TEMPLATE_P (TI_TEMPLATE (tinfo)) && uses_template_parms (INNERMOST_TEMPLATE_ARGS (TI_ARGS (tinfo)))) ++depth; @@ -874,12 +877,12 @@ check_explicit_instantiation_namespace (tree spec) spec, current_namespace, ns); } -/* Returns the type of a template specialization only if that - specialization needs to be defined. Otherwise (e.g., if the type has - already been defined), the function returns NULL_TREE. */ +/* Returns true if TYPE is a new partial specialization that needs to be + set up. This may also modify TYPE to point to the correct (new or + existing) constrained partial specialization. */ -static tree -maybe_new_partial_specialization (tree type) +static bool +maybe_new_partial_specialization (tree& type) { /* An implicit instantiation of an incomplete type implies the definition of a new class template. @@ -893,7 +896,7 @@ maybe_new_partial_specialization (tree type) Here, S is an implicit instantiation of S whose type is incomplete. */ if (CLASSTYPE_IMPLICIT_INSTANTIATION (type) && !COMPLETE_TYPE_P (type)) - return type; + return true; /* It can also be the case that TYPE is a completed specialization. Continuing the previous example, suppose we also declare: @@ -919,11 +922,11 @@ maybe_new_partial_specialization (tree type) /* If there are no template parameters, this cannot be a new partial template specialization? */ if (!current_template_parms) - return NULL_TREE; + return false; /* The injected-class-name is not a new partial specialization. */ if (DECL_SELF_REFERENCE_P (TYPE_NAME (type))) - return NULL_TREE; + return false; /* If the constraints are not the same as those of the primary then, we can probably create a new specialization. */ @@ -933,7 +936,7 @@ maybe_new_partial_specialization (tree type) { tree main_constr = get_constraints (tmpl); if (equivalent_constraints (type_constr, main_constr)) - return NULL_TREE; + return false; } /* Also, if there's a pre-existing specialization with matching @@ -946,7 +949,10 @@ maybe_new_partial_specialization (tree type) tree spec_constr = get_constraints (spec_tmpl); if (comp_template_args (args, spec_args) && equivalent_constraints (type_constr, spec_constr)) - return NULL_TREE; + { + type = TREE_TYPE (spec_tmpl); + return false; + } specs = TREE_CHAIN (specs); } @@ -971,10 +977,11 @@ maybe_new_partial_specialization (tree type) set_instantiating_module (d); DECL_MODULE_EXPORT_P (d) = DECL_MODULE_EXPORT_P (tmpl); - return t; + type = t; + return true; } - return NULL_TREE; + return false; } /* The TYPE is being declared. If it is a template type, that means it @@ -1030,16 +1037,16 @@ maybe_process_partial_specialization (tree type) Make sure that `C' and `C' are implicit instantiations. */ - if (tree t = maybe_new_partial_specialization (type)) + if (maybe_new_partial_specialization (type)) { - if (!check_specialization_namespace (CLASSTYPE_TI_TEMPLATE (t)) + if (!check_specialization_namespace (CLASSTYPE_TI_TEMPLATE (type)) && !at_namespace_scope_p ()) return error_mark_node; - SET_CLASSTYPE_TEMPLATE_SPECIALIZATION (t); - DECL_SOURCE_LOCATION (TYPE_MAIN_DECL (t)) = input_location; + SET_CLASSTYPE_TEMPLATE_SPECIALIZATION (type); + DECL_SOURCE_LOCATION (TYPE_MAIN_DECL (type)) = input_location; if (processing_template_decl) { - tree decl = push_template_decl (TYPE_MAIN_DECL (t)); + tree decl = push_template_decl (TYPE_MAIN_DECL (type)); if (decl == error_mark_node) return error_mark_node; return TREE_TYPE (decl); @@ -1903,7 +1910,7 @@ iterative_hash_template_arg (tree arg, hashval_t val) case CALL_EXPR: { tree fn = CALL_EXPR_FN (arg); - if (tree name = dependent_name (fn)) + if (tree name = call_expr_dependent_name (arg)) { if (TREE_CODE (fn) == TEMPLATE_ID_EXPR) val = iterative_hash_template_arg (TREE_OPERAND (fn, 1), val); @@ -2319,8 +2326,8 @@ determine_specialization (tree template_id, if (!compparms (fn_arg_types, decl_arg_types)) continue; - tree freq = get_trailing_function_requirements (fn); - tree dreq = get_trailing_function_requirements (decl); + tree freq = get_constraints (fn); + tree dreq = get_constraints (decl); if (!freq != !dreq) continue; if (freq) @@ -2329,7 +2336,7 @@ determine_specialization (tree template_id, constraint-expression. */ tree fargs = DECL_TI_ARGS (fn); tsubst_flags_t complain = tf_none; - freq = tsubst_constraint (freq, fargs, complain, fn); + freq = tsubst_constraint_info (freq, fargs, complain, fn); if (!cp_tree_equal (freq, dreq)) continue; } @@ -2521,17 +2528,14 @@ determine_specialization (tree template_id, } /* It was a specialization of a template. */ - targs = DECL_TI_ARGS (DECL_TEMPLATE_RESULT (TREE_VALUE (templates))); - if (TMPL_ARGS_HAVE_MULTIPLE_LEVELS (targs)) - { - *targs_out = copy_node (targs); - SET_TMPL_ARGS_LEVEL (*targs_out, - TMPL_ARGS_DEPTH (*targs_out), - TREE_PURPOSE (templates)); - } - else - *targs_out = TREE_PURPOSE (templates); - return TREE_VALUE (templates); + tree tmpl = TREE_VALUE (templates); + *targs_out = add_outermost_template_args (tmpl, TREE_PURPOSE (templates)); + + /* Propagate the template's constraints to the declaration. */ + if (tsk != tsk_template) + set_constraints (decl, get_constraints (tmpl)); + + return tmpl; } /* Returns a chain of parameter types, exactly like the SPEC_TYPES, @@ -4102,10 +4106,14 @@ find_parameter_packs_r (tree *tp, int *walk_subtrees, void* data) case TAG_DEFN: t = TREE_TYPE (t); if (CLASS_TYPE_P (t)) - /* Local class, need to look through the whole definition. */ - for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t))) - cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r, - ppd, ppd->visited); + { + /* Local class, need to look through the whole definition. + TYPE_BINFO might be unset for a partial instantiation. */ + if (TYPE_BINFO (t)) + for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t))) + cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r, + ppd, ppd->visited); + } else /* Enum, look at the values. */ for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l)) @@ -4953,6 +4961,28 @@ generic_targs_for (tree tmpl) return template_parms_to_args (DECL_TEMPLATE_PARMS (tmpl)); } +/* Return the template arguments corresponding to the template parameters of + TMPL's enclosing scope. When TMPL is a member of a partial specialization, + this returns the arguments for the partial specialization as opposed to those + for the primary template, which is the main difference between this function + and simply using e.g. the TYPE_TI_ARGS of TMPL's DECL_CONTEXT. */ + +tree +outer_template_args (tree tmpl) +{ + tree ti = get_template_info (DECL_TEMPLATE_RESULT (tmpl)); + if (!ti) + return NULL_TREE; + tree args = TI_ARGS (ti); + if (!PRIMARY_TEMPLATE_P (tmpl)) + return args; + if (TMPL_ARGS_DEPTH (args) == 1) + return NULL_TREE; + args = copy_node (args); + --TREE_VEC_LENGTH (args); + return args; +} + /* Update the declared TYPE by doing any lookups which were thought to be dependent, but are not now that we know the SCOPE of the declarator. */ @@ -5011,6 +5041,8 @@ maybe_update_decl_type (tree orig_type, tree scope) static tree build_template_decl (tree decl, tree parms, bool member_template_p) { + gcc_checking_assert (TREE_CODE (decl) != TEMPLATE_DECL); + tree tmpl = build_lang_decl (TEMPLATE_DECL, DECL_NAME (decl), NULL_TREE); SET_DECL_LANGUAGE (tmpl, DECL_LANGUAGE (decl)); DECL_TEMPLATE_PARMS (tmpl) = parms; @@ -6306,7 +6338,10 @@ redeclare_class_template (tree type, tree parms, tree cons) { auto_diagnostic_group d; error ("template parameter %q+#D", tmpl_parm); - inform (DECL_SOURCE_LOCATION (parm), "redeclared here as %q#D", parm); + if (DECL_P (parm)) + inform (DECL_SOURCE_LOCATION (parm), "redeclared here as %q#D", parm); + else + inform (input_location, "redeclared here"); return false; } @@ -8291,7 +8326,7 @@ canonicalize_expr_argument (tree arg, tsubst_flags_t complain) constrained than the parameter. */ static bool -is_compatible_template_arg (tree parm, tree arg) +is_compatible_template_arg (tree parm, tree arg, tree args) { tree parm_cons = get_constraints (parm); @@ -8312,6 +8347,7 @@ is_compatible_template_arg (tree parm, tree arg) { tree aparms = DECL_INNERMOST_TEMPLATE_PARMS (arg); new_args = template_parms_level_to_args (aparms); + new_args = add_to_template_args (args, new_args); ++processing_template_decl; parm_cons = tsubst_constraint_info (parm_cons, new_args, tf_none, NULL_TREE); @@ -8570,7 +8606,7 @@ convert_template_argument (tree parm, // Check that the constraints are compatible before allowing the // substitution. if (val != error_mark_node) - if (!is_compatible_template_arg (parm, arg)) + if (!is_compatible_template_arg (parm, arg, args)) { if (in_decl && (complain & tf_error)) { @@ -8605,7 +8641,7 @@ convert_template_argument (tree parm, else if (tree a = type_uses_auto (t)) { t = do_auto_deduction (t, arg, a, complain, adc_unify, args, - LOOKUP_IMPLICIT); + LOOKUP_IMPLICIT, /*tmpl=*/in_decl); if (t == error_mark_node) return error_mark_node; } @@ -10408,6 +10444,12 @@ lookup_and_finish_template_variable (tree templ, tree targs, templ = lookup_template_variable (templ, targs); if (!any_dependent_template_arguments_p (targs)) { + /* We may be called while doing a partial substitution, but the + type of the variable template may be auto, in which case we + will call do_auto_deduction in mark_used (which clears tf_partial) + and the auto must be properly reduced at that time for the + deduction to work. */ + complain &= ~tf_partial; templ = finish_template_variable (templ, complain); mark_used (templ); } @@ -10636,21 +10678,6 @@ for_each_template_parm_r (tree *tp, int *walk_subtrees, void *d) return error_mark_node; break; - case REQUIRES_EXPR: - { - if (!fn) - return error_mark_node; - - /* Recursively walk the type of each constraint variable. */ - tree p = TREE_OPERAND (t, 0); - while (p) - { - WALK_SUBTREE (TREE_TYPE (p)); - p = TREE_CHAIN (p); - } - } - break; - default: break; } @@ -10946,7 +10973,7 @@ uses_template_parms_level (tree t, int level) /* Returns true if the signature of DECL depends on any template parameter from its enclosing class. */ -bool +static bool uses_outer_template_parms (tree decl) { int depth = template_class_depth (CP_DECL_CONTEXT (decl)); @@ -10977,13 +11004,27 @@ uses_outer_template_parms (tree decl) return true; } } + if (uses_outer_template_parms_in_constraints (decl)) + return true; + return false; +} + +/* Returns true if the constraints of DECL depend on any template parameters + from its enclosing scope. */ + +bool +uses_outer_template_parms_in_constraints (tree decl) +{ tree ci = get_constraints (decl); if (ci) ci = CI_ASSOCIATED_CONSTRAINTS (ci); - if (ci && for_each_template_parm (ci, template_parm_outer_level, - &depth, NULL, /*nondeduced*/true)) - return true; - return false; + if (!ci) + return false; + int depth = template_class_depth (CP_DECL_CONTEXT (decl)); + if (depth == 0) + return false; + return for_each_template_parm (ci, template_parm_outer_level, + &depth, NULL, /*nondeduced*/true); } /* Returns TRUE iff INST is an instantiation we don't need to do in an @@ -11170,6 +11211,33 @@ outermost_tinst_level (void) return level; } +/* True iff T is a friend function declaration that is not itself a template + and is not defined in a class template. */ + +bool +non_templated_friend_p (tree t) +{ + if (t && TREE_CODE (t) == FUNCTION_DECL + && DECL_UNIQUE_FRIEND_P (t)) + { + tree ti = DECL_TEMPLATE_INFO (t); + if (!ti) + return true; + /* DECL_FRIEND_CONTEXT is set for a friend defined in class. */ + if (DECL_FRIEND_CONTEXT (t)) + return false; + /* Non-templated friends in a class template are still represented with a + TEMPLATE_DECL; check that its primary template is the befriending + class. Note that DECL_PRIMARY_TEMPLATE is null for + template friend A::f(); */ + tree tmpl = TI_TEMPLATE (ti); + tree primary = DECL_PRIMARY_TEMPLATE (tmpl); + return (primary && primary != tmpl); + } + else + return false; +} + /* DECL is a friend FUNCTION_DECL or TEMPLATE_DECL. ARGS is the vector of template arguments, as for tsubst. @@ -11246,7 +11314,13 @@ tsubst_friend_function (tree decl, tree args) tree parms = DECL_TEMPLATE_PARMS (new_friend); tree treqs = TEMPLATE_PARMS_CONSTRAINTS (parms); treqs = maybe_substitute_reqs_for (treqs, new_friend); - TEMPLATE_PARMS_CONSTRAINTS (parms) = treqs; + if (treqs != TEMPLATE_PARMS_CONSTRAINTS (parms)) + { + TEMPLATE_PARMS_CONSTRAINTS (parms) = treqs; + /* As well as each TEMPLATE_PARM_CONSTRAINTS. */ + tsubst_each_template_parm_constraints (parms, args, + tf_warning_or_error); + } } /* The mangled name for the NEW_FRIEND is incorrect. The function @@ -11270,9 +11344,10 @@ tsubst_friend_function (tree decl, tree args) tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend); tree new_friend_result_template_info = NULL_TREE; bool new_friend_is_defn = - (DECL_INITIAL (DECL_TEMPLATE_RESULT - (template_for_substitution (new_friend))) - != NULL_TREE); + (new_friend_template_info + && (DECL_INITIAL (DECL_TEMPLATE_RESULT + (template_for_substitution (new_friend))) + != NULL_TREE)); tree not_tmpl = new_friend; if (TREE_CODE (new_friend) == TEMPLATE_DECL) @@ -11492,6 +11567,8 @@ tsubst_friend_class (tree friend_tmpl, tree args) { tree parms = tsubst_template_parms (DECL_TEMPLATE_PARMS (friend_tmpl), args, tf_warning_or_error); + tsubst_each_template_parm_constraints (parms, args, + tf_warning_or_error); location_t saved_input_location = input_location; input_location = DECL_SOURCE_LOCATION (friend_tmpl); tree cons = get_constraints (tmpl); @@ -11526,6 +11603,8 @@ tsubst_friend_class (tree friend_tmpl, tree args) DECL_FRIEND_CONTEXT (friend_tmpl)); --processing_template_decl; set_constraints (tmpl, ci); + tsubst_each_template_parm_constraints (DECL_TEMPLATE_PARMS (tmpl), + args, tf_warning_or_error); } /* Inject this template into the enclosing namspace scope. */ @@ -12943,17 +13022,29 @@ class el_data /* List of local_specializations used within the pattern. */ tree extra; tsubst_flags_t complain; + /* True iff we don't want to walk into unevaluated contexts. */ + bool skip_unevaluated_operands = false; + /* The unevaluated contexts that we avoided walking. */ + auto_vec skipped_trees; el_data (tsubst_flags_t c) : extra (NULL_TREE), complain (c) {} }; static tree -extract_locals_r (tree *tp, int */*walk_subtrees*/, void *data_) +extract_locals_r (tree *tp, int *walk_subtrees, void *data_) { el_data &data = *reinterpret_cast(data_); tree *extra = &data.extra; tsubst_flags_t complain = data.complain; + if (data.skip_unevaluated_operands + && unevaluated_p (TREE_CODE (*tp))) + { + data.skipped_trees.safe_push (*tp); + *walk_subtrees = 0; + return NULL_TREE; + } + if (TYPE_P (*tp) && typedef_variant_p (*tp)) /* Remember local typedefs (85214). */ tp = &TYPE_NAME (*tp); @@ -13045,7 +13136,20 @@ static tree extract_local_specs (tree pattern, tsubst_flags_t complain) { el_data data (complain); + /* Walk the pattern twice, ignoring unevaluated operands the first time + around, so that if a local specialization appears in both an evaluated + and unevaluated context we prefer to process it in the evaluated context + (since e.g. process_outer_var_ref is a no-op inside an unevaluated + context). */ + data.skip_unevaluated_operands = true; cp_walk_tree (&pattern, extract_locals_r, &data, &data.visited); + /* Now walk the unevaluated contexts we skipped the first time around. */ + data.skip_unevaluated_operands = false; + for (tree t : data.skipped_trees) + { + data.visited.remove (t); + cp_walk_tree (&t, extract_locals_r, &data, &data.visited); + } return data.extra; } @@ -13648,7 +13752,6 @@ tsubst_template_parm (tree t, tree args, tsubst_flags_t complain) default_value = TREE_PURPOSE (t); parm_decl = TREE_VALUE (t); - tree constraint = TEMPLATE_PARM_CONSTRAINTS (t); parm_decl = tsubst (parm_decl, args, complain, NULL_TREE); if (TREE_CODE (parm_decl) == PARM_DECL @@ -13656,13 +13759,34 @@ tsubst_template_parm (tree t, tree args, tsubst_flags_t complain) parm_decl = error_mark_node; default_value = tsubst_template_arg (default_value, args, complain, NULL_TREE); - constraint = tsubst_constraint (constraint, args, complain, NULL_TREE); tree r = build_tree_list (default_value, parm_decl); - TEMPLATE_PARM_CONSTRAINTS (r) = constraint; + TEMPLATE_PARM_CONSTRAINTS (r) = TEMPLATE_PARM_CONSTRAINTS (t); return r; } +/* Substitute in-place the TEMPLATE_PARM_CONSTRAINTS of each template + parameter in PARMS for sake of declaration matching. */ + +static void +tsubst_each_template_parm_constraints (tree parms, tree args, + tsubst_flags_t complain) +{ + ++processing_template_decl; + for (; parms; parms = TREE_CHAIN (parms)) + { + tree level = TREE_VALUE (parms); + for (int i = 0; i < TREE_VEC_LENGTH (level); ++i) + { + tree parm = TREE_VEC_ELT (level, i); + TEMPLATE_PARM_CONSTRAINTS (parm) + = tsubst_constraint (TEMPLATE_PARM_CONSTRAINTS (parm), args, + complain, NULL_TREE); + } + } + --processing_template_decl; +} + /* Substitute the ARGS into the indicated aggregate (or enumeration) type T. If T is not an aggregate or enumeration type, it is handled as if by tsubst. IN_DECL is as for tsubst. If @@ -13730,8 +13854,8 @@ tsubst_aggr_type (tree t, complain, in_decl); if (argvec == error_mark_node) r = error_mark_node; - else if (!entering_scope - && cxx_dialect >= cxx17 && dependent_scope_p (context)) + else if (!entering_scope && (complain & tf_dguide) + && dependent_scope_p (context)) { /* See maybe_dependent_member_ref. */ tree name = TYPE_IDENTIFIER (t); @@ -14057,6 +14181,10 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, && !LAMBDA_FUNCTION_P (t)) return t; + /* A non-templated friend doesn't get DECL_TEMPLATE_INFO. */ + if (non_templated_friend_p (t)) + goto friend_case; + /* Calculate the most general template of which R is a specialization. */ gen_tmpl = most_general_template (DECL_TI_TEMPLATE (t)); @@ -14084,7 +14212,9 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, { hash = hash_tmpl_and_args (gen_tmpl, argvec); if (tree spec = retrieve_specialization (gen_tmpl, argvec, hash)) - return spec; + /* The spec for these args might be a partial instantiation of the + template, but here what we want is the FUNCTION_DECL. */ + return STRIP_TEMPLATE (spec); } } else @@ -14092,7 +14222,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, /* This special case arises when we have something like this: template struct S { - friend void f(int, double); + friend void f(int, double); }; Here, the DECL_TI_TEMPLATE for the friend declaration @@ -14100,6 +14230,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, tsubst_friend_function, and we want only to create a new decl (R) with appropriate types so that we can call determine_specialization. */ + friend_case: gen_tmpl = NULL_TREE; argvec = NULL_TREE; } @@ -14295,7 +14426,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, /* If this is an instantiation of a member template, clone it. If it isn't, that'll be handled by clone_constructors_and_destructors. */ - if (PRIMARY_TEMPLATE_P (gen_tmpl)) + if (gen_tmpl && PRIMARY_TEMPLATE_P (gen_tmpl)) clone_cdtor (r, /*update_methods=*/false); } else if ((complain & tf_error) != 0 @@ -14313,6 +14444,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, } determine_visibility (r); if (DECL_DEFAULTED_OUTSIDE_CLASS_P (r) + && COMPLETE_TYPE_P (DECL_CONTEXT (r)) && !processing_template_decl) defaulted_late_check (r); @@ -14902,7 +15034,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) if (argvec != error_mark_node) argvec = (coerce_innermost_template_parms (DECL_TEMPLATE_PARMS (gen_tmpl), - argvec, t, complain, + argvec, tmpl, complain, /*all*/true, /*defarg*/true)); if (argvec == error_mark_node) RETURN (error_mark_node); @@ -16497,7 +16629,7 @@ tsubst_baselink (tree baselink, tree object_type, name = make_conv_op_name (optype); /* See maybe_dependent_member_ref. */ - if (dependent_scope_p (qualifying_scope)) + if ((complain & tf_dguide) && dependent_scope_p (qualifying_scope)) { if (template_id_p) name = build2 (TEMPLATE_ID_EXPR, unknown_type_node, name, @@ -16817,7 +16949,7 @@ static tree maybe_dependent_member_ref (tree t, tree args, tsubst_flags_t complain, tree in_decl) { - if (cxx_dialect < cxx17) + if (!(complain & tf_dguide)) return NULL_TREE; tree ctx = context_for_name_lookup (t); @@ -16882,13 +17014,8 @@ tsubst_copy (tree t, tree args, tsubst_flags_t complain, tree in_decl) if (DECL_TEMPLATE_PARM_P (t)) return tsubst_copy (DECL_INITIAL (t), args, complain, in_decl); - /* There is no need to substitute into namespace-scope - enumerators. */ - if (DECL_NAMESPACE_SCOPE_P (t)) + if (!uses_template_parms (DECL_CONTEXT (t))) return t; - /* If ARGS is NULL, then T is known to be non-dependent. */ - if (args == NULL_TREE) - return scalar_constant_value (t); if (tree ref = maybe_dependent_member_ref (t, args, complain, in_decl)) return ref; @@ -17075,7 +17202,7 @@ tsubst_copy (tree t, tree args, tsubst_flags_t complain, tree in_decl) have to substitute this with one having context `D'. */ tree context = tsubst (DECL_CONTEXT (t), args, complain, in_decl); - if (dependent_scope_p (context)) + if ((complain & tf_dguide) && dependent_scope_p (context)) { /* When rewriting a constructor into a deduction guide, a non-dependent name can become dependent, so memtmpl @@ -18633,6 +18760,11 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl, tree asmspec_tree = NULL_TREE; maybe_push_decl (decl); + if (VAR_P (decl) + && DECL_LANG_SPECIFIC (decl) + && DECL_OMP_PRIVATIZED_MEMBER (decl)) + break; + if (VAR_P (decl) && DECL_DECOMPOSITION_P (decl) && TREE_TYPE (pattern_decl) != error_mark_node) @@ -18970,7 +19102,10 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl, case TAG_DEFN: tmp = tsubst (TREE_TYPE (t), args, complain, NULL_TREE); - if (CLASS_TYPE_P (tmp)) + if (dependent_type_p (tmp)) + /* This is a partial instantiation, try again when full. */ + add_stmt (build_min (TAG_DEFN, tmp)); + else if (CLASS_TYPE_P (tmp)) { /* Local classes are not independent templates; they are instantiated along with their containing function. And this @@ -18979,6 +19114,8 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl, /* Closures are handled by the LAMBDA_EXPR. */ gcc_assert (!LAMBDA_TYPE_P (TREE_TYPE (t))); complete_type (tmp); + tree save_ccp = current_class_ptr; + tree save_ccr = current_class_ref; for (tree fld = TYPE_FIELDS (tmp); fld; fld = DECL_CHAIN (fld)) if ((VAR_P (fld) || (TREE_CODE (fld) == FUNCTION_DECL @@ -18986,6 +19123,10 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl, && DECL_TEMPLATE_INSTANTIATION (fld)) instantiate_decl (fld, /*defer_ok=*/false, /*expl_inst_class=*/false); + else if (TREE_CODE (fld) == FIELD_DECL) + maybe_instantiate_nsdmi_init (fld, tf_warning_or_error); + current_class_ptr = save_ccp; + current_class_ref = save_ccr; } break; @@ -19475,13 +19616,6 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl, templated_operator_saved_lookups (t), complain)); - case ANNOTATE_EXPR: - tmp = RECUR (TREE_OPERAND (t, 0)); - RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR, - TREE_TYPE (tmp), tmp, - RECUR (TREE_OPERAND (t, 1)), - RECUR (TREE_OPERAND (t, 2)))); - case PREDICT_EXPR: RETURN (add_stmt (copy_node (t))); @@ -19590,10 +19724,11 @@ tsubst_non_call_postfix_expression (tree t, tree args, /* Subroutine of tsubst_lambda_expr: add the FIELD/INIT capture pair to the LAMBDA_EXPR_CAPTURE_LIST passed in LIST. Do deduction for a previously - dependent init-capture. */ + dependent init-capture. EXPLICIT_P is true if the original list had + explicit captures. */ static void -prepend_one_capture (tree field, tree init, tree &list, +prepend_one_capture (tree field, tree init, tree &list, bool explicit_p, tsubst_flags_t complain) { if (tree auto_node = type_uses_auto (TREE_TYPE (field))) @@ -19613,6 +19748,7 @@ prepend_one_capture (tree field, tree init, tree &list, cp_apply_type_quals_to_decl (cp_type_quals (type), field); } list = tree_cons (field, init, list); + LAMBDA_CAPTURE_EXPLICIT_P (list) = explicit_p; } /* T is a LAMBDA_EXPR. Generate a new LAMBDA_EXPR for the current @@ -19703,12 +19839,13 @@ tsubst_lambda_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl) prepend_one_capture (TREE_VEC_ELT (field, i), TREE_VEC_ELT (init, i), LAMBDA_EXPR_CAPTURE_LIST (r), + LAMBDA_CAPTURE_EXPLICIT_P (cap), complain); } else { prepend_one_capture (field, init, LAMBDA_EXPR_CAPTURE_LIST (r), - complain); + LAMBDA_CAPTURE_EXPLICIT_P (cap), complain); if (id_equal (DECL_NAME (field), "__this")) LAMBDA_EXPR_THIS_CAPTURE (r) = field; @@ -19720,11 +19857,18 @@ tsubst_lambda_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl) return error_mark_node; if (LAMBDA_EXPR_EXTRA_SCOPE (t) == NULL_TREE) - /* A lambda in a default argument outside a class gets no - LAMBDA_EXPR_EXTRA_SCOPE, as specified by the ABI. But - tsubst_default_argument calls start_lambda_scope, so we need to - specifically ignore it here, and use the global scope. */ - record_null_lambda_scope (r); + { + /* A lambda in a default argument outside a class gets no + LAMBDA_EXPR_EXTRA_SCOPE, as specified by the ABI. But + tsubst_default_argument calls start_lambda_scope, so we need to + specifically ignore it here, and use the global scope. */ + record_null_lambda_scope (r); + + /* If we're pushed into another scope (PR105652), fix it. */ + if (TYPE_NAMESPACE_SCOPE_P (TREE_TYPE (t))) + TYPE_CONTEXT (type) = DECL_CONTEXT (TYPE_NAME (type)) + = TYPE_CONTEXT (TREE_TYPE (t)); + } else record_lambda_scope (r); @@ -20326,6 +20470,7 @@ tsubst_copy_and_build (tree t, warning_sentinel s2(warn_div_by_zero, was_dep); warning_sentinel s3(warn_logical_op, was_dep); warning_sentinel s4(warn_tautological_compare, was_dep); + warning_sentinel s5(warn_address, was_dep); tree r = build_x_binary_op (input_location, TREE_CODE (t), @@ -20852,10 +20997,22 @@ tsubst_copy_and_build (tree t, } /* Remember that there was a reference to this entity. */ - if (function != NULL_TREE - && DECL_P (function) - && !mark_used (function, complain) && !(complain & tf_error)) - RETURN (error_mark_node); + if (function != NULL_TREE) + { + tree inner = function; + if (TREE_CODE (inner) == ADDR_EXPR + && TREE_CODE (TREE_OPERAND (inner, 0)) == FUNCTION_DECL) + /* We should already have called mark_used when taking the + address of this function, but do so again anyway to make + sure it's odr-used: at worst this is a no-op, but if we + obtained this FUNCTION_DECL as part of ahead-of-time overload + resolution then that call to mark_used wouldn't have marked it + odr-used yet (53164). */ + inner = TREE_OPERAND (inner, 0); + if (DECL_P (inner) + && !mark_used (inner, complain) && !(complain & tf_error)) + RETURN (error_mark_node); + } if (!maybe_fold_fn_template_args (function, complain)) return error_mark_node; @@ -20967,12 +21124,12 @@ tsubst_copy_and_build (tree t, bool ord = CALL_EXPR_ORDERED_ARGS (t); bool rev = CALL_EXPR_REVERSE_ARGS (t); if (op || ord || rev) - { - function = extract_call_expr (ret); - CALL_EXPR_OPERATOR_SYNTAX (function) = op; - CALL_EXPR_ORDERED_ARGS (function) = ord; - CALL_EXPR_REVERSE_ARGS (function) = rev; - } + if (tree call = extract_call_expr (ret)) + { + CALL_EXPR_OPERATOR_SYNTAX (call) = op; + CALL_EXPR_ORDERED_ARGS (call) = ord; + CALL_EXPR_REVERSE_ARGS (call) = rev; + } } RETURN (ret); @@ -21378,6 +21535,13 @@ tsubst_copy_and_build (tree t, with constant operands. */ RETURN (t); + case ANNOTATE_EXPR: + op1 = RECUR (TREE_OPERAND (t, 0)); + RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR, + TREE_TYPE (op1), op1, + RECUR (TREE_OPERAND (t, 1)), + RECUR (TREE_OPERAND (t, 2)))); + case NON_LVALUE_EXPR: case VIEW_CONVERT_EXPR: if (location_wrapper_p (t)) @@ -21715,6 +21879,21 @@ instantiate_alias_template (tree tmpl, tree args, tsubst_flags_t complain) if (tmpl == error_mark_node || args == error_mark_node) return error_mark_node; + /* See maybe_dependent_member_ref. */ + if (complain & tf_dguide) + { + tree ctx = tsubst_aggr_type (DECL_CONTEXT (tmpl), args, complain, + tmpl, true); + if (dependent_scope_p (ctx)) + { + tree name = DECL_NAME (tmpl); + tree fullname = build_nt (TEMPLATE_ID_EXPR, name, + INNERMOST_TEMPLATE_ARGS (args)); + tree tname = build_typename_type (ctx, name, fullname, typename_type); + return TYPE_NAME (tname); + } + } + args = coerce_innermost_template_parms (DECL_TEMPLATE_PARMS (tmpl), args, tmpl, complain, @@ -22905,14 +23084,24 @@ type_unification_real (tree tparms, return unify_parameter_deduction_failure (explain_p, tparm); } + /* During partial ordering, we deduce dependent template args. */ + bool any_dependent_targs = false; + /* Now substitute into the default template arguments. */ for (i = 0; i < ntparms; i++) { tree targ = TREE_VEC_ELT (targs, i); tree tparm = TREE_VEC_ELT (tparms, i); - if (targ || tparm == error_mark_node) + if (targ) + { + if (!any_dependent_targs && dependent_template_arg_p (targ)) + any_dependent_targs = true; + continue; + } + if (tparm == error_mark_node) continue; + tree parm = TREE_VALUE (tparm); tree arg = TREE_PURPOSE (tparm); reopen_deferring_access_checks (*checks); @@ -22947,9 +23136,9 @@ type_unification_real (tree tparms, do this substitution without processing_template_decl. This is important if the default argument contains something that might be instantiation-dependent like access (87480). */ - processing_template_decl_sentinel s; + processing_template_decl_sentinel s (!any_dependent_targs); tree substed = NULL_TREE; - if (saw_undeduced == 1) + if (saw_undeduced == 1 && !any_dependent_targs) { /* First instatiate in template context, in case we still depend on undeduced template parameters. */ @@ -22972,7 +23161,7 @@ type_unification_real (tree tparms, complain, i, NULL_TREE); else if (saw_undeduced == 1) arg = NULL_TREE; - else + else if (!any_dependent_targs) arg = error_mark_node; } @@ -23785,6 +23974,8 @@ unify_pack_expansion (tree tparms, tree targs, tree packed_parms, arguments if it is not otherwise deduced. */ if (cxx_dialect >= cxx20 && TREE_VEC_LENGTH (new_args) < TREE_VEC_LENGTH (old_args) + /* FIXME This isn't set properly for partial instantiations. */ + && TPARMS_PRIMARY_TEMPLATE (tparms) && builtin_guide_p (TPARMS_PRIMARY_TEMPLATE (tparms))) TREE_VEC_LENGTH (old_args) = TREE_VEC_LENGTH (new_args); if (!comp_template_args (old_args, new_args, @@ -24270,13 +24461,16 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, if (tree a = type_uses_auto (tparm)) { tparm = do_auto_deduction (tparm, arg, a, - complain, adc_unify, targs); + complain, adc_unify, targs, + LOOKUP_NORMAL, + TPARMS_PRIMARY_TEMPLATE (tparms)); if (tparm == error_mark_node) return 1; } } - if (!TREE_TYPE (arg)) + if (!TREE_TYPE (arg) + || TREE_CODE (TREE_TYPE (arg)) == DEPENDENT_OPERATOR_TYPE) /* Template-parameter dependent expression. Just accept it for now. It will later be processed in convert_template_argument. */ ; @@ -24709,7 +24903,7 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, if (is_overloaded_fn (parm) || type_unknown_p (parm)) return unify_success (explain_p); gcc_assert (EXPR_P (parm) - || COMPOUND_LITERAL_P (parm) + || TREE_CODE (parm) == CONSTRUCTOR || TREE_CODE (parm) == TRAIT_EXPR); expr: /* We must be looking at an expression. This can happen with @@ -26313,20 +26507,7 @@ instantiate_body (tree pattern, tree args, tree d, bool nested_p) if (current_function_decl) save_omp_privatization_clauses (omp_privatization_save); - bool push_to_top - = !(current_function_decl - && !LAMBDA_FUNCTION_P (d) - && decl_function_context (d) == current_function_decl); - - if (push_to_top) - push_to_top_level (); - else - { - gcc_assert (!processing_template_decl); - push_function_context (); - cp_unevaluated_operand = 0; - c_inhibit_evaluation_warnings = 0; - } + bool push_to_top = maybe_push_to_top_level (d); if (VAR_P (d)) { @@ -26439,10 +26620,7 @@ instantiate_body (tree pattern, tree args, tree d, bool nested_p) if (!nested_p) TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0; - if (push_to_top) - pop_from_top_level (); - else - pop_function_context (); + maybe_pop_from_top_level (push_to_top); if (current_function_decl) restore_omp_privatization_clauses (omp_privatization_save); @@ -27464,9 +27642,7 @@ value_dependent_expression_p (tree expression) case VAR_DECL: /* A constant with literal type and is initialized with an expression that is value-dependent. */ - if (DECL_DEPENDENT_INIT_P (expression) - /* FIXME cp_finish_decl doesn't fold reference initializers. */ - || TYPE_REF_P (TREE_TYPE (expression))) + if (DECL_DEPENDENT_INIT_P (expression)) return true; if (DECL_HAS_VALUE_EXPR_P (expression)) { @@ -27481,6 +27657,9 @@ value_dependent_expression_p (tree expression) && value_expr == error_mark_node)) return true; } + else if (TYPE_REF_P (TREE_TYPE (expression))) + /* FIXME cp_finish_decl doesn't fold reference initializers. */ + return true; return false; case DYNAMIC_CAST_EXPR: @@ -27831,13 +28010,22 @@ type_dependent_expression_p (tree expression) If the array has no length and has an initializer, it must be that we couldn't determine its length in cp_complete_array_type because it is dependent. */ - if (VAR_P (expression) + if (((VAR_P (expression) && DECL_INITIAL (expression)) + || COMPOUND_LITERAL_P (expression)) && TREE_TYPE (expression) != NULL_TREE && TREE_CODE (TREE_TYPE (expression)) == ARRAY_TYPE - && !TYPE_DOMAIN (TREE_TYPE (expression)) - && DECL_INITIAL (expression)) + && !TYPE_DOMAIN (TREE_TYPE (expression))) return true; + /* Pull a FUNCTION_DECL out of a BASELINK if we can. */ + if (BASELINK_P (expression)) + { + if (BASELINK_OPTYPE (expression) + && dependent_type_p (BASELINK_OPTYPE (expression))) + return true; + expression = BASELINK_FUNCTIONS (expression); + } + /* A function or variable template-id is type-dependent if it has any dependent template arguments. */ if (VAR_OR_FUNCTION_DECL_P (expression) @@ -27871,6 +28059,17 @@ type_dependent_expression_p (tree expression) return false; } + /* Otherwise, its constraints could still depend on outer template parameters + from its (dependent) scope. */ + if (TREE_CODE (expression) == FUNCTION_DECL + /* As an optimization, check this cheaper sufficient condition first. + (At this point we've established that we're looking at a member of + a dependent class, so it makes sense to start treating say undeduced + auto as dependent.) */ + && !dependent_type_p (TREE_TYPE (expression)) + && uses_outer_template_parms_in_constraints (expression)) + return true; + /* Always dependent, on the number of arguments if nothing else. */ if (TREE_CODE (expression) == EXPR_PACK_EXPANSION) return true; @@ -29278,6 +29477,8 @@ build_deduction_guide (tree type, tree ctor, tree outer_args, tsubst_flags_t com ++processing_template_decl; bool ok = true; + complain |= tf_dguide; + fn_tmpl = (TREE_CODE (ctor) == TEMPLATE_DECL ? ctor : DECL_TI_TEMPLATE (ctor)); @@ -29555,7 +29756,11 @@ maybe_aggr_guide (tree tmpl, tree init, vec *args) PARMS, so that its template level is properly reduced and we don't get mismatches when deducing types using the guide with PARMS. */ if (member_template_p) - parms = tsubst (parms, DECL_TI_ARGS (tmpl), complain, init); + { + ++processing_template_decl; + parms = tsubst (parms, DECL_TI_ARGS (tmpl), complain, init); + --processing_template_decl; + } } else if (TREE_CODE (init) == TREE_LIST) { @@ -29770,16 +29975,8 @@ alias_ctad_tweaks (tree tmpl, tree uguides) static tree ctor_deduction_guides_for (tree tmpl, tsubst_flags_t complain) { - tree type = TREE_TYPE (tmpl); - tree outer_args = NULL_TREE; - if (DECL_CLASS_SCOPE_P (tmpl) - && CLASSTYPE_TEMPLATE_INSTANTIATION (DECL_CONTEXT (tmpl))) - { - outer_args = copy_node (CLASSTYPE_TI_ARGS (type)); - gcc_assert (TMPL_ARGS_DEPTH (outer_args) > 1); - --TREE_VEC_LENGTH (outer_args); - type = TREE_TYPE (most_general_template (tmpl)); - } + tree outer_args = outer_template_args (tmpl); + tree type = TREE_TYPE (most_general_template (tmpl)); tree cands = NULL_TREE; @@ -30136,13 +30333,20 @@ do_class_deduction (tree ptype, tree tmpl, tree init, adc_requirement contexts to communicate the necessary template arguments to satisfaction. OUTER_TARGS is ignored in other contexts. - For partial-concept-ids, extra args may be appended to the list of deduced - template arguments prior to determining constraint satisfaction. */ + Additionally for adc_unify contexts TMPL is the template for which TYPE + is a template parameter type. + + For partial-concept-ids, extra args from OUTER_TARGS, TMPL and the current + scope may be appended to the list of deduced template arguments prior to + determining constraint satisfaction as appropriate. */ tree do_auto_deduction (tree type, tree init, tree auto_node, - tsubst_flags_t complain, auto_deduction_context context, - tree outer_targs, int flags) + tsubst_flags_t complain /* = tf_warning_or_error */, + auto_deduction_context context /* = adc_unspecified */, + tree outer_targs /* = NULL_TREE */, + int flags /* = LOOKUP_NORMAL */, + tree tmpl /* = NULL_TREE */) { if (init == error_mark_node) return error_mark_node; @@ -30161,9 +30365,9 @@ do_auto_deduction (tree type, tree init, tree auto_node, auto_node. */ complain &= ~tf_partial; - if (tree tmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node)) + if (tree ctmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node)) /* C++17 class template argument deduction. */ - return do_class_deduction (type, tmpl, init, flags, complain); + return do_class_deduction (type, ctmpl, init, flags, complain); if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE) /* Nothing we can do with this, even in deduction context. */ @@ -30323,7 +30527,10 @@ do_auto_deduction (tree type, tree init, tree auto_node, } } - tree full_targs = add_to_template_args (outer_targs, targs); + tree full_targs = outer_targs; + if (context == adc_unify && tmpl) + full_targs = add_outermost_template_args (tmpl, full_targs); + full_targs = add_to_template_args (full_targs, targs); /* HACK: Compensate for callers not always communicating all levels of outer template arguments by filling in the outermost missing levels diff --git a/gcc/cp/rtti.cc b/gcc/cp/rtti.cc index a4dedc31f0ab6..f5b43ec0fb258 100644 --- a/gcc/cp/rtti.cc +++ b/gcc/cp/rtti.cc @@ -446,9 +446,6 @@ get_tinfo_decl_direct (tree type, tree name, int pseudo_ix) gcc_checking_assert (TREE_CODE (type) != METHOD_TYPE); - if (pseudo_ix < 0) - type = complete_type (type); - if (CLASS_TYPE_P (type)) d = CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (type)); @@ -1693,7 +1690,17 @@ emit_tinfo_decl (tree decl) tree init; DECL_EXTERNAL (decl) = 0; - init = get_pseudo_ti_init (type, get_pseudo_ti_index (type)); + int pseudo_ix = get_pseudo_ti_index (type); + const tinfo_s *ti = get_tinfo_desc (pseudo_ix); + if (TREE_TYPE (decl) != ti->type) + { + /* If the class became complete since we first called get_tinfo_decl, + its type_info descriptor may have switched from __class_type_info + to e.g. __si_class_type_info. */ + TREE_TYPE (decl) = ti->type; + relayout_decl (decl); + } + init = get_pseudo_ti_init (type, pseudo_ix); DECL_INITIAL (decl) = init; mark_used (decl); cp_finish_decl (decl, init, false, NULL_TREE, 0); diff --git a/gcc/cp/semantics.cc b/gcc/cp/semantics.cc index ab48f11c9be5f..2d29b0ae1b5a6 100644 --- a/gcc/cp/semantics.cc +++ b/gcc/cp/semantics.cc @@ -627,6 +627,17 @@ set_cleanup_locs (tree stmts, location_t loc) set_cleanup_locs (stmt, loc); } +/* True iff the innermost block scope is a try block. */ + +static bool +at_try_scope () +{ + cp_binding_level *b = current_binding_level; + while (b && b->kind == sk_cleanup) + b = b->level_chain; + return b && b->kind == sk_try; +} + /* Finish a scope. */ tree @@ -634,11 +645,14 @@ do_poplevel (tree stmt_list) { tree block = NULL; - maybe_splice_retval_cleanup (stmt_list); + bool was_try = at_try_scope (); if (stmts_are_full_exprs_p ()) block = poplevel (kept_level_p (), 1, 0); + /* This needs to come after poplevel merges sk_cleanup statement_lists. */ + maybe_splice_retval_cleanup (stmt_list, was_try); + stmt_list = pop_stmt_list (stmt_list); /* input_location is the last token of the scope, usually a }. */ @@ -786,7 +800,11 @@ simplify_loop_decl_cond (tree *cond_p, tree body) *cond_p = boolean_true_node; if_stmt = begin_if_stmt (); - cond = cp_build_unary_op (TRUTH_NOT_EXPR, cond, false, tf_warning_or_error); + cond_p = &cond; + while (TREE_CODE (*cond_p) == ANNOTATE_EXPR) + cond_p = &TREE_OPERAND (*cond_p, 0); + *cond_p = cp_build_unary_op (TRUTH_NOT_EXPR, *cond_p, false, + tf_warning_or_error); finish_if_stmt_cond (cond, if_stmt); finish_break_stmt (); finish_then_clause (if_stmt); @@ -1012,6 +1030,7 @@ tree finish_if_stmt_cond (tree cond, tree if_stmt) { cond = maybe_convert_cond (cond); + maybe_warn_for_constant_evaluated (cond, IF_STMT_CONSTEXPR_P (if_stmt)); if (IF_STMT_CONSTEXPR_P (if_stmt) && !type_dependent_expression_p (cond) && require_constant_expression (cond) @@ -1020,12 +1039,9 @@ finish_if_stmt_cond (tree cond, tree if_stmt) converted to bool. */ && TYPE_MAIN_VARIANT (TREE_TYPE (cond)) == boolean_type_node) { - maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/true); cond = instantiate_non_dependent_expr (cond); cond = cxx_constant_value (cond, NULL_TREE); } - else - maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/false); finish_cond (&IF_COND (if_stmt), cond); add_stmt (if_stmt); THEN_CLAUSE (if_stmt) = push_stmt_list (); @@ -1398,6 +1414,11 @@ finish_for_stmt (tree for_stmt) add_stmt (do_poplevel (scope)); + /* If we're being called from build_vec_init, don't mess with the names of + the variables for an enclosing range-for. */ + if (!stmts_are_full_exprs_p ()) + return; + for (int i = 0; i < 3; i++) if (range_for_decl[i]) DECL_NAME (range_for_decl[i]) @@ -2352,7 +2373,8 @@ finish_qualified_id_expr (tree qualifying_class, /* If EXPR occurs as the operand of '&', use special handling that permits a pointer-to-member. */ - if (address_p && done) + if (address_p && done + && TREE_CODE (qualifying_class) != ENUMERAL_TYPE) { if (TREE_CODE (expr) == SCOPE_REF) expr = TREE_OPERAND (expr, 1); @@ -2915,13 +2937,18 @@ finish_call_expr (tree fn, vec **args, bool disallow_virtual, if (TREE_CODE (result) == CALL_EXPR && really_overloaded_fn (orig_fn)) { - orig_fn = CALL_EXPR_FN (result); - if (TREE_CODE (orig_fn) == COMPONENT_REF) + tree sel_fn = CALL_EXPR_FN (result); + if (TREE_CODE (sel_fn) == COMPONENT_REF) { /* The non-dependent result of build_new_method_call. */ - orig_fn = TREE_OPERAND (orig_fn, 1); - gcc_assert (BASELINK_P (orig_fn)); + sel_fn = TREE_OPERAND (sel_fn, 1); + gcc_assert (BASELINK_P (sel_fn)); } + else if (TREE_CODE (sel_fn) == ADDR_EXPR) + /* Our original callee wasn't wrapped in an ADDR_EXPR, + so strip this ADDR_EXPR added by build_over_call. */ + sel_fn = TREE_OPERAND (sel_fn, 0); + orig_fn = sel_fn; } result = build_call_vec (TREE_TYPE (result), orig_fn, orig_args); @@ -4141,6 +4168,7 @@ finish_id_expression_1 (tree id_expression, : CP_ID_KIND_UNQUALIFIED))); if (dependent_p + && !scope && DECL_P (decl) && any_dependent_type_attributes_p (DECL_ATTRIBUTES (decl))) /* Dependent type attributes on the decl mean that the TREE_TYPE is @@ -4817,6 +4845,7 @@ class nrv_data tree var; tree result; hash_table > visited; + bool in_nrv_cleanup; }; /* Helper function for walk_tree, used by finalize_nrv below. */ @@ -4833,14 +4862,51 @@ finalize_nrv_r (tree* tp, int* walk_subtrees, void* data) *walk_subtrees = 0; /* Change all returns to just refer to the RESULT_DECL; this is a nop, but differs from using NULL_TREE in that it indicates that we care - about the value of the RESULT_DECL. */ + about the value of the RESULT_DECL. But preserve anything appended + by check_return_expr. */ else if (TREE_CODE (*tp) == RETURN_EXPR) - TREE_OPERAND (*tp, 0) = dp->result; + { + tree *p = &TREE_OPERAND (*tp, 0); + while (TREE_CODE (*p) == COMPOUND_EXPR) + p = &TREE_OPERAND (*p, 0); + gcc_checking_assert (TREE_CODE (*p) == INIT_EXPR + && TREE_OPERAND (*p, 0) == dp->result); + *p = dp->result; + } /* Change all cleanups for the NRV to only run when an exception is thrown. */ else if (TREE_CODE (*tp) == CLEANUP_STMT && CLEANUP_DECL (*tp) == dp->var) - CLEANUP_EH_ONLY (*tp) = 1; + { + dp->in_nrv_cleanup = true; + cp_walk_tree (&CLEANUP_BODY (*tp), finalize_nrv_r, data, 0); + dp->in_nrv_cleanup = false; + cp_walk_tree (&CLEANUP_EXPR (*tp), finalize_nrv_r, data, 0); + *walk_subtrees = 0; + + CLEANUP_EH_ONLY (*tp) = true; + + /* If a cleanup might throw, we need to clear current_retval_sentinel on + the exception path so an outer cleanup added by + maybe_splice_retval_cleanup doesn't run. */ + if (current_retval_sentinel + && cp_function_chain->throwing_cleanup) + { + tree clear = build2 (MODIFY_EXPR, boolean_type_node, + current_retval_sentinel, + boolean_false_node); + + /* We're already only on the EH path, just prepend it. */ + tree &exp = CLEANUP_EXPR (*tp); + exp = build2 (COMPOUND_EXPR, void_type_node, clear, exp); + } + } + /* Disable maybe_splice_retval_cleanup within the NRV cleanup scope, we don't + want to destroy the retval before the variable goes out of scope. */ + else if (TREE_CODE (*tp) == CLEANUP_STMT + && dp->in_nrv_cleanup + && CLEANUP_DECL (*tp) == dp->result) + CLEANUP_EXPR (*tp) = void_node; /* Replace the DECL_EXPR for the NRV with an initialization of the RESULT_DECL, if needed. */ else if (TREE_CODE (*tp) == DECL_EXPR @@ -4896,6 +4962,7 @@ finalize_nrv (tree *tp, tree var, tree result) data.var = var; data.result = result; + data.in_nrv_cleanup = false; cp_walk_tree (tp, finalize_nrv_r, &data, 0); } @@ -9477,16 +9544,15 @@ finish_omp_target_clauses (location_t loc, tree body, tree *clauses_ptr) { omp_target_walk_data data; data.this_expr_accessed = false; + data.current_object = NULL_TREE; - tree ct = current_nonlambda_class_type (); - if (ct) - { - tree object = maybe_dummy_object (ct, NULL); - object = maybe_resolve_dummy (object, true); - data.current_object = object; - } - else - data.current_object = NULL_TREE; + if (DECL_NONSTATIC_MEMBER_P (current_function_decl) && current_class_ptr) + if (tree ct = current_nonlambda_class_type ()) + { + tree object = maybe_dummy_object (ct, NULL); + object = maybe_resolve_dummy (object, true); + data.current_object = object; + } if (DECL_LAMBDA_FUNCTION_P (current_function_decl)) { @@ -9686,7 +9752,9 @@ finish_omp_target_clauses (location_t loc, tree body, tree *clauses_ptr) for (tree c = *clauses_ptr; c; c = OMP_CLAUSE_CHAIN (c)) { - /* If map(this->ptr[:N] already exists, avoid creating another + if (OMP_CLAUSE_CODE (c) != OMP_CLAUSE_MAP) + continue; + /* If map(this->ptr[:N]) already exists, avoid creating another such map. */ tree decl = OMP_CLAUSE_DECL (c); if ((TREE_CODE (decl) == INDIRECT_REF @@ -11596,7 +11664,7 @@ is_corresponding_member_aggr (location_t loc, tree basetype1, tree membertype1, tree ret = boolean_false_node; while (1) { - bool r = next_common_initial_seqence (field1, field2); + bool r = next_common_initial_sequence (field1, field2); if (field1 == NULL_TREE || field2 == NULL_TREE) break; if (r @@ -11968,6 +12036,38 @@ check_trait_type (tree type) return !!complete_type_or_else (strip_array_types (type), NULL_TREE); } +/* True iff the conversion (if any) would be a direct reference + binding, not requiring complete types. This is LWG2939. */ + +static bool +same_type_ref_bind_p (cp_trait_kind kind, tree type1, tree type2) +{ + tree from, to; + switch (kind) + { + /* These put the target type first. */ + case CPTK_IS_CONSTRUCTIBLE: + case CPTK_IS_NOTHROW_CONSTRUCTIBLE: + case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE: + to = type1; + from = type2; + break; + + default: + gcc_unreachable (); + } + + if (TREE_CODE (to) != REFERENCE_TYPE || !from) + return false; + if (TREE_CODE (from) == TREE_VEC && TREE_VEC_LENGTH (from) == 1) + from = TREE_VEC_ELT (from, 0); + else if (TREE_CODE (from) == TREE_LIST && !TREE_CHAIN (from)) + from = TREE_VALUE (from); + return (TYPE_P (from) + && (same_type_ignoring_top_level_qualifiers_p + (non_reference (to), non_reference (from)))); +} + /* Process a trait expression. */ tree @@ -12017,10 +12117,15 @@ finish_trait_expr (location_t loc, cp_trait_kind kind, tree type1, tree type2) case CPTK_IS_CONSTRUCTIBLE: break; - case CPTK_IS_TRIVIALLY_ASSIGNABLE: case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE: - case CPTK_IS_NOTHROW_ASSIGNABLE: case CPTK_IS_NOTHROW_CONSTRUCTIBLE: + /* Don't check completeness for direct reference binding. */; + if (same_type_ref_bind_p (kind, type1, type2)) + break; + gcc_fallthrough (); + + case CPTK_IS_NOTHROW_ASSIGNABLE: + case CPTK_IS_TRIVIALLY_ASSIGNABLE: if (!check_trait_type (type1) || !check_trait_type (type2)) return error_mark_node; diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc index ed0d0d2295008..01476fe92bec4 100644 --- a/gcc/cp/tree.cc +++ b/gcc/cp/tree.cc @@ -970,11 +970,12 @@ rvalue (tree expr) expr = mark_rvalue_use (expr); - /* [basic.lval] - - Non-class rvalues always have cv-unqualified types. */ + /* [expr.type]: "If a prvalue initially has the type "cv T", where T is a + cv-unqualified non-class, non-array type, the type of the expression is + adjusted to T prior to any further analysis. */ type = TREE_TYPE (expr); - if (!CLASS_TYPE_P (type) && cv_qualified_p (type)) + if (!CLASS_TYPE_P (type) && TREE_CODE (type) != ARRAY_TYPE + && cv_qualified_p (type)) type = cv_unqualified (type); /* We need to do this for rvalue refs as well to get the right answer @@ -2596,6 +2597,18 @@ dependent_name (tree x) return NULL_TREE; } +/* Like dependent_name, but instead takes a CALL_EXPR and also checks + its dependence. */ + +tree +call_expr_dependent_name (tree x) +{ + if (TREE_TYPE (x) != NULL_TREE) + /* X isn't dependent, so its callee isn't a dependent name. */ + return NULL_TREE; + return dependent_name (CALL_EXPR_FN (x)); +} + /* Returns true iff X is an expression for an overloaded function whose type cannot be known without performing overload resolution. */ @@ -3330,6 +3343,10 @@ break_out_target_exprs (tree t, bool clear_location /* = false */) static int target_remap_count; static splay_tree target_remap; + /* We shouldn't be called on templated trees, nor do we want to + produce them. */ + gcc_checking_assert (!processing_template_decl); + if (!target_remap_count++) target_remap = splay_tree_new (splay_tree_compare_pointers, /*splay_tree_delete_key_fn=*/NULL, @@ -3829,16 +3846,18 @@ decl_anon_ns_mem_p (const_tree decl) return !TREE_PUBLIC (decl); } -/* Subroutine of cp_tree_equal: t1 and t2 are the CALL_EXPR_FNs of two - CALL_EXPRS. Return whether they are equivalent. */ +/* Subroutine of cp_tree_equal: t1 and t2 are two CALL_EXPRs. + Return whether their CALL_EXPR_FNs are equivalent. */ static bool called_fns_equal (tree t1, tree t2) { /* Core 1321: dependent names are equivalent even if the overload sets are different. But do compare explicit template arguments. */ - tree name1 = dependent_name (t1); - tree name2 = dependent_name (t2); + tree name1 = call_expr_dependent_name (t1); + tree name2 = call_expr_dependent_name (t2); + t1 = CALL_EXPR_FN (t1); + t2 = CALL_EXPR_FN (t2); if (name1 || name2) { tree targs1 = NULL_TREE, targs2 = NULL_TREE; @@ -3952,7 +3971,7 @@ cp_tree_equal (tree t1, tree t2) if (KOENIG_LOOKUP_P (t1) != KOENIG_LOOKUP_P (t2)) return false; - if (!called_fns_equal (CALL_EXPR_FN (t1), CALL_EXPR_FN (t2))) + if (!called_fns_equal (t1, t2)) return false; call_expr_arg_iterator iter1, iter2; @@ -4318,15 +4337,31 @@ maybe_dummy_object (tree type, tree* binfop) if (binfop) *binfop = binfo; - if (current_class_ref - /* current_class_ref might not correspond to current_class_type if - we're in tsubst_default_argument or a lambda-declarator; in either - case, we want to use current_class_ref if it matches CONTEXT. */ - && (same_type_ignoring_top_level_qualifiers_p - (TREE_TYPE (current_class_ref), context))) + /* current_class_ref might not correspond to current_class_type if + we're in tsubst_default_argument or a lambda-declarator; in either + case, we want to use current_class_ref if it matches CONTEXT. */ + tree ctype = current_class_ref ? TREE_TYPE (current_class_ref) : NULL_TREE; + if (ctype + && same_type_ignoring_top_level_qualifiers_p (ctype, context)) decl = current_class_ref; else - decl = build_dummy_object (context); + { + /* Return a dummy object whose cv-quals are consistent with (the + non-lambda) 'this' if available. */ + if (ctype) + { + int quals = TYPE_UNQUALIFIED; + if (tree lambda = CLASSTYPE_LAMBDA_EXPR (ctype)) + { + if (tree cap = lambda_expr_this_capture (lambda, false)) + quals = cp_type_quals (TREE_TYPE (TREE_TYPE (cap))); + } + else + quals = cp_type_quals (ctype); + context = cp_build_qualified_type (context, quals); + } + decl = build_dummy_object (context); + } return decl; } @@ -4729,7 +4764,7 @@ record_has_unique_obj_representations (const_tree t, const_tree sz) DECL_SIZE (field))) return false; } - else if (DECL_C_BIT_FIELD (field)) + else if (DECL_C_BIT_FIELD (field) && !DECL_UNNAMED_BIT_FIELD (field)) { tree btype = DECL_BIT_FIELD_TYPE (field); if (!type_has_unique_obj_representations (btype)) @@ -4740,7 +4775,7 @@ record_has_unique_obj_representations (const_tree t, const_tree sz) offset_int cur = 0; for (tree field = TYPE_FIELDS (t); field; field = DECL_CHAIN (field)) - if (TREE_CODE (field) == FIELD_DECL) + if (TREE_CODE (field) == FIELD_DECL && !DECL_UNNAMED_BIT_FIELD (field)) { offset_int fld = wi::to_offset (DECL_FIELD_OFFSET (field)); offset_int bitpos = wi::to_offset (DECL_FIELD_BIT_OFFSET (field)); @@ -5472,15 +5507,18 @@ cp_walk_subtrees (tree *tp, int *walk_subtrees_p, walk_tree_fn func, break; case REQUIRES_EXPR: - // Only recurse through the nested expression. Do not - // walk the parameter list. Doing so causes false - // positives in the pack expansion checker since the - // requires parameters are introduced as pack expansions. - ++cp_unevaluated_operand; - result = cp_walk_tree (&REQUIRES_EXPR_REQS (*tp), func, data, pset); - --cp_unevaluated_operand; - *walk_subtrees_p = 0; - break; + { + cp_unevaluated u; + for (tree parm = REQUIRES_EXPR_PARMS (*tp); parm; parm = DECL_CHAIN (parm)) + /* Walk the types of each parameter, but not the parameter itself, + since doing so would cause false positives in the unexpanded pack + checker if the requires-expr introduces a function parameter pack, + e.g. requires (Ts... ts) { }. */ + WALK_SUBTREE (TREE_TYPE (parm)); + WALK_SUBTREE (REQUIRES_EXPR_REQS (*tp)); + *walk_subtrees_p = 0; + break; + } case DECL_EXPR: /* User variables should be mentioned in BIND_EXPR_VARS diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc index 0da6f2485d02d..df819701d4a69 100644 --- a/gcc/cp/typeck.cc +++ b/gcc/cp/typeck.cc @@ -1627,7 +1627,7 @@ similar_type_p (tree type1, tree type2) the common initial sequence. */ bool -next_common_initial_seqence (tree &memb1, tree &memb2) +next_common_initial_sequence (tree &memb1, tree &memb2) { while (memb1) { @@ -1719,7 +1719,7 @@ layout_compatible_type_p (tree type1, tree type2) { while (1) { - if (!next_common_initial_seqence (field1, field2)) + if (!next_common_initial_sequence (field1, field2)) return false; if (field1 == NULL_TREE) return true; @@ -3775,13 +3775,14 @@ cp_build_indirect_ref (location_t loc, tree ptr, ref_operator errorstring, If INDEX is of some user-defined type, it must be converted to integer type. Otherwise, to make a compatible PLUS_EXPR, it will inherit the type of the array, which will be some pointer type. - + LOC is the location to use in building the array reference. */ tree cp_build_array_ref (location_t loc, tree array, tree idx, tsubst_flags_t complain) { + tree first = NULL_TREE; tree ret; if (idx == 0) @@ -3826,6 +3827,14 @@ cp_build_array_ref (location_t loc, tree array, tree idx, bool non_lvalue = convert_vector_to_array_for_subscript (loc, &array, idx); + /* 0[array] */ + if (TREE_CODE (TREE_TYPE (idx)) == ARRAY_TYPE) + { + std::swap (array, idx); + if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (array)) + idx = first = save_expr (idx); + } + if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE) { tree rval, type; @@ -3901,15 +3910,17 @@ cp_build_array_ref (location_t loc, tree array, tree idx, protected_set_expr_location (ret, loc); if (non_lvalue) ret = non_lvalue_loc (loc, ret); + if (first) + ret = build2_loc (loc, COMPOUND_EXPR, TREE_TYPE (ret), first, ret); return ret; } { tree ar = cp_default_conversion (array, complain); tree ind = cp_default_conversion (idx, complain); - tree first = NULL_TREE; - if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind)) + if (!processing_template_decl + && !first && flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind)) ar = first = save_expr (ar); /* Put the integer in IND to simplify error checking. */ @@ -4929,7 +4940,7 @@ cp_build_binary_op (const op_location_t &location, convert it to this type. */ tree final_type = 0; - tree result, result_ovl; + tree result; /* Nonzero if this is an operation like MIN or MAX which can safely be computed in short if both args are promoted shorts. @@ -5212,7 +5223,12 @@ cp_build_binary_op (const op_location_t &location, it was unsigned. */ tree stripped_op1 = tree_strip_any_location_wrapper (op1); shorten = ((TREE_CODE (op0) == NOP_EXPR - && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0)))) + && INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, + 0))) + && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0))) + && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, + 0))) + < TYPE_PRECISION (type0))) || (TREE_CODE (stripped_op1) == INTEGER_CST && ! integer_all_onesp (stripped_op1))); } @@ -5248,7 +5264,10 @@ cp_build_binary_op (const op_location_t &location, only if unsigned or if dividing by something we know != -1. */ tree stripped_op1 = tree_strip_any_location_wrapper (op1); shorten = ((TREE_CODE (op0) == NOP_EXPR - && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0)))) + && INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0))) + && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0))) + && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, 0))) + < TYPE_PRECISION (type0))) || (TREE_CODE (stripped_op1) == INTEGER_CST && ! integer_all_onesp (stripped_op1))); common = 1; @@ -5921,8 +5940,9 @@ cp_build_binary_op (const op_location_t &location, tree_code orig_code0 = TREE_CODE (orig_type0); tree orig_type1 = TREE_TYPE (orig_op1); tree_code orig_code1 = TREE_CODE (orig_type1); - if (!result_type) - /* Nope. */; + if (!result_type || result_type == error_mark_node) + /* Nope. */ + result_type = NULL_TREE; else if ((orig_code0 == BOOLEAN_TYPE) != (orig_code1 == BOOLEAN_TYPE)) /* "If one of the operands is of type bool and the other is not, the program is ill-formed." */ @@ -6253,25 +6273,29 @@ cp_build_binary_op (const op_location_t &location, result = build2 (COMPOUND_EXPR, TREE_TYPE (result), instrument_expr, result); - if (!processing_template_decl) + if (resultcode == SPACESHIP_EXPR && !processing_template_decl) + result = get_target_expr_sfinae (result, complain); + + if (!c_inhibit_evaluation_warnings) { - if (resultcode == SPACESHIP_EXPR) - result = get_target_expr_sfinae (result, complain); - op0 = cp_fully_fold (op0); - /* Only consider the second argument if the first isn't overflowed. */ - if (!CONSTANT_CLASS_P (op0) || TREE_OVERFLOW_P (op0)) - return result; - op1 = cp_fully_fold (op1); - if (!CONSTANT_CLASS_P (op1) || TREE_OVERFLOW_P (op1)) + if (!processing_template_decl) + { + op0 = cp_fully_fold (op0); + /* Only consider the second argument if the first isn't overflowed. */ + if (!CONSTANT_CLASS_P (op0) || TREE_OVERFLOW_P (op0)) + return result; + op1 = cp_fully_fold (op1); + if (!CONSTANT_CLASS_P (op1) || TREE_OVERFLOW_P (op1)) + return result; + } + else if (!CONSTANT_CLASS_P (op0) || !CONSTANT_CLASS_P (op1) + || TREE_OVERFLOW_P (op0) || TREE_OVERFLOW_P (op1)) return result; - } - else if (!CONSTANT_CLASS_P (op0) || !CONSTANT_CLASS_P (op1) - || TREE_OVERFLOW_P (op0) || TREE_OVERFLOW_P (op1)) - return result; - result_ovl = fold_build2 (resultcode, build_type, op0, op1); - if (TREE_OVERFLOW_P (result_ovl)) - overflow_warning (location, result_ovl); + tree result_ovl = fold_build2 (resultcode, build_type, op0, op1); + if (TREE_OVERFLOW_P (result_ovl)) + overflow_warning (location, result_ovl); + } return result; } @@ -6330,7 +6354,7 @@ build_x_shufflevector (location_t loc, vec *args, auto_vec mask; for (unsigned i = 2; i < args->length (); ++i) { - tree idx = maybe_constant_value ((*args)[i]); + tree idx = fold_non_dependent_expr ((*args)[i], complain); mask.safe_push (idx); } tree exp = c_build_shufflevector (loc, arg0, arg1, mask, complain & tf_error); @@ -7082,9 +7106,13 @@ cp_build_unary_op (enum tree_code code, tree xarg, bool noconvert, build_zero_cst (TREE_TYPE (arg)), complain); arg = perform_implicit_conversion (boolean_type_node, arg, complain); - val = invert_truthvalue_loc (location, arg); if (arg != error_mark_node) - return val; + { + val = invert_truthvalue_loc (location, arg); + if (obvalue_p (val)) + val = non_lvalue_loc (location, val); + return val; + } errstring = _("in argument to unary !"); break; @@ -9122,10 +9150,14 @@ cp_build_modify_expr (location_t loc, tree lhs, enum tree_code modifycode, /* An expression of the form E1 op= E2. [expr.ass] says: "Such expressions are deprecated if E1 has volatile-qualified - type." We warn here rather than in cp_genericize_r because + type and op is not one of the bitwise operators |, &, ^." + We warn here rather than in cp_genericize_r because for compound assignments we are supposed to warn even if the assignment is a discarded-value expression. */ - if (TREE_THIS_VOLATILE (lhs) || CP_TYPE_VOLATILE_P (lhstype)) + if (modifycode != BIT_AND_EXPR + && modifycode != BIT_IOR_EXPR + && modifycode != BIT_XOR_EXPR + && (TREE_THIS_VOLATILE (lhs) || CP_TYPE_VOLATILE_P (lhstype))) warning_at (loc, OPT_Wvolatile, "compound assignment with %-qualified left " "operand is deprecated"); @@ -9240,6 +9272,8 @@ cp_build_modify_expr (location_t loc, tree lhs, enum tree_code modifycode, } /* Allow array assignment in compiler-generated code. */ + else if (DECL_P (lhs) && DECL_ARTIFICIAL (lhs)) + /* OK, used by coroutines (co-await-initlist1.C). */; else if (!current_function_decl || !DECL_DEFAULTED_FN (current_function_decl)) { @@ -9566,18 +9600,15 @@ build_ptrmemfunc (tree type, tree pfn, int force, bool c_cast_p, if (n == error_mark_node) return error_mark_node; + STRIP_ANY_LOCATION_WRAPPER (pfn); + /* We don't have to do any conversion to convert a pointer-to-member to its own type. But, we don't want to just return a PTRMEM_CST if there's an explicit cast; that cast should make the expression an invalid template argument. */ - if (TREE_CODE (pfn) != PTRMEM_CST) - { - if (same_type_p (to_type, pfn_type)) - return pfn; - else if (integer_zerop (n) && TREE_CODE (pfn) != CONSTRUCTOR) - return build_reinterpret_cast (input_location, to_type, pfn, - complain); - } + if (TREE_CODE (pfn) != PTRMEM_CST + && same_type_p (to_type, pfn_type)) + return pfn; if (TREE_SIDE_EFFECTS (pfn)) pfn = save_expr (pfn); @@ -10332,7 +10363,9 @@ treat_lvalue_as_rvalue_p (tree expr, bool return_p) for (tree decl = b->names; decl; decl = TREE_CHAIN (decl)) if (decl == retval) return set_implicit_rvalue_p (move (expr)); - if (b->kind == sk_function_parms || b->kind == sk_try) + if (b->kind == sk_function_parms + || b->kind == sk_try + || b->kind == sk_namespace) return NULL_TREE; } } @@ -10658,6 +10691,9 @@ check_return_expr (tree retval, bool *no_warning) if (fn_returns_value_p && flag_elide_constructors) { if (named_return_value_okay_p + /* The current NRV implementation breaks if a backward goto needs to + destroy the object (PR92407). */ + && !cp_function_chain->backward_goto && (current_function_return_value == NULL_TREE || current_function_return_value == bare_retval)) current_function_return_value = bare_retval; diff --git a/gcc/cprop.cc b/gcc/cprop.cc index cf01c2d79a90c..f049e6df8576c 100644 --- a/gcc/cprop.cc +++ b/gcc/cprop.cc @@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. If not see #include "coretypes.h" #include "backend.h" #include "rtl.h" +#include "rtlanal.h" #include "cfghooks.h" #include "df.h" #include "insn-config.h" @@ -795,7 +796,8 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) /* If we've failed perform the replacement, have a single SET to a REG destination and don't yet have a note, add a REG_EQUAL note to not lose information. */ - if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set))) + if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set)) + && !contains_paradoxical_subreg_p (SET_SRC (set))) note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); } @@ -1622,9 +1624,12 @@ bypass_block (basic_block bb, rtx_insn *setcc, rtx_insn *jump) { dest = BLOCK_FOR_INSN (XEXP (new_rtx, 0)); /* Don't bypass edges containing instructions. */ - edest = find_edge (bb, dest); - if (edest && edest->insns.r) - dest = NULL; + if (dest) + { + edest = find_edge (bb, dest); + if (edest && edest->insns.r) + dest = NULL; + } } else dest = NULL; diff --git a/gcc/cse.cc b/gcc/cse.cc index a18b599d32491..32e8ea79980d5 100644 --- a/gcc/cse.cc +++ b/gcc/cse.cc @@ -239,7 +239,7 @@ static int next_qty; the constant being compared against, or zero if the comparison is not against a constant. `comparison_qty' holds the quantity being compared against when the result is known. If the comparison - is not with a register, `comparison_qty' is -1. */ + is not with a register, `comparison_qty' is INT_MIN. */ struct qty_table_elem { @@ -1169,14 +1169,14 @@ compute_const_anchors (rtx cst, HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) { - HOST_WIDE_INT n = INTVAL (cst); + unsigned HOST_WIDE_INT n = UINTVAL (cst); *lower_base = n & ~(targetm.const_anchor - 1); - if (*lower_base == n) + if ((unsigned HOST_WIDE_INT) *lower_base == n) return false; - *upper_base = - (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1); + *upper_base = ((n + (targetm.const_anchor - 1)) + & ~(targetm.const_anchor - 1)); *upper_offs = n - *upper_base; *lower_offs = n - *lower_base; return true; @@ -1193,7 +1193,7 @@ insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, rtx anchor_exp; rtx exp; - anchor_exp = GEN_INT (anchor); + anchor_exp = gen_int_mode (anchor, mode); hash = HASH (anchor_exp, mode); elt = lookup (anchor_exp, hash, mode); if (!elt) @@ -4068,7 +4068,7 @@ record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, else { ent->comparison_const = op1; - ent->comparison_qty = -1; + ent->comparison_qty = INT_MIN; } return; diff --git a/gcc/cselib.cc b/gcc/cselib.cc index 6769beeeaf8a6..6a5609786fa6c 100644 --- a/gcc/cselib.cc +++ b/gcc/cselib.cc @@ -32,6 +32,7 @@ along with GCC; see the file COPYING3. If not see #include "dumpfile.h" #include "cselib.h" #include "function-abi.h" +#include "alias.h" /* A list of cselib_val structures. */ struct elt_list @@ -1157,6 +1158,75 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, machine_mode memmode, int depth) return 1; } +/* Wrapper for rtx_equal_for_cselib_p to determine whether a SET is + truly redundant, taking into account aliasing information. */ +bool +cselib_redundant_set_p (rtx set) +{ + gcc_assert (GET_CODE (set) == SET); + rtx dest = SET_DEST (set); + if (cselib_reg_set_mode (dest) != GET_MODE (dest)) + return false; + + if (!rtx_equal_for_cselib_p (dest, SET_SRC (set))) + return false; + + while (GET_CODE (dest) == SUBREG + || GET_CODE (dest) == ZERO_EXTRACT + || GET_CODE (dest) == STRICT_LOW_PART) + dest = XEXP (dest, 0); + + if (!flag_strict_aliasing || !MEM_P (dest)) + return true; + + /* For a store we need to check that suppressing it will not change + the effective alias set. */ + rtx dest_addr = XEXP (dest, 0); + + /* Lookup the equivalents to the original dest (rather than just the + MEM). */ + cselib_val *src_val = cselib_lookup (SET_DEST (set), + GET_MODE (SET_DEST (set)), + 0, VOIDmode); + + if (src_val) + { + /* Walk the list of source equivalents to find the MEM accessing + the same location. */ + for (elt_loc_list *l = src_val->locs; l; l = l->next) + { + rtx src_equiv = l->loc; + while (GET_CODE (src_equiv) == SUBREG + || GET_CODE (src_equiv) == ZERO_EXTRACT + || GET_CODE (src_equiv) == STRICT_LOW_PART) + src_equiv = XEXP (src_equiv, 0); + + if (MEM_P (src_equiv)) + { + /* Match the MEMs by comparing the addresses. We can + only remove the later store if the earlier aliases at + least all the accesses of the later one. */ + if (rtx_equal_for_cselib_1 (dest_addr, XEXP (src_equiv, 0), + GET_MODE (dest), 0)) + return mems_same_for_tbaa_p (src_equiv, dest); + } + } + } + + /* We failed to find a recorded value in the cselib history, so try + the source of this set; this catches cases such as *p = *q when p + and q have the same value. */ + rtx src = SET_SRC (set); + while (GET_CODE (src) == SUBREG) + src = XEXP (src, 0); + + if (MEM_P (src) + && rtx_equal_for_cselib_1 (dest_addr, XEXP (src, 0), GET_MODE (dest), 0)) + return mems_same_for_tbaa_p (src, dest); + + return false; +} + /* Helper function for cselib_hash_rtx. Arguments like for cselib_hash_rtx, except that it hashes (plus:P x c). */ diff --git a/gcc/cselib.h b/gcc/cselib.h index 9ae65e6459e0c..b0905053ea581 100644 --- a/gcc/cselib.h +++ b/gcc/cselib.h @@ -83,6 +83,7 @@ extern void cselib_process_insn (rtx_insn *); extern bool fp_setter_insn (rtx_insn *); extern machine_mode cselib_reg_set_mode (const_rtx); extern int rtx_equal_for_cselib_1 (rtx, rtx, machine_mode, int); +extern bool cselib_redundant_set_p (rtx); extern int references_value_p (const_rtx, int); extern rtx cselib_expand_value_rtx (rtx, bitmap, int); typedef rtx (*cselib_expand_callback)(rtx, bitmap, int, void *); diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog index bb179bcf7e910..d696ba51a6dca 100644 --- a/gcc/d/ChangeLog +++ b/gcc/d/ChangeLog @@ -1,3 +1,407 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-03-10 Iain Buclaw + + Backported from master: + 2024-03-10 Iain Buclaw + + PR d/112285 + PR d/112290 + * d-target.cc (Target::preferPassByRef): Return true for all static + array and struct types. + +2024-03-03 Iain Buclaw + + Backported from master: + 2024-03-03 Iain Buclaw + + PR d/114171 + * d-codegen.cc (lower_struct_comparison): Keep alignment of original + type in reinterpret cast for comparison. + +2024-03-03 Iain Buclaw + + Backported from master: + 2024-02-12 Iain Buclaw + + PR d/113758 + * d-codegen.cc (d_build_call): Force a TARGET_EXPR when callee + destorys its arguments. + * decl.cc (DeclVisitor::visit (VarDeclaration *)): Set + SET_DECL_VALUE_EXPR on the temporary variable to make it a placeholder + for the TARGET_EXPR_SLOT. + +2024-03-03 Iain Buclaw + + Backported from master: + 2024-02-12 Iain Buclaw + + PR d/113125 + * types.cc (TypeVisitor::visit (TypeStruct *)): Generate TYPE_DECL and + apply UDAs to opaque struct declarations. + +2023-10-29 Iain Buclaw + + Backported from master: + 2023-10-29 Iain Buclaw + + PR d/110712 + * d-codegen.cc (d_build_call): Update call to convert_for_argument. + * d-convert.cc (is_valist_parameter_type): New function. + (check_valist_conversion): New function. + (convert_for_assignment): Update signature. Add check whether + assigning va_list is permissible. + (convert_for_argument): Likewise. + * d-tree.h (convert_for_assignment): Update signature. + (convert_for_argument): Likewise. + * expr.cc (ExprVisitor::visit (AssignExp *)): Update call to + convert_for_assignment. + +2023-10-28 Iain Buclaw + + Backported from master: + 2023-10-28 Iain Buclaw + + PR d/112270 + * d-builtins.cc (d_build_d_type_nodes): Initialize d_bool_false_node, + d_bool_true_node. + * d-codegen.cc (build_array_struct_comparison): Use d_bool_false_node + instead of boolean_false_node. + * d-convert.cc (d_truthvalue_conversion): Use d_bool_false_node and + d_bool_true_node instead of boolean_false_node and boolean_true_node. + * d-tree.h (enum d_tree_index): Add DTI_BOOL_FALSE and DTI_BOOL_TRUE. + (d_bool_false_node): New macro. + (d_bool_true_node): New macro. + * modules.cc (build_dso_cdtor_fn): Use d_bool_false_node and + d_bool_true_node instead of boolean_false_node and boolean_true_node. + (register_moduleinfo): Use d_bool_type instead of boolean_type_node. + +2023-08-15 Iain Buclaw + + PR d/110959 + * dmd/canthrow.d (Dsymbol_canThrow): Use foreachVar. + * dmd/declaration.d (TupleDeclaration::needThis): Likewise. + (TupleDeclaration::foreachVar): New function. + (VarDeclaration::setFieldOffset): Use foreachVar. + * dmd/dinterpret.d (Interpreter::visit (DeclarationExp)): Likewise. + * dmd/dsymbolsem.d (DsymbolSemanticVisitor::visit (VarDeclaration)): + Don't push tuple field members to the scope symbol table. + (determineFields): Handle pushing tuple field members here instead. + * dmd/dtoh.d (ToCppBuffer::visit (VarDeclaration)): Visit all tuple + fields. + (ToCppBuffer::visit (TupleDeclaration)): New function. + * dmd/expression.d (expandAliasThisTuples): Use foreachVar. + * dmd/foreachvar.d (VarWalker::visit (DeclarationExp)): Likewise. + * dmd/ob.d (genKill): Likewise. + (checkObErrors): Likewise. + * dmd/semantic2.d (Semantic2Visitor::visit (TupleDeclaration)): Visit + all tuple fields. + +2023-07-07 Iain Buclaw + + Backported from master: + 2023-07-07 Iain Buclaw + + PR d/108842 + * decl.cc (DeclVisitor::visit (VarDeclaration *)): Only emit scalar + manifest constants. + (get_symbol_decl): Don't generate CONST_DECL for non-scalar manifest + constants. + * imports.cc (ImportVisitor::visit (VarDeclaration *)): New method. + +2023-07-02 Iain Buclaw + + Backported from master: + 2023-07-02 Iain Buclaw + + PR d/110516 + * intrinsics.cc (expand_volatile_load): Set TREE_SIDE_EFFECTS on the + expanded expression. + (expand_volatile_store): Likewise. + +2023-07-01 Iain Buclaw + + Backported from master: + 2023-07-01 Iain Buclaw + + PR d/110514 + * decl.cc (get_symbol_decl): Set TREE_READONLY on certain kinds of + const and immutable variables. + * expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Set TREE_READONLY + on immutable dynamic array literals. + +2023-06-26 Iain Buclaw + + Backported from master: + 2023-06-26 Iain Buclaw + + PR d/110359 + * d-convert.cc (convert_for_rvalue): Only apply the @safe boolean + conversion to boolean fields of a union. + (convert_for_condition): Call convert_for_rvalue in the default case. + +2023-06-26 Iain Buclaw + + Backported from master: + 2023-06-26 Iain Buclaw + + PR d/110113 + * dmd/escape.d (checkMutableArguments): Always allocate new buffer for + computing escapeBy. + +2023-06-06 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd 316b89f1e3. + * dmd/VERSION: Bump version to v2.100.2. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-16 Iain Buclaw + + Backported from master: + 2023-03-16 Iain Buclaw + + PR d/109144 + * d-codegen.cc (build_frame_type): Set frame field and type alignment. + +2023-03-14 Iain Buclaw + + Backported from master: + 2023-03-14 Iain Buclaw + + PR d/109108 + * decl.cc (function_defined_in_root_p): Remove. + (get_symbol_decl): Set DECL_LAMBDA_FUNCTION_P on function literals. + (start_function): Unconditionally unset DECL_EXTERNAL + (set_linkage_for_decl): Give lambda functions one-only linkage. + +2023-03-13 Iain Buclaw + + Backported from master: + 2023-03-13 Iain Buclaw + + * decl.cc (finish_thunk): Unset DECL_EXTERNAL on thunk. + (make_thunk): Set DECL_EXTERNAL on thunk, don't call build_decl_tree. + (finish_function): Call finish_thunk on forward referenced thunks. + +2023-03-13 Iain Buclaw + + Backported from master: + 2023-03-13 Iain Buclaw + + * decl.cc (get_fndecl_result): New function. + (get_fndecl_arguments): New function. + (DeclVisitor::visit (FuncDeclaration *)): Adjust to call + get_fndecl_arguments. + (make_thunk): Adjust to call get_fndecl_arguments and + get_fndecl_result. + (start_function): Adjust to call get_fndecl_result. + +2023-03-03 Iain Buclaw + + Backported from master: + 2023-03-03 Iain Buclaw + + PR d/108877 + * imports.cc (ImportVisitor::visit (EnumDeclaration *)): Call + make_import on TYPE_MAIN_VARIANT. + (ImportVisitor::visit (AggregateDeclaration *)): Likewise. + (ImportVisitor::visit (ClassDeclaration *)): Likewise. + +2022-12-12 Iain Buclaw + + Backported from master: + 2022-12-12 Iain Buclaw + + PR d/108055 + * decl.cc (function_defined_in_root_p): Check all enclosing template + instances for definition in a root module. + (function_needs_inline_definition_p): Replace call to + function_defined_in_root_p with test for outer module `isRoot'. + +2022-12-11 Iain Buclaw + + * imports.cc (ImportVisitor::visit (OverloadSet *)): Remove "final" + and "override" from visitor method. + +2022-12-11 Iain Buclaw + + Backported from master: + 2022-12-11 Iain Buclaw + + PR d/108050 + * decl.cc (DeclVisitor::visit (Import *)): Handle build_import_decl + returning a TREE_LIST. + * imports.cc (ImportVisitor::visit (OverloadSet *)): New override. + +2022-11-30 Iain Buclaw + + Backported from master: + 2022-11-30 Iain Buclaw + + PR d/107592 + * toir.cc (IRVisitor::push_unrolled_continue_label): New method. + (IRVisitor::pop_unrolled_continue_label): New method. + (IRVisitor::visit (UnrolledLoopStatement *)): Use them instead of + push_continue_label and pop_continue_label. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-16 Iain Buclaw + + Backported from master: + 2022-08-16 Iain Buclaw + + PR d/106638 + * gdc.texi: Update DIP links to point at upstream dlang/DIPs + repository. + +2022-08-15 Iain Buclaw + + Backported from master: + 2022-08-15 Iain Buclaw + + * d-tree.h (d_defer_declaration): Declare. + * decl.cc (function_needs_inline_definition_p): Defer checking + DECL_UNINLINABLE and DECL_DECLARED_INLINE_P. + (maybe_build_decl_tree): Call d_defer_declaration instead of + build_decl_tree. + * modules.cc (deferred_inline_declarations): New variable. + (build_module_tree): Set deferred_inline_declarations and a handle + declarations pushed to it. + (d_defer_declaration): New function. + +2022-08-15 Iain Buclaw + + Backported from master: + 2022-08-15 Iain Buclaw + + PR d/106623 + * d-codegen.cc (underlying_complex_expr): New function. + (d_build_call): Handle passing native complex objects as the + library-defined equivalent. + * d-tree.h (underlying_complex_expr): Declare. + * expr.cc (ExprVisitor::visit (DotVarExp *)): Call + underlying_complex_expr instead of build_vconvert. + +2022-08-09 Iain Buclaw + + Backported from master: + 2022-08-09 Iain Buclaw + + PR d/106563 + * decl.cc (DeclVisitor::visit (FuncDeclaration *)): Set semanticRun + before generating its symbol. + (function_defined_in_root_p): New function. + (function_needs_inline_definition_p): New function. + (maybe_build_decl_tree): New function. + (get_symbol_decl): Call maybe_build_decl_tree before returning symbol. + (start_function): Use function_defined_in_root_p instead of inline + test for locally defined symbols. + (set_linkage_for_decl): Check for inline functions before private or + protected symbols. + +2022-08-08 Iain Buclaw + + Backported from master: + 2022-08-08 Iain Buclaw + + PR d/106555 + * d-target.cc (Target::isReturnOnStack): Check for return type size. + +2022-07-26 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd 76e3b41375. + * dmd/VERSION: Bump version to v2.100.1. + * decl.cc (DeclVisitor::visit (VarDeclaration *)): Evaluate RHS + of noreturn declaration expressions first. + * expr.cc (ExprVisitor::visit (AssignExp *)): Don't generate + assignment for noreturn types. + +2022-07-04 Iain Buclaw + + Backported from master: + 2022-06-29 Iain Buclaw + + PR d/106139 + * d-convert.cc (convert_expr): Handle casting from array to vector. + (convert_for_rvalue): Rewrite vector to array casts of the same + element type into a constructor. + (convert_for_assignment): Return calling convert_for_rvalue. + * expr.cc (ExprVisitor::visit (VectorExp *)): Handle generating a + vector expression from a static array. + * toir.cc (IRVisitor::visit (ReturnStatement *)): Call + convert_for_rvalue on return value. + +2022-06-15 Iain Buclaw + + Backported from master: + 2022-06-15 Iain Buclaw + + * typeinfo.cc (make_internal_typeinfo): Set TYPE_ARTIFICIAL. + +2022-06-13 Iain Buclaw + + Backported from master: + 2022-06-13 Iain Buclaw + + * d-tree.h (check_typeinfo_type): Add Expression* parameter. + (build_typeinfo): Likewise. Declare new override. + * expr.cc (ExprVisitor): Call build_typeinfo with Expression*. + * typeinfo.cc (check_typeinfo_type): Include expression in the + diagnostic message. + (build_typeinfo): New override. + +2022-05-31 Iain Buclaw + + Backported from master: + 2022-05-31 Iain Buclaw + + PR d/105544 + * d-lang.cc (d_parse_file): Zero padding past the end of the stdin + buffer so the D lexer has a sentinel to stop parsing at. + +2022-05-15 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd a53934d18. + * dmd/VERSION: Update version to v2.100.0. + * d-codegen.cc (d_decl_context): Use resolvedLinkage to get + declaration linkage. + (build_struct_literal): Track offset in bits. + * d-gimplify.cc (d_gimplify_modify_expr): Check both operands for a + bit-field reference. + * d-lang.cc (d_post_options): Set flag_rtti and flag_exceptions if + -fno-druntime was seen on command-line. + (d_type_promotes_to): Use resolvedLinkage to get declaration linkage. + * decl.cc (make_thunk): Likewise. + * types.cc (layout_aggregate_members): Ignore anonymous fields in + total count. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + +2022-05-05 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd 88de5e369. + +2022-05-03 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd 081d61e15. + * dmd/VERSION: Update version to v2.100.0-rc.1. + +2022-04-28 Iain Buclaw + + * dmd/MERGE: Merge upstream dmd 313d28b3d. + * d-port.cc (Port::memicmp): Use d_size_t instead of size_t. + (Port::valcpy): Likewise. + 2022-04-21 Iain Buclaw * dmd/MERGE: Merge upstream dmd eb7bee331. diff --git a/gcc/d/d-builtins.cc b/gcc/d/d-builtins.cc index 7e7fb75bdc5c8..7d659494184c0 100644 --- a/gcc/d/d-builtins.cc +++ b/gcc/d/d-builtins.cc @@ -846,6 +846,9 @@ d_build_d_type_nodes (void) d_bool_type = make_unsigned_type (1); TREE_SET_CODE (d_bool_type, BOOLEAN_TYPE); + d_bool_false_node = TYPE_MIN_VALUE (d_bool_type); + d_bool_true_node = TYPE_MAX_VALUE (d_bool_type); + char8_type_node = make_unsigned_type (8); TYPE_STRING_FLAG (char8_type_node) = 1; diff --git a/gcc/d/d-codegen.cc b/gcc/d/d-codegen.cc index bb96b2f8d28f9..31d593ca7fde6 100644 --- a/gcc/d/d-codegen.cc +++ b/gcc/d/d-codegen.cc @@ -76,7 +76,7 @@ d_decl_context (Dsymbol *dsym) but only for extern(D) symbols. */ if (parent->isModule ()) { - if ((decl != NULL && decl->linkage != LINK::d) + if ((decl != NULL && decl->resolvedLinkage () != LINK::d) || (ad != NULL && ad->classKind != ClassKind::d)) return NULL_TREE; @@ -996,6 +996,7 @@ lower_struct_comparison (tree_code code, StructDeclaration *sd, if (tmode == NULL_TREE) tmode = make_unsigned_type (GET_MODE_BITSIZE (mode.require ())); + tmode = build_aligned_type (tmode, TYPE_ALIGN (stype)); t1ref = build_vconvert (tmode, t1ref); t2ref = build_vconvert (tmode, t2ref); @@ -1105,7 +1106,7 @@ build_array_struct_comparison (tree_code code, StructDeclaration *sd, if (length == 0 || result OP 0) break; */ t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node)); t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result, - boolean_false_node)); + d_bool_false_node)); t = build1 (EXIT_EXPR, void_type_node, t); add_stmt (t); @@ -1165,7 +1166,7 @@ build_struct_literal (tree type, vec *init) } vec *ve = NULL; - HOST_WIDE_INT offset = 0; + HOST_WIDE_INT bitoffset = 0; bool constant_p = true; bool finished = false; @@ -1210,11 +1211,11 @@ build_struct_literal (tree type, vec *init) if (is_initialized) { - HOST_WIDE_INT fieldpos = int_byte_position (field); + HOST_WIDE_INT fieldpos = int_bit_position (field); gcc_assert (value != NULL_TREE); /* Must not initialize fields that overlap. */ - if (fieldpos < offset) + if (fieldpos < bitoffset) { /* Find the nearest user defined type and field. */ tree vtype = type; @@ -1243,12 +1244,9 @@ build_struct_literal (tree type, vec *init) finished = true; } - /* Move offset to the next position in the struct. */ - if (TREE_CODE (type) == RECORD_TYPE) - { - offset = int_byte_position (field) - + int_size_in_bytes (TREE_TYPE (field)); - } + /* Move bit offset to the next position in the struct. */ + if (TREE_CODE (type) == RECORD_TYPE && DECL_SIZE (field)) + bitoffset = int_bit_position (field) + tree_to_shwi (DECL_SIZE (field)); /* If all initializers have been assigned, there's nothing else to do. */ if (vec_safe_is_empty (init)) @@ -1581,6 +1579,32 @@ complex_expr (tree type, tree re, tree im) type, re, im); } +/* Build a two-field record TYPE representing the complex expression EXPR. */ + +tree +underlying_complex_expr (tree type, tree expr) +{ + gcc_assert (list_length (TYPE_FIELDS (type)) == 2); + + expr = d_save_expr (expr); + + /* Build a constructor from the real and imaginary parts. */ + if (COMPLEX_FLOAT_TYPE_P (TREE_TYPE (expr)) && + (!INDIRECT_REF_P (expr) + || !CONVERT_EXPR_CODE_P (TREE_CODE (TREE_OPERAND (expr, 0))))) + { + vec *ve = NULL; + CONSTRUCTOR_APPEND_ELT (ve, TYPE_FIELDS (type), + real_part (expr)); + CONSTRUCTOR_APPEND_ELT (ve, TREE_CHAIN (TYPE_FIELDS (type)), + imaginary_part (expr)); + return build_constructor (type, ve); + } + + /* Replace type in the reinterpret cast with a cast to the record type. */ + return build_vconvert (type, expr); +} + /* Cast EXP (which should be a pointer) to TYPE* and then indirect. The back-end requires this cast in many cases. */ @@ -2174,14 +2198,16 @@ d_build_call (TypeFunction *tf, tree callable, tree object, for (size_t i = 0; i < arguments->length; ++i) { Expression *arg = (*arguments)[i]; - tree targ = build_expr (arg); + tree targ; if (i - varargs < nparams && i >= varargs) { /* Actual arguments for declared formal arguments. */ Parameter *parg = tf->parameterList[i - varargs]; - targ = convert_for_argument (targ, parg); + targ = convert_for_argument (arg, parg); } + else + targ = build_expr (arg); /* Don't pass empty aggregates by value. */ if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ) @@ -2197,16 +2223,31 @@ d_build_call (TypeFunction *tf, tree callable, tree object, Type *t = arg->type->toBasetype (); StructDeclaration *sd = t->baseElemOf ()->isTypeStruct ()->sym; - /* Nested structs also have ADDRESSABLE set, but if the type has - neither a copy constructor nor a destructor available, then we - need to take care of copying its value before passing it. */ - if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor)) + /* Need to take care of copying its value before passing the + argument in the following scenarios: + - The argument is a literal expression; a CONSTRUCTOR can't + have its address taken. + - The type has neither a copy constructor nor a destructor + available; nested structs also have ADDRESSABLE set. + - The ABI of the function expects the callee to destroy its + arguments; when the caller is handles destruction, then `targ' + has already been made into a temporary. */ + if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor) + || target.isCalleeDestroyingArgs (tf)) targ = force_target_expr (targ); targ = convert (build_reference_type (TREE_TYPE (targ)), build_address (targ)); } + /* Complex types are exposed as special types with an underlying + struct representation, if we are passing the native type to a + function that accepts the library-defined version, then ensure + it is properly reinterpreted as the underlying struct type. */ + if (COMPLEX_FLOAT_TYPE_P (TREE_TYPE (targ)) + && arg->type->isTypeStruct ()) + targ = underlying_complex_expr (build_ctype (arg->type), targ); + /* Type `noreturn` is a terminator, as no other arguments can possibly be evaluated after it. */ if (TREE_TYPE (targ) == noreturn_type_node) @@ -2689,6 +2730,11 @@ build_frame_type (tree ffi, FuncDeclaration *fd) TREE_ADDRESSABLE (field) = TREE_ADDRESSABLE (vsym); DECL_NONADDRESSABLE_P (field) = !TREE_ADDRESSABLE (vsym); TREE_THIS_VOLATILE (field) = TREE_THIS_VOLATILE (vsym); + SET_DECL_ALIGN (field, DECL_ALIGN (vsym)); + + /* Update alignment for frame record type. */ + if (TYPE_ALIGN (frame_rec_type) < DECL_ALIGN (field)) + SET_TYPE_ALIGN (frame_rec_type, DECL_ALIGN (field)); if (DECL_LANG_NRVO (vsym)) { diff --git a/gcc/d/d-convert.cc b/gcc/d/d-convert.cc index 3a6a32ab0248d..13fc5e7d2e25f 100644 --- a/gcc/d/d-convert.cc +++ b/gcc/d/d-convert.cc @@ -132,13 +132,13 @@ d_truthvalue_conversion (tree expr) return expr; case INTEGER_CST: - return integer_zerop (expr) ? boolean_false_node - : boolean_true_node; + return integer_zerop (expr) ? d_bool_false_node + : d_bool_true_node; case REAL_CST: return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0) - ? boolean_true_node - : boolean_false_node; + ? d_bool_true_node + : d_bool_false_node; case ADDR_EXPR: /* If we are taking the address of a decl that can never be null, @@ -148,7 +148,7 @@ d_truthvalue_conversion (tree expr) warning (OPT_Waddress, "the address of %qD will always evaluate as %", TREE_OPERAND (expr, 0)); - return boolean_true_node; + return d_bool_true_node; } break; @@ -502,6 +502,15 @@ convert_expr (tree exp, Type *etype, Type *totype) gcc_assert (totype->size () == etype->size ()); result = build_vconvert (build_ctype (totype), exp); } + else if (tbtype->ty == TY::Tvector && tbtype->size () == ebtype->size ()) + { + /* Allow casting from array to vector as if its an unaligned load. */ + tree type = build_ctype (totype); + tree unaligned_type = build_variant_type_copy (type); + SET_TYPE_ALIGN (unaligned_type, 1 * BITS_PER_UNIT); + TYPE_USER_ALIGN (unaligned_type) = 1; + result = convert (type, build_vconvert (unaligned_type, exp)); + } else { error ("cannot cast expression of type %qs to type %qs", @@ -611,7 +620,7 @@ convert_expr (tree exp, Type *etype, Type *totype) return result ? result : convert (build_ctype (totype), exp); } -/* Return a TREE represenwation of EXPR, whose type has been converted from +/* Return a TREE representation of EXPR, whose type has been converted from * ETYPE to TOTYPE, and is being used in an rvalue context. */ tree @@ -626,36 +635,146 @@ convert_for_rvalue (tree expr, Type *etype, Type *totype) { /* If casting from bool, the result is either 0 or 1, any other value violates @safe code, so enforce that it is never invalid. */ - if (CONSTANT_CLASS_P (expr)) - result = d_truthvalue_conversion (expr); - else + for (tree ref = expr; TREE_CODE (ref) == COMPONENT_REF; + ref = TREE_OPERAND (ref, 0)) { - /* Reinterpret the boolean as an integer and test the first bit. - The generated code should end up being equivalent to: + /* If the expression is a field that's part of a union, reinterpret + the boolean as an integer and test the first bit. The generated + code should end up being equivalent to: *cast(ubyte *)&expr & 1; */ - machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr)); - tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1); - result = fold_build2 (BIT_AND_EXPR, mtype, - build_vconvert (mtype, expr), - build_one_cst (mtype)); + if (TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == UNION_TYPE) + { + machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr)); + tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1); + result = fold_build2 (BIT_AND_EXPR, mtype, + build_vconvert (mtype, expr), + build_one_cst (mtype)); + break; + } } + if (result == NULL_TREE) + result = d_truthvalue_conversion (expr); + result = convert (build_ctype (tbtype), result); } + if (tbtype->ty == TY::Tsarray + && ebtype->ty == TY::Tsarray + && tbtype->nextOf ()->ty == ebtype->nextOf ()->ty + && INDIRECT_REF_P (expr) + && CONVERT_EXPR_CODE_P (TREE_CODE (TREE_OPERAND (expr, 0))) + && TREE_CODE (TREE_OPERAND (TREE_OPERAND (expr, 0), 0)) == ADDR_EXPR) + { + /* If expression is a vector that was casted to an array either by + explicit type cast or by taking the vector's `.array' value, strip the + reinterpret cast and build a constructor instead. */ + tree ptr = TREE_OPERAND (TREE_OPERAND (expr, 0), 0); + + if (VECTOR_TYPE_P (TREE_TYPE (TREE_TYPE (ptr)))) + { + /* Rewrite: `*(Array *)&vector' + into: `{ vector[0], vector[1], ... }' */ + tree array = d_save_expr (TREE_OPERAND (ptr, 0)); + array = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (expr), array); + + uinteger_t dim = tbtype->isTypeSArray ()->dim->toUInteger (); + vec *elms = NULL; + for (uinteger_t i = 0; i < dim; i++) + { + tree index = size_int (i); + tree value = build4 (ARRAY_REF, TREE_TYPE (TREE_TYPE (array)), + array, index, NULL_TREE, NULL_TREE); + CONSTRUCTOR_APPEND_ELT (elms, index, value); + } + + return build_constructor (build_ctype (totype), elms); + } + } + return result ? result : convert_expr (expr, etype, totype); } +/* Helper for convert_for_assigment and convert_for_argument. + Returns true if EXPR is a va_list static array parameter. */ + +static bool +is_valist_parameter_type (Expression *expr) +{ + Declaration *decl = NULL; + + if (VarExp *ve = expr->isVarExp ()) + decl = ve->var; + else if (SymOffExp *se = expr->isSymOffExp ()) + decl = se->var; + + if (decl != NULL && decl->isParameter () && valist_array_p (decl->type)) + return true; + + return false; +} + +/* Helper for convert_for_assigment and convert_for_argument. + Report erroneous uses of assigning or passing a va_list parameter. */ + +static void +check_valist_conversion (Expression *expr, Type *totype, bool in_assignment) +{ + /* Parameter symbol and its converted type. */ + Declaration *decl = NULL; + /* Type of parameter when evaluated in the expression. */ + Type *type = NULL; + + if (VarExp *ve = expr->isVarExp ()) + { + decl = ve->var; + type = ve->var->type->nextOf ()->pointerTo (); + } + else if (SymOffExp *se = expr->isSymOffExp ()) + { + decl = se->var; + type = se->var->type->nextOf ()->pointerTo ()->pointerTo (); + } + + /* Should not be called unless is_valist_parameter_type also matched. */ + gcc_assert (decl != NULL && decl->isParameter () + && valist_array_p (decl->type)); + + /* OK if conversion between types is allowed. */ + if (type->implicitConvTo (totype) != MATCH::nomatch) + return; + + if (in_assignment) + { + error_at (make_location_t (expr->loc), "cannot convert parameter %qs " + "from type %qs to type %qs in assignment", + expr->toChars(), type->toChars (), totype->toChars ()); + } + else + { + error_at (make_location_t (expr->loc), "cannot convert parameter %qs " + "from type %qs to type %qs in argument passing", + expr->toChars(), type->toChars (), totype->toChars ()); + } + + inform (make_location_t (decl->loc), "parameters of type % " + "{aka %qs} are decayed to pointer types, and require % " + "to be converted back into a static array type", + decl->type->toChars ()); +} + /* Apply semantics of assignment to a value of type TOTYPE to EXPR - (e.g., pointer = array -> pointer = &array[0]) + For example: `pointer = array' gets lowered to `pointer = &array[0]'. + If LITERALP is true, then EXPR is a value used in the initialization + of another literal. Return a TREE representation of EXPR implicitly converted to TOTYPE for use in assignment expressions MODIFY_EXPR, INIT_EXPR. */ tree -convert_for_assignment (tree expr, Type *etype, Type *totype) +convert_for_assignment (Expression *expr, Type *totype, bool literalp) { - Type *ebtype = etype->toBasetype (); + Type *ebtype = expr->type->toBasetype (); Type *tbtype = totype->toBasetype (); /* Assuming this only has to handle converting a non Tsarray type to @@ -675,8 +794,8 @@ convert_for_assignment (tree expr, Type *etype, Type *totype) vec *ce = NULL; tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t), size_zero_node, size_int (count - 1)); - tree value = convert_for_assignment (expr, etype, sa_type->next); - + tree value = convert_for_assignment (expr, sa_type->next, + literalp); /* Can't use VAR_DECLs in CONSTRUCTORS. */ if (VAR_P (value)) { @@ -697,38 +816,53 @@ convert_for_assignment (tree expr, Type *etype, Type *totype) if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct) && ebtype->isintegral ()) { - if (!integer_zerop (expr)) - gcc_unreachable (); - - return expr; + tree ret = build_expr (expr, false, literalp); + gcc_assert (integer_zerop (ret)); + return ret; } - return convert_expr (expr, etype, totype); + /* Assigning a va_list by value or reference, check whether RHS is a parameter + that has has been lowered by declaration_type or parameter_type. */ + if (is_valist_parameter_type (expr)) + check_valist_conversion (expr, totype, true); + + return convert_for_rvalue (build_expr (expr, false, literalp), + expr->type, totype); } /* Return a TREE representation of EXPR converted to represent the parameter type ARG. */ tree -convert_for_argument (tree expr, Parameter *arg) +convert_for_argument (Expression *expr, Parameter *arg) { + tree targ = build_expr (expr); + /* Lazy arguments: expr should already be a delegate. */ if (arg->storageClass & STClazy) - return expr; + return targ; + /* Passing a va_list by value, check whether the target requires it to + be decayed to a pointer type. */ if (valist_array_p (arg->type)) { - /* Do nothing if the va_list has already been decayed to a pointer. */ - if (!POINTER_TYPE_P (TREE_TYPE (expr))) - return build_address (expr); - } - else if (parameter_reference_p (arg)) - { - /* Front-end shouldn't automatically take the address. */ - return convert (parameter_type (arg), build_address (expr)); + if (!POINTER_TYPE_P (TREE_TYPE (targ))) + return build_address (targ); + + /* Do nothing if the va_list has already been converted. */ + return targ; } - return expr; + /* Passing a va_list by reference, check if types are really compatible + after conversion from static array to pointer type. */ + if (is_valist_parameter_type (expr)) + check_valist_conversion (expr, arg->type, false); + + /* Front-end shouldn't automatically take the address of `ref' parameters. */ + if (parameter_reference_p (arg)) + return convert (parameter_type (arg), build_address (targ)); + + return targ; } /* Perform default promotions for data used in expressions. @@ -803,7 +937,7 @@ convert_for_condition (tree expr, Type *type) break; default: - result = expr; + result = convert_for_rvalue (expr, type, type); break; } diff --git a/gcc/d/d-gimplify.cc b/gcc/d/d-gimplify.cc index a98089b7ccac6..36b76da3acc8f 100644 --- a/gcc/d/d-gimplify.cc +++ b/gcc/d/d-gimplify.cc @@ -109,7 +109,8 @@ d_gimplify_modify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) } /* Same as above, but for bit-field assignments. */ - if (bit_field_ref (op0) && TREE_TYPE (op0) != TREE_TYPE (op1)) + if ((bit_field_ref (op0) || bit_field_ref (op1)) + && TREE_TYPE (op0) != TREE_TYPE (op1)) { TREE_OPERAND (*expr_p, 1) = convert (TREE_TYPE (op0), op1); return GS_OK; diff --git a/gcc/d/d-lang.cc b/gcc/d/d-lang.cc index 9adcabdf7cfaf..f078f24fc5e93 100644 --- a/gcc/d/d-lang.cc +++ b/gcc/d/d-lang.cc @@ -904,16 +904,26 @@ d_post_options (const char ** fn) ? CHECKENABLEoff : CHECKENABLEon; } + /* When not linking against D runtime, turn off all code generation that + would otherwise reference it. */ if (global.params.betterC) { if (!OPTION_SET_P (flag_moduleinfo)) global.params.useModuleInfo = false; + /* Ensure that the front-end options are in sync with the `-frtti' and + `-fexceptions' flags. */ if (!OPTION_SET_P (flag_rtti)) - global.params.useTypeInfo = false; + { + global.params.useTypeInfo = false; + flag_rtti = false; + } if (!OPTION_SET_P (flag_exceptions)) - global.params.useExceptions = false; + { + global.params.useExceptions = false; + flag_exceptions = false; + } global.params.checkAction = CHECKACTION_C; } @@ -1072,6 +1082,10 @@ d_parse_file (void) global.params.doHdrGeneration); modules.push (m); + /* Zero the padding past the end of the buffer so the D lexer has a + sentinel. The lexer only reads up to 4 bytes at a time. */ + memset (buffer + len, '\0', 16); + /* Overwrite the source file for the module, the one created by Module::create would have a forced a `.d' suffix. */ m->src.length = len; @@ -1558,7 +1572,7 @@ d_type_promotes_to (tree type) /* Promotions are only applied on unnamed function arguments for declarations with `extern(C)' or `extern(C++)' linkage. */ if (cfun && DECL_LANG_FRONTEND (cfun->decl) - && DECL_LANG_FRONTEND (cfun->decl)->linkage != LINK::d) + && DECL_LANG_FRONTEND (cfun->decl)->resolvedLinkage () != LINK::d) { /* In [type/integer-promotions], integer promotions are conversions of the following types: diff --git a/gcc/d/d-target.cc b/gcc/d/d-target.cc index 610be74ad4876..f80ea466e24c8 100644 --- a/gcc/d/d-target.cc +++ b/gcc/d/d-target.cc @@ -464,6 +464,8 @@ Target::isReturnOnStack (TypeFunction *tf, bool) return false; Type *tn = tf->next->toBasetype (); + if (tn->size () == SIZE_INVALID) + return false; return (tn->ty == TY::Tstruct || tn->ty == TY::Tsarray); } @@ -584,31 +586,16 @@ Target::supportsLinkerDirective (void) const } /* Decides whether an `in' parameter of the specified POD type PARAM_TYPE is to - be passed by reference or by valie. This is used only when compiling with + be passed by reference or by value. This is used only when compiling with `-fpreview=in' enabled. */ bool Target::preferPassByRef (Type *param_type) { - if (param_type->size () == SIZE_INVALID) + /* See note in Target::isReturnOnStack. */ + Type *tb = param_type->toBasetype (); + if (tb->size () == SIZE_INVALID) return false; - tree type = build_ctype (param_type); - - /* Prefer a `ref' if the type is an aggregate, and its size is greater than - its alignment. */ - if (AGGREGATE_TYPE_P (type) - && (!valid_constant_size_p (TYPE_SIZE_UNIT (type)) - || compare_tree_int (TYPE_SIZE_UNIT (type), TYPE_ALIGN (type)) > 0)) - return true; - - /* If the back-end is always going to pass this by invisible reference. */ - if (pass_by_reference (NULL, function_arg_info (type, true))) - return true; - - /* If returning the parameter means the caller will do RVO. */ - if (targetm.calls.return_in_memory (type, NULL_TREE)) - return true; - - return false; + return (tb->ty == TY::Tstruct || tb->ty == TY::Tsarray); } diff --git a/gcc/d/d-tree.h b/gcc/d/d-tree.h index d93d02c29540a..30524fedbcf7e 100644 --- a/gcc/d/d-tree.h +++ b/gcc/d/d-tree.h @@ -426,6 +426,9 @@ enum d_tree_index DTI_NULL_ARRAY, DTI_BOTTOM_TYPE, + DTI_BOOL_FALSE, + DTI_BOOL_TRUE, + DTI_MAX }; @@ -462,6 +465,9 @@ extern GTY(()) tree d_global_trees[DTI_MAX]; #define null_array_node d_global_trees[DTI_NULL_ARRAY] /* The bottom type, referred to as `noreturn` in code. */ #define noreturn_type_node d_global_trees[DTI_BOTTOM_TYPE] +/* D boolean values are always byte-sized, unlike boolean_type_node. */ +#define d_bool_false_node d_global_trees[DTI_BOOL_FALSE] +#define d_bool_true_node d_global_trees[DTI_BOOL_TRUE] /* A prefix for internal variables, which are not user-visible. */ #if !defined (NO_DOT_IN_LABEL) @@ -564,6 +570,7 @@ extern tree size_mult_expr (tree, tree); extern tree real_part (tree); extern tree imaginary_part (tree); extern tree complex_expr (tree, tree, tree); +extern tree underlying_complex_expr (tree, tree); extern tree indirect_ref (tree, tree); extern tree build_deref (tree); extern tree build_array_index (tree, tree); @@ -599,8 +606,8 @@ extern tree d_truthvalue_conversion (tree); extern tree d_convert (tree, tree); extern tree convert_expr (tree, Type *, Type *); extern tree convert_for_rvalue (tree, Type *, Type *); -extern tree convert_for_assignment (tree, Type *, Type *); -extern tree convert_for_argument (tree, Parameter *); +extern tree convert_for_assignment (Expression *, Type *, bool = false); +extern tree convert_for_argument (Expression *, Parameter *); extern tree convert_for_condition (tree, Type *); extern tree d_array_convert (Expression *); extern tree d_array_convert (Type *, Expression *); @@ -659,6 +666,7 @@ extern tree maybe_expand_intrinsic (tree); extern void build_module_tree (Module *); extern tree d_module_context (void); extern void register_module_decl (Declaration *); +extern void d_defer_declaration (Declaration *); extern void d_finish_compilation (tree *, int); /* In runtime.cc. */ @@ -671,8 +679,9 @@ extern tree layout_classinfo (ClassDeclaration *); extern unsigned base_vtable_offset (ClassDeclaration *, BaseClass *); extern tree get_typeinfo_decl (TypeInfoDeclaration *); extern tree get_classinfo_decl (ClassDeclaration *); -extern void check_typeinfo_type (const Loc &, Scope *); -extern tree build_typeinfo (const Loc &, Type *); +extern void check_typeinfo_type (const Loc &, Scope *, Expression * = NULL); +extern tree build_typeinfo (const Loc &, Type *, Expression * = NULL); +extern tree build_typeinfo (Expression *, Type *); extern void create_typeinfo (Type *, Module *); extern void create_tinfo_types (Module *); extern void layout_cpp_typeinfo (ClassDeclaration *); diff --git a/gcc/d/decl.cc b/gcc/d/decl.cc index 86ea1761f4f53..a2dd8b84c59f9 100644 --- a/gcc/d/decl.cc +++ b/gcc/d/decl.cc @@ -116,6 +116,113 @@ gcc_attribute_p (Dsymbol *decl) return false; } +/* Return the DECL_RESULT for the function declaration DECL, create it if it + doesn't already exist. */ + +static tree +get_fndecl_result (FuncDeclaration *decl) +{ + tree fndecl = get_symbol_decl (decl); + tree resdecl = DECL_RESULT (fndecl); + + if (resdecl != NULL_TREE) + return resdecl; + + resdecl = build_decl (make_location_t (decl->loc), RESULT_DECL, + NULL_TREE, TREE_TYPE (TREE_TYPE (fndecl))); + + DECL_ARTIFICIAL (resdecl) = 1; + DECL_IGNORED_P (resdecl) = 1; + DECL_CONTEXT (resdecl) = fndecl; + DECL_RESULT (fndecl) = resdecl; + return resdecl; +} + +/* Return the list of PARAM_DECLs for the function declaration DECL, create it + if it doesn't already exist. */ + +static tree +get_fndecl_arguments (FuncDeclaration *decl) +{ + tree fndecl = get_symbol_decl (decl); + tree param_list = DECL_ARGUMENTS (fndecl); + + if (param_list != NULL_TREE) + return param_list; + + if (decl->fbody) + { + /* Handle special arguments first. */ + + /* `this' parameter: + For nested functions, D still generates a vthis, but it + should not be referenced in any expression. */ + if (decl->vthis) + { + tree parm_decl = get_symbol_decl (decl->vthis); + DECL_ARTIFICIAL (parm_decl) = 1; + TREE_READONLY (parm_decl) = 1; + + if (decl->vthis->type == Type::tvoidptr) + { + /* Replace generic pointer with back-end closure type + (this wins for gdb). */ + tree frame_type = FRAMEINFO_TYPE (get_frameinfo (decl)); + gcc_assert (frame_type != NULL_TREE); + TREE_TYPE (parm_decl) = build_pointer_type (frame_type); + } + + param_list = chainon (param_list, parm_decl); + } + + /* `_arguments' parameter. */ + if (decl->v_arguments) + { + tree parm_decl = get_symbol_decl (decl->v_arguments); + param_list = chainon (param_list, parm_decl); + } + + /* Now add on formal function parameters. */ + size_t n_parameters = decl->parameters ? decl->parameters->length : 0; + + for (size_t i = 0; i < n_parameters; i++) + { + VarDeclaration *param = (*decl->parameters)[i]; + tree parm_decl = get_symbol_decl (param); + + /* Type `noreturn` is a terminator, as no other arguments can possibly + be evaluated after it. */ + if (TREE_TYPE (parm_decl) == noreturn_type_node) + break; + + /* Chain them in the correct order. */ + param_list = chainon (param_list, parm_decl); + } + } + else + { + /* Build parameters from the function type. */ + tree fntype = TREE_TYPE (fndecl); + + for (tree t = TYPE_ARG_TYPES (fntype); t; t = TREE_CHAIN (t)) + { + if (t == void_list_node) + break; + + tree param = build_decl (DECL_SOURCE_LOCATION (fndecl), + PARM_DECL, NULL_TREE, TREE_VALUE (t)); + DECL_ARG_TYPE (param) = TREE_TYPE (param); + DECL_ARTIFICIAL (param) = 1; + DECL_IGNORED_P (param) = 1; + DECL_CONTEXT (param) = fndecl; + param_list = chainon (param_list, param); + } + } + + DECL_ARGUMENTS (fndecl) = param_list; + return param_list; +} + /* Implements the visitor interface to lower all Declaration AST classes emitted from the D Front-end to GCC trees. All visit methods accept one parameter D, which holds the frontend AST @@ -197,8 +304,16 @@ class DeclVisitor : public Visitor tree name = (alias != NULL) ? get_identifier (alias->toChars ()) : NULL_TREE; - debug_hooks->imported_module_or_decl (decl, name, context, - false, false); + if (TREE_CODE (decl) != TREE_LIST) + debug_hooks->imported_module_or_decl (decl, name, context, + false, false); + else + { + /* Overload sets return a list of imported decls. */ + for (; decl != NULL_TREE; decl = TREE_CHAIN (decl)) + debug_hooks->imported_module_or_decl (TREE_VALUE (decl), name, + context, false, false); + } } } else @@ -645,9 +760,12 @@ class DeclVisitor : public Visitor if (!d->isDataseg () && !d->isMember () && d->_init && !d->_init->isVoidInitializer ()) { + /* Evaluate RHS for side effects first. */ + Expression *ie = initializerToExpression (d->_init); + add_stmt (build_expr (ie)); + Expression *e = d->type->defaultInitLiteral (d->loc); - tree exp = build_expr (e); - add_stmt (exp); + add_stmt (build_expr (e)); } return; @@ -663,7 +781,7 @@ class DeclVisitor : public Visitor { /* Do not store variables we cannot take the address of, but keep the values for purposes of debugging. */ - if (!d->type->isscalar ()) + if (d->type->isscalar () && !d->type->hasPointers ()) { tree decl = get_symbol_decl (d); d_pushdecl (decl); @@ -737,10 +855,28 @@ class DeclVisitor : public Visitor /* Maybe put variable on list of things needing destruction. */ if (d->needsScopeDtor ()) { + /* Rewrite: `decl = exp' => TARGET_EXPR(decl, exp, dtor). */ vec_safe_push (d_function_chain->vars_in_scope, decl); + /* Force a TARGET_EXPR to add the corresponding cleanup. */ - exp = force_target_expr (compound_expr (exp, decl)); - TARGET_EXPR_CLEANUP (exp) = build_expr (d->edtor); + if (TREE_CODE (exp) != TARGET_EXPR) + { + if (VOID_TYPE_P (TREE_TYPE (exp))) + exp = compound_expr (exp, decl); + + exp = force_target_expr (exp); + } + + TARGET_EXPR_CLEANUP (exp) + = compound_expr (TARGET_EXPR_CLEANUP (exp), + build_expr (d->edtor)); + + /* The decl is really an alias for the TARGET_EXPR slot. */ + SET_DECL_VALUE_EXPR (decl, TARGET_EXPR_SLOT (exp)); + DECL_HAS_VALUE_EXPR_P (decl) = 1; + /* This tells the gimplifier not to emit a clobber for the decl + as its lifetime ends when the slot gets cleaned up. */ + TREE_ADDRESSABLE (decl) = 0; } add_stmt (exp); @@ -820,6 +956,10 @@ class DeclVisitor : public Visitor if (global.errors) return; + /* Start generating code for this function. */ + gcc_assert (d->semanticRun == PASS::semantic3done); + d->semanticRun = PASS::obj; + /* Duplicated FuncDeclarations map to the same symbol. Check if this is the one declaration which will be emitted. */ tree fndecl = get_symbol_decl (d); @@ -836,71 +976,18 @@ class DeclVisitor : public Visitor if (global.params.verbose) message ("function %s", d->toPrettyChars ()); - /* Start generating code for this function. */ - gcc_assert (d->semanticRun == PASS::semantic3done); - d->semanticRun = PASS::obj; - tree old_context = start_function (d); + tree param_list = get_fndecl_arguments (d); - tree parm_decl = NULL_TREE; - tree param_list = NULL_TREE; - - /* Special arguments... */ - - /* `this' parameter: - For nested functions, D still generates a vthis, but it - should not be referenced in any expression. */ - if (d->vthis) - { - parm_decl = get_symbol_decl (d->vthis); - DECL_ARTIFICIAL (parm_decl) = 1; - TREE_READONLY (parm_decl) = 1; - - if (d->vthis->type == Type::tvoidptr) - { - /* Replace generic pointer with back-end closure type - (this wins for gdb). */ - tree frame_type = FRAMEINFO_TYPE (get_frameinfo (d)); - gcc_assert (frame_type != NULL_TREE); - TREE_TYPE (parm_decl) = build_pointer_type (frame_type); - } - - param_list = chainon (param_list, parm_decl); - d_function_chain->static_chain = parm_decl; - } - - /* _arguments parameter. */ - if (d->v_arguments) - { - parm_decl = get_symbol_decl (d->v_arguments); - param_list = chainon (param_list, parm_decl); - } - - /* formal function parameters. */ - const size_t n_parameters = d->parameters ? d->parameters->length : 0; - - for (size_t i = 0; i < n_parameters; i++) - { - VarDeclaration *param = (*d->parameters)[i]; - - parm_decl = get_symbol_decl (param); - - /* Type `noreturn` is a terminator, as no other arguments can possibly - be evaluated after it. */ - if (TREE_TYPE (parm_decl) == noreturn_type_node) - break; - - /* Chain them in the correct order. */ - param_list = chainon (param_list, parm_decl); - } - - DECL_ARGUMENTS (fndecl) = param_list; DECL_IN_UNITTEST_CONDITION_P (fndecl) = this->in_version_unittest_; rest_of_decl_compilation (fndecl, 1, 0); /* If this is a member function that nested (possibly indirectly) in another function, construct an expession for this member function's static chain by going through parent link of nested classes. */ + if (d->vthis) + d_function_chain->static_chain = get_symbol_decl (d->vthis); + if (d->isThis ()) { AggregateDeclaration *ad = d->isThis (); @@ -915,7 +1002,7 @@ class DeclVisitor : public Visitor ad = pd->isAggregateDeclaration (); if (ad == NULL) { - cfun->language->static_chain = this_tree; + d_function_chain->static_chain = this_tree; break; } } @@ -976,7 +1063,7 @@ class DeclVisitor : public Visitor var = build_address (var); tree init = build_call_expr (builtin_decl_explicit (BUILT_IN_VA_START), - 2, var, parm_decl); + 2, var, tree_last (param_list)); declare_local_var (d->v_argptr); add_stmt (init); @@ -1012,13 +1099,88 @@ build_decl_tree (Dsymbol *d) input_location = saved_location; } +/* Returns true if function FD always needs to be implicitly defined, such as + it was declared `pragma(inline)'. */ + +static bool +function_needs_inline_definition_p (FuncDeclaration *fd) +{ + /* Function has already been defined. */ + if (!DECL_EXTERNAL (fd->csym)) + return false; + + /* No function body available for inlining. */ + if (!fd->fbody) + return false; + + /* These functions are tied to the module they are defined in. */ + if (fd->isFuncLiteralDeclaration () + || fd->isUnitTestDeclaration () + || fd->isFuncAliasDeclaration () + || fd->isInvariantDeclaration ()) + return false; + + /* Check whether function will be regularly defined later in the current + translation unit. */ + Module *md = fd->getModule (); + if (md && md->isRoot ()) + return false; + + /* Non-inlineable functions are always external. */ + if (DECL_UNINLINABLE (fd->csym)) + return false; + + /* Ignore functions that aren't decorated with `pragma(inline)'. */ + if (!DECL_DECLARED_INLINE_P (fd->csym)) + return false; + + /* Weak functions cannot be inlined. */ + if (lookup_attribute ("weak", DECL_ATTRIBUTES (fd->csym))) + return false; + + /* Naked functions cannot be inlined. */ + if (lookup_attribute ("naked", DECL_ATTRIBUTES (fd->csym))) + return false; + + return true; +} + +/* If the variable or function declaration in DECL needs to be defined, add it + to the list of deferred declarations to build later. */ + +static tree +maybe_build_decl_tree (Declaration *decl) +{ + gcc_assert (decl->csym != NULL_TREE); + + /* Still running semantic analysis on declaration, or it has already had its + code generated. */ + if (doing_semantic_analysis_p || decl->semanticRun >= PASS::obj) + return decl->csym; + + if (error_operand_p (decl->csym)) + return decl->csym; + + if (FuncDeclaration *fd = decl->isFuncDeclaration ()) + { + /* Externally defined inline functions need to be emitted. */ + if (function_needs_inline_definition_p (fd)) + { + DECL_EXTERNAL (fd->csym) = 0; + d_defer_declaration (fd); + } + } + + return decl->csym; +} + /* Return the decl for the symbol, create it if it doesn't already exist. */ tree get_symbol_decl (Declaration *decl) { if (decl->csym) - return decl->csym; + return maybe_build_decl_tree (decl); /* Deal with placeholder symbols immediately: SymbolDeclaration is used as a shell around an initializer symbol. */ @@ -1055,6 +1217,20 @@ get_symbol_decl (Declaration *decl) return decl->csym; } + if (VarDeclaration *vd = decl->isVarDeclaration ()) + { + /* CONST_DECL was initially intended for enumerals and may be used for + scalars in general, but not for aggregates. Here a non-constant + value is generated anyway so as its value can be used. */ + if (!vd->canTakeAddressOf () && !vd->type->isscalar ()) + { + gcc_assert (vd->_init && !vd->_init->isVoidInitializer ()); + Expression *ie = initializerToExpression (vd->_init); + decl->csym = build_expr (ie, false); + return decl->csym; + } + } + /* Build the tree for the symbol. */ FuncDeclaration *fd = decl->isFuncDeclaration (); if (fd) @@ -1102,24 +1278,30 @@ get_symbol_decl (Declaration *decl) if (vd->storage_class & STCextern) DECL_EXTERNAL (decl->csym) = 1; - /* CONST_DECL was initially intended for enumerals and may be used for - scalars in general, but not for aggregates. Here a non-constant - value is generated anyway so as the CONST_DECL only serves as a - placeholder for the value, however the DECL itself should never be - referenced in any generated code, or passed to the back-end. */ - if (vd->storage_class & STCmanifest) + if (!vd->canTakeAddressOf ()) { /* Cannot make an expression out of a void initializer. */ - if (vd->_init && !vd->_init->isVoidInitializer ()) - { - Expression *ie = initializerToExpression (vd->_init); + gcc_assert (vd->_init && !vd->_init->isVoidInitializer ()); + /* Non-scalar manifest constants have already been dealt with. */ + gcc_assert (vd->type->isscalar ()); - if (!vd->type->isscalar ()) - DECL_INITIAL (decl->csym) = build_expr (ie, false); - else - DECL_INITIAL (decl->csym) = build_expr (ie, true); - } + Expression *ie = initializerToExpression (vd->_init); + DECL_INITIAL (decl->csym) = build_expr (ie, true); } + + /* [type-qualifiers/const-and-immutable] + + `immutable` applies to data that cannot change. Immutable data values, + once constructed, remain the same for the duration of the program's + execution. */ + if (vd->isImmutable () && !vd->setInCtorOnly ()) + TREE_READONLY (decl->csym) = 1; + + /* `const` applies to data that cannot be changed by the const reference + to that data. It may, however, be changed by another reference to that + same data. */ + if (vd->isConst () && !vd->isDataseg ()) + TREE_READONLY (decl->csym) = 1; } /* Set the declaration mangled identifier if static. */ @@ -1302,6 +1484,12 @@ get_symbol_decl (Declaration *decl) DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT (decl->csym) = 1; } + /* In [expression/function_literals], function literals (aka lambdas) + enable embedding anonymous functions and anonymous delegates directly + into expressions. They are defined in each referencing module. */ + if (fd->isFuncLiteralDeclaration ()) + DECL_SET_LAMBDA_FUNCTION (decl->csym, true); + /* Mark compiler generated functions as artificial. */ if (fd->isGenerated ()) DECL_ARTIFICIAL (decl->csym) = 1; @@ -1394,7 +1582,7 @@ get_symbol_decl (Declaration *decl) TREE_USED (decl->csym) = 1; d_keep (decl->csym); - return decl->csym; + return maybe_build_decl_tree (decl); } /* Returns a declaration for a VAR_DECL. Used to create compiler-generated @@ -1688,6 +1876,7 @@ finish_thunk (tree thunk, tree function) TREE_ADDRESSABLE (function) = 1; TREE_USED (function) = 1; + DECL_EXTERNAL (thunk) = 0; if (flag_syntax_only) { @@ -1759,43 +1948,14 @@ make_thunk (FuncDeclaration *decl, int offset) if (!DECL_ARGUMENTS (function) || !DECL_RESULT (function)) { - /* Compile the function body before generating the thunk, this is done - even if the decl is external to the current module. */ - if (decl->fbody) - build_decl_tree (decl); - else - { - /* Build parameters for functions that are not being compiled, - so that they can be correctly cloned in finish_thunk. */ - tree fntype = TREE_TYPE (function); - tree params = NULL_TREE; - - for (tree t = TYPE_ARG_TYPES (fntype); t; t = TREE_CHAIN (t)) - { - if (t == void_list_node) - break; - - tree param = build_decl (DECL_SOURCE_LOCATION (function), - PARM_DECL, NULL_TREE, TREE_VALUE (t)); - DECL_ARG_TYPE (param) = TREE_TYPE (param); - DECL_ARTIFICIAL (param) = 1; - DECL_IGNORED_P (param) = 1; - DECL_CONTEXT (param) = function; - params = chainon (params, param); - } - - DECL_ARGUMENTS (function) = params; - - /* Also build the result decl, which is needed when force creating - the thunk in gimple inside cgraph_node::expand_thunk. */ - tree resdecl = build_decl (DECL_SOURCE_LOCATION (function), - RESULT_DECL, NULL_TREE, - TREE_TYPE (fntype)); - DECL_ARTIFICIAL (resdecl) = 1; - DECL_IGNORED_P (resdecl) = 1; - DECL_CONTEXT (resdecl) = function; - DECL_RESULT (function) = resdecl; - } + /* Build parameters for functions that are not being compiled, + so that they can be correctly cloned in finish_thunk. */ + tree function = get_symbol_decl (decl); + DECL_ARGUMENTS (function) = get_fndecl_arguments (decl); + + /* Also build the result decl, which is needed when force creating + the thunk in gimple inside cgraph_node::expand_thunk. */ + DECL_RESULT (function) = get_fndecl_result (decl); } /* Don't build the thunk if the compilation step failed. */ @@ -1821,11 +1981,10 @@ make_thunk (FuncDeclaration *decl, int offset) DECL_CONTEXT (thunk) = d_decl_context (decl); - /* Thunks inherit the public access of the function they are targeting. - Thunks are connected to the definitions of the functions, so thunks are - not produced for external functions. */ + /* Thunks inherit the public access of the function they are targeting. */ TREE_PUBLIC (thunk) = TREE_PUBLIC (function); - DECL_EXTERNAL (thunk) = DECL_EXTERNAL (function); + /* The thunk has not been defined -- yet. */ + DECL_EXTERNAL (thunk) = 1; /* Thunks are always addressable. */ TREE_ADDRESSABLE (thunk) = 1; @@ -1845,7 +2004,7 @@ make_thunk (FuncDeclaration *decl, int offset) forcing a D local thunk to be emitted. */ const char *ident; - if (decl->linkage == LINK::cpp) + if (decl->resolvedLinkage () == LINK::cpp) ident = target.cpp.thunkMangle (decl, offset); else { @@ -1862,9 +2021,11 @@ make_thunk (FuncDeclaration *decl, int offset) d_keep (thunk); - if (decl->linkage != LINK::cpp) + if (decl->resolvedLinkage () != LINK::cpp) free (CONST_CAST (char *, ident)); + /* Thunks are connected to the definitions of the functions, so thunks are + not produced for external functions. */ if (!DECL_EXTERNAL (function)) finish_thunk (thunk, function); @@ -1886,19 +2047,9 @@ start_function (FuncDeclaration *fd) { tree fndecl = get_symbol_decl (fd); - /* Function has been defined, check now whether we intend to send it to - object file, or it really is extern. Such as inlinable functions from - modules not in this compilation, or thunk aliases. */ - TemplateInstance *ti = fd->isInstantiated (); - if (ti && ti->needsCodegen ()) - DECL_EXTERNAL (fndecl) = 0; - else - { - Module *md = fd->getModule (); - if (md && md->isRoot ()) - DECL_EXTERNAL (fndecl) = 0; - } - + /* Function has been defined. Whether we intend to send it to object file, or + discard it has already been determined by set_linkage_for_decl. */ + DECL_EXTERNAL (fndecl) = 0; DECL_INITIAL (fndecl) = error_mark_node; /* Add this decl to the current binding level. */ @@ -1913,14 +2064,8 @@ start_function (FuncDeclaration *fd) /* Let GCC know the current scope is this function. */ current_function_decl = fndecl; - tree restype = TREE_TYPE (TREE_TYPE (fndecl)); - tree resdecl = build_decl (make_location_t (fd->loc), RESULT_DECL, - NULL_TREE, restype); - - DECL_RESULT (fndecl) = resdecl; - DECL_CONTEXT (resdecl) = fndecl; - DECL_ARTIFICIAL (resdecl) = 1; - DECL_IGNORED_P (resdecl) = 1; + /* Build the result decl before calling allocate_struct_function. */ + DECL_RESULT (fndecl) = get_fndecl_result (fd); /* Initialize the RTL code for the function. */ allocate_struct_function (fndecl, false); @@ -1987,6 +2132,10 @@ finish_function (tree old_context) DECL_SAVED_TREE (fndecl) = bind; + /* Finish any forward referenced thunks for the function. */ + for (tree t = DECL_LANG_THUNKS (fndecl); t; t = DECL_CHAIN (t)) + finish_thunk (t, fndecl); + if (!errorcount && !global.errors) { /* Dump the D-specific tree IR. */ @@ -2418,16 +2567,17 @@ set_linkage_for_decl (tree decl) if (!TREE_PUBLIC (decl)) return; + /* Function literals and functions declared as `pragma(inline, true)' can + appear in multiple translation units. */ + if (TREE_CODE (decl) == FUNCTION_DECL + && (DECL_DECLARED_INLINE_P (decl) || DECL_LAMBDA_FUNCTION_P (decl))) + return d_comdat_linkage (decl); + /* Don't need to give private or protected symbols a special linkage. */ if ((TREE_PRIVATE (decl) || TREE_PROTECTED (decl)) && !DECL_INSTANTIATED (decl)) return; - /* Functions declared as `pragma(inline, true)' can appear in multiple - translation units. */ - if (TREE_CODE (decl) == FUNCTION_DECL && DECL_DECLARED_INLINE_P (decl)) - return d_comdat_linkage (decl); - /* If all instantiations must go in COMDAT, give them that linkage. This also applies to other extern declarations, so that it is possible for them to override template declarations. */ diff --git a/gcc/d/dmd/MERGE b/gcc/d/dmd/MERGE index d18119193d463..51736565a57e2 100644 --- a/gcc/d/dmd/MERGE +++ b/gcc/d/dmd/MERGE @@ -1,4 +1,4 @@ -313d28b3db7523e67880ae3baf8ef28ce9abe9bd +316b89f1e3dffcad488c26f56f58c8adfcb84b26 The first line of this file holds the git revision number of the last merge done from the dlang/dmd repository. diff --git a/gcc/d/dmd/VERSION b/gcc/d/dmd/VERSION index 2450fd55ef8be..868f8007d2f69 100644 --- a/gcc/d/dmd/VERSION +++ b/gcc/d/dmd/VERSION @@ -1 +1 @@ -v2.100.0-beta.1 +v2.100.2 diff --git a/gcc/d/dmd/canthrow.d b/gcc/d/dmd/canthrow.d index a38cbb1610b1b..fe6e1e344b98e 100644 --- a/gcc/d/dmd/canthrow.d +++ b/gcc/d/dmd/canthrow.d @@ -270,18 +270,7 @@ private CT Dsymbol_canThrow(Dsymbol s, FuncDeclaration func, bool mustNotThrow) } else if (auto td = s.isTupleDeclaration()) { - for (size_t i = 0; i < td.objects.dim; i++) - { - RootObject o = (*td.objects)[i]; - if (o.dyncast() == DYNCAST.expression) - { - Expression eo = cast(Expression)o; - if (auto se = eo.isDsymbolExp()) - { - result |= Dsymbol_canThrow(se.s, func, mustNotThrow); - } - } - } + td.foreachVar(&symbolDg); } return result; } diff --git a/gcc/d/dmd/clone.d b/gcc/d/dmd/clone.d index 9c8c1c316bff7..75a16bd2da4d2 100644 --- a/gcc/d/dmd/clone.d +++ b/gcc/d/dmd/clone.d @@ -563,9 +563,12 @@ FuncDeclaration buildXopEquals(StructDeclaration sd, Scope* sc) e = new DotIdExp(sd.loc, e, Id.object); e = new DotIdExp(sd.loc, e, id); e = e.expressionSemantic(sc); - Dsymbol s = getDsymbol(e); - assert(s); - sd.xerreq = s.isFuncDeclaration(); + if (!e.isErrorExp()) + { + Dsymbol s = getDsymbol(e); + assert(s); + sd.xerreq = s.isFuncDeclaration(); + } } Loc declLoc; // loc is unnecessary so __xopEquals is never called directly Loc loc; // loc is unnecessary so errors are gagged @@ -684,9 +687,12 @@ FuncDeclaration buildXopCmp(StructDeclaration sd, Scope* sc) e = new DotIdExp(sd.loc, e, Id.object); e = new DotIdExp(sd.loc, e, id); e = e.expressionSemantic(sc); - Dsymbol s = getDsymbol(e); - assert(s); - sd.xerrcmp = s.isFuncDeclaration(); + if (!e.isErrorExp()) + { + Dsymbol s = getDsymbol(e); + assert(s); + sd.xerrcmp = s.isFuncDeclaration(); + } } Loc declLoc; // loc is unnecessary so __xopCmp is never called directly Loc loc; // loc is unnecessary so errors are gagged @@ -867,7 +873,7 @@ void buildDtors(AggregateDeclaration ad, Scope* sc) // Build the field destructor (`ad.fieldDtor`), if needed. // If the user dtor is an extern(C++) prototype, then we expect it performs a full-destruction and skip building. - const bool dtorIsCppPrototype = ad.userDtors.dim && ad.userDtors[0].linkage == LINK.cpp && !ad.userDtors[0].fbody; + const bool dtorIsCppPrototype = ad.userDtors.dim && ad.userDtors[0]._linkage == LINK.cpp && !ad.userDtors[0].fbody; if (!dtorIsCppPrototype) { Expression e = null; @@ -1019,7 +1025,7 @@ void buildDtors(AggregateDeclaration ad, Scope* sc) // Set/build `ad.dtor`. // On Windows, the dtor in the vtable is a shim with different signature. - ad.dtor = (ad.aggrDtor && ad.aggrDtor.linkage == LINK.cpp && !target.cpp.twoDtorInVtable) + ad.dtor = (ad.aggrDtor && ad.aggrDtor._linkage == LINK.cpp && !target.cpp.twoDtorInVtable) ? buildWindowsCppDtor(ad, ad.aggrDtor, sc) : ad.aggrDtor; diff --git a/gcc/d/dmd/cparse.d b/gcc/d/dmd/cparse.d index 2b2046f3da302..56447869c36bf 100644 --- a/gcc/d/dmd/cparse.d +++ b/gcc/d/dmd/cparse.d @@ -1662,6 +1662,14 @@ final class CParser(AST) : Parser!AST return; } + if (!tspec) + { + error("no type for declarator before `%s`", token.toChars()); + panic(); + nextToken(); + return; + } + if (tspec && specifier.mod & MOD.xconst) { tspec = toConst(tspec); @@ -2498,7 +2506,7 @@ final class CParser(AST) : Parser!AST private AST.Type cparseDeclarator(DTR declarator, AST.Type t, out Identifier pident, ref Specifier specifier) { - //printf("cparseDeclarator(%d)\n", declarator); + //printf("cparseDeclarator(%d, %p)\n", declarator, t); AST.Types constTypes; // all the Types that will need `const` applied to them constTypes.setDim(0); diff --git a/gcc/d/dmd/dcast.d b/gcc/d/dmd/dcast.d index 83978391e4265..6afa1c966b0cf 100644 --- a/gcc/d/dmd/dcast.d +++ b/gcc/d/dmd/dcast.d @@ -1107,9 +1107,14 @@ MATCH implicitConvTo(Expression e, Type t) MATCH visitCond(CondExp e) { - auto result = visit(e); - if (result != MATCH.nomatch) - return result; + e.econd = e.econd.optimize(WANTvalue); + const opt = e.econd.toBool(); + if (opt.isPresent()) + { + auto result = visit(e); + if (result != MATCH.nomatch) + return result; + } MATCH m1 = e.e1.implicitConvTo(t); MATCH m2 = e.e2.implicitConvTo(t); @@ -2954,6 +2959,9 @@ Lagain: t1 = Type.basic[ty1]; t2 = Type.basic[ty2]; + + if (!(t1 && t2)) + return null; e1 = e1.castTo(sc, t1); e2 = e2.castTo(sc, t2); return Lret(Type.basic[ty]); diff --git a/gcc/d/dmd/dclass.d b/gcc/d/dmd/dclass.d index 15ac8d917351d..a4a2abf4144be 100644 --- a/gcc/d/dmd/dclass.d +++ b/gcc/d/dmd/dclass.d @@ -984,7 +984,7 @@ extern (C++) class ClassDeclaration : AggregateDeclaration auto var = new VarDeclaration(loc, vtype, Identifier.idPool("__vtbl"), null, STC.immutable_ | STC.static_); var.addMember(null, this); var.isdataseg = 1; - var.linkage = LINK.d; + var._linkage = LINK.d; var.semanticRun = PASS.semanticdone; // no more semantic wanted vtblsym = var; } diff --git a/gcc/d/dmd/declaration.d b/gcc/d/dmd/declaration.d index a533d30ca8083..6c83c196f726e 100644 --- a/gcc/d/dmd/declaration.d +++ b/gcc/d/dmd/declaration.d @@ -221,7 +221,7 @@ extern (C++) abstract class Declaration : Dsymbol Type originalType; // before semantic analysis StorageClass storage_class = STC.undefined_; Visibility visibility; - LINK linkage = LINK.default_; + LINK _linkage = LINK.default_; // may be `LINK.system`; use `resolvedLinkage()` to resolve it short inuse; // used to detect cycles ubyte adFlags; // control re-assignment of AliasDeclaration (put here for packing reasons) @@ -420,6 +420,12 @@ extern (C++) abstract class Declaration : Dsymbol return (storage_class & STC.static_) != 0; } + /// Returns the linkage, resolving the target-specific `System` one. + final LINK resolvedLinkage() const + { + return _linkage == LINK.system ? target.systemLinkage() : _linkage; + } + bool isDelete() { return false; @@ -650,23 +656,46 @@ extern (C++) final class TupleDeclaration : Declaration override bool needThis() { //printf("TupleDeclaration::needThis(%s)\n", toChars()); - for (size_t i = 0; i < objects.dim; i++) + return isexp ? foreachVar((s) { return s.needThis(); }) != 0 : false; + } + + /*********************************************************** + * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration + * inside DsymbolExp (isexp == true). + * Params: + * dg = delegate to call for each Dsymbol + */ + extern (D) void foreachVar(scope void delegate(Dsymbol) dg) + { + assert(isexp); + foreach (o; *objects) { - RootObject o = (*objects)[i]; - if (o.dyncast() == DYNCAST.expression) - { - Expression e = cast(Expression)o; - if (DsymbolExp ve = e.isDsymbolExp()) - { - Declaration d = ve.s.isDeclaration(); - if (d && d.needThis()) - { - return true; - } - } - } + if (auto e = o.isExpression()) + if (auto se = e.isDsymbolExp()) + dg(se.s); } - return false; + } + + /*********************************************************** + * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration + * inside DsymbolExp (isexp == true). + * If dg returns !=0, stops and returns that value else returns 0. + * Params: + * dg = delegate to call for each Dsymbol + * Returns: + * last value returned by dg() + */ + extern (D) int foreachVar(scope int delegate(Dsymbol) dg) + { + assert(isexp); + foreach (o; *objects) + { + if (auto e = o.isExpression()) + if (auto se = e.isDsymbolExp()) + if(auto ret = dg(se.s)) + return ret; + } + return 0; } override inout(TupleDeclaration) isTupleDeclaration() inout @@ -1136,15 +1165,7 @@ extern (C++) class VarDeclaration : Declaration // If this variable was really a tuple, set the offsets for the tuple fields TupleDeclaration v2 = aliassym.isTupleDeclaration(); assert(v2); - for (size_t i = 0; i < v2.objects.dim; i++) - { - RootObject o = (*v2.objects)[i]; - assert(o.dyncast() == DYNCAST.expression); - Expression e = cast(Expression)o; - assert(e.op == EXP.dSymbol); - DsymbolExp se = e.isDsymbolExp(); - se.s.setFieldOffset(ad, fieldState, isunion); - } + v2.foreachVar((s) { s.setFieldOffset(ad, fieldState, isunion); }); return; } @@ -1919,7 +1940,7 @@ extern (C++) class TypeInfoDeclaration : VarDeclaration this.tinfo = tinfo; storage_class = STC.static_ | STC.gshared; visibility = Visibility(Visibility.Kind.public_); - linkage = LINK.c; + _linkage = LINK.c; alignment.set(target.ptrsize); } diff --git a/gcc/d/dmd/declaration.h b/gcc/d/dmd/declaration.h index 441a966cf4d21..6fe4a221c3b9d 100644 --- a/gcc/d/dmd/declaration.h +++ b/gcc/d/dmd/declaration.h @@ -115,7 +115,7 @@ class Declaration : public Dsymbol Type *originalType; // before semantic analysis StorageClass storage_class; Visibility visibility; - LINK linkage; + LINK _linkage; // may be `LINK::system`; use `resolvedLinkage()` to resolve it short inuse; // used to detect cycles uint8_t adFlags; Symbol* isym; // import version of csym @@ -127,6 +127,7 @@ class Declaration : public Dsymbol Dsymbol *search(const Loc &loc, Identifier *ident, int flags = SearchLocalsOnly); bool isStatic() const { return (storage_class & STCstatic) != 0; } + LINK resolvedLinkage() const; // returns the linkage, resolving the target-specific `System` one virtual bool isDelete(); virtual bool isDataseg(); virtual bool isThreadlocal(); @@ -655,6 +656,7 @@ class FuncDeclaration : public Declaration bool isNRVO() const; void isNRVO(bool v); bool isNaked() const; + void isNaked(bool v); bool isGenerated() const; void isGenerated(bool v); bool isIntroducing() const; @@ -664,7 +666,9 @@ class FuncDeclaration : public Declaration bool hasDualContext() const; bool hasAlwaysInlines() const; bool isCrtCtor() const; + void isCrtCtor(bool v); bool isCrtDtor() const; + void isCrtDtor(bool v); virtual bool isNested() const; AggregateDeclaration *isThis(); diff --git a/gcc/d/dmd/dinterpret.d b/gcc/d/dmd/dinterpret.d index 3cfc07ab9105a..485b2dec1a18c 100644 --- a/gcc/d/dmd/dinterpret.d +++ b/gcc/d/dmd/dinterpret.d @@ -674,8 +674,20 @@ private Expression interpretFunction(UnionExp* pue, FuncDeclaration fd, InterSta } } // If fell off the end of a void function, return void - if (!e && tf.next.ty == Tvoid) - e = CTFEExp.voidexp; + if (!e) + { + if (tf.next.ty == Tvoid) + e = CTFEExp.voidexp; + else + { + /* missing a return statement can happen with C functions + * https://issues.dlang.org/show_bug.cgi?id=23056 + */ + fd.error("no return value from function"); + e = CTFEExp.cantexp; + } + } + if (tf.isref && e.op == EXP.variable && e.isVarExp().var == fd.vthis) e = thisarg; if (tf.isref && fd.hasDualContext() && e.op == EXP.index) @@ -695,7 +707,6 @@ private Expression interpretFunction(UnionExp* pue, FuncDeclaration fd, InterSta } } } - assert(e !is null); // Leave the function --ctfeGlobals.callDepth; @@ -2280,16 +2291,12 @@ public: result = null; // Reserve stack space for all tuple members - if (!td.objects) - return; - foreach (o; *td.objects) + td.foreachVar((s) { - Expression ex = isExpression(o); - DsymbolExp ds = ex ? ex.isDsymbolExp() : null; - VarDeclaration v2 = ds ? ds.s.isVarDeclaration() : null; + VarDeclaration v2 = s.isVarDeclaration(); assert(v2); if (v2.isDataseg() && !v2.isCTFE()) - continue; + return 0; ctfeGlobals.stack.push(v2); if (v2._init) @@ -2299,7 +2306,7 @@ public: { einit = interpretRegion(ie.exp, istate, goal); if (exceptionOrCant(einit)) - return; + return 1; } else if (v2._init.isVoidInitializer()) { @@ -2309,11 +2316,12 @@ public: { e.error("declaration `%s` is not yet implemented in CTFE", e.toChars()); result = CTFEExp.cantexp; - return; + return 1; } setValue(v2, einit); } - } + return 0; + }); return; } if (v.isStatic()) diff --git a/gcc/d/dmd/dmangle.d b/gcc/d/dmd/dmangle.d index 1f895e03af05e..76042969b9b25 100644 --- a/gcc/d/dmd/dmangle.d +++ b/gcc/d/dmd/dmangle.d @@ -1335,15 +1335,19 @@ void realToMangleBuffer(OutBuffer* buf, real_t value) private extern (D) const(char)[] externallyMangledIdentifier(Declaration d) { + assert(!d.mangleOverride, "mangle overrides should have been handled earlier"); + + const linkage = d.resolvedLinkage(); const par = d.toParent(); //toParent() skips over mixin templates - if (!par || par.isModule() || d.linkage == LINK.cpp || - (d.linkage == LINK.c && d.isCsymbol() && d.isFuncDeclaration())) + if (!par || par.isModule() || linkage == LINK.cpp || + (linkage == LINK.c && d.isCsymbol() && + (d.isFuncDeclaration() || + (d.isVarDeclaration() && d.isDataseg() && d.storage_class & STC.extern_)))) { - if (d.linkage != LINK.d && d.localNum) + if (linkage != LINK.d && d.localNum) d.error("the same declaration cannot be in multiple scopes with non-D linkage"); - const l = d.linkage == LINK.system ? target.systemLinkage() : d.linkage; - final switch (l) + final switch (linkage) { case LINK.d: break; diff --git a/gcc/d/dmd/dsymbolsem.d b/gcc/d/dmd/dsymbolsem.d index 5415401e0e4db..dfaaff93d3541 100644 --- a/gcc/d/dmd/dsymbolsem.d +++ b/gcc/d/dmd/dsymbolsem.d @@ -376,7 +376,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor // https://issues.dlang.org/show_bug.cgi?id=19482 if ((dsym.storage_class & (STC.foreach_ | STC.local)) == (STC.foreach_ | STC.local)) { - dsym.linkage = LINK.d; + dsym._linkage = LINK.d; dsym.visibility = Visibility(Visibility.Kind.public_); dsym.overlapped = false; // unset because it is modified early on this function dsym.userAttribDecl = null; // unset because it is set by Dsymbol.setScope() @@ -389,7 +389,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor dsym.storage_class |= (sc.stc & ~(STC.synchronized_ | STC.override_ | STC.abstract_ | STC.final_)); dsym.userAttribDecl = sc.userAttribDecl; dsym.cppnamespace = sc.namespace; - dsym.linkage = sc.linkage; + dsym._linkage = sc.linkage; dsym.visibility = sc.visibility; dsym.alignment = sc.alignment(); } @@ -650,7 +650,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor else ti = dsym._init ? dsym._init.syntaxCopy() : null; - StorageClass storage_class = STC.temp | STC.local | dsym.storage_class; + StorageClass storage_class = STC.temp | dsym.storage_class; if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter)) storage_class |= arg.storageClass; auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class); @@ -659,14 +659,6 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor v.dsymbolSemantic(sc); - if (sc.scopesym) - { - //printf("adding %s to %s\n", v.toChars(), sc.scopesym.toChars()); - if (sc.scopesym.members) - // Note this prevents using foreach() over members, because the limits can change - sc.scopesym.members.push(v); - } - Expression e = new DsymbolExp(dsym.loc, v); (*exps)[i] = e; } @@ -1191,7 +1183,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor override void visit(TypeInfoDeclaration dsym) { - assert(dsym.linkage == LINK.c); + assert(dsym._linkage == LINK.c); } override void visit(BitFieldDeclaration dsym) @@ -2174,7 +2166,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor em.semanticRun = PASS.semantic; em.type = Type.tint32; - em.linkage = LINK.c; + em._linkage = LINK.c; em.storage_class |= STC.manifest; if (em.value) { @@ -2264,7 +2256,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor em.semanticRun = PASS.semantic; em.visibility = em.ed.isAnonymous() ? em.ed.visibility : Visibility(Visibility.Kind.public_); - em.linkage = LINK.d; + em._linkage = LINK.d; em.storage_class |= STC.manifest; // https://issues.dlang.org/show_bug.cgi?id=9701 @@ -3024,7 +3016,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor if (sc.flags & SCOPE.compile) funcdecl.flags |= FUNCFLAG.compileTimeOnly; // don't emit code for this function - funcdecl.linkage = sc.linkage; + funcdecl._linkage = sc.linkage; if (auto fld = funcdecl.isFuncLiteralDeclaration()) { if (fld.treq) @@ -3037,7 +3029,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor fld.tok = TOK.function_; else assert(0); - funcdecl.linkage = treq.nextOf().toTypeFunction().linkage; + funcdecl._linkage = treq.nextOf().toTypeFunction().linkage; } } @@ -3048,7 +3040,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor // check pragma(crt_constructor) if (funcdecl.flags & (FUNCFLAG.CRTCtor | FUNCFLAG.CRTDtor)) { - if (funcdecl.linkage != LINK.c) + if (funcdecl._linkage != LINK.c) { funcdecl.error("must be `extern(C)` for `pragma(%s)`", (funcdecl.flags & FUNCFLAG.CRTCtor) ? "crt_constructor".ptr : "crt_destructor".ptr); @@ -3057,7 +3049,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor funcdecl.visibility = sc.visibility; funcdecl.userAttribDecl = sc.userAttribDecl; - UserAttributeDeclaration.checkGNUABITag(funcdecl, funcdecl.linkage); + UserAttributeDeclaration.checkGNUABITag(funcdecl, funcdecl._linkage); checkMustUseReserved(funcdecl); if (!funcdecl.originalType) @@ -3193,7 +3185,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor tf.isScopeQual = false; } - sc.linkage = funcdecl.linkage; + sc.linkage = funcdecl._linkage; if (!tf.isNaked() && !(funcdecl.isThis() || funcdecl.isNested())) { @@ -4407,7 +4399,10 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor invd.semanticRun < PASS.semantic && !ad.isUnionDeclaration() // users are on their own with union fields ) + { + invd.fixupInvariantIdent(ad.invs.length); ad.invs.push(invd); + } if (!invd.type) invd.type = new TypeFunction(ParameterList(), Type.tvoid, LINK.d, invd.storage_class); @@ -6816,7 +6811,12 @@ bool determineFields(AggregateDeclaration ad) return 1; if (v.aliassym) - return 0; // If this variable was really a tuple, skip it. + { + // If this variable was really a tuple, process each element. + if (auto tup = v.aliassym.isTupleDeclaration()) + return tup.foreachVar(tv => tv.apply(&func, ad)); + return 0; + } if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter)) return 0; diff --git a/gcc/d/dmd/dtemplate.d b/gcc/d/dmd/dtemplate.d index fb41e2bd05f5c..ed0126eeef6fb 100644 --- a/gcc/d/dmd/dtemplate.d +++ b/gcc/d/dmd/dtemplate.d @@ -2777,7 +2777,7 @@ void functionResolve(ref MatchAccumulator m, Dsymbol dstart, Loc loc, Scope* sc, fd.storage_class == m.lastf.storage_class && fd.parent == m.lastf.parent && fd.visibility == m.lastf.visibility && - fd.linkage == m.lastf.linkage) + fd._linkage == m.lastf._linkage) { if (fd.fbody && !m.lastf.fbody) goto LfIsBetter; diff --git a/gcc/d/dmd/dtoh.d b/gcc/d/dmd/dtoh.d index 41fb82b8266f7..ecc637eff5398 100644 --- a/gcc/d/dmd/dtoh.d +++ b/gcc/d/dmd/dtoh.d @@ -877,7 +877,11 @@ public: // Tuple field are expanded into multiple VarDeclarations // (we'll visit them later) if (vd.type && vd.type.isTypeTuple()) + { + assert(vd.aliassym); + vd.toAlias().accept(this); return; + } if (vd.originalType && vd.type == AST.Type.tsize_t) origType = vd.originalType; @@ -966,12 +970,13 @@ public: if (vd.storage_class & (AST.STC.static_ | AST.STC.extern_ | AST.STC.gshared) || vd.parent && vd.parent.isModule()) { - if (vd.linkage != LINK.c && vd.linkage != LINK.cpp && !(tdparent && (this.linkage == LINK.c || this.linkage == LINK.cpp))) + const vdLinkage = vd.resolvedLinkage(); + if (vdLinkage != LINK.c && vdLinkage != LINK.cpp && !(tdparent && (this.linkage == LINK.c || this.linkage == LINK.cpp))) { ignored("variable %s because of linkage", vd.toPrettyChars()); return; } - if (vd.mangleOverride && vd.linkage != LINK.c) + if (vd.mangleOverride && vdLinkage != LINK.c) { ignored("variable %s because C++ doesn't support explicit mangling", vd.toPrettyChars()); return; @@ -987,7 +992,7 @@ public: return; } writeProtection(vd.visibility.kind); - if (vd.linkage == LINK.c) + if (vdLinkage == LINK.c) buf.writestring("extern \"C\" "); else if (!adparent) buf.writestring("extern "); @@ -1666,6 +1671,13 @@ public: assert(false, "This node type should be handled in the EnumDeclaration"); } + override void visit(AST.TupleDeclaration tup) + { + debug (Debug_DtoH) mixin(traceVisit!tup); + + tup.foreachVar((s) { s.accept(this); }); + } + /** * Prints a member/parameter/variable declaration into `buf`. * @@ -2805,7 +2817,10 @@ public: // Check against the internal information which might be missing, e.g. inside of template declarations if (auto dec = sym.isDeclaration()) - return dec.linkage == LINK.cpp || dec.linkage == LINK.c; + { + const l = dec.resolvedLinkage(); + return l == LINK.cpp || l == LINK.c; + } if (auto ad = sym.isAggregateDeclaration()) return ad.classKind == ClassKind.cpp; @@ -2853,8 +2868,11 @@ public: if (!res) { // Check against the internal information which might be missing, e.g. inside of template declarations - auto dec = sym.isDeclaration(); - res = dec && (dec.linkage == LINK.cpp || dec.linkage == LINK.c); + if (auto dec = sym.isDeclaration()) + { + const l = dec.resolvedLinkage(); + res = (l == LINK.cpp || l == LINK.c); + } } // Remember result for later calls diff --git a/gcc/d/dmd/escape.d b/gcc/d/dmd/escape.d index 44c3757248bed..ab85f8706ec48 100644 --- a/gcc/d/dmd/escape.d +++ b/gcc/d/dmd/escape.d @@ -77,22 +77,7 @@ bool checkMutableArguments(Scope* sc, FuncDeclaration fd, TypeFunction tf, bool isMutable; // true if reference to mutable } - /* Store escapeBy as static data escapeByStorage so we can keep reusing the same - * arrays rather than reallocating them. - */ - __gshared EscapeBy[] escapeByStorage; - auto escapeBy = escapeByStorage; - if (escapeBy.length < len) - { - auto newPtr = cast(EscapeBy*)mem.xrealloc(escapeBy.ptr, len * EscapeBy.sizeof); - // Clear the new section - memset(newPtr + escapeBy.length, 0, (len - escapeBy.length) * EscapeBy.sizeof); - escapeBy = newPtr[0 .. len]; - escapeByStorage = escapeBy; - } - else - escapeBy = escapeBy[0 .. len]; - + auto escapeBy = new EscapeBy[len]; const paramLength = tf.parameterList.length; // Fill in escapeBy[] with arguments[], ethis, and outerVars[] @@ -212,13 +197,6 @@ bool checkMutableArguments(Scope* sc, FuncDeclaration fd, TypeFunction tf, escape(i, eb, false); } - /* Reset the arrays in escapeBy[] so we can reuse them next time through - */ - foreach (ref eb; escapeBy) - { - eb.er.reset(); - } - return errors; } @@ -2360,5 +2338,5 @@ private bool setUnsafeDIP1000(FuncDeclaration f) { return global.params.useDIP1000 == FeatureState.enabled ? f.setUnsafe() - : f.isSafeBypassingInference(); + : false; // reverted for 2.100, retry in 2.101 } diff --git a/gcc/d/dmd/expression.d b/gcc/d/dmd/expression.d index 107e85b07935d..832ab7dda3763 100644 --- a/gcc/d/dmd/expression.d +++ b/gcc/d/dmd/expression.d @@ -348,14 +348,16 @@ int expandAliasThisTuples(Expressions* exps, size_t starti = 0) if (TupleDeclaration td = exp.isAliasThisTuple) { exps.remove(u); - foreach (i, o; *td.objects) + size_t i; + td.foreachVar((s) { - auto d = o.isExpression().isDsymbolExp().s.isDeclaration(); + auto d = s.isDeclaration(); auto e = new DotVarExp(exp.loc, exp, d); assert(d.type); e.type = d.type; exps.insert(u + i, e); - } + ++i; + }); version (none) { printf("expansion ->\n"); diff --git a/gcc/d/dmd/expressionsem.d b/gcc/d/dmd/expressionsem.d index d4e96bb0f090e..0617b69ccc991 100644 --- a/gcc/d/dmd/expressionsem.d +++ b/gcc/d/dmd/expressionsem.d @@ -2048,7 +2048,8 @@ private bool functionParameters(const ref Loc loc, Scope* sc, if (global.params.useDIP1000 == FeatureState.enabled) err |= checkParamArgumentEscape(sc, fd, p, arg, false, false); } - else if (!(pStc & STC.return_)) + else if (!(pStc & STC.return_) && + ((global.params.useDIP1000 == FeatureState.enabled) || !(p.storageClass & STC.scopeinferred))) { /* Argument value cannot escape from the called function. */ @@ -2058,13 +2059,14 @@ private bool functionParameters(const ref Loc loc, Scope* sc, ArrayLiteralExp ale; if (p.type.toBasetype().ty == Tarray && - (ale = a.isArrayLiteralExp()) !is null) + (ale = a.isArrayLiteralExp()) !is null && ale.elements && ale.elements.length > 0) { // allocate the array literal as temporary static array on the stack - ale.type = ale.type.nextOf().sarrayOf(ale.elements ? ale.elements.length : 0); + ale.type = ale.type.nextOf().sarrayOf(ale.elements.length); auto tmp = copyToTemp(0, "__arrayliteral_on_stack", ale); auto declareTmp = new DeclarationExp(ale.loc, tmp); - auto castToSlice = new CastExp(ale.loc, new VarExp(ale.loc, tmp), p.type); + auto castToSlice = new CastExp(ale.loc, new VarExp(ale.loc, tmp), + p.type.substWildTo(MODFlags.mutable)); arg = CommaExp.combine(declareTmp, castToSlice); arg = arg.expressionSemantic(sc); } @@ -6625,6 +6627,14 @@ private extern (C++) final class ExpressionSemanticVisitor : Visitor exp.type = exp.type.addMod(t1.mod); + // https://issues.dlang.org/show_bug.cgi?id=23109 + // Run semantic on the DotVarExp type + if (auto handle = exp.type.isClassHandle()) + { + if (handle.semanticRun < PASS.semanticdone && !handle.isBaseInfoComplete()) + handle.dsymbolSemantic(null); + } + Dsymbol vparent = exp.var.toParent(); AggregateDeclaration ad = vparent ? vparent.isAggregateDeclaration() : null; if (Expression e1x = getRightThis(exp.loc, sc, ad, exp.e1, exp.var, 1)) @@ -8675,7 +8685,9 @@ private extern (C++) final class ExpressionSemanticVisitor : Visitor { static if (LOGSEMANTIC) { - printf("AssignExp::semantic('%s')\n", exp.toChars()); + if (exp.op == EXP.blit) printf("BlitExp.toElem('%s')\n", exp.toChars()); + if (exp.op == EXP.assign) printf("AssignExp.toElem('%s')\n", exp.toChars()); + if (exp.op == EXP.construct) printf("ConstructExp.toElem('%s')\n", exp.toChars()); } //printf("exp.e1.op = %d, '%s'\n", exp.e1.op, EXPtoString(exp.e1.op).ptr); //printf("exp.e2.op = %d, '%s'\n", exp.e2.op, EXPtoString(exp.e2.op).ptr); @@ -9425,6 +9437,23 @@ private extern (C++) final class ExpressionSemanticVisitor : Visitor Expression e1x = exp.e1; Expression e2x = exp.e2; + /* C strings come through as static arrays. May need to adjust the size of the + * string to match the size of e1. + */ + Type t2 = e2x.type.toBasetype(); + if (sc.flags & SCOPE.Cfile && e2x.isStringExp() && t2.isTypeSArray()) + { + uinteger_t dim1 = t1.isTypeSArray().dim.toInteger(); + uinteger_t dim2 = t2.isTypeSArray().dim.toInteger(); + if (dim1 + 1 == dim2 || dim2 < dim1) + { + auto tsa2 = t2.isTypeSArray(); + auto newt = tsa2.next.sarrayOf(dim1).immutableOf(); + e2x = castTo(e2x, sc, newt); + exp.e2 = e2x; + } + } + if (e2x.implicitConvTo(e1x.type)) { if (exp.op != EXP.blit && (e2x.op == EXP.slice && (cast(UnaExp)e2x).e1.isLvalue() || e2x.op == EXP.cast_ && (cast(UnaExp)e2x).e1.isLvalue() || e2x.op != EXP.slice && e2x.isLvalue())) @@ -9686,13 +9715,14 @@ private extern (C++) final class ExpressionSemanticVisitor : Visitor tsa2 = cast(TypeSArray)toStaticArrayType(se); else tsa2 = t2.isTypeSArray(); + if (tsa1 && tsa2) { uinteger_t dim1 = tsa1.dim.toInteger(); uinteger_t dim2 = tsa2.dim.toInteger(); if (dim1 != dim2) { - exp.error("mismatched array lengths, %d and %d", cast(int)dim1, cast(int)dim2); + exp.error("mismatched array lengths %d and %d for assignment `%s`", cast(int)dim1, cast(int)dim2, exp.toChars()); return setError(); } } @@ -9897,9 +9927,11 @@ private extern (C++) final class ExpressionSemanticVisitor : Visitor ae.e2.type.nextOf && ae.e1.type.nextOf.mutableOf.equals(ae.e2.type.nextOf.mutableOf); + /* Unlike isArrayCtor above, lower all Rvalues. If the RHS is a literal, + * then we do want to make a temporary for it and call its destructor. + */ const isArraySetCtor = (ae.e1.isSliceExp || ae.e1.type.ty == Tsarray) && - ae.e2.isLvalue && (ae.e2.type.ty == Tstruct || ae.e2.type.ty == Tsarray) && ae.e1.type.nextOf && ae.e1.type.nextOf.equivalent(ae.e2.type); @@ -12506,7 +12538,7 @@ Expression semanticY(DotIdExp exp, Scope* sc, int flag) e = new CommaExp(exp.loc, eleft, e); e.type = Type.tvoid; // ambiguous type? } - return e; + return e.expressionSemantic(sc); } if (auto o = s.isOverloadSet()) { diff --git a/gcc/d/dmd/foreachvar.d b/gcc/d/dmd/foreachvar.d index 53ed62efd70d2..63281b5760cbd 100644 --- a/gcc/d/dmd/foreachvar.d +++ b/gcc/d/dmd/foreachvar.d @@ -75,19 +75,7 @@ void foreachVar(Expression e, void delegate(VarDeclaration) dgVar) if (!v) return; if (TupleDeclaration td = v.toAlias().isTupleDeclaration()) - { - if (!td.objects) - return; - foreach (o; *td.objects) - { - Expression ex = isExpression(o); - DsymbolExp s = ex ? ex.isDsymbolExp() : null; - assert(s); - VarDeclaration v2 = s.s.isVarDeclaration(); - assert(v2); - dgVar(v2); - } - } + td.foreachVar((s) { dgVar(s.isVarDeclaration()); }); else dgVar(v); Dsymbol s = v.toAlias(); diff --git a/gcc/d/dmd/func.d b/gcc/d/dmd/func.d index 8d8395188b63d..aba5d62827a46 100644 --- a/gcc/d/dmd/func.d +++ b/gcc/d/dmd/func.d @@ -1207,12 +1207,12 @@ extern (C++) class FuncDeclaration : Declaration final bool isMain() const { - return ident == Id.main && linkage != LINK.c && !isMember() && !isNested(); + return ident == Id.main && resolvedLinkage() != LINK.c && !isMember() && !isNested(); } final bool isCMain() const { - return ident == Id.main && linkage == LINK.c && !isMember() && !isNested(); + return ident == Id.main && resolvedLinkage() == LINK.c && !isMember() && !isNested(); } final bool isWinMain() const @@ -1220,24 +1220,24 @@ extern (C++) class FuncDeclaration : Declaration //printf("FuncDeclaration::isWinMain() %s\n", toChars()); version (none) { - bool x = ident == Id.WinMain && linkage != LINK.c && !isMember(); + bool x = ident == Id.WinMain && resolvedLinkage() != LINK.c && !isMember(); printf("%s\n", x ? "yes" : "no"); return x; } else { - return ident == Id.WinMain && linkage != LINK.c && !isMember(); + return ident == Id.WinMain && resolvedLinkage() != LINK.c && !isMember(); } } final bool isDllMain() const { - return ident == Id.DllMain && linkage != LINK.c && !isMember(); + return ident == Id.DllMain && resolvedLinkage() != LINK.c && !isMember(); } final bool isRtInit() const { - return ident == Id.rt_init && linkage == LINK.c && !isMember() && !isNested(); + return ident == Id.rt_init && resolvedLinkage() == LINK.c && !isMember() && !isNested(); } override final bool isExport() const @@ -1474,6 +1474,12 @@ extern (C++) class FuncDeclaration : Declaration return !!(this.flags & FUNCFLAG.naked); } + final void isNaked(bool v) @safe pure nothrow @nogc + { + if (v) this.flags |= FUNCFLAG.naked; + else this.flags &= ~FUNCFLAG.naked; + } + final bool isGenerated() const scope @safe pure nothrow @nogc { return !!(this.flags & FUNCFLAG.generated); @@ -1520,11 +1526,23 @@ extern (C++) class FuncDeclaration : Declaration return !!(this.flags & FUNCFLAG.CRTCtor); } + final void isCrtCtor(bool v) @safe pure nothrow @nogc + { + if (v) this.flags |= FUNCFLAG.CRTCtor; + else this.flags &= ~FUNCFLAG.CRTCtor; + } + final bool isCrtDtor() const scope @safe pure nothrow @nogc { return !!(this.flags & FUNCFLAG.CRTDtor); } + final void isCrtDtor(bool v) @safe pure nothrow @nogc + { + if (v) this.flags |= FUNCFLAG.CRTDtor; + else this.flags &= ~FUNCFLAG.CRTDtor; + } + /************************************** * The function is doing something that may allocate with the GC, * so mark it as not nogc (not no-how). @@ -1758,7 +1776,7 @@ extern (C++) class FuncDeclaration : Declaration auto f = toAliasFunc(); //printf("\ttoParent2() = '%s'\n", f.toParent2().toChars()); return ((f.storage_class & STC.static_) == 0) && - (f.linkage == LINK.d) && + (f._linkage == LINK.d) && (f.toParent2().isFuncDeclaration() !is null || f.toParent2() !is f.toParentLocal()); } @@ -2645,7 +2663,7 @@ extern (C++) class FuncDeclaration : Declaration tf = new TypeFunction(ParameterList(fparams), treturn, LINK.c, stc); fd = new FuncDeclaration(Loc.initial, Loc.initial, id, STC.static_, tf); fd.visibility = Visibility(Visibility.Kind.public_); - fd.linkage = LINK.c; + fd._linkage = LINK.c; st.insert(fd); } @@ -2705,6 +2723,7 @@ extern (C++) class FuncDeclaration : Declaration const nparams = tf.parameterList.length; bool argerr; + const linkage = resolvedLinkage(); if (linkage == LINK.d) { if (nparams == 1) @@ -3729,9 +3748,7 @@ extern (C++) final class FuncLiteralDeclaration : FuncDeclaration { Expression exp = s.exp; if (exp && !exp.type.equals(tret)) - { - s.exp = exp.castTo(sc, tret); - } + s.exp = exp.implicitCastTo(sc, tret); } } @@ -4131,6 +4148,7 @@ extern (C++) final class InvariantDeclaration : FuncDeclaration { extern (D) this(const ref Loc loc, const ref Loc endloc, StorageClass stc, Identifier id, Statement fbody) { + // Make a unique invariant for now; we'll fix it up as we add it to the aggregate invariant list. super(loc, endloc, id ? id : Identifier.generateId("__invariant"), stc, null); this.fbody = fbody; } @@ -4167,6 +4185,15 @@ extern (C++) final class InvariantDeclaration : FuncDeclaration { v.visit(this); } + + extern (D) void fixupInvariantIdent(size_t offset) + { + OutBuffer idBuf; + idBuf.writestring("__invariant"); + idBuf.print(offset); + + ident = Identifier.idPool(idBuf[]); + } } diff --git a/gcc/d/dmd/impcnvtab.d b/gcc/d/dmd/impcnvtab.d index ab46f5eebbdaa..832c331c31411 100644 --- a/gcc/d/dmd/impcnvtab.d +++ b/gcc/d/dmd/impcnvtab.d @@ -64,6 +64,57 @@ enum ImpCnvTab impCnvTab = generateImpCnvTab(); ImpCnvTab generateImpCnvTab() { + TY[TMAX] typeTYs = + [ + Tarray, + Tsarray, + Taarray, + Tpointer, + Treference, + Tfunction, + Tident, + Tclass, + Tstruct, + Tenum, + Tdelegate, + Tnone, + Tvoid, + Tint8, + Tuns8, + Tint16, + Tuns16, + Tint32, + Tuns32, + Tint64, + Tuns64, + Tfloat32, + Tfloat64, + Tfloat80, + Timaginary32, + Timaginary64, + Timaginary80, + Tcomplex32, + Tcomplex64, + Tcomplex80, + Tbool, + Tchar, + Twchar, + Tdchar, + Terror, + Tinstance, + Ttypeof, + Ttuple, + Tslice, + Treturn, + Tnull, + Tvector, + Tint128, + Tuns128, + Ttraits, + Tmixin, + Tnoreturn, + Ttag, + ]; ImpCnvTab impCnvTab; // Set conversion tables @@ -375,5 +426,9 @@ ImpCnvTab generateImpCnvTab() X(Tcomplex80,Tcomplex80, Tcomplex80,Tcomplex80, Tcomplex80); + // "No type is implicitly convertible to noreturn, but noreturn is implicitly convertible to every other type" + foreach(convertToTy; typeTYs) + X(Tnoreturn, convertToTy, convertToTy, convertToTy, convertToTy); + return impCnvTab; } diff --git a/gcc/d/dmd/initsem.d b/gcc/d/dmd/initsem.d index c84a9f69ffa46..16e7c3a593602 100644 --- a/gcc/d/dmd/initsem.d +++ b/gcc/d/dmd/initsem.d @@ -502,6 +502,18 @@ extern(C++) Initializer initializerSemantic(Initializer init, Scope* sc, ref Typ i.exp = se.castTo(sc, t); goto L1; } + + /* Lop off terminating 0 of initializer for: + * static char s[5] = "hello"; + */ + if (sc.flags & SCOPE.Cfile && + typeb.ty == Tsarray && + tynto.isSomeChar && + tb.isTypeSArray().dim.toInteger() + 1 == typeb.isTypeSArray().dim.toInteger()) + { + i.exp = se.castTo(sc, t); + goto L1; + } } /* C11 6.7.9-14..15 * Initialize an array of unknown size with a string. diff --git a/gcc/d/dmd/json.d b/gcc/d/dmd/json.d index fc270390fa4ac..b7ffa19d6ff79 100644 --- a/gcc/d/dmd/json.d +++ b/gcc/d/dmd/json.d @@ -446,7 +446,7 @@ public: return; jsonProperties(cast(Dsymbol)d); propertyStorageClass("storageClass", d.storage_class); - property("linkage", d.linkage); + property("linkage", d._linkage); property("type", "deco", d.type); // Emit originalType if it differs from type if (d.type != d.originalType && d.originalType) diff --git a/gcc/d/dmd/mtype.d b/gcc/d/dmd/mtype.d index 13df0d71f3f9c..1260853487923 100644 --- a/gcc/d/dmd/mtype.d +++ b/gcc/d/dmd/mtype.d @@ -4764,12 +4764,31 @@ extern (C++) final class TypeFunction : TypeNext s ~= "@safe "; if (!f.isNogc && sc.func.setGC()) s ~= "nogc "; - s[$-1] = '\0'; - buf.printf("`%s` copy constructor cannot be called from a `%s` context", f.type.toChars(), s.ptr); - + if (s) + { + s[$-1] = '\0'; + buf.printf("`%s` copy constructor cannot be called from a `%s` context", f.type.toChars(), s.ptr); + } + else if (f.isGenerated() && f.isDisabled()) + { + /* https://issues.dlang.org/show_bug.cgi?id=23097 + * Compiler generated copy constructor failed. + */ + buf.printf("generating a copy constructor for `struct %s` failed, therefore instances of it are uncopyable", + argStruct.toChars()); + } + else + { + /* Although a copy constructor may exist, no suitable match was found. + * i.e: `inout` constructor creates `const` object, not mutable. + * Fallback to using the original generic error before bugzilla 22202. + */ + goto Lnocpctor; + } } else { + Lnocpctor: buf.printf("`struct %s` does not define a copy constructor for `%s` to `%s` copies", argStruct.toChars(), targ.toChars(), tprm.toChars()); } @@ -6165,6 +6184,11 @@ extern (C++) final class TypeClass : Type if (t && t.ty == Tclass) { ClassDeclaration cd = (cast(TypeClass)t).sym; + if (cd.semanticRun < PASS.semanticdone && !cd.isBaseInfoComplete()) + cd.dsymbolSemantic(null); + if (sym.semanticRun < PASS.semanticdone && !sym.isBaseInfoComplete()) + sym.dsymbolSemantic(null); + if (sym.isBaseOf(cd, poffset)) return true; } diff --git a/gcc/d/dmd/ob.d b/gcc/d/dmd/ob.d index 121a266b4283e..5ff73c983f098 100644 --- a/gcc/d/dmd/ob.d +++ b/gcc/d/dmd/ob.d @@ -1407,16 +1407,7 @@ void genKill(ref ObState obstate, ObNode* ob) } else if (auto td = s.isTupleDeclaration()) { - foreach (o; *td.objects) - { - if (auto eo = o.isExpression()) - { - if (auto se = eo.isDsymbolExp()) - { - Dsymbol_visit(se.s); - } - } - } + td.foreachVar(&Dsymbol_visit); } } @@ -2107,16 +2098,7 @@ void checkObErrors(ref ObState obstate) } else if (auto td = s.isTupleDeclaration()) { - foreach (o; *td.objects) - { - if (auto eo = o.isExpression()) - { - if (auto se = eo.isDsymbolExp()) - { - Dsymbol_visit(se.s); - } - } - } + td.foreachVar(&Dsymbol_visit); } } diff --git a/gcc/d/dmd/objc.d b/gcc/d/dmd/objc.d index 9e92212ada1bb..9afedc1c27bff 100644 --- a/gcc/d/dmd/objc.d +++ b/gcc/d/dmd/objc.d @@ -578,7 +578,7 @@ extern(C++) private final class Supported : Objc override void checkLinkage(FuncDeclaration fd) { - if (fd.linkage != LINK.objc && fd.objc.selector) + if (fd._linkage != LINK.objc && fd.objc.selector) fd.error("must have Objective-C linkage to attach a selector"); } @@ -640,11 +640,11 @@ extern(C++) private final class Supported : Objc if (!fd.objc.isOptional) return; - if (fd.linkage != LINK.objc) + if (fd._linkage != LINK.objc) { fd.error("only functions with Objective-C linkage can be declared as optional"); - const linkage = linkageToString(fd.linkage); + const linkage = linkageToString(fd._linkage); errorSupplemental(fd.loc, "function is declared with %.*s linkage", cast(uint) linkage.length, linkage.ptr); diff --git a/gcc/d/dmd/semantic2.d b/gcc/d/dmd/semantic2.d index cd65920e38b66..bf18a2140fb18 100644 --- a/gcc/d/dmd/semantic2.d +++ b/gcc/d/dmd/semantic2.d @@ -238,7 +238,7 @@ private extern(C++) final class Semantic2Visitor : Visitor return; } - UserAttributeDeclaration.checkGNUABITag(vd, vd.linkage); + UserAttributeDeclaration.checkGNUABITag(vd, vd._linkage); if (vd._init && !vd.toParent().isFuncDeclaration()) { @@ -379,6 +379,7 @@ private extern(C++) final class Semantic2Visitor : Visitor alias f1 = fd; auto tf1 = cast(TypeFunction) f1.type; auto parent1 = f1.toParent2(); + const linkage1 = f1.resolvedLinkage(); overloadApply(f1, (Dsymbol s) { @@ -391,7 +392,7 @@ private extern(C++) final class Semantic2Visitor : Visitor return 0; // Functions with different manglings can never conflict - if (f1.linkage != f2.linkage) + if (linkage1 != f2.resolvedLinkage()) return 0; // Functions with different names never conflict @@ -428,12 +429,12 @@ private extern(C++) final class Semantic2Visitor : Visitor // @@@DEPRECATED_2.104@@@ // Deprecated in 2020-08, make this an error in 2.104 if (parent1.isModule() && - f1.linkage != LINK.d && f1.linkage != LINK.cpp && + linkage1 != LINK.d && linkage1 != LINK.cpp && (!sameAttr || !sameParams) ) { f2.deprecation("cannot overload `extern(%s)` function at %s", - linkageToChars(f1.linkage), + linkageToChars(f1._linkage), f1.loc.toChars()); return 0; } @@ -443,7 +444,7 @@ private extern(C++) final class Semantic2Visitor : Visitor return 0; // Different attributes don't conflict in extern(D) - if (!sameAttr && f1.linkage == LINK.d) + if (!sameAttr && linkage1 == LINK.d) return 0; error(f2.loc, "%s `%s%s` conflicts with previous declaration at %s", @@ -460,7 +461,7 @@ private extern(C++) final class Semantic2Visitor : Visitor return; TypeFunction f = cast(TypeFunction) fd.type; - UserAttributeDeclaration.checkGNUABITag(fd, fd.linkage); + UserAttributeDeclaration.checkGNUABITag(fd, fd._linkage); //semantic for parameters' UDAs foreach (i, param; f.parameterList) { @@ -643,7 +644,7 @@ private extern(C++) final class Semantic2Visitor : Visitor { //printf(" found\n"); // Check that calling conventions match - if (fd.linkage != ifd.linkage) + if (fd._linkage != ifd._linkage) fd.error("linkage doesn't match interface function"); // Check that it is current @@ -676,6 +677,11 @@ private extern(C++) final class Semantic2Visitor : Visitor { visit(cast(AggregateDeclaration) cd); } + + override void visit(TupleDeclaration td) + { + td.foreachVar((s) { s.accept(this); }); + } } /** diff --git a/gcc/d/dmd/semantic3.d b/gcc/d/dmd/semantic3.d index 511957649f7fe..41f8d525929c0 100644 --- a/gcc/d/dmd/semantic3.d +++ b/gcc/d/dmd/semantic3.d @@ -327,7 +327,7 @@ private extern(C++) final class Semantic3Visitor : Visitor sc2.scontinue = null; sc2.sw = null; sc2.fes = funcdecl.fes; - sc2.linkage = LINK.d; + sc2.linkage = funcdecl.isCsymbol() ? LINK.c : LINK.d; sc2.stc &= STC.flowThruFunction; sc2.visibility = Visibility(Visibility.Kind.public_); sc2.explicitVisibility = 0; @@ -1353,7 +1353,7 @@ private extern(C++) final class Semantic3Visitor : Visitor if (funcdecl.isCtorDeclaration()) // https://issues.dlang.org/show_bug.cgi?id=#15665 f.isctor = true; sc.stc = 0; - sc.linkage = funcdecl.linkage; // https://issues.dlang.org/show_bug.cgi?id=8496 + sc.linkage = funcdecl._linkage; // https://issues.dlang.org/show_bug.cgi?id=8496 funcdecl.type = f.typeSemantic(funcdecl.loc, sc); sc = sc.pop(); } diff --git a/gcc/d/dmd/statementsem.d b/gcc/d/dmd/statementsem.d index 2916bbc38dd79..c1c2dc92e127c 100644 --- a/gcc/d/dmd/statementsem.d +++ b/gcc/d/dmd/statementsem.d @@ -2829,10 +2829,20 @@ package (dmd) extern (C++) final class StatementSemanticVisitor : Visitor rs.error("`return` statements cannot be in contracts"); errors = true; } - if (sc.os && sc.os.tok != TOK.onScopeFailure) + if (sc.os) { - rs.error("`return` statements cannot be in `%s` bodies", Token.toChars(sc.os.tok)); - errors = true; + // @@@DEPRECATED_2.112@@@ + // Deprecated in 2.100, transform into an error in 2.112 + if (sc.os.tok == TOK.onScopeFailure) + { + rs.deprecation("`return` statements cannot be in `scope(failure)` bodies."); + deprecationSupplemental(rs.loc, "Use try-catch blocks for this purpose"); + } + else + { + rs.error("`return` statements cannot be in `%s` bodies", Token.toChars(sc.os.tok)); + errors = true; + } } if (sc.tf) { diff --git a/gcc/d/dmd/traits.d b/gcc/d/dmd/traits.d index 04e1c47d16e94..9db0012dd01c3 100644 --- a/gcc/d/dmd/traits.d +++ b/gcc/d/dmd/traits.d @@ -1381,7 +1381,7 @@ Expression semanticTraits(TraitsExp e, Scope* sc) e.error("argument to `__traits(getFunctionVariadicStyle, %s)` is not a function", o.toChars()); return ErrorExp.get(); } - link = fd.linkage; + link = fd._linkage; varargs = fd.getParameterList().varargs; } string style; @@ -1515,7 +1515,7 @@ Expression semanticTraits(TraitsExp e, Scope* sc) if (tf) { - link = fd ? fd.linkage : tf.linkage; + link = fd ? fd.toAliasFunc()._linkage : tf.linkage; } else { @@ -1529,7 +1529,7 @@ Expression semanticTraits(TraitsExp e, Scope* sc) } if (d !is null) - link = d.linkage; + link = d._linkage; else { // Resolves forward references diff --git a/gcc/d/dmd/typesem.d b/gcc/d/dmd/typesem.d index f63b17752edd9..5db7d43371ea3 100644 --- a/gcc/d/dmd/typesem.d +++ b/gcc/d/dmd/typesem.d @@ -3637,12 +3637,16 @@ Expression dotExp(Type mt, Scope* sc, Expression e, Identifier ident, int flag) } else { + Expression e0; + Expression ev = e; + ev = extractSideEffect(sc, "__tup", e0, ev); + const length = cast(size_t)mt.dim.toUInteger(); auto exps = new Expressions(); exps.reserve(length); foreach (i; 0 .. length) - exps.push(new IndexExp(e.loc, e, new IntegerExp(e.loc, i, Type.tsize_t))); - e = new TupleExp(e.loc, exps); + exps.push(new IndexExp(e.loc, ev, new IntegerExp(e.loc, i, Type.tsize_t))); + e = new TupleExp(e.loc, e0, exps); } } else diff --git a/gcc/d/expr.cc b/gcc/d/expr.cc index c683d9da333da..7afd98975b156 100644 --- a/gcc/d/expr.cc +++ b/gcc/d/expr.cc @@ -427,7 +427,7 @@ class ExprVisitor : public Visitor tree result = build_libcall (LIBCALL_ADEQ2, e->type, 3, d_array_convert (e->e1), d_array_convert (e->e2), - build_typeinfo (e->loc, t1array)); + build_typeinfo (e, t1array)); if (e->op == EXP::notEqual) result = build1 (TRUTH_NOT_EXPR, build_ctype (e->type), result); @@ -450,7 +450,7 @@ class ExprVisitor : public Visitor { /* Use _aaEqual() for associative arrays. */ tree result = build_libcall (LIBCALL_AAEQUAL, e->type, 3, - build_typeinfo (e->loc, tb1), + build_typeinfo (e, tb1), build_expr (e->e1), build_expr (e->e2)); @@ -484,7 +484,7 @@ class ExprVisitor : public Visitor /* Build a call to _aaInX(). */ this->result_ = build_libcall (LIBCALL_AAINX, e->type, 3, build_expr (e->e2), - build_typeinfo (e->loc, tkey), + build_typeinfo (e, tkey), build_address (key)); } @@ -728,13 +728,13 @@ class ExprVisitor : public Visitor size_int (ndims), build_address (var)); result = build_libcall (LIBCALL_ARRAYCATNTX, e->type, 2, - build_typeinfo (e->loc, e->type), arrs); + build_typeinfo (e, e->type), arrs); } else { /* Handle single concatenation (a ~ b). */ result = build_libcall (LIBCALL_ARRAYCATT, e->type, 3, - build_typeinfo (e->loc, e->type), + build_typeinfo (e, e->type), d_array_convert (etype, e->e1), d_array_convert (etype, e->e2)); } @@ -916,6 +916,17 @@ class ExprVisitor : public Visitor gcc_unreachable (); } + /* Look for exp = noreturn; */ + if (e->e2->type->isTypeNoreturn ()) + { + /* If the RHS is a `noreturn' expression, there is no point generating + any code for the assignment, just evaluate side effects. */ + tree t1 = build_expr (e->e1); + tree t2 = build_expr (e->e2); + this->result_ = compound_expr (t1, t2); + return; + } + /* Look for array[] = n; */ if (e->e1->op == EXP::slice) { @@ -946,7 +957,7 @@ class ExprVisitor : public Visitor /* So we can call postblits on const/immutable objects. */ Type *tm = etype->unSharedOf ()->mutableOf (); - tree ti = build_typeinfo (e->loc, tm); + tree ti = build_typeinfo (e, tm); /* Generate: _d_arraysetassign (t1.ptr, &t2, t1.length, ti); */ result = build_libcall (LIBCALL_ARRAYSETASSIGN, Type::tvoid, 4, @@ -1020,7 +1031,7 @@ class ExprVisitor : public Visitor { /* Generate: _d_arrayassign(ti, from, to); */ this->result_ = build_libcall (LIBCALL_ARRAYASSIGN, e->type, 3, - build_typeinfo (e->loc, etype), + build_typeinfo (e, etype), d_array_convert (e->e2), d_array_convert (e->e1)); } @@ -1046,8 +1057,7 @@ class ExprVisitor : public Visitor Declaration *decl = e->e1->isVarExp ()->var; if (decl->storage_class & (STCout | STCref)) { - tree t2 = convert_for_assignment (build_expr (e->e2), - e->e2->type, e->e1->type); + tree t2 = convert_for_assignment (e->e2, e->e1->type); tree t1 = build_expr (e->e1); /* Want reference to lhs, not indirect ref. */ t1 = TREE_OPERAND (t1, 0); @@ -1067,8 +1077,7 @@ class ExprVisitor : public Visitor if (tb1->ty == TY::Tstruct) { tree t1 = build_expr (e->e1); - tree t2 = convert_for_assignment (build_expr (e->e2, false, true), - e->e2->type, e->e1->type); + tree t2 = convert_for_assignment (e->e2, e->e1->type, true); StructDeclaration *sd = tb1->isTypeStruct ()->sym; /* Look for struct = 0. */ @@ -1146,8 +1155,7 @@ class ExprVisitor : public Visitor || (e->op == EXP::blit || e->e1->type->size () == 0)) { tree t1 = build_expr (e->e1); - tree t2 = convert_for_assignment (build_expr (e->e2), - e->e2->type, e->e1->type); + tree t2 = convert_for_assignment (e->e2, e->e1->type); this->result_ = build_assign (modifycode, t1, t2); return; @@ -1165,7 +1173,7 @@ class ExprVisitor : public Visitor Type *arrtype = (e->type->ty == TY::Tsarray) ? etype->arrayOf () : e->type; tree result = build_libcall (libcall, arrtype, 4, - build_typeinfo (e->loc, etype), + build_typeinfo (e, etype), d_array_convert (e->e2), d_array_convert (e->e1), build_address (elembuf)); @@ -1181,8 +1189,7 @@ class ExprVisitor : public Visitor /* Simple assignment. */ tree t1 = build_expr (e->e1); - tree t2 = convert_for_assignment (build_expr (e->e2), - e->e2->type, e->e1->type); + tree t2 = convert_for_assignment (e->e2, e->e1->type); this->result_ = build_assign (modifycode, t1, t2); } @@ -1236,13 +1243,13 @@ class ExprVisitor : public Visitor { libcall = LIBCALL_AAGETY; ptr = build_address (build_expr (e->e1)); - tinfo = build_typeinfo (e->loc, tb1->unSharedOf ()->mutableOf ()); + tinfo = build_typeinfo (e, tb1->unSharedOf ()->mutableOf ()); } else { libcall = LIBCALL_AAGETRVALUEX; ptr = build_expr (e->e1); - tinfo = build_typeinfo (e->loc, tkey); + tinfo = build_typeinfo (e, tkey); } /* Index the associative array. */ @@ -1470,7 +1477,7 @@ class ExprVisitor : public Visitor this->result_ = build_libcall (LIBCALL_AADELX, Type::tbool, 3, build_expr (e->e1), - build_typeinfo (e->loc, tkey), + build_typeinfo (e, tkey), build_address (index)); } else @@ -1900,7 +1907,7 @@ class ExprVisitor : public Visitor underlying is really a complex type. */ if (e->e1->type->ty == TY::Tenum && e->e1->type->isTypeEnum ()->sym->isSpecial ()) - object = build_vconvert (build_ctype (tb), object); + object = underlying_complex_expr (build_ctype (tb), object); this->result_ = component_ref (object, get_symbol_decl (vd)); } @@ -2024,7 +2031,7 @@ class ExprVisitor : public Visitor { if (Type *tid = isType (e->obj)) { - tree ti = build_typeinfo (e->loc, tid); + tree ti = build_typeinfo (e, tid); /* If the typeinfo is at an offset. */ if (tid->vtinfo->offset) @@ -2358,7 +2365,7 @@ class ExprVisitor : public Visitor /* Generate: _d_newitemT() */ libcall_fn libcall = htype->isZeroInit () ? LIBCALL_NEWITEMT : LIBCALL_NEWITEMIT; - tree arg = build_typeinfo (e->loc, e->newtype); + tree arg = build_typeinfo (e, e->newtype); new_call = build_libcall (libcall, tb, 1, arg); if (e->member || !e->arguments) @@ -2426,7 +2433,7 @@ class ExprVisitor : public Visitor libcall_fn libcall = tarray->next->isZeroInit () ? LIBCALL_NEWARRAYT : LIBCALL_NEWARRAYIT; result = build_libcall (libcall, tb, 2, - build_typeinfo (e->loc, e->type), + build_typeinfo (e, e->type), build_expr (arg)); } else @@ -2458,7 +2465,7 @@ class ExprVisitor : public Visitor libcall_fn libcall = telem->isZeroInit () ? LIBCALL_NEWARRAYMTX : LIBCALL_NEWARRAYMITX; - tree tinfo = build_typeinfo (e->loc, e->type); + tree tinfo = build_typeinfo (e, e->type); tree dims = d_array_value (build_ctype (Type::tsize_t->arrayOf ()), size_int (e->arguments->length), build_address (var)); @@ -2485,7 +2492,7 @@ class ExprVisitor : public Visitor libcall_fn libcall = tpointer->next->isZeroInit (e->loc) ? LIBCALL_NEWITEMT : LIBCALL_NEWITEMIT; - tree arg = build_typeinfo (e->loc, e->newtype); + tree arg = build_typeinfo (e, e->newtype); result = build_libcall (libcall, tb, 1, arg); if (e->arguments && e->arguments->length == 1) @@ -2697,6 +2704,10 @@ class ExprVisitor : public Visitor if (tb->ty == TY::Tarray) ctor = d_array_value (type, size_int (e->elements->length), ctor); + /* Immutable literals can be placed in rodata. */ + if (tb->isImmutable ()) + TREE_READONLY (decl) = 1; + d_pushdecl (decl); rest_of_decl_compilation (decl, 1, 0); } @@ -2730,7 +2741,7 @@ class ExprVisitor : public Visitor /* Allocate space on the memory managed heap. */ tree mem = build_libcall (LIBCALL_ARRAYLITERALTX, etype->pointerTo (), 2, - build_typeinfo (e->loc, etype->arrayOf ()), + build_typeinfo (e, etype->arrayOf ()), size_int (e->elements->length)); mem = d_save_expr (mem); @@ -2787,7 +2798,7 @@ class ExprVisitor : public Visitor build_address (avals)); tree mem = build_libcall (LIBCALL_ASSOCARRAYLITERALTX, Type::tvoidptr, 3, - build_typeinfo (e->loc, ta), keys, vals); + build_typeinfo (e, ta), keys, vals); /* Return an associative array pointed to by MEM. */ tree aatype = build_ctype (ta); @@ -2932,14 +2943,13 @@ class ExprVisitor : public Visitor void visit (VectorExp *e) { - tree type = build_ctype (e->type); - /* First handle array literal expressions. */ if (e->e1->op == EXP::arrayLiteral) { ArrayLiteralExp *ale = e->e1->isArrayLiteralExp (); vec *elms = NULL; bool constant_p = true; + tree type = build_ctype (e->type); vec_safe_reserve (elms, ale->elements->length); for (size_t i = 0; i < ale->elements->length; i++) @@ -2959,9 +2969,16 @@ class ExprVisitor : public Visitor else this->result_ = build_constructor (type, elms); } + else if (e->e1->type->toBasetype ()->ty == TY::Tsarray) + { + /* Build a vector representation from a static array. */ + this->result_ = convert_expr (build_expr (e->e1, this->constp_), + e->e1->type, e->type); + } else { /* Build constructor from single value. */ + tree type = build_ctype (e->type); tree value = d_convert (TREE_TYPE (type), build_expr (e->e1, this->constp_, true)); this->result_ = build_vector_from_val (type, value); diff --git a/gcc/d/gdc.texi b/gcc/d/gdc.texi index 2be3154bf8653..2bff627d86345 100644 --- a/gcc/d/gdc.texi +++ b/gcc/d/gdc.texi @@ -326,14 +326,17 @@ values are supported: @item all Turns on all upcoming D language features. @item dip1000 -Implements @uref{https://wiki.dlang.org/DIP1000} (Scoped pointers). +Implements @uref{https://github.com/dlang/DIPs/blob/master/DIPs/other/DIP1000.md} +(Scoped pointers). @item dip1008 -Implements @uref{https://wiki.dlang.org/DIP1008} (Allow exceptions in -@code{@@nogc} code). +Implements @uref{https://github.com/dlang/DIPs/blob/master/DIPs/other/DIP1008.md} +(Allow exceptions in @code{@@nogc} code). @item dip1021 -Implements @uref{https://wiki.dlang.org/DIP1021} (Mutable function arguments). +Implements @uref{https://github.com/dlang/DIPs/blob/master/DIPs/accepted/DIP1021.md} +(Mutable function arguments). @item dip25 -Implements @uref{https://wiki.dlang.org/DIP25} (Sealed references). +Implements @uref{https://github.com/dlang/DIPs/blob/master/DIPs/archive/DIP25.md} +(Sealed references). @item dtorfields Turns on generation for destructing fields of partially constructed objects. @item fieldwise @@ -383,7 +386,8 @@ are supported: @item all Turns off all revertable D language features. @item dip25 -Reverts @uref{https://wiki.dlang.org/DIP25} (Sealed references). +Reverts @uref{https://github.com/dlang/DIPs/blob/master/DIPs/archive/DIP25.md} +(Sealed references). @item dtorfields Turns off generation for destructing fields of partially constructed objects. @item markdown diff --git a/gcc/d/imports.cc b/gcc/d/imports.cc index 6747ee5df27a4..c8447b9674c51 100644 --- a/gcc/d/imports.cc +++ b/gcc/d/imports.cc @@ -106,12 +106,16 @@ class ImportVisitor : public Visitor tree type = build_ctype (d->type); /* Not all kinds of D enums create a TYPE_DECL. */ if (TREE_CODE (type) == ENUMERAL_TYPE) - this->result_ = this->make_import (TYPE_STUB_DECL (type)); + { + type = TYPE_MAIN_VARIANT (type); + this->result_ = this->make_import (TYPE_STUB_DECL (type)); + } } void visit (AggregateDeclaration *d) { tree type = build_ctype (d->type); + type = TYPE_MAIN_VARIANT (type); this->result_ = this->make_import (TYPE_STUB_DECL (type)); } @@ -119,9 +123,19 @@ class ImportVisitor : public Visitor { /* Want the RECORD_TYPE, not POINTER_TYPE. */ tree type = TREE_TYPE (build_ctype (d->type)); + type = TYPE_MAIN_VARIANT (type); this->result_ = this->make_import (TYPE_STUB_DECL (type)); } + void visit (VarDeclaration *d) + { + /* Not all kinds of manifest constants create a CONST_DECL. */ + if (!d->canTakeAddressOf () && !d->type->isscalar ()) + return; + + visit ((Declaration *) d); + } + /* For now, ignore importing other kinds of dsymbols. */ void visit (ScopeDsymbol *) { @@ -160,6 +174,20 @@ class ImportVisitor : public Visitor d->aliassym->accept (this); } + /* Build IMPORTED_DECLs for all overloads in a set. */ + void visit (OverloadSet *d) + { + vec *tset = NULL; + + vec_alloc (tset, d->a.length); + + for (size_t i = 0; i < d->a.length; i++) + vec_safe_push (tset, build_import_decl (d->a[i])); + + this->result_ = build_tree_list_vec (tset); + tset->truncate (0); + } + /* Function aliases are the same as alias symbols. */ void visit (FuncAliasDeclaration *d) { diff --git a/gcc/d/intrinsics.cc b/gcc/d/intrinsics.cc index 4222b8a0290de..8ec94a6b8f9e8 100644 --- a/gcc/d/intrinsics.cc +++ b/gcc/d/intrinsics.cc @@ -721,6 +721,7 @@ expand_volatile_load (tree callexp) tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE); tree result = indirect_ref (type, ptr); TREE_THIS_VOLATILE (result) = 1; + TREE_SIDE_EFFECTS (result) = 1; return result; } @@ -748,6 +749,7 @@ expand_volatile_store (tree callexp) tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE); tree result = indirect_ref (type, ptr); TREE_THIS_VOLATILE (result) = 1; + TREE_SIDE_EFFECTS (result) = 1; /* (*(volatile T *) ptr) = value; */ tree value = CALL_EXPR_ARG (callexp, 1); diff --git a/gcc/d/modules.cc b/gcc/d/modules.cc index edc7912236549..ce35a726c52fb 100644 --- a/gcc/d/modules.cc +++ b/gcc/d/modules.cc @@ -121,6 +121,9 @@ static module_info *current_testing_module; static Module *current_module_decl; +/* Any inline symbols that were deferred during codegen. */ +vec *deferred_inline_declarations; + /* Returns an internal function identified by IDENT. This is used by both module initialization and dso handlers. */ @@ -326,7 +329,7 @@ static tree build_dso_cdtor_fn (bool ctor_p) { const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor"); - tree condition = ctor_p ? boolean_true_node : boolean_false_node; + tree condition = ctor_p ? d_bool_true_node : d_bool_false_node; /* Declaration of dso_ctor/dso_dtor is: @@ -449,7 +452,7 @@ register_moduleinfo (Module *decl, tree minfo) d_finish_decl (dso_slot_node); dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"), - boolean_type_node); + d_bool_type); d_finish_decl (dso_initialized_node); /* Declare dso_ctor() and dso_dtor(). */ @@ -724,6 +727,9 @@ build_module_tree (Module *decl) current_testing_module = &mitest; current_module_decl = decl; + vec deferred_decls = vNULL; + deferred_inline_declarations = &deferred_decls; + /* Layout module members. */ if (decl->members) { @@ -811,9 +817,14 @@ build_module_tree (Module *decl) layout_moduleinfo (decl); } + /* Process all deferred functions after finishing module. */ + for (size_t i = 0; i < deferred_decls.length (); ++i) + build_decl_tree (deferred_decls[i]); + current_moduleinfo = NULL; current_testing_module = NULL; current_module_decl = NULL; + deferred_inline_declarations = NULL; } /* Returns the current function or module context for the purpose @@ -888,6 +899,15 @@ register_module_decl (Declaration *d) } } +/* Add DECL as a declaration to emit at the end of the current module. */ + +void +d_defer_declaration (Declaration *decl) +{ + gcc_assert (deferred_inline_declarations != NULL); + deferred_inline_declarations->safe_push (decl); +} + /* Wrapup all global declarations and start the final compilation. */ void diff --git a/gcc/d/toir.cc b/gcc/d/toir.cc index d20c5c3b92729..d25cef12f91f4 100644 --- a/gcc/d/toir.cc +++ b/gcc/d/toir.cc @@ -529,6 +529,28 @@ class IRVisitor : public Visitor this->do_label (label); } + /* Generate and set a new continue label for the current unrolled loop. */ + + void push_unrolled_continue_label (UnrolledLoopStatement *s) + { + this->push_continue_label (s); + } + + /* Finish with the continue label for the unrolled loop. */ + + void pop_unrolled_continue_label (UnrolledLoopStatement *s) + { + Statement *stmt = s->getRelatedLabeled (); + d_label_entry *ent = d_function_chain->labels->get (stmt); + gcc_assert (ent != NULL && ent->bc_label == true); + + this->pop_continue_label (TREE_VEC_ELT (ent->label, bc_continue)); + + /* Remove the continue label from the label htab, as a new one must be + inserted at the end of every unrolled loop. */ + ent->label = TREE_VEC_ELT (ent->label, bc_break); + } + /* Visitor interfaces. */ @@ -1022,6 +1044,7 @@ class IRVisitor : public Visitor /* Generate: ( = expr, return ); */ tree expr = build_expr_dtor (s->exp); tree init = stabilize_expr (&expr); + expr = convert_for_rvalue (expr, s->exp->type, type); expr = build_assign (INIT_EXPR, this->func_->shidden, expr); add_stmt (compound_expr (init, expr)); } @@ -1088,9 +1111,9 @@ class IRVisitor : public Visitor if (statement != NULL) { - tree lcontinue = this->push_continue_label (statement); + this->push_unrolled_continue_label (s); this->build_stmt (statement); - this->pop_continue_label (lcontinue); + this->pop_unrolled_continue_label (s); } } diff --git a/gcc/d/typeinfo.cc b/gcc/d/typeinfo.cc index 668b7b3c8e131..45feb809a2ddc 100644 --- a/gcc/d/typeinfo.cc +++ b/gcc/d/typeinfo.cc @@ -180,6 +180,7 @@ make_internal_typeinfo (tinfo_kind tk, Identifier *ident, ...) /* Create the TypeInfo type. */ tree type = make_node (RECORD_TYPE); + TYPE_ARTIFICIAL (type) = 1; finish_builtin_struct (type, ident->toChars (), fields, NULL_TREE); tinfo_types[tk] = type; @@ -1394,21 +1395,29 @@ get_classinfo_decl (ClassDeclaration *decl) } /* Performs sanity checks on the `object.TypeInfo' type, raising an error if - RTTI is disabled, or the type is missing. */ + RTTI is disabled, or the type is missing. LOC is the location used for error + messages. SC is the context, and EXPR is expression where TypeInfo is + required from, if either are set. */ void -check_typeinfo_type (const Loc &loc, Scope *sc) +check_typeinfo_type (const Loc &loc, Scope *sc, Expression *expr) { if (!global.params.useTypeInfo) { - static int warned = 0; - /* Even when compiling without RTTI we should still be able to evaluate TypeInfo at compile-time, just not at run-time. */ - if (!warned && (!sc || !(sc->flags & SCOPEctfe))) + if (!sc || !(sc->flags & SCOPEctfe)) { - error_at (make_location_t (loc), - "% cannot be used with %<-fno-rtti%>"); + static int warned = 0; + + if (expr != NULL) + error_at (make_location_t (loc), + "expression %qs requires % and cannot " + "be used with %<-fno-rtti%>", expr->toChars ()); + else if (!warned) + error_at (make_location_t (loc), + "% cannot be used with %<-fno-rtti%>"); + warned = 1; } } @@ -1429,17 +1438,23 @@ check_typeinfo_type (const Loc &loc, Scope *sc) } } -/* Returns typeinfo reference for TYPE. */ +/* Returns typeinfo reference for TYPE. LOC is the location used for error + messages. EXPR is the expression where TypeInfo is required, if set. */ tree -build_typeinfo (const Loc &loc, Type *type) +build_typeinfo (const Loc &loc, Type *type, Expression *expr) { gcc_assert (type->ty != TY::Terror); - check_typeinfo_type (loc, NULL); + check_typeinfo_type (loc, NULL, expr); create_typeinfo (type, NULL); return build_address (get_typeinfo_decl (type->vtinfo)); } +tree build_typeinfo (Expression *expr, Type *type) +{ + return build_typeinfo (expr->loc, type, expr); +} + /* Like layout_classinfo, but generates an Object that wraps around a pointer to C++ type_info so it can be distinguished from D TypeInfo. */ diff --git a/gcc/d/types.cc b/gcc/d/types.cc index d897ec4c5e42d..6cf712fabee0a 100644 --- a/gcc/d/types.cc +++ b/gcc/d/types.cc @@ -375,7 +375,7 @@ fixup_anonymous_offset (tree fields, tree offset) /* Iterate over all MEMBERS of an aggregate, and add them as fields to CONTEXT. If INHERITED_P is true, then the members derive from a base class. - Returns the number of fields found. */ + Returns the number of named fields found. */ static size_t layout_aggregate_members (Dsymbols *members, tree context, bool inherited_p) @@ -418,7 +418,8 @@ layout_aggregate_members (Dsymbols *members, tree context, bool inherited_p) /* Insert the field declaration at its given offset. */ if (var->isField ()) { - const char *ident = var->ident ? var->ident->toChars () : NULL; + const char *ident = (var->ident && !var->ident->isAnonymous ()) + ? var->ident->toChars () : NULL; tree field = create_field_decl (declaration_type (var), ident, inherited_p, inherited_p); apply_user_attributes (var, field); @@ -442,7 +443,10 @@ layout_aggregate_members (Dsymbols *members, tree context, bool inherited_p) var->csym = field; } - fields += 1; + /* Only count the named fields in an aggregate. */ + if (ident != NULL) + fields += 1; + continue; } } @@ -1099,6 +1103,11 @@ class TypeVisitor : public Visitor apply_user_attributes (t->sym, t->ctype); finish_aggregate_type (structsize, alignsize, t->ctype); } + else + { + build_type_decl (t->ctype, t->sym); + apply_user_attributes (t->sym, t->ctype); + } TYPE_CONTEXT (t->ctype) = d_decl_context (t->sym); build_type_decl (t->ctype, t->sym); diff --git a/gcc/doc/analyzer.texi b/gcc/doc/analyzer.texi index 06eb98fe4d306..643c3306133a9 100644 --- a/gcc/doc/analyzer.texi +++ b/gcc/doc/analyzer.texi @@ -432,16 +432,6 @@ For example, SSA names are printed to the user in ``raw'' form, rather than printing the underlying variable name. @end itemize -Some ideas for other checkers -@itemize @bullet -@item -File-descriptor-based APIs -@item -Linux kernel internal APIs -@item -Signal handling -@end itemize - @node Debugging the Analyzer @section Debugging the Analyzer @cindex analyzer, debugging diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi index 8c09f08e53cc3..37d24878ae2d9 100644 --- a/gcc/doc/avr-mmcu.texi +++ b/gcc/doc/avr-mmcu.texi @@ -34,11 +34,11 @@ @item avr4 ``Enhanced'' devices with up to 8@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}. +@*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata5795}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}. @item avr5 ``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5795}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}. +@*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5787}, @code{ata5835}, @code{ata5700m322}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}. @item avr51 ``Enhanced'' devices with 128@tie{}KiB of program memory. @@ -50,15 +50,15 @@ @item avrxmega2 ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}. +@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28}, @code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28}, @code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14}, @code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28}, @code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}. @item avrxmega3 ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space. -@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny417}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}. +@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}. @item avrxmega4 ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}. +@*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}, @code{avr128da28}, @code{avr128da32}, @code{avr128da48}, @code{avr128da64}, @code{avr128db28}, @code{avr128db32}, @code{avr128db48}, @code{avr128db64}. @item avrxmega5 ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of RAM. @@ -74,7 +74,7 @@ @item avrtiny ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny20}, @code{attiny40}. +@*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny102}, @code{attiny104}, @code{attiny20}, @code{attiny40}. @item avr1 This ISA is implemented by the minimal AVR core and supported for assembler only. diff --git a/gcc/doc/cpp.texi b/gcc/doc/cpp.texi index 90b2767e39a0f..fe92522a7b7fb 100644 --- a/gcc/doc/cpp.texi +++ b/gcc/doc/cpp.texi @@ -1970,7 +1970,7 @@ like this: #if __GNUC__ > 3 || \ (__GNUC__ == 3 && (__GNUC_MINOR__ > 2 || \ (__GNUC_MINOR__ == 2 && \ - __GNUC_PATCHLEVEL__ > 0)) + __GNUC_PATCHLEVEL__ > 0))) @end smallexample @noindent diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi index 75c56a368cacf..c0a92b3701838 100644 --- a/gcc/doc/cppopts.texi +++ b/gcc/doc/cppopts.texi @@ -318,9 +318,10 @@ supported by the system's @code{iconv} library routine. @opindex fwide-exec-charset @cindex character set, wide execution Set the wide execution character set, used for wide string and -character constants. The default is UTF-32 or UTF-16, whichever -corresponds to the width of @code{wchar_t}. As with -@option{-fexec-charset}, @var{charset} can be any encoding supported +character constants. The default is one of UTF-32BE, UTF-32LE, UTF-16BE, +or UTF-16LE, whichever corresponds to the width of @code{wchar_t} and the +big-endian or little-endian byte order being used for code generation. As +with @option{-fexec-charset}, @var{charset} can be any encoding supported by the system's @code{iconv} library routine; however, you will have problems with encodings that do not fit exactly in @code{wchar_t}. diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 84e6f6694abb9..39fae6c8cd451 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -688,7 +688,7 @@ myprintf (FILE *f, const char *format, ...) @end smallexample @end deftypefn -@deftypefn {Built-in Function} {size_t} __builtin_va_arg_pack_len () +@deftypefn {Built-in Function} {int} __builtin_va_arg_pack_len () This built-in function returns the number of anonymous arguments of an inline function. It can be used only in inline functions that are always inlined, never compiled as a separate function, such @@ -14618,6 +14618,7 @@ instructions, but allow the compiler to schedule those calls. * Blackfin Built-in Functions:: * BPF Built-in Functions:: * FR-V Built-in Functions:: +* LoongArch Base Built-in Functions:: * MIPS DSP Built-in Functions:: * MIPS Paired-Single Support:: * MIPS Loongson Built-in Functions:: @@ -16068,6 +16069,139 @@ Use the @code{nldub} instruction to load the contents of address @var{x} into the data cache. The instruction is issued in slot I1@. @end table +@node LoongArch Base Built-in Functions +@subsection LoongArch Base Built-in Functions + +These built-in functions are available for LoongArch. + +Data Type Description: +@itemize +@item @code{imm0_31}, a compile-time constant in range 0 to 31; +@item @code{imm0_16383}, a compile-time constant in range 0 to 16383; +@item @code{imm0_32767}, a compile-time constant in range 0 to 32767; +@item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047; +@end itemize + +The intrinsics provided are listed below: +@smallexample + unsigned int __builtin_loongarch_movfcsr2gr (imm0_31) + void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int) + void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047) + unsigned int __builtin_loongarch_cpucfg (unsigned int) + void __builtin_loongarch_asrtle_d (long int, long int) + void __builtin_loongarch_asrtgt_d (long int, long int) + long int __builtin_loongarch_lddir_d (long int, imm0_31) + void __builtin_loongarch_ldpte_d (long int, imm0_31) + + int __builtin_loongarch_crc_w_b_w (char, int) + int __builtin_loongarch_crc_w_h_w (short, int) + int __builtin_loongarch_crc_w_w_w (int, int) + int __builtin_loongarch_crc_w_d_w (long int, int) + int __builtin_loongarch_crcc_w_b_w (char, int) + int __builtin_loongarch_crcc_w_h_w (short, int) + int __builtin_loongarch_crcc_w_w_w (int, int) + int __builtin_loongarch_crcc_w_d_w (long int, int) + + unsigned int __builtin_loongarch_csrrd_w (imm0_16383) + unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383) + unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383) + unsigned long int __builtin_loongarch_csrrd_d (imm0_16383) + unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383) + unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383) + + unsigned char __builtin_loongarch_iocsrrd_b (unsigned int) + unsigned short __builtin_loongarch_iocsrrd_h (unsigned int) + unsigned int __builtin_loongarch_iocsrrd_w (unsigned int) + unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int) + void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int) + void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int) + void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int) + void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int) + + void __builtin_loongarch_dbar (imm0_32767) + void __builtin_loongarch_ibar (imm0_32767) + + void __builtin_loongarch_syscall (imm0_32767) + void __builtin_loongarch_break (imm0_32767) +@end smallexample + +@emph{Note:}Since the control register is divided into 32-bit and 64-bit, +but the access instruction is not distinguished. So GCC renames the control +instructions when implementing intrinsics. + +Take the csrrd instruction as an example, built-in functions are implemented as follows: +@smallexample + __builtin_loongarch_csrrd_w // When reading the 32-bit control register use. + __builtin_loongarch_csrrd_d // When reading the 64-bit control register use. +@end smallexample + +For the convenience of use, the built-in functions are encapsulated, +the encapsulated functions and @code{__drdtime_t, __rdtime_t} are +defined in the @code{larchintrin.h}. So if you call the following +function you need to include @code{larchintrin.h}. + +@smallexample + typedef struct drdtime@{ + unsigned long dvalue; + unsigned long dtimeid; + @} __drdtime_t; + + typedef struct rdtime@{ + unsigned int value; + unsigned int timeid; + @} __rdtime_t; +@end smallexample + +@smallexample + __drdtime_t __rdtime_d (void) + __rdtime_t __rdtimel_w (void) + __rdtime_t __rdtimeh_w (void) + unsigned int __movfcsr2gr (imm0_31) + void __movgr2fcsr (imm0_31, unsigned int) + void __cacop_d (imm0_31, unsigned long, imm_n2048_2047) + unsigned int __cpucfg (unsigned int) + void __asrtle_d (long int, long int) + void __asrtgt_d (long int, long int) + long int __lddir_d (long int, imm0_31) + void __ldpte_d (long int, imm0_31) + + int __crc_w_b_w (char, int) + int __crc_w_h_w (short, int) + int __crc_w_w_w (int, int) + int __crc_w_d_w (long int, int) + int __crcc_w_b_w (char, int) + int __crcc_w_h_w (short, int) + int __crcc_w_w_w (int, int) + int __crcc_w_d_w (long int, int) + + unsigned int __csrrd_w (imm0_16383) + unsigned int __csrwr_w (unsigned int, imm0_16383) + unsigned int __csrxchg_w (unsigned int, unsigned int, imm0_16383) + unsigned long __csrrd_d (imm0_16383) + unsigned long __csrwr_d (unsigned long, imm0_16383) + unsigned long __csrxchg_d (unsigned long, unsigned long, imm0_16383) + + unsigned char __iocsrrd_b (unsigned int) + unsigned short __iocsrrd_h (unsigned int) + unsigned int __iocsrrd_w (unsigned int) + unsigned long __iocsrrd_d (unsigned int) + void __iocsrwr_b (unsigned char, unsigned int) + void __iocsrwr_h (unsigned short, unsigned int) + void __iocsrwr_w (unsigned int, unsigned int) + void __iocsrwr_d (unsigned long, unsigned int) + + void __dbar (imm0_32767) + void __ibar (imm0_32767) + + void __syscall (imm0_32767) + void __break (imm0_32767) +@end smallexample + +Returns the value that is currently set in the @samp{tp} register. +@smallexample + void * __builtin_thread_pointer (void) +@end smallexample + @node MIPS DSP Built-in Functions @subsection MIPS DSP Built-in Functions @@ -21888,17 +22022,11 @@ AMD Family 19h CPU. @item znver3 AMD Family 19h Zen version 3. -@item x86-64 -Baseline x86-64 microarchitecture level (as defined in x86-64 psABI). - -@item x86-64-v2 -x86-64-v2 microarchitecture level. +@item znver4 +AMD Family 19h Zen version 4. -@item x86-64-v3 -x86-64-v3 microarchitecture level. - -@item x86-64-v4 -x86-64-v4 microarchitecture level. +@item znver5 +AMD Family 1ah Zen version 5. @end table Here is an example: @@ -21992,6 +22120,16 @@ VPCLMULQDQ instructions. AVX512VNNI instructions. @item avx512bitalg AVX512BITALG instructions. +@item x86-64 +Baseline x86-64 microarchitecture level (as defined in x86-64 psABI). +@item x86-64-v2 +x86-64-v2 microarchitecture level. +@item x86-64-v3 +x86-64-v3 microarchitecture level. +@item x86-64-v4 +x86-64-v4 microarchitecture level. + + @end table Here is an example: diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi index e5f9d1be8ea81..1f7b00a240396 100644 --- a/gcc/doc/generic.texi +++ b/gcc/doc/generic.texi @@ -1144,7 +1144,7 @@ vector. For example @{ 0, 1 @} could be seen as two patterns with one element each or one pattern with two elements (@var{base0} and @var{base1}). The canonical encoding is always the one with the fewest patterns or (if both encodings have the same number of -petterns) the one with the fewest encoded elements. +patterns) the one with the fewest encoded elements. @samp{vector_cst_encoding_nelts (@var{v})} gives the total number of encoded elements in @var{v}, which is 6 in the example above. diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 10bfceffcebc1..d488b7689879f 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -227,7 +227,9 @@ described below. @heading Tools/packages necessary for building GCC @table @asis @item ISO C++11 compiler -Necessary to bootstrap GCC. +Necessary to bootstrap GCC. GCC 4.8.3 or newer has sufficient +support for used C++11 features, with earlier GCC versions you +might run into implementation bugs. Versions of GCC prior to 11 also allow bootstrapping with an ISO C++98 compiler, versions of GCC prior to 4.8 also allow bootstrapping with a @@ -236,7 +238,7 @@ bootstrapping with a traditional (K&R) C compiler. To build all languages in a cross-compiler or other configuration where 3-stage bootstrap is not performed, you need to start with an existing -GCC binary (version 4.8 or later) because source code for language +GCC binary (version 4.8.3 or later) because source code for language frontends other than C might use GCC extensions. @item C standard library and headers @@ -287,7 +289,7 @@ section. @item @anchor{GDC-prerequisite}GDC In order to build GDC, the D compiler, you need a working GDC -compiler (GCC version 9.1 or later) and D runtime library, +compiler (GCC version 9.4 or later) and D runtime library, @samp{libphobos}, as the D front end is written in D. Versions of GDC prior to 12 can be built with an ISO C++11 compiler, which can @@ -373,6 +375,9 @@ tables. Used by @command{automake}. +If available, enables parallel testing of @samp{libgomp} in case that +@command{flock} is not available. + @end table Several support libraries are necessary to build GCC, some are required, @@ -2371,6 +2376,21 @@ For a native build and cross compiles that have target headers, the option's default is derived from glibc's behavior. When glibc clamps float_t to double, GCC follows and enables the option. For other cross compiles, the default is disabled. + +@item --with-zstd=@var{pathname} +@itemx --with-zstd-include=@var{pathname} +@itemx --with-zstd-lib=@var{pathname} +If you do not have the @code{zstd} library installed in a standard +location and you want to build GCC, you can explicitly specify the +directory where it is installed (@samp{--with-zstd=@/@var{zstdinstalldir}}). +The @option{--with-zstd=@/@var{zstdinstalldir}} option is shorthand for +@option{--with-zstd-lib=@/@var{zstdinstalldir}/lib} and +@option{--with-zstd-include=@/@var{zstdinstalldir}/include}. If this +shorthand assumption is not correct, you can use the explicit +include and lib options directly. + +These flags are applicable to the host platform only. When building +a cross compiler, they will not be used to configure target libraries. @end table @subheading Cross-Compiler-Specific Options @@ -3564,16 +3584,28 @@ information have to. @item @uref{#alpha-x-x,,alpha*-*-*} @item +@uref{#amdgcn-x-amdhsa,,amdgcn-*-amdhsa} +@item @uref{#amd64-x-solaris2,,amd64-*-solaris2*} @item +@uref{#arc-x-elf32,,arc-*-elf32} +@item +@uref{#arc-linux-uclibc,,arc-linux-uclibc} +@item @uref{#arm-x-eabi,,arm-*-eabi} @item @uref{#avr,,avr} @item @uref{#bfin,,Blackfin} @item +@uref{#cris,,cris} +@item @uref{#dos,,DOS} @item +@uref{#epiphany-x-elf,,epiphany-*-elf} +@item +@uref{#ft32-x-elf,,ft32-*-elf} +@item @uref{#x-x-freebsd,,*-*-freebsd*} @item @uref{#h8300-hms,,h8300-hms} @@ -3598,6 +3630,8 @@ information have to. @item @uref{#iq2000-x-elf,,iq2000-*-elf} @item +@uref{#loongarch,,loongarch} +@item @uref{#lm32-x-elf,,lm32-*-elf} @item @uref{#lm32-x-uclinux,,lm32-*-uclinux} @@ -3608,12 +3642,16 @@ information have to. @item @uref{#m68k-x-x,,m68k-*-*} @item -@uref{#m68k-uclinux,,m68k-uclinux} +@uref{#m68k-x-uclinux,,m68k-*-uclinux} @item @uref{#microblaze-x-elf,,microblaze-*-elf} @item @uref{#mips-x-x,,mips-*-*} @item +@uref{#moxie-x-elf,,moxie-*-elf} +@item +@uref{#msp430-x-elf,,msp430-*-elf} +@item @uref{#nds32le-x-elf,,nds32le-*-elf} @item @uref{#nds32be-x-elf,,nds32be-*-elf} @@ -3652,6 +3690,10 @@ information have to. @item @uref{#riscv64-x-linux,,riscv64-*-linux} @item +@uref{#rl78-x-elf,,rl78-*-elf} +@item +@uref{#rx-x-elf,,rx-*-elf} +@item @uref{#s390-x-linux,,s390-*-linux*} @item @uref{#s390x-x-linux,,s390x-*-linux*} @@ -3772,14 +3814,14 @@ This is a synonym for @samp{x86_64-*-solaris2*}. @heading amdgcn-*-amdhsa AMD GCN GPU target. -Instead of GNU Binutils, you will need to install LLVM 6, or later, and copy +Instead of GNU Binutils, you will need to install LLVM 13.0.1, or later, and copy @file{bin/llvm-mc} to @file{amdgcn-amdhsa/bin/as}, @file{bin/lld} to @file{amdgcn-amdhsa/bin/ld}, @file{bin/llvm-nm} to @file{amdgcn-amdhsa/bin/nm}, and @file{bin/llvm-ar} to both @file{bin/amdgcn-amdhsa-ar} and @file{bin/amdgcn-amdhsa-ranlib}. -Use Newlib (2019-01-16, or newer). +Use Newlib (3.2.0, or newer). To run the binaries, install the HSA Runtime from the @uref{https://rocm.github.io,,ROCm Platform}, and use @@ -4620,8 +4662,7 @@ Instead of GNU binutils, you will need to install Tell GCC where to find it: @option{--with-build-time-tools=[install-nvptx-tools]/nvptx-none/bin}. -You will need newlib 3.0 git revision -cd31fbb2aea25f94d7ecedc9db16dfc87ab0c316 or later. It can be +You will need newlib 3.1.0 or later. It can be automatically built together with GCC@. For this, add a symbolic link to nvptx-newlib's @file{newlib} directory to the directory containing the GCC sources. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 07b440190c3aa..926b72982e2df 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1004,7 +1004,7 @@ Objective-C and Objective-C++ Dialects}. -mcond-move-float -mno-cond-move-float @gol -memcpy -mno-memcpy -mstrict-align -mno-strict-align @gol -mmax-inline-memcpy-size=@var{n} @gol --mcmodel=@var{code-model}} +-mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as} @emph{M32R/D Options} @gccoptlist{-m32r2 -m32rx -m32r @gol @@ -1434,7 +1434,7 @@ See RS/6000 and PowerPC Options. -m96bit-long-double -mlong-double-64 -mlong-double-80 -mlong-double-128 @gol -mregparm=@var{num} -msseregparm @gol -mveclibabi=@var{type} -mvect8-ret-in-mem @gol --mpc32 -mpc64 -mpc80 -mstackrealign @gol +-mpc32 -mpc64 -mpc80 -mdaz-ftz -mstackrealign @gol -momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol -mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol -m32 -m64 -mx32 -m16 -miamcu -mlarge-data-threshold=@var{num} @gol @@ -4521,10 +4521,12 @@ and Objective-C++ programs: Use @var{class-name} as the name of the class to instantiate for each literal string specified with the syntax @code{@@"@dots{}"}. The default class name is @code{NXConstantString} if the GNU runtime is being used, and -@code{NSConstantString} if the NeXT runtime is being used (see below). The -@option{-fconstant-cfstrings} option, if also present, overrides the -@option{-fconstant-string-class} setting and cause @code{@@"@dots{}"} literals -to be laid out as constant CoreFoundation strings. +@code{NSConstantString} if the NeXT runtime is being used (see below). On +Darwin (macOS, MacOS X) platforms, the @option{-fconstant-cfstrings} option, if +also present, overrides the @option{-fconstant-string-class} setting and cause +@code{@@"@dots{}"} literals to be laid out as constant CoreFoundation strings. +Note that @option{-fconstant-cfstrings} is an alias for the target-specific +@option{-mconstant-cfstrings} equivalent. @item -fgnu-runtime @opindex fgnu-runtime @@ -6647,7 +6649,7 @@ This warning is enabled by @option{-Wall}. @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)} @opindex Wmissing-include-dirs @opindex Wno-missing-include-dirs -Warn if a user-supplied include directory does not exist. This opions is disabled +Warn if a user-supplied include directory does not exist. This option is disabled by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially enabled by default by warning for -I and -J, only. @@ -9660,6 +9662,13 @@ code, and issues warnings for problems found on them. This analysis is much more expensive than other GCC warnings. +In technical terms, it performs coverage-guided symbolic execution of +the code being compiled. It is neither sound nor complete: it can +have false positives and false negatives. It is a bug-finding tool, +rather than a tool for proving program correctness. + +The analyzer is only suitable for use on C code in this release. + Enabling this option effectively enables the following warnings: @gccoptlist{ @gol @@ -10198,8 +10207,8 @@ diagnostic to @file{@var{file}.@var{idx}.@var{kind}.epath.txt}. @opindex dump-analyzer-feasibility Dump internal details about the analyzer's search for feasible paths. The details are written in a form suitable for viewing with GraphViz -to filenames of the form @file{@var{file}.*.fg.dot} and -@file{@var{file}.*.tg.dot}. +to filenames of the form @file{@var{file}.*.fg.dot}, +@file{@var{file}.*.tg.dot}, and @file{@var{file}.*.fpath.txt}. @item -fdump-analyzer-json @opindex fdump-analyzer-json @@ -19194,8 +19203,8 @@ performance of the code. Permissible values for this option are: @samp{cortex-a78}, @samp{cortex-a78ae}, @samp{cortex-a78c}, @samp{ares}, @samp{exynos-m1}, @samp{emag}, @samp{falkor}, @samp{neoverse-512tvb}, @samp{neoverse-e1}, @samp{neoverse-n1}, -@samp{neoverse-n2}, @samp{neoverse-v1}, @samp{qdf24xx}, -@samp{saphira}, @samp{phecda}, @samp{xgene1}, @samp{vulcan}, +@samp{neoverse-n2}, @samp{neoverse-v1}, @samp{neoverse-v2}, @samp{grace}, +@samp{qdf24xx}, @samp{saphira}, @samp{phecda}, @samp{xgene1}, @samp{vulcan}, @samp{octeontx}, @samp{octeontx81}, @samp{octeontx83}, @samp{octeontx2}, @samp{octeontx2t98}, @samp{octeontx2t96} @samp{octeontx2t93}, @samp{octeontx2f95}, @samp{octeontx2f95n}, @@ -19208,7 +19217,8 @@ performance of the code. Permissible values for this option are: @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55}, @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x2}, -@samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1}, @samp{native}. +@samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1}, +@samp{ampere1a}, @samp{cobalt-100} and @samp{native}. The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @@ -22796,10 +22806,21 @@ This is by default ON@. @opindex gfull Emit debugging information for all symbols and types. +@opindex fconstant-cfstrings +@item -fconstant-cfstrings +The @option{-fconstant-cfstrings} is an alias for @option{-mconstant-cfstrings}. + +@opindex mconstant-cfstrings +@item -mconstant-cfstrings +When the NeXT runtime is being used (the default on these systems), override +any @option{-fconstant-string-class} setting and cause @code{@@"@dots{}"} +literals to be laid out as constant CoreFoundation strings. + +@opindex mmacosx-version-min @item -mmacosx-version-min=@var{version} -The earliest version of MacOS X that this executable will run on -is @var{version}. Typical values of @var{version} include @code{10.1}, -@code{10.2}, and @code{10.3.9}. +The earliest version of MacOS X that this executable will run on is +@var{version}. Typical values supported for @var{version} include @code{12}, +@code{10.12}, and @code{10.5.8}. If the compiler was built to use the system's headers by default, then the default for this option is the system version on which the @@ -24527,7 +24548,8 @@ Set the cost of branches to roughly @var{n} instructions. @itemx -mno-check-zero-divison @opindex -mcheck-zero-division Trap (do not trap) on integer division by zero. The default is -@option{-mcheck-zero-division}. +@option{-mcheck-zero-division} for @option{-O0} or @option{-Og}, and +@option{-mno-check-zero-division} for other optimization levels. @item -mcond-move-int @itemx -mno-cond-move-int @@ -24617,6 +24639,28 @@ global symbol: The data got table must be within +/-8EiB addressing space. @end itemize @end table The default code model is @code{normal}. + +@item -mrelax +@itemx -mno-relax +Take (do not take) advantage of linker relaxations. If +@option{-mpass-mrelax-to-as} is enabled, this option is also passed to +the assembler. The default is determined during GCC build-time by +detecting corresponding assembler support: +@option{-mrelax} if the assembler supports both the @option{-mrelax} +option and the conditional branch relaxation (it's required or the +@code{.align} directives and conditional branch instructions in the +assembly code outputted by GCC may be rejected by the assembler because +of a relocation overflow), @option{-mno-relax} otherwise. + +@item -mpass-mrelax-to-as +@itemx -mno-pass-mrelax-to-as +Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option +to the assembler. The default is determined during GCC build-time by +detecting corresponding assembler support: +@option{-mpass-mrelax-to-as} if the assembler supports the +@option{-mrelax} option, @option{-mno-pass-mrelax-to-as} otherwise. +This option is mostly useful for debugging, or interoperation with +assemblers different from the build-time one. @end table @node M32C Options @@ -31405,6 +31449,7 @@ Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, CX16, SAHF and FXSR instruction set support. @item nehalem +@itemx corei7 Intel Nehalem CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF and FXSR instruction set support. @@ -31413,17 +31458,20 @@ Intel Westmere CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR and PCLMUL instruction set support. @item sandybridge +@itemx corei7-avx Intel Sandy Bridge CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE and PCLMUL instruction set support. @item ivybridge +@itemx core-avx-i Intel Ivy Bridge CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND and F16C instruction set support. @item haswell -Intel Haswell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +@itemx core-avx2 +Intel Haswell CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE and HLE instruction set support. @@ -31439,47 +31487,6 @@ SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES and SGX instruction set support. -@item bonnell -Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3 -instruction set support. - -@item silvermont -Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW and RDRND -instruction set support. - -@item goldmont -Intel Goldmont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, SHA, -RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT and FSGSBASE instruction -set support. - -@item goldmont-plus -Intel Goldmont Plus CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, -SHA, RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT, FSGSBASE, PTWRITE, -RDPID and SGX instruction set support. - -@item tremont -Intel Tremont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, SHA, -RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT, FSGSBASE, PTWRITE, RDPID, -SGX, CLWB, GFNI-SSE, MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG instruction set -support. - -@item knl -Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, -RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, -AVX512PF, AVX512ER, AVX512F, AVX512CD and PREFETCHWT1 instruction set support. - -@item knm -Intel Knights Mill CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, -RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, -AVX512PF, AVX512ER, AVX512F, AVX512CD and PREFETCHWT1, AVX5124VNNIW, -AVX5124FMAPS and AVX512VPOPCNTDQ instruction set support. - @item skylake-avx512 Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, @@ -31487,16 +31494,30 @@ RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. +@item cascadelake +Intel Cascade Lake CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, +F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, +CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ, +AVX512CD and AVX512VNNI instruction set support. + @item cannonlake -Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +Intel Cannon Lake Server CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, PKU, AVX512VBMI, AVX512IFMA and SHA instruction set support. +@item cooperlake +Intel Cooper Lake CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, +F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, +CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ, +AVX512CD, AVX512VNNI and AVX512BF16 instruction set support. + @item icelake-client -Intel Icelake Client CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +Intel Ice Lake Client CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, @@ -31504,7 +31525,7 @@ AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2 , VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support. @item icelake-server -Intel Icelake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +Intel Ice Lake Server CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, @@ -31512,55 +31533,84 @@ AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2 , VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD and CLWB instruction set support. -@item cascadelake -Intel Cascadelake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, -F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, -CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ, -AVX512CD and AVX512VNNI instruction set support. - -@item cooperlake -Intel cooperlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, -F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, -CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ, -AVX512CD, AVX512VNNI and AVX512BF16 instruction set support. - @item tigerlake -Intel Tigerlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +Intel Tiger Lake CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, -CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD -PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, +CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, +AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, MOVDIRI, MOVDIR64B, CLWB, AVX512VP2INTERSECT and KEYLOCKER instruction set support. -@item sapphirerapids -Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, -RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, -AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, -AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2 -VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, -MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, -SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 -and AVX512BF16 instruction set support. +@item rocketlake +Intel Rocket Lake CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, +F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, +CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, +PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, +VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support. @item alderlake -Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +Intel Alder Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set support. -@item rocketlake -Intel Rocketlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3 -, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, +@item sapphirerapids +Intel Sapphire Rapids CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, -CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD -PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, -VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support. +CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, +AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, +VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, +MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, +UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512-FP16 and AVX512BF16 +instruction set support. + +@item bonnell +@itemx atom +Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3 +instruction set support. + +@item silvermont +@itemx slm +Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW and RDRND +instruction set support. + +@item goldmont +Intel Goldmont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, SHA, +RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT and FSGSBASE instruction +set support. + +@item goldmont-plus +Intel Goldmont Plus CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, +SHA, RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT, FSGSBASE, PTWRITE, +RDPID and SGX instruction set support. + +@item tremont +Intel Tremont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, PCLMUL, PREFETCHW, RDRND, AES, SHA, +RDSEED, XSAVE, XSAVEC, XSAVES, XSAVEOPT, CLFLUSHOPT, FSGSBASE, PTWRITE, RDPID, +SGX, CLWB, GFNI-SSE, MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG instruction set +support. + +@item knl +Intel Knights Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, +RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, +AVX512PF, AVX512ER, AVX512F, AVX512CD and PREFETCHWT1 instruction set support. + +@item knm +Intel Knights Mill CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, +RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, +AVX512PF, AVX512ER, AVX512F, AVX512CD and PREFETCHWT1, AVX5124VNNIW, +AVX5124FMAPS and AVX512VPOPCNTDQ instruction set support. @item k6 AMD K6 CPU with MMX instruction set support. @@ -31644,6 +31694,25 @@ MWAITX, SHA, CLZERO, AES, PCLMUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, RDPID, WBNOINVD, PKU, VPCLMULQDQ, VAES, and 64-bit instruction set extensions.) +@item znver4 +AMD Family 19h core based CPUs with x86-64 instruction set support. (This +supersets BMI, BMI2, CLWB, F16C, FMA, FSGSBASE, AVX, AVX2, ADCX, RDSEED, +MWAITX, SHA, CLZERO, AES, PCLMUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A, +SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, RDPID, +WBNOINVD, PKU, VPCLMULQDQ, VAES, AVX512F, AVX512DQ, AVX512IFMA, AVX512CD, +AVX512BW, AVX512VL, AVX512BF16, AVX512VBMI, AVX512VBMI2, AVX512VNNI, +AVX512BITALG, AVX512VPOPCNTDQ, GFNI and 64-bit instruction set extensions.) + +@item znver5 +AMD Family 1ah core based CPUs with x86-64 instruction set support. (This +supersets BMI, BMI2, CLWB, F16C, FMA, FSGSBASE, AVX, AVX2, ADCX, RDSEED, +MWAITX, SHA, CLZERO, AES, PCLMUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A, +SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, RDPID, +WBNOINVD, PKU, VPCLMULQDQ, VAES, AVX512F, AVX512DQ, AVX512IFMA, AVX512CD, +AVX512BW, AVX512VL, AVX512BF16, AVX512VBMI, AVX512VBMI2, AVX512VNNI, +AVX512BITALG, AVX512VPOPCNTDQ, GFNI, AVXVNNI, MOVDIRI, MOVDIR64B, +AVX512VP2INTERSECT, PREFETCHI and 64-bit instruction set extensions.) + @item btver1 CPUs based on AMD Family 14h cores with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit @@ -32060,6 +32129,15 @@ are enabled by default; routines in such libraries could suffer significant loss of accuracy, typically through so-called ``catastrophic cancellation'', when this option is used to set the precision to less than extended precision. +@item -mdaz-ftz +@opindex mdaz-ftz + +The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the MXCSR register +are used to control floating-point calculations.SSE and AVX instructions +including scalar and vector instructions could benefit from enabling the FTZ +and DAZ flags when @option{-mdaz-ftz} is specified. Don't set FTZ/DAZ flags +when @option{-mno-daz-ftz} is specified. + @item -mstackrealign @opindex mstackrealign Realign the stack at entry. On the x86, the @option{-mstackrealign} @@ -32380,7 +32458,7 @@ WBNOINVD, FMA4, PREFETCHW, RDPID, PREFETCHWT1, RDSEED, SGX, XOP, LWP, XSAVEOPT, XSAVEC, XSAVES, RTM, HLE, TBM, MWAITX, CLZERO, PKU, AVX512VBMI2, GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, AVX512BF16, ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE, -UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512FP16 +UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512-FP16 or CLDEMOTE extended instruction sets. Each has a corresponding @option{-mno-} option to disable use of these instructions. @@ -33074,7 +33152,7 @@ on x86-64 processors in 64-bit environments. Generate code for a 16-bit, 32-bit or 64-bit environment. The @option{-m32} option sets @code{int}, @code{long}, and pointer types to 32 bits, and -generates code that runs on any i386 system. +generates code that runs in 32-bit mode. The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer types to 64 bits, and generates code for the x86-64 architecture. diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index 43c9ee8bffeac..2aed9a0454eff 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -1843,7 +1843,7 @@ vector. For example @{ 0, 1 @} could be seen as two patterns with one element each or one pattern with two elements (@var{base0} and @var{base1}). The canonical encoding is always the one with the fewest patterns or (if both encodings have the same number of -petterns) the one with the fewest encoded elements. +patterns) the one with the fewest encoded elements. @samp{const_vector_encoding_nelts (@var{v})} gives the total number of encoded elements in @var{v}, which is 6 in the example above. diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 613ac29967b30..71c04841df2b1 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2420,6 +2420,18 @@ PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu} setting is Power9 or later. @end table +@subsection RISC-V specific attributes + +@table @code + +@item rv32 +Test system has an integer register width of 32 bits. + +@item rv64 +Test system has an integer register width of 64 bits. + +@end table + @subsubsection Other hardware attributes @c Please keep this table sorted alphabetically. diff --git a/gcc/dominance.cc b/gcc/dominance.cc index 09d12d0f6188d..60b196379356a 100644 --- a/gcc/dominance.cc +++ b/gcc/dominance.cc @@ -639,18 +639,25 @@ dom_info::calc_idoms () static void assign_dfs_numbers (struct et_node *node, int *num) { - struct et_node *son; - - node->dfs_num_in = (*num)++; - - if (node->son) + et_node *n = node; + while (1) { - assign_dfs_numbers (node->son, num); - for (son = node->son->right; son != node->son; son = son->right) - assign_dfs_numbers (son, num); + n->dfs_num_in = (*num)++; + if (n->son) + n = n->son; + else + { + while (!n->right || n->right == n->father->son) + { + n->dfs_num_out = (*num)++; + if (n == node) + return; + n = n->father; + } + n->dfs_num_out = (*num)++; + n = n->right; + } } - - node->dfs_num_out = (*num)++; } /* Compute the data necessary for fast resolving of dominator queries in a diff --git a/gcc/dse.cc b/gcc/dse.cc index b8914a3ae24e6..5880b6caa9ab4 100644 --- a/gcc/dse.cc +++ b/gcc/dse.cc @@ -1562,12 +1562,7 @@ record_store (rtx body, bb_info_t bb_info) width) /* We can only remove the later store if the earlier aliases at least all accesses the later one. */ - && ((MEM_ALIAS_SET (mem) == MEM_ALIAS_SET (s_info->mem) - || alias_set_subset_of (MEM_ALIAS_SET (mem), - MEM_ALIAS_SET (s_info->mem))) - && (!MEM_EXPR (s_info->mem) - || refs_same_for_tbaa_p (MEM_EXPR (s_info->mem), - MEM_EXPR (mem))))) + && mems_same_for_tbaa_p (s_info->mem, mem)) { if (GET_MODE (mem) == BLKmode) { @@ -3682,6 +3677,16 @@ rest_of_handle_dse (void) dse_step0 (); dse_step1 (); + /* DSE can eliminate potentially-trapping MEMs. + Remove any EH edges associated with them, since otherwise + DF_LR_RUN_DCE will complain later. */ + if ((locally_deleted || globally_deleted) + && cfun->can_throw_non_call_exceptions + && purge_all_dead_edges ()) + { + free_dominance_info (CDI_DOMINATORS); + delete_unreachable_blocks (); + } dse_step2_init (); if (dse_step2 ()) { diff --git a/gcc/dwarf2out.cc b/gcc/dwarf2out.cc index 5681b01749add..cfe87cba4c4ce 100644 --- a/gcc/dwarf2out.cc +++ b/gcc/dwarf2out.cc @@ -5883,6 +5883,7 @@ lookup_type_die (tree type) if (die && die->removed) { TYPE_SYMTAB_DIE (type) = NULL; + TREE_ASM_WRITTEN (type) = 0; return NULL; } return die; @@ -19449,6 +19450,14 @@ loc_list_from_tree_1 (tree loc, int want_address, break; case TRUTH_NOT_EXPR: + list_ret = loc_list_from_tree_1 (TREE_OPERAND (loc, 0), 0, context); + if (list_ret == 0) + return 0; + + add_loc_descr_to_each (list_ret, new_loc_descr (DW_OP_lit0, 0, 0)); + add_loc_descr_to_each (list_ret, new_loc_descr (DW_OP_eq, 0, 0)); + break; + case BIT_NOT_EXPR: op = DW_OP_not; goto do_unop; @@ -19497,6 +19506,15 @@ loc_list_from_tree_1 (tree loc, int want_address, list_ret = loc_list_from_tree_1 (TREE_OPERAND (TREE_OPERAND (loc, 0), 0), 0, context); + /* Likewise, swap the operands for a logically negated condition. */ + else if (TREE_CODE (TREE_OPERAND (loc, 0)) == TRUTH_NOT_EXPR) + { + lhs = loc_descriptor_from_tree (TREE_OPERAND (loc, 2), 0, context); + rhs = loc_list_from_tree_1 (TREE_OPERAND (loc, 1), 0, context); + list_ret + = loc_list_from_tree_1 (TREE_OPERAND (TREE_OPERAND (loc, 0), 0), + 0, context); + } else list_ret = loc_list_from_tree_1 (TREE_OPERAND (loc, 0), 0, context); if (list_ret == 0 || lhs == 0 || rhs == 0) @@ -26490,7 +26508,8 @@ process_scope_var (tree stmt, tree decl, tree origin, dw_die_ref context_die) if (die != NULL && die->die_parent == NULL) add_child_die (context_die, die); - else if (TREE_CODE (decl_or_origin) == IMPORTED_DECL) + + if (TREE_CODE (decl_or_origin) == IMPORTED_DECL) { if (early_dwarf) dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin), @@ -30089,8 +30108,13 @@ prune_unused_types_walk (dw_die_ref die) case DW_TAG_reference_type: case DW_TAG_rvalue_reference_type: case DW_TAG_volatile_type: + case DW_TAG_restrict_type: + case DW_TAG_shared_type: + case DW_TAG_atomic_type: + case DW_TAG_immutable_type: case DW_TAG_typedef: case DW_TAG_array_type: + case DW_TAG_coarray_type: case DW_TAG_friend: case DW_TAG_enumeration_type: case DW_TAG_subroutine_type: @@ -30099,6 +30123,8 @@ prune_unused_types_walk (dw_die_ref die) case DW_TAG_subrange_type: case DW_TAG_ptr_to_member_type: case DW_TAG_file_type: + case DW_TAG_unspecified_type: + case DW_TAG_dynamic_type: /* Type nodes are useful only when other DIEs reference them --- don't mark them. */ /* FALLTHROUGH */ @@ -32136,24 +32162,12 @@ dwarf2out_finish (const char *filename) reset_dies (comp_unit_die ()); for (limbo_die_node *node = cu_die_list; node; node = node->next) reset_dies (node->die); - - hash_table comdat_type_table (100); for (ctnode = comdat_type_list; ctnode != NULL; ctnode = ctnode->next) { - comdat_type_node **slot - = comdat_type_table.find_slot (ctnode, INSERT); - - /* Don't reset types twice. */ - if (*slot != HTAB_EMPTY_ENTRY) - continue; - /* Remove the pointer to the line table. */ remove_AT (ctnode->root_die, DW_AT_stmt_list); - if (debug_info_level >= DINFO_LEVEL_TERSE) reset_dies (ctnode->root_die); - - *slot = ctnode; } /* Reset die CU symbol so we don't output it twice. */ diff --git a/gcc/explow.cc b/gcc/explow.cc index ddb4d6ae36005..d8aa75ee9baff 100644 --- a/gcc/explow.cc +++ b/gcc/explow.cc @@ -349,9 +349,14 @@ convert_memory_address_addr_space_1 (scalar_int_mode to_mode ATTRIBUTE_UNUSED, return temp; case CONST: - temp = convert_memory_address_addr_space_1 (to_mode, XEXP (x, 0), as, - true, no_emit); - return temp ? gen_rtx_CONST (to_mode, temp) : temp; + { + auto *last = no_emit ? nullptr : get_last_insn (); + temp = convert_memory_address_addr_space_1 (to_mode, XEXP (x, 0), as, + true, no_emit); + if (temp && (no_emit || last == get_last_insn ())) + return gen_rtx_CONST (to_mode, temp); + return temp; + } case PLUS: case MULT: diff --git a/gcc/expmed.cc b/gcc/expmed.cc index ed39c88bd0442..39e53faec70ea 100644 --- a/gcc/expmed.cc +++ b/gcc/expmed.cc @@ -1605,20 +1605,22 @@ extract_bit_field_using_extv (const extraction_insn *extv, rtx op0, return NULL_RTX; } -/* See whether it would be valid to extract the part of OP0 described - by BITNUM and BITSIZE into a value of mode MODE using a subreg - operation. Return the subreg if so, otherwise return null. */ +/* See whether it would be valid to extract the part of OP0 with + mode OP0_MODE described by BITNUM and BITSIZE into a value of + mode MODE using a subreg operation. + Return the subreg if so, otherwise return null. */ static rtx extract_bit_field_as_subreg (machine_mode mode, rtx op0, + machine_mode op0_mode, poly_uint64 bitsize, poly_uint64 bitnum) { poly_uint64 bytenum; if (multiple_p (bitnum, BITS_PER_UNIT, &bytenum) && known_eq (bitsize, GET_MODE_BITSIZE (mode)) - && lowpart_bit_field_p (bitnum, bitsize, GET_MODE (op0)) - && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op0))) - return simplify_gen_subreg (mode, op0, GET_MODE (op0), bytenum); + && lowpart_bit_field_p (bitnum, bitsize, op0_mode) + && TRULY_NOOP_TRUNCATION_MODES_P (mode, op0_mode)) + return simplify_gen_subreg (mode, op0, op0_mode, bytenum); return NULL_RTX; } @@ -1777,7 +1779,8 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, for valid bitsize and bitnum, so we don't need to do that here. */ if (VECTOR_MODE_P (mode)) { - rtx sub = extract_bit_field_as_subreg (mode, op0, bitsize, bitnum); + rtx sub = extract_bit_field_as_subreg (mode, op0, outermode, + bitsize, bitnum); if (sub) return sub; } @@ -1824,9 +1827,10 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, /* Extraction of a full MODE1 value can be done with a subreg as long as the least significant bit of the value is the least significant bit of either OP0 or a word of OP0. */ - if (!MEM_P (op0) && !reverse) + if (!MEM_P (op0) && !reverse && op0_mode.exists (&imode)) { - rtx sub = extract_bit_field_as_subreg (mode1, op0, bitsize, bitnum); + rtx sub = extract_bit_field_as_subreg (mode1, op0, imode, + bitsize, bitnum); if (sub) return convert_extracted_bit_field (sub, mode, tmode, unsignedp); } @@ -5597,11 +5601,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, enum insn_code icode; machine_mode compare_mode; enum mode_class mclass; - enum rtx_code scode; if (unsignedp) code = unsigned_condition (code); - scode = swap_condition (code); /* If one operand is constant, make it the second one. Only do this if the other operand is not constant as well. */ @@ -5769,6 +5771,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, if (GET_MODE_CLASS (mode) == MODE_FLOAT) { + enum rtx_code scode = swap_condition (code); + tem = emit_cstore (target, icode, scode, mode, compare_mode, unsignedp, op1, op0, normalizep, target_mode); if (tem) diff --git a/gcc/expr.cc b/gcc/expr.cc index 5f7142b975ada..e7804d52656a6 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -5994,6 +5994,9 @@ store_expr (tree exp, rtx target, int call_param_p, temp = convert_modes (inner_mode, outer_mode, temp, SUBREG_PROMOTED_SIGN (target)); } + else if (!SCALAR_INT_MODE_P (GET_MODE (temp))) + temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)), + temp, SUBREG_PROMOTED_SIGN (target)); convert_move (SUBREG_REG (target), temp, SUBREG_PROMOTED_SIGN (target)); @@ -6393,13 +6396,13 @@ count_type_elements (const_tree type, bool for_ctor_p) case OFFSET_TYPE: case REFERENCE_TYPE: case NULLPTR_TYPE: + case OPAQUE_TYPE: return 1; case ERROR_MARK: return 0; case VOID_TYPE: - case OPAQUE_TYPE: case METHOD_TYPE: case FUNCTION_TYPE: case LANG_TYPE: @@ -7640,8 +7643,7 @@ get_inner_reference (tree exp, poly_int64_pod *pbitsize, /* For vector fields re-check the target flags, as DECL_MODE could have been set with different target flags than the current function has. */ - if (mode == BLKmode - && VECTOR_TYPE_P (TREE_TYPE (field)) + if (VECTOR_TYPE_P (TREE_TYPE (field)) && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field)))) mode = TYPE_MODE (TREE_TYPE (field)); } @@ -8783,7 +8785,8 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, expanding_cond_expr_using_cmove = true; start_sequence (); expand_operands (treeop1, treeop2, - temp, &op1, &op2, EXPAND_NORMAL); + mode == orig_mode ? temp : NULL_RTX, &op1, &op2, + EXPAND_NORMAL); if (TREE_CODE (treeop0) == SSA_NAME && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison))) diff --git a/gcc/flags.h b/gcc/flags.h index a9381cf93f2e2..212e357a0fd24 100644 --- a/gcc/flags.h +++ b/gcc/flags.h @@ -40,6 +40,7 @@ unsigned int debug_set_count (uint32_t w_symbols); const char * debug_set_names (uint32_t w_symbols); +#ifndef GENERATOR_FILE /* Return true iff BTF debug info is enabled. */ extern bool btf_debuginfo_p (); @@ -54,12 +55,13 @@ extern bool ctf_debuginfo_p (); /* Return true iff DWARF2 debug info is enabled. */ -extern bool dwarf_debuginfo_p (); +extern bool dwarf_debuginfo_p (struct gcc_options *opts = &global_options); /* Return true iff the debug info format is to be generated based on DWARF DIEs (like CTF and BTF debug info formats). */ extern bool dwarf_based_debuginfo_p (); +#endif extern void strip_off_ending (char *, int); extern int base_of_path (const char *path, const char **base_out); diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc index a57ad0739fb02..d81a71c41a176 100644 --- a/gcc/fold-const.cc +++ b/gcc/fold-const.cc @@ -84,6 +84,7 @@ along with GCC; see the file COPYING3. If not see #include "vec-perm-indices.h" #include "asan.h" #include "gimple-range.h" +#include "internal-fn.h" /* Nonzero if we are folding constants inside an initializer or a C++ manifestly-constant-evaluated context; zero otherwise. @@ -3351,9 +3352,6 @@ operand_compare::operand_equal_p (const_tree arg0, const_tree arg1, if (compare_address && (flags & OEP_ADDRESS_OF_SAME_FIELD) == 0) { - if (TREE_OPERAND (arg0, 2) - || TREE_OPERAND (arg1, 2)) - return OP_SAME_WITH_NULL (2); tree field0 = TREE_OPERAND (arg0, 1); tree field1 = TREE_OPERAND (arg1, 1); @@ -3864,17 +3862,10 @@ operand_compare::hash_operand (const_tree t, inchash::hash &hstate, if (sflags & OEP_ADDRESS_OF) { hash_operand (TREE_OPERAND (t, 0), hstate, flags); - if (TREE_OPERAND (t, 2)) - hash_operand (TREE_OPERAND (t, 2), hstate, - flags & ~OEP_ADDRESS_OF); - else - { - tree field = TREE_OPERAND (t, 1); - hash_operand (DECL_FIELD_OFFSET (field), - hstate, flags & ~OEP_ADDRESS_OF); - hash_operand (DECL_FIELD_BIT_OFFSET (field), - hstate, flags & ~OEP_ADDRESS_OF); - } + hash_operand (DECL_FIELD_OFFSET (TREE_OPERAND (t, 1)), + hstate, flags & ~OEP_ADDRESS_OF); + hash_operand (DECL_FIELD_BIT_OFFSET (TREE_OPERAND (t, 1)), + hstate, flags & ~OEP_ADDRESS_OF); return; } break; @@ -6198,7 +6189,6 @@ static tree merge_truthop_with_opposite_arm (location_t loc, tree op, tree cmpop, bool rhs_only) { - tree type = TREE_TYPE (cmpop); enum tree_code code = TREE_CODE (cmpop); enum tree_code truthop_code = TREE_CODE (op); tree lhs = TREE_OPERAND (op, 0); @@ -6214,6 +6204,8 @@ merge_truthop_with_opposite_arm (location_t loc, tree op, tree cmpop, if (TREE_CODE_CLASS (code) != tcc_comparison) return NULL_TREE; + tree type = TREE_TYPE (TREE_OPERAND (cmpop, 0)); + if (rhs_code == truthop_code) { tree newrhs = merge_truthop_with_opposite_arm (loc, rhs, cmpop, rhs_only); @@ -7529,7 +7521,7 @@ tree_swap_operands_p (const_tree arg0, const_tree arg1) static tree fold_to_nonsharp_ineq_using_bound (location_t loc, tree ineq, tree bound) { - tree a, typea, type = TREE_TYPE (ineq), a1, diff, y; + tree a, typea, type = TREE_TYPE (bound), a1, diff, y; if (TREE_CODE (bound) == LT_EXPR) a = TREE_OPERAND (bound, 0); @@ -8432,6 +8424,8 @@ native_encode_initializer (tree init, unsigned char *ptr, int len, if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN) return 0; + if (TREE_CODE (val) == NON_LVALUE_EXPR) + val = TREE_OPERAND (val, 0); if (TREE_CODE (val) != INTEGER_CST) return 0; @@ -8849,11 +8843,13 @@ native_interpret_expr (tree type, const unsigned char *ptr, int len) valid values that GCC can't really represent accurately. See PR95450. Even for other modes, e.g. x86 XFmode can have some bit combinationations which GCC doesn't preserve. */ - unsigned char buf[24]; + unsigned char buf[24 * 2]; scalar_float_mode mode = SCALAR_FLOAT_TYPE_MODE (type); int total_bytes = GET_MODE_SIZE (mode); + memcpy (buf + 24, ptr, total_bytes); + clear_type_padding_in_mask (type, buf + 24); if (native_encode_expr (ret, buf, total_bytes, 0) != total_bytes - || memcmp (ptr, buf, total_bytes) != 0) + || memcmp (buf + 24, buf, total_bytes) != 0) return NULL_TREE; return ret; } @@ -9515,6 +9511,16 @@ fold_unary_loc (location_t loc, enum tree_code code, tree type, tree op0) > min_align_of_type (TREE_TYPE (TREE_TYPE (arg00))))) return NULL_TREE; + /* Similarly, avoid this optimization in GENERIC for -fsanitize=null + when type is a reference type and arg00's type is not, + because arg00 could be validly nullptr and if arg01 doesn't return, + we don't want false positive binding of reference to nullptr. */ + if (TREE_CODE (type) == REFERENCE_TYPE + && !in_gimple_form + && sanitize_flags_p (SANITIZE_NULL) + && TREE_CODE (TREE_TYPE (arg00)) != REFERENCE_TYPE) + return NULL_TREE; + arg00 = fold_convert_loc (loc, type, arg00); return fold_build_pointer_plus_loc (loc, arg00, arg01); } @@ -12026,11 +12032,15 @@ fold_binary_loc (location_t loc, enum tree_code code, tree type, { tem = fold_to_nonsharp_ineq_using_bound (loc, arg0, arg1); if (tem && !operand_equal_p (tem, arg0, 0)) - return fold_build2_loc (loc, code, type, tem, arg1); + return fold_convert (type, + fold_build2_loc (loc, code, TREE_TYPE (arg1), + tem, arg1)); tem = fold_to_nonsharp_ineq_using_bound (loc, arg1, arg0); if (tem && !operand_equal_p (tem, arg1, 0)) - return fold_build2_loc (loc, code, type, arg0, tem); + return fold_convert (type, + fold_build2_loc (loc, code, TREE_TYPE (arg0), + arg0, tem)); } if ((tem = fold_truth_andor (loc, code, type, arg0, arg1, op0, op1)) @@ -14267,7 +14277,7 @@ multiple_of_p (tree type, const_tree top, const_tree bottom, bool nowrap) && TREE_CODE (op2) == INTEGER_CST && integer_pow2p (bottom) && wi::multiple_of_p (wi::to_widest (op2), - wi::to_widest (bottom), UNSIGNED)) + wi::to_widest (bottom), SIGNED)) return 1; op1 = gimple_assign_rhs1 (stmt); @@ -14852,7 +14862,6 @@ tree_call_nonnegative_warnv_p (tree type, combined_fn fn, tree arg0, tree arg1, CASE_CFN_FFS: CASE_CFN_PARITY: CASE_CFN_POPCOUNT: - CASE_CFN_CLZ: CASE_CFN_CLRSB: case CFN_BUILT_IN_BSWAP16: case CFN_BUILT_IN_BSWAP32: @@ -14861,6 +14870,22 @@ tree_call_nonnegative_warnv_p (tree type, combined_fn fn, tree arg0, tree arg1, /* Always true. */ return true; + CASE_CFN_CLZ: + if (fn != CFN_CLZ) + return true; + else if (INTEGRAL_TYPE_P (TREE_TYPE (arg0))) + { + tree atype = TREE_TYPE (arg0); + int val = 0; + if (direct_internal_fn_supported_p (IFN_CLZ, atype, + OPTIMIZE_FOR_BOTH) + && CLZ_DEFINED_VALUE_AT_ZERO (SCALAR_INT_TYPE_MODE (atype), + val) == 2 + && val >= 0) + return true; + } + break; + CASE_CFN_SQRT: CASE_CFN_SQRT_FN: /* sqrt(-0.0) is -0.0. */ diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 9b6e55a0f352a..7cc60f769952f 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,1030 @@ +2025-01-13 Harald Anlauf + + Backported from master: + 2025-01-03 Harald Anlauf + + PR fortran/106692 + * trans-expr.cc (gfc_conv_expr_op): Inhibit excessive optimization + of Cray pointers by treating them as volatile in comparisons. + +2024-11-30 Paul Thomas + + Backported from master: + 2024-11-13 Paul Thomas + + PR fortran/105054 + * resolve.cc (get_temp_from_expr): If the pointer function has + a deferred character length, generate a new deferred charlen + for the temporary. + +2024-11-27 Paul Thomas + + Backported from master: + 2024-11-26 Paul Thomas + + PR fortran/117763 + * trans-array.cc (gfc_get_array_span): Guard against derefences + of 'expr'. Clean up some typos. Use 'gfc_get_vptr_from_expr' + for clarity and apply a functional reversion of last section + that deals with class dummies. + +2024-11-23 Paul Thomas + + Backported from master: + 2024-11-11 Paul Thomas + + PR fortran/109345 + * trans-array.cc (gfc_get_array_span): Unlimited polymorphic + expressions are now treated separately since the span need not + be the same as the element size. + +2024-11-01 Paul Thomas + + Backported from master: + 2024-10-25 Paul Thomas + + PR fortran/79685 + * decl.cc (match_data_constant): Find the symtree instead of + the symbol so the use renamed symbols are found. Pass this and + the derived type to gfc_match_structure_constructor. + * match.h: Update prototype of gfc_match_structure_contructor. + * primary.cc (gfc_match_structure_constructor): Remove call to + gfc_get_ha_sym_tree and use caller supplied symtree instead. + +2024-10-25 Paul Thomas + + Backported from master: + 2024-07-16 Paul Thomas + + PR fortran/84868 + * simplify.cc (gfc_simplify_len_trim): If the argument is an + element of a parameter array, simplify all the elements and + build a new parameter array to hold the result, after checking + that it doesn't already exist. + * trans-expr.cc (gfc_get_interface_mapping_array) if a string + length is available, use it for the typespec. + (gfc_add_interface_mapping): Supply the se string length. + +2024-09-20 Harald Anlauf + + Backported from master: + 2024-09-05 Harald Anlauf + + PR fortran/100273 + * trans-decl.cc (gfc_create_module_variable): Handle module + variable also when it is needed for the result specification + of a contained function. + +2024-08-05 Paul Thomas + + Backported from master: + 2024-07-18 Paul Thomas + + PR fortran/108889 + * gfortran.h: Add bit field 'allocated_in_scope' to gfc_symbol. + * trans-array.cc (gfc_array_allocate): Set 'allocated_in_scope' + after allocation if not a component reference. + (gfc_alloc_allocatable_for_assignment): If 'allocated_in_scope' + not set, not a component ref and not allocated, set the array + bounds and offset to give zero length in all dimensions. Then + set allocated_in_scope. + +2024-07-21 Harald Anlauf + + Backported from master: + 2024-07-19 Harald Anlauf + + PR fortran/103115 + * trans-array.cc (gfc_trans_array_constructor_value): If the first + element of an array constructor is deferred-length character and + therefore does not have an element size known at compile time, do + not try to collect subsequent constant elements into a constructor + for optimization. + +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-05-28 Tobias Burnus + + Backported from master: + 2024-05-20 Tobias Burnus + + PR fortran/115150 + * trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE + for zero-size arrays + +2024-05-06 Paul Thomas + + Backported from master: + 2024-04-02 Paul Thomas + + PR fortran/106999 + * interface.cc (gfc_compare_interfaces): Add error for a + subroutine proc pointer passed to a variable formal. + (compare_parameter): If a procedure pointer is being passed to + a non-procedure formal arg, and there is an an interface, use + gfc_compare_interfaces to check and provide a more useful error + message. + +2024-05-06 Paul Thomas + + Backported from master: + 2024-05-06 Paul Thomas + + PR fortran/114739 + * primary.cc (gfc_match_varspec): Check for default type before + checking for derived types with the right component name. + +2024-04-26 Paul Thomas + + Backported from master: + 2023-05-23 Paul Thomas + + PR fortran/103716 + * resolve.cc (gfc_resolve_ref): Conversion of array_ref into an + element should be done for all characters without a len expr, + not just deferred lens, and for integer expressions. + * trans-expr.cc (conv_inquiry): For len and kind inquiry refs, + set the se string_length to NULL_TREE. + +2024-04-26 Andre Vehreschild + + Backported from master: + 2023-07-12 Andre Vehreschild + + PR fortran/102003 + * expr.cc (find_inquiry_ref): Replace len of pdt_string by + constant. + (simplify_ref_chain): Ensure input to find_inquiry_ref is + NULL. + (gfc_match_init_expr): Prevent PDT analysis for function calls. + (gfc_pdt_find_component_copy_initializer): Get the initializer + value for given component. + * gfortran.h (gfc_pdt_find_component_copy_initializer): New + function. + * simplify.cc (gfc_simplify_len): Replace len() of PDT with pdt + component ref or constant. + +2024-04-06 Harald Anlauf + + Backported from master: + 2024-03-28 Harald Anlauf + + PR fortran/114474 + * primary.cc (gfc_variable_attr): Catch variables used in structure + constructors within DATA statements that are still tagged with a + temporary type BT_PROCEDURE from match_actual_arg and which have the + target attribute, and fix their typespec. + +2024-04-02 Mikael Morin + + Backported from master: + 2024-03-22 Mikael Morin + + PR fortran/107426 + * gfortran.h (gfc_save_module_list, gfc_restore_old_module_list): + New declarations. + * module.cc (old_module_list_tail): New global variable. + (gfc_save_module_list, gfc_restore_old_module_list): New functions. + (gfc_use_modules): Set module_list and old_module_list_tail. + * parse.cc (next_statement): Save module_list before doing any work. + (reject_statement): Restore module_list to its saved value. + +2024-03-29 Harald Anlauf + + Backported from master: + 2024-03-29 Harald Anlauf + + PR fortran/50410 + * trans-expr.cc (gfc_conv_structure): Check for NULL pointer. + +2024-03-20 Harald Anlauf + + Backported from master: + 2024-03-18 Harald Anlauf + + PR fortran/103715 + * frontend-passes.cc (check_externals_expr): Prevent invalid read + in case of mismatch of external subroutine with function. + +2024-02-09 Harald Anlauf + + Backported from master: + 2024-01-27 Harald Anlauf + + PR fortran/104908 + * trans-array.cc (gfc_conv_array_ref): Restrict use of transformed + descriptor (sym->backend_decl) to the unlimited polymorphic case. + +2023-12-01 Harald Anlauf + + Backported from master: + 2023-11-26 Harald Anlauf + + PR fortran/111880 + * resolve.cc (resolve_common_vars): Do not call gfc_add_in_common + for symbols that are USE associated or used in a submodule. + +2023-10-21 Harald Anlauf + + Backported from master: + 2023-10-17 Harald Anlauf + + PR fortran/111837 + * frontend-passes.cc (traverse_io_block): Dependency check of loop + nest shall be triangular, not banded. + +2023-08-06 Steve Kargl + + Backported from master: + 2022-12-18 Steve Kargl + + PR fortran/107397 + * decl.cc (add_init_expr_to_sym): Add check with new error message. + +2023-07-20 Harald Anlauf + + Backported from master: + 2023-07-17 Harald Anlauf + + PR fortran/95947 + PR fortran/110658 + * trans-expr.cc (gfc_conv_procedure_call): For intrinsic procedures + whose result characteristics depends on the first argument and which + can be of type character, the character length will not be deferred. + +2023-07-14 Harald Anlauf + + Backported from master: + 2023-07-11 Harald Anlauf + + PR fortran/110288 + * symbol.cc (gfc_copy_formal_args_intr): When deriving the formal + argument attributes from the actual ones for intrinsic procedure + calls, take special care of CHARACTER arguments that we do not + wrongly treat them formally as deferred-length. + +2023-07-08 Harald Anlauf + + Backported from master: + 2023-07-08 Harald Anlauf + + PR fortran/110585 + * arith.cc (gfc_compare_expr): Handle equality comparison of constant + complex gfc_expr arguments. + +2023-06-09 Jakub Jelinek + + Backported from master: + 2023-06-09 Jakub Jelinek + + PR fortran/96024 + * primary.cc (gfc_convert_to_structure_constructor): Only do + constant string ctor length verification and truncation/padding + if constant length has INTEGER type. + +2023-06-04 Steve Kargl + + Backported from master: + 2023-06-02 Steve Kargl + + PR fortran/100607 + * resolve.cc (resolve_select_rank): Remove duplicate error. + (resolve_fl_var_and_proc): Prevent NULL pointer dereference and + suppress error message for temporary. + +2023-05-20 Harald Anlauf + + Backported from master: + 2023-05-15 Harald Anlauf + + PR fortran/109846 + * expr.cc (gfc_check_vardef_context): Check appropriate pointer + attribute for CLASS vs. non-CLASS function result in variable + definition context. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-04-23 Harald Anlauf + + Backported from master: + 2023-04-12 Harald Anlauf + + PR fortran/61615 + PR fortran/99982 + * interface.cc (compare_parameter): Enable type and rank checks for + arguments of derived type from the intrinsic module ISO_C_BINDING. + +2023-04-23 Harald Anlauf + + Backported from master: + 2022-12-07 Harald Anlauf + + PR fortran/108010 + * arith.cc (reduce_unary): Handle zero-sized arrays. + (reduce_binary_aa): Likewise. + +2023-04-15 Harald Anlauf + + Backported from master: + 2023-04-14 Harald Anlauf + + PR fortran/109511 + * simplify.cc (gfc_simplify_set_exponent): Fix implementation of + compile-time simplification of intrinsic SET_EXPONENT for argument + X < 1 and for I < 0. + +2023-04-02 Thomas Koenig + + * dump-parse-tree.cc (get_c_type_name): Fix "long_long" + type name to be "long long". + +2023-03-30 Andrew Pinski + + * dump-parse-tree.cc (get_c_type_name): Fix "long_long" + type name to be "long long". Add a comment on why adding + 2 to the name too. + +2023-03-27 Harald Anlauf + + Backported from master: + 2023-03-05 Harald Anlauf + Tobias Burnus + + PR fortran/106856 + * class.cc (gfc_build_class_symbol): Handle update of attributes of + existing class container. + (gfc_find_derived_vtab): Fix several memory leaks. + (find_intrinsic_vtab): Ditto. + * decl.cc (attr_decl1): Manage update of symbol attributes from + CLASS attributes. + * primary.cc (gfc_variable_attr): OPTIONAL shall not be taken or + updated from the class container. + * symbol.cc (free_old_symbol): Adjust management of symbol versions + to not prematurely free array specs while working on the declation + of CLASS variables. + +2023-03-27 Harald Anlauf + + Backported from master: + 2022-12-08 Harald Anlauf + + PR fortran/108025 + * symbol.cc (gfc_add_contiguous): Diagnose and reject duplicate + CONTIGUOUS attribute. + +2023-03-27 Jerry DeLisle + + PR fortran/102331 + * decl.cc (attr_decl1): Guard against NULL pointer. + * parse.cc (match_deferred_characteristics): Include BT_CLASS in check + for derived being undefined. + +2023-03-27 Jerry DeLisle + + Backported from master: + 2023-01-29 Jerry DeLisle + + PR fortran/103506 + * parse.cc (parse_module): Remove use of a bool error value + that prevented proper setting of the namespace pointer. + +2023-03-22 Harald Anlauf + + Backported from master: + 2023-03-21 Harald Anlauf + + PR fortran/99036 + * decl.cc (gfc_match_modproc): Reject MODULE PROCEDURE if not in a + generic module interface. + +2023-03-22 Harald Anlauf + + Backported from master: + 2023-03-20 Harald Anlauf + + PR fortran/109186 + * simplify.cc (gfc_simplify_nearest): Fix off-by-one error in setting + up real kind-specific maximum exponent for mpfr. + +2023-03-22 Harald Anlauf + + Backported from master: + 2023-03-19 Harald Anlauf + + PR fortran/85877 + * resolve.cc (resolve_fl_procedure): Check for an explicit interface + of procedures with the BIND(C) attribute (F2018:15.4.2.2). + +2023-03-20 Paul Thomas + + PR fortran/87127 + * resolve.cc (check_host_association): If an external function + is typed but not declared explicitly to be external, change the + old symbol from a variable to an external function. + +2023-03-15 Harald Anlauf + + Backported from master: + 2023-03-11 Harald Anlauf + + PR fortran/106945 + * trans-expr.cc (gfc_copy_class_to_class): Convert element counts in + bounds check to common type for comparison. + +2023-03-15 Harald Anlauf + + Backported from master: + 2023-03-10 Harald Anlauf + + PR fortran/104332 + * resolve.cc (resolve_symbol): Avoid NULL pointer dereference while + checking a symbol with the BIND(C) attribute. + +2023-03-12 Mikael Morin + + Backported from master: + 2023-02-25 Mikael Morin + + PR fortran/108923 + * intrinsic.cc (get_intrinsic_dummy_arg, + set_intrinsic_dummy_arg): Rename the former to the latter. + Remove the return value, add a reference to the lhs as argument, + and do the pointer assignment inside the function. Don't do + it if the pointer is already non-NULL. + (sort_actual): Update caller. + +2023-03-12 Mikael Morin + + Backported from master: + 2023-02-24 Mikael Morin + + PR fortran/108923 + * expr.cc (gfc_free_actual_arglist): Free associated_dummy + memory. + (gfc_copy_actual_arglist): Make a copy of the associated_dummy + field if it is set in the original element. + +2023-03-08 Tobias Burnus + + Backported from master: + 2023-03-01 Tobias Burnus + + PR middle-end/108546 + * trans-openmp.cc (gfc_trans_omp_clauses): Fix mapping of + type(C_ptr) variables. + +2023-03-04 Harald Anlauf + + Backported from master: + 2023-02-27 Harald Anlauf + + PR fortran/108937 + * trans-intrinsic.cc (gfc_conv_intrinsic_ibits): Handle corner case + LEN argument of IBITS equal to BITSIZE(I). + +2023-03-04 Harald Anlauf + + Backported from master: + 2023-02-22 Harald Anlauf + + PR fortran/96024 + * resolve.cc (resolve_component): The type of a CHARACTER length + expression must be INTEGER. + +2023-03-04 Harald Anlauf + + Backported from master: + 2023-02-21 Harald Anlauf + + PR fortran/96025 + * parse.cc (check_function_result_typed): Improve type check of + specification expression for character length and return status. + (parse_spec): Use status from above. + * resolve.cc (resolve_fntype): Prevent use of invalid specification + expression for character length. + +2023-02-16 Steve Kargl + + Backported from master: + 2023-02-15 Steve Kargl + + PR fortran/104554 + * resolve.cc (check_assumed_size_reference): Avoid NULL pointer + dereference. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-02-03 Jakub Jelinek + + PR fortran/108451 + * trans-decl.cc (gfc_trans_use_stmts): Call clear_slot before + doing continue. + +2023-02-10 Jakub Jelinek + + Backported from master: + 2023-01-11 Jakub Jelinek + + PR fortran/108349 + * f95-lang.cc (gfc_init_builtin_function): Fix up function types + for BUILT_IN_REALLOC and BUILT_IN_SINCOS{F,,L}. Formatting fixes. + +2023-02-09 Steve Kargl + + Backported from master: + 2023-02-08 Steve Kargl + + PR fortran/103259 + * resolve.cc (resolve_common_vars): Avoid NULL pointer dereference + when a symbol's location is not set. + +2023-02-08 Harald Anlauf + + Backported from master: + 2023-02-07 Harald Anlauf + + PR fortran/95107 + * trans-decl.cc (gfc_finish_var_decl): With -fno-automatic, do not + make ASSOCIATE variables TREE_STATIC. + +2023-02-05 Mikael Morin + + Backported from master: + 2023-01-29 Mikael Morin + + PR fortran/108450 + * check.cc (gfc_check_minloc_maxloc): Explicitly set argument name. + (gfc_check_findloc): Ditto. + +2023-02-05 Harald Anlauf + + Backported from master: + 2023-02-01 Harald Anlauf + + PR fortran/108609 + * expr.cc (find_array_section): Add check to prevent interpreting an + mpz non-integer constant as an integer. + +2023-02-05 Harald Anlauf + + Backported from master: + 2023-01-28 Harald Anlauf + Steven G. Kargl + + PR fortran/108527 + * resolve.cc (compare_bound_int): Expression to compare must be of + type INTEGER. + (compare_bound_mpz_t): Likewise. + (check_dimension): Fix comment on checks applied to array section + and clean up associated logic. + +2023-02-02 Harald Anlauf + + Backported from master: + 2023-01-28 Harald Anlauf + + PR fortran/108453 + * match.cc (gfc_match_common): A USE associated name shall not appear + in a COMMON block (F2018:C8121). + +2023-01-30 Tobias Burnus + + Backported from master: + 2023-01-27 Tobias Burnus + + PR fortran/108558 + * trans-openmp.cc (gfc_split_omp_clauses): Handle has_device_addr. + +2023-01-28 Harald Anlauf + + Backported from master: + 2023-01-24 Harald Anlauf + + PR fortran/108529 + * simplify.cc (simplify_transformation): Do not try to simplify + transformational intrinsic when the ARRAY argument has a NULL shape. + +2023-01-28 Harald Anlauf + + Backported from master: + 2022-07-14 Harald Anlauf + Steven G. Kargl + + PR fortran/106209 + * decl.cc (add_init_expr_to_sym): Handle bad initializers for + implied-shape arrays. + +2023-01-28 Harald Anlauf + + Backported from master: + 2023-01-17 Harald Anlauf + + PR fortran/108421 + * interface.cc (get_expr_storage_size): Check that we actually have + an integer value before trying to extract it with mpz_get_si. + +2023-01-28 Harald Anlauf + + Backported from master: + 2023-01-23 Harald Anlauf + + PR fortran/108420 + * iresolve.cc (check_charlen_present): Preserve character length if + there is no array constructor. + +2023-01-28 Harald Anlauf + + Backported from master: + 2023-01-23 Harald Anlauf + + PR fortran/108501 + * interface.cc (get_expr_storage_size): Check array subscript triplets + that we actually have integer values before trying to extract with + mpz_get_si. + +2023-01-28 Harald Anlauf + + Backported from master: + 2023-01-23 Harald Anlauf + + PR fortran/108502 + * dependency.cc (gfc_check_dependency): Prevent NULL pointer + dereference while recursively checking expressions. + +2023-01-23 Harald Anlauf + + Backported from master: + 2023-01-19 Harald Anlauf + + PR fortran/108434 + * expr.cc (class_allocatable): Prevent NULL pointer dereference + or invalid read. + (class_pointer): Likewise. + +2023-01-21 Jerry DeLisle + + PR fortran/106731 + * trans-array.cc (gfc_trans_auto_array_allocation): Remove gcc_assert (!TREE_STATIC()). + +2022-12-28 Harald Anlauf + + Backported from master: + 2022-12-23 Harald Anlauf + + PR fortran/108131 + * array.cc (match_array_element_spec): Avoid too early simplification + of matched array element specs that can lead to a misinterpretation + when used as array bounds in array declarations. + +2022-12-18 Paul Thomas + + Backported from master: + 2022-12-09 Paul Thomas + + PR fortran/107872 + * resolve.cc (derived_inaccessible): Skip over allocatable components + to prevent an infinite loop. + +2022-11-25 Harald Anlauf + + Backported from master: + 2022-11-18 Harald Anlauf + + PR fortran/107576 + * interface.cc (gfc_procedure_use): Reject NULL as actual argument + when there is no explicit procedure interface. + +2022-10-29 José Rui Faustino de Sousa + + Backported from master: + 2022-10-21 José Rui Faustino de Sousa + + PR fortran/100097 + PR fortran/100098 + * trans-array.cc (gfc_trans_class_array): New function to + initialize class descriptor's TKR information. + * trans-array.h (gfc_trans_class_array): Add function prototype. + * trans-decl.cc (gfc_trans_deferred_vars): Add calls to the new + function for both pointers and allocatables. + +2022-10-28 Harald Anlauf + + Backported from master: + 2022-10-26 Harald Anlauf + + PR fortran/103413 + * symbol.cc (gfc_type_compatible): A boz-literal-constant has no type + and thus is not considered compatible to any type. + +2022-10-23 Harald Anlauf + + Backported from master: + 2022-10-20 Harald Anlauf + Steven G. Kargl + + PR fortran/105633 + * expr.cc (find_array_section): Move check for NULL pointers so + that both subscript triplets and vector subscripts are covered. + +2022-10-12 Mikael Morin + + Backported from master: + 2022-09-25 Mikael Morin + + PR fortran/106817 + * trans-expr.cc (gfc_conv_procedure_call): Collect all clobbers + to their own separate block. Append the block of clobbers to + the procedure preliminary block after the argument evaluation + codes for all the arguments. + +2022-10-12 Mikael Morin + + Backported from master: + 2022-09-25 Mikael Morin + + PR fortran/105012 + * trans-expr.cc (gfc_conv_procedure_call): Retrieve variable + from the just calculated variable reference. + +2022-10-12 Mikael Morin + + Backported from master: + 2022-09-25 Mikael Morin + + * trans.h (gfc_conv_expr_reference): Remove add_clobber + argument. + * trans-expr.cc (gfc_conv_expr_reference): Ditto. Inline code + depending on add_clobber and conditions controlling it ... + (gfc_conv_procedure_call): ... to here. + +2022-10-08 José Rui Faustino de Sousa + + Backported from master: + 2022-10-01 José Rui Faustino de Sousa + + PR fortran/100040 + PR fortran/100029 + * trans-expr.cc (gfc_conv_class_to_class): Add code to have + assumed-rank arrays recognized as full arrays and fix the type + of the array assignment. + (gfc_conv_procedure_call): Change order of code blocks such that + the free of ALLOCATABLE dummy arguments with INTENT(OUT) occurs + first. + +2022-10-01 José Rui Faustino de Sousa + + Backported from master: + 2022-09-22 José Rui Faustino de Sousa + + PR fortran/100103 + * trans-array.cc (gfc_is_reallocatable_lhs): Add select rank + temporary associate names as possible targets of automatic + reallocation. + +2022-10-01 José Rui Faustino de Sousa + + Backported from master: + 2022-09-20 José Rui Faustino de Sousa + + PR fortran/100132 + * trans-types.cc (create_fn_spec): Fix function attributes when + passing polymorphic pointers. + +2022-09-29 Harald Anlauf + + Backported from master: + 2022-09-27 Harald Anlauf + + PR fortran/107054 + * simplify.cc (gfc_simplify_unpack): Replace assert by condition + that terminates simplification when there are not enough elements + in the constructor of argument VECTOR. + +2022-09-29 Harald Anlauf + + Backported from master: + 2022-09-22 Harald Anlauf + + PR fortran/82868 + * trans-decl.cc (generate_coarray_sym_init): Skip symbol + if attr.associate_var. + +2022-09-29 Harald Anlauf + + Backported from master: + 2022-09-20 Harald Anlauf + + PR fortran/106985 + * expr.cc (gfc_simplify_expr): Avoid NULL pointer dereference. + +2022-09-22 Harald Anlauf + + Backported from master: + 2022-09-20 Harald Anlauf + + PR fortran/106986 + * simplify.cc (gfc_simplify_findloc): Do not try to simplify + intrinsic FINDLOC when the ARRAY argument has a NULL shape. + +2022-09-16 Harald Anlauf + + Backported from master: + 2022-09-15 Harald Anlauf + + PR fortran/106857 + * simplify.cc (gfc_simplify_pack): Check for NULL pointer dereferences + while walking through constructors (error recovery). + +2022-09-16 José Rui Faustino de Sousa + + Backported from master: + 2022-09-03 José Rui Faustino de Sousa + + PR fortran/100245 + * trans-expr.cc (trans_class_assignment): Add if clause to handle + derived type in the LHS. + +2022-09-05 José Rui Faustino de Sousa + + Backported from master: + 2022-09-04 José Rui Faustino de Sousa + + PR fortran/100136 + * trans-expr.cc (gfc_conv_procedure_call): Add handling of pointer + expressions. + +2022-08-30 Tobias Burnus + + Backported from master: + 2022-08-25 Tobias Burnus + + * parse.cc (parse_omp_structured_block): When parsing strictly + structured blocks, issue an error if the end-directive comes + before the 'end block'. + +2022-08-29 Jakub Jelinek + + Backported from master: + 2022-08-26 Jakub Jelinek + + PR fortran/106579 + * trans-intrinsic.cc: Include realmpfr.h. + (conv_intrinsic_ieee_value): New function. + (gfc_conv_ieee_arithmetic_function): Handle ieee_value. + +2022-08-29 Jakub Jelinek + + Backported from master: + 2022-08-26 Jakub Jelinek + + PR fortran/106579 + * f95-lang.cc (gfc_init_builtin_functions): Initialize + BUILT_IN_FPCLASSIFY. + * libgfortran.h (IEEE_OTHER_VALUE, IEEE_SIGNALING_NAN, + IEEE_QUIET_NAN, IEEE_NEGATIVE_INF, IEEE_NEGATIVE_NORMAL, + IEEE_NEGATIVE_DENORMAL, IEEE_NEGATIVE_SUBNORMAL, + IEEE_NEGATIVE_ZERO, IEEE_POSITIVE_ZERO, IEEE_POSITIVE_DENORMAL, + IEEE_POSITIVE_SUBNORMAL, IEEE_POSITIVE_NORMAL, IEEE_POSITIVE_INF): + New enum. + * trans-intrinsic.cc (conv_intrinsic_ieee_class): New function. + (gfc_conv_ieee_arithmetic_function): Handle ieee_class. + +2022-08-26 Harald Anlauf + + Backported from master: + 2022-08-24 Harald Anlauf + + PR fortran/103694 + * simplify.cc (simplify_size): The size expression of an array cannot + be simplified if an error occurs while resolving the array spec. + +2022-08-23 Tobias Burnus + + Backported from master: + 2022-08-17 Tobias Burnus + + PR fortran/106566 + * openmp.cc (gfc_match_omp_declare_simd): Accept module procedures. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-07-26 Harald Anlauf + + Backported from master: + 2022-07-26 Harald Anlauf + + PR fortran/103504 + * interface.cc (get_sym_storage_size): Array bounds and character + length can only be of integer type. + +2022-07-20 Harald Anlauf + + Backported from master: + 2022-07-20 Harald Anlauf + + PR fortran/101330 + * openmp.cc (gfc_match_iterator): Remove left-over code from + development that could lead to a crash on invalid input. + +2022-07-16 Steve Kargl + + Backported from master: + 2022-07-15 Steve Kargl + + PR fortran/104313 + * trans-decl.cc (gfc_generate_return): Do not generate conflicting + fake results for functions with no result variable under -ff2c. + +2022-07-03 Harald Anlauf + + Backported from master: + 2022-06-30 Harald Anlauf + Steven G. Kargl + + PR fortran/103137 + PR fortran/103138 + PR fortran/103693 + PR fortran/105243 + * decl.cc (gfc_match_data_decl): Reject CLASS entity declaration + when it is given the PARAMETER attribute. + +2022-07-03 Harald Anlauf + + Backported from master: + 2022-06-29 Harald Anlauf + Steven G. Kargl + + PR fortran/106121 + * simplify.cc (gfc_simplify_extends_type_of): Do not attempt to + simplify when one of the arguments is a CLASS variable that was + not properly declared. + +2022-06-30 Harald Anlauf + + Backported from master: + 2022-06-26 Harald Anlauf + + PR fortran/105954 + * decl.cc (variable_decl): Adjust upper bounds for explicit-shape + specs with constant bound expressions to ensure non-negative + extents. + +2022-06-30 Harald Anlauf + + Backported from master: + 2022-06-26 Harald Anlauf + + PR fortran/105691 + * simplify.cc (gfc_simplify_index): Replace old simplification + code by the equivalent of the runtime library implementation. Use + HOST_WIDE_INT instead of int for string index, length variables. + +2022-06-30 Harald Anlauf + + Backported from master: + 2022-06-24 Harald Anlauf + + PR fortran/105813 + * check.cc (gfc_check_unpack): Try to simplify MASK argument to + UNPACK so that checking of the VECTOR argument can work when MASK + is a variable. + +2022-05-13 Harald Anlauf + + Backported from master: + 2022-05-11 Harald Anlauf + Steven G. Kargl + + PR fortran/105230 + * expr.cc (find_array_section): Correct logic to avoid NULL + pointer dereference on invalid array section. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + +2022-05-02 Thomas Koenig + + Backported from master: + 2022-04-29 Thomas Koenig + + * gfortran.texi: Fix exchanged period and letter. + +2022-04-28 Thomas Koenig + + Backported from master: + 2022-04-28 Thomas Koenig + + * gfortran.texi: Mention r16_ieee and r16_ibm. + * invoke.texi: Likewise. + 2022-04-27 Mikael Morin PR fortran/103662 diff --git a/gcc/fortran/arith.cc b/gcc/fortran/arith.cc index d57059a375fea..bdde333293e44 100644 --- a/gcc/fortran/arith.cc +++ b/gcc/fortran/arith.cc @@ -1080,6 +1080,11 @@ gfc_compare_expr (gfc_expr *op1, gfc_expr *op2, gfc_intrinsic_op op) || (op1->value.logical && !op2->value.logical)); break; + case BT_COMPLEX: + gcc_assert (op == INTRINSIC_EQ); + rc = mpc_cmp (op1->value.complex, op2->value.complex); + break; + default: gfc_internal_error ("gfc_compare_expr(): Bad basic type"); } @@ -1281,8 +1286,16 @@ reduce_unary (arith (*eval) (gfc_expr *, gfc_expr **), gfc_expr *op, else { gfc_constructor *c = gfc_constructor_first (head); - r = gfc_get_array_expr (c->expr->ts.type, c->expr->ts.kind, - &op->where); + if (c == NULL) + { + /* Handle zero-sized arrays. */ + r = gfc_get_array_expr (op->ts.type, op->ts.kind, &op->where); + } + else + { + r = gfc_get_array_expr (c->expr->ts.type, c->expr->ts.kind, + &op->where); + } r->shape = gfc_copy_shape (op->shape, op->rank); r->rank = op->rank; r->value.constructor = head; @@ -1435,8 +1448,16 @@ reduce_binary_aa (arith (*eval) (gfc_expr *, gfc_expr *, gfc_expr **), else { gfc_constructor *c = gfc_constructor_first (head); - r = gfc_get_array_expr (c->expr->ts.type, c->expr->ts.kind, - &op1->where); + if (c == NULL) + { + /* Handle zero-sized arrays. */ + r = gfc_get_array_expr (op1->ts.type, op1->ts.kind, &op1->where); + } + else + { + r = gfc_get_array_expr (c->expr->ts.type, c->expr->ts.kind, + &op1->where); + } r->shape = gfc_copy_shape (op1->shape, op1->rank); r->rank = op1->rank; r->value.constructor = head; diff --git a/gcc/fortran/array.cc b/gcc/fortran/array.cc index bbdb5b392fc86..f4003c2a2fe2c 100644 --- a/gcc/fortran/array.cc +++ b/gcc/fortran/array.cc @@ -499,8 +499,6 @@ match_array_element_spec (gfc_array_spec *as) if (!gfc_expr_check_typed (*upper, gfc_current_ns, false)) return AS_UNKNOWN; - gfc_try_simplify_expr (*upper, 0); - if (((*upper)->expr_type == EXPR_CONSTANT && (*upper)->ts.type != BT_INTEGER) || ((*upper)->expr_type == EXPR_FUNCTION @@ -533,8 +531,6 @@ match_array_element_spec (gfc_array_spec *as) if (!gfc_expr_check_typed (*upper, gfc_current_ns, false)) return AS_UNKNOWN; - gfc_try_simplify_expr (*upper, 0); - if (((*upper)->expr_type == EXPR_CONSTANT && (*upper)->ts.type != BT_INTEGER) || ((*upper)->expr_type == EXPR_FUNCTION diff --git a/gcc/fortran/check.cc b/gcc/fortran/check.cc index 0c2cb50c6a7cd..ca7cef666a7ff 100644 --- a/gcc/fortran/check.cc +++ b/gcc/fortran/check.cc @@ -3888,6 +3888,7 @@ gfc_check_minloc_maxloc (gfc_actual_arglist *ap) { b = gfc_get_logical_expr (gfc_logical_4_kind, NULL, 0); ap->next->next->next->next->expr = b; + ap->next->next->next->next->name = gfc_get_string ("back"); } if (m == NULL && d != NULL && d->ts.type == BT_LOGICAL @@ -3969,6 +3970,7 @@ gfc_check_findloc (gfc_actual_arglist *ap) { b = gfc_get_logical_expr (gfc_logical_4_kind, NULL, 0); ap->next->next->next->next->next->expr = b; + ap->next->next->next->next->next->name = gfc_get_string ("back"); } if (m == NULL && d != NULL && d->ts.type == BT_LOGICAL @@ -6353,6 +6355,8 @@ gfc_check_unpack (gfc_expr *vector, gfc_expr *mask, gfc_expr *field) if (!same_type_check (vector, 0, field, 2)) return false; + gfc_simplify_expr (mask, 0); + if (mask->expr_type == EXPR_ARRAY && gfc_array_size (vector, &vector_size)) { diff --git a/gcc/fortran/class.cc b/gcc/fortran/class.cc index 731e9b0fe6a8d..e5700d7aa507d 100644 --- a/gcc/fortran/class.cc +++ b/gcc/fortran/class.cc @@ -638,6 +638,7 @@ gfc_build_class_symbol (gfc_typespec *ts, symbol_attribute *attr, { char tname[GFC_MAX_SYMBOL_LEN+1]; char *name; + gfc_typespec *orig_ts = ts; gfc_symbol *fclass; gfc_symbol *vtab; gfc_component *c; @@ -646,9 +647,21 @@ gfc_build_class_symbol (gfc_typespec *ts, symbol_attribute *attr, gcc_assert (as); - if (attr->class_ok) - /* Class container has already been built. */ + /* Class container has already been built with same name. */ + if (attr->class_ok + && ts->u.derived->components->attr.dimension >= attr->dimension + && ts->u.derived->components->attr.codimension >= attr->codimension + && ts->u.derived->components->attr.class_pointer >= attr->pointer + && ts->u.derived->components->attr.allocatable >= attr->allocatable) return true; + if (attr->class_ok) + { + attr->dimension |= ts->u.derived->components->attr.dimension; + attr->codimension |= ts->u.derived->components->attr.codimension; + attr->pointer |= ts->u.derived->components->attr.class_pointer; + attr->allocatable |= ts->u.derived->components->attr.allocatable; + ts = &ts->u.derived->components->ts; + } attr->class_ok = attr->dummy || attr->pointer || attr->allocatable || attr->select_type_temporary || attr->associate_var; @@ -790,7 +803,7 @@ gfc_build_class_symbol (gfc_typespec *ts, symbol_attribute *attr, } fclass->attr.is_class = 1; - ts->u.derived = fclass; + orig_ts->u.derived = fclass; attr->allocatable = attr->pointer = attr->dimension = attr->codimension = 0; (*as) = NULL; free (name); @@ -2344,6 +2357,7 @@ gfc_find_derived_vtab (gfc_symbol *derived) vtab->attr.vtab = 1; vtab->attr.access = ACCESS_PUBLIC; gfc_set_sym_referenced (vtab); + free (name); name = xasprintf ("__vtype_%s", tname); gfc_find_symbol (name, ns, 0, &vtype); @@ -2447,6 +2461,7 @@ gfc_find_derived_vtab (gfc_symbol *derived) else { /* Construct default initialization variable. */ + free (name); name = xasprintf ("__def_init_%s", tname); gfc_get_symbol (name, ns, &def_init); def_init->attr.target = 1; @@ -2480,6 +2495,7 @@ gfc_find_derived_vtab (gfc_symbol *derived) ns->contained = sub_ns; sub_ns->resolved = 1; /* Set up procedure symbol. */ + free (name); name = xasprintf ("__copy_%s", tname); gfc_get_symbol (name, sub_ns, ©); sub_ns->proc_name = copy; @@ -2558,6 +2574,7 @@ gfc_find_derived_vtab (gfc_symbol *derived) ns->contained = sub_ns; sub_ns->resolved = 1; /* Set up procedure symbol. */ + free (name); name = xasprintf ("__deallocate_%s", tname); gfc_get_symbol (name, sub_ns, &dealloc); sub_ns->proc_name = dealloc; @@ -2723,6 +2740,7 @@ find_intrinsic_vtab (gfc_typespec *ts) vtab->attr.vtab = 1; vtab->attr.access = ACCESS_PUBLIC; gfc_set_sym_referenced (vtab); + free (name); name = xasprintf ("__vtype_%s", tname); gfc_find_symbol (name, ns, 0, &vtype); @@ -2801,6 +2819,7 @@ find_intrinsic_vtab (gfc_typespec *ts) c->tb = XCNEW (gfc_typebound_proc); c->tb->ppc = 1; + free (name); if (ts->type != BT_CHARACTER) name = xasprintf ("__copy_%s", tname); else diff --git a/gcc/fortran/decl.cc b/gcc/fortran/decl.cc index bd586e75008ff..8c101b0daf795 100644 --- a/gcc/fortran/decl.cc +++ b/gcc/fortran/decl.cc @@ -376,6 +376,7 @@ match_data_constant (gfc_expr **result) gfc_expr *expr; match m; locus old_loc; + gfc_symtree *symtree; m = gfc_match_literal_constant (&expr, 1); if (m == MATCH_YES) @@ -435,9 +436,11 @@ match_data_constant (gfc_expr **result) if (m != MATCH_YES) return m; - if (gfc_find_symbol (name, NULL, 1, &sym)) + if (gfc_find_sym_tree (name, NULL, 1, &symtree)) return MATCH_ERROR; + sym = symtree->n.sym; + if (sym && sym->attr.generic) dt_sym = gfc_find_dt_in_generic (sym); @@ -451,7 +454,7 @@ match_data_constant (gfc_expr **result) return MATCH_ERROR; } else if (dt_sym && gfc_fl_struct (dt_sym->attr.flavor)) - return gfc_match_structure_constructor (dt_sym, result); + return gfc_match_structure_constructor (dt_sym, symtree, result); /* Check to see if the value is an initialization array expression. */ if (sym->value->expr_type == EXPR_ARRAY) @@ -2129,10 +2132,21 @@ add_init_expr_to_sym (const char *name, gfc_expr **initp, locus *var_locus) /* The shape may be NULL for EXPR_ARRAY, set it. */ if (init->shape == NULL) { - gcc_assert (init->expr_type == EXPR_ARRAY); + if (init->expr_type != EXPR_ARRAY) + { + gfc_error ("Bad shape of initializer at %L", &init->where); + return false; + } + init->shape = gfc_get_shape (1); if (!gfc_array_size (init, &init->shape[0])) - gfc_internal_error ("gfc_array_size failed"); + { + gfc_error ("Cannot determine shape of initializer at %L", + &init->where); + free (init->shape); + init->shape = NULL; + return false; + } } for (dim = 0; dim < sym->as->rank; ++dim) @@ -2209,6 +2223,14 @@ add_init_expr_to_sym (const char *name, gfc_expr **initp, locus *var_locus) sym->ts.f90_type = init->ts.f90_type; } + /* Catch the case: type(t), parameter :: x = z'1'. */ + if (sym->ts.type == BT_DERIVED && init->ts.type == BT_BOZ) + { + gfc_error ("Entity %qs at %L is incompatible with a BOZ " + "literal constant", name, &sym->declared_at); + return false; + } + /* Add initializer. Make sure we keep the ranks sane. */ if (sym->attr.dimension && init->rank == 0) { @@ -2775,6 +2797,18 @@ variable_decl (int elem) else gfc_free_expr (n); } + /* For an explicit-shape spec with constant bounds, ensure + that the effective upper bound is not lower than the + respective lower bound minus one. Otherwise adjust it so + that the extent is trivially derived to be zero. */ + if (as->lower[i]->expr_type == EXPR_CONSTANT + && as->upper[i]->expr_type == EXPR_CONSTANT + && as->lower[i]->ts.type == BT_INTEGER + && as->upper[i]->ts.type == BT_INTEGER + && mpz_cmp (as->upper[i]->value.integer, + as->lower[i]->value.integer) < 0) + mpz_sub_ui (as->upper[i]->value.integer, + as->lower[i]->value.integer, 1); } } } @@ -6250,6 +6284,14 @@ gfc_match_data_decl (void) goto cleanup; } + /* F2018:C708. */ + if (current_ts.type == BT_CLASS && current_attr.flavor == FL_PARAMETER) + { + gfc_error ("CLASS entity at %C cannot have the PARAMETER attribute"); + m = MATCH_ERROR; + goto cleanup; + } + if (current_ts.type == BT_CLASS && current_ts.u.derived->attr.unlimited_polymorphic) goto ok; @@ -8696,43 +8738,23 @@ attr_decl1 (void) } } - /* Update symbol table. DIMENSION attribute is set in - gfc_set_array_spec(). For CLASS variables, this must be applied - to the first component, or '_data' field. */ - if (sym->ts.type == BT_CLASS && sym->ts.u.derived->attr.is_class) - { - /* gfc_set_array_spec sets sym->attr not CLASS_DATA(sym)->attr. Check - for duplicate attribute here. */ - if (CLASS_DATA(sym)->attr.dimension == 1 && as) - { - gfc_error ("Duplicate DIMENSION attribute at %C"); - m = MATCH_ERROR; - goto cleanup; - } - - if (!gfc_copy_attr (&CLASS_DATA(sym)->attr, ¤t_attr, &var_locus)) - { - m = MATCH_ERROR; - goto cleanup; - } - } - else + if (sym->ts.type == BT_CLASS + && sym->ts.u.derived + && sym->ts.u.derived->attr.is_class) { - if (current_attr.dimension == 0 && current_attr.codimension == 0 - && !gfc_copy_attr (&sym->attr, ¤t_attr, &var_locus)) - { - m = MATCH_ERROR; - goto cleanup; - } + sym->attr.pointer = CLASS_DATA(sym)->attr.class_pointer; + sym->attr.allocatable = CLASS_DATA(sym)->attr.allocatable; + sym->attr.dimension = CLASS_DATA(sym)->attr.dimension; + sym->attr.codimension = CLASS_DATA(sym)->attr.codimension; + if (CLASS_DATA (sym)->as) + sym->as = gfc_copy_array_spec (CLASS_DATA (sym)->as); } - - if (sym->ts.type == BT_CLASS - && !gfc_build_class_symbol (&sym->ts, &sym->attr, &sym->as)) + if (current_attr.dimension == 0 && current_attr.codimension == 0 + && !gfc_copy_attr (&sym->attr, ¤t_attr, &var_locus)) { m = MATCH_ERROR; goto cleanup; } - if (!gfc_set_array_spec (sym, as, &var_locus)) { m = MATCH_ERROR; @@ -8761,6 +8783,24 @@ attr_decl1 (void) goto cleanup; } + if (sym->ts.type == BT_CLASS && sym->ts.u.derived->attr.is_class + && !as && !current_attr.pointer && !current_attr.allocatable + && !current_attr.external) + { + sym->attr.pointer = 0; + sym->attr.allocatable = 0; + sym->attr.dimension = 0; + sym->attr.codimension = 0; + gfc_free_array_spec (sym->as); + sym->as = NULL; + } + else if (sym->ts.type == BT_CLASS + && !gfc_build_class_symbol (&sym->ts, &sym->attr, &sym->as)) + { + m = MATCH_ERROR; + goto cleanup; + } + add_hidden_procptr_result (sym); return MATCH_YES; @@ -9953,9 +9993,10 @@ gfc_match_modproc (void) gfc_namespace *module_ns; gfc_interface *old_interface_head, *interface; - if ((gfc_state_stack->state != COMP_INTERFACE - && gfc_state_stack->state != COMP_CONTAINS) - || gfc_state_stack->previous == NULL + if (gfc_state_stack->previous == NULL + || (gfc_state_stack->state != COMP_INTERFACE + && (gfc_state_stack->state != COMP_CONTAINS + || gfc_state_stack->previous->state != COMP_INTERFACE)) || current_interface.type == INTERFACE_NAMELESS || current_interface.type == INTERFACE_ABSTRACT) { diff --git a/gcc/fortran/dependency.cc b/gcc/fortran/dependency.cc index ab3bd36f74ed1..3aa696cefe62d 100644 --- a/gcc/fortran/dependency.cc +++ b/gcc/fortran/dependency.cc @@ -1292,6 +1292,11 @@ gfc_check_dependency (gfc_expr *expr1, gfc_expr *expr2, bool identical) if (expr1->expr_type != EXPR_VARIABLE) gfc_internal_error ("gfc_check_dependency: expecting an EXPR_VARIABLE"); + /* Prevent NULL pointer dereference while recursively analyzing invalid + expressions. */ + if (expr2 == NULL) + return 0; + switch (expr2->expr_type) { case EXPR_OP: diff --git a/gcc/fortran/dump-parse-tree.cc b/gcc/fortran/dump-parse-tree.cc index 3635460bffd33..418b15a8ebc0c 100644 --- a/gcc/fortran/dump-parse-tree.cc +++ b/gcc/fortran/dump-parse-tree.cc @@ -3600,7 +3600,12 @@ get_c_type_name (gfc_typespec *ts, gfc_array_spec *as, const char **pre, if (c_interop_kinds_table[i].f90_type == ts->type && c_interop_kinds_table[i].value == ts->kind) { + /* Skip over 'c_'. */ *type_name = c_interop_kinds_table[i].name + 2; + if (strcmp (*type_name, "long_long") == 0) + *type_name = "long long"; + if (strcmp (*type_name, "long_double") == 0) + *type_name = "long double"; if (strcmp (*type_name, "signed_char") == 0) *type_name = "signed char"; else if (strcmp (*type_name, "size_t") == 0) diff --git a/gcc/fortran/expr.cc b/gcc/fortran/expr.cc index 86d61fed30218..5640d2159255a 100644 --- a/gcc/fortran/expr.cc +++ b/gcc/fortran/expr.cc @@ -545,6 +545,7 @@ gfc_free_actual_arglist (gfc_actual_arglist *a1) a2 = a1->next; if (a1->expr) gfc_free_expr (a1->expr); + free (a1->associated_dummy); free (a1); a1 = a2; } @@ -565,6 +566,12 @@ gfc_copy_actual_arglist (gfc_actual_arglist *p) new_arg = gfc_get_actual_arglist (); *new_arg = *p; + if (p->associated_dummy != NULL) + { + new_arg->associated_dummy = gfc_get_dummy_arg (); + *new_arg->associated_dummy = *p->associated_dummy; + } + new_arg->expr = gfc_copy_expr (p->expr); new_arg->next = NULL; @@ -1552,6 +1559,16 @@ find_array_section (gfc_expr *expr, gfc_ref *ref) lower = ref->u.ar.as->lower[d]; upper = ref->u.ar.as->upper[d]; + if (!lower || !upper + || lower->expr_type != EXPR_CONSTANT + || upper->expr_type != EXPR_CONSTANT + || lower->ts.type != BT_INTEGER + || upper->ts.type != BT_INTEGER) + { + t = false; + goto cleanup; + } + if (ref->u.ar.dimen_type[d] == DIMEN_VECTOR) /* Vector subscript. */ { gfc_constructor *ci; @@ -1594,9 +1611,7 @@ find_array_section (gfc_expr *expr, gfc_ref *ref) { if ((begin && begin->expr_type != EXPR_CONSTANT) || (finish && finish->expr_type != EXPR_CONSTANT) - || (step && step->expr_type != EXPR_CONSTANT) - || (!begin && !lower) - || (!finish && !upper)) + || (step && step->expr_type != EXPR_CONSTANT)) { t = false; goto cleanup; @@ -1835,6 +1850,13 @@ find_inquiry_ref (gfc_expr *p, gfc_expr **newp) else if (tmp->expr_type == EXPR_CONSTANT) *newp = gfc_get_int_expr (gfc_default_integer_kind, NULL, tmp->value.character.length); + else if (gfc_init_expr_flag + && tmp->ts.u.cl->length->symtree->n.sym->attr.pdt_len) + *newp = gfc_pdt_find_component_copy_initializer (tmp->symtree->n + .sym, + tmp->ts.u.cl + ->length->symtree + ->n.sym->name); else goto cleanup; @@ -1875,7 +1897,9 @@ find_inquiry_ref (gfc_expr *p, gfc_expr **newp) mpc_imagref (tmp->value.complex), GFC_RND_MODE); break; } - tmp = gfc_copy_expr (*newp); + // TODO: Fix leaking expr tmp, when simplify is done twice. + if (inquiry->next) + gfc_replace_expr (tmp, *newp); } if (!(*newp)) @@ -2040,7 +2064,7 @@ static bool simplify_ref_chain (gfc_ref *ref, int type, gfc_expr **p) { int n; - gfc_expr *newp; + gfc_expr *newp = NULL; for (; ref; ref = ref->next) { @@ -2287,7 +2311,8 @@ gfc_simplify_expr (gfc_expr *p, int type) initialization expression, or we want a subsection. */ if (p->symtree->n.sym->attr.flavor == FL_PARAMETER && (gfc_init_expr_flag || p->ref - || p->symtree->n.sym->value->expr_type != EXPR_ARRAY)) + || (p->symtree->n.sym->value + && p->symtree->n.sym->value->expr_type != EXPR_ARRAY))) { if (!simplify_parameter_variable (p, type)) return false; @@ -3201,7 +3226,7 @@ gfc_match_init_expr (gfc_expr **result) return m; } - if (gfc_derived_parameter_expr (expr)) + if (expr->expr_type != EXPR_FUNCTION && gfc_derived_parameter_expr (expr)) { *result = expr; gfc_init_expr_flag = false; @@ -4991,14 +5016,14 @@ get_union_initializer (gfc_symbol *union_type, gfc_component **map_p) static bool class_allocatable (gfc_component *comp) { - return comp->ts.type == BT_CLASS && CLASS_DATA (comp) + return comp->ts.type == BT_CLASS && comp->attr.class_ok && CLASS_DATA (comp) && CLASS_DATA (comp)->attr.allocatable; } static bool class_pointer (gfc_component *comp) { - return comp->ts.type == BT_CLASS && CLASS_DATA (comp) + return comp->ts.type == BT_CLASS && comp->attr.class_ok && CLASS_DATA (comp) && CLASS_DATA (comp)->attr.pointer; } @@ -6238,7 +6263,7 @@ gfc_check_vardef_context (gfc_expr* e, bool pointer, bool alloc_obj, && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result) && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer) && !(sym->attr.flavor == FL_PROCEDURE - && sym->attr.function && sym->attr.pointer)) + && sym->attr.function && attr.pointer)) { if (context) gfc_error ("%qs in variable definition context (%s) at %L is not" @@ -6514,3 +6539,19 @@ gfc_check_vardef_context (gfc_expr* e, bool pointer, bool alloc_obj, return true; } + +gfc_expr* +gfc_pdt_find_component_copy_initializer (gfc_symbol *sym, const char *name) +{ + /* The actual length of a pdt is in its components. In the + initializer of the current ref is only the default value. + Therefore traverse the chain of components and pick the correct + one's initializer expressions. */ + for (gfc_component *comp = sym->ts.u.derived->components; comp != NULL; + comp = comp->next) + { + if (!strcmp (comp->name, name)) + return gfc_copy_expr (comp->initializer); + } + return NULL; +} diff --git a/gcc/fortran/f95-lang.cc b/gcc/fortran/f95-lang.cc index 1a895a25132f2..468a0b7e31094 100644 --- a/gcc/fortran/f95-lang.cc +++ b/gcc/fortran/f95-lang.cc @@ -703,31 +703,34 @@ gfc_init_builtin_functions (void) float_type_node, NULL_TREE); func_cdouble_double = build_function_type_list (double_type_node, - complex_double_type_node, - NULL_TREE); + complex_double_type_node, + NULL_TREE); func_double_cdouble = build_function_type_list (complex_double_type_node, - double_type_node, NULL_TREE); + double_type_node, NULL_TREE); - func_clongdouble_longdouble = - build_function_type_list (long_double_type_node, - complex_long_double_type_node, NULL_TREE); + func_clongdouble_longdouble + = build_function_type_list (long_double_type_node, + complex_long_double_type_node, NULL_TREE); - func_longdouble_clongdouble = - build_function_type_list (complex_long_double_type_node, - long_double_type_node, NULL_TREE); + func_longdouble_clongdouble + = build_function_type_list (complex_long_double_type_node, + long_double_type_node, NULL_TREE); ptype = build_pointer_type (float_type_node); - func_float_floatp_floatp = - build_function_type_list (void_type_node, ptype, ptype, NULL_TREE); + func_float_floatp_floatp + = build_function_type_list (void_type_node, float_type_node, ptype, ptype, + NULL_TREE); ptype = build_pointer_type (double_type_node); - func_double_doublep_doublep = - build_function_type_list (void_type_node, ptype, ptype, NULL_TREE); + func_double_doublep_doublep + = build_function_type_list (void_type_node, double_type_node, ptype, + ptype, NULL_TREE); ptype = build_pointer_type (long_double_type_node); - func_longdouble_longdoublep_longdoublep = - build_function_type_list (void_type_node, ptype, ptype, NULL_TREE); + func_longdouble_longdoublep_longdoublep + = build_function_type_list (void_type_node, long_double_type_node, ptype, + ptype, NULL_TREE); /* Non-math builtins are defined manually, so they're not included here. */ #define OTHER_BUILTIN(ID,NAME,TYPE,CONST) @@ -981,9 +984,8 @@ gfc_init_builtin_functions (void) "calloc", ATTR_NOTHROW_LEAF_MALLOC_LIST); DECL_IS_MALLOC (builtin_decl_explicit (BUILT_IN_CALLOC)) = 1; - ftype = build_function_type_list (pvoid_type_node, - size_type_node, pvoid_type_node, - NULL_TREE); + ftype = build_function_type_list (pvoid_type_node, pvoid_type_node, + size_type_node, NULL_TREE); gfc_define_builtin ("__builtin_realloc", ftype, BUILT_IN_REALLOC, "realloc", ATTR_NOTHROW_LEAF_LIST); @@ -1002,8 +1004,9 @@ gfc_init_builtin_functions (void) "__builtin_isnormal", ATTR_CONST_NOTHROW_LEAF_LIST); gfc_define_builtin ("__builtin_signbit", ftype, BUILT_IN_SIGNBIT, "__builtin_signbit", ATTR_CONST_NOTHROW_LEAF_LIST); + gfc_define_builtin ("__builtin_fpclassify", ftype, BUILT_IN_FPCLASSIFY, + "__builtin_fpclassify", ATTR_CONST_NOTHROW_LEAF_LIST); - ftype = build_function_type (integer_type_node, NULL_TREE); gfc_define_builtin ("__builtin_isless", ftype, BUILT_IN_ISLESS, "__builtin_isless", ATTR_CONST_NOTHROW_LEAF_LIST); gfc_define_builtin ("__builtin_islessequal", ftype, BUILT_IN_ISLESSEQUAL, diff --git a/gcc/fortran/frontend-passes.cc b/gcc/fortran/frontend-passes.cc index 5eba634514565..de8cb5a2204c1 100644 --- a/gcc/fortran/frontend-passes.cc +++ b/gcc/fortran/frontend-passes.cc @@ -1326,7 +1326,7 @@ traverse_io_block (gfc_code *code, bool *has_reached, gfc_code *prev) if (iters[i]) { gfc_expr *var = iters[i]->var; - for (int j = i - 1; j < i; j++) + for (int j = 0; j < i; j++) { if (iters[j] && (var_in_expr (var, iters[j]->start) @@ -5794,6 +5794,9 @@ check_externals_expr (gfc_expr **ep, int *walk_subtrees ATTRIBUTE_UNUSED, if (e->expr_type != EXPR_FUNCTION) return 0; + if (e->symtree && e->symtree->n.sym->attr.subroutine) + return 0; + sym = e->value.function.esym; if (sym == NULL) return 0; diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h index 7bf1d5a045263..7162f39f39c46 100644 --- a/gcc/fortran/gfortran.h +++ b/gcc/fortran/gfortran.h @@ -1887,6 +1887,10 @@ typedef struct gfc_symbol /* Set if this should be passed by value, but is not a VALUE argument according to the Fortran standard. */ unsigned pass_as_value:1; + /* Set if an allocatable array variable has been allocated in the current + scope. Used in the suppression of uninitialized warnings in reallocation + on assignment. */ + unsigned allocated_in_scope:1; int refs; struct gfc_namespace *ns; /* namespace containing this symbol */ @@ -3667,6 +3671,7 @@ gfc_expr* gfc_find_stat_co (gfc_expr *); gfc_expr* gfc_build_intrinsic_call (gfc_namespace *, gfc_isym_id, const char*, locus, unsigned, ...); bool gfc_check_vardef_context (gfc_expr*, bool, bool, bool, const char*); +gfc_expr* gfc_pdt_find_component_copy_initializer (gfc_symbol *, const char *); /* st.cc */ @@ -3800,6 +3805,8 @@ void gfc_module_done_2 (void); void gfc_dump_module (const char *, int); bool gfc_check_symbol_access (gfc_symbol *); void gfc_free_use_stmts (gfc_use_list *); +void gfc_save_module_list (); +void gfc_restore_old_module_list (); const char *gfc_dt_lower_string (const char *); const char *gfc_dt_upper_string (const char *); diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi index f8737f4d323b8..d34e0b5e8f915 100644 --- a/gcc/fortran/gfortran.texi +++ b/gcc/fortran/gfortran.texi @@ -589,7 +589,7 @@ Malformed environment variables are silently ignored. * GFORTRAN_SHOW_LOCUS:: Show location for runtime errors * GFORTRAN_OPTIONAL_PLUS:: Print leading + where permitted * GFORTRAN_LIST_SEPARATOR:: Separator for list output -* GFORTRAN_CONVERT_UNIT:: Set endianness for unformatted I/O +* GFORTRAN_CONVERT_UNIT:: Set conversion for unformatted I/O * GFORTRAN_ERROR_BACKTRACE:: Show backtrace on run-time errors * GFORTRAN_FORMATTED_BUFFER_SIZE:: Buffer size for formatted files * GFORTRAN_UNFORMATTED_BUFFER_SIZE:: Buffer size for unformatted files @@ -686,11 +686,12 @@ when @command{a.out} is the compiled Fortran program that you want to run. Default is a single space. @node GFORTRAN_CONVERT_UNIT -@section @env{GFORTRAN_CONVERT_UNIT}---Set endianness for unformatted I/O +@section @env{GFORTRAN_CONVERT_UNIT}---Set conversion for unformatted I/O By setting the @env{GFORTRAN_CONVERT_UNIT} variable, it is possible to change the representation of data for unformatted files. -The syntax for the @env{GFORTRAN_CONVERT_UNIT} variable is: +The syntax for the @env{GFORTRAN_CONVERT_UNIT} variable for +most systems is: @smallexample GFORTRAN_CONVERT_UNIT: mode | mode ';' exception | exception ; mode: 'native' | 'swap' | 'big_endian' | 'little_endian' ; @@ -711,6 +712,14 @@ the modes are the same as for the @code{CONVERT} specifier: for unformatted files. @item @code{BIG_ENDIAN} Use the big-endian format for unformatted files. @end itemize +For POWER systems which support @option{-mabi=ieeelongdouble}, +there are additional options, which can be combined with the +others with commas. Those are +@itemize @w{} +@item @code{R16_IEEE} Use IEEE 128-bit format for @code{REAL(KIND=16)}. +@item @code{R16_IBM} Use IBM @code{long double} format for +@code{REAL(KIND=16)}. +@end itemize A missing mode for an exception is taken to mean @code{BIG_ENDIAN}. Examples of values for @env{GFORTRAN_CONVERT_UNIT} are: @itemize @w{} @@ -719,6 +728,8 @@ Examples of values for @env{GFORTRAN_CONVERT_UNIT} are: in little_endian mode, except for units 10 to 20 and 25, which are in native format. @item @code{'10-20'} Units 10 to 20 are big-endian, the rest is native. +@item @code{'big_endian,r16_ibm'} Do all unformatted I/O in big-endian +mode and use IBM long double for output of @code{REAL(KIND=16)} values. @end itemize Setting the environment variables should be done on the command @@ -1736,7 +1747,7 @@ the @code{CONVERT} specifier on the @code{OPEN} statement. @xref{GFORTRAN_CONVERT_UNIT}, for an alternative way of specifying the data format via an environment variable. -Valid values for @code{CONVERT} are: +Valid values for @code{CONVERT} on most systems are: @itemize @w{} @item @code{CONVERT='NATIVE'} Use the native format. This is the default. @item @code{CONVERT='SWAP'} Swap between little- and big-endian. @@ -1745,6 +1756,15 @@ for unformatted files. @item @code{CONVERT='BIG_ENDIAN'} Use the big-endian representation for unformatted files. @end itemize +On POWER systems which support @option{-mabi=ieeelongdouble}, +there are additional options, which can be combined with the others +with commas. Those are +@itemize @w{} +@item @code{CONVERT='R16_IEEE'} Use IEEE 128-bit format for +@code{REAL(KIND=16)}. +@item @code{CONVERT='R16_IBM'} Use IBM @code{long double} format for +real@code{REAL(KIND=16)}. +@end itemize Using the option could look like this: @smallexample diff --git a/gcc/fortran/interface.cc b/gcc/fortran/interface.cc index 7ed6e13711f92..0c4cd385d56a7 100644 --- a/gcc/fortran/interface.cc +++ b/gcc/fortran/interface.cc @@ -1746,6 +1746,14 @@ gfc_compare_interfaces (gfc_symbol *s1, gfc_symbol *s2, const char *name2, return false; } + if (s2->attr.subroutine && s1->attr.flavor == FL_VARIABLE) + { + if (errmsg != NULL) + snprintf (errmsg, err_len, "subroutine proc pointer '%s' passed " + "to dummy variable '%s'", name2, s1->name); + return false; + } + /* Do strict checks on all characteristics (for dummy procedures and procedure pointer assignments). */ if (!generic_flag && strict_flag) @@ -2354,7 +2362,23 @@ compare_parameter (gfc_symbol *formal, gfc_expr *actual, && formal->ts.u.derived && formal->ts.u.derived->ts.is_iso_c && actual->ts.type == BT_DERIVED && actual->ts.u.derived && actual->ts.u.derived->ts.is_iso_c) - return true; + { + if (formal->ts.u.derived->intmod_sym_id + != actual->ts.u.derived->intmod_sym_id) + return false; + + if (ranks_must_agree + && symbol_rank (formal) != actual->rank + && symbol_rank (formal) != -1) + { + if (where) + argument_rank_mismatch (formal->name, &actual->where, + symbol_rank (formal), actual->rank, + NULL); + return false; + } + return true; + } if (formal->ts.type == BT_CLASS && actual->ts.type == BT_DERIVED) /* Make sure the vtab symbol is present when @@ -2365,12 +2389,22 @@ compare_parameter (gfc_symbol *formal, gfc_expr *actual, { gfc_symbol *act_sym = actual->symtree->n.sym; - if (formal->attr.flavor != FL_PROCEDURE) + if (formal->attr.flavor != FL_PROCEDURE && !act_sym->ts.interface) { if (where) gfc_error ("Invalid procedure argument at %L", &actual->where); return false; } + else if (act_sym->ts.interface + && !gfc_compare_interfaces (formal, act_sym->ts.interface, + act_sym->name, 0, 1, err, + sizeof(err),NULL, NULL)) + { + if (where) + gfc_error_opt (0, "Interface mismatch in dummy procedure %qs at %L:" + " %s", formal->name, &actual->where, err); + return false; + } if (!gfc_compare_interfaces (formal, act_sym, act_sym->name, 0, 1, err, sizeof(err), NULL, NULL)) @@ -2792,7 +2826,8 @@ get_sym_storage_size (gfc_symbol *sym) if (sym->ts.type == BT_CHARACTER) { if (sym->ts.u.cl && sym->ts.u.cl->length - && sym->ts.u.cl->length->expr_type == EXPR_CONSTANT) + && sym->ts.u.cl->length->expr_type == EXPR_CONSTANT + && sym->ts.u.cl->length->ts.type == BT_INTEGER) strlen = mpz_get_ui (sym->ts.u.cl->length->value.integer); else return 0; @@ -2809,7 +2844,9 @@ get_sym_storage_size (gfc_symbol *sym) for (i = 0; i < sym->as->rank; i++) { if (sym->as->upper[i]->expr_type != EXPR_CONSTANT - || sym->as->lower[i]->expr_type != EXPR_CONSTANT) + || sym->as->lower[i]->expr_type != EXPR_CONSTANT + || sym->as->upper[i]->ts.type != BT_INTEGER + || sym->as->lower[i]->ts.type != BT_INTEGER) return 0; elements *= mpz_get_si (sym->as->upper[i]->value.integer) @@ -2840,7 +2877,8 @@ get_expr_storage_size (gfc_expr *e) if (e->ts.type == BT_CHARACTER) { if (e->ts.u.cl && e->ts.u.cl->length - && e->ts.u.cl->length->expr_type == EXPR_CONSTANT) + && e->ts.u.cl->length->expr_type == EXPR_CONSTANT + && e->ts.u.cl->length->ts.type == BT_INTEGER) strlen = mpz_get_si (e->ts.u.cl->length->value.integer); else if (e->expr_type == EXPR_CONSTANT && (e->ts.u.cl == NULL || e->ts.u.cl->length == NULL)) @@ -2891,7 +2929,8 @@ get_expr_storage_size (gfc_expr *e) if (ref->u.ar.stride[i]) { - if (ref->u.ar.stride[i]->expr_type == EXPR_CONSTANT) + if (ref->u.ar.stride[i]->expr_type == EXPR_CONSTANT + && ref->u.ar.stride[i]->ts.type == BT_INTEGER) stride = mpz_get_si (ref->u.ar.stride[i]->value.integer); else return 0; @@ -2899,26 +2938,30 @@ get_expr_storage_size (gfc_expr *e) if (ref->u.ar.start[i]) { - if (ref->u.ar.start[i]->expr_type == EXPR_CONSTANT) + if (ref->u.ar.start[i]->expr_type == EXPR_CONSTANT + && ref->u.ar.start[i]->ts.type == BT_INTEGER) start = mpz_get_si (ref->u.ar.start[i]->value.integer); else return 0; } else if (ref->u.ar.as->lower[i] - && ref->u.ar.as->lower[i]->expr_type == EXPR_CONSTANT) + && ref->u.ar.as->lower[i]->expr_type == EXPR_CONSTANT + && ref->u.ar.as->lower[i]->ts.type == BT_INTEGER) start = mpz_get_si (ref->u.ar.as->lower[i]->value.integer); else return 0; if (ref->u.ar.end[i]) { - if (ref->u.ar.end[i]->expr_type == EXPR_CONSTANT) + if (ref->u.ar.end[i]->expr_type == EXPR_CONSTANT + && ref->u.ar.end[i]->ts.type == BT_INTEGER) end = mpz_get_si (ref->u.ar.end[i]->value.integer); else return 0; } else if (ref->u.ar.as->upper[i] - && ref->u.ar.as->upper[i]->expr_type == EXPR_CONSTANT) + && ref->u.ar.as->upper[i]->expr_type == EXPR_CONSTANT + && ref->u.ar.as->upper[i]->ts.type == BT_INTEGER) end = mpz_get_si (ref->u.ar.as->upper[i]->value.integer); else return 0; @@ -2959,7 +3002,9 @@ get_expr_storage_size (gfc_expr *e) || ref->u.ar.as->upper[i] == NULL || ref->u.ar.as->lower[i] == NULL || ref->u.ar.as->upper[i]->expr_type != EXPR_CONSTANT - || ref->u.ar.as->lower[i]->expr_type != EXPR_CONSTANT) + || ref->u.ar.as->lower[i]->expr_type != EXPR_CONSTANT + || ref->u.ar.as->upper[i]->ts.type != BT_INTEGER + || ref->u.ar.as->lower[i]->ts.type != BT_INTEGER) return 0; elements @@ -2981,7 +3026,9 @@ get_expr_storage_size (gfc_expr *e) { if (!as->upper[i] || !as->lower[i] || as->upper[i]->expr_type != EXPR_CONSTANT - || as->lower[i]->expr_type != EXPR_CONSTANT) + || as->lower[i]->expr_type != EXPR_CONSTANT + || as->upper[i]->ts.type != BT_INTEGER + || as->lower[i]->ts.type != BT_INTEGER) return 0; elements = elements @@ -4134,6 +4181,14 @@ gfc_procedure_use (gfc_symbol *sym, gfc_actual_arglist **ap, locus *where) return false; } + if (a->expr && a->expr->expr_type == EXPR_NULL) + { + gfc_error ("Passing intrinsic NULL as actual argument at %L " + "requires an explicit interface", &a->expr->where); + a->expr->error = 1; + return false; + } + /* TS 29113, C407b. */ if (a->expr && a->expr->expr_type == EXPR_VARIABLE && symbol_rank (a->expr->symtree->n.sym) == -1) diff --git a/gcc/fortran/intrinsic.cc b/gcc/fortran/intrinsic.cc index e89131f5a7192..ff5d728bb06d1 100644 --- a/gcc/fortran/intrinsic.cc +++ b/gcc/fortran/intrinsic.cc @@ -4259,15 +4259,15 @@ remove_nullargs (gfc_actual_arglist **ap) } -static gfc_dummy_arg * -get_intrinsic_dummy_arg (gfc_intrinsic_arg *intrinsic) +static void +set_intrinsic_dummy_arg (gfc_dummy_arg *&dummy_arg, + gfc_intrinsic_arg *intrinsic) { - gfc_dummy_arg * const dummy_arg = gfc_get_dummy_arg (); + if (dummy_arg == NULL) + dummy_arg = gfc_get_dummy_arg (); dummy_arg->intrinsicness = GFC_INTRINSIC_DUMMY_ARG; dummy_arg->u.intrinsic = intrinsic; - - return dummy_arg; } @@ -4430,7 +4430,7 @@ sort_actual (const char *name, gfc_actual_arglist **ap, if (a == NULL) a = gfc_get_actual_arglist (); - a->associated_dummy = get_intrinsic_dummy_arg (f); + set_intrinsic_dummy_arg (a->associated_dummy, f); if (actual == NULL) *ap = a; diff --git a/gcc/fortran/invoke.texi b/gcc/fortran/invoke.texi index 5c7501a28b19e..c0932f6cd703e 100644 --- a/gcc/fortran/invoke.texi +++ b/gcc/fortran/invoke.texi @@ -1435,10 +1435,20 @@ These options affect the runtime behavior of programs compiled with GNU Fortran. @item -fconvert=@var{conversion} @opindex @code{fconvert=}@var{conversion} Specify the representation of data for unformatted files. Valid -values for conversion are: @samp{native}, the default; @samp{swap}, -swap between big- and little-endian; @samp{big-endian}, use big-endian -representation for unformatted files; @samp{little-endian}, use little-endian -representation for unformatted files. +values for conversion on most systems are: @samp{native}, the default; +@samp{swap}, swap between big- and little-endian; @samp{big-endian}, use +big-endian representation for unformatted files; @samp{little-endian}, use +little-endian representation for unformatted files. + +On POWER systems which suppport @option{-mabi=ieeelongdouble}, +there are additional options, which can be combined with others with +commas. Those are +@itemize @w{} +@item @option{-fconvert=r16_ieee} Use IEEE 128-bit format for +@code{REAL(KIND=16)}. +@item @option{-fconvert=r16_ibm} Use IBM long double format for +@code{REAL(KIND=16)}. +@end itemize @emph{This option has an effect only when used in the main program. The @code{CONVERT} specifier and the GFORTRAN_CONVERT_UNIT environment diff --git a/gcc/fortran/iresolve.cc b/gcc/fortran/iresolve.cc index dea19358b1717..a21ebb14c761b 100644 --- a/gcc/fortran/iresolve.cc +++ b/gcc/fortran/iresolve.cc @@ -94,9 +94,12 @@ check_charlen_present (gfc_expr *source) else if (source->expr_type == EXPR_ARRAY) { gfc_constructor *c = gfc_constructor_first (source->value.constructor); - source->ts.u.cl->length - = gfc_get_int_expr (gfc_charlen_int_kind, NULL, - c->expr->value.character.length); + if (c) + source->ts.u.cl->length + = gfc_get_int_expr (gfc_charlen_int_kind, NULL, + c->expr->value.character.length); + if (source->ts.u.cl->length == NULL) + gfc_internal_error ("check_charlen_present(): length not set"); } } diff --git a/gcc/fortran/libgfortran.h b/gcc/fortran/libgfortran.h index 064795eb4699c..81d1e340763ad 100644 --- a/gcc/fortran/libgfortran.h +++ b/gcc/fortran/libgfortran.h @@ -186,3 +186,23 @@ typedef enum BT_ASSUMED, BT_UNION, BT_BOZ } bt; + +/* Enumeration of the possible floating-point types. These values + correspond to the hidden arguments of the IEEE_CLASS_TYPE + derived-type of IEEE_ARITHMETIC. */ + +enum { + IEEE_OTHER_VALUE = 0, + IEEE_SIGNALING_NAN, + IEEE_QUIET_NAN, + IEEE_NEGATIVE_INF, + IEEE_NEGATIVE_NORMAL, + IEEE_NEGATIVE_DENORMAL, + IEEE_NEGATIVE_SUBNORMAL = IEEE_NEGATIVE_DENORMAL, + IEEE_NEGATIVE_ZERO, + IEEE_POSITIVE_ZERO, + IEEE_POSITIVE_DENORMAL, + IEEE_POSITIVE_SUBNORMAL = IEEE_POSITIVE_DENORMAL, + IEEE_POSITIVE_NORMAL, + IEEE_POSITIVE_INF +}; diff --git a/gcc/fortran/match.cc b/gcc/fortran/match.cc index 205811bb9694e..673662e90876e 100644 --- a/gcc/fortran/match.cc +++ b/gcc/fortran/match.cc @@ -5339,6 +5339,16 @@ gfc_match_common (void) goto cleanup; } + /* F2018:R874: common-block-object is variable-name [ (array-spec) ] + F2018:C8121: A variable-name shall not be a name made accessible + by use association. */ + if (sym->attr.use_assoc) + { + gfc_error ("Symbol %qs at %C is USE associated from module %qs " + "and cannot occur in COMMON", sym->name, sym->module); + goto cleanup; + } + /* Deal with an optional array specification after the symbol name. */ m = gfc_match_array_spec (&as, true, true); diff --git a/gcc/fortran/match.h b/gcc/fortran/match.h index 495c93e0b5cef..d227335685815 100644 --- a/gcc/fortran/match.h +++ b/gcc/fortran/match.h @@ -296,7 +296,7 @@ match gfc_match_bind_c_stmt (void); match gfc_match_bind_c (gfc_symbol *, bool); /* primary.cc. */ -match gfc_match_structure_constructor (gfc_symbol *, gfc_expr **); +match gfc_match_structure_constructor (gfc_symbol *, gfc_symtree *, gfc_expr **); match gfc_match_variable (gfc_expr **, int); match gfc_match_equiv_variable (gfc_expr **); match gfc_match_actual_arglist (int, gfc_actual_arglist **, bool = false); diff --git a/gcc/fortran/module.cc b/gcc/fortran/module.cc index 85aa153bd7750..7b06acb313325 100644 --- a/gcc/fortran/module.cc +++ b/gcc/fortran/module.cc @@ -195,7 +195,12 @@ static const char *module_name; /* The name of the .smod file that the submodule will write to. */ static const char *submodule_name; +/* The list of use statements to apply to the current namespace + before parsing the non-use statements. */ static gfc_use_list *module_list; +/* The end of the MODULE_LIST list above at the time the recognition + of the current statement started. */ +static gfc_use_list **old_module_list_tail; /* If we're reading an intrinsic module, this is its ID. */ static intmod_id current_intmod; @@ -7542,6 +7547,8 @@ gfc_use_modules (void) gfc_use_module (module_list); free (module_list); } + module_list = NULL; + old_module_list_tail = &module_list; gfc_rename_list = NULL; } @@ -7565,6 +7572,30 @@ gfc_free_use_stmts (gfc_use_list *use_stmts) } +/* Remember the end of the MODULE_LIST list, so that the list can be restored + to its previous state if the current statement is erroneous. */ + +void +gfc_save_module_list () +{ + gfc_use_list **tail = &module_list; + while (*tail != NULL) + tail = &(*tail)->next; + old_module_list_tail = tail; +} + + +/* Restore the MODULE_LIST list to its previous value and free the use + statements that are no longer part of the list. */ + +void +gfc_restore_old_module_list () +{ + gfc_free_use_stmts (*old_module_list_tail); + *old_module_list_tail = NULL; +} + + void gfc_module_init_2 (void) { diff --git a/gcc/fortran/openmp.cc b/gcc/fortran/openmp.cc index 714148138c224..14f2521f1df31 100644 --- a/gcc/fortran/openmp.cc +++ b/gcc/fortran/openmp.cc @@ -1142,7 +1142,6 @@ gfc_match_iterator (gfc_namespace **ns, bool permit_var) } if (':' == gfc_peek_ascii_char ()) { - step = gfc_get_expr (); if (gfc_match (": %e ", &step) != MATCH_YES) { gfc_free_expr (begin); @@ -4028,9 +4027,13 @@ gfc_match_omp_declare_simd (void) gfc_omp_declare_simd *ods; bool needs_space = false; - switch (gfc_match (" ( %s ) ", &proc_name)) + switch (gfc_match (" ( ")) { - case MATCH_YES: break; + case MATCH_YES: + if (gfc_match_symbol (&proc_name, /* host assoc = */ true) != MATCH_YES + || gfc_match (" ) ") != MATCH_YES) + return MATCH_ERROR; + break; case MATCH_NO: proc_name = NULL; needs_space = true; break; case MATCH_ERROR: return MATCH_ERROR; } diff --git a/gcc/fortran/parse.cc b/gcc/fortran/parse.cc index e6e915d2a5e5a..2b3a1a91fd997 100644 --- a/gcc/fortran/parse.cc +++ b/gcc/fortran/parse.cc @@ -1600,6 +1600,7 @@ next_statement (void) locus old_locus; gfc_enforce_clean_symbol_state (); + gfc_save_module_list (); gfc_new_block = NULL; @@ -2875,6 +2876,9 @@ reject_statement (void) gfc_reject_data (gfc_current_ns); + /* Don't queue use-association of a module if we reject the use statement. */ + gfc_restore_old_module_list (); + gfc_new_block = NULL; gfc_undo_symbols (); gfc_clear_warning (); @@ -3911,7 +3915,7 @@ match_deferred_characteristics (gfc_typespec * ts) m = gfc_match_prefix (ts); gfc_buffer_error (false); - if (ts->type == BT_DERIVED) + if (ts->type == BT_DERIVED || ts->type == BT_CLASS) { ts->kind = 0; @@ -3948,21 +3952,30 @@ match_deferred_characteristics (gfc_typespec * ts) For return types specified in a FUNCTION prefix, the IMPLICIT rules of the scope are not yet parsed so this has to be delayed up to parse_spec. */ -static void +static bool check_function_result_typed (void) { gfc_typespec ts; gcc_assert (gfc_current_state () == COMP_FUNCTION); - if (!gfc_current_ns->proc_name->result) return; + if (!gfc_current_ns->proc_name->result) + return true; ts = gfc_current_ns->proc_name->result->ts; /* Check type-parameters, at the moment only CHARACTER lengths possible. */ /* TODO: Extend when KIND type parameters are implemented. */ if (ts.type == BT_CHARACTER && ts.u.cl && ts.u.cl->length) - gfc_expr_check_typed (ts.u.cl->length, gfc_current_ns, true); + { + /* Reject invalid type of specification expression for length. */ + if (ts.u.cl->length->ts.type != BT_INTEGER) + return false; + + gfc_expr_check_typed (ts.u.cl->length, gfc_current_ns, true); + } + + return true; } @@ -4070,10 +4083,7 @@ parse_spec (gfc_statement st) } if (verify_now) - { - check_function_result_typed (); - function_result_typed = true; - } + function_result_typed = check_function_result_typed (); } switch (st) @@ -4084,10 +4094,7 @@ parse_spec (gfc_statement st) case ST_IMPLICIT_NONE: case ST_IMPLICIT: if (!function_result_typed) - { - check_function_result_typed (); - function_result_typed = true; - } + function_result_typed = check_function_result_typed (); goto declSt; case ST_FORMAT: @@ -4192,7 +4199,7 @@ parse_spec (gfc_statement st) if (bad_characteristic) { ts = &gfc_current_block ()->result->ts; - if (ts->type != BT_DERIVED) + if (ts->type != BT_DERIVED && ts->type != BT_CLASS) gfc_error ("Bad kind expression for function %qs at %L", gfc_current_block ()->name, &gfc_current_block ()->declared_at); @@ -5708,7 +5715,7 @@ parse_omp_structured_block (gfc_statement omp_st, bool workshare_stmts_only) } return st; } - else if (st != omp_end_st) + else if (st != omp_end_st || block_construct) { unexpected_statement (st); st = next_statement (); @@ -6450,7 +6457,6 @@ parse_module (void) { gfc_statement st; gfc_gsymbol *s; - bool error; s = gfc_get_gsymbol (gfc_new_block->name, false); if (s->defined || (s->type != GSYM_UNKNOWN && s->type != GSYM_MODULE)) @@ -6473,7 +6479,6 @@ parse_module (void) st = parse_spec (ST_NONE); - error = false; loop: switch (st) { @@ -6492,16 +6497,11 @@ parse_module (void) default: gfc_error ("Unexpected %s statement in MODULE at %C", gfc_ascii_statement (st)); - - error = true; reject_statement (); st = next_statement (); goto loop; } - - /* Make sure not to free the namespace twice on error. */ - if (!error) - s->ns = gfc_current_ns; + s->ns = gfc_current_ns; } diff --git a/gcc/fortran/primary.cc b/gcc/fortran/primary.cc index 3f01f67cd4966..328e92b5aefee 100644 --- a/gcc/fortran/primary.cc +++ b/gcc/fortran/primary.cc @@ -2207,6 +2207,15 @@ gfc_match_varspec (gfc_expr *primary, int equiv_flag, bool sub_flag, match mm; old_loc = gfc_current_locus; mm = gfc_match_name (name); + + /* Check to see if this has a default type. */ + if (sym->ts.type == BT_UNKNOWN && tgt_expr == NULL + && gfc_get_default_type (sym->name, sym->ns)->type != BT_UNKNOWN) + { + gfc_set_default_type (sym, 0, sym->ns); + primary->ts = sym->ts; + } + if (mm == MATCH_YES && is_inquiry_ref (name, &tmp)) inquiry = true; gfc_current_locus = old_loc; @@ -2648,7 +2657,6 @@ gfc_variable_attr (gfc_expr *expr, gfc_typespec *ts) codimension = CLASS_DATA (sym)->attr.codimension; pointer = CLASS_DATA (sym)->attr.class_pointer; allocatable = CLASS_DATA (sym)->attr.allocatable; - optional |= CLASS_DATA (sym)->attr.optional; } else { @@ -2665,6 +2673,18 @@ gfc_variable_attr (gfc_expr *expr, gfc_typespec *ts) if (ts != NULL && expr->ts.type == BT_UNKNOWN) *ts = sym->ts; + /* Catch left-overs from match_actual_arg, where an actual argument of a + procedure is given a temporary ts.type == BT_PROCEDURE. The fixup is + needed for structure constructors in DATA statements, where a pointer + is associated with a data target, and the argument has not been fully + resolved yet. Components references are dealt with further below. */ + if (ts != NULL + && expr->ts.type == BT_PROCEDURE + && expr->ref == NULL + && attr.flavor != FL_PROCEDURE + && attr.target) + *ts = sym->ts; + has_inquiry_part = false; for (ref = expr->ref; ref; ref = ref->next) if (ref->type == REF_INQUIRY) @@ -3197,10 +3217,11 @@ gfc_convert_to_structure_constructor (gfc_expr *e, gfc_symbol *sym, gfc_expr **c goto cleanup; /* For a constant string constructor, make sure the length is - correct; truncate of fill with blanks if needed. */ + correct; truncate or fill with blanks if needed. */ if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable && this_comp->ts.u.cl && this_comp->ts.u.cl->length && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT + && this_comp->ts.u.cl->length->ts.type == BT_INTEGER && actual->expr->ts.type == BT_CHARACTER && actual->expr->expr_type == EXPR_CONSTANT) { @@ -3359,18 +3380,16 @@ gfc_convert_to_structure_constructor (gfc_expr *e, gfc_symbol *sym, gfc_expr **c match -gfc_match_structure_constructor (gfc_symbol *sym, gfc_expr **result) +gfc_match_structure_constructor (gfc_symbol *sym, gfc_symtree *symtree, + gfc_expr **result) { match m; gfc_expr *e; - gfc_symtree *symtree; bool t = true; - gfc_get_ha_sym_tree (sym->name, &symtree); - e = gfc_get_expr (); - e->symtree = symtree; e->expr_type = EXPR_FUNCTION; + e->symtree = symtree; e->where = gfc_current_locus; gcc_assert (gfc_fl_struct (sym->attr.flavor) diff --git a/gcc/fortran/resolve.cc b/gcc/fortran/resolve.cc index 29df531cdb619..0ce41941edd99 100644 --- a/gcc/fortran/resolve.cc +++ b/gcc/fortran/resolve.cc @@ -953,14 +953,20 @@ resolve_common_vars (gfc_common_head *common_block, bool named_common) { gsym = gfc_find_gsymbol (gfc_gsym_root, csym->name); if (gsym && (gsym->type == GSYM_MODULE || gsym->type == GSYM_PROGRAM)) - gfc_error_now ("Global entity %qs at %L cannot appear in a " - "COMMON block at %L", gsym->name, - &gsym->where, &csym->common_block->where); + { + if (csym->common_block) + gfc_error_now ("Global entity %qs at %L cannot appear in a " + "COMMON block at %L", gsym->name, + &gsym->where, &csym->common_block->where); + else + gfc_error_now ("Global entity %qs at %L cannot appear in a " + "COMMON block", gsym->name, &gsym->where); + } /* gfc_add_in_common may have been called before, but the reported errors have been ignored to continue parsing. - We do the checks again here. */ - if (!csym->attr.use_assoc) + We do the checks again here, unless the symbol is USE associated. */ + if (!csym->attr.use_assoc && !csym->attr.used_in_submodule) { gfc_add_in_common (&csym->attr, csym->name, &common_block->where); gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L", @@ -1664,9 +1670,11 @@ check_assumed_size_reference (gfc_symbol *sym, gfc_expr *e) /* FIXME: The comparison "e->ref->u.ar.type == AR_FULL" is wrong. What should it be? */ - if (e->ref && (e->ref->u.ar.end[e->ref->u.ar.as->rank - 1] == NULL) - && (e->ref->u.ar.as->type == AS_ASSUMED_SIZE) - && (e->ref->u.ar.type == AR_FULL)) + if (e->ref + && e->ref->u.ar.as + && (e->ref->u.ar.end[e->ref->u.ar.as->rank - 1] == NULL) + && (e->ref->u.ar.as->type == AS_ASSUMED_SIZE) + && (e->ref->u.ar.type == AR_FULL)) { gfc_error ("The upper bound in the last dimension must " "appear in the reference to the assumed size " @@ -4575,12 +4583,11 @@ compare_bound_int (gfc_expr *a, int b) { int i; - if (a == NULL || a->expr_type != EXPR_CONSTANT) + if (a == NULL + || a->expr_type != EXPR_CONSTANT + || a->ts.type != BT_INTEGER) return CMP_UNKNOWN; - if (a->ts.type != BT_INTEGER) - gfc_internal_error ("compare_bound_int(): Bad expression"); - i = mpz_cmp_si (a->value.integer, b); if (i < 0) @@ -4598,12 +4605,11 @@ compare_bound_mpz_t (gfc_expr *a, mpz_t b) { int i; - if (a == NULL || a->expr_type != EXPR_CONSTANT) + if (a == NULL + || a->expr_type != EXPR_CONSTANT + || a->ts.type != BT_INTEGER) return CMP_UNKNOWN; - if (a->ts.type != BT_INTEGER) - gfc_internal_error ("compare_bound_int(): Bad expression"); - i = mpz_cmp (a->value.integer, b); if (i < 0) @@ -4733,23 +4739,24 @@ check_dimension (int i, gfc_array_ref *ar, gfc_array_spec *as) #define AR_END (ar->end[i] ? ar->end[i] : as->upper[i]) compare_result comp_start_end = compare_bound (AR_START, AR_END); + compare_result comp_stride_zero = compare_bound_int (ar->stride[i], 0); /* Check for zero stride, which is not allowed. */ - if (compare_bound_int (ar->stride[i], 0) == CMP_EQ) + if (comp_stride_zero == CMP_EQ) { gfc_error ("Illegal stride of zero at %L", &ar->c_where[i]); return false; } - /* if start == len || (stride > 0 && start < len) - || (stride < 0 && start > len), + /* if start == end || (stride > 0 && start < end) + || (stride < 0 && start > end), then the array section contains at least one element. In this case, there is an out-of-bounds access if (start < lower || start > upper). */ - if (compare_bound (AR_START, AR_END) == CMP_EQ - || ((compare_bound_int (ar->stride[i], 0) == CMP_GT - || ar->stride[i] == NULL) && comp_start_end == CMP_LT) - || (compare_bound_int (ar->stride[i], 0) == CMP_LT + if (comp_start_end == CMP_EQ + || ((comp_stride_zero == CMP_GT || ar->stride[i] == NULL) + && comp_start_end == CMP_LT) + || (comp_stride_zero == CMP_LT && comp_start_end == CMP_GT)) { if (compare_bound (AR_START, as->lower[i]) == CMP_LT) @@ -5454,7 +5461,9 @@ gfc_resolve_ref (gfc_expr *expr) case REF_INQUIRY: /* Implement requirement in note 9.7 of F2018 that the result of the LEN inquiry be a scalar. */ - if (ref->u.i == INQUIRY_LEN && array_ref && expr->ts.deferred) + if (ref->u.i == INQUIRY_LEN && array_ref + && ((expr->ts.type == BT_CHARACTER && !expr->ts.u.cl->length) + || expr->ts.type == BT_INTEGER)) { array_ref->u.ar.type = AR_ELEMENT; expr->rank = 0; @@ -6046,11 +6055,14 @@ resolve_variable (gfc_expr *e) /* Checks to see that the correct symbol has been host associated. - The only situation where this arises is that in which a twice - contained function is parsed after the host association is made. - Therefore, on detecting this, change the symbol in the expression - and convert the array reference into an actual arglist if the old - symbol is a variable. */ + The only situations where this arises are: + (i) That in which a twice contained function is parsed after + the host association is made. On detecting this, change + the symbol in the expression and convert the array reference + into an actual arglist if the old symbol is a variable; or + (ii) That in which an external function is typed but not declared + explcitly to be external. Here, the old symbol is changed + from a variable to an external function. */ static bool check_host_association (gfc_expr *e) { @@ -6150,6 +6162,27 @@ check_host_association (gfc_expr *e) gfc_resolve_expr (e); sym->refs++; } + /* This case corresponds to a call, from a block or a contained + procedure, to an external function, which has not been declared + as being external in the main program but has been typed. */ + else if (sym && old_sym != sym + && !e->ref + && sym->ts.type == BT_UNKNOWN + && old_sym->ts.type != BT_UNKNOWN + && sym->attr.flavor == FL_PROCEDURE + && old_sym->attr.flavor == FL_VARIABLE + && sym->ns->parent == old_sym->ns + && sym->ns->proc_name + && sym->ns->proc_name->attr.proc != PROC_MODULE + && (sym->ns->proc_name->attr.flavor == FL_LABEL + || sym->ns->proc_name->attr.flavor == FL_PROCEDURE)) + { + old_sym->attr.flavor = FL_PROCEDURE; + old_sym->attr.external = 1; + old_sym->attr.function = 1; + old_sym->result = old_sym; + gfc_resolve_expr (e); + } } /* This might have changed! */ return e->expr_type == EXPR_FUNCTION; @@ -7528,7 +7561,8 @@ derived_inaccessible (gfc_symbol *sym) for (c = sym->components; c; c = c->next) { /* Prevent an infinite loop through this function. */ - if (c->ts.type == BT_DERIVED && c->attr.pointer + if (c->ts.type == BT_DERIVED + && (c->attr.pointer || c->attr.allocatable) && sym == c->ts.u.derived) continue; @@ -9891,11 +9925,6 @@ resolve_select_rank (gfc_code *code, gfc_namespace *old_ns) || gfc_expr_attr (code->expr1).pointer)) gfc_error ("RANK (*) at %L cannot be used with the pointer or " "allocatable selector at %L", &c->where, &code->expr1->where); - - if (case_value == -1 && (gfc_expr_attr (code->expr1).allocatable - || gfc_expr_attr (code->expr1).pointer)) - gfc_error ("RANK (*) at %L cannot be used with the pointer or " - "allocatable selector at %L", &c->where, &code->expr1->where); } /* Add EXEC_SELECT to switch on rank. */ @@ -11771,6 +11800,17 @@ resolve_ptr_fcn_assign (gfc_code **code, gfc_namespace *ns) tmp_ptr_expr->symtree->n.sym->attr.allocatable = 0; tmp_ptr_expr->where = (*code)->loc; + /* A new charlen is required to ensure that the variable string length + is different to that of the original lhs for deferred results. */ + if (s->result->ts.deferred && tmp_ptr_expr->ts.type == BT_CHARACTER) + { + tmp_ptr_expr->ts.u.cl = gfc_get_charlen(); + tmp_ptr_expr->ts.deferred = 1; + tmp_ptr_expr->ts.u.cl->next = gfc_current_ns->cl_list; + gfc_current_ns->cl_list = tmp_ptr_expr->ts.u.cl; + tmp_ptr_expr->symtree->n.sym->ts.u.cl = tmp_ptr_expr->ts.u.cl; + } + this_code = build_assignment (EXEC_ASSIGN, tmp_ptr_expr, (*code)->expr2, NULL, NULL, (*code)->loc); @@ -12881,7 +12921,10 @@ resolve_fl_var_and_proc (gfc_symbol *sym, int mp_flag) if (allocatable) { - if (dimension && as->type != AS_ASSUMED_RANK) + if (dimension + && as + && as->type != AS_ASSUMED_RANK + && !sym->attr.select_rank_temporary) { gfc_error ("Allocatable array %qs at %L must have a deferred " "shape or assumed rank", sym->name, &sym->declared_at); @@ -13593,6 +13636,16 @@ resolve_fl_procedure (gfc_symbol *sym, int mp_flag) } } } + + /* F2018:15.4.2.2 requires an explicit interface for procedures with the + BIND(C) attribute. */ + if (sym->attr.is_bind_c && sym->attr.if_source == IFSRC_UNKNOWN) + { + gfc_error ("Interface of %qs at %L must be explicit", + sym->name, &sym->declared_at); + return false; + } + return true; } @@ -14824,6 +14877,19 @@ resolve_component (gfc_component *c, gfc_symbol *sym) c->ts.u.cl->length ? &c->ts.u.cl->length->where : &c->loc); return false; } + + if (c->ts.u.cl->length && c->ts.u.cl->length->ts.type != BT_INTEGER) + { + if (!c->ts.u.cl->length->error) + { + gfc_error ("Character length expression of component %qs at %L " + "must be of INTEGER type, found %s", + c->name, &c->ts.u.cl->length->where, + gfc_basic_typename (c->ts.u.cl->length->ts.type)); + c->ts.u.cl->length->error = 1; + } + return false; + } } if (c->ts.type == BT_CHARACTER && c->ts.deferred @@ -15845,8 +15911,8 @@ resolve_symbol (gfc_symbol *sym) /* First, make sure the variable is declared at the module-level scope (J3/04-007, Section 15.3). */ - if (sym->ns->proc_name->attr.flavor != FL_MODULE && - sym->attr.in_common == 0) + if (!(sym->ns->proc_name && sym->ns->proc_name->attr.flavor == FL_MODULE) + && !sym->attr.in_common) { gfc_error ("Variable %qs at %L cannot be BIND(C) because it " "is neither a COMMON block nor declared at the " @@ -17342,7 +17408,9 @@ resolve_fntype (gfc_namespace *ns) } } - if (sym->ts.type == BT_CHARACTER) + if (sym->ts.type == BT_CHARACTER + && sym->ts.u.cl->length + && sym->ts.u.cl->length->ts.type == BT_INTEGER) gfc_traverse_expr (sym->ts.u.cl->length, sym, flag_fn_result_spec, 0); } diff --git a/gcc/fortran/simplify.cc b/gcc/fortran/simplify.cc index 233cc42137fee..b8935eb0118b8 100644 --- a/gcc/fortran/simplify.cc +++ b/gcc/fortran/simplify.cc @@ -708,6 +708,7 @@ simplify_transformation (gfc_expr *array, gfc_expr *dim, gfc_expr *mask, size_zero = gfc_is_size_zero_array (array); if (!(is_constant_array_expr (array) || size_zero) + || array->shape == NULL || !gfc_is_constant_expr (dim)) return NULL; @@ -3093,6 +3094,10 @@ gfc_simplify_extends_type_of (gfc_expr *a, gfc_expr *mold) if (UNLIMITED_POLY (a) || UNLIMITED_POLY (mold)) return NULL; + if ((a->ts.type == BT_CLASS && !gfc_expr_attr (a).class_ok) + || (mold->ts.type == BT_CLASS && !gfc_expr_attr (mold).class_ok)) + return NULL; + /* Return .false. if the dynamic type can never be an extension. */ if ((a->ts.type == BT_CLASS && mold->ts.type == BT_CLASS && !gfc_type_is_extension_of @@ -3503,17 +3508,15 @@ gfc_expr * gfc_simplify_index (gfc_expr *x, gfc_expr *y, gfc_expr *b, gfc_expr *kind) { gfc_expr *result; - int back, len, lensub; - int i, j, k, count, index = 0, start; + bool back; + HOST_WIDE_INT len, lensub, start, last, i, index = 0; + int k, delta; if (x->expr_type != EXPR_CONSTANT || y->expr_type != EXPR_CONSTANT || ( b != NULL && b->expr_type != EXPR_CONSTANT)) return NULL; - if (b != NULL && b->value.logical != 0) - back = 1; - else - back = 0; + back = (b != NULL && b->value.logical != 0); k = get_kind (BT_INTEGER, kind, "INDEX", gfc_default_integer_kind); if (k == -1) @@ -3530,111 +3533,40 @@ gfc_simplify_index (gfc_expr *x, gfc_expr *y, gfc_expr *b, gfc_expr *kind) return result; } - if (back == 0) + if (lensub == 0) { - if (lensub == 0) - { - mpz_set_si (result->value.integer, 1); - return result; - } - else if (lensub == 1) - { - for (i = 0; i < len; i++) - { - for (j = 0; j < lensub; j++) - { - if (y->value.character.string[j] - == x->value.character.string[i]) - { - index = i + 1; - goto done; - } - } - } - } + if (back) + index = len + 1; else - { - for (i = 0; i < len; i++) - { - for (j = 0; j < lensub; j++) - { - if (y->value.character.string[j] - == x->value.character.string[i]) - { - start = i; - count = 0; - - for (k = 0; k < lensub; k++) - { - if (y->value.character.string[k] - == x->value.character.string[k + start]) - count++; - } - - if (count == lensub) - { - index = start + 1; - goto done; - } - } - } - } - } + index = 1; + goto done; + } + if (!back) + { + last = len + 1 - lensub; + start = 0; + delta = 1; } else { - if (lensub == 0) + last = -1; + start = len - lensub; + delta = -1; + } + + for (; start != last; start += delta) + { + for (i = 0; i < lensub; i++) { - mpz_set_si (result->value.integer, len + 1); - return result; + if (x->value.character.string[start + i] + != y->value.character.string[i]) + break; } - else if (lensub == 1) + if (i == lensub) { - for (i = 0; i < len; i++) - { - for (j = 0; j < lensub; j++) - { - if (y->value.character.string[j] - == x->value.character.string[len - i]) - { - index = len - i + 1; - goto done; - } - } - } - } - else - { - for (i = 0; i < len; i++) - { - for (j = 0; j < lensub; j++) - { - if (y->value.character.string[j] - == x->value.character.string[len - i]) - { - start = len - i; - if (start <= len - lensub) - { - count = 0; - for (k = 0; k < lensub; k++) - if (y->value.character.string[k] - == x->value.character.string[k + start]) - count++; - - if (count == lensub) - { - index = start + 1; - goto done; - } - } - else - { - continue; - } - } - } - } + index = start + 1; + goto done; } } @@ -4593,19 +4525,50 @@ gfc_simplify_len (gfc_expr *e, gfc_expr *kind) return range_check (result, "LEN"); } else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER - && e->symtree->n.sym - && e->symtree->n.sym->ts.type != BT_DERIVED - && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target - && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED - && e->symtree->n.sym->assoc->target->symtree->n.sym - && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym)) - - /* The expression in assoc->target points to a ref to the _data component - of the unlimited polymorphic entity. To get the _len component the last - _data ref needs to be stripped and a ref to the _len component added. */ - return gfc_get_len_component (e->symtree->n.sym->assoc->target, k); - else - return NULL; + && e->symtree->n.sym) + { + if (e->symtree->n.sym->ts.type != BT_DERIVED + && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target + && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED + && e->symtree->n.sym->assoc->target->symtree->n.sym + && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym)) + /* The expression in assoc->target points to a ref to the _data + component of the unlimited polymorphic entity. To get the _len + component the last _data ref needs to be stripped and a ref to the + _len component added. */ + return gfc_get_len_component (e->symtree->n.sym->assoc->target, k); + else if (e->symtree->n.sym->ts.type == BT_DERIVED + && e->ref && e->ref->type == REF_COMPONENT + && e->ref->u.c.component->attr.pdt_string + && e->ref->u.c.component->ts.type == BT_CHARACTER + && e->ref->u.c.component->ts.u.cl->length) + { + if (gfc_init_expr_flag) + { + gfc_expr* tmp; + tmp = gfc_pdt_find_component_copy_initializer (e->symtree->n.sym, + e->ref->u.c + .component->ts.u.cl + ->length->symtree + ->name); + if (tmp) + return tmp; + } + else + { + gfc_expr *len_expr = gfc_copy_expr (e); + gfc_free_ref_list (len_expr->ref); + len_expr->ref = NULL; + gfc_find_component (len_expr->symtree->n.sym->ts.u.derived, e->ref + ->u.c.component->ts.u.cl->length->symtree + ->name, + false, true, &len_expr->ref); + len_expr->ts = len_expr->ref->u.c.component->ts; + return len_expr; + } + } + } + return NULL; } @@ -4619,6 +4582,81 @@ gfc_simplify_len_trim (gfc_expr *e, gfc_expr *kind) if (k == -1) return &gfc_bad_expr; + /* If the expression is either an array element or section, an array + parameter must be built so that the reference can be applied. Constant + references should have already been simplified away. All other cases + can proceed to translation, where kind conversion will occur silently. */ + if (e->expr_type == EXPR_VARIABLE + && e->ts.type == BT_CHARACTER + && e->symtree->n.sym->attr.flavor == FL_PARAMETER + && e->ref && e->ref->type == REF_ARRAY + && e->ref->u.ar.type != AR_FULL + && e->symtree->n.sym->value) + { + char name[2*GFC_MAX_SYMBOL_LEN + 12]; + gfc_namespace *ns = e->symtree->n.sym->ns; + gfc_symtree *st; + gfc_expr *expr; + gfc_expr *p; + gfc_constructor *c; + int cnt = 0; + + sprintf (name, "_len_trim_%s_%s", e->symtree->n.sym->name, + ns->proc_name->name); + st = gfc_find_symtree (ns->sym_root, name); + if (st) + goto already_built; + + /* Recursively call this fcn to simplify the constructor elements. */ + expr = gfc_copy_expr (e->symtree->n.sym->value); + expr->ts.type = BT_INTEGER; + expr->ts.kind = k; + expr->ts.u.cl = NULL; + c = gfc_constructor_first (expr->value.constructor); + for (; c; c = gfc_constructor_next (c)) + { + if (c->iterator) + continue; + + if (c->expr && c->expr->ts.type == BT_CHARACTER) + { + p = gfc_simplify_len_trim (c->expr, kind); + if (p == NULL) + goto clean_up; + gfc_replace_expr (c->expr, p); + cnt++; + } + } + + if (cnt) + { + /* Build a new parameter to take the result. */ + st = gfc_new_symtree (&ns->sym_root, name); + st->n.sym = gfc_new_symbol (st->name, ns); + st->n.sym->value = expr; + st->n.sym->ts = expr->ts; + st->n.sym->attr.dimension = 1; + st->n.sym->attr.save = SAVE_IMPLICIT; + st->n.sym->attr.flavor = FL_PARAMETER; + st->n.sym->as = gfc_copy_array_spec (e->symtree->n.sym->as); + gfc_set_sym_referenced (st->n.sym); + st->n.sym->refs++; + gfc_commit_symbol (st->n.sym); + +already_built: + /* Build a return expression. */ + expr = gfc_copy_expr (e); + expr->ts = st->n.sym->ts; + expr->symtree = st; + gfc_expression_rank (expr); + return expr; + } + +clean_up: + gfc_free_expr (expr); + return NULL; + } + if (e->expr_type != EXPR_CONSTANT) return NULL; @@ -5926,6 +5964,7 @@ gfc_simplify_findloc (gfc_expr *array, gfc_expr *value, gfc_expr *dim, bool back_val = false; if (!is_constant_array_expr (array) + || array->shape == NULL || !gfc_is_constant_expr (dim)) return NULL; @@ -6125,7 +6164,7 @@ gfc_simplify_nearest (gfc_expr *x, gfc_expr *s) kind = gfc_validate_kind (BT_REAL, x->ts.kind, 0); mpfr_set_emin ((mpfr_exp_t) gfc_real_kinds[kind].min_exponent - mpfr_get_prec(result->value.real) + 1); - mpfr_set_emax ((mpfr_exp_t) gfc_real_kinds[kind].max_exponent - 1); + mpfr_set_emax ((mpfr_exp_t) gfc_real_kinds[kind].max_exponent); mpfr_check_range (result->value.real, 0, MPFR_RNDU); if (mpfr_sgn (s->value.real) > 0) @@ -6462,7 +6501,7 @@ gfc_simplify_pack (gfc_expr *array, gfc_expr *mask, gfc_expr *vector) /* Copy only those elements of ARRAY to RESULT whose MASK equals .TRUE.. */ mask_ctor = gfc_constructor_first (mask->value.constructor); - while (mask_ctor) + while (mask_ctor && array_ctor) { if (mask_ctor->expr->value.logical) { @@ -7375,7 +7414,7 @@ gfc_simplify_set_exponent (gfc_expr *x, gfc_expr *i) { gfc_expr *result; mpfr_t exp, absv, log2, pow2, frac; - unsigned long exp2; + long exp2; if (x->expr_type != EXPR_CONSTANT || i->expr_type != EXPR_CONSTANT) return NULL; @@ -7407,19 +7446,19 @@ gfc_simplify_set_exponent (gfc_expr *x, gfc_expr *i) mpfr_abs (absv, x->value.real, GFC_RND_MODE); mpfr_log2 (log2, absv, GFC_RND_MODE); - mpfr_trunc (log2, log2); + mpfr_floor (log2, log2); mpfr_add_ui (exp, log2, 1, GFC_RND_MODE); /* Old exponent value, and fraction. */ mpfr_ui_pow (pow2, 2, exp, GFC_RND_MODE); - mpfr_div (frac, absv, pow2, GFC_RND_MODE); + mpfr_div (frac, x->value.real, pow2, GFC_RND_MODE); /* New exponent. */ - exp2 = (unsigned long) mpz_get_d (i->value.integer); - mpfr_mul_2exp (result->value.real, frac, exp2, GFC_RND_MODE); + exp2 = mpz_get_si (i->value.integer); + mpfr_mul_2si (result->value.real, frac, exp2, GFC_RND_MODE); - mpfr_clears (absv, log2, pow2, frac, NULL); + mpfr_clears (absv, log2, exp, pow2, frac, NULL); return range_check (result, "SET_EXPONENT"); } @@ -7567,8 +7606,9 @@ simplify_size (gfc_expr *array, gfc_expr *dim, int k) } for (ref = array->ref; ref; ref = ref->next) - if (ref->type == REF_ARRAY && ref->u.ar.as) - gfc_resolve_array_spec (ref->u.ar.as, 0); + if (ref->type == REF_ARRAY && ref->u.ar.as + && !gfc_resolve_array_spec (ref->u.ar.as, 0)) + return NULL; if (dim == NULL) { @@ -8487,9 +8527,16 @@ gfc_simplify_unpack (gfc_expr *vector, gfc_expr *mask, gfc_expr *field) { if (mask_ctor->expr->value.logical) { - gcc_assert (vector_ctor); - e = gfc_copy_expr (vector_ctor->expr); - vector_ctor = gfc_constructor_next (vector_ctor); + if (vector_ctor) + { + e = gfc_copy_expr (vector_ctor->expr); + vector_ctor = gfc_constructor_next (vector_ctor); + } + else + { + gfc_free_expr (result); + return NULL; + } } else if (field->expr_type == EXPR_ARRAY) e = gfc_copy_expr (field_ctor->expr); diff --git a/gcc/fortran/symbol.cc b/gcc/fortran/symbol.cc index 7a80dfd063b1b..e7de5a8f525f1 100644 --- a/gcc/fortran/symbol.cc +++ b/gcc/fortran/symbol.cc @@ -1108,6 +1108,12 @@ gfc_add_contiguous (symbol_attribute *attr, const char *name, locus *where) if (check_used (attr, name, where)) return false; + if (attr->contiguous) + { + duplicate_attr ("CONTIGUOUS", where); + return false; + } + attr->contiguous = 1; return gfc_check_conflict (attr, name, where); } @@ -3755,7 +3761,11 @@ free_old_symbol (gfc_symbol *sym) if (sym->old_symbol == NULL) return; - if (sym->old_symbol->as != sym->as) + if (sym->old_symbol->as != NULL + && sym->old_symbol->as != sym->as + && !(sym->ts.type == BT_CLASS + && sym->ts.u.derived->attr.is_class + && sym->old_symbol->as == CLASS_DATA (sym)->as)) gfc_free_array_spec (sym->old_symbol->as); if (sym->old_symbol->value != sym->value) @@ -4709,6 +4719,13 @@ gfc_copy_formal_args_intr (gfc_symbol *dest, gfc_intrinsic_sym *src, formal_arg->sym->attr.flavor = FL_VARIABLE; formal_arg->sym->attr.dummy = 1; + /* Do not treat an actual deferred-length character argument wrongly + as template for the formal argument. */ + if (formal_arg->sym->ts.type == BT_CHARACTER + && !(formal_arg->sym->attr.allocatable + || formal_arg->sym->attr.pointer)) + formal_arg->sym->ts.deferred = false; + if (formal_arg->sym->ts.type == BT_CHARACTER) formal_arg->sym->ts.u.cl = gfc_new_charlen (gfc_current_ns, NULL); @@ -5133,6 +5150,10 @@ gfc_type_compatible (gfc_typespec *ts1, gfc_typespec *ts2) bool is_union1 = (ts1->type == BT_UNION); bool is_union2 = (ts2->type == BT_UNION); + /* A boz-literal-constant has no type. */ + if (ts1->type == BT_BOZ || ts2->type == BT_BOZ) + return false; + if (is_class1 && ts1->u.derived->components && ((ts1->u.derived->attr.is_class diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc index 05134952db43d..ddaedf9604e9e 100644 --- a/gcc/fortran/trans-array.cc +++ b/gcc/fortran/trans-array.cc @@ -943,6 +943,8 @@ tree gfc_get_array_span (tree desc, gfc_expr *expr) { tree tmp; + gfc_symbol *sym = (expr && expr->expr_type == EXPR_VARIABLE) ? + expr->symtree->n.sym : NULL; if (is_pointer_array (desc) || (get_CFI_desc (NULL, expr, &desc, NULL) @@ -964,25 +966,47 @@ gfc_get_array_span (tree desc, gfc_expr *expr) desc = build_fold_indirect_ref_loc (input_location, desc); tmp = gfc_conv_descriptor_span_get (desc); } + else if (UNLIMITED_POLY (expr) + || (sym && UNLIMITED_POLY (sym))) + { + /* Treat unlimited polymorphic expressions separately because + the element size need not be the same as the span. Obtain + the class container, which is simplified here by there being + no component references. */ + if (sym && sym->attr.dummy) + { + tmp = gfc_get_symbol_decl (sym); + tmp = GFC_DECL_SAVED_DESCRIPTOR (tmp); + if (INDIRECT_REF_P (tmp)) + tmp = TREE_OPERAND (tmp, 0); + } + else + { + gcc_assert (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (desc))); + tmp = TREE_OPERAND (desc, 0); + } + tmp = gfc_class_data_get (tmp); + tmp = gfc_conv_descriptor_span_get (tmp); + } else if (TREE_CODE (desc) == COMPONENT_REF && GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (desc)) && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (desc, 0)))) { - /* The descriptor is a class _data field and so use the vtable - size for the receiving span field. */ + /* The descriptor is a class _data field. Use the vtable size + since it is guaranteed to have been set and is always OK for + class array descriptors that are not unlimited. */ tmp = gfc_get_vptr_from_expr (desc); tmp = gfc_vptr_size_get (tmp); } - else if (expr && expr->expr_type == EXPR_VARIABLE - && expr->symtree->n.sym->ts.type == BT_CLASS + else if (sym && sym->ts.type == BT_CLASS && expr->ref->type == REF_COMPONENT && expr->ref->next->type == REF_ARRAY && expr->ref->next->next == NULL - && CLASS_DATA (expr->symtree->n.sym)->attr.dimension) + && CLASS_DATA (sym)->attr.dimension) { - /* Dummys come in sometimes with the descriptor detached from - the class field or declaration. */ - tmp = gfc_class_vptr_get (expr->symtree->n.sym->backend_decl); + /* Class dummys usually require extraction from the saved + descriptor, which gfc_class_vptr_get does for us. */ + tmp = gfc_class_vptr_get (sym->backend_decl); tmp = gfc_vptr_size_get (tmp); } else @@ -2114,7 +2138,9 @@ gfc_trans_array_constructor_value (stmtblock_t * pblock, tree type, p = gfc_constructor_next (p); n++; } - if (n < 4) + /* Constructor with few constant elements, or element size not + known at compile time (e.g. deferred-length character). */ + if (n < 4 || !INTEGER_CST_P (TYPE_SIZE_UNIT (type))) { /* Scalar values. */ gfc_init_se (&se, NULL); @@ -3911,7 +3937,10 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_expr *expr, } decl = se->expr; - if (IS_CLASS_ARRAY (sym) && sym->attr.dummy && ar->as->type != AS_DEFERRED) + if (UNLIMITED_POLY(sym) + && IS_CLASS_ARRAY (sym) + && sym->attr.dummy + && ar->as->type != AS_DEFERRED) decl = sym->backend_decl; cst_offset = offset = gfc_index_zero_node; @@ -6280,6 +6309,8 @@ gfc_array_allocate (gfc_se * se, gfc_expr * expr, tree status, tree errmsg, else gfc_add_expr_to_block (&se->pre, set_descriptor); + expr->symtree->n.sym->allocated_in_scope = 1; + return true; } @@ -6614,7 +6645,6 @@ gfc_trans_auto_array_allocation (tree decl, gfc_symbol * sym, type = TREE_TYPE (type); gcc_assert (!sym->attr.use_assoc); - gcc_assert (!TREE_STATIC (decl)); gcc_assert (!sym->module); if (sym->ts.type == BT_CHARACTER @@ -10378,7 +10408,7 @@ gfc_is_reallocatable_lhs (gfc_expr *expr) /* An allocatable class variable with no reference. */ if (sym->ts.type == BT_CLASS - && !sym->attr.associate_var + && (!sym->attr.associate_var || sym->attr.select_rank_temporary) && CLASS_DATA (sym)->attr.allocatable && expr->ref && ((expr->ref->type == REF_ARRAY && expr->ref->u.ar.type == AR_FULL @@ -10393,7 +10423,7 @@ gfc_is_reallocatable_lhs (gfc_expr *expr) /* An allocatable variable. */ if (sym->attr.allocatable - && !sym->attr.associate_var + && (!sym->attr.associate_var || sym->attr.select_rank_temporary) && expr->ref && expr->ref->type == REF_ARRAY && expr->ref->u.ar.type == AR_FULL) @@ -10505,6 +10535,8 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo *loop, stmtblock_t realloc_block; stmtblock_t alloc_block; stmtblock_t fblock; + stmtblock_t loop_pre_block; + gfc_ref *ref; gfc_ss *rss; gfc_ss *lss; gfc_array_info *linfo; @@ -10713,6 +10745,45 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo *loop, else cond_null= gfc_evaluate_now (cond_null, &fblock); + /* If the data is null, set the descriptor bounds and offset. This suppresses + the maybe used uninitialized warning and forces the use of malloc because + the size is zero in all dimensions. Note that this block is only executed + if the lhs is unallocated and is only applied once in any namespace. + Component references are not subject to the warnings. */ + for (ref = expr1->ref; ref; ref = ref->next) + if (ref->type == REF_COMPONENT) + break; + + if (!expr1->symtree->n.sym->allocated_in_scope && !ref) + { + gfc_start_block (&loop_pre_block); + for (n = 0; n < expr1->rank; n++) + { + gfc_conv_descriptor_lbound_set (&loop_pre_block, desc, + gfc_rank_cst[n], + gfc_index_one_node); + gfc_conv_descriptor_ubound_set (&loop_pre_block, desc, + gfc_rank_cst[n], + gfc_index_zero_node); + gfc_conv_descriptor_stride_set (&loop_pre_block, desc, + gfc_rank_cst[n], + gfc_index_zero_node); + } + + tmp = gfc_conv_descriptor_offset (desc); + gfc_add_modify (&loop_pre_block, tmp, gfc_index_zero_node); + + tmp = fold_build2_loc (input_location, EQ_EXPR, + logical_type_node, array1, + build_int_cst (TREE_TYPE (array1), 0)); + tmp = build3_v (COND_EXPR, tmp, + gfc_finish_block (&loop_pre_block), + build_empty_stmt (input_location)); + gfc_prepend_expr_to_block (&loop->pre, tmp); + + expr1->symtree->n.sym->allocated_in_scope = 1; + } + tmp = build3_v (COND_EXPR, cond_null, build1_v (GOTO_EXPR, jump_label1), build_empty_stmt (input_location)); @@ -11125,6 +11196,52 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo *loop, } +/* Initialize class descriptor's TKR infomation. */ + +void +gfc_trans_class_array (gfc_symbol * sym, gfc_wrapped_block * block) +{ + tree type, etype; + tree tmp; + tree descriptor; + stmtblock_t init; + locus loc; + int rank; + + /* Make sure the frontend gets these right. */ + gcc_assert (sym->ts.type == BT_CLASS && CLASS_DATA (sym) + && (CLASS_DATA (sym)->attr.class_pointer + || CLASS_DATA (sym)->attr.allocatable)); + + gcc_assert (VAR_P (sym->backend_decl) + || TREE_CODE (sym->backend_decl) == PARM_DECL); + + if (sym->attr.dummy) + return; + + descriptor = gfc_class_data_get (sym->backend_decl); + type = TREE_TYPE (descriptor); + + if (type == NULL || !GFC_DESCRIPTOR_TYPE_P (type)) + return; + + gfc_save_backend_locus (&loc); + gfc_set_backend_locus (&sym->declared_at); + gfc_init_block (&init); + + rank = CLASS_DATA (sym)->as ? (CLASS_DATA (sym)->as->rank) : (0); + gcc_assert (rank>=0); + tmp = gfc_conv_descriptor_dtype (descriptor); + etype = gfc_get_element_type (type); + tmp = fold_build2_loc (input_location, MODIFY_EXPR, TREE_TYPE (tmp), tmp, + gfc_get_dtype_rank_type (rank, etype)); + gfc_add_expr_to_block (&init, tmp); + + gfc_add_init_cleanup (block, gfc_finish_block (&init), NULL_TREE); + gfc_restore_backend_locus (&loc); +} + + /* NULLIFY an allocatable/pointer array on function entry, free it on exit. Do likewise, recursively if necessary, with the allocatable components of derived types. This function is also called for assumed-rank arrays, which diff --git a/gcc/fortran/trans-array.h b/gcc/fortran/trans-array.h index 04fee6175906c..cd2b3d9f2f052 100644 --- a/gcc/fortran/trans-array.h +++ b/gcc/fortran/trans-array.h @@ -69,6 +69,8 @@ tree gfc_check_pdt_dummy (gfc_symbol *, tree, int, gfc_actual_arglist *); tree gfc_alloc_allocatable_for_assignment (gfc_loopinfo*, gfc_expr*, gfc_expr*); +/* Add initialization for class descriptors */ +void gfc_trans_class_array (gfc_symbol *, gfc_wrapped_block *); /* Add initialization for deferred arrays. */ void gfc_trans_deferred_array (gfc_symbol *, gfc_wrapped_block *); /* Generate an initializer for a static pointer or allocatable array. */ diff --git a/gcc/fortran/trans-decl.cc b/gcc/fortran/trans-decl.cc index 6493cc2f6b1d1..884978ad981d9 100644 --- a/gcc/fortran/trans-decl.cc +++ b/gcc/fortran/trans-decl.cc @@ -742,6 +742,7 @@ gfc_finish_var_decl (tree decl, gfc_symbol * sym) /* Keep variables larger than max-stack-var-size off stack. */ if (!(sym->ns->proc_name && sym->ns->proc_name->attr.recursive) && !sym->attr.automatic + && !sym->attr.associate_var && sym->attr.save != SAVE_EXPLICIT && sym->attr.save != SAVE_IMPLICIT && INTEGER_CST_P (DECL_SIZE_UNIT (decl)) @@ -4835,7 +4836,7 @@ gfc_trans_deferred_vars (gfc_symbol * proc_sym, gfc_wrapped_block * block) else if ((!sym->attr.dummy || sym->ts.deferred) && (sym->ts.type == BT_CLASS && CLASS_DATA (sym)->attr.class_pointer)) - continue; + gfc_trans_class_array (sym, block); else if ((!sym->attr.dummy || sym->ts.deferred) && (sym->attr.allocatable || (sym->attr.pointer && sym->attr.result) @@ -4919,6 +4920,10 @@ gfc_trans_deferred_vars (gfc_symbol * proc_sym, gfc_wrapped_block * block) tmp = NULL_TREE; } + /* Initialize descriptor's TKR information. */ + if (sym->ts.type == BT_CLASS) + gfc_trans_class_array (sym, block); + /* Deallocate when leaving the scope. Nullifying is not needed. */ if (!sym->attr.result && !sym->attr.dummy && !sym->attr.pointer @@ -5246,7 +5251,8 @@ gfc_create_module_variable (gfc_symbol * sym) /* Create the variable. */ pushdecl (decl); gcc_assert (sym->ns->proc_name->attr.flavor == FL_MODULE - || (sym->ns->parent->proc_name->attr.flavor == FL_MODULE + || ((sym->ns->parent->proc_name->attr.flavor == FL_MODULE + || sym->ns->parent->proc_name->attr.flavor == FL_PROCEDURE) && sym->fn_result_spec)); DECL_CONTEXT (decl) = sym->ns->proc_name->backend_decl; rest_of_decl_compilation (decl, 1, 0); @@ -5331,7 +5337,11 @@ gfc_trans_use_stmts (gfc_namespace * ns) /* Sometimes, generic interfaces wind up being over-ruled by a local symbol (see PR41062). */ if (!st->n.sym->attr.use_assoc) - continue; + { + *slot = error_mark_node; + entry->decls->clear_slot (slot); + continue; + } if (st->n.sym->backend_decl && DECL_P (st->n.sym->backend_decl) @@ -5529,6 +5539,7 @@ generate_coarray_sym_init (gfc_symbol *sym) if (sym->attr.dummy || sym->attr.allocatable || !sym->attr.codimension || sym->attr.use_assoc || !sym->attr.referenced + || sym->attr.associate_var || sym->attr.select_type_temporary) return; @@ -6474,7 +6485,7 @@ gfc_generate_return (void) NULL_TREE, and a 'return' is generated without a variable. The following generates a 'return __result_XXX' where XXX is the function name. */ - if (sym == sym->result && sym->attr.function) + if (sym == sym->result && sym->attr.function && !flag_f2c) { result = gfc_get_fake_result_decl (sym, 0); result = fold_build2_loc (input_location, MODIFY_EXPR, diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc index 850007fd2e14d..7a7a7be17930c 100644 --- a/gcc/fortran/trans-expr.cc +++ b/gcc/fortran/trans-expr.cc @@ -1178,8 +1178,10 @@ gfc_conv_class_to_class (gfc_se *parmse, gfc_expr *e, gfc_typespec class_ts, return; /* Test for FULL_ARRAY. */ - if (e->rank == 0 && gfc_expr_attr (e).codimension - && gfc_expr_attr (e).dimension) + if (e->rank == 0 + && ((gfc_expr_attr (e).codimension && gfc_expr_attr (e).dimension) + || (class_ts.u.derived->components->as + && class_ts.u.derived->components->as->type == AS_ASSUMED_RANK))) full_array = true; else gfc_is_class_array_ref (e, &full_array); @@ -1227,8 +1229,12 @@ gfc_conv_class_to_class (gfc_se *parmse, gfc_expr *e, gfc_typespec class_ts, && e->rank != class_ts.u.derived->components->as->rank) { if (e->rank == 0) - gfc_add_modify (&parmse->post, gfc_class_data_get (parmse->expr), - gfc_conv_descriptor_data_get (ctree)); + { + tmp = gfc_class_data_get (parmse->expr); + gfc_add_modify (&parmse->post, tmp, + fold_convert (TREE_TYPE (tmp), + gfc_conv_descriptor_data_get (ctree))); + } else class_array_data_assign (&parmse->post, parmse->expr, ctree, true); } @@ -1525,6 +1531,7 @@ gfc_copy_class_to_class (tree from, tree to, tree nelems, bool unlimited) name = (const char *)(DECL_NAME (to)->identifier.id.str); from_len = gfc_conv_descriptor_size (from_data, 1); + from_len = fold_convert (TREE_TYPE (orig_nelems), from_len); tmp = fold_build2_loc (input_location, NE_EXPR, logical_type_node, from_len, orig_nelems); msg = xasprintf ("Array bound mismatch for dimension %d " @@ -2847,11 +2854,13 @@ conv_inquiry (gfc_se * se, gfc_ref * ref, gfc_expr *expr, gfc_typespec *ts) case INQUIRY_KIND: res = build_int_cst (gfc_typenode_for_spec (&expr->ts), ts->kind); + se->string_length = NULL_TREE; break; case INQUIRY_LEN: res = fold_convert (gfc_typenode_for_spec (&expr->ts), se->string_length); + se->string_length = NULL_TREE; break; default: @@ -3914,6 +3923,19 @@ gfc_conv_expr_op (gfc_se * se, gfc_expr * expr) if (lop) { + // Inhibit overeager optimization of Cray pointer comparisons (PR106692). + if (expr->value.op.op1->expr_type == EXPR_VARIABLE + && expr->value.op.op1->ts.type == BT_INTEGER + && expr->value.op.op1->symtree + && expr->value.op.op1->symtree->n.sym->attr.cray_pointer) + TREE_THIS_VOLATILE (lse.expr) = 1; + + if (expr->value.op.op2->expr_type == EXPR_VARIABLE + && expr->value.op.op2->ts.type == BT_INTEGER + && expr->value.op.op2->symtree + && expr->value.op.op2->symtree->n.sym->attr.cray_pointer) + TREE_THIS_VOLATILE (rse.expr) = 1; + /* The result of logical ops is always logical_type_node. */ tmp = fold_build2_loc (input_location, code, logical_type_node, lse.expr, rse.expr); @@ -4317,12 +4339,15 @@ gfc_get_interface_mapping_charlen (gfc_interface_mapping * mapping, static tree gfc_get_interface_mapping_array (stmtblock_t * block, gfc_symbol * sym, - gfc_packed packed, tree data) + gfc_packed packed, tree data, tree len) { tree type; tree var; - type = gfc_typenode_for_spec (&sym->ts); + if (len != NULL_TREE && (TREE_CONSTANT (len) || VAR_P (len))) + type = gfc_get_character_type_len (sym->ts.kind, len); + else + type = gfc_typenode_for_spec (&sym->ts); type = gfc_get_nodesc_array_type (type, sym->as, packed, !sym->attr.target && !sym->attr.pointer && !sym->attr.proc_pointer); @@ -4469,7 +4494,8 @@ gfc_add_interface_mapping (gfc_interface_mapping * mapping, convert it to a boundless character type. */ else if (!sym->attr.dimension && sym->ts.type == BT_CHARACTER) { - tmp = gfc_get_character_type_len (sym->ts.kind, NULL); + se->string_length = gfc_evaluate_now (se->string_length, &se->pre); + tmp = gfc_get_character_type_len (sym->ts.kind, se->string_length); tmp = build_pointer_type (tmp); if (sym->attr.pointer) value = build_fold_indirect_ref_loc (input_location, @@ -4488,7 +4514,7 @@ gfc_add_interface_mapping (gfc_interface_mapping * mapping, /* For character(*), use the actual argument's descriptor. */ else if (sym->ts.type == BT_CHARACTER && !new_sym->ts.u.cl->length) value = build_fold_indirect_ref_loc (input_location, - se->expr); + se->expr); /* If the argument is an array descriptor, use it to determine information about the actual argument's shape. */ @@ -4502,7 +4528,8 @@ gfc_add_interface_mapping (gfc_interface_mapping * mapping, /* Create the replacement variable. */ tmp = gfc_conv_descriptor_data_get (desc); value = gfc_get_interface_mapping_array (&se->pre, sym, - PACKED_NO, tmp); + PACKED_NO, tmp, + se->string_length); /* Use DESC to work out the upper bounds, strides and offset. */ gfc_set_interface_mapping_bounds (&se->pre, TREE_TYPE (value), desc); @@ -4510,7 +4537,8 @@ gfc_add_interface_mapping (gfc_interface_mapping * mapping, else /* Otherwise we have a packed array. */ value = gfc_get_interface_mapping_array (&se->pre, sym, - PACKED_FULL, se->expr); + PACKED_FULL, se->expr, + se->string_length); new_sym->backend_decl = value; } @@ -6018,7 +6046,6 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, gfc_charlen cl; gfc_expr *e; gfc_symbol *fsym; - stmtblock_t post; enum {MISSING = 0, ELEMENTAL, SCALAR, SCALAR_POINTER, ARRAY}; gfc_component *comp = NULL; int arglen; @@ -6062,7 +6089,9 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, else info = NULL; + stmtblock_t post, clobbers; gfc_init_block (&post); + gfc_init_block (&clobbers); gfc_init_interface_mapping (&mapping); if (!comp) { @@ -6395,7 +6424,7 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, && e->symtree->n.sym->attr.pointer)) && fsym && fsym->attr.target) /* Make sure the function only gets called once. */ - gfc_conv_expr_reference (&parmse, e, false); + gfc_conv_expr_reference (&parmse, e); else if (e->expr_type == EXPR_FUNCTION && e->symtree->n.sym->result && e->symtree->n.sym->result != e->symtree->n.sym @@ -6502,22 +6531,37 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, } else { - bool add_clobber; - add_clobber = fsym && fsym->attr.intent == INTENT_OUT - && !fsym->attr.allocatable && !fsym->attr.pointer - && e->symtree && e->symtree->n.sym - && !e->symtree->n.sym->attr.dimension - && !e->symtree->n.sym->attr.pointer - && !e->symtree->n.sym->attr.allocatable - /* See PR 41453. */ - && !e->symtree->n.sym->attr.dummy - /* FIXME - PR 87395 and PR 41453 */ - && e->symtree->n.sym->attr.save == SAVE_NONE - && !e->symtree->n.sym->attr.associate_var - && e->ts.type != BT_CHARACTER && e->ts.type != BT_DERIVED - && e->ts.type != BT_CLASS && !sym->attr.elemental; - - gfc_conv_expr_reference (&parmse, e, add_clobber); + gfc_conv_expr_reference (&parmse, e); + + if (fsym + && fsym->attr.intent == INTENT_OUT + && !fsym->attr.allocatable + && !fsym->attr.pointer + && e->expr_type == EXPR_VARIABLE + && e->ref == NULL + && e->symtree + && e->symtree->n.sym + && !e->symtree->n.sym->attr.dimension + && !e->symtree->n.sym->attr.pointer + && !e->symtree->n.sym->attr.allocatable + /* See PR 41453. */ + && !e->symtree->n.sym->attr.dummy + /* FIXME - PR 87395 and PR 41453 */ + && e->symtree->n.sym->attr.save == SAVE_NONE + && !e->symtree->n.sym->attr.associate_var + && e->ts.type != BT_CHARACTER + && e->ts.type != BT_DERIVED + && e->ts.type != BT_CLASS + && !sym->attr.elemental) + { + tree var; + /* FIXME: This fails if var is passed by reference, see PR + 41453. */ + var = build_fold_indirect_ref_loc (input_location, + parmse.expr); + tree clobber = build_clobber (TREE_TYPE (var)); + gfc_add_modify (&clobbers, var, clobber); + } } /* Catch base objects that are not variables. */ if (e->ts.type == BT_CLASS @@ -6526,23 +6570,6 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, base_object = build_fold_indirect_ref_loc (input_location, parmse.expr); - /* A class array element needs converting back to be a - class object, if the formal argument is a class object. */ - if (fsym && fsym->ts.type == BT_CLASS - && e->ts.type == BT_CLASS - && ((CLASS_DATA (fsym)->as - && CLASS_DATA (fsym)->as->type == AS_ASSUMED_RANK) - || CLASS_DATA (e)->attr.dimension)) - gfc_conv_class_to_class (&parmse, e, fsym->ts, false, - fsym->attr.intent != INTENT_IN - && (CLASS_DATA (fsym)->attr.class_pointer - || CLASS_DATA (fsym)->attr.allocatable), - fsym->attr.optional - && e->expr_type == EXPR_VARIABLE - && e->symtree->n.sym->attr.optional, - CLASS_DATA (fsym)->attr.class_pointer - || CLASS_DATA (fsym)->attr.allocatable); - /* If an ALLOCATABLE dummy argument has INTENT(OUT) and is allocated on entry, it must be deallocated. */ if (fsym && fsym->attr.intent == INTENT_OUT @@ -6603,6 +6630,23 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, gfc_add_expr_to_block (&se->pre, tmp); } + /* A class array element needs converting back to be a + class object, if the formal argument is a class object. */ + if (fsym && fsym->ts.type == BT_CLASS + && e->ts.type == BT_CLASS + && ((CLASS_DATA (fsym)->as + && CLASS_DATA (fsym)->as->type == AS_ASSUMED_RANK) + || CLASS_DATA (e)->attr.dimension)) + gfc_conv_class_to_class (&parmse, e, fsym->ts, false, + fsym->attr.intent != INTENT_IN + && (CLASS_DATA (fsym)->attr.class_pointer + || CLASS_DATA (fsym)->attr.allocatable), + fsym->attr.optional + && e->expr_type == EXPR_VARIABLE + && e->symtree->n.sym->attr.optional, + CLASS_DATA (fsym)->attr.class_pointer + || CLASS_DATA (fsym)->attr.allocatable); + if (fsym && (fsym->ts.type == BT_DERIVED || fsym->ts.type == BT_ASSUMED) && e->ts.type == BT_CLASS @@ -7220,16 +7264,15 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, else goto end_pointer_check; + tmp = parmse.expr; if (fsym && fsym->ts.type == BT_CLASS) { - tmp = build_fold_indirect_ref_loc (input_location, - parmse.expr); + if (POINTER_TYPE_P (TREE_TYPE (tmp))) + tmp = build_fold_indirect_ref_loc (input_location, tmp); tmp = gfc_class_data_get (tmp); if (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (tmp))) tmp = gfc_conv_descriptor_data_get (tmp); } - else - tmp = parmse.expr; /* If the argument is passed by value, we need to strip the INDIRECT_REF. */ @@ -7385,6 +7428,7 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, vec_safe_push (arglist, parmse.expr); } + gfc_add_block_to_block (&se->pre, &clobbers); gfc_finish_interface_mapping (&mapping, &se->pre, &se->post); if (comp) @@ -7405,7 +7449,12 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, (and other intrinsics?) and dummy functions. In the case of SPREAD, we take the character length of the first argument for the result. For dummies, we have to look through the formal argument list for - this function and use the character length found there.*/ + this function and use the character length found there. + Likewise, we handle the case of deferred-length character dummy + arguments to intrinsics that determine the characteristics of + the result, which cannot be deferred-length. */ + if (expr->value.function.isym) + ts.deferred = false; if (ts.deferred) cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen"); else if (!sym->attr.dummy) @@ -9270,7 +9319,7 @@ gfc_conv_structure (gfc_se * se, gfc_expr * expr, int init) cm = expr->ts.u.derived->components; for (c = gfc_constructor_first (expr->value.constructor); - c; c = gfc_constructor_next (c), cm = cm->next) + c && cm; c = gfc_constructor_next (c), cm = cm->next) { /* Skip absent members in default initializers and allocatable components. Although the latter have a default initializer @@ -9485,7 +9534,7 @@ gfc_conv_expr_type (gfc_se * se, gfc_expr * expr, tree type) values only. */ void -gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr, bool add_clobber) +gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr) { gfc_ss *ss; tree var; @@ -9525,16 +9574,6 @@ gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr, bool add_clobber) gfc_add_block_to_block (&se->pre, &se->post); se->expr = var; } - else if (add_clobber && expr->ref == NULL) - { - tree clobber; - tree var; - /* FIXME: This fails if var is passed by reference, see PR - 41453. */ - var = expr->symtree->n.sym->backend_decl; - clobber = build_clobber (TREE_TYPE (var)); - gfc_add_modify (&se->pre, var, clobber); - } return; } @@ -11436,6 +11475,9 @@ trans_class_assignment (stmtblock_t *block, gfc_expr *lhs, gfc_expr *rhs, class_han = GFC_CLASS_TYPE_P (TREE_TYPE (lse->expr)) ? gfc_class_data_get (lse->expr) : lse->expr; + if (!POINTER_TYPE_P (TREE_TYPE (class_han))) + class_han = gfc_build_addr_expr (NULL_TREE, class_han); + /* Allocate block. */ gfc_init_block (&alloc); gfc_allocate_using_malloc (&alloc, class_han, size, NULL_TREE); diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc index 2249723540d11..9393ca10b061e 100644 --- a/gcc/fortran/trans-intrinsic.cc +++ b/gcc/fortran/trans-intrinsic.cc @@ -41,6 +41,7 @@ along with GCC; see the file COPYING3. If not see #include "trans-array.h" #include "dependency.h" /* For CAF array alias analysis. */ #include "attribs.h" +#include "realmpfr.h" /* Only for gfc_trans_assign and gfc_trans_pointer_assign. */ @@ -3082,7 +3083,9 @@ gfc_conv_intrinsic_bound (gfc_se * se, gfc_expr * expr, enum gfc_isym_id op) lbound, gfc_index_one_node); } else if (op == GFC_ISYM_SHAPE) - se->expr = size; + se->expr = fold_build2_loc (input_location, MAX_EXPR, + gfc_array_index_type, size, + gfc_index_zero_node); else gcc_unreachable (); @@ -6630,6 +6633,7 @@ gfc_conv_intrinsic_ibits (gfc_se * se, gfc_expr * expr) tree type; tree tmp; tree mask; + tree num_bits, cond; gfc_conv_intrinsic_function_args (se, expr, args, 3); type = TREE_TYPE (args[0]); @@ -6670,8 +6674,17 @@ gfc_conv_intrinsic_ibits (gfc_se * se, gfc_expr * expr) "in intrinsic IBITS", tmp1, tmp2, nbits); } + /* The Fortran standard allows (shift width) LEN <= BIT_SIZE(I), whereas + gcc requires a shift width < BIT_SIZE(I), so we have to catch this + special case. See also gfc_conv_intrinsic_ishft (). */ + num_bits = build_int_cst (TREE_TYPE (args[2]), TYPE_PRECISION (type)); + mask = build_int_cst (type, -1); mask = fold_build2_loc (input_location, LSHIFT_EXPR, type, mask, args[2]); + cond = fold_build2_loc (input_location, GE_EXPR, logical_type_node, args[2], + num_bits); + mask = fold_build3_loc (input_location, COND_EXPR, type, cond, + build_int_cst (type, 0), mask); mask = fold_build1_loc (input_location, BIT_NOT_EXPR, type, mask); tmp = fold_build2_loc (input_location, RSHIFT_EXPR, type, args[0], args[1]); @@ -10008,6 +10021,220 @@ conv_intrinsic_ieee_copy_sign (gfc_se * se, gfc_expr * expr) } +/* Generate code for IEEE_CLASS. */ + +static bool +conv_intrinsic_ieee_class (gfc_se *se, gfc_expr *expr) +{ + tree arg, c, t1, t2, t3, t4; + + /* In GCC 12, handle inline only the powerpc64le-linux IEEE quad + real(kind=16) and nothing else. */ + if (gfc_type_abi_kind (&expr->value.function.actual->expr->ts) != 17) + return false; + + /* Convert arg, evaluate it only once. */ + conv_ieee_function_args (se, expr, &arg, 1); + arg = gfc_evaluate_now (arg, &se->pre); + + c = build_call_expr_loc (input_location, + builtin_decl_explicit (BUILT_IN_FPCLASSIFY), 6, + build_int_cst (integer_type_node, IEEE_QUIET_NAN), + build_int_cst (integer_type_node, + IEEE_POSITIVE_INF), + build_int_cst (integer_type_node, + IEEE_POSITIVE_NORMAL), + build_int_cst (integer_type_node, + IEEE_POSITIVE_DENORMAL), + build_int_cst (integer_type_node, + IEEE_POSITIVE_ZERO), + arg); + c = gfc_evaluate_now (c, &se->pre); + t1 = fold_build2_loc (input_location, EQ_EXPR, logical_type_node, + c, build_int_cst (integer_type_node, + IEEE_QUIET_NAN)); + /* In GCC 12, we don't have __builtin_issignaling but above we made + sure arg is powerpc64le-linux IEEE quad real(kind=16). + When we check it is some kind of NaN by fpclassify, all we need + is check the ((__int128) 1) << 111 bit, if it is zero, it is a sNaN, + if it is set, it is a qNaN. */ + t2 = fold_build1_loc (input_location, VIEW_CONVERT_EXPR, + build_nonstandard_integer_type (128, 1), arg); + t2 = fold_build2_loc (input_location, RSHIFT_EXPR, TREE_TYPE (t2), t2, + build_int_cst (integer_type_node, 111)); + t2 = fold_convert (integer_type_node, t2); + t2 = fold_build2_loc (input_location, BIT_AND_EXPR, integer_type_node, + t2, integer_one_node); + t2 = fold_build2_loc (input_location, EQ_EXPR, logical_type_node, + t2, build_zero_cst (TREE_TYPE (t2))); + t1 = fold_build2_loc (input_location, TRUTH_AND_EXPR, + logical_type_node, t1, t2); + t3 = fold_build2_loc (input_location, GE_EXPR, logical_type_node, + c, build_int_cst (integer_type_node, + IEEE_POSITIVE_ZERO)); + t4 = build_call_expr_loc (input_location, + builtin_decl_explicit (BUILT_IN_SIGNBIT), 1, + arg); + t4 = fold_build2_loc (input_location, NE_EXPR, logical_type_node, + t4, build_zero_cst (TREE_TYPE (t4))); + t3 = fold_build2_loc (input_location, TRUTH_AND_EXPR, + logical_type_node, t3, t4); + int s = IEEE_NEGATIVE_ZERO + IEEE_POSITIVE_ZERO; + gcc_assert (IEEE_NEGATIVE_INF == s - IEEE_POSITIVE_INF); + gcc_assert (IEEE_NEGATIVE_NORMAL == s - IEEE_POSITIVE_NORMAL); + gcc_assert (IEEE_NEGATIVE_DENORMAL == s - IEEE_POSITIVE_DENORMAL); + gcc_assert (IEEE_NEGATIVE_SUBNORMAL == s - IEEE_POSITIVE_SUBNORMAL); + gcc_assert (IEEE_NEGATIVE_ZERO == s - IEEE_POSITIVE_ZERO); + t4 = fold_build2_loc (input_location, MINUS_EXPR, TREE_TYPE (c), + build_int_cst (TREE_TYPE (c), s), c); + t3 = fold_build3_loc (input_location, COND_EXPR, TREE_TYPE (c), + t3, t4, c); + t1 = fold_build3_loc (input_location, COND_EXPR, TREE_TYPE (c), t1, + build_int_cst (TREE_TYPE (c), IEEE_SIGNALING_NAN), + t3); + tree type = gfc_typenode_for_spec (&expr->ts); + /* Perform a quick sanity check that the return type is + IEEE_CLASS_TYPE derived type defined in + libgfortran/ieee/ieee_arithmetic.F90 + Primarily check that it is a derived type with a single + member in it. */ + gcc_assert (TREE_CODE (type) == RECORD_TYPE); + tree field = NULL_TREE; + for (tree f = TYPE_FIELDS (type); f != NULL_TREE; f = DECL_CHAIN (f)) + if (TREE_CODE (f) == FIELD_DECL) + { + gcc_assert (field == NULL_TREE); + field = f; + } + gcc_assert (field); + t1 = fold_convert (TREE_TYPE (field), t1); + se->expr = build_constructor_single (type, field, t1); + return true; +} + + +/* Generate code for IEEE_VALUE. */ + +static bool +conv_intrinsic_ieee_value (gfc_se *se, gfc_expr *expr) +{ + tree args[2], arg, ret, tmp; + stmtblock_t body; + + /* In GCC 12, handle inline only the powerpc64le-linux IEEE quad + real(kind=16) and nothing else. */ + if (gfc_type_abi_kind (&expr->ts) != 17) + return false; + + /* Convert args, evaluate the second one only once. */ + conv_ieee_function_args (se, expr, args, 2); + arg = gfc_evaluate_now (args[1], &se->pre); + + tree type = TREE_TYPE (arg); + /* Perform a quick sanity check that the second argument's type is + IEEE_CLASS_TYPE derived type defined in + libgfortran/ieee/ieee_arithmetic.F90 + Primarily check that it is a derived type with a single + member in it. */ + gcc_assert (TREE_CODE (type) == RECORD_TYPE); + tree field = NULL_TREE; + for (tree f = TYPE_FIELDS (type); f != NULL_TREE; f = DECL_CHAIN (f)) + if (TREE_CODE (f) == FIELD_DECL) + { + gcc_assert (field == NULL_TREE); + field = f; + } + gcc_assert (field); + arg = fold_build3_loc (input_location, COMPONENT_REF, TREE_TYPE (field), + arg, field, NULL_TREE); + arg = gfc_evaluate_now (arg, &se->pre); + + type = gfc_typenode_for_spec (&expr->ts); + gcc_assert (TREE_CODE (type) == REAL_TYPE); + ret = gfc_create_var (type, NULL); + + gfc_init_block (&body); + + tree end_label = gfc_build_label_decl (NULL_TREE); + for (int c = IEEE_SIGNALING_NAN; c <= IEEE_POSITIVE_INF; ++c) + { + tree label = gfc_build_label_decl (NULL_TREE); + tree low = build_int_cst (TREE_TYPE (arg), c); + tmp = build_case_label (low, low, label); + gfc_add_expr_to_block (&body, tmp); + + REAL_VALUE_TYPE real; + int k; + switch (c) + { + case IEEE_SIGNALING_NAN: + real_nan (&real, "", 0, TYPE_MODE (type)); + break; + case IEEE_QUIET_NAN: + real_nan (&real, "", 1, TYPE_MODE (type)); + break; + case IEEE_NEGATIVE_INF: + real_inf (&real); + real = real_value_negate (&real); + break; + case IEEE_NEGATIVE_NORMAL: + real_from_integer (&real, TYPE_MODE (type), -42, SIGNED); + break; + case IEEE_NEGATIVE_DENORMAL: + k = gfc_validate_kind (BT_REAL, expr->ts.kind, false); + real_from_mpfr (&real, gfc_real_kinds[k].tiny, + type, GFC_RND_MODE); + real_arithmetic (&real, RDIV_EXPR, &real, &dconst2); + real = real_value_negate (&real); + break; + case IEEE_NEGATIVE_ZERO: + real_from_integer (&real, TYPE_MODE (type), 0, SIGNED); + real = real_value_negate (&real); + break; + case IEEE_POSITIVE_ZERO: + /* Make this also the default: label. The other possibility + would be to add a separate default: label followed by + __builtin_unreachable (). */ + label = gfc_build_label_decl (NULL_TREE); + tmp = build_case_label (NULL_TREE, NULL_TREE, label); + gfc_add_expr_to_block (&body, tmp); + real_from_integer (&real, TYPE_MODE (type), 0, SIGNED); + break; + case IEEE_POSITIVE_DENORMAL: + k = gfc_validate_kind (BT_REAL, expr->ts.kind, false); + real_from_mpfr (&real, gfc_real_kinds[k].tiny, + type, GFC_RND_MODE); + real_arithmetic (&real, RDIV_EXPR, &real, &dconst2); + break; + case IEEE_POSITIVE_NORMAL: + real_from_integer (&real, TYPE_MODE (type), 42, SIGNED); + break; + case IEEE_POSITIVE_INF: + real_inf (&real); + break; + default: + gcc_unreachable (); + } + + tree val = build_real (type, real); + gfc_add_modify (&body, ret, val); + + tmp = build1_v (GOTO_EXPR, end_label); + gfc_add_expr_to_block (&body, tmp); + } + + tmp = gfc_finish_block (&body); + tmp = fold_build2_loc (input_location, SWITCH_EXPR, NULL_TREE, arg, tmp); + gfc_add_expr_to_block (&se->pre, tmp); + + tmp = build1_v (LABEL_EXPR, end_label); + gfc_add_expr_to_block (&se->pre, tmp); + + se->expr = ret; + return true; +} + + /* Generate code for an intrinsic function from the IEEE_ARITHMETIC module. */ @@ -10038,6 +10265,10 @@ gfc_conv_ieee_arithmetic_function (gfc_se * se, gfc_expr * expr) conv_intrinsic_ieee_logb_rint (se, expr, BUILT_IN_LOGB); else if (startswith (name, "_gfortran_ieee_rint")) conv_intrinsic_ieee_logb_rint (se, expr, BUILT_IN_RINT); + else if (startswith (name, "ieee_class_") && ISDIGIT (name[11])) + return conv_intrinsic_ieee_class (se, expr); + else if (startswith (name, "ieee_value_") && ISDIGIT (name[11])) + return conv_intrinsic_ieee_value (se, expr); else /* It is not among the functions we translate directly. We return false, so a library function call is emitted. */ diff --git a/gcc/fortran/trans-openmp.cc b/gcc/fortran/trans-openmp.cc index 43d59abe9e098..a7da04064ca3b 100644 --- a/gcc/fortran/trans-openmp.cc +++ b/gcc/fortran/trans-openmp.cc @@ -3110,7 +3110,9 @@ gfc_trans_omp_clauses (stmtblock_t *block, gfc_omp_clauses *clauses, || GFC_DECL_CRAY_POINTEE (decl) || GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (TREE_TYPE (decl))) - || n->sym->ts.type == BT_DERIVED)) + || (n->sym->ts.type == BT_DERIVED + && (n->sym->ts.u.derived->ts.f90_type + != BT_VOID)))) { tree orig_decl = decl; @@ -6070,6 +6072,8 @@ gfc_split_omp_clauses (gfc_code *code, = code->ext.omp_clauses->lists[OMP_LIST_MAP]; clausesa[GFC_OMP_SPLIT_TARGET].lists[OMP_LIST_IS_DEVICE_PTR] = code->ext.omp_clauses->lists[OMP_LIST_IS_DEVICE_PTR]; + clausesa[GFC_OMP_SPLIT_TARGET].lists[OMP_LIST_HAS_DEVICE_ADDR] + = code->ext.omp_clauses->lists[OMP_LIST_HAS_DEVICE_ADDR]; clausesa[GFC_OMP_SPLIT_TARGET].device = code->ext.omp_clauses->device; clausesa[GFC_OMP_SPLIT_TARGET].thread_limit diff --git a/gcc/fortran/trans-types.cc b/gcc/fortran/trans-types.cc index 3cdc529eb2813..a01e218b30f23 100644 --- a/gcc/fortran/trans-types.cc +++ b/gcc/fortran/trans-types.cc @@ -3042,12 +3042,23 @@ create_fn_spec (gfc_symbol *sym, tree fntype) for (f = gfc_sym_get_dummy_args (sym); f; f = f->next) if (spec_len < sizeof (spec)) { - if (!f->sym || f->sym->attr.pointer || f->sym->attr.target + bool is_class = false; + bool is_pointer = false; + + if (f->sym) + { + is_class = f->sym->ts.type == BT_CLASS && CLASS_DATA (f->sym) + && f->sym->attr.class_ok; + is_pointer = is_class ? CLASS_DATA (f->sym)->attr.class_pointer + : f->sym->attr.pointer; + } + + if (f->sym == NULL || is_pointer || f->sym->attr.target || f->sym->attr.external || f->sym->attr.cray_pointer || (f->sym->ts.type == BT_DERIVED && (f->sym->ts.u.derived->attr.proc_pointer_comp || f->sym->ts.u.derived->attr.pointer_comp)) - || (f->sym->ts.type == BT_CLASS + || (is_class && (CLASS_DATA (f->sym)->ts.u.derived->attr.proc_pointer_comp || CLASS_DATA (f->sym)->ts.u.derived->attr.pointer_comp)) || (f->sym->ts.type == BT_INTEGER && f->sym->ts.is_c_interop)) diff --git a/gcc/fortran/trans.h b/gcc/fortran/trans.h index 623aceed52052..6451a633e6075 100644 --- a/gcc/fortran/trans.h +++ b/gcc/fortran/trans.h @@ -499,8 +499,7 @@ tree gfc_build_compare_string (tree, tree, tree, tree, int, enum tree_code); void gfc_conv_expr (gfc_se * se, gfc_expr * expr); void gfc_conv_expr_val (gfc_se * se, gfc_expr * expr); void gfc_conv_expr_lhs (gfc_se * se, gfc_expr * expr); -void gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr, - bool add_clobber = false); +void gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr); void gfc_conv_expr_type (gfc_se * se, gfc_expr *, tree); diff --git a/gcc/function.cc b/gcc/function.cc index ad0096a43eff6..d84a3240ee1a0 100644 --- a/gcc/function.cc +++ b/gcc/function.cc @@ -4879,7 +4879,7 @@ allocate_struct_function (tree fndecl, bool abstract_p) instead of just setting it. */ void -push_struct_function (tree fndecl) +push_struct_function (tree fndecl, bool abstract_p) { /* When in_dummy_function we might be in the middle of a pop_cfun and current_function_decl and cfun may not match. */ @@ -4888,7 +4888,7 @@ push_struct_function (tree fndecl) || (cfun && current_function_decl == cfun->decl)); cfun_stack.safe_push (cfun); current_function_decl = fndecl; - allocate_struct_function (fndecl, false); + allocate_struct_function (fndecl, abstract_p); } /* Reset crtl and other non-struct-function variables to defaults as @@ -5049,9 +5049,12 @@ stack_protect_epilogue (void) PARMS_HAVE_CLEANUPS is nonzero if there are cleanups associated with the function's parameters, which must be run at any return statement. */ +bool currently_expanding_function_start; void expand_function_start (tree subr) { + currently_expanding_function_start = true; + /* Make sure volatile mem refs aren't considered valid operands of arithmetic insns. */ init_recog_no_volatile (); @@ -5244,6 +5247,8 @@ expand_function_start (tree subr) /* If we are doing generic stack checking, the probe should go here. */ if (flag_stack_check == GENERIC_STACK_CHECK) stack_check_probe_note = emit_note (NOTE_INSN_DELETED); + + currently_expanding_function_start = false; } void diff --git a/gcc/function.h b/gcc/function.h index 098613766bea4..a53fb24d21751 100644 --- a/gcc/function.h +++ b/gcc/function.h @@ -683,7 +683,7 @@ extern void pop_cfun (void); extern int get_next_funcdef_no (void); extern int get_last_funcdef_no (void); extern void allocate_struct_function (tree, bool); -extern void push_struct_function (tree fndecl); +extern void push_struct_function (tree fndecl, bool = false); extern void push_dummy_function (bool); extern void pop_dummy_function (void); extern void init_dummy_function_start (void); @@ -719,4 +719,6 @@ extern const char *current_function_name (void); extern void used_types_insert (tree); +extern bool currently_expanding_function_start; + #endif /* GCC_FUNCTION_H */ diff --git a/gcc/fwprop.cc b/gcc/fwprop.cc index d12fc2f34ac9a..5451e663ad686 100644 --- a/gcc/fwprop.cc +++ b/gcc/fwprop.cc @@ -25,6 +25,7 @@ along with GCC; see the file COPYING3. If not see #include "coretypes.h" #include "backend.h" #include "rtl.h" +#include "rtlanal.h" #include "df.h" #include "rtl-ssa.h" @@ -353,21 +354,6 @@ reg_single_def_p (rtx x) return REG_P (x) && crtl->ssa->single_dominating_def (REGNO (x)); } -/* Return true if X contains a paradoxical subreg. */ - -static bool -contains_paradoxical_subreg_p (rtx x) -{ - subrtx_var_iterator::array_type array; - FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) - { - x = *iter; - if (SUBREG_P (x) && paradoxical_subreg_p (x)) - return true; - } - return false; -} - /* Try to substitute (set DEST SRC), which defines DEF, into note NOTE of USE_INSN. Return the number of substitutions on success, otherwise return -1 and leave USE_INSN unchanged. diff --git a/gcc/gcc.cc b/gcc/gcc.cc index bb07cc244e30f..fbcc9d03314db 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc @@ -27,6 +27,7 @@ CC recognizes how to compile each input file by suffixes in the file names. Once it knows which kind of compilation to perform, the procedure for compilation is specified by a string called a "spec". */ +#define INCLUDE_STRING #include "config.h" #include "system.h" #include "coretypes.h" @@ -43,6 +44,7 @@ compilation is specified by a string called a "spec". */ #include "opts.h" #include "filenames.h" #include "spellcheck.h" +#include "opts-jobserver.h" @@ -9178,38 +9180,9 @@ driver::final_actions () const void driver::detect_jobserver () const { - /* Detect jobserver and drop it if it's not working. */ - const char *makeflags = env.get ("MAKEFLAGS"); - if (makeflags != NULL) - { - const char *needle = "--jobserver-auth="; - const char *n = strstr (makeflags, needle); - if (n != NULL) - { - int rfd = -1; - int wfd = -1; - - bool jobserver - = (sscanf (n + strlen (needle), "%d,%d", &rfd, &wfd) == 2 - && rfd > 0 - && wfd > 0 - && is_valid_fd (rfd) - && is_valid_fd (wfd)); - - /* Drop the jobserver if it's not working now. */ - if (!jobserver) - { - unsigned offset = n - makeflags; - char *dup = xstrdup (makeflags); - dup[offset] = '\0'; - - const char *space = strchr (makeflags + offset, ' '); - if (space != NULL) - strcpy (dup + offset, space); - xputenv (concat ("MAKEFLAGS=", dup, NULL)); - } - } - } + jobserver_info jinfo; + if (!jinfo.is_active && !jinfo.skipped_makeflags.empty ()) + xputenv (xstrdup (jinfo.skipped_makeflags.c_str ())); } /* Determine what the exit code of the driver should be. */ diff --git a/gcc/generic-match-head.cc b/gcc/generic-match-head.cc index e11a736b34372..b6ba81c9c29d9 100644 --- a/gcc/generic-match-head.cc +++ b/gcc/generic-match-head.cc @@ -38,6 +38,9 @@ along with GCC; see the file COPYING3. If not see #include "optabs-tree.h" #include "dbgcnt.h" #include "tm.h" +#include "tree-pass.h" +#include "attribs.h" +#include "asan.h" /* Routine to determine if the types T1 and T2 are effectively the same for GENERIC. If T1 or T2 is not a type, the test @@ -69,7 +72,7 @@ single_use (tree t ATTRIBUTE_UNUSED) static inline bool canonicalize_math_p () { - return true; + return !cfun || (cfun->curr_properties & PROP_gimple_opt_math) == 0; } /* Return true if math operations that are beneficial only after @@ -88,7 +91,7 @@ canonicalize_math_after_vectorization_p () static inline bool optimize_vectors_before_lowering_p () { - return true; + return !cfun || (cfun->curr_properties & PROP_gimple_lvec) == 0; } /* Return true if successive divisions can be optimized. diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc index 2eda730082191..80c64d8892815 100644 --- a/gcc/genmatch.cc +++ b/gcc/genmatch.cc @@ -2526,7 +2526,8 @@ expr::gen_transform (FILE *f, int indent, const char *dest, bool gimple, for (unsigned i = 0; i < ops.length (); ++i) fprintf (f, ", _o%d[%u]", depth, i); fprintf (f, ");\n"); - fprintf_indent (f, indent, "tem_op.resimplify (lseq, valueize);\n"); + fprintf_indent (f, indent, "tem_op.resimplify (%s, valueize);\n", + !force_leaf ? "lseq" : "NULL"); fprintf_indent (f, indent, "_r%d = maybe_push_res_to_seq (&tem_op, %s);\n", depth, !force_leaf ? "lseq" : "NULL"); @@ -2547,7 +2548,8 @@ expr::gen_transform (FILE *f, int indent, const char *dest, bool gimple, { fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n", depth, type); - indent += 2; + fprintf_indent (f, indent + 2, "{\n"); + indent += 4; } if (opr->kind == id_base::CODE) fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s", @@ -2570,7 +2572,8 @@ expr::gen_transform (FILE *f, int indent, const char *dest, bool gimple, } if (*opr == CONVERT_EXPR) { - indent -= 2; + fprintf_indent (f, indent - 2, "}\n"); + indent -= 4; fprintf_indent (f, indent, "else\n"); fprintf_indent (f, indent, " _r%d = _o%d[0];\n", depth, depth); } @@ -3428,7 +3431,8 @@ dt_simplify::gen_1 (FILE *f, int indent, bool gimple, operand *result) if (!is_predicate) { fprintf_indent (f, indent, - "res_op->resimplify (lseq, valueize);\n"); + "res_op->resimplify (%s, valueize);\n", + !e->force_leaf ? "lseq" : "NULL"); if (e->force_leaf) fprintf_indent (f, indent, "if (!maybe_push_res_to_seq (res_op, NULL)) " diff --git a/gcc/ggc-common.cc b/gcc/ggc-common.cc index 755d166417afa..002212f820308 100644 --- a/gcc/ggc-common.cc +++ b/gcc/ggc-common.cc @@ -670,7 +670,7 @@ gt_pch_save (FILE *f) { gcc_assert ((uintptr_t) addr >= (uintptr_t) mmi.preferred_base && ((uintptr_t) addr + sizeof (void *) - < (uintptr_t) mmi.preferred_base + mmi.size)); + <= (uintptr_t) mmi.preferred_base + mmi.size)); if (addr == last_addr) continue; if (last_addr == NULL) diff --git a/gcc/gimple-array-bounds.cc b/gcc/gimple-array-bounds.cc index 7ec8b08c8d297..9e46811a675e5 100644 --- a/gcc/gimple-array-bounds.cc +++ b/gcc/gimple-array-bounds.cc @@ -534,7 +534,7 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, int i = 0; if (aref.offmax[i] < -aref.sizrng[1] || aref.offmax[i = 1] > ubound) { - HOST_WIDE_INT tmpidx = aref.offmax[i].to_shwi () / eltsize.to_shwi (); + HOST_WIDE_INT tmpidx = (aref.offmax[i] / eltsize).to_shwi (); if (warning_at (location, OPT_Warray_bounds, "intermediate array offset %wi is outside array bounds " diff --git a/gcc/gimple-fold.cc b/gcc/gimple-fold.cc index 863ee3d391222..010be0b2b89e8 100644 --- a/gcc/gimple-fold.cc +++ b/gcc/gimple-fold.cc @@ -7770,12 +7770,11 @@ get_base_constructor (tree base, poly_int64_pod *bit_offset, } } -/* CTOR is CONSTRUCTOR of an array type. Fold a reference of SIZE bits - to the memory at bit OFFSET. When non-null, TYPE is the expected - type of the reference; otherwise the type of the referenced element - is used instead. When SIZE is zero, attempt to fold a reference to - the entire element which OFFSET refers to. Increment *SUBOFF by - the bit offset of the accessed element. */ +/* CTOR is a CONSTRUCTOR of an array or vector type. Fold a reference of SIZE + bits to the memory at bit OFFSET. If non-null, TYPE is the expected type of + the reference; otherwise the type of the referenced element is used instead. + When SIZE is zero, attempt to fold a reference to the entire element OFFSET + refers to. Increment *SUBOFF by the bit offset of the accessed element. */ static tree fold_array_ctor_reference (tree type, tree ctor, @@ -7940,13 +7939,11 @@ fold_array_ctor_reference (tree type, tree ctor, return type ? build_zero_cst (type) : NULL_TREE; } -/* CTOR is CONSTRUCTOR of an aggregate or vector. Fold a reference - of SIZE bits to the memory at bit OFFSET. When non-null, TYPE - is the expected type of the reference; otherwise the type of - the referenced member is used instead. When SIZE is zero, - attempt to fold a reference to the entire member which OFFSET - refers to; in this case. Increment *SUBOFF by the bit offset - of the accessed member. */ +/* CTOR is a CONSTRUCTOR of a record or union type. Fold a reference of SIZE + bits to the memory at bit OFFSET. If non-null, TYPE is the expected type of + the reference; otherwise the type of the referenced member is used instead. + When SIZE is zero, attempt to fold a reference to the entire member OFFSET + refers to. Increment *SUBOFF by the bit offset of the accessed member. */ static tree fold_nonarray_ctor_reference (tree type, tree ctor, @@ -7958,8 +7955,7 @@ fold_nonarray_ctor_reference (tree type, tree ctor, unsigned HOST_WIDE_INT cnt; tree cfield, cval; - FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, - cval) + FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, cval) { tree byte_offset = DECL_FIELD_OFFSET (cfield); tree field_offset = DECL_FIELD_BIT_OFFSET (cfield); @@ -8031,6 +8027,19 @@ fold_nonarray_ctor_reference (tree type, tree ctor, return NULL_TREE; offset_int inner_offset = offset_int (offset) - bitoffset; + + /* Integral bit-fields are left-justified on big-endian targets, so + we must arrange for native_encode_int to start at their MSB. */ + if (DECL_BIT_FIELD (cfield) && INTEGRAL_TYPE_P (TREE_TYPE (cfield))) + { + if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN) + return NULL_TREE; + const unsigned int encoding_size + = GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield))); + if (BYTES_BIG_ENDIAN) + inner_offset += encoding_size - wi::to_offset (field_size); + } + return fold_ctor_reference (type, cval, inner_offset.to_uhwi (), size, from_decl, suboff); @@ -8043,7 +8052,7 @@ fold_nonarray_ctor_reference (tree type, tree ctor, return build_zero_cst (type); } -/* CTOR is value initializing memory. Fold a reference of TYPE and +/* CTOR is a value initializing memory. Fold a reference of TYPE and bit size POLY_SIZE to the memory at bit POLY_OFFSET. When POLY_SIZE is zero, attempt to fold a reference to the entire subobject which OFFSET refers to. This is used when folding accesses to @@ -8084,7 +8093,8 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, } return ret; } - /* For constants and byte-aligned/sized reads try to go through + + /* For constants and byte-aligned/sized reads, try to go through native_encode/interpret. */ if (CONSTANT_CLASS_P (ctor) && BITS_PER_UNIT == 8 @@ -8100,7 +8110,12 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, if (len > 0) return native_interpret_expr (type, buf, len); } - if (TREE_CODE (ctor) == CONSTRUCTOR) + + /* For constructors, try first a recursive local processing, but in any case + this requires the native storage order. */ + if (TREE_CODE (ctor) == CONSTRUCTOR + && !(AGGREGATE_TYPE_P (TREE_TYPE (ctor)) + && TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (ctor)))) { unsigned HOST_WIDE_INT dummy = 0; if (!suboff) @@ -8115,9 +8130,9 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, ret = fold_nonarray_ctor_reference (type, ctor, offset, size, from_decl, suboff); - /* Fall back to native_encode_initializer. Needs to be done - only in the outermost fold_ctor_reference call (because it itself - recurses into CONSTRUCTORs) and doesn't update suboff. */ + /* Otherwise fall back to native_encode_initializer. This may be done + only from the outermost fold_ctor_reference call (because it itself + recurses into CONSTRUCTORs and doesn't update suboff). */ if (ret == NULL_TREE && suboff == &dummy && BITS_PER_UNIT == 8 diff --git a/gcc/gimple-harden-conditionals.cc b/gcc/gimple-harden-conditionals.cc index c7e5e077a74f6..19ceb8a4bd61e 100644 --- a/gcc/gimple-harden-conditionals.cc +++ b/gcc/gimple-harden-conditionals.cc @@ -254,8 +254,10 @@ insert_check_and_trap (location_t loc, gimple_stmt_iterator *gsip, equality. */ single_succ_edge (chk)->flags &= ~EDGE_FALLTHRU; single_succ_edge (chk)->flags |= neg_true_false_flag; + single_succ_edge (chk)->probability = profile_probability::always (); edge e = make_edge (chk, trp, true_false_flag); e->goto_locus = loc; + e->probability = profile_probability::never (); if (dom_info_available_p (CDI_DOMINATORS)) set_immediate_dominator (CDI_DOMINATORS, trp, chk); diff --git a/gcc/gimple-isel.cc b/gcc/gimple-isel.cc index a8f7a0d25d086..44d086d8b2895 100644 --- a/gcc/gimple-isel.cc +++ b/gcc/gimple-isel.cc @@ -43,28 +43,29 @@ along with GCC; see the file COPYING3. If not see /* Expand all ARRAY_REF(VIEW_CONVERT_EXPR) gimple assignments into calls to internal function based on vector type of selected expansion. i.e.: - VIEW_CONVERT_EXPR(u)[_1] = = i_4(D); + VIEW_CONVERT_EXPR(u)[_1] = i_4(D); => _7 = u; _8 = .VEC_SET (_7, i_4(D), _1); u = _8; */ -static gimple * +static bool gimple_expand_vec_set_expr (struct function *fun, gimple_stmt_iterator *gsi) { enum tree_code code; gcall *new_stmt = NULL; gassign *ass_stmt = NULL; + bool cfg_changed = false; /* Only consider code == GIMPLE_ASSIGN. */ gassign *stmt = dyn_cast (gsi_stmt (*gsi)); if (!stmt) - return NULL; + return false; tree lhs = gimple_assign_lhs (stmt); code = TREE_CODE (lhs); if (code != ARRAY_REF) - return NULL; + return false; tree val = gimple_assign_rhs1 (stmt); tree op0 = TREE_OPERAND (lhs, 0); @@ -98,12 +99,16 @@ gimple_expand_vec_set_expr (struct function *fun, gimple_stmt_iterator *gsi) gimple_set_location (ass_stmt, loc); gsi_insert_before (gsi, ass_stmt, GSI_SAME_STMT); + basic_block bb = gimple_bb (stmt); gimple_move_vops (ass_stmt, stmt); - gsi_remove (gsi, true); + if (gsi_remove (gsi, true) + && gimple_purge_dead_eh_edges (bb)) + cfg_changed = true; + *gsi = gsi_for_stmt (ass_stmt); } } - return ass_stmt; + return cfg_changed; } /* Expand all VEC_COND_EXPR gimple assignments into calls to internal @@ -297,6 +302,7 @@ gimple_expand_vec_exprs (struct function *fun) basic_block bb; hash_map vec_cond_ssa_name_uses; auto_bitmap dce_ssa_names; + bool cfg_changed = false; FOR_EACH_BB_FN (bb, fun) { @@ -311,7 +317,7 @@ gimple_expand_vec_exprs (struct function *fun) gsi_replace (&gsi, g, false); } - gimple_expand_vec_set_expr (fun, &gsi); + cfg_changed |= gimple_expand_vec_set_expr (fun, &gsi); if (gsi_end_p (gsi)) break; } @@ -323,7 +329,7 @@ gimple_expand_vec_exprs (struct function *fun) simple_dce_from_worklist (dce_ssa_names); - return 0; + return cfg_changed ? TODO_cleanup_cfg : 0; } namespace { diff --git a/gcc/gimple-match-head.cc b/gcc/gimple-match-head.cc index 1c74d38088fc5..2fd27fcbacca7 100644 --- a/gcc/gimple-match-head.cc +++ b/gcc/gimple-match-head.cc @@ -45,6 +45,8 @@ along with GCC; see the file COPYING3. If not see #include "dbgcnt.h" #include "tm.h" #include "gimple-range.h" +#include "attribs.h" +#include "asan.h" /* Forward declarations of the private auto-generated matchers. They expect valueized operands in canonical order and do not diff --git a/gcc/gimple-range-cache.cc b/gcc/gimple-range-cache.cc index 421ea1a20ef9c..d42387443b6d0 100644 --- a/gcc/gimple-range-cache.cc +++ b/gcc/gimple-range-cache.cc @@ -448,7 +448,7 @@ block_range_cache::set_bb_range (tree name, const_basic_block bb, { unsigned v = SSA_NAME_VERSION (name); if (v >= m_ssa_ranges.length ()) - m_ssa_ranges.safe_grow_cleared (num_ssa_names + 1); + m_ssa_ranges.safe_grow_cleared (num_ssa_names); if (!m_ssa_ranges[v]) { @@ -515,7 +515,7 @@ void block_range_cache::dump (FILE *f) { unsigned x; - for (x = 0; x < m_ssa_ranges.length (); ++x) + for (x = 1; x < m_ssa_ranges.length (); ++x) { if (m_ssa_ranges[x]) { @@ -538,9 +538,12 @@ block_range_cache::dump (FILE *f, basic_block bb, bool print_varying) bool summarize_varying = false; for (x = 1; x < m_ssa_ranges.length (); ++x) { + if (!m_ssa_ranges[x]) + continue; + if (!gimple_range_ssa_p (ssa_name (x))) continue; - if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb)) + if (m_ssa_ranges[x]->get_bb_range (r, bb)) { if (!print_varying && r.varying_p ()) { @@ -557,11 +560,14 @@ block_range_cache::dump (FILE *f, basic_block bb, bool print_varying) if (summarize_varying) { fprintf (f, "VARYING_P on entry : "); - for (x = 1; x < num_ssa_names; ++x) + for (x = 1; x < m_ssa_ranges.length (); ++x) { + if (!m_ssa_ranges[x]) + continue; + if (!gimple_range_ssa_p (ssa_name (x))) continue; - if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb)) + if (m_ssa_ranges[x]->get_bb_range (r, bb)) { if (r.varying_p ()) { diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc index 6caa07c8f02ec..a0cc1383a88a9 100644 --- a/gcc/gimple-range-edge.cc +++ b/gcc/gimple-range-edge.cc @@ -145,8 +145,14 @@ gimple_outgoing_range::calc_switch_ranges (gswitch *sw) // Remove the case range from the default case. int_range_max def_range (low, high); range_cast (def_range, type); - def_range.invert (); - default_range.intersect (def_range); + // If all possible values are taken, set default_range to UNDEFINED. + if (def_range.varying_p ()) + default_range.set_undefined (); + else + { + def_range.invert (); + default_range.intersect (def_range); + } // Create/union this case with anything on else on the edge. int_range_max case_range (low, high); diff --git a/gcc/gimple-range-fold.cc b/gcc/gimple-range-fold.cc index dfacf6f14dc3e..7f03911e1c9a2 100644 --- a/gcc/gimple-range-fold.cc +++ b/gcc/gimple-range-fold.cc @@ -1374,14 +1374,25 @@ fold_using_range::relation_fold_and_or (irange& lhs_range, gimple *s, // Ideally we search dependencies for common names, and see what pops out. // until then, simply try to resolve direct dependencies. - // Both names will need to have 2 direct dependencies. - tree ssa1_dep2 = src.gori ()->depend2 (ssa1); - tree ssa2_dep2 = src.gori ()->depend2 (ssa2); - if (!ssa1_dep2 || !ssa2_dep2) + gimple *ssa1_stmt = SSA_NAME_DEF_STMT (ssa1); + gimple *ssa2_stmt = SSA_NAME_DEF_STMT (ssa2); + + range_operator *handler1 = gimple_range_handler (SSA_NAME_DEF_STMT (ssa1)); + range_operator *handler2 = gimple_range_handler (SSA_NAME_DEF_STMT (ssa2)); + + // If either handler is not present, no relation can be found. + if (!handler1 || !handler2) + return; + + // Both stmts will need to have 2 ssa names in the stmt. + tree ssa1_dep1 = gimple_range_ssa_p (gimple_range_operand1 (ssa1_stmt)); + tree ssa1_dep2 = gimple_range_ssa_p (gimple_range_operand2 (ssa1_stmt)); + tree ssa2_dep1 = gimple_range_ssa_p (gimple_range_operand1 (ssa2_stmt)); + tree ssa2_dep2 = gimple_range_ssa_p (gimple_range_operand2 (ssa2_stmt)); + + if (!ssa1_dep1 || !ssa1_dep2 || !ssa2_dep1 || !ssa2_dep2) return; - tree ssa1_dep1 = src.gori ()->depend1 (ssa1); - tree ssa2_dep1 = src.gori ()->depend1 (ssa2); // Make sure they are the same dependencies, and detect the order of the // relationship. bool reverse_op2 = true; @@ -1390,13 +1401,6 @@ fold_using_range::relation_fold_and_or (irange& lhs_range, gimple *s, else if (ssa1_dep1 != ssa2_dep2 || ssa1_dep2 != ssa2_dep1) return; - range_operator *handler1 = gimple_range_handler (SSA_NAME_DEF_STMT (ssa1)); - range_operator *handler2 = gimple_range_handler (SSA_NAME_DEF_STMT (ssa2)); - - // If either handler is not present, no relation is found. - if (!handler1 || !handler2) - return; - int_range<2> bool_one (boolean_true_node, boolean_true_node); relation_kind relation1 = handler1->op1_op2_relation (bool_one); diff --git a/gcc/gimple-range-gori.cc b/gcc/gimple-range-gori.cc index 772ccb88d5518..263360862fe81 100644 --- a/gcc/gimple-range-gori.cc +++ b/gcc/gimple-range-gori.cc @@ -880,6 +880,7 @@ gori_compute::logical_combine (irange &r, enum tree_code code, res = false; if (idx) tracer.trailer (idx, "logical_combine", res, NULL_TREE, r); + return res; } switch (code) diff --git a/gcc/gimple-ssa-backprop.cc b/gcc/gimple-ssa-backprop.cc index 74f981112567e..68ea403e847f8 100644 --- a/gcc/gimple-ssa-backprop.cc +++ b/gcc/gimple-ssa-backprop.cc @@ -688,7 +688,6 @@ strip_sign_op_1 (tree rhs) switch (gimple_assign_rhs_code (assign)) { case ABS_EXPR: - case ABSU_EXPR: case NEGATE_EXPR: return gimple_assign_rhs1 (assign); diff --git a/gcc/gimple-ssa-sprintf.cc b/gcc/gimple-ssa-sprintf.cc index c93f12f90b53e..301078ac95f61 100644 --- a/gcc/gimple-ssa-sprintf.cc +++ b/gcc/gimple-ssa-sprintf.cc @@ -2166,8 +2166,7 @@ format_character (const directive &dir, tree arg, pointer_query &ptr_qry) res.knownrange = true; - if (dir.specifier == 'C' - || dir.modifier == FMT_LEN_l) + if (dir.specifier == 'C' || dir.modifier == FMT_LEN_l) { /* A wide character can result in as few as zero bytes. */ res.range.min = 0; @@ -2178,10 +2177,13 @@ format_character (const directive &dir, tree arg, pointer_query &ptr_qry) { if (min == 0 && max == 0) { - /* The NUL wide character results in no bytes. */ - res.range.max = 0; - res.range.likely = 0; - res.range.unlikely = 0; + /* In strict reading of older ISO C or POSIX, this required + no characters to be emitted. ISO C23 changes that, so + does POSIX, to match what has been implemented in most of the + implementations, namely emitting a single NUL character. + Let's use 0 for minimum and 1 for all the other values. */ + res.range.max = 1; + res.range.likely = res.range.unlikely = 1; } else if (min >= 0 && min < 128) { @@ -2189,11 +2191,12 @@ format_character (const directive &dir, tree arg, pointer_query &ptr_qry) is not a 1-to-1 mapping to the source character set or if the source set is not ASCII. */ bool one_2_one_ascii - = (target_to_host_charmap[0] == 1 && target_to_host ('a') == 97); + = (target_to_host_charmap[0] == 1 + && target_to_host ('a') == 97); /* A wide character in the ASCII range most likely results in a single byte, and only unlikely in up to MB_LEN_MAX. */ - res.range.max = one_2_one_ascii ? 1 : target_mb_len_max ();; + res.range.max = one_2_one_ascii ? 1 : target_mb_len_max (); res.range.likely = 1; res.range.unlikely = target_mb_len_max (); res.mayfail = !one_2_one_ascii; @@ -2224,7 +2227,6 @@ format_character (const directive &dir, tree arg, pointer_query &ptr_qry) /* A plain '%c' directive. Its output is exactly 1. */ res.range.min = res.range.max = 1; res.range.likely = res.range.unlikely = 1; - res.knownrange = true; } /* Bump up the byte counters if WIDTH is greater. */ @@ -2232,8 +2234,9 @@ format_character (const directive &dir, tree arg, pointer_query &ptr_qry) } /* If TYPE is an array or struct or union, increment *FLDOFF by the starting - offset of the member that *OFF point into and set *FLDSIZE to its size - in bytes and decrement *OFF by the same. Otherwise do nothing. */ + offset of the member that *OFF points into if one can be determined and + set *FLDSIZE to its size in bytes and decrement *OFF by the same. + Otherwise do nothing. */ static void set_aggregate_size_and_offset (tree type, HOST_WIDE_INT *fldoff, @@ -2249,9 +2252,9 @@ set_aggregate_size_and_offset (tree type, HOST_WIDE_INT *fldoff, if (array_elt_at_offset (type, *off, &index, &arrsize)) { *fldoff += index; - *off -= index; *fldsize = arrsize; } + /* Otherwise leave *FLDOFF et al. unchanged. */ } else if (RECORD_OR_UNION_TYPE_P (type)) { @@ -2269,11 +2272,12 @@ set_aggregate_size_and_offset (tree type, HOST_WIDE_INT *fldoff, *fldoff += index; *off -= index; } + /* Otherwise leave *FLDOFF et al. unchanged. */ } } -/* For an expression X of pointer type, recursively try to find the same - origin (object or pointer) as Y it references and return such a Y. +/* For an expression X of pointer type, recursively try to find its origin + (either object DECL or pointer such as PARM_DECL) Y and return such a Y. When X refers to an array element or struct member, set *FLDOFF to the offset of the element or member from the beginning of the "most derived" object and *FLDSIZE to its size. When nonnull, set *OFF to @@ -2284,9 +2288,6 @@ static tree get_origin_and_offset_r (tree x, HOST_WIDE_INT *fldoff, HOST_WIDE_INT *fldsize, HOST_WIDE_INT *off) { - if (!x) - return NULL_TREE; - HOST_WIDE_INT sizebuf = -1; if (!fldsize) fldsize = &sizebuf; @@ -2308,23 +2309,33 @@ get_origin_and_offset_r (tree x, HOST_WIDE_INT *fldoff, HOST_WIDE_INT *fldsize, case ARRAY_REF: { - tree offset = TREE_OPERAND (x, 1); - HOST_WIDE_INT idx = (tree_fits_uhwi_p (offset) - ? tree_to_uhwi (offset) : HOST_WIDE_INT_MAX); + tree sub = TREE_OPERAND (x, 1); + unsigned HOST_WIDE_INT idx = + tree_fits_uhwi_p (sub) ? tree_to_uhwi (sub) : HOST_WIDE_INT_MAX; + + tree elsz = array_ref_element_size (x); + unsigned HOST_WIDE_INT elbytes = + tree_fits_shwi_p (elsz) ? tree_to_shwi (elsz) : HOST_WIDE_INT_MAX; + + unsigned HOST_WIDE_INT byteoff = idx * elbytes; - tree eltype = TREE_TYPE (x); - if (TREE_CODE (eltype) == INTEGER_TYPE) + if (byteoff < HOST_WIDE_INT_MAX + && elbytes < HOST_WIDE_INT_MAX + && (elbytes == 0 || byteoff / elbytes == idx)) { + /* For in-bounds constant offsets into constant-sized arrays + bump up *OFF, and for what's likely arrays or structs of + arrays, also *FLDOFF, as necessary. */ if (off) - *off = idx; + *off += byteoff; + if (elbytes > 1) + *fldoff += byteoff; } - else if (idx < HOST_WIDE_INT_MAX) - *fldoff += idx * int_size_in_bytes (eltype); else - *fldoff = idx; + *fldoff = HOST_WIDE_INT_MAX; x = TREE_OPERAND (x, 0); - return get_origin_and_offset_r (x, fldoff, fldsize, nullptr); + return get_origin_and_offset_r (x, fldoff, fldsize, off); } case MEM_REF: @@ -2350,8 +2361,14 @@ get_origin_and_offset_r (tree x, HOST_WIDE_INT *fldoff, HOST_WIDE_INT *fldsize, case COMPONENT_REF: { + tree foff = component_ref_field_offset (x); tree fld = TREE_OPERAND (x, 1); - *fldoff += int_byte_position (fld); + if (!tree_fits_shwi_p (foff) + || !tree_fits_shwi_p (DECL_FIELD_BIT_OFFSET (fld))) + return x; + *fldoff += (tree_to_shwi (foff) + + (tree_to_shwi (DECL_FIELD_BIT_OFFSET (fld)) + / BITS_PER_UNIT)); get_origin_and_offset_r (fld, fldoff, fldsize, off); x = TREE_OPERAND (x, 0); @@ -2411,30 +2428,25 @@ get_origin_and_offset_r (tree x, HOST_WIDE_INT *fldoff, HOST_WIDE_INT *fldsize, return x; } -/* Nonrecursive version of the above. */ +/* Nonrecursive version of the above. + The function never returns null unless X is null to begin with. */ static tree get_origin_and_offset (tree x, HOST_WIDE_INT *fldoff, HOST_WIDE_INT *off, HOST_WIDE_INT *fldsize = nullptr) { + if (!x) + return NULL_TREE; + HOST_WIDE_INT sizebuf; if (!fldsize) fldsize = &sizebuf; + /* Invalidate *FLDSIZE. */ *fldsize = -1; + *fldoff = *off = 0; - *fldoff = *off = *fldsize = 0; - tree orig = get_origin_and_offset_r (x, fldoff, fldsize, off); - if (!orig) - return NULL_TREE; - - if (!*fldoff && *off == *fldsize) - { - *fldoff = *off; - *off = 0; - } - - return orig; + return get_origin_and_offset_r (x, fldoff, fldsize, off); } /* If ARG refers to the same (sub)object or array element as described @@ -2454,7 +2466,8 @@ alias_offset (tree arg, HOST_WIDE_INT *arg_size, return HOST_WIDE_INT_MIN; /* The two arguments may refer to the same object. If they both refer - to a struct member, see if the members are one and the same. */ + to a struct member, see if the members are one and the same. If so, + return the offset into the member. */ HOST_WIDE_INT arg_off = 0, arg_fld = 0; tree arg_orig = get_origin_and_offset (arg, &arg_fld, &arg_off, arg_size); diff --git a/gcc/gimple-ssa-store-merging.cc b/gcc/gimple-ssa-store-merging.cc index b952ce57917e6..48733e5f8cf41 100644 --- a/gcc/gimple-ssa-store-merging.cc +++ b/gcc/gimple-ssa-store-merging.cc @@ -263,7 +263,7 @@ do_shift_rotate (enum tree_code code, int count) { int i, size = TYPE_PRECISION (n->type) / BITS_PER_UNIT; - unsigned head_marker; + uint64_t head_marker; if (count < 0 || count >= TYPE_PRECISION (n->type) @@ -1614,7 +1614,7 @@ namespace { then VAL represents the constant and all the other fields are zero, or a memory load, then VAL represents the reference, BASE_ADDR is non-NULL and the other fields also reflect the memory load, or an SSA name, then - VAL represents the SSA name and all the other fields are zero, */ + VAL represents the SSA name and all the other fields are zero. */ class store_operand_info { @@ -2309,6 +2309,10 @@ merged_store_group::apply_stores () if (buf_size <= MOVE_MAX) string_concatenation = false; + /* String concatenation only works for byte aligned start and end. */ + if (start % BITS_PER_UNIT != 0 || width % BITS_PER_UNIT != 0) + string_concatenation = false; + /* Create a power-of-2-sized buffer for native_encode_expr. */ if (!string_concatenation) buf_size = 1 << ceil_log2 (buf_size); @@ -3631,7 +3635,7 @@ split_group (merged_store_group *group, bool allow_unaligned_store, /* For bswap framework using sets of stores, all the checking has been done earlier in try_coalesce_bswap and the result always needs to be emitted - as a single store. Likewise for string concatenation, */ + as a single store. Likewise for string concatenation. */ if (group->stores[0]->rhs_code == LROTATE_EXPR || group->stores[0]->rhs_code == NOP_EXPR || group->string_concatenation) @@ -4601,12 +4605,13 @@ imm_store_chain_info::output_merged_store (merged_store_group *group) } else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0) { - const unsigned HOST_WIDE_INT imask - = (HOST_WIDE_INT_1U << info->bitsize) - 1; + wide_int imask + = wi::mask (info->bitsize, false, + TYPE_PRECISION (TREE_TYPE (tem))); tem = gimple_build (&seq, loc, BIT_AND_EXPR, TREE_TYPE (tem), tem, - build_int_cst (TREE_TYPE (tem), - imask)); + wide_int_to_tree (TREE_TYPE (tem), + imask)); } const HOST_WIDE_INT shift = (BYTES_BIG_ENDIAN ? end_gap : start_gap); diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc index 39aa8186de6f0..e70a6f1fb877e 100644 --- a/gcc/gimple-ssa-warn-access.cc +++ b/gcc/gimple-ssa-warn-access.cc @@ -1688,6 +1688,7 @@ new_delete_mismatch_p (const demangle_component &newc, case DEMANGLE_COMPONENT_FUNCTION_PARAM: case DEMANGLE_COMPONENT_TEMPLATE_PARAM: + case DEMANGLE_COMPONENT_UNNAMED_TYPE: return newc.u.s_number.number != delc.u.s_number.number; case DEMANGLE_COMPONENT_CHARACTER: @@ -2121,7 +2122,6 @@ class pass_waccess : public gimple_opt_pass /* Return the argument that a call returns. */ tree gimple_call_return_arg (gcall *); - tree gimple_call_return_arg_ref (gcall *); /* Check a call for uses of a dangling pointer arguments. */ void check_call_dangling (gcall *); @@ -3311,6 +3311,10 @@ void pass_waccess::maybe_check_access_sizes (rdwr_map *rwm, tree fndecl, tree fntype, gimple *stmt) { + if (warning_suppressed_p (stmt, OPT_Wnonnull) + || warning_suppressed_p (stmt, OPT_Wstringop_overflow_)) + return; + auto_diagnostic_group adg; /* Set if a warning has been issued for any argument (used to decide @@ -3494,7 +3498,7 @@ pass_waccess::maybe_check_access_sizes (rdwr_map *rwm, tree fndecl, tree fntype, if (warning_at (loc, OPT_Wnonnull, "argument %i to %<%T[static %E]%> " "is null where non-null expected", - ptridx + 1, argtype, access_size)) + ptridx + 1, argtype, access_nelts)) arg_warned = OPT_Wnonnull; } @@ -3586,7 +3590,7 @@ pass_waccess::maybe_check_access_sizes (rdwr_map *rwm, tree fndecl, tree fntype, "in a call with type %qT", fntype); } - /* Set the bit in case if was cleared and not set above. */ + /* Set the bit in case it was cleared and not set above. */ if (opt_warned != no_warning) suppress_warning (stmt, opt_warned); } @@ -4309,15 +4313,6 @@ pass_waccess::check_call (gcall *stmt) check_nonstring_args (stmt); } - -/* Return true of X is a DECL with automatic storage duration. */ - -static inline bool -is_auto_decl (tree x) -{ - return DECL_P (x) && !DECL_EXTERNAL (x) && !TREE_STATIC (x); -} - /* Check non-call STMT for invalid accesses. */ void @@ -4346,7 +4341,7 @@ pass_waccess::check_stmt (gimple *stmt) while (handled_component_p (lhs)) lhs = TREE_OPERAND (lhs, 0); - if (is_auto_decl (lhs)) + if (auto_var_p (lhs)) m_clobbers.remove (lhs); return; } @@ -4366,7 +4361,7 @@ pass_waccess::check_stmt (gimple *stmt) while (handled_component_p (arg)) arg = TREE_OPERAND (arg, 0); - if (!is_auto_decl (arg)) + if (!auto_var_p (arg)) return; gimple **pclobber = m_clobbers.get (arg); @@ -4442,24 +4437,6 @@ pass_waccess::gimple_call_return_arg (gcall *call) return gimple_call_arg (call, argno); } -/* Return the decl referenced by the argument that the call STMT to - a built-in function returns (including with an offset) or null if - it doesn't. */ - -tree -pass_waccess::gimple_call_return_arg_ref (gcall *call) -{ - if (tree arg = gimple_call_return_arg (call)) - { - access_ref aref; - if (m_ptr_qry.get_ref (arg, call, &aref, 0) - && DECL_P (aref.ref)) - return aref.ref; - } - - return NULL_TREE; -} - /* Check for and diagnose all uses of the dangling pointer VAR to the auto object DECL whose lifetime has ended. OBJREF is true when VAR denotes an access to a DECL that may have been clobbered. */ @@ -4468,7 +4445,7 @@ void pass_waccess::check_dangling_uses (tree var, tree decl, bool maybe /* = false */, bool objref /* = false */) { - if (!decl || !is_auto_decl (decl)) + if (!decl || !auto_var_p (decl)) return; gimple **pclob = m_clobbers.get (decl); @@ -4529,7 +4506,7 @@ pass_waccess::check_dangling_stores (basic_block bb, if (!m_ptr_qry.get_ref (lhs, stmt, &lhs_ref, 0)) continue; - if (is_auto_decl (lhs_ref.ref)) + if (auto_var_p (lhs_ref.ref)) continue; if (DECL_P (lhs_ref.ref)) @@ -4574,7 +4551,7 @@ pass_waccess::check_dangling_stores (basic_block bb, || rhs_ref.deref != -1) continue; - if (!is_auto_decl (rhs_ref.ref)) + if (!auto_var_p (rhs_ref.ref)) continue; location_t loc = gimple_location (stmt); @@ -4627,11 +4604,10 @@ pass_waccess::check_dangling_uses () unsigned i; FOR_EACH_SSA_NAME (i, var, m_func) { - /* For each SSA_NAME pointer VAR find the DECL it points to. - If the DECL is a clobbered local variable, check to see + /* For each SSA_NAME pointer VAR find the object it points to. + If the object is a clobbered local variable, check to see if any of VAR's uses (or those of other pointers derived from VAR) happens after the clobber. If so, warn. */ - tree decl = NULL_TREE; gimple *def_stmt = SSA_NAME_DEF_STMT (var); if (is_gimple_assign (def_stmt)) @@ -4641,23 +4617,30 @@ pass_waccess::check_dangling_uses () { if (!POINTER_TYPE_P (TREE_TYPE (var))) continue; - decl = TREE_OPERAND (rhs, 0); + check_dangling_uses (var, TREE_OPERAND (rhs, 0)); } else { /* For other expressions, check the base DECL to see if it's been clobbered, most likely as a result of inlining a reference to it. */ - decl = get_base_address (rhs); + tree decl = get_base_address (rhs); if (DECL_P (decl)) check_dangling_uses (var, decl, false, true); - continue; } } else if (POINTER_TYPE_P (TREE_TYPE (var))) { if (gcall *call = dyn_cast(def_stmt)) - decl = gimple_call_return_arg_ref (call); + { + if (tree arg = gimple_call_return_arg (call)) + { + access_ref aref; + if (m_ptr_qry.get_ref (arg, call, &aref, 0) + && aref.deref < 0) + check_dangling_uses (var, aref.ref); + } + } else if (gphi *phi = dyn_cast (def_stmt)) { unsigned nargs = gimple_phi_num_args (phi); @@ -4665,19 +4648,12 @@ pass_waccess::check_dangling_uses () { access_ref aref; tree arg = gimple_phi_arg_def (phi, i); - if (!m_ptr_qry.get_ref (arg, phi, &aref, 0) - || (aref.deref == 0 - && POINTER_TYPE_P (TREE_TYPE (aref.ref)))) - continue; - check_dangling_uses (var, aref.ref, true); + if (m_ptr_qry.get_ref (arg, phi, &aref, 0) + && aref.deref < 0) + check_dangling_uses (var, aref.ref, true); } - continue; } - else - continue; } - - check_dangling_uses (var, decl); } } diff --git a/gcc/gimple-ssa-warn-alloca.cc b/gcc/gimple-ssa-warn-alloca.cc index 273b88ec141ae..23f63f066f565 100644 --- a/gcc/gimple-ssa-warn-alloca.cc +++ b/gcc/gimple-ssa-warn-alloca.cc @@ -217,6 +217,7 @@ alloca_call_type (gimple *stmt, bool is_vla) int_range_max r; if (warn_limit_specified_p (is_vla) && TREE_CODE (len) == SSA_NAME + && types_compatible_p (TREE_TYPE (len), size_type_node) && get_range_query (cfun)->range_of_expr (r, len, stmt) && !r.varying_p ()) { diff --git a/gcc/gimple-ssa-warn-restrict.cc b/gcc/gimple-ssa-warn-restrict.cc index b678e806da373..734cdd7f5b478 100644 --- a/gcc/gimple-ssa-warn-restrict.cc +++ b/gcc/gimple-ssa-warn-restrict.cc @@ -525,7 +525,6 @@ builtin_memref::set_base_and_offset (tree expr) { tree memrefoff = fold_convert (ptrdiff_type_node, TREE_OPERAND (base, 1)); extend_offset_range (memrefoff); - base = TREE_OPERAND (base, 0); if (refoff != HOST_WIDE_INT_MIN && TREE_CODE (expr) == COMPONENT_REF) @@ -538,14 +537,19 @@ builtin_memref::set_base_and_offset (tree expr) REFOFF is set to s[1].b - (char*)s. */ offset_int off = tree_to_shwi (memrefoff); refoff += off; - } - - if (!integer_zerop (memrefoff)) - /* A non-zero offset into an array of struct with flexible array - members implies that the array is empty because there is no - way to initialize such a member when it belongs to an array. - This must be some sort of a bug. */ - refsize = 0; + + if (!integer_zerop (memrefoff) + && !COMPLETE_TYPE_P (TREE_TYPE (expr)) + && multiple_of_p (sizetype, memrefoff, + TYPE_SIZE_UNIT (TREE_TYPE (base)), true)) + /* A non-zero offset into an array of struct with flexible array + members implies that the array is empty because there is no + way to initialize such a member when it belongs to an array. + This must be some sort of a bug. */ + refsize = 0; + } + + base = TREE_OPERAND (base, 0); } if (TREE_CODE (ref) == COMPONENT_REF) diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc index 2588824dce25b..9e78697701838 100644 --- a/gcc/gimplify.cc +++ b/gcc/gimplify.cc @@ -2764,6 +2764,7 @@ gimplify_switch_expr (tree *expr_p, gimple_seq *pre_p) switch_stmt = gimple_build_switch (SWITCH_COND (switch_expr), default_case, labels); + gimple_set_location (switch_stmt, EXPR_LOCATION (switch_expr)); /* For the benefit of -Wimplicit-fallthrough, if switch_body_seq ends with a GIMPLE_LABEL holding SWITCH_BREAK_LABEL_P LABEL_DECL, wrap the GIMPLE_SWITCH up to that GIMPLE_LABEL into a GIMPLE_BIND, @@ -6373,7 +6374,7 @@ gimplify_save_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) gcc_assert (TREE_CODE (*expr_p) == SAVE_EXPR); val = TREE_OPERAND (*expr_p, 0); - if (TREE_TYPE (val) == error_mark_node) + if (val && TREE_TYPE (val) == error_mark_node) return GS_ERROR; /* If the SAVE_EXPR has not been resolved, then evaluate it once. */ @@ -6847,7 +6848,12 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)), inputs, outputs, clobbers, labels); - gimple_asm_set_volatile (stmt, ASM_VOLATILE_P (expr) || noutputs == 0); + /* asm is volatile if it was marked by the user as volatile or + there are no outputs or this is an asm goto. */ + gimple_asm_set_volatile (stmt, + ASM_VOLATILE_P (expr) + || noutputs == 0 + || labels); gimple_asm_set_input (stmt, ASM_INPUT_P (expr)); gimple_asm_set_inline (stmt, ASM_INLINE_P (expr)); @@ -15832,6 +15838,9 @@ gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p, Compare scalar mode aggregates as scalar mode values. Using memcmp for them would be very inefficient at best, and is plain wrong if bitfields are involved. */ + if (error_operand_p (TREE_OPERAND (*expr_p, 1))) + ret = GS_ERROR; + else { tree type = TREE_TYPE (TREE_OPERAND (*expr_p, 1)); @@ -15856,9 +15865,8 @@ gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p, ret = gimplify_scalar_mode_aggregate_compare (expr_p); else ret = gimplify_variable_sized_compare (expr_p); - - break; } + break; /* If *EXPR_P does not need to be special-cased, handle it according to its class. */ diff --git a/gcc/go/ChangeLog b/gcc/go/ChangeLog index f50a60b76e3ae..26c89f07e518b 100644 --- a/gcc/go/ChangeLog +++ b/gcc/go/ChangeLog @@ -1,3 +1,27 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-06-28 Paul E. Murphy + + Backported from master: + 2023-06-22 Paul E. Murphy + + * go-backend.cc [TARGET_AIX]: Rename and update usage to TARGET_AIX_OS. + * go-lang.cc: Likewise. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-02-13 Ian Lance Taylor * gospec.cc: Revert 2022-02-09 change: diff --git a/gcc/go/go-backend.cc b/gcc/go/go-backend.cc index 7eed943416aec..0a05a0b064577 100644 --- a/gcc/go/go-backend.cc +++ b/gcc/go/go-backend.cc @@ -45,8 +45,8 @@ along with GCC; see the file COPYING3. If not see #define GO_EXPORT_SECTION_NAME ".go_export" #endif -#ifndef TARGET_AIX -#define TARGET_AIX 0 +#ifndef TARGET_AIX_OS +#define TARGET_AIX_OS 0 #endif /* This file holds all the cases where the Go frontend needs @@ -107,7 +107,7 @@ go_write_export_data (const char *bytes, unsigned int size) { gcc_assert (targetm_common.have_named_sections); sec = get_section (GO_EXPORT_SECTION_NAME, - TARGET_AIX ? SECTION_EXCLUDE : SECTION_DEBUG, + TARGET_AIX_OS ? SECTION_EXCLUDE : SECTION_DEBUG, NULL); } diff --git a/gcc/go/go-lang.cc b/gcc/go/go-lang.cc index c8365d2590a69..89fba02026a93 100644 --- a/gcc/go/go-lang.cc +++ b/gcc/go/go-lang.cc @@ -39,8 +39,8 @@ along with GCC; see the file COPYING3. If not see #include "go-c.h" #include "go-gcc.h" -#ifndef TARGET_AIX -#define TARGET_AIX 0 +#ifndef TARGET_AIX_OS +#define TARGET_AIX_OS 0 #endif /* Language-dependent contents of a type. */ @@ -119,9 +119,9 @@ go_langhook_init (void) args.compiling_runtime = go_compiling_runtime; args.debug_escape_level = go_debug_escape_level; args.debug_escape_hash = go_debug_escape_hash; - args.nil_check_size_threshold = TARGET_AIX ? -1 : 4096; + args.nil_check_size_threshold = TARGET_AIX_OS ? -1 : 4096; args.debug_optimization = go_debug_optimization; - args.need_eqtype = TARGET_AIX ? true : false; + args.need_eqtype = TARGET_AIX_OS ? true : false; args.linemap = go_get_linemap(); args.backend = go_get_backend(); go_create_gogo (&args); diff --git a/gcc/go/gofrontend/expressions.cc b/gcc/go/gofrontend/expressions.cc index 1b3b3bf135eae..88b4ceacc075f 100644 --- a/gcc/go/gofrontend/expressions.cc +++ b/gcc/go/gofrontend/expressions.cc @@ -12325,7 +12325,8 @@ Call_expression::intrinsify(Gogo* gogo, return Runtime::make_call(code, loc, 3, a1, a2, a3); } } - else if (package == "internal/abi") + else if (package == "internal/abi" + || package == "bootstrap/internal/abi") // for bootstrapping gc { if (is_method) return NULL; diff --git a/gcc/go/gofrontend/expressions.h b/gcc/go/gofrontend/expressions.h index 92e8d8d96b4d3..5f34c1c1116cc 100644 --- a/gcc/go/gofrontend/expressions.h +++ b/gcc/go/gofrontend/expressions.h @@ -4319,6 +4319,10 @@ class Slice_info_expression : public Expression { return this->slice_info_; } protected: + int + do_traverse(Traverse* traverse) + { return Expression::traverse(&this->slice_, traverse); } + Type* do_type(); diff --git a/gcc/go/gofrontend/gogo.cc b/gcc/go/gofrontend/gogo.cc index d35c6baf5825f..cca03dcdc354f 100644 --- a/gcc/go/gofrontend/gogo.cc +++ b/gcc/go/gofrontend/gogo.cc @@ -3331,6 +3331,9 @@ class Create_function_descriptors : public Traverse int expression(Expression**); + static bool + skip_descriptor(Gogo* gogo, const Named_object*); + private: Gogo* gogo_; }; @@ -3341,6 +3344,9 @@ class Create_function_descriptors : public Traverse int Create_function_descriptors::function(Named_object* no) { + if (Create_function_descriptors::skip_descriptor(this->gogo_, no)) + return TRAVERSE_CONTINUE; + if (no->is_function() && no->func_value()->enclosing() == NULL && !no->func_value()->is_method() @@ -3428,6 +3434,28 @@ Create_function_descriptors::expression(Expression** pexpr) return TRAVERSE_CONTINUE; } +// The gc compiler has some special cases that it always compiles as +// intrinsics. For those we don't want to generate a function +// descriptor, as there will be no code for it to refer to. + +bool +Create_function_descriptors::skip_descriptor(Gogo* gogo, + const Named_object* no) +{ + const std::string& pkgpath(no->package() == NULL + ? gogo->pkgpath() + : no->package()->pkgpath()); + + // internal/abi is the standard library package, + // bootstrap/internal/abi is the name used when bootstrapping the gc + // compiler. + + return ((pkgpath == "internal/abi" + || pkgpath == "bootstrap/internal/abi") + && (no->name() == "FuncPCABI0" + || no->name() == "FuncPCABIInternal")); +} + // Create function descriptors as needed. We need a function // descriptor for all exported functions and for all functions that // are referenced without being called. @@ -3449,7 +3477,8 @@ Gogo::create_function_descriptors() if (no->is_function_declaration() && !no->func_declaration_value()->type()->is_method() && !Linemap::is_predeclared_location(no->location()) - && !Gogo::is_hidden_name(no->name())) + && !Gogo::is_hidden_name(no->name()) + && !Create_function_descriptors::skip_descriptor(this, no)) fndecls.push_back(no); } for (std::vector::const_iterator p = fndecls.begin(); diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index b983e87389fc4..2c1eba312de18 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -2833,18 +2833,19 @@ noce_try_sign_mask (struct noce_if_info *if_info) return FALSE; /* This is only profitable if T is unconditionally executed/evaluated in the - original insn sequence or T is cheap. The former happens if B is the - non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no - INSN_B which can happen for e.g. conditional stores to memory. For the - cost computation use the block TEST_BB where the evaluation will end up - after the transformation. */ + original insn sequence or T is cheap and can't trap or fault. The former + happens if B is the non-zero (T) value and if INSN_B was taken from + TEST_BB, or there was no INSN_B which can happen for e.g. conditional + stores to memory. For the cost computation use the block TEST_BB where + the evaluation will end up after the transformation. */ t_unconditional = (t == if_info->b && (if_info->insn_b == NULL_RTX || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb)); if (!(t_unconditional - || (set_src_cost (t, mode, if_info->speed_p) - < COSTS_N_INSNS (2)))) + || ((set_src_cost (t, mode, if_info->speed_p) + < COSTS_N_INSNS (2)) + && !may_trap_or_fault_p (t)))) return FALSE; if (!noce_can_force_operand (t)) @@ -3367,6 +3368,20 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) return TRUE; } +/* Helper function for noce_convert_multiple_sets_1. If store to + DEST can affect P[0] or P[1], clear P[0]. Called via note_stores. */ + +static void +check_for_cc_cmp_clobbers (rtx dest, const_rtx, void *p0) +{ + rtx *p = (rtx *) p0; + if (p[0] == NULL_RTX) + return; + if (reg_overlap_mentioned_p (dest, p[0]) + || (p[1] && reg_overlap_mentioned_p (dest, p[1]))) + p[0] = NULL_RTX; +} + /* This goes through all relevant insns of IF_INFO->then_bb and tries to create conditional moves. In case a simple move sufficis the insn should be listed in NEED_NO_CMOV. The rewired-src cases should be @@ -3517,7 +3532,7 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, as min/max and emit an insn, accordingly. */ unsigned cost1 = 0, cost2 = 0; - rtx_insn *seq, *seq1, *seq2; + rtx_insn *seq, *seq1, *seq2 = NULL; rtx temp_dest = NULL_RTX, temp_dest1 = NULL_RTX, temp_dest2 = NULL_RTX; bool read_comparison = false; @@ -3529,9 +3544,10 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, as well. This allows the backend to emit a cmov directly without creating an additional compare for each. If successful, costing is easier and this sequence is usually preferred. */ - seq2 = try_emit_cmove_seq (if_info, temp, cond, - new_val, old_val, need_cmov, - &cost2, &temp_dest2, cc_cmp, rev_cc_cmp); + if (cc_cmp) + seq2 = try_emit_cmove_seq (if_info, temp, cond, + new_val, old_val, need_cmov, + &cost2, &temp_dest2, cc_cmp, rev_cc_cmp); /* The backend might have created a sequence that uses the condition. Check this. */ @@ -3586,6 +3602,24 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, return FALSE; } + if (cc_cmp) + { + /* Check if SEQ can clobber registers mentioned in + cc_cmp and/or rev_cc_cmp. If yes, we need to use + only seq1 from that point on. */ + rtx cc_cmp_pair[2] = { cc_cmp, rev_cc_cmp }; + for (walk = seq; walk; walk = NEXT_INSN (walk)) + { + note_stores (walk, check_for_cc_cmp_clobbers, cc_cmp_pair); + if (cc_cmp_pair[0] == NULL_RTX) + { + cc_cmp = NULL_RTX; + rev_cc_cmp = NULL_RTX; + break; + } + } + } + /* End the sub sequence and emit to the main sequence. */ emit_insn (seq); diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc index 8b1733e20c445..ca9cf30b6b59d 100644 --- a/gcc/internal-fn.cc +++ b/gcc/internal-fn.cc @@ -52,6 +52,8 @@ along with GCC; see the file COPYING3. If not see #include "explow.h" #include "rtl-iter.h" #include "gimple-range.h" +#include "tree-ssa-live.h" +#include "tree-outof-ssa.h" /* For lang_hooks.types.type_for_mode. */ #include "langhooks.h" @@ -1393,7 +1395,11 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1, rtx target = NULL_RTX; signop sign; enum insn_code icode; + int save_flag_trapv = flag_trapv; + /* We don't want any __mulv?i3 etc. calls from the expansion of + these internal functions, so disable -ftrapv temporarily. */ + flag_trapv = 0; done_label = gen_label_rtx (); do_error = gen_label_rtx (); @@ -2235,6 +2241,7 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1, else expand_arith_overflow_result_store (lhs, target, mode, res); } + flag_trapv = save_flag_trapv; } /* Expand UBSAN_CHECK_* internal function if it has vector operands. */ @@ -2255,7 +2262,11 @@ expand_vector_ubsan_overflow (location_t loc, enum tree_code code, tree lhs, rtx resvr = NULL_RTX; unsigned HOST_WIDE_INT const_cnt = 0; bool use_loop_p = (!cnt.is_constant (&const_cnt) || const_cnt > 4); + int save_flag_trapv = flag_trapv; + /* We don't want any __mulv?i3 etc. calls from the expansion of + these internal functions, so disable -ftrapv temporarily. */ + flag_trapv = 0; if (lhs) { optab op; @@ -2385,6 +2396,7 @@ expand_vector_ubsan_overflow (location_t loc, enum tree_code code, tree lhs, } else if (resvr) emit_move_insn (lhsr, resvr); + flag_trapv = save_flag_trapv; } /* Expand UBSAN_CHECK_ADD call STMT. */ @@ -2463,7 +2475,11 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) prec0 = MIN (prec0, pr); pr = get_min_precision (arg1, uns1_p ? UNSIGNED : SIGNED); prec1 = MIN (prec1, pr); + int save_flag_trapv = flag_trapv; + /* We don't want any __mulv?i3 etc. calls from the expansion of + these internal functions, so disable -ftrapv temporarily. */ + flag_trapv = 0; /* If uns0_p && uns1_p, precop is minimum needed precision of unsigned type to hold the exact result, otherwise precop is minimum needed precision of signed type to @@ -2504,6 +2520,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) ops.location = loc; rtx tem = expand_expr_real_2 (&ops, NULL_RTX, mode, EXPAND_NORMAL); expand_arith_overflow_result_store (lhs, target, mode, tem); + flag_trapv = save_flag_trapv; return; } @@ -2527,16 +2544,19 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) if (integer_zerop (arg0) && !unsr_p) { expand_neg_overflow (loc, lhs, arg1, false, NULL); + flag_trapv = save_flag_trapv; return; } /* FALLTHRU */ case PLUS_EXPR: expand_addsub_overflow (loc, code, lhs, arg0, arg1, unsr_p, unsr_p, unsr_p, false, NULL); + flag_trapv = save_flag_trapv; return; case MULT_EXPR: expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p, unsr_p, unsr_p, false, NULL); + flag_trapv = save_flag_trapv; return; default: gcc_unreachable (); @@ -2582,6 +2602,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) else expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p, uns0_p, uns1_p, false, NULL); + flag_trapv = save_flag_trapv; return; } @@ -2663,8 +2684,8 @@ expand_call_mem_ref (tree type, gcall *stmt, int index) tree tmp = addr; if (TREE_CODE (tmp) == SSA_NAME) { - gimple *def = SSA_NAME_DEF_STMT (tmp); - if (gimple_assign_single_p (def)) + gimple *def = get_gimple_for_ssa_name (tmp); + if (def && gimple_assign_single_p (def)) tmp = gimple_assign_rhs1 (def); } diff --git a/gcc/ipa-cp.cc b/gcc/ipa-cp.cc index dc3f0e94b1789..909464f4ac4c7 100644 --- a/gcc/ipa-cp.cc +++ b/gcc/ipa-cp.cc @@ -1402,7 +1402,7 @@ ipacp_value_safe_for_type (tree param_type, tree value) /* Return true iff X and Y should be considered equal values by IPA-CP. */ -static bool +bool values_equal_for_ipcp_p (tree x, tree y) { gcc_checking_assert (x != NULL_TREE && y != NULL_TREE); @@ -4139,7 +4139,8 @@ ipcp_discover_new_direct_edges (struct cgraph_node *node, fprintf (dump_file, " controlled uses count of param " "%i bumped down to %i\n", param_index, c); if (c == 0 - && (to_del = node->find_reference (cs->callee, NULL, 0))) + && (to_del = node->find_reference (cs->callee, NULL, 0, + IPA_REF_ADDR))) { if (dump_file && (dump_flags & TDF_DETAILS)) fprintf (dump_file, " and even removing its " @@ -4882,22 +4883,24 @@ update_specialized_profile (struct cgraph_node *new_node, profile_count redirected_sum) { struct cgraph_edge *cs; - profile_count new_node_count, orig_node_count = orig_node->count; + profile_count new_node_count, orig_node_count = orig_node->count.ipa (); if (dump_file) { fprintf (dump_file, " the sum of counts of redirected edges is "); redirected_sum.dump (dump_file); + fprintf (dump_file, "\n old ipa count of the original node is "); + orig_node_count.dump (dump_file); fprintf (dump_file, "\n"); } if (!(orig_node_count > profile_count::zero ())) return; - gcc_assert (orig_node_count >= redirected_sum); - new_node_count = new_node->count; new_node->count += redirected_sum; - orig_node->count -= redirected_sum; + orig_node->count + = lenient_count_portion_handling (orig_node->count - redirected_sum, + orig_node); for (cs = new_node->callees; cs; cs = cs->next_callee) cs->count += cs->count.apply_scale (redirected_sum, new_node_count); @@ -4952,10 +4955,12 @@ adjust_references_in_caller (cgraph_edge *cs, symtab_node *symbol, int index) if (jfunc->type == IPA_JF_CONST) { ipa_ref *to_del = cs->caller->find_reference (symbol, cs->call_stmt, - cs->lto_stmt_uid); + cs->lto_stmt_uid, + IPA_REF_ADDR); if (!to_del) return; to_del->remove_reference (); + ipa_zap_jf_refdesc (jfunc); if (dump_file) fprintf (dump_file, " Removed a reference from %s to %s.\n", cs->caller->dump_name (), symbol->dump_name ()); @@ -4963,7 +4968,8 @@ adjust_references_in_caller (cgraph_edge *cs, symtab_node *symbol, int index) } if (jfunc->type != IPA_JF_PASS_THROUGH - || ipa_get_jf_pass_through_operation (jfunc) != NOP_EXPR) + || ipa_get_jf_pass_through_operation (jfunc) != NOP_EXPR + || ipa_get_jf_pass_through_refdesc_decremented (jfunc)) return; int fidx = ipa_get_jf_pass_through_formal_id (jfunc); @@ -4990,6 +4996,10 @@ adjust_references_in_caller (cgraph_edge *cs, symtab_node *symbol, int index) gcc_assert (cuses > 0); cuses--; ipa_set_controlled_uses (caller_info, fidx, cuses); + ipa_set_jf_pass_through_refdesc_decremented (jfunc, true); + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " Controlled uses of parameter %i of %s dropped " + "to %i.\n", fidx, caller->dump_name (), cuses); if (cuses) return; @@ -4997,8 +5007,8 @@ adjust_references_in_caller (cgraph_edge *cs, symtab_node *symbol, int index) { /* Cloning machinery has created a reference here, we need to either remove it or change it to a read one. */ - ipa_ref *to_del = caller->find_reference (symbol, NULL, 0); - if (to_del && to_del->use == IPA_REF_ADDR) + ipa_ref *to_del = caller->find_reference (symbol, NULL, 0, IPA_REF_ADDR); + if (to_del) { to_del->remove_reference (); if (dump_file) diff --git a/gcc/ipa-devirt.cc b/gcc/ipa-devirt.cc index 6cba2085f1ae5..74fe656083c3f 100644 --- a/gcc/ipa-devirt.cc +++ b/gcc/ipa-devirt.cc @@ -284,6 +284,19 @@ type_possibly_instantiated_p (tree t) return vnode && vnode->definition; } +/* Return true if T or type derived from T may have instance. */ + +static bool +type_or_derived_type_possibly_instantiated_p (odr_type t) +{ + if (type_possibly_instantiated_p (t->type)) + return true; + for (auto derived : t->derived_types) + if (type_or_derived_type_possibly_instantiated_p (derived)) + return true; + return false; +} + /* Hash used to unify ODR types based on their mangled name and for anonymous namespace types. */ @@ -3171,6 +3184,7 @@ possible_polymorphic_call_targets (tree otr_type, { odr_type speculative_outer_type; bool speculation_complete = true; + bool check_derived_types = false; /* First insert target from type itself and check if it may have derived types. */ @@ -3189,8 +3203,12 @@ possible_polymorphic_call_targets (tree otr_type, to walk derivations. */ if (target && DECL_FINAL_P (target)) context.speculative_maybe_derived_type = false; - if (type_possibly_instantiated_p (speculative_outer_type->type)) - maybe_record_node (nodes, target, &inserted, can_refer, &speculation_complete); + if (check_derived_types + ? type_or_derived_type_possibly_instantiated_p + (speculative_outer_type) + : type_possibly_instantiated_p (speculative_outer_type->type)) + maybe_record_node (nodes, target, &inserted, can_refer, + &speculation_complete); if (binfo) matched_vtables.add (BINFO_VTABLE (binfo)); @@ -3211,6 +3229,7 @@ possible_polymorphic_call_targets (tree otr_type, if (!speculative || !nodes.length ()) { + bool check_derived_types = false; /* First see virtual method of type itself. */ binfo = get_binfo_at_offset (TYPE_BINFO (outer_type->type), context.offset, otr_type); @@ -3228,16 +3247,18 @@ possible_polymorphic_call_targets (tree otr_type, if (target && DECL_CXX_DESTRUCTOR_P (target)) context.maybe_in_construction = false; - if (target) + /* In the case we get complete method, we don't need + to walk derivations. */ + if (target && DECL_FINAL_P (target)) { - /* In the case we get complete method, we don't need - to walk derivations. */ - if (DECL_FINAL_P (target)) - context.maybe_derived_type = false; + check_derived_types = true; + context.maybe_derived_type = false; } /* If OUTER_TYPE is abstract, we know we are not seeing its instance. */ - if (type_possibly_instantiated_p (outer_type->type)) + if (check_derived_types + ? type_or_derived_type_possibly_instantiated_p (outer_type) + : type_possibly_instantiated_p (outer_type->type)) maybe_record_node (nodes, target, &inserted, can_refer, &complete); else skipped = true; diff --git a/gcc/ipa-fnsummary.cc b/gcc/ipa-fnsummary.cc index b12e7a1124d51..65e6687428ee4 100644 --- a/gcc/ipa-fnsummary.cc +++ b/gcc/ipa-fnsummary.cc @@ -2589,7 +2589,9 @@ points_to_local_or_readonly_memory_p (tree t) return true; return !ptr_deref_may_alias_global_p (t, false); } - if (TREE_CODE (t) == ADDR_EXPR) + if (TREE_CODE (t) == ADDR_EXPR + && (TREE_CODE (TREE_OPERAND (t, 0)) != TARGET_MEM_REF + || TREE_CODE (TREE_OPERAND (TREE_OPERAND (t, 0), 0)) != INTEGER_CST)) return refs_local_or_readonly_memory_p (TREE_OPERAND (t, 0)); return false; } diff --git a/gcc/ipa-icf-gimple.cc b/gcc/ipa-icf-gimple.cc index ab398ca051cdf..e81409c16f941 100644 --- a/gcc/ipa-icf-gimple.cc +++ b/gcc/ipa-icf-gimple.cc @@ -41,7 +41,11 @@ along with GCC; see the file COPYING3. If not see #include "gimple-walk.h" #include "tree-ssa-alias-compare.h" +#include "alloc-pool.h" +#include "symbol-summary.h" #include "ipa-icf-gimple.h" +#include "sreal.h" +#include "ipa-prop.h" namespace ipa_icf_gimple { @@ -714,6 +718,31 @@ func_checker::compare_gimple_call (gcall *s1, gcall *s2) && !compatible_types_p (TREE_TYPE (t1), TREE_TYPE (t2))) return return_false_with_msg ("GIMPLE internal call LHS type mismatch"); + if (!gimple_call_internal_p (s1)) + { + cgraph_edge *e1 = cgraph_node::get (m_source_func_decl)->get_edge (s1); + cgraph_edge *e2 = cgraph_node::get (m_target_func_decl)->get_edge (s2); + class ipa_edge_args *args1 = ipa_edge_args_sum->get (e1); + class ipa_edge_args *args2 = ipa_edge_args_sum->get (e2); + if ((args1 != nullptr) != (args2 != nullptr)) + return return_false_with_msg ("ipa_edge_args mismatch"); + if (args1) + { + int n1 = ipa_get_cs_argument_count (args1); + int n2 = ipa_get_cs_argument_count (args2); + if (n1 != n2) + return return_false_with_msg ("ipa_edge_args nargs mismatch"); + for (int i = 0; i < n1; i++) + { + struct ipa_jump_func *jf1 = ipa_get_ith_jump_func (args1, i); + struct ipa_jump_func *jf2 = ipa_get_ith_jump_func (args2, i); + if (((jf1 != nullptr) != (jf2 != nullptr)) + || (jf1 && !ipa_jump_functions_equivalent_p (jf1, jf2))) + return return_false_with_msg ("jump function mismatch"); + } + } + } + return compare_operand (t1, t2, get_operand_access_type (&map, t1)); } diff --git a/gcc/ipa-icf.cc b/gcc/ipa-icf.cc index 765ae74674587..bf06ad522d967 100644 --- a/gcc/ipa-icf.cc +++ b/gcc/ipa-icf.cc @@ -2411,10 +2411,11 @@ sem_item_optimizer::filter_removed_items (void) { /* Filter out non-readonly variables. */ tree decl = item->decl; - if (TREE_READONLY (decl)) - filtered.safe_push (item); - else + varpool_node *vnode = static_cast (item)->get_node (); + if (!TREE_READONLY (decl) || vnode->body_removed) remove_item (item); + else + filtered.safe_push (item); } } } @@ -3388,6 +3389,7 @@ sem_item_optimizer::merge_classes (unsigned int prev_class_count, continue; sem_item *source = c->members[0]; + bool this_merged_p = false; if (DECL_NAME (source->decl) && MAIN_NAME_P (DECL_NAME (source->decl))) @@ -3434,7 +3436,7 @@ sem_item_optimizer::merge_classes (unsigned int prev_class_count, if (dbg_cnt (merged_ipa_icf)) { bool merged = source->merge (alias); - merged_p |= merged; + this_merged_p |= merged; if (merged && alias->type == VAR) { @@ -3443,6 +3445,35 @@ sem_item_optimizer::merge_classes (unsigned int prev_class_count, } } } + + merged_p |= this_merged_p; + if (this_merged_p + && source->type == FUNC + && (!flag_wpa || flag_checking)) + { + unsigned i; + tree name; + FOR_EACH_SSA_NAME (i, name, DECL_STRUCT_FUNCTION (source->decl)) + { + /* We need to either merge or reset SSA_NAME_*_INFO. + For merging we don't preserve the mapping between + original and alias SSA_NAMEs from successful equals + calls. */ + if (POINTER_TYPE_P (TREE_TYPE (name))) + { + if (SSA_NAME_PTR_INFO (name)) + { + gcc_checking_assert (!flag_wpa); + SSA_NAME_PTR_INFO (name) = NULL; + } + } + else if (SSA_NAME_RANGE_INFO (name)) + { + gcc_checking_assert (!flag_wpa); + SSA_NAME_RANGE_INFO (name) = NULL; + } + } + } } if (!m_merged_variables.is_empty ()) diff --git a/gcc/ipa-modref.cc b/gcc/ipa-modref.cc index 556816ab4296d..ba7f21834ef91 100644 --- a/gcc/ipa-modref.cc +++ b/gcc/ipa-modref.cc @@ -332,7 +332,7 @@ modref_summary::useful_p (int ecf_flags, bool check_flags) if (check_flags && remove_useless_eaf_flags (static_chain_flags, ecf_flags, false)) return true; - if (ecf_flags & (ECF_CONST | ECF_NOVOPS)) + if (ecf_flags & ECF_CONST) return ((!side_effects || !nondeterministic) && (ecf_flags & ECF_LOOPING_CONST_OR_PURE)); if (loads && !loads->every_base) @@ -1261,7 +1261,7 @@ modref_access_analysis::merge_call_side_effects int flags = gimple_call_flags (call); /* Nothing to do for non-looping cont functions. */ - if ((flags & (ECF_CONST | ECF_NOVOPS)) + if ((flags & ECF_CONST) && !(flags & ECF_LOOPING_CONST_OR_PURE)) return false; @@ -1274,7 +1274,7 @@ modref_access_analysis::merge_call_side_effects /* Merge side effects and non-determinism. PURE/CONST flags makes functions deterministic and if there is no LOOPING_CONST_OR_PURE they also have no side effects. */ - if (!(flags & (ECF_CONST | ECF_NOVOPS | ECF_PURE)) + if (!(flags & (ECF_CONST | ECF_PURE)) || (flags & ECF_LOOPING_CONST_OR_PURE)) { if (!m_summary->side_effects && callee_summary->side_effects) @@ -1463,7 +1463,7 @@ modref_access_analysis::process_fnspec (gcall *call) /* PURE/CONST flags makes functions deterministic and if there is no LOOPING_CONST_OR_PURE they also have no side effects. */ - if (!(flags & (ECF_CONST | ECF_NOVOPS | ECF_PURE)) + if (!(flags & (ECF_CONST | ECF_PURE)) || (flags & ECF_LOOPING_CONST_OR_PURE) || (cfun->can_throw_non_call_exceptions && stmt_could_throw_p (cfun, call))) @@ -1602,12 +1602,12 @@ modref_access_analysis::analyze_call (gcall *stmt) print_gimple_stmt (dump_file, stmt, 0); } - if ((flags & (ECF_CONST | ECF_NOVOPS)) + if ((flags & ECF_CONST) && !(flags & ECF_LOOPING_CONST_OR_PURE)) { if (dump_file) fprintf (dump_file, - " - ECF_CONST | ECF_NOVOPS, ignoring all stores and all loads " + " - ECF_CONST, ignoring all stores and all loads " "except for args.\n"); return; } @@ -1622,7 +1622,13 @@ modref_access_analysis::analyze_call (gcall *stmt) if (dump_file) fprintf (dump_file, gimple_call_internal_p (stmt) ? " - Internal call" : " - Indirect call.\n"); - process_fnspec (stmt); + if (flags & ECF_NOVOPS) + { + set_side_effects (); + set_nondeterministic (); + } + else + process_fnspec (stmt); return; } /* We only need to handle internal calls in IPA mode. */ @@ -2568,8 +2574,10 @@ modref_eaf_analysis::analyze_ssa_name (tree name, bool deferred) int call_flags = deref_flags (gimple_call_arg_flags (call, i), ignore_stores); if (!ignore_retval && !(call_flags & EAF_UNUSED) - && !(call_flags & EAF_NOT_RETURNED_DIRECTLY) - && !(call_flags & EAF_NOT_RETURNED_INDIRECTLY)) + && (call_flags & (EAF_NOT_RETURNED_DIRECTLY + | EAF_NOT_RETURNED_INDIRECTLY)) + != (EAF_NOT_RETURNED_DIRECTLY + | EAF_NOT_RETURNED_INDIRECTLY)) merge_call_lhs_flags (call, i, name, false, true); if (ecf_flags & (ECF_CONST | ECF_NOVOPS)) m_lattice[index].merge_direct_load (); @@ -2599,8 +2607,9 @@ modref_eaf_analysis::analyze_ssa_name (tree name, bool deferred) is used arbitrarily. */ if (memory_access_to (gimple_assign_rhs1 (assign), name)) m_lattice[index].merge (deref_flags (0, false)); + /* Handle *name = *exp. */ - else if (memory_access_to (gimple_assign_lhs (assign), name)) + if (memory_access_to (gimple_assign_lhs (assign), name)) m_lattice[index].merge_direct_store (); } /* Handle lhs = *name. */ @@ -2964,7 +2973,7 @@ analyze_parms (modref_summary *summary, modref_summary_lto *summary_lto, summary->arg_flags.safe_grow_cleared (count, true); summary->arg_flags[parm_index] = EAF_UNUSED; } - else if (summary_lto) + if (summary_lto) { if (parm_index >= summary_lto->arg_flags.length ()) summary_lto->arg_flags.safe_grow_cleared (count, true); @@ -2999,6 +3008,9 @@ analyze_parms (modref_summary *summary, modref_summary_lto *summary_lto, (past, ecf_flags, VOID_TYPE_P (TREE_TYPE (TREE_TYPE (current_function_decl)))); + /* Store merging can produce reads when combining together multiple + bitfields. See PR111613. */ + past &= ~(EAF_NO_DIRECT_READ | EAF_NO_INDIRECT_READ); if (dump_file && (flags | past) != flags && !(flags & EAF_UNUSED)) { fprintf (dump_file, @@ -3020,7 +3032,7 @@ analyze_parms (modref_summary *summary, modref_summary_lto *summary_lto, summary->arg_flags.safe_grow_cleared (count, true); summary->arg_flags[parm_index] = flags; } - else if (summary_lto) + if (summary_lto) { if (parm_index >= summary_lto->arg_flags.length ()) summary_lto->arg_flags.safe_grow_cleared (count, true); @@ -4507,7 +4519,7 @@ propagate_unknown_call (cgraph_node *node, return changed; } - if (!(ecf_flags & (ECF_CONST | ECF_NOVOPS | ECF_PURE)) + if (!(ecf_flags & (ECF_CONST | ECF_PURE)) || (ecf_flags & ECF_LOOPING_CONST_OR_PURE) || nontrivial_scc) { @@ -4721,7 +4733,7 @@ modref_propagate_in_scc (cgraph_node *component_node) struct cgraph_node *callee; if (!callee_edge->inline_failed - || ((flags & (ECF_CONST | ECF_NOVOPS)) + || ((flags & ECF_CONST) && !(flags & ECF_LOOPING_CONST_OR_PURE))) continue; @@ -5144,8 +5156,8 @@ modref_propagate_flags_in_scc (cgraph_node *component_node) { escape_summary *sum = escape_summaries->get (e); - if (!sum || (e->indirect_info->ecf_flags - & (ECF_CONST | ECF_NOVOPS))) + if (!sum || ((e->indirect_info->ecf_flags & ECF_CONST) + && !(e->indirect_info->ecf_flags & ECF_LOOPING_CONST_OR_PURE))) continue; changed |= modref_merge_call_site_flags @@ -5170,8 +5182,8 @@ modref_propagate_flags_in_scc (cgraph_node *component_node) modref_summary_lto *callee_summary_lto = NULL; struct cgraph_node *callee; - if (ecf_flags & (ECF_CONST | ECF_NOVOPS) - || !callee_edge->inline_failed) + if ((ecf_flags & ECF_CONST) + && !(ecf_flags & ECF_LOOPING_CONST_OR_PURE)) continue; /* Get the callee and its summary. */ @@ -5269,7 +5281,7 @@ ipa_merge_modref_summary_after_inlining (cgraph_edge *edge) if (!callee_info && to_info) { - if (!(flags & (ECF_CONST | ECF_NOVOPS))) + if (!(flags & (ECF_CONST | ECF_PURE | ECF_NOVOPS))) to_info->loads->collapse (); if (!ignore_stores) to_info->stores->collapse (); @@ -5284,7 +5296,7 @@ ipa_merge_modref_summary_after_inlining (cgraph_edge *edge) /* Merge side effects and non-determinism. PURE/CONST flags makes functions deterministic and if there is no LOOPING_CONST_OR_PURE they also have no side effects. */ - if (!(flags & (ECF_CONST | ECF_NOVOPS | ECF_PURE)) + if (!(flags & (ECF_CONST | ECF_PURE)) || (flags & ECF_LOOPING_CONST_OR_PURE)) { if (to_info) diff --git a/gcc/ipa-param-manipulation.cc b/gcc/ipa-param-manipulation.cc index 38328c3e8d0ae..f0e5c82b24466 100644 --- a/gcc/ipa-param-manipulation.cc +++ b/gcc/ipa-param-manipulation.cc @@ -625,14 +625,65 @@ isra_get_ref_base_and_offset (tree expr, tree *base_p, unsigned *unit_offset_p) return true; } +/* Remove all statements that use NAME directly or indirectly. KILLED_SSAS + contains the SSA_NAMEs that are already being or have been processed and new + ones need to be added to it. The function only has to process situations + handled by ssa_name_only_returned_p in ipa-sra.cc with the exception that it + can assume it must never reach a use in a return statement. */ + +static void +purge_all_uses (tree name, hash_set *killed_ssas) +{ + imm_use_iterator imm_iter; + gimple *stmt; + auto_vec worklist; + + worklist.safe_push (name); + while (!worklist.is_empty ()) + { + tree cur_name = worklist.pop (); + FOR_EACH_IMM_USE_STMT (stmt, imm_iter, cur_name) + { + if (gimple_debug_bind_p (stmt)) + { + /* When runing within tree-inline, we will never end up here but + adding the SSAs to killed_ssas will do the trick in this case + and the respective debug statements will get reset. */ + gimple_debug_bind_reset_value (stmt); + update_stmt (stmt); + continue; + } + + tree lhs = NULL_TREE; + if (is_gimple_assign (stmt)) + lhs = gimple_assign_lhs (stmt); + else if (gimple_code (stmt) == GIMPLE_PHI) + lhs = gimple_phi_result (stmt); + gcc_assert (lhs + && (TREE_CODE (lhs) == SSA_NAME) + && !gimple_vdef (stmt)); + if (!killed_ssas->add (lhs)) + { + worklist.safe_push (lhs); + gimple_stmt_iterator gsi = gsi_for_stmt (stmt); + gsi_remove (&gsi, true); + } + } + } +} + /* Modify actual arguments of a function call in statement currently belonging to CS, and make it call CS->callee->decl. Return the new statement that replaced the old one. When invoked, cfun and current_function_decl have to - be set to the caller. */ + be set to the caller. When called from within tree-inline, KILLED_SSAs has + to contain the pointer to killed_new_ssa_names within the copy_body_data + structure and SSAs discovered to be useless (if LHS is removed) will be + added to it, otherwise it needs to be NULL. */ gcall * ipa_param_adjustments::modify_call (cgraph_edge *cs, - bool update_references) + bool update_references, + hash_set *killed_ssas) { gcall *stmt = cs->call_stmt; tree callee_decl = cs->callee->decl; @@ -719,6 +770,12 @@ ipa_param_adjustments::modify_call (cgraph_edge *cs, } if (repl) { + if (!useless_type_conversion_p(apm->type, repl->typed.type)) + { + repl = force_value_to_type (apm->type, repl); + repl = force_gimple_operand_gsi (&gsi, repl, + true, NULL, true, GSI_SAME_STMT); + } vargs.quick_push (repl); continue; } @@ -942,32 +999,20 @@ ipa_param_adjustments::modify_call (cgraph_edge *cs, gcall *new_stmt = gimple_build_call_vec (callee_decl, vargs); - tree ssa_to_remove = NULL; + hash_set *ssas_to_remove = NULL; if (tree lhs = gimple_call_lhs (stmt)) { if (!m_skip_return) gimple_call_set_lhs (new_stmt, lhs); else if (TREE_CODE (lhs) == SSA_NAME) { - /* LHS should now by a default-def SSA. Unfortunately default-def - SSA_NAMEs need a backing variable (or at least some code examining - SSAs assumes it is non-NULL). So we either have to re-use the - decl we have at hand or introdice a new one. */ - tree repl = create_tmp_var (TREE_TYPE (lhs), "removed_return"); - repl = get_or_create_ssa_default_def (cfun, repl); - SSA_NAME_IS_DEFAULT_DEF (repl) = true; - imm_use_iterator ui; - use_operand_p use_p; - gimple *using_stmt; - FOR_EACH_IMM_USE_STMT (using_stmt, ui, lhs) + if (!killed_ssas) { - FOR_EACH_IMM_USE_ON_STMT (use_p, ui) - { - SET_USE (use_p, repl); - } - update_stmt (using_stmt); + ssas_to_remove = new hash_set (8); + killed_ssas = ssas_to_remove; } - ssa_to_remove = lhs; + killed_ssas->add (lhs); + purge_all_uses (lhs, killed_ssas); } } @@ -986,8 +1031,11 @@ ipa_param_adjustments::modify_call (cgraph_edge *cs, fprintf (dump_file, "\n"); } gsi_replace (&gsi, new_stmt, true); - if (ssa_to_remove) - release_ssa_name (ssa_to_remove); + if (ssas_to_remove) + { + ipa_release_ssas_in_hash (ssas_to_remove); + delete ssas_to_remove; + } if (update_references) do { @@ -2398,4 +2446,30 @@ ipa_edge_modifications_finalize () ipa_edge_modifications = NULL; } +/* Helper used to sort a vector of SSA_NAMES. */ + +static int +compare_ssa_versions (const void *va, const void *vb) +{ + const_tree const a = *(const_tree const*)va; + const_tree const b = *(const_tree const*)vb; + if (SSA_NAME_VERSION (a) < SSA_NAME_VERSION (b)) + return -1; + if (SSA_NAME_VERSION (a) > SSA_NAME_VERSION (b)) + return 1; + return 0; +} + +/* Call release_ssa_name on all elements in KILLED_SSAS in a defined order. */ + +void +ipa_release_ssas_in_hash (hash_set *killed_ssas) +{ + auto_vec ssas_to_release; + for (tree sn : *killed_ssas) + ssas_to_release.safe_push (sn); + ssas_to_release.qsort (compare_ssa_versions); + for (tree sn : ssas_to_release) + release_ssa_name (sn); +} diff --git a/gcc/ipa-param-manipulation.h b/gcc/ipa-param-manipulation.h index a9ad2b216bea4..04c18af02bdf0 100644 --- a/gcc/ipa-param-manipulation.h +++ b/gcc/ipa-param-manipulation.h @@ -224,7 +224,8 @@ class GTY(()) ipa_param_adjustments /* Modify a call statement arguments (and possibly remove the return value) as described in the data fields of this class. */ - gcall *modify_call (cgraph_edge *cs, bool update_references); + gcall *modify_call (cgraph_edge *cs, bool update_references, + hash_set *killed_ssas); /* Return if the first parameter is left intact. */ bool first_param_intact_p (); /* Build a function type corresponding to the modified call. */ @@ -430,6 +431,6 @@ void push_function_arg_decls (vec *args, tree fndecl); void push_function_arg_types (vec *types, tree fntype); void ipa_verify_edge_has_no_modifications (cgraph_edge *cs); void ipa_edge_modifications_finalize (); - +void ipa_release_ssas_in_hash (hash_set *killed_ssas); #endif /* IPA_PARAM_MANIPULATION_H */ diff --git a/gcc/ipa-prop.cc b/gcc/ipa-prop.cc index 0e5966332eb3f..848d62e49cf9b 100644 --- a/gcc/ipa-prop.cc +++ b/gcc/ipa-prop.cc @@ -347,6 +347,8 @@ ipa_print_node_jump_functions_for_edge (FILE *f, struct cgraph_edge *cs) } if (jump_func->value.pass_through.agg_preserved) fprintf (f, ", agg_preserved"); + if (jump_func->value.pass_through.refdesc_decremented) + fprintf (f, ", refdesc_decremented"); fprintf (f, "\n"); } else if (type == IPA_JF_ANCESTOR) @@ -572,6 +574,7 @@ ipa_set_jf_simple_pass_through (struct ipa_jump_func *jfunc, int formal_id, jfunc->value.pass_through.formal_id = formal_id; jfunc->value.pass_through.operation = NOP_EXPR; jfunc->value.pass_through.agg_preserved = agg_preserved; + jfunc->value.pass_through.refdesc_decremented = false; } /* Set JFUNC to be an unary pass through jump function. */ @@ -585,6 +588,7 @@ ipa_set_jf_unary_pass_through (struct ipa_jump_func *jfunc, int formal_id, jfunc->value.pass_through.formal_id = formal_id; jfunc->value.pass_through.operation = operation; jfunc->value.pass_through.agg_preserved = false; + jfunc->value.pass_through.refdesc_decremented = false; } /* Set JFUNC to be an arithmetic pass through jump function. */ @@ -597,6 +601,7 @@ ipa_set_jf_arith_pass_through (struct ipa_jump_func *jfunc, int formal_id, jfunc->value.pass_through.formal_id = formal_id; jfunc->value.pass_through.operation = operation; jfunc->value.pass_through.agg_preserved = false; + jfunc->value.pass_through.refdesc_decremented = false; } /* Set JFUNC to be an ancestor jump function. */ @@ -1112,6 +1117,10 @@ ipa_load_from_parm_agg (struct ipa_func_body_info *fbi, if (!base) return false; + /* We can not propagate across volatile loads. */ + if (TREE_THIS_VOLATILE (op)) + return false; + if (DECL_P (base)) { int index = ipa_get_param_decl_index_1 (descriptors, base); @@ -1254,9 +1263,9 @@ unadjusted_ptr_and_unit_offset (tree op, tree *ret, poly_int64 *offset_ret) { if (TREE_CODE (op) == ADDR_EXPR) { - poly_int64 extra_offset = 0; + poly_int64 extra_offset; tree base = get_addr_base_and_unit_offset (TREE_OPERAND (op, 0), - &offset); + &extra_offset); if (!base) { base = get_base_address (TREE_OPERAND (op, 0)); @@ -3299,7 +3308,13 @@ update_jump_functions_after_inlining (struct cgraph_edge *cs, ipa_set_jf_unknown (dst); break; case IPA_JF_CONST: - ipa_set_jf_cst_copy (dst, src); + { + bool rd = ipa_get_jf_pass_through_refdesc_decremented (dst); + ipa_set_jf_cst_copy (dst, src); + if (rd) + ipa_zap_jf_refdesc (dst); + } + break; case IPA_JF_PASS_THROUGH: @@ -3679,7 +3694,7 @@ remove_described_reference (symtab_node *symbol, struct ipa_cst_ref_desc *rdesc) if (!origin) return false; to_del = origin->caller->find_reference (symbol, origin->call_stmt, - origin->lto_stmt_uid); + origin->lto_stmt_uid, IPA_REF_ADDR); if (!to_del) return false; @@ -4143,7 +4158,8 @@ propagate_controlled_uses (struct cgraph_edge *cs) struct ipa_jump_func *jf = ipa_get_ith_jump_func (args, i); struct ipa_cst_ref_desc *rdesc; - if (jf->type == IPA_JF_PASS_THROUGH) + if (jf->type == IPA_JF_PASS_THROUGH + && !ipa_get_jf_pass_through_refdesc_decremented (jf)) { int src_idx, c, d; src_idx = ipa_get_jf_pass_through_formal_id (jf); @@ -4171,7 +4187,8 @@ propagate_controlled_uses (struct cgraph_edge *cs) if (t && TREE_CODE (t) == ADDR_EXPR && TREE_CODE (TREE_OPERAND (t, 0)) == FUNCTION_DECL && (n = cgraph_node::get (TREE_OPERAND (t, 0))) - && (ref = new_root->find_reference (n, NULL, 0))) + && (ref = new_root->find_reference (n, NULL, 0, + IPA_REF_ADDR))) { if (dump_file) fprintf (dump_file, "ipa-prop: Removing cloning-created " @@ -4187,14 +4204,13 @@ propagate_controlled_uses (struct cgraph_edge *cs) { int d = ipa_get_controlled_uses (old_root_info, i); int c = rdesc->refcount; + tree cst = ipa_get_jf_constant (jf); rdesc->refcount = combine_controlled_uses_counters (c, d); if (rdesc->refcount != IPA_UNDESCRIBED_USE - && ipa_get_param_load_dereferenced (old_root_info, i)) + && ipa_get_param_load_dereferenced (old_root_info, i) + && TREE_CODE (cst) == ADDR_EXPR + && TREE_CODE (TREE_OPERAND (cst, 0)) == VAR_DECL) { - tree cst = ipa_get_jf_constant (jf); - gcc_checking_assert (TREE_CODE (cst) == ADDR_EXPR - && (TREE_CODE (TREE_OPERAND (cst, 0)) - == VAR_DECL)); symtab_node *n = symtab_node::get (TREE_OPERAND (cst, 0)); new_root->create_reference (n, IPA_REF_LOAD, NULL); if (dump_file) @@ -4204,7 +4220,6 @@ propagate_controlled_uses (struct cgraph_edge *cs) } if (rdesc->refcount == 0) { - tree cst = ipa_get_jf_constant (jf); gcc_checking_assert (TREE_CODE (cst) == ADDR_EXPR && ((TREE_CODE (TREE_OPERAND (cst, 0)) == FUNCTION_DECL) @@ -4221,7 +4236,7 @@ propagate_controlled_uses (struct cgraph_edge *cs) && clone != rdesc->cs->caller) { struct ipa_ref *ref; - ref = clone->find_reference (n, NULL, 0); + ref = clone->find_reference (n, NULL, 0, IPA_REF_ADDR); if (ref) { if (dump_file) @@ -4447,7 +4462,8 @@ ipa_edge_args_sum_t::duplicate (cgraph_edge *src, cgraph_edge *dst, gcc_checking_assert (n); ipa_ref *ref = src->caller->find_reference (n, src->call_stmt, - src->lto_stmt_uid); + src->lto_stmt_uid, + IPA_REF_ADDR); gcc_checking_assert (ref); dst->caller->clone_reference (ref, ref->stmt); @@ -4751,6 +4767,7 @@ ipa_write_jump_function (struct output_block *ob, streamer_write_uhwi (ob, jump_func->value.pass_through.formal_id); bp = bitpack_create (ob->main_stream); bp_pack_value (&bp, jump_func->value.pass_through.agg_preserved, 1); + gcc_assert (!jump_func->value.pass_through.refdesc_decremented); streamer_write_bitpack (&bp); } else if (TREE_CODE_CLASS (jump_func->value.pass_through.operation) @@ -6079,6 +6096,163 @@ ipcp_transform_function (struct cgraph_node *node) return modified_mem_access ? TODO_update_ssa_only_virtuals : 0; } +/* Return true if the two pass_through components of two jump functions are + known to be equivalent. AGG_JF denotes whether they are part of aggregate + functions or not. The function can be used before the IPA phase of IPA-CP + or inlining because it cannot cope with refdesc changes these passes can + carry out. */ + +static bool +ipa_agg_pass_through_jf_equivalent_p (ipa_pass_through_data *ipt1, + ipa_pass_through_data *ipt2, + bool agg_jf) + +{ + gcc_assert (agg_jf || + (!ipt1->refdesc_decremented && !ipt2->refdesc_decremented)); + if (ipt1->operation != ipt2->operation + || ipt1->formal_id != ipt2->formal_id + || (!agg_jf && (ipt1->agg_preserved != ipt2->agg_preserved))) + return false; + if (((ipt1->operand != NULL_TREE) != (ipt2->operand != NULL_TREE)) + || (ipt1->operand + && !values_equal_for_ipcp_p (ipt1->operand, ipt2->operand))) + return false; + return true; +} + +/* Return true if the two aggregate jump functions are known to be equivalent. + The function can be used before the IPA phase of IPA-CP or inlining because + it cannot cope with refdesc changes these passes can carry out. */ + +static bool +ipa_agg_jump_functions_equivalent_p (ipa_agg_jf_item *ajf1, + ipa_agg_jf_item *ajf2) +{ + if (ajf1->offset != ajf2->offset + || ajf1->jftype != ajf2->jftype + || !types_compatible_p (ajf1->type, ajf2->type)) + return false; + + switch (ajf1->jftype) + { + case IPA_JF_CONST: + if (!values_equal_for_ipcp_p (ajf1->value.constant, + ajf2->value.constant)) + return false; + break; + case IPA_JF_PASS_THROUGH: + { + ipa_pass_through_data *ipt1 = &ajf1->value.pass_through; + ipa_pass_through_data *ipt2 = &ajf2->value.pass_through; + if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, true)) + return false; + } + break; + case IPA_JF_LOAD_AGG: + { + ipa_load_agg_data *ila1 = &ajf1->value.load_agg; + ipa_load_agg_data *ila2 = &ajf2->value.load_agg; + if (!ipa_agg_pass_through_jf_equivalent_p (&ila1->pass_through, + &ila2->pass_through, true)) + return false; + if (ila1->offset != ila2->offset + || ila1->by_ref != ila2->by_ref + || !types_compatible_p (ila1->type, ila2->type)) + return false; + } + break; + default: + gcc_unreachable (); + } + return true; +} + +/* Return true if the two jump functions are known to be equivalent. The + function can be used before the IPA phase of IPA-CP or inlining because it + cannot cope with refdesc changes these passes can carry out. */ + +bool +ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2) +{ + if (jf1->type != jf2->type) + return false; + + switch (jf1->type) + { + case IPA_JF_UNKNOWN: + break; + case IPA_JF_CONST: + { + tree cst1 = ipa_get_jf_constant (jf1); + tree cst2 = ipa_get_jf_constant (jf2); + if (!values_equal_for_ipcp_p (cst1, cst2)) + return false; + + ipa_cst_ref_desc *rd1 = jfunc_rdesc_usable (jf1); + ipa_cst_ref_desc *rd2 = jfunc_rdesc_usable (jf2); + if (rd1 && rd2) + { + gcc_assert (rd1->refcount == 1 + && rd2->refcount == 1); + gcc_assert (!rd1->next_duplicate && !rd2->next_duplicate); + } + else if (rd1) + return false; + else if (rd2) + return false; + } + break; + case IPA_JF_PASS_THROUGH: + { + ipa_pass_through_data *ipt1 = &jf1->value.pass_through; + ipa_pass_through_data *ipt2 = &jf2->value.pass_through; + if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, false)) + return false; + } + break; + case IPA_JF_ANCESTOR: + { + ipa_ancestor_jf_data *ia1 = &jf1->value.ancestor; + ipa_ancestor_jf_data *ia2 = &jf2->value.ancestor; + + if (ia1->formal_id != ia2->formal_id + || ia1->agg_preserved != ia2->agg_preserved + || ia1->keep_null != ia2->keep_null + || ia1->offset != ia2->offset) + return false; + } + break; + default: + gcc_unreachable (); + } + + if (((jf1->bits != nullptr) != (jf2->bits != nullptr)) + || (jf1->bits && ((jf1->bits->value != jf2->bits->value) + || (jf1->bits->mask != jf2->bits->mask)))) + return false; + + if (((jf1->m_vr != nullptr) != (jf2->m_vr != nullptr)) + || (jf1->m_vr && *jf1->m_vr != *jf2->m_vr)) + return false; + + unsigned alen = vec_safe_length (jf1->agg.items); + if (vec_safe_length (jf2->agg.items) != alen) + return false; + + if (!alen) + return true; + + if (jf1->agg.by_ref != jf2->agg.by_ref) + return false; + + for (unsigned i = 0 ; i < alen; i++) + if (!ipa_agg_jump_functions_equivalent_p (&(*jf1->agg.items)[i], + &(*jf2->agg.items)[i])) + return false; + + return true; +} /* Return true if OTHER describes same agg value. */ bool diff --git a/gcc/ipa-prop.h b/gcc/ipa-prop.h index b22dfb5315ccd..8b2352d1b352a 100644 --- a/gcc/ipa-prop.h +++ b/gcc/ipa-prop.h @@ -110,6 +110,9 @@ struct GTY(()) ipa_pass_through_data ipa_agg_jump_function). The flag is used only when the operation is NOP_EXPR. */ unsigned agg_preserved : 1; + /* Set when the edge has already been used to decrement an appropriate + reference description counter and should not be decremented again. */ + unsigned refdesc_decremented : 1; }; /* Structure holding data required to describe a load-value-from-aggregate @@ -356,6 +359,15 @@ ipa_get_jf_constant_rdesc (struct ipa_jump_func *jfunc) return jfunc->value.constant.rdesc; } +/* Make JFUNC not participate in any further reference counting. */ + +inline void +ipa_zap_jf_refdesc (ipa_jump_func *jfunc) +{ + gcc_checking_assert (jfunc->type == IPA_JF_CONST); + jfunc->value.constant.rdesc = NULL; +} + /* Return the operand of a pass through jmp function JFUNC. */ static inline tree @@ -393,6 +405,26 @@ ipa_get_jf_pass_through_agg_preserved (struct ipa_jump_func *jfunc) return jfunc->value.pass_through.agg_preserved; } +/* Return the refdesc_decremented flag of a pass through jump function + JFUNC. */ + +inline bool +ipa_get_jf_pass_through_refdesc_decremented (struct ipa_jump_func *jfunc) +{ + gcc_checking_assert (jfunc->type == IPA_JF_PASS_THROUGH); + return jfunc->value.pass_through.refdesc_decremented; +} + +/* Set the refdesc_decremented flag of a pass through jump function JFUNC to + VALUE. */ + +inline void +ipa_set_jf_pass_through_refdesc_decremented (ipa_jump_func *jfunc, bool value) +{ + gcc_checking_assert (jfunc->type == IPA_JF_PASS_THROUGH); + jfunc->value.pass_through.refdesc_decremented = value; +} + /* Return true if pass through jump function JFUNC preserves type information. */ @@ -1197,11 +1229,14 @@ bool ipcp_get_parm_bits (tree, tree *, widest_int *); bool unadjusted_ptr_and_unit_offset (tree op, tree *ret, poly_int64 *offset_ret); +bool ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2); + /* From tree-sra.cc: */ tree build_ref_for_offset (location_t, tree, poly_int64, bool, tree, gimple_stmt_iterator *, bool); /* In ipa-cp.cc */ void ipa_cp_cc_finalize (void); +bool values_equal_for_ipcp_p (tree x, tree y); #endif /* IPA_PROP_H */ diff --git a/gcc/ipa-pure-const.cc b/gcc/ipa-pure-const.cc index 2b4950a596911..2642df91e6389 100644 --- a/gcc/ipa-pure-const.cc +++ b/gcc/ipa-pure-const.cc @@ -1526,8 +1526,9 @@ ipa_make_function_pure (struct cgraph_node *node, bool looping, bool local) { bool cdtor = false; - if (DECL_PURE_P (node->decl) - && (looping || !DECL_LOOPING_CONST_OR_PURE_P (node->decl))) + if (TREE_READONLY (node->decl) + || (DECL_PURE_P (node->decl) + && (looping || !DECL_LOOPING_CONST_OR_PURE_P (node->decl)))) return false; warn_function_pure (node->decl, !looping); if (local && skip_function_for_local_pure_const (node)) diff --git a/gcc/ira-color.cc b/gcc/ira-color.cc index 4a1a325e8e31b..ffe73b61c4505 100644 --- a/gcc/ira-color.cc +++ b/gcc/ira-color.cc @@ -2209,8 +2209,8 @@ assign_hard_reg (ira_allocno_t a, bool retry_p) restore_costs_from_copies (a); ALLOCNO_HARD_REGNO (a) = best_hard_regno; ALLOCNO_ASSIGNED_P (a) = true; - if (best_hard_regno >= 0) - update_costs_from_copies (a, true, ! retry_p); + if (best_hard_regno >= 0 && !retry_p) + update_costs_from_copies (a, true, true); ira_assert (ALLOCNO_CLASS (a) == aclass); /* We don't need updated costs anymore. */ ira_free_allocno_updated_costs (a); diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index 964c94a06ef56..642fda5293bf4 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -34,6 +34,7 @@ along with GCC; see the file COPYING3. If not see #include "ira-int.h" #include "addresses.h" #include "reload.h" +#include "print-rtl.h" /* The flags is set up every time when we calculate pseudo register classes through function ira_set_pseudo_classes. */ @@ -503,6 +504,18 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, int insn_allows_mem[MAX_RECOG_OPERANDS]; move_table *move_in_cost, *move_out_cost; short (*mem_cost)[2]; + const char *p; + + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + { + fprintf (ira_dump_file, " Processing insn %u", INSN_UID (insn)); + if (INSN_CODE (insn) >= 0 + && (p = get_insn_name (INSN_CODE (insn))) != NULL) + fprintf (ira_dump_file, " {%s}", p); + fprintf (ira_dump_file, " (freq=%d)\n", + REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn))); + dump_insn_slim (ira_dump_file, insn); + } for (i = 0; i < n_ops; i++) insn_allows_mem[i] = 0; @@ -526,6 +539,21 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, continue; } + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + { + fprintf (ira_dump_file, " Alt %d:", alt); + for (i = 0; i < n_ops; i++) + { + p = constraints[i]; + if (*p == '\0') + continue; + fprintf (ira_dump_file, " (%d) ", i); + for (; *p != '\0' && *p != ',' && *p != '#'; p++) + fputc (*p, ira_dump_file); + } + fprintf (ira_dump_file, "\n"); + } + for (i = 0; i < n_ops; i++) { unsigned char c; @@ -593,12 +621,16 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, register, this alternative can't be used. */ if (classes[j] == NO_REGS) - alt_fail = 1; - /* Otherwise, add to the cost of this alternative - the cost to copy the other operand to the hard - register used for this operand. */ + { + alt_fail = 1; + } else - alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL); + /* Otherwise, add to the cost of this alternative the cost + to copy the other operand to the hard register used for + this operand. */ + { + alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL); + } } else { @@ -1021,18 +1053,45 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, for (i = 0; i < n_ops; i++) if (REG_P (ops[i]) && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) { + int old_cost; + bool cost_change_p = false; struct costs *pp = op_costs[i], *qq = this_op_costs[i]; int *pp_costs = pp->cost, *qq_costs = qq->cost; int scale = 1 + (recog_data.operand_type[i] == OP_INOUT); cost_classes_t cost_classes_ptr = regno_cost_classes[REGNO (ops[i])]; - pp->mem_cost = MIN (pp->mem_cost, + old_cost = pp->mem_cost; + pp->mem_cost = MIN (old_cost, (qq->mem_cost + op_cost_add) * scale); + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5 + && pp->mem_cost < old_cost) + { + cost_change_p = true; + fprintf (ira_dump_file, " op %d(r=%u) new costs MEM:%d", + i, REGNO(ops[i]), pp->mem_cost); + } for (k = cost_classes_ptr->num - 1; k >= 0; k--) - pp_costs[k] - = MIN (pp_costs[k], (qq_costs[k] + op_cost_add) * scale); + { + old_cost = pp_costs[k]; + pp_costs[k] + = MIN (old_cost, (qq_costs[k] + op_cost_add) * scale); + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5 + && pp_costs[k] < old_cost) + { + if (!cost_change_p) + fprintf (ira_dump_file, " op %d(r=%u) new costs", + i, REGNO(ops[i])); + cost_change_p = true; + fprintf (ira_dump_file, " %s:%d", + reg_class_names[cost_classes_ptr->classes[k]], + pp_costs[k]); + } + } + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5 + && cost_change_p) + fprintf (ira_dump_file, "\n"); } } @@ -1307,26 +1366,48 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) || ((regno = REGNO (dest)) >= FIRST_PSEUDO_REGISTER && (other_regno = REGNO (src)) < FIRST_PSEUDO_REGISTER))) { - machine_mode mode = GET_MODE (SET_SRC (set)); + machine_mode mode = GET_MODE (SET_SRC (set)), cost_mode = mode; + machine_mode hard_reg_mode = GET_MODE(regno_reg_rtx[other_regno]); + poly_int64 pmode_size = GET_MODE_SIZE (mode); + poly_int64 phard_reg_mode_size = GET_MODE_SIZE (hard_reg_mode); + HOST_WIDE_INT mode_size, hard_reg_mode_size; cost_classes_t cost_classes_ptr = regno_cost_classes[regno]; enum reg_class *cost_classes = cost_classes_ptr->classes; reg_class_t rclass, hard_reg_class, bigger_hard_reg_class; - int cost, k; + int cost_factor = 1, cost, k; move_table *move_costs; bool dead_p = find_regno_note (insn, REG_DEAD, REGNO (src)); - ira_init_register_move_cost_if_necessary (mode); - move_costs = ira_register_move_cost[mode]; hard_reg_class = REGNO_REG_CLASS (other_regno); - bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class]; - /* Target code may return any cost for mode which does not - fit the hard reg class (e.g. DImode for AREG on - i386). Check this and use a bigger class to get the - right cost. */ - if (bigger_hard_reg_class != NO_REGS - && ! ira_hard_reg_in_set_p (other_regno, mode, - reg_class_contents[hard_reg_class])) - hard_reg_class = bigger_hard_reg_class; + bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class]; + /* Target code may return any cost for mode which does not fit the + hard reg class (e.g. DImode for AREG on i386). Check this and use + a bigger class to get the right cost. */ + if (bigger_hard_reg_class != NO_REGS + && ! ira_hard_reg_in_set_p (other_regno, mode, + reg_class_contents[hard_reg_class])) + hard_reg_class = bigger_hard_reg_class; + ira_init_register_move_cost_if_necessary (mode); + ira_init_register_move_cost_if_necessary (hard_reg_mode); + /* Use smaller movement cost for natural hard reg mode or its mode as + operand. */ + if (pmode_size.is_constant (&mode_size) + && phard_reg_mode_size.is_constant (&hard_reg_mode_size)) + { + /* Assume we are moving in the natural modes: */ + cost_factor = mode_size / hard_reg_mode_size; + if (mode_size % hard_reg_mode_size != 0) + cost_factor++; + if (cost_factor + * (ira_register_move_cost + [hard_reg_mode][hard_reg_class][hard_reg_class]) + < (ira_register_move_cost + [mode][hard_reg_class][hard_reg_class])) + cost_mode = hard_reg_mode; + else + cost_factor = 1; + } + move_costs = ira_register_move_cost[cost_mode]; i = regno == (int) REGNO (src) ? 1 : 0; for (k = cost_classes_ptr->num - 1; k >= 0; k--) { @@ -1334,7 +1415,7 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) cost = (i == 0 ? move_costs[hard_reg_class][rclass] : move_costs[rclass][hard_reg_class]); - + cost *= cost_factor; op_costs[i]->cost[k] = cost * frequency; /* If this insn is a single set copying operand 1 to operand 0 and one operand is an allocno with the @@ -1506,12 +1587,24 @@ scan_one_insn (rtx_insn *insn) record_operand_costs (insn, pref); + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + { + const char *p; + fprintf (ira_dump_file, " Final costs after insn %u", INSN_UID (insn)); + if (INSN_CODE (insn) >= 0 + && (p = get_insn_name (INSN_CODE (insn))) != NULL) + fprintf (ira_dump_file, " {%s}", p); + fprintf (ira_dump_file, " (freq=%d)\n", + REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn))); + dump_insn_slim (ira_dump_file, insn); + } + /* Now add the cost for each operand to the total costs for its allocno. */ for (i = 0; i < recog_data.n_operands; i++) { rtx op = recog_data.operand[i]; - + if (GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) @@ -1521,8 +1614,8 @@ scan_one_insn (rtx_insn *insn) struct costs *q = op_costs[i]; int *p_costs = p->cost, *q_costs = q->cost; cost_classes_t cost_classes_ptr = regno_cost_classes[regno]; - int add_cost; - + int add_cost = 0; + /* If the already accounted for the memory "cost" above, don't do so again. */ if (!counted_mem) @@ -1533,6 +1626,11 @@ scan_one_insn (rtx_insn *insn) else p->mem_cost += add_cost; } + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + { + fprintf (ira_dump_file, " op %d(r=%u) MEM:%d(+%d)", + i, REGNO(op), p->mem_cost, add_cost); + } for (k = cost_classes_ptr->num - 1; k >= 0; k--) { add_cost = q_costs[k]; @@ -1540,7 +1638,15 @@ scan_one_insn (rtx_insn *insn) p_costs[k] = INT_MAX; else p_costs[k] += add_cost; + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + { + fprintf (ira_dump_file, " %s:%d(+%d)", + reg_class_names[cost_classes_ptr->classes[k]], + p_costs[k], add_cost); + } } + if (ira_dump_file != NULL && internal_flag_ira_verbose > 5) + fprintf (ira_dump_file, "\n"); } } return insn; diff --git a/gcc/ira.cc b/gcc/ira.cc index e3b3c549120ea..a287026a2758a 100644 --- a/gcc/ira.cc +++ b/gcc/ira.cc @@ -5718,6 +5718,7 @@ ira (FILE *f) regstat_free_ri (); regstat_init_n_sets_and_refs (); regstat_compute_ri (); + resize_reg_info (); }; int max_regno_before_rm = max_reg_num (); diff --git a/gcc/jit/ChangeLog b/gcc/jit/ChangeLog index faab3a78c5e25..837914475be77 100644 --- a/gcc/jit/ChangeLog +++ b/gcc/jit/ChangeLog @@ -1,3 +1,49 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-04-22 Iain Sandoe + + Backported from master: + 2024-04-02 Iain Sandoe + + * Make-lang.in: Implement exports list, and use a shared + libgcc. + * libgccjit.exports: New file. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-29 David Malcolm + + * docs/internals/index.rst: Remove reference to ".c" extensions + of source files. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-09 Vibhav Pant + + * libgccjit.h (LIBGCCJIT_HAVE_gcc_jit_context_new_bitcast): Move + definition out of comment. + +2022-07-02 Sergei Trofimovich + + Backported from master: + 2022-06-29 Sergei Trofimovich + + PR c++/106102 + * jit-playback.cc: Include via "system.h" to avoid calloc() + poisoning. + * jit-recording.cc: Ditto. + * libgccjit.cc: Ditto. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-04-14 Iain Sandoe * jit-playback.cc (new_bitcast): Cast values returned by tree_to_uhwi diff --git a/gcc/jit/Make-lang.in b/gcc/jit/Make-lang.in index 6e10abfd0ac48..33ed7e357a2be 100644 --- a/gcc/jit/Make-lang.in +++ b/gcc/jit/Make-lang.in @@ -55,7 +55,17 @@ else ifneq (,$(findstring darwin,$(host))) -LIBGCCJIT_AGE = 1 +# NOTE that we are building here for the host, and so tests for target- +# specific functionality will only work when host == target. This causes +# fails when building cross-compilers with different object formats (at +# least when the respective linkers do not accept the same command line +# options). Fortunately, for Darwin we can safely hard-code the relevant +# host options, since all usable linkers support them). + +LIBGCCJIT_CURRENT = 24 +LIBGCCJIT_REVISION = 0 +LIBGCCJIT_AGE = 24 +LIBGCCJIT_COMPAT = 0 LIBGCCJIT_BASENAME = libgccjit LIBGCCJIT_SONAME = \ @@ -63,18 +73,18 @@ LIBGCCJIT_SONAME = \ LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib -# Conditionalize the use of the LD_VERSION_SCRIPT_OPTION and -# LD_SONAME_OPTION depending if configure found them, using $(if) -# We have to define a COMMA here, otherwise the commas in the "true" -# result are treated as separators by the $(if). +# Darwin does not have a version script option. Exported symbols are controlled +# by the following, and library versioning is done using libtool. +# We have to define a COMMA here, otherwise the commas are treated as +# separators. COMMA := , LIBGCCJIT_VERSION_SCRIPT_OPTION = \ - $(if $(LD_VERSION_SCRIPT_OPTION),\ - -Wl$(COMMA)$(LD_VERSION_SCRIPT_OPTION)$(COMMA)$(srcdir)/jit/libgccjit.map) + -Wl$(COMMA)-exported_symbols_list$(COMMA)$(srcdir)/jit/libgccjit.exports +# For Darwin host, we need a l64 or ld64-compatible linker, that uses +# -install_name to introduce this. LIBGCCJIT_SONAME_OPTION = \ - $(if $(LD_SONAME_OPTION), \ - -Wl$(COMMA)$(LD_SONAME_OPTION)$(COMMA)$(LIBGCCJIT_SONAME)) + -Wl$(COMMA)-install_name$(COMMA)$(LIBGCCJIT_SONAME) LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME) LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME) @@ -143,15 +153,18 @@ ifneq (,$(findstring mingw,$(target))) # Create import library LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB) else - ifneq (,$(findstring darwin,$(host))) -# TODO : Construct a Darwin-style symbol export file. -LIBGCCJIT_EXTRA_OPTS = -Wl,-compatibility_version,$(LIBGCCJIT_VERSION_NUM) \ - -Wl,-current_version,$(LIBGCCJIT_VERSION_NUM).$(LIBGCCJIT_MINOR_NUM).$(LIBGCCJIT_AGE) \ - $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \ - $(LIBGCCJIT_SONAME_OPTION) +LIBGCCJIT_VERS = $(LIBGCCJIT_CURRENT).$(LIBGCCJIT_REVISION).$(LIBGCCJIT_AGE) +LIBGCCJIT_EXTRA_OPTS = -Wl,-current_version,$(LIBGCCJIT_VERS) \ + -Wl,-compatibility_version,$(LIBGCCJIT_COMPAT) \ + $(LIBGCCJIT_VERSION_SCRIPT_OPTION) $(LIBGCCJIT_SONAME_OPTION) +# Use the default (shared) libgcc. +JIT_LDFLAGS = $(filter-out -static-libgcc, $(LDFLAGS)) +ifeq (,$(findstring darwin8,$(host))) +JIT_LDFLAGS += -Wl,-rpath,@loader_path +endif else - +JIT_LDFLAGS = $(LDFLAGS) LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \ $(LIBGCCJIT_SONAME_OPTION) endif @@ -165,7 +178,7 @@ $(LIBGCCJIT_FILENAME): $(jit_OBJS) \ $(LIBDEPS) $(srcdir)/jit/libgccjit.map \ $(EXTRA_GCC_OBJS) $(jit.prev) @$(call LINK_PROGRESS,$(INDEX.jit),start) - +$(LLINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ -shared \ + +$(LLINKER) $(ALL_LINKERFLAGS) $(JIT_LDFLAGS) -o $@ -shared \ $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \ $(CPPLIB) $(LIBDECNUMBER) $(EXTRA_GCC_LIBS) $(LIBS) $(BACKENDLIBS) \ $(EXTRA_GCC_OBJS) \ diff --git a/gcc/jit/docs/internals/index.rst b/gcc/jit/docs/internals/index.rst index 9200181bba4d6..092380c8f2088 100644 --- a/gcc/jit/docs/internals/index.rst +++ b/gcc/jit/docs/internals/index.rst @@ -291,8 +291,7 @@ For example: Overview of code structure -------------------------- -The library is implemented in C++. The source files have the ``.c`` -extension for legacy reasons. +The library is implemented in C++. * ``libgccjit.cc`` implements the API entrypoints. It performs error checking, then calls into classes of the gcc::jit::recording namespace diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc index 6be6bdf8dea5c..79714132b91ae 100644 --- a/gcc/jit/jit-playback.cc +++ b/gcc/jit/jit-playback.cc @@ -19,6 +19,7 @@ along with GCC; see the file COPYING3. If not see . */ #include "config.h" +#define INCLUDE_PTHREAD_H #include "system.h" #include "coretypes.h" #include "target.h" @@ -41,8 +42,6 @@ along with GCC; see the file COPYING3. If not see #include "diagnostic.h" #include "stmt.h" -#include - #include "jit-playback.h" #include "jit-result.h" #include "jit-builtins.h" diff --git a/gcc/jit/jit-recording.cc b/gcc/jit/jit-recording.cc index a31720f043e9c..5556b9c49056e 100644 --- a/gcc/jit/jit-recording.cc +++ b/gcc/jit/jit-recording.cc @@ -19,13 +19,13 @@ along with GCC; see the file COPYING3. If not see . */ #include "config.h" +#define INCLUDE_PTHREAD_H #include "system.h" #include "coretypes.h" #include "tm.h" #include "pretty-print.h" #include "toplev.h" -#include #include "jit-builtins.h" #include "jit-recording.h" diff --git a/gcc/jit/libgccjit.cc b/gcc/jit/libgccjit.cc index cc6486c9cadc2..4c991e5436bcf 100644 --- a/gcc/jit/libgccjit.cc +++ b/gcc/jit/libgccjit.cc @@ -19,12 +19,12 @@ along with GCC; see the file COPYING3. If not see . */ #include "config.h" +#define INCLUDE_PTHREAD_H #include "system.h" #include "coretypes.h" #include "timevar.h" #include "typed-splay-tree.h" #include "cppbuiltin.h" -#include #include "libgccjit.h" #include "jit-recording.h" diff --git a/gcc/jit/libgccjit.exports b/gcc/jit/libgccjit.exports new file mode 100644 index 0000000000000..8fda5aa030329 --- /dev/null +++ b/gcc/jit/libgccjit.exports @@ -0,0 +1,219 @@ +# Linker export list for Darwin libgccjit.dylib + +# Contributed by Iain Sandoe . +# +# This file is part of GCC. +# +# GCC is free software you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC see the file COPYING3. If not see +# . */ + +# The initial release of the library. +# Keep this list sorted alphabetically: +_gcc_jit_block_add_assignment +_gcc_jit_block_add_assignment_op +_gcc_jit_block_add_comment +_gcc_jit_block_add_eval +_gcc_jit_block_as_object +_gcc_jit_block_end_with_conditional +_gcc_jit_block_end_with_jump +_gcc_jit_block_end_with_return +_gcc_jit_block_end_with_void_return +_gcc_jit_block_get_function +_gcc_jit_context_acquire +_gcc_jit_context_compile +_gcc_jit_context_compile_to_file +_gcc_jit_context_dump_to_file +_gcc_jit_context_dump_reproducer_to_file +_gcc_jit_context_enable_dump +_gcc_jit_context_get_builtin_function +_gcc_jit_context_get_first_error +_gcc_jit_context_get_last_error +_gcc_jit_context_get_type +_gcc_jit_context_get_int_type +_gcc_jit_context_new_array_access +_gcc_jit_context_new_array_type +_gcc_jit_context_new_binary_op +_gcc_jit_context_new_call +_gcc_jit_context_new_call_through_ptr +_gcc_jit_context_new_cast +_gcc_jit_context_new_child_context +_gcc_jit_context_new_comparison +_gcc_jit_context_new_field +_gcc_jit_context_new_function +_gcc_jit_context_new_function_ptr_type +_gcc_jit_context_new_global +_gcc_jit_context_new_location +_gcc_jit_context_new_opaque_struct +_gcc_jit_context_new_param +_gcc_jit_context_new_rvalue_from_double +_gcc_jit_context_new_rvalue_from_int +_gcc_jit_context_new_rvalue_from_long +_gcc_jit_context_new_rvalue_from_ptr +_gcc_jit_context_new_string_literal +_gcc_jit_context_new_struct_type +_gcc_jit_context_new_unary_op +_gcc_jit_context_new_union_type +_gcc_jit_context_null +_gcc_jit_context_one +_gcc_jit_context_release +_gcc_jit_context_set_bool_option +_gcc_jit_context_set_int_option +_gcc_jit_context_set_logfile +_gcc_jit_context_set_str_option +_gcc_jit_context_zero +_gcc_jit_field_as_object +_gcc_jit_function_as_object +_gcc_jit_function_dump_to_dot +_gcc_jit_function_get_param +_gcc_jit_function_new_block +_gcc_jit_function_new_local +_gcc_jit_location_as_object +_gcc_jit_lvalue_as_object +_gcc_jit_lvalue_as_rvalue +_gcc_jit_lvalue_access_field +_gcc_jit_lvalue_get_address +_gcc_jit_object_get_context +_gcc_jit_object_get_debug_string +_gcc_jit_param_as_lvalue +_gcc_jit_param_as_object +_gcc_jit_param_as_rvalue +_gcc_jit_result_get_code +_gcc_jit_result_get_global +_gcc_jit_result_release +_gcc_jit_rvalue_access_field +_gcc_jit_rvalue_as_object +_gcc_jit_rvalue_dereference +_gcc_jit_rvalue_dereference_field +_gcc_jit_rvalue_get_type +_gcc_jit_struct_as_type +_gcc_jit_struct_set_fields +_gcc_jit_type_as_object +_gcc_jit_type_get_const +_gcc_jit_type_get_pointer +_gcc_jit_type_get_volatile + +# Add support for adding arbitrary command-line options (PR jit/66628). +# LIBGCCJIT_ABI_1 +_gcc_jit_context_add_command_line_option + +# Add support for disabling the check for unreachable blocks (PR jit/66546). +# LIBGCCJIT_ABI_2 +_gcc_jit_context_set_bool_allow_unreachable_blocks + +# Add support for switch statements. +# LIBGCCJIT_ABI_3 +_gcc_jit_block_end_with_switch +_gcc_jit_case_as_object +_gcc_jit_context_new_case + +# Add timing API. +#LIBGCCJIT_ABI_4 +_gcc_jit_context_get_timer +_gcc_jit_context_set_timer +_gcc_jit_timer_new +_gcc_jit_timer_release +_gcc_jit_timer_push +_gcc_jit_timer_pop +_gcc_jit_timer_print + +# LIBGCCJIT_ABI_5 +_gcc_jit_context_set_bool_use_external_driver + +# LIBGCCJIT_ABI_6 +_gcc_jit_rvalue_set_bool_require_tail_call + +# LIBGCCJIT_ABI_7 +_gcc_jit_type_get_aligned + +# LIBGCCJIT_ABI_8 +_gcc_jit_type_get_vector + +# LIBGCCJIT_ABI_9 +_gcc_jit_function_get_address + +# LIBGCCJIT_ABI_10 +_gcc_jit_context_new_rvalue_from_vector + +# LIBGCCJIT_ABI_11 +_gcc_jit_context_add_driver_option + +# LIBGCCJIT_ABI_12 +_gcc_jit_context_new_bitfield + +# LIBGCCJIT_ABI_13 +_gcc_jit_version_major +_gcc_jit_version_minor +_gcc_jit_version_patchlevel + +# LIBGCCJIT_ABI_14 +_gcc_jit_global_set_initializer + +# LIBGCCJIT_ABI_15 +_gcc_jit_block_add_extended_asm +_gcc_jit_block_end_with_extended_asm_goto +_gcc_jit_extended_asm_as_object +_gcc_jit_extended_asm_set_volatile_flag +_gcc_jit_extended_asm_set_inline_flag +_gcc_jit_extended_asm_add_output_operand +_gcc_jit_extended_asm_add_input_operand +_gcc_jit_extended_asm_add_clobber +_gcc_jit_context_add_top_level_asm + +# LIBGCCJIT_ABI_16 +_gcc_jit_function_get_return_type +_gcc_jit_function_get_param_count +_gcc_jit_function_type_get_return_type +_gcc_jit_function_type_get_param_count +_gcc_jit_function_type_get_param_type +_gcc_jit_type_unqualified +_gcc_jit_type_dyncast_array +_gcc_jit_type_is_bool +_gcc_jit_type_dyncast_function_ptr_type +_gcc_jit_type_is_integral +_gcc_jit_type_is_pointer +_gcc_jit_type_dyncast_vector +_gcc_jit_vector_type_get_element_type +_gcc_jit_vector_type_get_num_units +_gcc_jit_struct_get_field +_gcc_jit_type_is_struct +_gcc_jit_struct_get_field_count + +# LIBGCCJIT_ABI_17 +_gcc_jit_lvalue_set_tls_model + +# LIBGCCJIT_ABI_18 +_gcc_jit_lvalue_set_link_section + +#LIBGCCJIT_ABI_19 +_gcc_jit_context_new_array_constructor +_gcc_jit_context_new_struct_constructor +_gcc_jit_context_new_union_constructor +_gcc_jit_global_set_initializer_rvalue + +# LIBGCCJIT_ABI_20 +_gcc_jit_compatible_types +_gcc_jit_type_get_size + +# LIBGCCJIT_ABI_21 +_gcc_jit_context_new_bitcast + +# LIBGCCJIT_ABI_22 +_gcc_jit_lvalue_set_register_name + +# LIBGCCJIT_ABI_23 +_gcc_jit_context_set_bool_print_errors_to_stderr + +# LIBGCCJIT_ABI_24 +_gcc_jit_lvalue_set_alignment +_gcc_jit_lvalue_get_alignment diff --git a/gcc/jit/libgccjit.h b/gcc/jit/libgccjit.h index 062f06d691a9e..b3c389e93f68f 100644 --- a/gcc/jit/libgccjit.h +++ b/gcc/jit/libgccjit.h @@ -1252,10 +1252,10 @@ gcc_jit_context_new_cast (gcc_jit_context *ctxt, gcc_jit_rvalue *rvalue, gcc_jit_type *type); -/* Reinterpret a value as another type. - #define LIBGCCJIT_HAVE_gcc_jit_context_new_bitcast +/* Reinterpret a value as another type. + The types must be of the same size. This API entrypoint was added in LIBGCCJIT_ABI_21; you can test for its diff --git a/gcc/json.cc b/gcc/json.cc index 3bf9b61a641f5..974f8c368252f 100644 --- a/gcc/json.cc +++ b/gcc/json.cc @@ -207,7 +207,7 @@ string::print (pretty_printer *pp) const pp_string (pp, "\\\""); break; case '\\': - pp_string (pp, "\\n"); + pp_string (pp, "\\\\"); break; case '\b': pp_string (pp, "\\b"); diff --git a/gcc/loop-invariant.cc b/gcc/loop-invariant.cc index f3248540fb158..9b5f6cd3223c5 100644 --- a/gcc/loop-invariant.cc +++ b/gcc/loop-invariant.cc @@ -1837,6 +1837,8 @@ move_invariant_reg (class loop *loop, unsigned invno) else if (dump_file) fprintf (dump_file, "Invariant %d moved without introducing a new " "temporary register\n", invno); + if (JUMP_P (BB_END (preheader))) + preheader = split_edge (loop_preheader_edge (loop)); reorder_insns (inv->insn, inv->insn, BB_END (preheader)); df_recompute_luids (preheader); diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index d92ab76908c8e..04b0b6fbfc2a1 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -5139,6 +5139,11 @@ lra_constraints (bool first_p) loc_equivalence_callback, curr_insn); if (old != *curr_id->operand_loc[0]) { + /* If we substitute pseudo by shared equivalence, we can fail + to update LRA reg info and this can result in many + unexpected consequences. So keep rtl unshared: */ + *curr_id->operand_loc[0] + = copy_rtx (*curr_id->operand_loc[0]); lra_update_insn_regno_info (curr_insn); changed_p = true; } diff --git a/gcc/lra-eliminations.cc b/gcc/lra-eliminations.cc index c630ff4af2d14..7642d9857a872 100644 --- a/gcc/lra-eliminations.cc +++ b/gcc/lra-eliminations.cc @@ -397,8 +397,8 @@ lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode, rtx to = subst_p ? ep->to_rtx : ep->from_rtx; if (! update_p && ! full_p) - return gen_rtx_PLUS (Pmode, to, XEXP (x, 1)); - + return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1)); + if (maybe_ne (update_sp_offset, 0)) offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0; else diff --git a/gcc/lra-spills.cc b/gcc/lra-spills.cc index 4ddbe477d920b..0c4528b72ca91 100644 --- a/gcc/lra-spills.cc +++ b/gcc/lra-spills.cc @@ -860,6 +860,9 @@ lra_final_code_change (void) lra_update_dup (id, i); insn_change_p = true; } + if ((GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) + && alter_subregs (&XEXP (pat, 0), false)) + insn_change_p = true; if (insn_change_p) lra_update_operator_dups (id); diff --git a/gcc/lra.cc b/gcc/lra.cc index 1444cb7591441..5e29d3270d7d5 100644 --- a/gcc/lra.cc +++ b/gcc/lra.cc @@ -2535,9 +2535,8 @@ lra (FILE *f) if (inserted_p) commit_edge_insertions (); - /* Replacing pseudos with their memory equivalents might have - created shared rtx. Subsequent passes would get confused - by this, so unshare everything here. */ + /* Subsequent passes expect that rtl is unshared, so unshare everything + here. */ unshare_all_rtl_again (get_insns ()); if (flag_checking) diff --git a/gcc/lto-streamer-in.cc b/gcc/lto-streamer-in.cc index fe5a4e7fe1def..a7dad70363f7a 100644 --- a/gcc/lto-streamer-in.cc +++ b/gcc/lto-streamer-in.cc @@ -1699,11 +1699,14 @@ lto_read_tree_1 (class lto_input_block *ib, class data_in *data_in, tree expr) /* Read all the pointer fields in EXPR. */ streamer_read_tree_body (ib, data_in, expr); - /* Read any LTO-specific data not read by the tree streamer. */ + /* Read any LTO-specific data not read by the tree streamer. Do not use + stream_read_tree here since that flushes the dref_queue in mids of + SCC reading. */ if (DECL_P (expr) && TREE_CODE (expr) != FUNCTION_DECL && TREE_CODE (expr) != TRANSLATION_UNIT_DECL) - DECL_INITIAL (expr) = stream_read_tree (ib, data_in); + DECL_INITIAL (expr) + = lto_input_tree_1 (ib, data_in, streamer_read_record_start (ib), 0); /* Stream references to early generated DIEs. Keep in sync with the trees handled in dwarf2out_register_external_die. */ diff --git a/gcc/lto-wrapper.cc b/gcc/lto-wrapper.cc index 285e6e96af507..456636bd5dfeb 100644 --- a/gcc/lto-wrapper.cc +++ b/gcc/lto-wrapper.cc @@ -37,6 +37,7 @@ along with GCC; see the file COPYING3. If not see ./ccCJuXGv.lto.ltrans.o */ +#define INCLUDE_STRING #include "config.h" #include "system.h" #include "coretypes.h" @@ -49,6 +50,8 @@ along with GCC; see the file COPYING3. If not see #include "lto-section-names.h" #include "collect-utils.h" #include "opts-diagnostic.h" +#include "opt-suggestions.h" +#include "opts-jobserver.h" /* Environment variable, used for passing the names of offload targets from GCC driver to lto-wrapper. */ @@ -170,13 +173,14 @@ get_options_from_collect_gcc_options (const char *collect_gcc, return decoded; } -/* Find option in OPTIONS based on OPT_INDEX. -1 value is returned - if the option is not present. */ +/* Find option in OPTIONS based on OPT_INDEX, starting at START. -1 + value is returned if the option is not present. */ static int -find_option (vec &options, size_t opt_index) +find_option (vec &options, size_t opt_index, + unsigned start = 0) { - for (unsigned i = 0; i < options.length (); ++i) + for (unsigned i = start; i < options.length (); ++i) if (options[i].opt_index == opt_index) return i; @@ -189,15 +193,18 @@ find_option (vec &options, cl_decoded_option *option) return find_option (options, option->opt_index); } -/* Merge -flto FOPTION into vector of DECODED_OPTIONS. */ +/* Merge -flto FOPTION into vector of DECODED_OPTIONS. If FORCE is true + then FOPTION overrides previous settings. */ static void merge_flto_options (vec &decoded_options, - cl_decoded_option *foption) + cl_decoded_option *foption, bool force) { int existing_opt = find_option (decoded_options, foption); if (existing_opt == -1) decoded_options.safe_push (*foption); + else if (force) + decoded_options[existing_opt].arg = foption->arg; else { if (strcmp (foption->arg, decoded_options[existing_opt].arg) != 0) @@ -462,7 +469,7 @@ merge_and_complain (vec &decoded_options, break; case OPT_flto_: - merge_flto_options (decoded_options, foption); + merge_flto_options (decoded_options, foption, false); break; } } @@ -575,13 +582,16 @@ merge_and_complain (vec &decoded_options, else j++; + int existing_opt_index, existing_opt2_index; if (!xassembler_options_error) - for (i = j = 0; ; i++, j++) + for (existing_opt_index = existing_opt2_index = 0; ; + existing_opt_index++, existing_opt2_index++) { - int existing_opt_index - = find_option (decoded_options, OPT_Xassembler); - int existing_opt2_index - = find_option (fdecoded_options, OPT_Xassembler); + existing_opt_index + = find_option (decoded_options, OPT_Xassembler, existing_opt_index); + existing_opt2_index + = find_option (fdecoded_options, OPT_Xassembler, + existing_opt2_index); cl_decoded_option *existing_opt = NULL; cl_decoded_option *existing_opt2 = NULL; @@ -1100,7 +1110,7 @@ find_crtoffloadtable (int save_temps, const char *dumppfx) static bool find_and_merge_options (int fd, off_t file_offset, const char *prefix, - vec decoded_cl_options, + vec decoded_cl_options, bool first, vec *opts, const char *collect_gcc) { off_t offset, length; @@ -1110,6 +1120,9 @@ find_and_merge_options (int fd, off_t file_offset, const char *prefix, int err; vec fdecoded_options; + if (!first) + fdecoded_options = *opts; + simple_object_read *sobj; sobj = simple_object_start_read (fd, file_offset, "__GNU_LTO", &errmsg, &err); @@ -1130,7 +1143,6 @@ find_and_merge_options (int fd, off_t file_offset, const char *prefix, data = (char *)xmalloc (length); read (fd, data, length); fopts = data; - bool first = true; do { vec f2decoded_options @@ -1330,35 +1342,6 @@ init_num_threads (void) #endif } -/* Test and return reason why a jobserver cannot be detected. */ - -static const char * -jobserver_active_p (void) -{ - #define JS_PREFIX "jobserver is not available: " - #define JS_NEEDLE "--jobserver-auth=" - - const char *makeflags = getenv ("MAKEFLAGS"); - if (makeflags == NULL) - return JS_PREFIX "% environment variable is unset"; - - const char *n = strstr (makeflags, JS_NEEDLE); - if (n == NULL) - return JS_PREFIX "%<" JS_NEEDLE "%> is not present in %"; - - int rfd = -1; - int wfd = -1; - - if (sscanf (n + strlen (JS_NEEDLE), "%d,%d", &rfd, &wfd) == 2 - && rfd > 0 - && wfd > 0 - && is_valid_fd (rfd) - && is_valid_fd (wfd)) - return NULL; - else - return JS_PREFIX "cannot access %<" JS_NEEDLE "%> file descriptors"; -} - /* Print link to -flto documentation with a hint message. */ void @@ -1416,9 +1399,10 @@ run_gcc (unsigned argc, char *argv[]) bool jobserver_requested = false; int auto_parallel = 0; bool no_partition = false; - const char *jobserver_error = NULL; + bool fdecoded_options_first = true; vec fdecoded_options; fdecoded_options.create (16); + bool offload_fdecoded_options_first = true; vec offload_fdecoded_options = vNULL; struct obstack argv_obstack; int new_head_argc; @@ -1511,11 +1495,13 @@ run_gcc (unsigned argc, char *argv[]) } if (find_and_merge_options (fd, file_offset, LTO_SECTION_NAME_PREFIX, - decoded_options, &fdecoded_options, + decoded_options, fdecoded_options_first, + &fdecoded_options, collect_gcc)) { have_lto = true; ltoobj_argv[ltoobj_argc++] = argv[i]; + fdecoded_options_first = false; } close (fd); } @@ -1557,8 +1543,8 @@ run_gcc (unsigned argc, char *argv[]) break; case OPT_flto_: - /* Merge linker -flto= option with what we have in IL files. */ - merge_flto_options (fdecoded_options, option); + /* Override IL file settings with a linker -flto= option. */ + merge_flto_options (fdecoded_options, option, true); if (strcmp (option->arg, "jobserver") == 0) jobserver_requested = true; break; @@ -1572,6 +1558,16 @@ run_gcc (unsigned argc, char *argv[]) skip_debug = option->arg && !strcmp (option->arg, "0"); break; + case OPT_gbtf: + case OPT_gctf: + case OPT_gdwarf: + case OPT_gdwarf_: + case OPT_ggdb: + case OPT_gvms: + /* Negative forms, if allowed, enable debug info as well. */ + skip_debug = false; + break; + case OPT_dumpdir: incoming_dumppfx = dumppfx = option->arg; break; @@ -1644,14 +1640,14 @@ run_gcc (unsigned argc, char *argv[]) } else { - jobserver_error = jobserver_active_p (); - if (jobserver && jobserver_error != NULL) + jobserver_info jinfo; + if (jobserver && !jinfo.is_active) { /* Fall back to auto parallelism. */ jobserver = 0; auto_parallel = 1; } - else if (!jobserver && jobserver_error == NULL) + else if (!jobserver && jinfo.is_active) { parallel = 1; jobserver = 1; @@ -1774,9 +1770,12 @@ run_gcc (unsigned argc, char *argv[]) fatal_error (input_location, "cannot open %s: %m", filename); if (!find_and_merge_options (fd, file_offset, OFFLOAD_SECTION_NAME_PREFIX, - decoded_options, &offload_fdecoded_options, + decoded_options, + offload_fdecoded_options_first, + &offload_fdecoded_options, collect_gcc)) fatal_error (input_location, "cannot read %s: %m", filename); + offload_fdecoded_options_first = false; close (fd); if (filename != offload_argv[i]) XDELETEVEC (filename); @@ -1963,9 +1962,10 @@ run_gcc (unsigned argc, char *argv[]) if (nr > 1) { - if (jobserver_requested && jobserver_error != NULL) + jobserver_info jinfo; + if (jobserver_requested && !jinfo.is_active) { - warning (0, jobserver_error); + warning (0, jinfo.error_msg.c_str ()); print_lto_docs_link (); } else if (parallel == 0) diff --git a/gcc/lto/ChangeLog b/gcc/lto/ChangeLog index b815c9b72e6f1..bba6ac040705f 100644 --- a/gcc/lto/ChangeLog +++ b/gcc/lto/ChangeLog @@ -1,3 +1,37 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2023-03-19 Jakub Jelinek + + Backported from master: + 2023-03-01 Jakub Jelinek + + PR target/108910 + * lto-common.cc (lto_fixup_prevailing_type): Don't add t to + TYPE_POINTER_TO or TYPE_REFERENCE_TO chain if it has + TYPE_ATTRIBUTES or is TYPE_REF_IS_RVALUE. + +2022-10-27 Martin Liska + + Backported from master: + 2022-10-27 Martin Liska + + PR lto/107418 + * lto-dump.cc (lto_main): Do not load LTO stream for aliases. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-03-23 Tobias Burnus PR middle-end/104285 diff --git a/gcc/lto/lto-common.cc b/gcc/lto/lto-common.cc index ca28586a1e808..31f5be2208845 100644 --- a/gcc/lto/lto-common.cc +++ b/gcc/lto/lto-common.cc @@ -984,21 +984,25 @@ lto_fixup_prevailing_type (tree t) TYPE_NEXT_VARIANT (t) = TYPE_NEXT_VARIANT (mv); TYPE_NEXT_VARIANT (mv) = t; } - - /* The following reconstructs the pointer chains - of the new pointed-to type if we are a main variant. We do - not stream those so they are broken before fixup. */ - if (TREE_CODE (t) == POINTER_TYPE - && TYPE_MAIN_VARIANT (t) == t) - { - TYPE_NEXT_PTR_TO (t) = TYPE_POINTER_TO (TREE_TYPE (t)); - TYPE_POINTER_TO (TREE_TYPE (t)) = t; - } - else if (TREE_CODE (t) == REFERENCE_TYPE - && TYPE_MAIN_VARIANT (t) == t) - { - TYPE_NEXT_REF_TO (t) = TYPE_REFERENCE_TO (TREE_TYPE (t)); - TYPE_REFERENCE_TO (TREE_TYPE (t)) = t; + else if (!TYPE_ATTRIBUTES (t)) + { + /* The following reconstructs the pointer chains + of the new pointed-to type if we are a main variant. We do + not stream those so they are broken before fixup. + Don't add it if despite being main variant it has + attributes (then it was created with build_distinct_type_copy). + Similarly don't add TYPE_REF_IS_RVALUE REFERENCE_TYPEs. + Don't add it if there is something in the chain already. */ + if (TREE_CODE (t) == POINTER_TYPE) + { + TYPE_NEXT_PTR_TO (t) = TYPE_POINTER_TO (TREE_TYPE (t)); + TYPE_POINTER_TO (TREE_TYPE (t)) = t; + } + else if (TREE_CODE (t) == REFERENCE_TYPE && !TYPE_REF_IS_RVALUE (t)) + { + TYPE_NEXT_REF_TO (t) = TYPE_REFERENCE_TO (TREE_TYPE (t)); + TYPE_REFERENCE_TO (TREE_TYPE (t)) = t; + } } } diff --git a/gcc/lto/lto-dump.cc b/gcc/lto/lto-dump.cc index 1fb3fb86fb511..7dd3ac7b96d34 100644 --- a/gcc/lto/lto-dump.cc +++ b/gcc/lto/lto-dump.cc @@ -344,7 +344,8 @@ lto_main (void) /* Dump gimple statement statistics. */ cgraph_node *node; FOR_EACH_DEFINED_FUNCTION (node) - node->get_untransformed_body (); + if (!node->alias) + node->get_untransformed_body (); if (!GATHER_STATISTICS) warning_at (input_location, 0, "Not configured with " diff --git a/gcc/match.pd b/gcc/match.pd index 6d691d302b339..45ed34205106b 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -904,6 +904,20 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) && tree_nop_conversion_p (type, TREE_TYPE (@1))) (lshift @0 @2))) +/* Shifts by precision or greater result in zero. */ +(for shift (lshift rshift) + (simplify + (shift @0 uniform_integer_cst_p@1) + (if ((GIMPLE || !sanitize_flags_p (SANITIZE_SHIFT_EXPONENT)) + /* Leave arithmetic right shifts of possibly negative values alone. */ + && (TYPE_UNSIGNED (type) + || shift == LSHIFT_EXPR + || tree_expr_nonnegative_p (@0)) + /* Use a signed compare to leave negative shift counts alone. */ + && wi::ges_p (wi::to_wide (uniform_integer_cst_p (@1)), + element_precision (type))) + { build_zero_cst (type); }))) + /* Fold (1 << (C - x)) where C = precision(type) - 1 into ((1 << C) >> x). */ (simplify @@ -1268,7 +1282,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* For logical right shifts, this is possible only if @0 doesn't have MSB set and the logical right shift is changed into arithmetic shift. */ - (if (!wi::neg_p (tree_nonzero_bits (@0))) + (if (INTEGRAL_TYPE_P (type) + && !wi::neg_p (tree_nonzero_bits (@0))) (with { tree stype = signed_type_for (TREE_TYPE (@0)); } (convert (rshift (bit_not! (convert:stype @0)) @1)))))) #endif @@ -1722,7 +1737,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */ (simplify (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2) - (bit_ior (bit_and @0 @2) (bit_and @1 @2))) + (bit_ior (bit_and @0 @2) (bit_and! @1 @2))) /* Combine successive equal operations with constants. */ (for bitop (bit_and bit_ior bit_xor) @@ -1731,7 +1746,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (!CONSTANT_CLASS_P (@0)) /* This is the canonical form regardless of whether (bitop @1 @2) can be folded to a constant. */ - (bitop @0 (bitop @1 @2)) + (bitop @0 (bitop! @1 @2)) /* In this case we have three constants and (bitop @0 @1) doesn't fold to a constant. This can happen if @0 or @1 is a POLY_INT_CST and if the values involved are such that the operation can't be decided at @@ -2634,13 +2649,13 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) forever if something doesn't simplify into a constant. */ (if (!CONSTANT_CLASS_P (@0)) (if (outer_op == PLUS_EXPR) - (plus (view_convert @0) (inner_op @2 (view_convert @1))) - (minus (view_convert @0) (neg_inner_op @2 (view_convert @1))))) + (plus (view_convert @0) (inner_op! @2 (view_convert @1))) + (minus (view_convert @0) (neg_inner_op! @2 (view_convert @1))))) (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) (if (outer_op == PLUS_EXPR) - (view_convert (plus @0 (inner_op (view_convert @2) @1))) - (view_convert (minus @0 (neg_inner_op (view_convert @2) @1)))) + (view_convert (plus @0 (inner_op! (view_convert @2) @1))) + (view_convert (minus @0 (neg_inner_op! (view_convert @2) @1)))) /* If the constant operation overflows we cannot do the transform directly as we would introduce undefined overflow, for example with (a - 1) + INT_MIN. */ @@ -2671,10 +2686,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse forever if something doesn't simplify into a constant. */ (if (!CONSTANT_CLASS_P (@0)) - (minus (outer_op (view_convert @1) @2) (view_convert @0))) + (minus (outer_op! (view_convert @1) @2) (view_convert @0))) (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) - (view_convert (minus (outer_op @1 (view_convert @2)) @0)) + (view_convert (minus (outer_op! @1 (view_convert @2)) @0)) (if (types_match (type, @0)) (with { tree cst = const_binop (outer_op, type, @1, @2); } (if (cst && !TREE_OVERFLOW (cst)) @@ -2690,10 +2705,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse forever if something doesn't simplify into a constant. */ (if (!CONSTANT_CLASS_P (@0)) - (plus (view_convert @0) (minus @1 (view_convert @2)))) + (plus (view_convert @0) (minus! @1 (view_convert @2)))) (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) - (view_convert (plus @0 (minus (view_convert @1) @2))) + (view_convert (plus @0 (minus! (view_convert @1) @2))) (if (types_match (type, @0)) (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); } (if (cst && !TREE_OVERFLOW (cst)) @@ -3672,12 +3687,21 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) && TYPE_UNSIGNED (TREE_TYPE (@1))))) (view_convert @1))) -/* Simplify a view-converted empty constructor. */ +/* Simplify a view-converted empty or single-element constructor. */ (simplify (view_convert CONSTRUCTOR@0) - (if (TREE_CODE (@0) != SSA_NAME - && CONSTRUCTOR_NELTS (@0) == 0) - { build_zero_cst (type); })) + (with + { tree ctor = (TREE_CODE (@0) == SSA_NAME + ? gimple_assign_rhs1 (SSA_NAME_DEF_STMT (@0)) : @0); } + (switch + (if (CONSTRUCTOR_NELTS (ctor) == 0) + { build_zero_cst (type); }) + (if (CONSTRUCTOR_NELTS (ctor) == 1 + && VECTOR_TYPE_P (TREE_TYPE (ctor)) + && operand_equal_p (TYPE_SIZE (type), + TYPE_SIZE (TREE_TYPE + (CONSTRUCTOR_ELT (ctor, 0)->value)))) + (view_convert { CONSTRUCTOR_ELT (ctor, 0)->value; }))))) /* Re-association barriers around constants and other re-association barriers can be removed. */ @@ -3701,19 +3725,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) int inside_ptr = POINTER_TYPE_P (inside_type); int inside_float = FLOAT_TYPE_P (inside_type); int inside_vec = VECTOR_TYPE_P (inside_type); - unsigned int inside_prec = TYPE_PRECISION (inside_type); + unsigned int inside_prec = element_precision (inside_type); int inside_unsignedp = TYPE_UNSIGNED (inside_type); int inter_int = INTEGRAL_TYPE_P (inter_type); int inter_ptr = POINTER_TYPE_P (inter_type); int inter_float = FLOAT_TYPE_P (inter_type); int inter_vec = VECTOR_TYPE_P (inter_type); - unsigned int inter_prec = TYPE_PRECISION (inter_type); + unsigned int inter_prec = element_precision (inter_type); int inter_unsignedp = TYPE_UNSIGNED (inter_type); int final_int = INTEGRAL_TYPE_P (type); int final_ptr = POINTER_TYPE_P (type); int final_float = FLOAT_TYPE_P (type); int final_vec = VECTOR_TYPE_P (type); - unsigned int final_prec = TYPE_PRECISION (type); + unsigned int final_prec = element_precision (type); int final_unsignedp = TYPE_UNSIGNED (type); } (switch @@ -3801,6 +3825,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (simplify (float (fix_trunc @0)) (if (!flag_trapping_math + && !HONOR_SIGNED_ZEROS (type) && types_match (type, TREE_TYPE (@0)) && direct_internal_fn_supported_p (IFN_TRUNC, type, OPTIMIZE_FOR_BOTH)) @@ -4176,6 +4201,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* (v ? w : 0) ? a : b is just (v & w) ? a : b Currently disabled after pass lvec because ARM understands VEC_COND_EXPR but not a plain v==w fed to BIT_IOR_EXPR. */ +#if GIMPLE +/* These can only be done in gimple as fold likes to convert: + (CMP) & N into (CMP) ? N : 0 + and we try to match the same pattern again and again. */ (simplify (vec_cond (vec_cond:s @0 @3 integer_zerop) @1 @2) (if (optimize_vectors_before_lowering_p () && types_match (@0, @3)) @@ -4210,6 +4239,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (vec_cond @0 @3 (vec_cond:s @1 @2 @3)) (if (optimize_vectors_before_lowering_p () && types_match (@0, @1)) (vec_cond (bit_and (bit_not @0) @1) @2 @3))) +#endif /* Canonicalize mask ? { 0, ... } : { -1, ...} to ~mask if the mask types are compatible. */ @@ -5349,19 +5379,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) >= TYPE_PRECISION (TREE_TYPE (@10))) && (TYPE_UNSIGNED (TREE_TYPE (@00)) == TYPE_UNSIGNED (TREE_TYPE (@10)))) - || (TREE_CODE (@10) == INTEGER_CST + || (TREE_CODE (@1) == INTEGER_CST && INTEGRAL_TYPE_P (TREE_TYPE (@00)) - && int_fits_type_p (@10, TREE_TYPE (@00))))) + && int_fits_type_p (@1, TREE_TYPE (@00))))) (cmp @00 (convert @10)) - (if (TREE_CODE (@10) == INTEGER_CST + (if (TREE_CODE (@1) == INTEGER_CST && INTEGRAL_TYPE_P (TREE_TYPE (@00)) - && !int_fits_type_p (@10, TREE_TYPE (@00))) + && !int_fits_type_p (@1, TREE_TYPE (@00))) (with { tree min = lower_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00)); tree max = upper_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00)); - bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @10)); - bool below = integer_nonzerop (const_binop (LT_EXPR, type, @10, min)); + bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @1)); + bool below = integer_nonzerop (const_binop (LT_EXPR, type, @1, min)); } (if (above || below) (if (cmp == EQ_EXPR || cmp == NE_EXPR) @@ -5780,10 +5810,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (cmp (bit_and:c@2 @0 cst@1) integer_zerop) (with { tree csts = bitmask_inv_cst_vector_p (@1); } (if (csts && (VECTOR_TYPE_P (TREE_TYPE (@1)) || single_use (@2))) - (if (TYPE_UNSIGNED (TREE_TYPE (@1))) - (icmp @0 { csts; }) - (with { tree utype = unsigned_type_for (TREE_TYPE (@1)); } - (icmp (view_convert:utype @0) { csts; })))))))) + (with { auto optab = VECTOR_TYPE_P (TREE_TYPE (@1)) + ? optab_vector : optab_default; + tree utype = unsigned_type_for (TREE_TYPE (@1)); } + (if (target_supports_op_p (utype, icmp, optab) + || (optimize_vectors_before_lowering_p () + && (!target_supports_op_p (type, cmp, optab) + || !target_supports_op_p (type, BIT_AND_EXPR, optab)))) + (if (TYPE_UNSIGNED (TREE_TYPE (@1))) + (icmp @0 { csts; }) + (icmp (view_convert:utype @0) { csts; }))))))))) /* When one argument is a constant, overflow detection can be simplified. Currently restricted to single use so as not to interfere too much with @@ -6978,7 +7014,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) isize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (@1))); } (switch - (if (wi::leu_p (wi::to_wide (@ipos), wi::to_wide (@rpos)) + (if ((!INTEGRAL_TYPE_P (TREE_TYPE (@1)) + || type_has_mode_precision_p (TREE_TYPE (@1))) + && wi::leu_p (wi::to_wide (@ipos), wi::to_wide (@rpos)) && wi::leu_p (wi::to_wide (@rpos) + wi::to_wide (@rsize), wi::to_wide (@ipos) + isize)) (BIT_FIELD_REF @1 @rsize { wide_int_to_tree (bitsizetype, @@ -7152,7 +7190,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* popcount(X) + popcount(Y) is popcount(X|Y) when X&Y must be zero. */ (simplify (plus (POPCOUNT:s @0) (POPCOUNT:s @1)) - (if (wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 0) + (if (INTEGRAL_TYPE_P (type) + && wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 0) (POPCOUNT (bit_ior @0 @1)))) /* popcount(X) == 0 is X == 0, and related (in)equalities. */ @@ -7184,15 +7223,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (for pfun (POPCOUNT PARITY) (simplify (pfun @0) - (with { wide_int nz = tree_nonzero_bits (@0); } - (switch - (if (nz == 1) - (convert @0)) - (if (wi::popcount (nz) == 1) - (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); } - (convert (rshift:utype (convert:utype @0) - { build_int_cst (integer_type_node, - wi::ctz (nz)); })))))))) + (if (INTEGRAL_TYPE_P (type)) + (with { wide_int nz = tree_nonzero_bits (@0); } + (switch + (if (nz == 1) + (convert @0)) + (if (wi::popcount (nz) == 1) + (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); } + (convert (rshift:utype (convert:utype @0) + { build_int_cst (integer_type_node, + wi::ctz (nz)); }))))))))) #if GIMPLE /* 64- and 32-bits branchless implementations of popcount are detected: diff --git a/gcc/objc/ChangeLog b/gcc/objc/ChangeLog index fe5c9c8f205bf..8b3cc620c77ea 100644 --- a/gcc/objc/ChangeLog +++ b/gcc/objc/ChangeLog @@ -1,3 +1,75 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2024-05-09 Iain Sandoe + + Backported from master: + 2024-05-02 Iain Sandoe + + * objc-next-runtime-abi-02.cc (WEAK_PROTOCOLS_AFTER): New. + (next_runtime_abi_02_protocol_decl): Use WEAK_PROTOCOLS_AFTER + to determine this ABI change. + (build_v2_protocol_list_address_table): Likewise. + +2024-04-20 Iain Sandoe + + Backported from master: + 2024-01-18 Iain Sandoe + + * objc-act.cc (objc_init): Initialize interface and class + name hash maps before the preprocessor uses them. + +2024-04-19 Iain Sandoe + + Backported from master: + 2024-01-28 Iain Sandoe + + * objc-next-runtime-abi-02.cc (build_v2_address_table): Prevent + over-alignment of Objective-C metadata by setting DECL_USER_ALIGN + on relevant variables. + (build_v2_protocol_list_address_table): Likewise. + (generate_v2_protocol_list): Likewise. + (generate_v2_meth_descriptor_table): Likewise. + (generate_v2_meth_type_list): Likewise. + (generate_v2_property_table): Likewise. + (generate_v2_dispatch_table): Likewise. + (generate_v2_ivars_list): Likewise. + (generate_v2_class_structs): Likewise. + (build_ehtype): Likewise. + * objc-runtime-shared-support.cc (generate_strings): Likewise. + +2024-04-19 Iain Sandoe + + Backported from master: + 2024-01-12 Iain Sandoe + + * objc-next-runtime-abi-02.cc + (build_v2_objc_method_fixup_call): Early exit for cases + where the sender or receiver are known to be in error. + +2024-04-12 Iain Sandoe + + Backported from master: + 2022-05-03 Iain Sandoe + + * objc-next-runtime-abi-02.cc (next_runtime_abi_02_protocol_decl): Do + not dead-strip the runtime meta-data symbols. + (build_v2_classrefs_table): Likewise. + (build_v2_protocol_list_address_table): Likewise. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-01-17 Martin Liska * Make-lang.in: Rename .c names to .cc. diff --git a/gcc/objc/objc-act.cc b/gcc/objc/objc-act.cc index 252274c8f5d45..4820c5dbac358 100644 --- a/gcc/objc/objc-act.cc +++ b/gcc/objc/objc-act.cc @@ -347,6 +347,11 @@ bool objc_init (void) { bool ok; + + /* Set up stuff used by the preprocessor as well as FE parser. */ + interface_hash_init (); + hash_init (); + #ifdef OBJCPLUS if (cxx_init () == false) #else @@ -376,8 +381,6 @@ objc_init (void) /* Set up stuff used by FE parser and all runtimes. */ errbuf = XNEWVEC (char, 1024 * 10); - interface_hash_init (); - hash_init (); objc_encoding_init (); /* ... and then check flags and set-up for the selected runtime ... */ if (flag_next_runtime && flag_objc_abi >= 2) diff --git a/gcc/objc/objc-next-runtime-abi-02.cc b/gcc/objc/objc-next-runtime-abi-02.cc index e50ca6e89f59b..baf419d3350f9 100644 --- a/gcc/objc/objc-next-runtime-abi-02.cc +++ b/gcc/objc/objc-next-runtime-abi-02.cc @@ -72,6 +72,7 @@ along with GCC; see the file COPYING3. If not see #define TAG_MSGSENDSUPER_STRET "objc_msgSendSuper2_stret" #define USE_FIXUP_BEFORE 100600 +#define WEAK_PROTOCOLS_AFTER 100700 #define TAG_FIXUP "_fixup" @@ -1025,7 +1026,7 @@ next_runtime_abi_02_protocol_decl (tree p) /* static struct _objc_protocol _OBJC_Protocol_; */ snprintf (buf, BUFSIZE, "_OBJC_Protocol_%s", IDENTIFIER_POINTER (PROTOCOL_NAME (p))); - if (flag_next_runtime >= USE_FIXUP_BEFORE) + if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER) { decl = create_hidden_decl (objc_v2_protocol_template, buf); DECL_WEAK (decl) = true; @@ -1033,6 +1034,7 @@ next_runtime_abi_02_protocol_decl (tree p) else decl = start_var_decl (objc_v2_protocol_template, buf); OBJCMETA (decl, objc_meta, meta_protocol); + DECL_PRESERVE_P (decl) = 1; return decl; } @@ -1656,6 +1658,8 @@ build_v2_objc_method_fixup_call (int super_flag, tree method_prototype, rcv_p = (super_flag ? objc_super_type : objc_object_type); lookup_object = build_c_cast (input_location, rcv_p, lookup_object); + if (sender == error_mark_node || lookup_object == error_mark_node) + return error_mark_node; /* Use SAVE_EXPR to avoid evaluating the receiver twice. */ lookup_object = save_expr (lookup_object); @@ -2115,8 +2119,8 @@ build_v2_classrefs_table (void) expr = convert (objc_class_type, build_fold_addr_expr (expr)); } /* The runtime wants this, even if it appears unused, so we must force the - output. - DECL_PRESERVE_P (decl) = 1; */ + output. */ + DECL_PRESERVE_P (decl) = 1; finish_var_decl (decl, expr); } } @@ -2243,6 +2247,7 @@ build_v2_address_table (vec *src, const char *nam, tree attr) DECL_PRESERVE_P (decl) = 1; expr = objc_build_constructor (type, initlist); OBJCMETA (decl, objc_meta, attr); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, expr); } @@ -2308,7 +2313,7 @@ build_v2_protocol_list_address_table (void) gcc_assert (ref->id && TREE_CODE (ref->id) == PROTOCOL_INTERFACE_TYPE); snprintf (buf, BUFSIZE, "_OBJC_LabelProtocol_%s", IDENTIFIER_POINTER (PROTOCOL_NAME (ref->id))); - if (flag_next_runtime >= USE_FIXUP_BEFORE) + if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER) { decl = create_hidden_decl (objc_protocol_type, buf, /*is def=*/true); DECL_WEAK (decl) = true; @@ -2317,6 +2322,8 @@ build_v2_protocol_list_address_table (void) decl = create_global_decl (objc_protocol_type, buf, /*is def=*/true); expr = convert (objc_protocol_type, build_fold_addr_expr (ref->refdecl)); OBJCMETA (decl, objc_meta, meta_label_protocollist); + DECL_PRESERVE_P (decl) = 1; + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, expr); } @@ -2395,6 +2402,7 @@ generate_v2_protocol_list (tree i_or_p, tree klass_ctxt) /* ObjC2 puts all these in the base section. */ OBJCMETA (refs_decl, objc_meta, meta_base); DECL_PRESERVE_P (refs_decl) = 1; + DECL_USER_ALIGN (refs_decl) = 1; finish_var_decl (refs_decl, objc_build_constructor (TREE_TYPE (refs_decl),initlist)); return refs_decl; @@ -2503,6 +2511,7 @@ generate_v2_meth_descriptor_table (tree chain, tree protocol, CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist); /* Get into the right section. */ OBJCMETA (decl, objc_meta, attr); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, objc_build_constructor (method_list_template, v)); return decl; } @@ -2521,13 +2530,14 @@ generate_v2_meth_type_list (vec& all_meths, tree protocol, IDENTIFIER_POINTER (PROTOCOL_NAME (protocol))); tree decl = start_var_decl (list_type, nam); free (nam); - OBJCMETA (decl, objc_meta, meta_base); vec *v = NULL; for (unsigned i = 0; i < size; ++i) CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, add_objc_string (METHOD_ENCODING (all_meths[i]), meth_var_types)); + OBJCMETA (decl, objc_meta, meta_base); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, objc_build_constructor (list_type, v)); return decl; } @@ -2650,6 +2660,7 @@ generate_v2_property_table (tree context, tree klass_ctxt) CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist); OBJCMETA (decl, objc_meta, meta_base); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits)); return decl; } @@ -2861,6 +2872,7 @@ generate_v2_dispatch_table (tree chain, const char *name, tree attr) CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist); OBJCMETA (decl, objc_meta, attr); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), v)); return decl; @@ -3158,6 +3170,7 @@ generate_v2_ivars_list (tree chain, const char *name, tree attr, tree templ) build_int_cst (integer_type_node, size)); CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist); OBJCMETA (decl, objc_meta, attr); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits)); generating_instance_variables = 0; return decl; @@ -3425,7 +3438,6 @@ generate_v2_class_structs (struct imp_entry *impent) decl = start_var_decl (objc_v2_class_ro_template, newabi_append_ro (IDENTIFIER_POINTER (DECL_NAME (metaclass_decl)))); - /* TODO: ivarLayout needs t be built. */ initlist = build_v2_class_ro_t_initializer (TREE_TYPE (decl), name_expr, @@ -3435,6 +3447,7 @@ generate_v2_class_structs (struct imp_entry *impent) class_ivars, NULL_TREE); /* The ROs sit in the default const section. */ OBJCMETA (decl, objc_meta, meta_base); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, initlist); /* static struct class_t _OBJC_METACLASS_Foo = { ... }; */ @@ -3446,6 +3459,7 @@ generate_v2_class_structs (struct imp_entry *impent) build_fold_addr_expr (UOBJC_V2_CACHE_decl), build_fold_addr_expr (UOBJC_V2_VTABLE_decl)); /* The class section attributes are set when they are created. */ + DECL_USER_ALIGN (metaclass_decl) = 1; finish_var_decl (metaclass_decl, initlist); impent->meta_decl = metaclass_decl; @@ -3525,6 +3539,7 @@ generate_v2_class_structs (struct imp_entry *impent) inst_ivars, props); /* The ROs sit in the default const section. */ OBJCMETA (decl, objc_meta, meta_base); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, initlist); /* static struct class_t _OBJC_CLASS_Foo = { ... }; */ @@ -3536,6 +3551,7 @@ generate_v2_class_structs (struct imp_entry *impent) build_fold_addr_expr (UOBJC_V2_VTABLE_decl)); /* The class section attributes are set when they are created. */ + DECL_USER_ALIGN (class_decl) = 1; finish_var_decl (class_decl, initlist); impent->class_decl = class_decl; @@ -3710,6 +3726,7 @@ build_ehtype (tree name, const char *eh_name, bool weak) DECL_WEAK (ehtype_decl) = 1; inits = objc2_build_ehtype_initializer (name_expr, class_name_expr); OBJCMETA (ehtype_decl, objc_meta, meta_ehtype); + DECL_USER_ALIGN (ehtype_decl) = 1; finish_var_decl (ehtype_decl, inits); return ehtype_decl; } diff --git a/gcc/objc/objc-runtime-shared-support.cc b/gcc/objc/objc-runtime-shared-support.cc index 75c28fbdc5ce0..074e418abd655 100644 --- a/gcc/objc/objc-runtime-shared-support.cc +++ b/gcc/objc/objc-runtime-shared-support.cc @@ -684,6 +684,7 @@ generate_strings (void) decl = TREE_PURPOSE (chain); string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1, IDENTIFIER_POINTER (string)); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, string_expr); } @@ -693,6 +694,7 @@ generate_strings (void) decl = TREE_PURPOSE (chain); string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1, IDENTIFIER_POINTER (string)); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, string_expr); } @@ -702,6 +704,7 @@ generate_strings (void) decl = TREE_PURPOSE (chain); string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1, IDENTIFIER_POINTER (string)); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, string_expr); } @@ -711,6 +714,7 @@ generate_strings (void) decl = TREE_PURPOSE (chain); string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1, IDENTIFIER_POINTER (string)); + DECL_USER_ALIGN (decl) = 1; finish_var_decl (decl, string_expr); } } diff --git a/gcc/objcp/ChangeLog b/gcc/objcp/ChangeLog index e209d043197ac..611e39d1d3675 100644 --- a/gcc/objcp/ChangeLog +++ b/gcc/objcp/ChangeLog @@ -1,3 +1,19 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + 2022-01-17 Martin Liska * Make-lang.in: Rename .c names to .cc. diff --git a/gcc/omp-expand.cc b/gcc/omp-expand.cc index ee7083147933d..09190a79ab2e9 100644 --- a/gcc/omp-expand.cc +++ b/gcc/omp-expand.cc @@ -2003,8 +2003,8 @@ expand_omp_for_init_counts (struct omp_for_data *fd, gimple_stmt_iterator *gsi, t = fold_build2 (MINUS_EXPR, itype, unshare_expr (fd->loops[i].m2), unshare_expr (fd->loops[i].m1)); else if (fd->loops[i].m1) - t = fold_unary (NEGATE_EXPR, itype, - unshare_expr (fd->loops[i].m1)); + t = fold_build1 (NEGATE_EXPR, itype, + unshare_expr (fd->loops[i].m1)); else t = unshare_expr (fd->loops[i].m2); tree m2minusm1 @@ -2564,7 +2564,8 @@ expand_omp_for_init_vars (struct omp_for_data *fd, gimple_stmt_iterator *gsi, tree factor = fd->factor; gcond *cond_stmt = expand_omp_build_cond (gsi, NE_EXPR, factor, - build_zero_cst (TREE_TYPE (factor))); + build_zero_cst (TREE_TYPE (factor)), + true); edge e = split_block (gsi_bb (*gsi), cond_stmt); basic_block bb0 = e->src; e->flags = EDGE_TRUE_VALUE; @@ -3592,7 +3593,7 @@ expand_omp_ordered_source_sink (struct omp_region *region, static basic_block expand_omp_for_ordered_loops (struct omp_for_data *fd, tree *counts, basic_block cont_bb, basic_block body_bb, - bool ordered_lastprivate) + basic_block l0_bb, bool ordered_lastprivate) { if (fd->ordered == fd->collapse) return cont_bb; @@ -3697,7 +3698,7 @@ expand_omp_for_ordered_loops (struct omp_for_data *fd, tree *counts, class loop *loop = alloc_loop (); loop->header = new_header; loop->latch = e2->src; - add_loop (loop, body_bb->loop_father); + add_loop (loop, l0_bb->loop_father); } } @@ -4384,9 +4385,15 @@ expand_omp_for_generic (struct omp_region *region, } if (i < fd->ordered) { + if (entry_bb->loop_father != l0_bb->loop_father) + { + remove_bb_from_loops (l0_bb); + add_bb_to_loop (l0_bb, entry_bb->loop_father); + gcc_assert (single_succ (l0_bb) == l1_bb); + } cont_bb = create_empty_bb (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb); - add_bb_to_loop (cont_bb, l1_bb->loop_father); + add_bb_to_loop (cont_bb, l0_bb->loop_father); gimple_stmt_iterator gsi = gsi_after_labels (cont_bb); gimple *g = gimple_build_omp_continue (fd->loop.v, fd->loop.v); gsi_insert_before (&gsi, g, GSI_SAME_STMT); @@ -4398,7 +4405,7 @@ expand_omp_for_generic (struct omp_region *region, } expand_omp_ordered_source_sink (region, fd, counts, cont_bb); cont_bb = expand_omp_for_ordered_loops (fd, counts, cont_bb, l1_bb, - ordered_lastprivate); + l0_bb, ordered_lastprivate); if (counts[fd->collapse - 1]) { gcc_assert (fd->collapse == 1); @@ -6718,7 +6725,7 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) if (fd->loops[i].m2) t = n2v = create_tmp_var (itype); else - t = fold_convert (itype, fd->loops[i].n2); + t = fold_convert (itype, unshare_expr (fd->loops[i].n2)); t = force_gimple_operand_gsi (&gsi, t, true, NULL_TREE, false, GSI_CONTINUE_LINKING); tree v = fd->loops[i].v; @@ -6732,7 +6739,7 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) if (fd->collapse > 1 && !broken_loop) t = n2var; else - t = fold_convert (type, n2); + t = fold_convert (type, unshare_expr (n2)); t = force_gimple_operand_gsi (&gsi, t, true, NULL_TREE, false, GSI_CONTINUE_LINKING); tree v = fd->loop.v; @@ -6844,7 +6851,7 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) if (fd->loops[i].m2) t = nextn2v = create_tmp_var (itype); else - t = fold_convert (itype, fd->loops[i].n2); + t = fold_convert (itype, unshare_expr (fd->loops[i].n2)); t = force_gimple_operand_gsi (&gsi, t, true, NULL_TREE, false, GSI_CONTINUE_LINKING); tree v = fd->loops[i].v; @@ -6874,17 +6881,25 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) ne->probability = e->probability.invert (); gsi = gsi_after_labels (init_bb); - t = fold_convert (TREE_TYPE (fd->loops[i + 1].v), - fd->loops[i + 1].n1); if (fd->loops[i + 1].m1) { - tree t2 = fold_convert (TREE_TYPE (t), + tree t2 = fold_convert (TREE_TYPE (fd->loops[i + 1].v), fd->loops[i + 1 - fd->loops[i + 1].outer].v); - tree t3 = fold_convert (TREE_TYPE (t), fd->loops[i + 1].m1); - t2 = fold_build2 (MULT_EXPR, TREE_TYPE (t), t2, t3); - t = fold_build2 (PLUS_EXPR, TREE_TYPE (t), t, t2); + if (POINTER_TYPE_P (TREE_TYPE (t2))) + t = fold_build_pointer_plus (t2, fd->loops[i + 1].n1); + else + { + t = fold_convert (TREE_TYPE (fd->loops[i + 1].v), + fd->loops[i + 1].n1); + tree t3 = fold_convert (TREE_TYPE (t), fd->loops[i + 1].m1); + t2 = fold_build2 (MULT_EXPR, TREE_TYPE (t), t2, t3); + t = fold_build2 (PLUS_EXPR, TREE_TYPE (t), t, t2); + } } + else + t = fold_convert (TREE_TYPE (fd->loops[i + 1].v), + fd->loops[i + 1].n1); expand_omp_build_assign (&gsi, fd->loops[i + 1].v, t); if (fd->loops[i + 1].m2) { @@ -6893,14 +6908,19 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) gcc_assert (n2v == NULL_TREE); n2v = create_tmp_var (TREE_TYPE (fd->loops[i + 1].v)); } - t = fold_convert (TREE_TYPE (fd->loops[i + 1].v), - fd->loops[i + 1].n2); - tree t2 = fold_convert (TREE_TYPE (t), + tree t2 = fold_convert (TREE_TYPE (fd->loops[i + 1].v), fd->loops[i + 1 - fd->loops[i + 1].outer].v); - tree t3 = fold_convert (TREE_TYPE (t), fd->loops[i + 1].m2); - t2 = fold_build2 (MULT_EXPR, TREE_TYPE (t), t2, t3); - t = fold_build2 (PLUS_EXPR, TREE_TYPE (t), t, t2); + if (POINTER_TYPE_P (TREE_TYPE (t2))) + t = fold_build_pointer_plus (t2, fd->loops[i + 1].n2); + else + { + t = fold_convert (TREE_TYPE (fd->loops[i + 1].v), + fd->loops[i + 1].n2); + tree t3 = fold_convert (TREE_TYPE (t), fd->loops[i + 1].m2); + t2 = fold_build2 (MULT_EXPR, TREE_TYPE (t), t2, t3); + t = fold_build2 (PLUS_EXPR, TREE_TYPE (t), t, t2); + } expand_omp_build_assign (&gsi, n2v, t); } if (i + 2 == fd->collapse && n2var) @@ -6916,17 +6936,25 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd) tree t2 = fold_build2 (MINUS_EXPR, type, n2, fd->loop.v); if (fd->loops[i + 1].m1 || fd->loops[i + 1].m2) { + tree itype = TREE_TYPE (fd->loops[i].v); + if (POINTER_TYPE_P (itype)) + itype = signed_type_for (itype); t = build_int_cst (itype, (fd->loops[i + 1].cond_code == LT_EXPR ? -1 : 1)); t = fold_build2 (PLUS_EXPR, itype, fold_convert (itype, fd->loops[i + 1].step), t); - if (fd->loops[i + 1].m2) - t = fold_build2 (PLUS_EXPR, itype, t, n2v); - else + if (fd->loops[i + 1].m2 == NULL_TREE) t = fold_build2 (PLUS_EXPR, itype, t, fold_convert (itype, fd->loops[i + 1].n2)); + else if (POINTER_TYPE_P (TREE_TYPE (n2v))) + { + t = fold_build_pointer_plus (n2v, t); + t = fold_convert (itype, t); + } + else + t = fold_build2 (PLUS_EXPR, itype, t, n2v); t = fold_build2 (MINUS_EXPR, itype, t, fold_convert (itype, fd->loops[i + 1].v)); tree step = fold_convert (itype, fd->loops[i + 1].step); @@ -10444,7 +10472,10 @@ build_omp_regions_1 (basic_block bb, struct omp_region *parent, case GF_OMP_TARGET_KIND_OACC_ENTER_DATA: case GF_OMP_TARGET_KIND_OACC_EXIT_DATA: case GF_OMP_TARGET_KIND_OACC_DECLARE: - /* ..., other than for those stand-alone directives... */ + /* ..., other than for those stand-alone directives... + To be precise, target data isn't stand-alone, but + gimplifier put the end API call into try finally block + for it, so omp expansion can treat it as such. */ region = NULL; break; default: @@ -10462,6 +10493,11 @@ build_omp_regions_1 (basic_block bb, struct omp_region *parent, && gimple_omp_task_taskwait_p (stmt)) /* #pragma omp taskwait depend(...) is a stand-alone directive. */ region = NULL; + else if (code == GIMPLE_OMP_TASKGROUP) + /* #pragma omp taskgroup isn't a stand-alone directive, but + gimplifier put the end API call into try finall block + for it, so omp expansion can treat it as such. */ + region = NULL; /* ..., this directive becomes the parent for a new region. */ if (region) parent = region; @@ -10658,13 +10694,18 @@ omp_make_gimple_edges (basic_block bb, struct omp_region **region, case GIMPLE_OMP_MASTER: case GIMPLE_OMP_MASKED: case GIMPLE_OMP_SCOPE: - case GIMPLE_OMP_TASKGROUP: case GIMPLE_OMP_CRITICAL: case GIMPLE_OMP_SECTION: cur_region = new_omp_region (bb, code, cur_region); fallthru = true; break; + case GIMPLE_OMP_TASKGROUP: + cur_region = new_omp_region (bb, code, cur_region); + fallthru = true; + cur_region = cur_region->outer; + break; + case GIMPLE_OMP_TASK: cur_region = new_omp_region (bb, code, cur_region); fallthru = true; diff --git a/gcc/omp-low.cc b/gcc/omp-low.cc index bf5779b6543be..4ee8f8eb3efad 100644 --- a/gcc/omp-low.cc +++ b/gcc/omp-low.cc @@ -6152,6 +6152,8 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, && gimple_omp_for_combined_into_p (ctx->stmt)) { tree t = OMP_CLAUSE_LINEAR_STEP (c); + if (DECL_P (t)) + t = build_outer_var_ref (t, ctx); tree stept = TREE_TYPE (t); tree ct = omp_find_clause (clauses, OMP_CLAUSE__LOOPTEMP_); @@ -6205,10 +6207,10 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, } if (POINTER_TYPE_P (TREE_TYPE (x))) - x = fold_build2 (POINTER_PLUS_EXPR, - TREE_TYPE (x), x, t); + x = fold_build_pointer_plus (x, t); else - x = fold_build2 (PLUS_EXPR, TREE_TYPE (x), x, t); + x = fold_build2 (PLUS_EXPR, TREE_TYPE (x), x, + fold_convert (TREE_TYPE (x), t)); } if ((OMP_CLAUSE_CODE (c) != OMP_CLAUSE_LINEAR @@ -7579,6 +7581,7 @@ lower_oacc_reductions (location_t loc, tree clauses, tree level, bool inner, incoming = build_simple_mem_ref (incoming); } else + /* Note that 'var' might be a mem ref. */ v1 = v2 = v3 = var; /* Determine position in reduction buffer, which may be used @@ -7607,26 +7610,28 @@ lower_oacc_reductions (location_t loc, tree clauses, tree level, bool inner, = build_call_expr_internal_loc (loc, IFN_GOACC_REDUCTION, TREE_TYPE (var), 6, setup_code, unshare_expr (ref_to_res), - incoming, level, op, off); + unshare_expr (incoming), + level, op, off); tree init_call = build_call_expr_internal_loc (loc, IFN_GOACC_REDUCTION, TREE_TYPE (var), 6, init_code, unshare_expr (ref_to_res), - v1, level, op, off); + unshare_expr (v1), level, op, off); tree fini_call = build_call_expr_internal_loc (loc, IFN_GOACC_REDUCTION, TREE_TYPE (var), 6, fini_code, unshare_expr (ref_to_res), - v2, level, op, off); + unshare_expr (v2), level, op, off); tree teardown_call = build_call_expr_internal_loc (loc, IFN_GOACC_REDUCTION, TREE_TYPE (var), 6, teardown_code, - ref_to_res, v3, level, op, off); + ref_to_res, unshare_expr (v3), + level, op, off); - gimplify_assign (v1, setup_call, &before_fork); - gimplify_assign (v2, init_call, &after_fork); - gimplify_assign (v3, fini_call, &before_join); - gimplify_assign (outgoing, teardown_call, &after_join); + gimplify_assign (unshare_expr (v1), setup_call, &before_fork); + gimplify_assign (unshare_expr (v2), init_call, &after_fork); + gimplify_assign (unshare_expr (v3), fini_call, &before_join); + gimplify_assign (unshare_expr (outgoing), teardown_call, &after_join); } /* Now stitch things together. */ @@ -9672,7 +9677,6 @@ lower_omp_taskgroup (gimple_stmt_iterator *gsi_p, omp_context *ctx) gimple_bind_add_seq (bind, gimple_omp_body (stmt)); gimple_omp_set_body (stmt, NULL); - gimple_bind_add_stmt (bind, gimple_build_omp_return (true)); gimple_bind_add_seq (bind, dseq); pop_gimplify_context (bind); @@ -10656,6 +10660,28 @@ oacc_privatization_candidate_p (const location_t loc, const tree c, } } + /* If an artificial variable has been added to a bind, e.g. + a compiler-generated temporary structure used by the Fortran front-end, do + not consider it as a privatization candidate. Note that variables on + the stack are private per-thread by default: making them "gang-private" + for OpenACC actually means to share a single instance of a variable + amongst all workers and threads spawned within each gang. + At present, no compiler-generated artificial variables require such + sharing semantics, so this is safe. */ + + if (res && block && DECL_ARTIFICIAL (decl)) + { + res = false; + + if (dump_enabled_p ()) + { + oacc_privatization_begin_diagnose_var (l_dump_flags, loc, c, decl); + dump_printf (l_dump_flags, + "isn%'t candidate for adjusting OpenACC privatization " + "level: %s\n", "artificial"); + } + } + if (res) { if (dump_enabled_p ()) @@ -13741,7 +13767,8 @@ lower_omp_target (gimple_stmt_iterator *gsi_p, omp_context *ctx) } tree present; present = ((do_optional_check - && OMP_CLAUSE_CODE (c) != OMP_CLAUSE_HAS_DEVICE_ADDR) + && OMP_CLAUSE_CODE (c) != OMP_CLAUSE_HAS_DEVICE_ADDR + && OMP_CLAUSE_CODE (c) != OMP_CLAUSE_IS_DEVICE_PTR) ? omp_check_optional_argument (OMP_CLAUSE_DECL (c), true) : NULL_TREE); if (present) diff --git a/gcc/omp-oacc-kernels-decompose.cc b/gcc/omp-oacc-kernels-decompose.cc index 4386787ba3c5c..ec9b0faab0a0e 100644 --- a/gcc/omp-oacc-kernels-decompose.cc +++ b/gcc/omp-oacc-kernels-decompose.cc @@ -239,7 +239,13 @@ visit_loops_in_gang_single_region (gimple_stmt_iterator *gsi_p, case GIMPLE_OMP_FOR: /*TODO Given the current 'adjust_region_code' algorithm, this is actually... */ +#if 0 gcc_unreachable (); +#else + /* ..., but due to bugs (PR100400), we may actually come here. + Reliably catch this, regardless of checking level. */ + internal_error ("PR100400"); +#endif { tree clauses = gimple_omp_for_clauses (stmt); diff --git a/gcc/opt-suggestions.cc b/gcc/opt-suggestions.cc index 33f298560a1a4..92969e74d4077 100644 --- a/gcc/opt-suggestions.cc +++ b/gcc/opt-suggestions.cc @@ -167,9 +167,9 @@ option_proposer::build_option_suggestions (const char *prefix) add_misspelling_candidates (m_option_suggestions, option, opt_text); + struct cl_option optb; for (int j = 0; sanitizer_opts[j].name != NULL; ++j) { - struct cl_option optb; /* -fsanitize=all is not valid, only -fno-sanitize=all. So don't register the positive misspelling candidates for it. */ diff --git a/gcc/optc-save-gen.awk b/gcc/optc-save-gen.awk index 9911bab6668db..76e9b3cb9402b 100644 --- a/gcc/optc-save-gen.awk +++ b/gcc/optc-save-gen.awk @@ -1013,7 +1013,7 @@ for (i = 0; i < n_target_string; i++) { print " indent, \"\","; print " \"" name "\","; print " ptr1->x_" name " ? ptr1->x_" name " : \"(null)\","; - print " ptr2->x_" name " ? ptr1->x_" name " : \"(null)\");"; + print " ptr2->x_" name " ? ptr2->x_" name " : \"(null)\");"; print ""; } diff --git a/gcc/opts-common.cc b/gcc/opts-common.cc index 1663be1f602a2..9968800921401 100644 --- a/gcc/opts-common.cc +++ b/gcc/opts-common.cc @@ -17,6 +17,7 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see . */ +#define INCLUDE_STRING #include "config.h" #include "system.h" #include "intl.h" @@ -25,6 +26,7 @@ along with GCC; see the file COPYING3. If not see #include "options.h" #include "diagnostic.h" #include "spellcheck.h" +#include "opts-jobserver.h" static void prune_options (struct cl_decoded_option **, unsigned int *); @@ -500,6 +502,7 @@ add_misspelling_candidates (auto_vec *candidates, for (unsigned i = 0; i < ARRAY_SIZE (option_map); i++) { const char *opt0 = option_map[i].opt0; + const char *opt1 = option_map[i].opt1; const char *new_prefix = option_map[i].new_prefix; size_t new_prefix_len = strlen (new_prefix); @@ -508,8 +511,9 @@ add_misspelling_candidates (auto_vec *candidates, if (strncmp (opt_text, new_prefix, new_prefix_len) == 0) { - char *alternative = concat (opt0 + 1, opt_text + new_prefix_len, - NULL); + char *alternative + = concat (opt0 + 1, opt1 ? " " : "", opt1 ? opt1 : "", + opt_text + new_prefix_len, NULL); candidates->safe_push (alternative); } } @@ -2003,3 +2007,55 @@ void prepend_xassembler_to_collect_as_options (const char *collect_as_options, obstack_1grow (o, '\''); } } + +jobserver_info::jobserver_info () +{ + /* Traditionally, GNU make uses opened pipes for jobserver-auth, + e.g. --jobserver-auth=3,4. + Starting with GNU make 4.4, one can use --jobserver-style=fifo + and then named pipe is used: --jobserver-auth=fifo:/tmp/hcsparta. */ + + /* Detect jobserver and drop it if it's not working. */ + string js_needle = "--jobserver-auth="; + string fifo_prefix = "fifo:"; + + const char *envval = getenv ("MAKEFLAGS"); + if (envval != NULL) + { + string makeflags = envval; + size_t n = makeflags.rfind (js_needle); + if (n != string::npos) + { + string ending = makeflags.substr (n + js_needle.size ()); + if (ending.find (fifo_prefix) == 0) + { + ending = ending.substr (fifo_prefix.size ()); + pipe_path = ending.substr (0, ending.find (' ')); + is_active = true; + } + else if (sscanf (makeflags.c_str () + n + js_needle.size (), + "%d,%d", &rfd, &wfd) == 2 + && rfd > 0 + && wfd > 0 + && is_valid_fd (rfd) + && is_valid_fd (wfd)) + is_active = true; + else + { + string dup = makeflags.substr (0, n); + size_t pos = makeflags.find (' ', n); + if (pos != string::npos) + dup += makeflags.substr (pos); + skipped_makeflags = "MAKEFLAGS=" + dup; + error_msg + = "cannot access %<" + js_needle + "%> file descriptors"; + } + } + error_msg = "%<" + js_needle + "%> is not present in %"; + } + else + error_msg = "% environment variable is unset"; + + if (!error_msg.empty ()) + error_msg = "jobserver is not available: " + error_msg; +} diff --git a/gcc/opts-jobserver.h b/gcc/opts-jobserver.h new file mode 100644 index 0000000000000..98ea257996264 --- /dev/null +++ b/gcc/opts-jobserver.h @@ -0,0 +1,46 @@ +/* GNU make's jobserver related functionality. + Copyright (C) 2022 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. + +See dbgcnt.def for usage information. */ + +#ifndef GCC_JOBSERVER_H +#define GCC_JOBSERVER_H + +using namespace std; + +struct jobserver_info +{ + /* Default constructor. */ + jobserver_info (); + + /* Error message if there is a problem. */ + string error_msg = ""; + /* Skipped MAKEFLAGS where --jobserver-auth is skipped. */ + string skipped_makeflags = ""; + /* File descriptor for reading used for jobserver communication. */ + int rfd = -1; + /* File descriptor for writing used for jobserver communication. */ + int wfd = -1; + /* Named pipe path. */ + string pipe_path = ""; + /* Return true if jobserver is active. */ + bool is_active = false; +}; + +#endif /* GCC_JOBSERVER_H */ diff --git a/gcc/opts.cc b/gcc/opts.cc index e5e3119a98057..a97630d1c9ad5 100644 --- a/gcc/opts.cc +++ b/gcc/opts.cc @@ -35,6 +35,9 @@ along with GCC; see the file COPYING3. If not see #include "version.h" #include "selftest.h" +/* In this file all option sets are explicit. */ +#undef OPTION_SET_P + static void set_Wstrict_aliasing (struct gcc_options *opts, int onoff); /* Names of fundamental debug info formats indexed by enum @@ -154,9 +157,9 @@ ctf_debuginfo_p () /* Return TRUE iff dwarf2 debug info is enabled. */ bool -dwarf_debuginfo_p () +dwarf_debuginfo_p (struct gcc_options *opts) { - return (write_symbols & DWARF2_DEBUG); + return (opts->x_write_symbols & DWARF2_DEBUG); } /* Return true iff the debug info format is to be generated based on DWARF @@ -168,6 +171,11 @@ bool dwarf_based_debuginfo_p () || (write_symbols & BTF_DEBUG)); } +/* All flag uses below need to explicitely reference the option sets + to operate on. */ +#define global_options DO_NOT_USE +#define global_options_set DO_NOT_USE + /* Parse the -femit-struct-debug-detailed option value and set the flag variables. */ @@ -1302,58 +1310,84 @@ finish_options (struct gcc_options *opts, struct gcc_options *opts_set, SET_OPTION_IF_UNSET (opts, opts_set, flag_vect_cost_model, VECT_COST_MODEL_CHEAP); - if (flag_gtoggle) + if (opts->x_flag_gtoggle) { /* Make sure to process -gtoggle only once. */ - flag_gtoggle = false; - if (debug_info_level == DINFO_LEVEL_NONE) + opts->x_flag_gtoggle = false; + if (opts->x_debug_info_level == DINFO_LEVEL_NONE) { - debug_info_level = DINFO_LEVEL_NORMAL; + opts->x_debug_info_level = DINFO_LEVEL_NORMAL; - if (write_symbols == NO_DEBUG) - write_symbols = PREFERRED_DEBUGGING_TYPE; + if (opts->x_write_symbols == NO_DEBUG) + opts->x_write_symbols = PREFERRED_DEBUGGING_TYPE; } else - debug_info_level = DINFO_LEVEL_NONE; + opts->x_debug_info_level = DINFO_LEVEL_NONE; } - if (!OPTION_SET_P (debug_nonbind_markers_p)) - debug_nonbind_markers_p - = (optimize - && debug_info_level >= DINFO_LEVEL_NORMAL - && dwarf_debuginfo_p () - && !(flag_selective_scheduling || flag_selective_scheduling2)); - - /* Note -fvar-tracking is enabled automatically with OPT_LEVELS_1_PLUS and - so we need to drop it if we are called from optimize attribute. */ - if (debug_info_level == DINFO_LEVEL_NONE - && !OPTION_SET_P (flag_var_tracking)) - flag_var_tracking = false; + if (!opts_set->x_debug_nonbind_markers_p) + opts->x_debug_nonbind_markers_p + = (opts->x_optimize + && opts->x_debug_info_level >= DINFO_LEVEL_NORMAL + && dwarf_debuginfo_p (opts) + && !(opts->x_flag_selective_scheduling + || opts->x_flag_selective_scheduling2)); + + /* We know which debug output will be used so we can set flag_var_tracking + and flag_var_tracking_uninit if the user has not specified them. */ + if (opts->x_debug_info_level < DINFO_LEVEL_NORMAL + || !dwarf_debuginfo_p (opts) + /* We have not yet initialized debug hooks so match that to check + whether we're only doing DWARF2_LINENO_DEBUGGING_INFO. */ +#ifndef DWARF2_DEBUGGING_INFO + || true +#endif + ) + { + if ((opts_set->x_flag_var_tracking && opts->x_flag_var_tracking == 1) + || (opts_set->x_flag_var_tracking_uninit + && opts->x_flag_var_tracking_uninit == 1)) + { + if (opts->x_debug_info_level < DINFO_LEVEL_NORMAL) + warning_at (UNKNOWN_LOCATION, 0, + "variable tracking requested, but useless unless " + "producing debug info"); + else + warning_at (UNKNOWN_LOCATION, 0, + "variable tracking requested, but not supported " + "by this debug format"); + } + opts->x_flag_var_tracking = 0; + opts->x_flag_var_tracking_uninit = 0; + } /* One could use EnabledBy, but it would lead to a circular dependency. */ - if (!OPTION_SET_P (flag_var_tracking_uninit)) - flag_var_tracking_uninit = flag_var_tracking; + if (!opts_set->x_flag_var_tracking_uninit) + opts->x_flag_var_tracking_uninit = opts->x_flag_var_tracking; - if (!OPTION_SET_P (flag_var_tracking_assignments)) - flag_var_tracking_assignments - = (flag_var_tracking - && !(flag_selective_scheduling || flag_selective_scheduling2)); + if (!opts_set->x_flag_var_tracking_assignments) + opts->x_flag_var_tracking_assignments + = (opts->x_flag_var_tracking + && !(opts->x_flag_selective_scheduling + || opts->x_flag_selective_scheduling2)); - if (flag_var_tracking_assignments_toggle) - flag_var_tracking_assignments = !flag_var_tracking_assignments; + if (opts->x_flag_var_tracking_assignments_toggle) + opts->x_flag_var_tracking_assignments + = !opts->x_flag_var_tracking_assignments; - if (flag_var_tracking_assignments && !flag_var_tracking) - flag_var_tracking = flag_var_tracking_assignments = -1; + if (opts->x_flag_var_tracking_assignments && !opts->x_flag_var_tracking) + opts->x_flag_var_tracking = opts->x_flag_var_tracking_assignments = -1; - if (flag_var_tracking_assignments - && (flag_selective_scheduling || flag_selective_scheduling2)) + if (opts->x_flag_var_tracking_assignments + && (opts->x_flag_selective_scheduling + || opts->x_flag_selective_scheduling2)) warning_at (loc, 0, "var-tracking-assignments changes selective scheduling"); - if (flag_syntax_only) + if (opts->x_flag_syntax_only) { - write_symbols = NO_DEBUG; - profile_flag = 0; + opts->x_write_symbols = NO_DEBUG; + opts->x_profile_flag = 0; } @@ -2167,7 +2201,14 @@ parse_sanitizer_options (const char *p, location_t loc, int scode, flags |= sanitizer_opts[i].flag; } else - flags &= ~sanitizer_opts[i].flag; + { + flags &= ~sanitizer_opts[i].flag; + /* Don't always clear SANITIZE_ADDRESS if it was previously + set: -fsanitize=address -fno-sanitize=kernel-address should + leave SANITIZE_ADDRESS set. */ + if (flags & (SANITIZE_KERNEL_ADDRESS | SANITIZE_USER_ADDRESS)) + flags |= SANITIZE_ADDRESS; + } found = true; break; } diff --git a/gcc/params.opt b/gcc/params.opt index b88e13720057d..e0ff9e210544b 100644 --- a/gcc/params.opt +++ b/gcc/params.opt @@ -1181,7 +1181,7 @@ Common Joined UInteger Var(param_vect_inner_loop_cost_factor) Init(50) IntegerRa The maximum factor which the loop vectorizer applies to the cost of statements in an inner loop relative to the loop being vectorized. -param=vect-induction-float= -Common Joined UInteger Var(param_vect_induction_float) Init(1) IntegerRage(0, 1) Param Optimization +Common Joined UInteger Var(param_vect_induction_float) Init(1) IntegerRange(0, 1) Param Optimization Enable loop vectorization of floating point inductions. -param=vrp1-mode= diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index be2dd57004698..919b700b4d146 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,63 @@ +2024-06-20 Release Manager + + * GCC 12.4.0 released. + +2023-05-08 Release Manager + + * GCC 12.3.0 released. + +2022-10-03 Joseph Myers + + * sv.po: Update. + +2022-09-22 Joseph Myers + + * fr.po: Update. + +2022-08-30 Joseph Myers + + * sv.po: Update. + +2022-08-23 Joseph Myers + + * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, + ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, + zh_TW.po: Update. + +2022-08-19 Release Manager + + * GCC 12.2.0 released. + +2022-08-17 Joseph Myers + + * gcc.pot: Regenerate. + +2022-06-09 Joseph Myers + + * sv.po: Update. + +2022-05-10 Joseph Myers + + * hr.po: Update. + +2022-05-09 Joseph Myers + + * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, + ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, + zh_TW.po: Update. + +2022-05-06 Release Manager + + * GCC 12.1.0 released. + +2022-05-05 Joseph Myers + + * gcc.pot: Regenerate. + +2022-05-03 Joseph Myers + + * sv.po: Update. + 2022-04-26 Joseph Myers * sv.po: Update. diff --git a/gcc/po/be.po b/gcc/po/be.po index 9cb525a7fa3ae..8f3a818eadecf 100644 --- a/gcc/po/be.po +++ b/gcc/po/be.po @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: gcc 3.1\n" "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n" -"POT-Creation-Date: 2022-04-01 17:30+0000\n" +"POT-Creation-Date: 2022-08-17 22:17+0000\n" "PO-Revision-Date: 2002-05-17 15:54+0200\n" "Last-Translator: Ales Nyakhaychyk \n" "Language-Team: Belarusian \n" @@ -308,52 +308,52 @@ msgstr "" msgid "-E or -x required when input is from standard input" msgstr "" -#: config/darwin.h:154 +#: config/darwin.h:151 msgid "conflicting code generation switches" msgstr "" -#: config/darwin.h:159 +#: config/darwin.h:156 msgid "-bundle_loader not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:161 +#: config/darwin.h:158 msgid "-client_name not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:170 +#: config/darwin.h:167 msgid "-keep_private_externs not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:172 +#: config/darwin.h:169 msgid "-private_bundle not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:180 +#: config/darwin.h:177 msgid "-compatibility_version only allowed with -dynamiclib" msgstr "" -#: config/darwin.h:182 +#: config/darwin.h:179 msgid "-current_version only allowed with -dynamiclib" msgstr "" -#: config/darwin.h:184 +#: config/darwin.h:181 msgid "-install_name only allowed with -dynamiclib" msgstr "" -#: config/darwin.h:195 +#: config/darwin.h:192 msgid "-bundle not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:211 +#: config/darwin.h:208 msgid "-force_flat_namespace not allowed with -dynamiclib" msgstr "" -#: config/darwin.h:216 config/darwin.h:614 +#: config/darwin.h:213 config/darwin.h:609 #, fuzzy msgid "gsplit-dwarf is not supported on this platform" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: config/darwin.h:285 +#: config/darwin.h:277 #, fuzzy #| msgid "-pipe is not supported" msgid "rdynamic is not supported" @@ -481,7 +481,7 @@ msgstr "" msgid "consider using `-pg' instead of `-p' with gprof(1)" msgstr "" -#: config/rs6000/rs6000.h:167 +#: config/rs6000/rs6000.h:170 msgid "Missing -mcpu option in ASM_CPU_SPEC?" msgstr "" @@ -3489,225 +3489,230 @@ msgstr "" msgid "Warn from speculative compiles such as __traits(compiles)." msgstr "" -#: d/lang.opt:155 +#: d/lang.opt:151 #, no-c-format msgid "Generate JSON file." msgstr "" -#: d/lang.opt:159 +#: d/lang.opt:155 #, no-c-format msgid "-Xf \tWrite JSON output to the given ." msgstr "" -#: d/lang.opt:163 +#: d/lang.opt:159 #, no-c-format msgid "Debug library to use instead of phobos." msgstr "" -#: d/lang.opt:167 +#: d/lang.opt:163 #, no-c-format msgid "Default library to use instead of phobos." msgstr "" -#: d/lang.opt:171 +#: d/lang.opt:167 #, no-c-format msgid "Do link the standard D startup files in the compilation." msgstr "" -#: d/lang.opt:178 +#: d/lang.opt:174 #, fuzzy, no-c-format msgid "Generate code for all template instantiations." msgstr "Генерыраваць код для Intel as" -#: d/lang.opt:182 +#: d/lang.opt:178 #, fuzzy, no-c-format msgid "Generate code for assert contracts." msgstr "Генерыраваць код для Intel as" -#: d/lang.opt:190 +#: d/lang.opt:186 #, no-c-format msgid "-fbounds-check=[on|safeonly|off]\tTurn array bounds checks on, in @safe code only, or off." msgstr "" -#: d/lang.opt:232 +#: d/lang.opt:228 #, no-c-format msgid "-fcheckaction=[throw,halt,context]\tBehavior on contract failure." msgstr "" -#: d/lang.opt:248 +#: d/lang.opt:244 #, no-c-format msgid "Compile in debug code." msgstr "" -#: d/lang.opt:252 +#: d/lang.opt:248 #, no-c-format msgid "-fdebug=\tCompile in debug code, code <= , or code identified by ." msgstr "" -#: d/lang.opt:256 +#: d/lang.opt:252 #, fuzzy, no-c-format #| msgid "Generate ELF output" msgid "Generate documentation." msgstr "Стварыць ELF-вывад" -#: d/lang.opt:260 +#: d/lang.opt:256 #, no-c-format msgid "-fdoc-dir=\tWrite documentation file to directory ." msgstr "" -#: d/lang.opt:264 +#: d/lang.opt:260 #, no-c-format msgid "-fdoc-file=\tWrite documentation to ." msgstr "" -#: d/lang.opt:268 +#: d/lang.opt:264 #, no-c-format msgid "-fdoc-inc=\tInclude a Ddoc macro ." msgstr "" -#: d/lang.opt:272 +#: d/lang.opt:268 #, no-c-format msgid "Assume that standard D runtime libraries and \"D main\" exist." msgstr "" -#: d/lang.opt:276 +#: d/lang.opt:272 #, no-c-format msgid "Add comments for ignored declarations in the generated C++ header." msgstr "" -#: d/lang.opt:280 +#: d/lang.opt:276 #, no-c-format msgid "-fdump-cxx-spec=\tWrite all declarations as C++ code to ." msgstr "" -#: d/lang.opt:284 +#: d/lang.opt:280 #, no-c-format msgid "Display the frontend AST after parsing and semantic passes." msgstr "" -#: d/lang.opt:288 +#: d/lang.opt:284 #, no-c-format msgid "-fextern-std=\tSet C++ name mangling compatibility with ." msgstr "" -#: d/lang.opt:313 +#: d/lang.opt:309 #, fuzzy, no-c-format #| msgid "unsupported version" msgid "Ignore unsupported pragmas." msgstr "непадтрымліваемая версія" -#: d/lang.opt:317 +#: d/lang.opt:313 #, fuzzy, no-c-format msgid "Generate code for class invariant contracts." msgstr "Генерыраваць код для Intel as" -#: d/lang.opt:321 +#: d/lang.opt:317 #, no-c-format msgid "Generate a default D main() function when compiling." msgstr "" -#: d/lang.opt:325 +#: d/lang.opt:321 #, no-c-format msgid "-fmodule-file==\tuse as source file for ." msgstr "" -#: d/lang.opt:329 +#: d/lang.opt:325 #, no-c-format msgid "Generate ModuleInfo struct for output module." msgstr "" -#: d/lang.opt:333 +#: d/lang.opt:329 #, no-c-format msgid "Process all modules specified on the command line, but only generate code for the module specified by the argument." msgstr "" -#: d/lang.opt:337 +#: d/lang.opt:333 #, fuzzy, no-c-format #| msgid "Generate code for Intel as" msgid "Generate code for postcondition contracts." msgstr "Генерыраваць код для Intel as" -#: d/lang.opt:341 +#: d/lang.opt:337 #, fuzzy, no-c-format #| msgid "Generate code for Intel as" msgid "Generate code for precondition contracts." msgstr "Генерыраваць код для Intel as" -#: d/lang.opt:345 +#: d/lang.opt:341 #, no-c-format msgid "Turn on all upcoming D language features." msgstr "" -#: d/lang.opt:349 +#: d/lang.opt:345 #, no-c-format msgid "Implement DIP1000: Scoped pointers." msgstr "" -#: d/lang.opt:353 +#: d/lang.opt:349 #, no-c-format msgid "Implement DIP1008: Allow exceptions in @nogc code." msgstr "" -#: d/lang.opt:357 +#: d/lang.opt:353 #, no-c-format msgid "Implement DIP1021: Mutable function arguments." msgstr "" -#: d/lang.opt:361 +#: d/lang.opt:357 #, no-c-format msgid "Implement DIP25: Sealed references." msgstr "" -#: d/lang.opt:365 +#: d/lang.opt:361 #, no-c-format msgid "Destruct fields of partially constructed objects." msgstr "" -#: d/lang.opt:369 +#: d/lang.opt:365 #, no-c-format msgid "Use field-wise comparisons for struct equality." msgstr "" -#: d/lang.opt:373 +#: d/lang.opt:369 #, no-c-format msgid "When a symbol is resolved, check `alias this' scope before going to upper scopes." msgstr "" -#: d/lang.opt:377 +#: d/lang.opt:373 #, no-c-format msgid "Implement 'in' parameters to mean scope const." msgstr "" -#: d/lang.opt:381 +#: d/lang.opt:377 #, no-c-format msgid "Implement 'in' contracts of overridden methods to be a superset of parent contract." msgstr "" -#: d/lang.opt:385 +#: d/lang.opt:381 #, no-c-format msgid "Disable access to shared memory objects." msgstr "" -#: d/lang.opt:389 +#: d/lang.opt:385 #, no-c-format msgid "Enable rvalue arguments to ref parameters." msgstr "" -#: d/lang.opt:393 +#: d/lang.opt:389 #, no-c-format msgid "Allow use of '=>' for methods and top-level functions in addition to lambdas." msgstr "" -#: d/lang.opt:397 +#: d/lang.opt:393 #, no-c-format msgid "Compile release version." msgstr "" -#: d/lang.opt:401 +#: d/lang.opt:397 #, no-c-format msgid "Turn off all revertable D language features." msgstr "" +#: d/lang.opt:401 +#, no-c-format +msgid "Revert DIP1000: Scoped pointers." +msgstr "" + #: d/lang.opt:405 #, no-c-format msgid "Revert DIP25: Sealed references." @@ -5698,7 +5703,7 @@ msgstr "" msgid "Specify bit size of immediate TLS offsets." msgstr "" -#: config/ia64/ia64.opt:122 config/i386/i386.opt:523 config/s390/s390.opt:200 +#: config/ia64/ia64.opt:122 config/i386/i386.opt:523 config/s390/s390.opt:203 #: config/sparc/sparc.opt:146 config/visium/visium.opt:49 #, fuzzy, no-c-format #| msgid "Generate code for given CPU" @@ -5882,7 +5887,7 @@ msgstr "" msgid "Target the software simulator." msgstr "" -#: config/ft32/ft32.opt:27 config/s390/s390.opt:231 config/mips/mips.opt:393 +#: config/ft32/ft32.opt:27 config/s390/s390.opt:234 config/mips/mips.opt:393 #: config/arc/arc.opt:400 #, no-c-format msgid "Use LRA instead of reload." @@ -6202,14 +6207,14 @@ msgstr "" msgid "Use 80-bit long double." msgstr "" -#: config/i386/i386.opt:214 config/s390/s390.opt:160 +#: config/i386/i386.opt:214 config/s390/s390.opt:163 #: config/sparc/long-double-switch.opt:27 config/alpha/alpha.opt:102 #, fuzzy, no-c-format #| msgid "Use 64 bit float" msgid "Use 64-bit long double." msgstr "Выкарыстоўваць 64-х бітны float" -#: config/i386/i386.opt:218 config/s390/s390.opt:156 +#: config/i386/i386.opt:218 config/s390/s390.opt:159 #: config/sparc/long-double-switch.opt:23 config/alpha/alpha.opt:98 #, no-c-format msgid "Use 128-bit long double." @@ -6924,7 +6929,7 @@ msgstr "" msgid "Generate __mcount_loc section with all mcount or __fentry__ calls." msgstr "" -#: config/i386/i386.opt:958 config/s390/s390.opt:308 +#: config/i386/i386.opt:958 config/s390/s390.opt:311 #, no-c-format msgid "Generate mcount/__fentry__ calls as nops. To activate they need to be patched in." msgstr "" @@ -7019,7 +7024,7 @@ msgstr "" msgid "Convert function return to call and return thunk." msgstr "" -#: config/i386/i386.opt:1073 config/s390/s390.opt:274 +#: config/i386/i386.opt:1073 config/s390/s390.opt:277 #, no-c-format msgid "Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options):" msgstr "" @@ -7149,6 +7154,11 @@ msgstr "" msgid "Do not use GOT to access external symbols." msgstr "" +#: config/i386/i386.opt:1216 +#, no-c-format +msgid "Instructions number above which STFL stall penalty can be compensated." +msgstr "" + #: config/pa/pa64-hpux.opt:23 #, no-c-format msgid "Assume code will be linked by GNU ld." @@ -7491,27 +7501,27 @@ msgstr "" msgid "Generate code for OpenMP offloading: enables -msoft-stack and -muniform-simt." msgstr "" -#: config/nvptx/nvptx.opt:58 +#: config/nvptx/nvptx.opt:57 #, no-c-format msgid "Specify the PTX ISA target architecture to use." msgstr "" -#: config/nvptx/nvptx.opt:62 +#: config/nvptx/nvptx.opt:61 #, no-c-format msgid "Alias:" msgstr "" -#: config/nvptx/nvptx.opt:117 +#: config/nvptx/nvptx.opt:116 #, no-c-format msgid "Known PTX ISA versions (for use with the -mptx= option):" msgstr "" -#: config/nvptx/nvptx.opt:136 +#: config/nvptx/nvptx.opt:135 #, no-c-format msgid "Specify the PTX ISA version to use." msgstr "" -#: config/nvptx/nvptx.opt:140 +#: config/nvptx/nvptx.opt:139 #, no-c-format msgid "Initialize ptx registers." msgstr "" @@ -7810,164 +7820,164 @@ msgstr "" msgid "64 bit ABI." msgstr "" -#: config/s390/s390.opt:126 +#: config/s390/s390.opt:129 #, no-c-format msgid "Maintain backchain pointer." msgstr "" -#: config/s390/s390.opt:130 +#: config/s390/s390.opt:133 #, no-c-format msgid "Additional debug prints." msgstr "" -#: config/s390/s390.opt:134 +#: config/s390/s390.opt:137 #, no-c-format msgid "ESA/390 architecture." msgstr "" -#: config/s390/s390.opt:138 +#: config/s390/s390.opt:141 #, no-c-format msgid "Enable decimal floating point hardware support." msgstr "" -#: config/s390/s390.opt:142 +#: config/s390/s390.opt:145 #, fuzzy, no-c-format #| msgid "Use hardware floating point" msgid "Enable hardware floating point." msgstr "Выкарыстоўваць апаратную \"плаваючую кропку\"" -#: config/s390/s390.opt:146 +#: config/s390/s390.opt:149 #, no-c-format msgid "Takes two non-negative integer numbers separated by a comma. Prepend the function label with the number of two-byte Nop instructions indicated by the first. Append Nop instructions covering the number of halfwords indicated by the second after the label. Nop instructions of the largest possible size are used (six, four or two bytes), beginning with the largest possible size. Using 0 for both values disables hotpatching." msgstr "" -#: config/s390/s390.opt:164 +#: config/s390/s390.opt:167 #, no-c-format msgid "Use hardware transactional execution instructions." msgstr "" -#: config/s390/s390.opt:168 +#: config/s390/s390.opt:171 #, no-c-format msgid "Use hardware vector facility instructions and enable the vector ABI." msgstr "" -#: config/s390/s390.opt:172 +#: config/s390/s390.opt:175 #, no-c-format msgid "Use packed stack layout." msgstr "" -#: config/s390/s390.opt:176 +#: config/s390/s390.opt:179 #, no-c-format msgid "Use bras for executable < 64k." msgstr "" -#: config/s390/s390.opt:180 +#: config/s390/s390.opt:183 #, fuzzy, no-c-format #| msgid "Use hardware floating point" msgid "Disable hardware floating point." msgstr "Выкарыстоўваць апаратную \"плаваючую кропку\"" -#: config/s390/s390.opt:184 +#: config/s390/s390.opt:187 #, no-c-format msgid "Set the max. number of bytes which has to be left to stack size before a trap instruction is triggered." msgstr "" -#: config/s390/s390.opt:188 +#: config/s390/s390.opt:191 #, no-c-format msgid "Switches off the -mstack-guard= option." msgstr "" -#: config/s390/s390.opt:192 +#: config/s390/s390.opt:195 #, no-c-format msgid "Emit extra code in the function prologue in order to trap if the stack size exceeds the given limit." msgstr "" -#: config/s390/s390.opt:196 +#: config/s390/s390.opt:199 #, no-c-format msgid "Switches off the -mstack-size= option." msgstr "" -#: config/s390/s390.opt:204 +#: config/s390/s390.opt:207 #, no-c-format msgid "Use the mvcle instruction for block moves." msgstr "" -#: config/s390/s390.opt:208 +#: config/s390/s390.opt:211 #, no-c-format msgid "Enable the z vector language extension providing the context-sensitive vector macro and enable the Altivec-style builtins in vecintrin.h." msgstr "" -#: config/s390/s390.opt:213 +#: config/s390/s390.opt:216 #, no-c-format msgid "Warn if a function uses alloca or creates an array with dynamic size." msgstr "" -#: config/s390/s390.opt:217 +#: config/s390/s390.opt:220 #, no-c-format msgid "Warn if a single function's framesize exceeds the given framesize." msgstr "" -#: config/s390/s390.opt:221 +#: config/s390/s390.opt:224 #, no-c-format msgid "z/Architecture." msgstr "" -#: config/s390/s390.opt:225 +#: config/s390/s390.opt:228 #, no-c-format msgid "Set the branch costs for conditional branch instructions. Reasonable values are small, non-negative integers. The default branch cost is 1." msgstr "" -#: config/s390/s390.opt:235 config/arm/arm.opt:169 +#: config/s390/s390.opt:238 config/arm/arm.opt:169 #, no-c-format msgid "Assume data segments are relative to text segment." msgstr "" -#: config/s390/s390.opt:240 +#: config/s390/s390.opt:243 #, no-c-format msgid "Wrap all indirect branches into execute in order to disable branch prediction." msgstr "" -#: config/s390/s390.opt:245 +#: config/s390/s390.opt:248 #, no-c-format msgid "Wrap indirect table jumps and computed gotos into execute in order to disable branch prediction. Using thunk or thunk-extern with this option requires the thunks to be considered signal handlers to order to generate correct CFI. For environments where unwinding (e.g. for exceptions) is required please use thunk-inline instead." msgstr "" -#: config/s390/s390.opt:253 +#: config/s390/s390.opt:256 #, no-c-format msgid "Wrap all indirect calls into execute in order to disable branch prediction." msgstr "" -#: config/s390/s390.opt:257 +#: config/s390/s390.opt:260 #, no-c-format msgid "Wrap all indirect return branches into execute in order to disable branch prediction." msgstr "" -#: config/s390/s390.opt:262 +#: config/s390/s390.opt:265 #, no-c-format msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address is going to be restored from memory." msgstr "" -#: config/s390/s390.opt:268 +#: config/s390/s390.opt:271 #, no-c-format msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address doesn't need to be restored from memory." msgstr "" -#: config/s390/s390.opt:290 +#: config/s390/s390.opt:293 #, no-c-format msgid "Generate sections .s390_indirect_jump, .s390_indirect_call, .s390_return_reg, and .s390_return_mem to contain the indirect branch locations which have been patched as part of using one of the -mindirect-branch* or -mfunction-return* options. The sections consist of an array of 32 bit elements. Each entry holds the offset from the entry to the patched location." msgstr "" -#: config/s390/s390.opt:299 +#: config/s390/s390.opt:302 #, no-c-format msgid "Emit profiling counter call at function entry before prologue. The compiled code will require a 64-bit CPU and glibc 2.29 or newer to run." msgstr "" -#: config/s390/s390.opt:304 +#: config/s390/s390.opt:307 #, no-c-format msgid "Generate __mcount_loc section with all _mcount and __fentry__ calls." msgstr "" -#: config/s390/s390.opt:313 +#: config/s390/s390.opt:316 #, no-c-format msgid "Emit fused multiply-add instructions for long doubles in vector registers (wfmaxb, wfmsxb, wfnmaxb, wfnmsxb). Reassociation pass does not handle fused multiply-adds, therefore code generated by the middle-end is prone to having long fused multiply-add chains. This is not pipeline-friendly, and the default behavior is to emit separate multiplication and addition instructions for long doubles in vector registers, because measurements show that this improves performance. This option allows overriding it for testing purposes." msgstr "" @@ -12633,7 +12643,7 @@ msgstr "" #: common.opt:422 #, no-c-format -msgid "Alias for --help=target." +msgid "Display target specific command line options (including assembler and linker options)." msgstr "" #: common.opt:468 @@ -16835,12 +16845,12 @@ msgstr "" #. PRINT_OPERAND must handle them. #. We can't handle floating point constants; #. TARGET_PRINT_OPERAND must handle them. -#: final.cc:3774 config/arc/arc.cc:6409 config/i386/i386.cc:12275 +#: final.cc:3774 config/arc/arc.cc:6409 config/i386/i386.cc:12249 #, c-format msgid "floating constant misused" msgstr "" -#: final.cc:3832 config/arc/arc.cc:6506 config/i386/i386.cc:12366 +#: final.cc:3832 config/arc/arc.cc:6506 config/i386/i386.cc:12340 #: config/pdp11/pdp11.cc:1872 #, c-format msgid "invalid expression as operand" @@ -16917,211 +16927,209 @@ msgid " --help Display this information.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" #: gcc.cc:3761 -#, fuzzy -#| msgid " --help Display this information\n" -msgid " --target-help Display target specific command line options.\n" -msgstr " --help Адлюстраваць гэту інфармацыю\n" +msgid " --target-help Display target specific command line options (including assembler and linker options).\n" +msgstr "" -#: gcc.cc:3762 +#: gcc.cc:3763 msgid " --help={common|optimizers|params|target|warnings|[^]{joined|separate|undocumented}}[,...].\n" msgstr "" -#: gcc.cc:3763 +#: gcc.cc:3764 #, fuzzy #| msgid " --help Display this information\n" msgid " Display specific types of command line options.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" -#: gcc.cc:3765 +#: gcc.cc:3766 msgid " (Use '-v --help' to display command line options of sub-processes).\n" msgstr "" -#: gcc.cc:3766 +#: gcc.cc:3767 #, fuzzy #| msgid " --help Display this information\n" msgid " --version Display compiler version information.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" -#: gcc.cc:3767 +#: gcc.cc:3768 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -dumpspecs Display all of the built in spec strings.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3768 +#: gcc.cc:3769 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -dumpversion Display the version of the compiler.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3769 +#: gcc.cc:3770 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -dumpmachine Display the compiler's target processor.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3770 +#: gcc.cc:3771 msgid " -foffload= Specify offloading targets.\n" msgstr "" -#: gcc.cc:3771 +#: gcc.cc:3772 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -print-search-dirs Display the directories in the compiler's search path.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3772 +#: gcc.cc:3773 msgid " -print-libgcc-file-name Display the name of the compiler's companion library.\n" msgstr "" -#: gcc.cc:3773 +#: gcc.cc:3774 msgid " -print-file-name= Display the full path to library .\n" msgstr "" -#: gcc.cc:3774 +#: gcc.cc:3775 msgid " -print-prog-name= Display the full path to compiler component .\n" msgstr "" -#: gcc.cc:3775 +#: gcc.cc:3776 msgid "" " -print-multiarch Display the target's normalized GNU triplet, used as\n" " a component in the library path.\n" msgstr "" -#: gcc.cc:3778 +#: gcc.cc:3779 msgid " -print-multi-directory Display the root directory for versions of libgcc.\n" msgstr "" -#: gcc.cc:3779 +#: gcc.cc:3780 msgid "" " -print-multi-lib Display the mapping between command line options and\n" " multiple library search directories.\n" msgstr "" -#: gcc.cc:3782 +#: gcc.cc:3783 msgid " -print-multi-os-directory Display the relative path to OS libraries.\n" msgstr "" -#: gcc.cc:3783 +#: gcc.cc:3784 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -print-sysroot Display the target libraries directory.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3784 +#: gcc.cc:3785 msgid " -print-sysroot-headers-suffix Display the sysroot suffix used to find headers.\n" msgstr "" -#: gcc.cc:3785 +#: gcc.cc:3786 msgid " -Wa, Pass comma-separated on to the assembler.\n" msgstr "" -#: gcc.cc:3786 +#: gcc.cc:3787 msgid " -Wp, Pass comma-separated on to the preprocessor.\n" msgstr "" -#: gcc.cc:3787 +#: gcc.cc:3788 msgid " -Wl, Pass comma-separated on to the linker.\n" msgstr "" -#: gcc.cc:3788 +#: gcc.cc:3789 msgid " -Xassembler Pass on to the assembler.\n" msgstr "" -#: gcc.cc:3789 +#: gcc.cc:3790 msgid " -Xpreprocessor Pass on to the preprocessor.\n" msgstr "" -#: gcc.cc:3790 +#: gcc.cc:3791 msgid " -Xlinker Pass on to the linker.\n" msgstr "" -#: gcc.cc:3791 +#: gcc.cc:3792 #, fuzzy msgid " -save-temps Do not delete intermediate files.\n" msgstr " -o <файл> Памясціць вывад у <файл>\n" -#: gcc.cc:3792 +#: gcc.cc:3793 msgid " -save-temps= Do not delete intermediate files.\n" msgstr "" -#: gcc.cc:3793 +#: gcc.cc:3794 msgid "" " -no-canonical-prefixes Do not canonicalize paths when building relative\n" " prefixes to other gcc components.\n" msgstr "" -#: gcc.cc:3796 +#: gcc.cc:3797 #, fuzzy #| msgid " --help Display this information\n" msgid " -pipe Use pipes rather than intermediate files.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" -#: gcc.cc:3797 +#: gcc.cc:3798 msgid " -time Time the execution of each subprocess.\n" msgstr "" -#: gcc.cc:3798 +#: gcc.cc:3799 #, fuzzy msgid " -specs= Override built-in specs with the contents of .\n" msgstr " -o <файл> Памясціць вывад у <файл>\n" -#: gcc.cc:3799 +#: gcc.cc:3800 msgid " -std= Assume that the input sources are for .\n" msgstr "" -#: gcc.cc:3800 +#: gcc.cc:3801 msgid "" " --sysroot= Use as the root directory for headers\n" " and libraries.\n" msgstr "" -#: gcc.cc:3803 +#: gcc.cc:3804 msgid " -B Add to the compiler's search paths.\n" msgstr "" -#: gcc.cc:3804 +#: gcc.cc:3805 #, fuzzy #| msgid " -dumpversion Display the version of the compiler\n" msgid " -v Display the programs invoked by the compiler.\n" msgstr " -dumpversion Адлюстраваць версію кампілятара\n" -#: gcc.cc:3805 +#: gcc.cc:3806 msgid " -### Like -v but options quoted and commands not executed.\n" msgstr "" -#: gcc.cc:3806 +#: gcc.cc:3807 msgid " -E Preprocess only; do not compile, assemble or link.\n" msgstr "" -#: gcc.cc:3807 +#: gcc.cc:3808 msgid " -S Compile only; do not assemble or link.\n" msgstr "" -#: gcc.cc:3808 +#: gcc.cc:3809 #, fuzzy msgid " -c Compile and assemble, but do not link.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" -#: gcc.cc:3809 +#: gcc.cc:3810 #, fuzzy #| msgid " -o Place the output into \n" msgid " -o Place the output into .\n" msgstr " -o <файл> Памясціць вывад у <файл>\n" -#: gcc.cc:3810 +#: gcc.cc:3811 msgid "" " -pie Create a dynamically linked position independent\n" " executable.\n" msgstr "" -#: gcc.cc:3812 +#: gcc.cc:3813 #, fuzzy #| msgid " --help Display this information\n" msgid " -shared Create a shared library.\n" msgstr " --help Адлюстраваць гэту інфармацыю\n" -#: gcc.cc:3813 +#: gcc.cc:3814 msgid "" " -x Specify the language of the following input files.\n" " Permissible languages include: c c++ assembler none\n" @@ -17129,7 +17137,7 @@ msgid "" " guessing the language based on the file's extension.\n" msgstr "" -#: gcc.cc:3820 +#: gcc.cc:3821 #, c-format msgid "" "\n" @@ -17138,80 +17146,80 @@ msgid "" " other options on to these processes the -W options must be used.\n" msgstr "" -#: gcc.cc:6789 +#: gcc.cc:6790 #, c-format msgid "Processing spec (%s), which is '%s'\n" msgstr "" -#: gcc.cc:7550 +#: gcc.cc:7551 #, fuzzy, c-format #| msgid "libraries: %s\n" msgid "Target: %s\n" msgstr "бібліятэкі: %s\n" -#: gcc.cc:7551 +#: gcc.cc:7552 #, c-format msgid "Configured with: %s\n" msgstr "" -#: gcc.cc:7565 +#: gcc.cc:7566 #, c-format msgid "Thread model: %s\n" msgstr "" -#: gcc.cc:7566 +#: gcc.cc:7567 #, c-format msgid "Supported LTO compression algorithms: zlib" msgstr "" -#: gcc.cc:7568 +#: gcc.cc:7569 #, c-format msgid " zstd" msgstr "" -#: gcc.cc:7570 gcov.cc:1510 gcov.cc:1568 gcov.cc:1580 gcov.cc:2894 +#: gcc.cc:7571 gcov.cc:1510 gcov.cc:1568 gcov.cc:1580 gcov.cc:2894 #, fuzzy, c-format #| msgid ":\n" msgid "\n" msgstr ":\n" -#: gcc.cc:7581 +#: gcc.cc:7582 #, fuzzy, c-format #| msgid "gcc version %s\n" msgid "gcc version %s %s\n" msgstr "версія gcc %s\n" -#: gcc.cc:7584 +#: gcc.cc:7585 #, c-format msgid "gcc driver version %s %sexecuting gcc version %s\n" msgstr "" -#: gcc.cc:7657 gcc.cc:7867 +#: gcc.cc:7658 gcc.cc:7868 #, c-format msgid "The bug is not reproducible, so it is likely a hardware or OS problem.\n" msgstr "" -#: gcc.cc:7791 +#: gcc.cc:7792 #, c-format msgid "Preprocessed source stored into %s file, please attach this to your bugreport.\n" msgstr "" -#: gcc.cc:8642 +#: gcc.cc:8643 #, c-format msgid "install: %s%s\n" msgstr "" -#: gcc.cc:8645 +#: gcc.cc:8646 #, c-format msgid "programs: %s\n" msgstr "праграмы: %s\n" -#: gcc.cc:8647 +#: gcc.cc:8648 #, c-format msgid "libraries: %s\n" msgstr "бібліятэкі: %s\n" -#: gcc.cc:8764 +#: gcc.cc:8765 #, c-format msgid "" "\n" @@ -17220,16 +17228,16 @@ msgstr "" "\n" "Інструкцыі для паведамленняў аб памылках глядзіце тут:\n" -#: gcc.cc:8780 gcov-tool.cc:527 +#: gcc.cc:8781 gcov-tool.cc:527 #, c-format msgid "%s %s%s\n" msgstr "" -#: gcc.cc:8783 gcov-tool.cc:529 gcov.cc:968 fortran/gfortranspec.cc:282 +#: gcc.cc:8784 gcov-tool.cc:529 gcov.cc:968 fortran/gfortranspec.cc:282 msgid "(C)" msgstr "" -#: gcc.cc:8784 gcov-tool.cc:531 gcov.cc:970 fortran/gfortranspec.cc:283 +#: gcc.cc:8785 gcov-tool.cc:531 gcov.cc:970 fortran/gfortranspec.cc:283 #, c-format msgid "" "This is free software; see the source for copying conditions. There is NO\n" @@ -17237,7 +17245,7 @@ msgid "" "\n" msgstr "" -#: gcc.cc:9127 +#: gcc.cc:9128 #, c-format msgid "" "\n" @@ -17246,14 +17254,14 @@ msgid "" "\n" msgstr "" -#: gcc.cc:9128 +#: gcc.cc:9129 #, c-format msgid "" "Use \"-Wl,OPTION\" to pass \"OPTION\" to the linker.\n" "\n" msgstr "" -#: gcc.cc:10543 +#: gcc.cc:10544 #, c-format msgid "" "Assembler options\n" @@ -17261,7 +17269,7 @@ msgid "" "\n" msgstr "" -#: gcc.cc:10544 +#: gcc.cc:10545 #, c-format msgid "" "Use \"-Wa,OPTION\" to pass \"OPTION\" to the assembler.\n" @@ -17837,28 +17845,28 @@ msgstr "" msgid "At top level:" msgstr "" -#: langhooks.cc:400 cp/error.cc:3623 +#: langhooks.cc:400 cp/error.cc:3631 #, fuzzy, c-format msgid "In member function %qs" msgstr "у функцыі \"%s\":" -#: langhooks.cc:404 cp/error.cc:3626 +#: langhooks.cc:404 cp/error.cc:3634 #, fuzzy, c-format #| msgid "In function `%s':" msgid "In function %qs" msgstr "у функцыі \"%s\":" -#: langhooks.cc:449 cp/error.cc:3576 +#: langhooks.cc:449 cp/error.cc:3584 msgid " inlined from %qs at %r%s:%d:%d%R" msgstr "" -#: langhooks.cc:454 cp/error.cc:3581 +#: langhooks.cc:454 cp/error.cc:3589 #, fuzzy #| msgid "In file included from %s:%d" msgid " inlined from %qs at %r%s:%d%R" msgstr "У файле уключаным з %s:%d" -#: langhooks.cc:460 cp/error.cc:3587 +#: langhooks.cc:460 cp/error.cc:3595 #, fuzzy, c-format #| msgid "In file included from %s:%d" msgid " inlined from %qs" @@ -17877,118 +17885,118 @@ msgid "unable to generate reloads for:" msgstr "" #. What to print when a switch has no documentation. -#: opts.cc:313 +#: opts.cc:321 msgid "This option lacks documentation." msgstr "" -#: opts.cc:314 +#: opts.cc:322 msgid "Uses of this option are diagnosed." msgstr "" -#: opts.cc:1584 +#: opts.cc:1618 #, c-format msgid "Same as %s%s (or, in negated form, %s%s)." msgstr "" -#: opts.cc:1589 +#: opts.cc:1623 #, c-format msgid "Same as %s%s." msgstr "" -#: opts.cc:1594 +#: opts.cc:1628 #, c-format msgid "Same as %s." msgstr "" -#: opts.cc:1602 +#: opts.cc:1636 #, c-format msgid "%s Same as %s." msgstr "" -#: opts.cc:1665 +#: opts.cc:1699 msgid "[available in " msgstr "" -#: opts.cc:1697 +#: opts.cc:1731 msgid "[default]" msgstr "" -#: opts.cc:1706 +#: opts.cc:1740 #, c-format msgid "%llu bytes" msgstr "" -#: opts.cc:1743 +#: opts.cc:1777 msgid "[enabled]" msgstr "" -#: opts.cc:1745 +#: opts.cc:1779 msgid "[disabled]" msgstr "" -#: opts.cc:1781 +#: opts.cc:1815 #, c-format msgid " No options with the desired characteristics were found\n" msgstr "" -#: opts.cc:1790 +#: opts.cc:1824 #, c-format msgid " None found. Use --help=%s to show *all* the options supported by the %s front-end.\n" msgstr "" -#: opts.cc:1796 +#: opts.cc:1830 #, c-format msgid " All options with the desired characteristics have already been displayed\n" msgstr "" -#: opts.cc:1841 +#: opts.cc:1875 #, fuzzy, c-format msgid "" " Known valid arguments for %s option:\n" " " msgstr "нявернае выкарыстанне \"restict\"" -#: opts.cc:1891 +#: opts.cc:1925 msgid "The following options are target specific" msgstr "" -#: opts.cc:1894 +#: opts.cc:1928 msgid "The following options control compiler warning messages" msgstr "" -#: opts.cc:1897 +#: opts.cc:1931 msgid "The following options control optimizations" msgstr "" -#: opts.cc:1900 opts.cc:1940 +#: opts.cc:1934 opts.cc:1974 msgid "The following options are language-independent" msgstr "" -#: opts.cc:1903 +#: opts.cc:1937 msgid "The following options control parameters" msgstr "" -#: opts.cc:1909 +#: opts.cc:1943 msgid "The following options are specific to just the language " msgstr "" -#: opts.cc:1911 +#: opts.cc:1945 msgid "The following options are supported by the language " msgstr "" -#: opts.cc:1922 +#: opts.cc:1956 msgid "The following options are not documented" msgstr "" -#: opts.cc:1924 +#: opts.cc:1958 msgid "The following options take separate arguments" msgstr "" -#: opts.cc:1926 +#: opts.cc:1960 msgid "The following options take joined arguments" msgstr "" -#: opts.cc:1938 +#: opts.cc:1972 msgid "The following options are language-related" msgstr "" @@ -18044,16 +18052,16 @@ msgstr "нераспазнаны выбар \"-%s\"" msgid "insn does not satisfy its constraints:" msgstr "" -#: targhooks.cc:2157 +#: targhooks.cc:2236 #, c-format msgid "created and used with differing settings of '%s'" msgstr "" -#: targhooks.cc:2172 +#: targhooks.cc:2251 msgid "created and used with different settings of %<-fpic%>" msgstr "" -#: targhooks.cc:2174 +#: targhooks.cc:2253 msgid "created and used with different settings of %<-fpie%>" msgstr "" @@ -18449,7 +18457,7 @@ msgstr "" msgid "incompatible register operand for '%%%c'" msgstr "нерэчаісная назва рэгістра `%s'" -#: config/aarch64/aarch64.cc:11907 config/arm/arm.cc:24475 +#: config/aarch64/aarch64.cc:11907 config/arm/arm.cc:24483 #, fuzzy, c-format msgid "missing operand" msgstr "прапушчан ініцыялізатар" @@ -18476,25 +18484,25 @@ msgstr "Нерэчаісны выбар \"%s\"" msgid "invalid address mode" msgstr "нерэчаісны адрас" -#: config/aarch64/aarch64.cc:26825 config/arm/arm.cc:33897 +#: config/aarch64/aarch64.cc:26831 config/arm/arm.cc:33905 msgid "invalid conversion from type %" msgstr "" -#: config/aarch64/aarch64.cc:26827 config/arm/arm.cc:33899 +#: config/aarch64/aarch64.cc:26833 config/arm/arm.cc:33907 msgid "invalid conversion to type %" msgstr "" -#: config/aarch64/aarch64.cc:26842 config/aarch64/aarch64.cc:26858 -#: config/arm/arm.cc:33914 config/arm/arm.cc:33930 +#: config/aarch64/aarch64.cc:26848 config/aarch64/aarch64.cc:26864 +#: config/arm/arm.cc:33922 config/arm/arm.cc:33938 msgid "operation not permitted on type %" msgstr "" -#: config/aarch64/aarch64.cc:26866 +#: config/aarch64/aarch64.cc:26872 msgid "cannot combine GNU and SVE vectors in a binary operation" msgstr "" -#: config/alpha/alpha.cc:5076 config/i386/i386.cc:13535 -#: config/rs6000/rs6000.cc:14278 config/sparc/sparc.cc:9357 +#: config/alpha/alpha.cc:5076 config/i386/i386.cc:13509 +#: config/rs6000/rs6000.cc:14270 config/sparc/sparc.cc:9369 #, c-format msgid "'%%&' used without any local dynamic TLS references" msgstr "" @@ -18511,18 +18519,18 @@ msgid "invalid %%r value" msgstr "нерэчаіснае значэньне %%r" #: config/alpha/alpha.cc:5174 config/ia64/ia64.cc:5531 -#: config/rs6000/rs6000.cc:13972 config/xtensa/xtensa.cc:2460 +#: config/rs6000/rs6000.cc:13964 config/xtensa/xtensa.cc:2460 #, c-format msgid "invalid %%R value" msgstr "нерэчаіснае значэньне %%R" -#: config/alpha/alpha.cc:5180 config/rs6000/rs6000.cc:13892 +#: config/alpha/alpha.cc:5180 config/rs6000/rs6000.cc:13884 #: config/xtensa/xtensa.cc:2427 #, c-format msgid "invalid %%N value" msgstr "нерэчаіснае значэньне %%N" -#: config/alpha/alpha.cc:5188 config/rs6000/rs6000.cc:13920 +#: config/alpha/alpha.cc:5188 config/rs6000/rs6000.cc:13912 #, c-format msgid "invalid %%P value" msgstr "нерэчаіснае значэньне %%P" @@ -18552,7 +18560,7 @@ msgstr "нерэчаіснае значэньне %%M" msgid "invalid %%U value" msgstr "нерэчаіснае значэньне %%U" -#: config/alpha/alpha.cc:5274 config/rs6000/rs6000.cc:13980 +#: config/alpha/alpha.cc:5274 config/rs6000/rs6000.cc:13972 #, c-format msgid "invalid %%s value" msgstr "нерэчаіснае значэньне %%v" @@ -18562,7 +18570,7 @@ msgstr "нерэчаіснае значэньне %%v" msgid "invalid %%C value" msgstr "нерэчаіснае значэньне %%C" -#: config/alpha/alpha.cc:5322 config/rs6000/rs6000.cc:13756 +#: config/alpha/alpha.cc:5322 config/rs6000/rs6000.cc:13748 #, c-format msgid "invalid %%E value" msgstr "нерэчаіснае значэньне %%E" @@ -18572,10 +18580,10 @@ msgstr "нерэчаіснае значэньне %%E" msgid "unknown relocation unspec" msgstr "" -#: config/alpha/alpha.cc:5356 config/cr16/cr16.cc:1572 config/gcn/gcn.cc:6050 -#: config/gcn/gcn.cc:6059 config/gcn/gcn.cc:6119 config/gcn/gcn.cc:6127 -#: config/gcn/gcn.cc:6143 config/gcn/gcn.cc:6161 config/gcn/gcn.cc:6212 -#: config/gcn/gcn.cc:6331 config/gcn/gcn.cc:6442 config/rs6000/rs6000.cc:14283 +#: config/alpha/alpha.cc:5356 config/cr16/cr16.cc:1572 config/gcn/gcn.cc:6051 +#: config/gcn/gcn.cc:6060 config/gcn/gcn.cc:6120 config/gcn/gcn.cc:6128 +#: config/gcn/gcn.cc:6144 config/gcn/gcn.cc:6162 config/gcn/gcn.cc:6213 +#: config/gcn/gcn.cc:6332 config/gcn/gcn.cc:6443 config/rs6000/rs6000.cc:14275 #, c-format msgid "invalid %%xn code" msgstr "нерэчаіснае значэньне %%xn" @@ -18645,7 +18653,7 @@ msgstr "нерэчаісны %%-код" #. Undocumented flag. #: config/arc/arc.cc:4954 config/epiphany/epiphany.cc:1309 #: config/m32r/m32r.cc:2233 config/nds32/nds32.cc:3517 -#: config/sparc/sparc.cc:9636 +#: config/sparc/sparc.cc:9648 #, c-format msgid "invalid operand output code" msgstr "" @@ -18660,36 +18668,36 @@ msgstr "нерэчаісны %%-код" msgid "unrecognized supposed constant" msgstr "нераспазнаны выбар \"-%s\"" -#: config/arm/arm.cc:20839 config/arm/arm.cc:20864 config/arm/arm.cc:20874 -#: config/arm/arm.cc:20883 config/arm/arm.cc:20892 +#: config/arm/arm.cc:20847 config/arm/arm.cc:20872 config/arm/arm.cc:20882 +#: config/arm/arm.cc:20891 config/arm/arm.cc:20900 #, fuzzy, c-format #| msgid "invalid %%f operand" msgid "invalid shift operand" msgstr "нерэчаісны %%f аперанд" -#: config/arm/arm.cc:23748 config/arm/arm.cc:23766 +#: config/arm/arm.cc:23756 config/arm/arm.cc:23774 #, fuzzy, c-format msgid "predicated Thumb instruction" msgstr "нявернае выкарыстанне \"restict\"" -#: config/arm/arm.cc:23754 +#: config/arm/arm.cc:23762 #, c-format msgid "predicated instruction in conditional sequence" msgstr "" -#: config/arm/arm.cc:23872 config/arm/arm.cc:23885 config/arm/arm.cc:23910 +#: config/arm/arm.cc:23880 config/arm/arm.cc:23893 config/arm/arm.cc:23918 #: config/nios2/nios2.cc:3081 #, fuzzy, c-format msgid "Unsupported operand for code '%c'" msgstr "Нерэчаісны выбар \"%s\"" -#: config/arm/arm.cc:23987 config/arm/arm.cc:24009 config/arm/arm.cc:24019 -#: config/arm/arm.cc:24029 config/arm/arm.cc:24039 config/arm/arm.cc:24078 -#: config/arm/arm.cc:24096 config/arm/arm.cc:24121 config/arm/arm.cc:24136 -#: config/arm/arm.cc:24163 config/arm/arm.cc:24170 config/arm/arm.cc:24188 -#: config/arm/arm.cc:24195 config/arm/arm.cc:24203 config/arm/arm.cc:24224 -#: config/arm/arm.cc:24231 config/arm/arm.cc:24422 config/arm/arm.cc:24429 -#: config/arm/arm.cc:24456 config/arm/arm.cc:24463 config/bfin/bfin.cc:1441 +#: config/arm/arm.cc:23995 config/arm/arm.cc:24017 config/arm/arm.cc:24027 +#: config/arm/arm.cc:24037 config/arm/arm.cc:24047 config/arm/arm.cc:24086 +#: config/arm/arm.cc:24104 config/arm/arm.cc:24129 config/arm/arm.cc:24144 +#: config/arm/arm.cc:24171 config/arm/arm.cc:24178 config/arm/arm.cc:24196 +#: config/arm/arm.cc:24203 config/arm/arm.cc:24211 config/arm/arm.cc:24232 +#: config/arm/arm.cc:24239 config/arm/arm.cc:24430 config/arm/arm.cc:24437 +#: config/arm/arm.cc:24464 config/arm/arm.cc:24471 config/bfin/bfin.cc:1441 #: config/bfin/bfin.cc:1448 config/bfin/bfin.cc:1455 config/bfin/bfin.cc:1462 #: config/bfin/bfin.cc:1471 config/bfin/bfin.cc:1478 config/bfin/bfin.cc:1485 #: config/bfin/bfin.cc:1492 config/nds32/nds32.cc:3543 @@ -18697,13 +18705,13 @@ msgstr "Нерэчаісны выбар \"%s\"" msgid "invalid operand for code '%c'" msgstr "Нерэчаісны выбар \"%s\"" -#: config/arm/arm.cc:24091 +#: config/arm/arm.cc:24099 #, c-format msgid "instruction never executed" msgstr "" #. Former Maverick support, removed after GCC-4.7. -#: config/arm/arm.cc:24112 +#: config/arm/arm.cc:24120 #, c-format msgid "obsolete Maverick format code '%c'" msgstr "" @@ -18836,9 +18844,9 @@ msgstr "непадтрымліваемая версія" #. Format punctuators via %s to avoid -Wformat-diag. #: config/cris/cris.cc:775 config/ft32/ft32.cc:110 config/moxie/moxie.cc:108 -#: final.cc:3233 final.cc:3235 fold-const.cc:277 gcc.cc:6153 gcc.cc:6167 +#: final.cc:3233 final.cc:3235 fold-const.cc:277 gcc.cc:6154 gcc.cc:6168 #: rtl-error.cc:101 toplev.cc:322 vr-values.cc:2383 cp/logic.cc:312 -#: cp/logic.cc:314 cp/typeck.cc:7306 d/d-convert.cc:237 +#: cp/logic.cc:314 cp/typeck.cc:7312 d/d-convert.cc:237 #: go/go-gcc-diagnostics.cc:28 go/go-gcc-diagnostics.cc:37 #: go/go-gcc-diagnostics.cc:45 go/go-gcc-diagnostics.cc:53 #: lto/lto-object.cc:180 lto/lto-object.cc:277 lto/lto-object.cc:334 @@ -19049,25 +19057,25 @@ msgstr "" msgid "bad output_condmove_single operand" msgstr "" -#: config/gcn/gcn.cc:5711 config/gcn/gcn.cc:5744 config/gcn/gcn.cc:5748 -#: config/gcn/gcn.cc:6092 config/gcn/gcn.cc:6103 config/gcn/gcn.cc:6106 +#: config/gcn/gcn.cc:5712 config/gcn/gcn.cc:5745 config/gcn/gcn.cc:5749 +#: config/gcn/gcn.cc:6093 config/gcn/gcn.cc:6104 config/gcn/gcn.cc:6107 #, c-format msgid "bad ADDR_SPACE_GLOBAL address" msgstr "" -#: config/gcn/gcn.cc:5860 config/gcn/gcn.cc:5883 config/gcn/gcn.cc:5915 -#: config/gcn/gcn.cc:5931 config/gcn/gcn.cc:5946 config/gcn/gcn.cc:5965 -#: config/gcn/gcn.cc:6041 config/gcn/gcn.cc:6237 config/gcn/gcn.cc:6352 +#: config/gcn/gcn.cc:5861 config/gcn/gcn.cc:5884 config/gcn/gcn.cc:5916 +#: config/gcn/gcn.cc:5932 config/gcn/gcn.cc:5947 config/gcn/gcn.cc:5966 +#: config/gcn/gcn.cc:6042 config/gcn/gcn.cc:6238 config/gcn/gcn.cc:6353 #, fuzzy, c-format msgid "invalid operand %%xn code" msgstr "нерэчаісны %%-код" -#: config/gcn/gcn.cc:6340 +#: config/gcn/gcn.cc:6341 #, c-format msgid "operand %%xn code invalid for QImode" msgstr "" -#: config/gcn/gcn.cc:6422 +#: config/gcn/gcn.cc:6423 #, fuzzy, c-format #| msgid "invalid string constant `%E'" msgid "invalid fp constant" @@ -19080,100 +19088,100 @@ msgstr "`%E' - нерэчаісная нязьменная тыпу string" msgid "Expected register or constant integer." msgstr "" -#: config/i386/i386.cc:12360 +#: config/i386/i386.cc:12334 #, c-format msgid "invalid UNSPEC as operand" msgstr "" -#: config/i386/i386.cc:12899 +#: config/i386/i386.cc:12873 #, fuzzy, c-format #| msgid "invalid use of `restrict'" msgid "invalid use of register '%s'" msgstr "нявернае выкарыстанне \"restict\"" -#: config/i386/i386.cc:12904 +#: config/i386/i386.cc:12878 #, fuzzy, c-format #| msgid "invalid use of `restrict'" msgid "invalid use of asm flag output" msgstr "нявернае выкарыстанне \"restict\"" -#: config/i386/i386.cc:13137 +#: config/i386/i386.cc:13111 #, fuzzy, c-format msgid "invalid operand size for operand code 'O'" msgstr "нерэчаісны %%-код" -#: config/i386/i386.cc:13172 +#: config/i386/i386.cc:13146 #, fuzzy, c-format msgid "invalid operand size for operand code 'z'" msgstr "нерэчаісны %%-код" -#: config/i386/i386.cc:13241 +#: config/i386/i386.cc:13215 #, fuzzy, c-format msgid "invalid operand type used with operand code 'Z'" msgstr "нерэчаісны %%-код" -#: config/i386/i386.cc:13246 +#: config/i386/i386.cc:13220 #, fuzzy, c-format msgid "invalid operand size for operand code 'Z'" msgstr "нерэчаісны %%-код" -#: config/i386/i386.cc:13323 +#: config/i386/i386.cc:13297 #, c-format msgid "operand is not a condition code, invalid operand code 'Y'" msgstr "" -#: config/i386/i386.cc:13402 +#: config/i386/i386.cc:13376 #, c-format msgid "operand is not a condition code, invalid operand code 'D'" msgstr "" -#: config/i386/i386.cc:13420 +#: config/i386/i386.cc:13394 #, c-format msgid "operand is not a condition code, invalid operand code '%c'" msgstr "" -#: config/i386/i386.cc:13433 +#: config/i386/i386.cc:13407 #, c-format msgid "operand is not an offsettable memory reference, invalid operand code 'H'" msgstr "" -#: config/i386/i386.cc:13448 +#: config/i386/i386.cc:13422 #, c-format msgid "operand is not an integer, invalid operand code 'K'" msgstr "" -#: config/i386/i386.cc:13476 +#: config/i386/i386.cc:13450 #, c-format msgid "operand is not a specific integer, invalid operand code 'r'" msgstr "" -#: config/i386/i386.cc:13494 +#: config/i386/i386.cc:13468 #, c-format msgid "operand is not an integer, invalid operand code 'R'" msgstr "" -#: config/i386/i386.cc:13517 +#: config/i386/i386.cc:13491 #, c-format msgid "operand is not a specific integer, invalid operand code 'R'" msgstr "" -#: config/i386/i386.cc:13621 +#: config/i386/i386.cc:13595 #, fuzzy, c-format msgid "invalid operand code '%c'" msgstr "Нерэчаісны выбар \"%s\"" -#: config/i386/i386.cc:13683 config/i386/i386.cc:14072 +#: config/i386/i386.cc:13657 config/i386/i386.cc:14046 #, fuzzy, c-format #| msgid "invalid %%c operand" msgid "invalid constraints for operand" msgstr "нерэчаісны %%c аперанд" -#: config/i386/i386.cc:13784 +#: config/i386/i386.cc:13758 #, fuzzy, c-format msgid "invalid vector immediate" msgstr "нерэчаісны ініцыялізатар" -#: config/i386/i386.cc:16791 +#: config/i386/i386.cc:16765 #, fuzzy msgid "unknown insn mode" msgstr "невядомы рэжым машыны \"%s\"" @@ -19211,7 +19219,7 @@ msgstr "нерэчаісны %%-код" msgid "invalid %%P operand" msgstr "нерэчаісны %%-код" -#: config/iq2000/iq2000.cc:3134 config/rs6000/rs6000.cc:13910 +#: config/iq2000/iq2000.cc:3134 config/rs6000/rs6000.cc:13902 #, c-format msgid "invalid %%p value" msgstr "" @@ -19240,26 +19248,26 @@ msgstr "" msgid "invalid addressing mode" msgstr "" -#: config/loongarch/loongarch.cc:4237 config/loongarch/loongarch.cc:4259 -#: config/loongarch/loongarch.cc:4451 config/mips/mips.cc:9016 -#: config/mips/mips.cc:9043 config/mips/mips.cc:9226 +#: config/loongarch/loongarch.cc:4261 config/loongarch/loongarch.cc:4283 +#: config/loongarch/loongarch.cc:4475 config/mips/mips.cc:9065 +#: config/mips/mips.cc:9092 config/mips/mips.cc:9275 #, fuzzy, c-format msgid "'%%%c' is not a valid operand prefix" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: config/loongarch/loongarch.cc:4368 config/loongarch/loongarch.cc:4375 -#: config/loongarch/loongarch.cc:4382 config/loongarch/loongarch.cc:4389 -#: config/loongarch/loongarch.cc:4399 config/loongarch/loongarch.cc:4402 -#: config/loongarch/loongarch.cc:4414 config/loongarch/loongarch.cc:4417 -#: config/loongarch/loongarch.cc:4482 config/loongarch/loongarch.cc:4497 -#: config/loongarch/loongarch.cc:4506 config/mips/mips.cc:9115 -#: config/mips/mips.cc:9122 config/mips/mips.cc:9129 config/mips/mips.cc:9136 -#: config/mips/mips.cc:9149 config/mips/mips.cc:9156 config/mips/mips.cc:9166 -#: config/mips/mips.cc:9169 config/mips/mips.cc:9181 config/mips/mips.cc:9184 -#: config/mips/mips.cc:9244 config/mips/mips.cc:9251 config/mips/mips.cc:9272 -#: config/mips/mips.cc:9287 config/mips/mips.cc:9306 config/mips/mips.cc:9315 -#: config/riscv/riscv.cc:3557 config/riscv/riscv.cc:3686 -#: config/riscv/riscv.cc:3692 config/riscv/riscv.cc:3701 +#: config/loongarch/loongarch.cc:4392 config/loongarch/loongarch.cc:4399 +#: config/loongarch/loongarch.cc:4406 config/loongarch/loongarch.cc:4413 +#: config/loongarch/loongarch.cc:4423 config/loongarch/loongarch.cc:4426 +#: config/loongarch/loongarch.cc:4438 config/loongarch/loongarch.cc:4441 +#: config/loongarch/loongarch.cc:4506 config/loongarch/loongarch.cc:4521 +#: config/loongarch/loongarch.cc:4530 config/mips/mips.cc:9164 +#: config/mips/mips.cc:9171 config/mips/mips.cc:9178 config/mips/mips.cc:9185 +#: config/mips/mips.cc:9198 config/mips/mips.cc:9205 config/mips/mips.cc:9215 +#: config/mips/mips.cc:9218 config/mips/mips.cc:9230 config/mips/mips.cc:9233 +#: config/mips/mips.cc:9293 config/mips/mips.cc:9300 config/mips/mips.cc:9321 +#: config/mips/mips.cc:9336 config/mips/mips.cc:9355 config/mips/mips.cc:9364 +#: config/riscv/riscv.cc:3571 config/riscv/riscv.cc:3700 +#: config/riscv/riscv.cc:3706 config/riscv/riscv.cc:3715 #, fuzzy, c-format #| msgid "invalid use of `%D'" msgid "invalid use of '%%%c'" @@ -19292,7 +19300,7 @@ msgid "post-increment address is not a register" msgstr "" #: config/m32r/m32r.cc:2336 config/m32r/m32r.cc:2351 -#: config/rs6000/rs6000.cc:20541 +#: config/rs6000/rs6000.cc:20552 msgid "bad address" msgstr "дрэнны адрас" @@ -19508,267 +19516,267 @@ msgstr "" msgid "%<-mquad-memory%> is not available in little endian mode" msgstr "" -#: config/rs6000/rs6000.cc:10963 +#: config/rs6000/rs6000.cc:10955 msgid "bad move" msgstr "" -#: config/rs6000/rs6000.cc:13540 +#: config/rs6000/rs6000.cc:13532 msgid "Bad 128-bit move" msgstr "" -#: config/rs6000/rs6000.cc:13720 +#: config/rs6000/rs6000.cc:13712 #, fuzzy, c-format #| msgid "invalid %%Q value" msgid "invalid %%A value" msgstr "дрэннае %%Q значэнне" -#: config/rs6000/rs6000.cc:13729 config/xtensa/xtensa.cc:2403 +#: config/rs6000/rs6000.cc:13721 config/xtensa/xtensa.cc:2403 #, fuzzy, c-format msgid "invalid %%D value" msgstr "дрэннае %%Q значэнне" -#: config/rs6000/rs6000.cc:13744 +#: config/rs6000/rs6000.cc:13736 #, fuzzy, c-format #| msgid "invalid %%Q value" msgid "invalid %%e value" msgstr "дрэннае %%Q значэнне" -#: config/rs6000/rs6000.cc:13765 +#: config/rs6000/rs6000.cc:13757 #, c-format msgid "invalid %%f value" msgstr "" -#: config/rs6000/rs6000.cc:13774 +#: config/rs6000/rs6000.cc:13766 #, c-format msgid "invalid %%F value" msgstr "" -#: config/rs6000/rs6000.cc:13783 +#: config/rs6000/rs6000.cc:13775 #, c-format msgid "invalid %%G value" msgstr "" -#: config/rs6000/rs6000.cc:13818 +#: config/rs6000/rs6000.cc:13810 #, c-format msgid "invalid %%j code" msgstr "" -#: config/rs6000/rs6000.cc:13828 +#: config/rs6000/rs6000.cc:13820 #, c-format msgid "invalid %%J code" msgstr "" -#: config/rs6000/rs6000.cc:13838 +#: config/rs6000/rs6000.cc:13830 #, c-format msgid "invalid %%k value" msgstr "" -#: config/rs6000/rs6000.cc:13853 config/xtensa/xtensa.cc:2446 +#: config/rs6000/rs6000.cc:13845 config/xtensa/xtensa.cc:2446 #, c-format msgid "invalid %%K value" msgstr "" -#: config/rs6000/rs6000.cc:13900 +#: config/rs6000/rs6000.cc:13892 #, c-format msgid "invalid %%O value" msgstr "нерэчаіснае значэньне %%O" -#: config/rs6000/rs6000.cc:13947 +#: config/rs6000/rs6000.cc:13939 #, c-format msgid "invalid %%q value" msgstr "" -#: config/rs6000/rs6000.cc:13989 +#: config/rs6000/rs6000.cc:13981 #, fuzzy, c-format #| msgid "invalid %%Q value" msgid "invalid %%t value" msgstr "дрэннае %%Q значэнне" -#: config/rs6000/rs6000.cc:14006 +#: config/rs6000/rs6000.cc:13998 #, c-format msgid "invalid %%T value" msgstr "" -#: config/rs6000/rs6000.cc:14018 +#: config/rs6000/rs6000.cc:14010 #, c-format msgid "invalid %%u value" msgstr "" -#: config/rs6000/rs6000.cc:14032 config/xtensa/xtensa.cc:2415 +#: config/rs6000/rs6000.cc:14024 config/xtensa/xtensa.cc:2415 #, c-format msgid "invalid %%v value" msgstr "" -#: config/rs6000/rs6000.cc:14082 +#: config/rs6000/rs6000.cc:14074 #, c-format msgid "invalid %%V value" msgstr "нерэчаіснае значэньне %%V" -#: config/rs6000/rs6000.cc:14099 config/xtensa/xtensa.cc:2467 +#: config/rs6000/rs6000.cc:14091 config/xtensa/xtensa.cc:2467 #, fuzzy, c-format #| msgid "invalid %%x/X value" msgid "invalid %%x value" msgstr "нерэчаіснае значэньне %%x/X" -#: config/rs6000/rs6000.cc:14156 +#: config/rs6000/rs6000.cc:14148 #, c-format msgid "invalid %%z value" msgstr "" -#: config/rs6000/rs6000.cc:14225 +#: config/rs6000/rs6000.cc:14217 #, fuzzy, c-format msgid "invalid %%y value, try using the 'Z' constraint" msgstr "нявернае выкарыстанне \"restict\"" -#: config/rs6000/rs6000.cc:15093 +#: config/rs6000/rs6000.cc:15085 msgid "Invalid mixing of IEEE 128-bit and IBM 128-bit floating point types" msgstr "" -#: config/rs6000/rs6000.cc:23925 +#: config/rs6000/rs6000.cc:23936 #, fuzzy #| msgid "too few arguments to function" msgid "AltiVec argument passed to unprototyped function" msgstr "не хапае аргументаў у функцыі" -#: config/rs6000/rs6000.cc:27573 +#: config/rs6000/rs6000.cc:27598 #, fuzzy msgid "Could not generate addis value for fusion" msgstr "Стварыць код для DLL" -#: config/rs6000/rs6000.cc:27642 +#: config/rs6000/rs6000.cc:27667 msgid "Unable to generate load/store offset for fusion" msgstr "" -#: config/rs6000/rs6000.cc:27718 +#: config/rs6000/rs6000.cc:27743 msgid "Bad GPR fusion" msgstr "" -#: config/rs6000/rs6000.cc:28257 +#: config/rs6000/rs6000.cc:28282 msgid "invalid conversion from type %<__vector_quad%>" msgstr "" -#: config/rs6000/rs6000.cc:28259 +#: config/rs6000/rs6000.cc:28284 msgid "invalid conversion to type %<__vector_quad%>" msgstr "" -#: config/rs6000/rs6000.cc:28261 +#: config/rs6000/rs6000.cc:28286 msgid "invalid conversion from type %<__vector_pair%>" msgstr "" -#: config/rs6000/rs6000.cc:28263 +#: config/rs6000/rs6000.cc:28288 msgid "invalid conversion to type %<__vector_pair%>" msgstr "" -#: config/rs6000/rs6000.cc:28278 +#: config/rs6000/rs6000.cc:28303 msgid "invalid conversion from type %<* __vector_quad%>" msgstr "" -#: config/rs6000/rs6000.cc:28280 +#: config/rs6000/rs6000.cc:28305 msgid "invalid conversion to type %<* __vector_quad%>" msgstr "" -#: config/rs6000/rs6000.cc:28282 +#: config/rs6000/rs6000.cc:28307 msgid "invalid conversion from type %<* __vector_pair%>" msgstr "" -#: config/rs6000/rs6000.cc:28284 +#: config/rs6000/rs6000.cc:28309 msgid "invalid conversion to type %<* __vector_pair%>" msgstr "" -#: config/s390/s390.cc:7959 +#: config/s390/s390.cc:7953 #, c-format msgid "symbolic memory references are only supported on z10 or later" msgstr "" -#: config/s390/s390.cc:7970 +#: config/s390/s390.cc:7964 #, fuzzy, c-format msgid "cannot decompose address" msgstr "невядомая назва рэгістра: %s" -#: config/s390/s390.cc:8052 +#: config/s390/s390.cc:8046 #, c-format msgid "invalid comparison operator for 'E' output modifier" msgstr "" -#: config/s390/s390.cc:8075 +#: config/s390/s390.cc:8069 #, c-format msgid "invalid reference for 'J' output modifier" msgstr "" -#: config/s390/s390.cc:8093 +#: config/s390/s390.cc:8087 #, c-format msgid "invalid address for 'O' output modifier" msgstr "" -#: config/s390/s390.cc:8115 +#: config/s390/s390.cc:8109 #, c-format msgid "invalid address for 'R' output modifier" msgstr "" -#: config/s390/s390.cc:8133 +#: config/s390/s390.cc:8127 #, c-format msgid "memory reference expected for 'S' output modifier" msgstr "" -#: config/s390/s390.cc:8143 +#: config/s390/s390.cc:8137 #, c-format msgid "invalid address for 'S' output modifier" msgstr "" -#: config/s390/s390.cc:8164 +#: config/s390/s390.cc:8158 #, c-format msgid "register or memory expression expected for 'N' output modifier" msgstr "" -#: config/s390/s390.cc:8175 +#: config/s390/s390.cc:8169 #, c-format msgid "register or memory expression expected for 'M' output modifier" msgstr "" -#: config/s390/s390.cc:8284 config/s390/s390.cc:8305 +#: config/s390/s390.cc:8278 config/s390/s390.cc:8299 #, c-format msgid "invalid constant for output modifier '%c'" msgstr "" -#: config/s390/s390.cc:8302 +#: config/s390/s390.cc:8296 #, c-format msgid "invalid constant - try using an output modifier" msgstr "" -#: config/s390/s390.cc:8339 +#: config/s390/s390.cc:8333 #, c-format msgid "invalid constant vector for output modifier '%c'" msgstr "" -#: config/s390/s390.cc:8346 +#: config/s390/s390.cc:8340 #, c-format msgid "invalid expression - try using an output modifier" msgstr "" -#: config/s390/s390.cc:8349 +#: config/s390/s390.cc:8343 #, c-format msgid "invalid expression for output modifier '%c'" msgstr "" -#: config/s390/s390.cc:12128 +#: config/s390/s390.cc:12122 #, fuzzy #| msgid "too few arguments to function" msgid "vector argument passed to unprototyped function" msgstr "не хапае аргументаў у функцыі" -#: config/s390/s390.cc:16529 +#: config/s390/s390.cc:16546 msgid "types differ in signedness" msgstr "" -#: config/s390/s390.cc:16539 +#: config/s390/s390.cc:16556 msgid "binary operator does not support two vector bool operands" msgstr "" -#: config/s390/s390.cc:16542 +#: config/s390/s390.cc:16559 msgid "binary operator does not support vector bool operand" msgstr "" -#: config/s390/s390.cc:16550 +#: config/s390/s390.cc:16567 msgid "binary operator does not support mixing vector bool with floating point vector operands" msgstr "" @@ -19794,43 +19802,43 @@ msgstr "" msgid "created and used with different endianness" msgstr "" -#: config/sparc/sparc.cc:9366 config/sparc/sparc.cc:9372 +#: config/sparc/sparc.cc:9378 config/sparc/sparc.cc:9384 #, c-format msgid "invalid %%Y operand" msgstr "нерэчаісны %%Y аперанд" -#: config/sparc/sparc.cc:9459 +#: config/sparc/sparc.cc:9471 #, c-format msgid "invalid %%A operand" msgstr "нерэчаісны %%A аперанд" -#: config/sparc/sparc.cc:9479 +#: config/sparc/sparc.cc:9491 #, c-format msgid "invalid %%B operand" msgstr "нерэчаісны %%B аперанд" -#: config/sparc/sparc.cc:9559 config/tilegx/tilegx.cc:5089 +#: config/sparc/sparc.cc:9571 config/tilegx/tilegx.cc:5089 #: config/tilepro/tilepro.cc:4497 #, c-format msgid "invalid %%C operand" msgstr "нерэчаісны %%C аперанд" -#: config/sparc/sparc.cc:9591 config/tilegx/tilegx.cc:5122 +#: config/sparc/sparc.cc:9603 config/tilegx/tilegx.cc:5122 #, c-format msgid "invalid %%D operand" msgstr "нерэчаісны %%D аперанд" -#: config/sparc/sparc.cc:9610 +#: config/sparc/sparc.cc:9622 #, c-format msgid "invalid %%f operand" msgstr "нерэчаісны %%f аперанд" -#: config/sparc/sparc.cc:9622 +#: config/sparc/sparc.cc:9634 #, fuzzy, c-format msgid "invalid %%s operand" msgstr "нерэчаісны %%-код" -#: config/sparc/sparc.cc:9667 +#: config/sparc/sparc.cc:9679 #, c-format msgid "floating-point constant not a valid immediate operand" msgstr "" @@ -20035,14 +20043,14 @@ msgstr "" #: c/c-parser.cc:7172 c/c-parser.cc:11078 c/c-parser.cc:11113 #: c/c-parser.cc:11144 c/c-parser.cc:11191 c/c-parser.cc:11372 #: c/c-parser.cc:12204 c/c-parser.cc:12279 c/c-parser.cc:12322 -#: c/c-parser.cc:18438 c/c-parser.cc:18518 c/c-parser.cc:18848 -#: c/c-parser.cc:18874 c/c-parser.cc:18897 c/c-parser.cc:19347 -#: c/c-parser.cc:19391 c/gimple-parser.cc:396 c/gimple-parser.cc:437 +#: c/c-parser.cc:18439 c/c-parser.cc:18519 c/c-parser.cc:18849 +#: c/c-parser.cc:18875 c/c-parser.cc:18898 c/c-parser.cc:19348 +#: c/c-parser.cc:19392 c/gimple-parser.cc:396 c/gimple-parser.cc:437 #: c/gimple-parser.cc:446 c/gimple-parser.cc:655 c/gimple-parser.cc:2245 #: c/gimple-parser.cc:2282 c/gimple-parser.cc:2361 c/gimple-parser.cc:2388 #: c/c-parser.cc:3279 c/c-parser.cc:3466 c/c-parser.cc:3499 #: c/c-parser.cc:11365 c/gimple-parser.cc:2053 c/gimple-parser.cc:2110 -#: cp/parser.cc:15227 cp/parser.cc:32265 cp/parser.cc:32878 +#: cp/parser.cc:15227 cp/parser.cc:32284 cp/parser.cc:32897 #, gcc-internal-format msgid "expected %<;%>" msgstr "" @@ -20051,11 +20059,11 @@ msgstr "" #: c/c-parser.cc:4337 c/c-parser.cc:4699 c/c-parser.cc:4720 c/c-parser.cc:4729 #: c/c-parser.cc:4780 c/c-parser.cc:4789 c/c-parser.cc:8541 c/c-parser.cc:8608 #: c/c-parser.cc:9115 c/c-parser.cc:9140 c/c-parser.cc:9174 c/c-parser.cc:9283 -#: c/c-parser.cc:10104 c/c-parser.cc:11479 c/c-parser.cc:13822 -#: c/c-parser.cc:14536 c/c-parser.cc:14595 c/c-parser.cc:14650 -#: c/c-parser.cc:16262 c/c-parser.cc:16382 c/c-parser.cc:17702 -#: c/c-parser.cc:18939 c/c-parser.cc:19355 c/c-parser.cc:22322 -#: c/c-parser.cc:22400 c/gimple-parser.cc:195 c/gimple-parser.cc:198 +#: c/c-parser.cc:10104 c/c-parser.cc:11479 c/c-parser.cc:13823 +#: c/c-parser.cc:14537 c/c-parser.cc:14596 c/c-parser.cc:14651 +#: c/c-parser.cc:16263 c/c-parser.cc:16383 c/c-parser.cc:17703 +#: c/c-parser.cc:18940 c/c-parser.cc:19356 c/c-parser.cc:22323 +#: c/c-parser.cc:22401 c/gimple-parser.cc:195 c/gimple-parser.cc:198 #: c/gimple-parser.cc:531 c/gimple-parser.cc:565 c/gimple-parser.cc:570 #: c/gimple-parser.cc:739 c/gimple-parser.cc:836 c/gimple-parser.cc:1038 #: c/gimple-parser.cc:1064 c/gimple-parser.cc:1067 c/gimple-parser.cc:1198 @@ -20063,7 +20071,7 @@ msgstr "" #: c/gimple-parser.cc:1483 c/gimple-parser.cc:1505 c/gimple-parser.cc:1535 #: c/gimple-parser.cc:1561 c/gimple-parser.cc:1767 c/gimple-parser.cc:1975 #: c/gimple-parser.cc:1995 c/gimple-parser.cc:2155 c/gimple-parser.cc:2318 -#: c/c-parser.cc:7124 cp/parser.cc:32926 +#: c/c-parser.cc:7124 cp/parser.cc:32945 #, gcc-internal-format msgid "expected %<)%>" msgstr "" @@ -20071,7 +20079,7 @@ msgstr "" #: c/c-parser.cc:4108 c/c-parser.cc:4840 c/c-parser.cc:4988 c/c-parser.cc:5014 #: c/c-parser.cc:5015 c/c-parser.cc:5429 c/c-parser.cc:5465 c/c-parser.cc:7223 #: c/c-parser.cc:9274 c/c-parser.cc:10220 c/c-parser.cc:10509 -#: c/c-parser.cc:13225 c/gimple-parser.cc:1744 cp/parser.cc:32890 +#: c/c-parser.cc:13226 c/gimple-parser.cc:1744 cp/parser.cc:32909 #, gcc-internal-format msgid "expected %<]%>" msgstr "" @@ -20081,58 +20089,58 @@ msgid "expected %<;%>, %<,%> or %<)%>" msgstr "" #. Look for the two `(' tokens. -#: c/c-parser.cc:4749 c/c-parser.cc:4754 c/c-parser.cc:13805 -#: c/c-parser.cc:14625 c/c-parser.cc:21681 c/c-parser.cc:22130 -#: c/c-parser.cc:22343 c/gimple-parser.cc:180 c/gimple-parser.cc:478 +#: c/c-parser.cc:4749 c/c-parser.cc:4754 c/c-parser.cc:13806 +#: c/c-parser.cc:14626 c/c-parser.cc:21682 c/c-parser.cc:22131 +#: c/c-parser.cc:22344 c/gimple-parser.cc:180 c/gimple-parser.cc:478 #: c/gimple-parser.cc:517 c/gimple-parser.cc:549 c/gimple-parser.cc:806 #: c/gimple-parser.cc:1032 c/gimple-parser.cc:1058 c/gimple-parser.cc:1185 #: c/gimple-parser.cc:1320 c/gimple-parser.cc:1441 c/gimple-parser.cc:1501 #: c/gimple-parser.cc:1519 c/gimple-parser.cc:1554 c/gimple-parser.cc:1944 #: c/gimple-parser.cc:1955 c/gimple-parser.cc:1961 c/gimple-parser.cc:2144 -#: c/gimple-parser.cc:2315 c/c-parser.cc:13627 cp/parser.cc:32881 +#: c/gimple-parser.cc:2315 c/c-parser.cc:13628 cp/parser.cc:32900 #, gcc-internal-format msgid "expected %<(%>" msgstr "" -#: c/c-parser.cc:4984 c/c-parser.cc:4986 c/c-parser.cc:13133 -#: cp/parser.cc:32893 cp/parser.cc:36623 go/gofrontend/embed.cc:439 +#: c/c-parser.cc:4984 c/c-parser.cc:4986 c/c-parser.cc:13134 +#: cp/parser.cc:32912 cp/parser.cc:36643 go/gofrontend/embed.cc:439 #, gcc-internal-format msgid "expected %<[%>" msgstr "" -#: c/c-parser.cc:5600 c/c-parser.cc:11708 c/c-parser.cc:18413 -#: c/c-parser.cc:18499 c/c-parser.cc:19151 c/c-parser.cc:20033 -#: c/c-parser.cc:23378 c/gimple-parser.cc:389 c/gimple-parser.cc:2321 +#: c/c-parser.cc:5600 c/c-parser.cc:11708 c/c-parser.cc:18414 +#: c/c-parser.cc:18500 c/c-parser.cc:19152 c/c-parser.cc:20034 +#: c/c-parser.cc:23379 c/gimple-parser.cc:389 c/gimple-parser.cc:2321 #: c/c-parser.cc:3267 c/c-parser.cc:3489 c/c-parser.cc:11260 -#: cp/parser.cc:20869 cp/parser.cc:32887 go/gofrontend/embed.cc:370 +#: cp/parser.cc:20878 cp/parser.cc:32906 go/gofrontend/embed.cc:370 #, gcc-internal-format msgid "expected %<{%>" msgstr "" #: c/c-parser.cc:5890 c/c-parser.cc:5899 c/c-parser.cc:7656 c/c-parser.cc:8745 #: c/c-parser.cc:11472 c/c-parser.cc:11868 c/c-parser.cc:11932 -#: c/c-parser.cc:13207 c/c-parser.cc:14227 c/c-parser.cc:14453 -#: c/c-parser.cc:14971 c/c-parser.cc:15072 c/c-parser.cc:15606 -#: c/c-parser.cc:15924 c/c-parser.cc:16000 c/c-parser.cc:16112 -#: c/c-parser.cc:21543 c/c-parser.cc:22187 c/c-parser.cc:22246 +#: c/c-parser.cc:13208 c/c-parser.cc:14228 c/c-parser.cc:14454 +#: c/c-parser.cc:14972 c/c-parser.cc:15073 c/c-parser.cc:15607 +#: c/c-parser.cc:15925 c/c-parser.cc:16001 c/c-parser.cc:16113 +#: c/c-parser.cc:21544 c/c-parser.cc:22188 c/c-parser.cc:22247 #: c/gimple-parser.cc:572 c/gimple-parser.cc:877 c/gimple-parser.cc:2369 -#: c/gimple-parser.cc:2396 c/c-parser.cc:7131 c/c-parser.cc:13730 -#: c/c-parser.cc:15077 cp/parser.cc:32920 cp/parser.cc:34599 -#: cp/parser.cc:37472 cp/parser.cc:38347 go/gofrontend/embed.cc:403 +#: c/gimple-parser.cc:2396 c/c-parser.cc:7131 c/c-parser.cc:13731 +#: c/c-parser.cc:15078 cp/parser.cc:32939 cp/parser.cc:34619 +#: cp/parser.cc:37492 cp/parser.cc:38367 go/gofrontend/embed.cc:403 #, gcc-internal-format msgid "expected %<:%>" msgstr "" -#: c/c-parser.cc:6681 cp/parser.cc:32807 +#: c/c-parser.cc:6681 cp/parser.cc:32826 #, gcc-internal-format msgid "expected %" msgstr "" #: c/c-parser.cc:8504 c/c-parser.cc:8696 c/c-parser.cc:9164 c/c-parser.cc:9207 -#: c/c-parser.cc:9345 c/c-parser.cc:10094 c/c-parser.cc:14630 -#: c/c-parser.cc:16068 c/gimple-parser.cc:1035 c/gimple-parser.cc:1061 +#: c/c-parser.cc:9345 c/c-parser.cc:10094 c/c-parser.cc:14631 +#: c/c-parser.cc:16069 c/gimple-parser.cc:1035 c/gimple-parser.cc:1061 #: c/gimple-parser.cc:1189 c/gimple-parser.cc:1192 c/gimple-parser.cc:1523 -#: c/gimple-parser.cc:1529 cp/parser.cc:32263 cp/parser.cc:32896 +#: c/gimple-parser.cc:1529 cp/parser.cc:32282 cp/parser.cc:32915 #, gcc-internal-format msgid "expected %<,%>" msgstr "" @@ -20142,50 +20150,50 @@ msgid "expected %<.%>" msgstr "" #: c/c-parser.cc:10931 c/c-parser.cc:10963 c/c-parser.cc:11203 -#: cp/parser.cc:35173 cp/parser.cc:35194 +#: cp/parser.cc:35193 cp/parser.cc:35214 #, gcc-internal-format msgid "expected %<@end%>" msgstr "" -#: c/c-parser.cc:11621 c/gimple-parser.cc:1359 cp/parser.cc:32905 +#: c/c-parser.cc:11621 c/gimple-parser.cc:1359 cp/parser.cc:32924 #, gcc-internal-format msgid "expected %<>%>" msgstr "" -#: c/c-parser.cc:15166 c/c-parser.cc:16400 cp/parser.cc:32929 +#: c/c-parser.cc:15167 c/c-parser.cc:16401 cp/parser.cc:32948 #, gcc-internal-format msgid "expected %<,%> or %<)%>" msgstr "" #. All following cases are statements with LHS. -#: c/c-parser.cc:15916 c/c-parser.cc:18306 c/c-parser.cc:18353 -#: c/c-parser.cc:18510 c/c-parser.cc:18858 c/c-parser.cc:19334 -#: c/c-parser.cc:21750 c/c-parser.cc:22384 c/gimple-parser.cc:730 -#: c/c-parser.cc:5488 c/c-parser.cc:18430 c/c-parser.cc:18654 -#: cp/parser.cc:32908 cp/parser.cc:40920 cp/parser.cc:41093 +#: c/c-parser.cc:15917 c/c-parser.cc:18307 c/c-parser.cc:18354 +#: c/c-parser.cc:18511 c/c-parser.cc:18859 c/c-parser.cc:19335 +#: c/c-parser.cc:21751 c/c-parser.cc:22385 c/gimple-parser.cc:730 +#: c/c-parser.cc:5488 c/c-parser.cc:18431 c/c-parser.cc:18655 +#: cp/parser.cc:32927 cp/parser.cc:40940 cp/parser.cc:41113 #, gcc-internal-format msgid "expected %<=%>" msgstr "" -#: c/c-parser.cc:18441 c/c-parser.cc:18521 c/c-parser.cc:18875 -#: c/c-parser.cc:19199 c/gimple-parser.cc:1577 c/gimple-parser.cc:1609 -#: c/gimple-parser.cc:1619 c/gimple-parser.cc:2406 cp/parser.cc:32884 -#: cp/parser.cc:35383 +#: c/c-parser.cc:18442 c/c-parser.cc:18522 c/c-parser.cc:18876 +#: c/c-parser.cc:19200 c/gimple-parser.cc:1577 c/gimple-parser.cc:1609 +#: c/gimple-parser.cc:1619 c/gimple-parser.cc:2406 cp/parser.cc:32903 +#: cp/parser.cc:35403 #, gcc-internal-format msgid "expected %<}%>" msgstr "" -#: c/c-parser.cc:18534 cp/parser.cc:41018 +#: c/c-parser.cc:18535 cp/parser.cc:41038 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:20078 c/c-parser.cc:20067 cp/parser.cc:43258 +#: c/c-parser.cc:20079 c/c-parser.cc:20068 cp/parser.cc:43278 #, gcc-internal-format msgid "expected %<#pragma omp section%> or %<}%>" msgstr "" -#: c/c-parser.cc:22955 cp/parser.cc:46776 +#: c/c-parser.cc:22956 cp/parser.cc:46796 msgid "" msgstr "" @@ -20193,7 +20201,7 @@ msgstr "" msgid "(anonymous)" msgstr "" -#: c/gimple-parser.cc:1348 cp/parser.cc:18235 cp/parser.cc:32902 +#: c/gimple-parser.cc:1348 cp/parser.cc:18235 cp/parser.cc:32921 #, gcc-internal-format msgid "expected %<<%>" msgstr "" @@ -20204,34 +20212,34 @@ msgstr "" msgid "expected label" msgstr "" -#: cp/call.cc:4007 +#: cp/call.cc:4018 msgid "candidate:" msgstr "" -#: cp/call.cc:7735 +#: cp/call.cc:7751 msgid " after user-defined conversion:" msgstr "" -#: cp/call.cc:7874 cp/pt.cc:2055 cp/pt.cc:25614 +#: cp/call.cc:7890 cp/pt.cc:2062 cp/pt.cc:25769 msgid "candidate is:" msgid_plural "candidates are:" msgstr[0] "" msgstr[1] "" -#: cp/call.cc:12525 +#: cp/call.cc:12540 msgid "candidate 1:" msgstr "" -#: cp/call.cc:12526 +#: cp/call.cc:12541 msgid "candidate 2:" msgstr "" -#: cp/decl.cc:3452 +#: cp/decl.cc:3469 #, fuzzy msgid "jump to label %qD" msgstr "паўтарэнне \"%s\"" -#: cp/decl.cc:3453 +#: cp/decl.cc:3470 msgid "jump to case label" msgstr "" @@ -20330,135 +20338,135 @@ msgstr "невыкарыстаемы параметр \"%s\"" msgid "" msgstr "" -#: cp/error.cc:2218 cp/error.cc:3304 c-family/c-pretty-print.cc:2644 +#: cp/error.cc:2219 cp/error.cc:3312 c-family/c-pretty-print.cc:2644 #, gcc-internal-format msgid "" msgstr "" #. While waiting for caret diagnostics, avoid printing #. __cxa_allocate_exception, __cxa_throw, and the like. -#: cp/error.cc:2236 +#: cp/error.cc:2237 msgid "" msgstr "" -#: cp/error.cc:2337 +#: cp/error.cc:2338 msgid "" msgstr "" -#: cp/error.cc:2821 +#: cp/error.cc:2829 msgid "" msgstr "" -#: cp/error.cc:2978 +#: cp/error.cc:2986 msgid "" msgstr "" -#: cp/error.cc:3017 +#: cp/error.cc:3025 msgid "*this" msgstr "" -#: cp/error.cc:3031 +#: cp/error.cc:3039 #, fuzzy #| msgid "parse error" msgid "" msgstr "граматычная памылка" -#: cp/error.cc:3046 +#: cp/error.cc:3054 msgid "" msgstr "" -#: cp/error.cc:3517 +#: cp/error.cc:3525 msgid "At global scope:" msgstr "" -#: cp/error.cc:3613 +#: cp/error.cc:3621 #, fuzzy, c-format msgid "In static member function %qs" msgstr "у функцыі \"%s\":" -#: cp/error.cc:3615 +#: cp/error.cc:3623 #, fuzzy, c-format #| msgid "In construct" msgid "In copy constructor %qs" msgstr "У канструкцыі" -#: cp/error.cc:3617 +#: cp/error.cc:3625 #, fuzzy, c-format #| msgid "In construct" msgid "In constructor %qs" msgstr "У канструкцыі" -#: cp/error.cc:3619 +#: cp/error.cc:3627 #, fuzzy, c-format #| msgid "In construct" msgid "In destructor %qs" msgstr "У канструкцыі" -#: cp/error.cc:3621 +#: cp/error.cc:3629 #, fuzzy #| msgid "In function" msgid "In lambda function" msgstr "У функцыі" -#: cp/error.cc:3649 +#: cp/error.cc:3657 #, c-format msgid "%s: In substitution of %qS:\n" msgstr "" -#: cp/error.cc:3650 +#: cp/error.cc:3658 #, fuzzy msgid "%s: In instantiation of %q#D:\n" msgstr "ініцыялізацыя" -#: cp/error.cc:3675 cp/error.cc:3829 +#: cp/error.cc:3683 cp/error.cc:3837 msgid "%r%s:%d:%d:%R " msgstr "" -#: cp/error.cc:3678 cp/error.cc:3832 +#: cp/error.cc:3686 cp/error.cc:3840 msgid "%r%s:%d:%R " msgstr "" -#: cp/error.cc:3686 +#: cp/error.cc:3694 #, c-format msgid "recursively required by substitution of %qS\n" msgstr "" -#: cp/error.cc:3687 +#: cp/error.cc:3695 #, c-format msgid "required by substitution of %qS\n" msgstr "" -#: cp/error.cc:3692 +#: cp/error.cc:3700 msgid "recursively required from %q#D\n" msgstr "" -#: cp/error.cc:3693 +#: cp/error.cc:3701 msgid "required from %q#D\n" msgstr "" -#: cp/error.cc:3700 +#: cp/error.cc:3708 msgid "recursively required from here\n" msgstr "" -#: cp/error.cc:3701 +#: cp/error.cc:3709 #, fuzzy #| msgid "called from here" msgid "required from here\n" msgstr "выклікана адсюль" -#: cp/error.cc:3753 +#: cp/error.cc:3761 msgid "%r%s:%d:%d:%R [ skipping %d instantiation contexts, use -ftemplate-backtrace-limit=0 to disable ]\n" msgstr "" -#: cp/error.cc:3759 +#: cp/error.cc:3767 msgid "%r%s:%d:%R [ skipping %d instantiation contexts, use -ftemplate-backtrace-limit=0 to disable ]\n" msgstr "" -#: cp/error.cc:3813 +#: cp/error.cc:3821 msgid "%r%s:%d:%d:%R in % expansion of %qs" msgstr "" -#: cp/error.cc:3817 +#: cp/error.cc:3825 msgid "%r%s:%d:%R in % expansion of %qs" msgstr "" @@ -20471,120 +20479,120 @@ msgstr "\"%s\" не абвешчан (першае выкарыстанне ў msgid "local variable %qD may not appear in this context" msgstr "" -#: cp/parser.cc:21675 +#: cp/parser.cc:21686 msgid "% only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:21678 +#: cp/parser.cc:21689 msgid "% of dependent type %qT" msgstr "" -#: cp/parser.cc:21680 +#: cp/parser.cc:21691 msgid "% of non-enumeration type %q#T" msgstr "" -#: cp/parser.cc:21682 +#: cp/parser.cc:21693 #, fuzzy msgid "% of incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/parser.cc:21684 +#: cp/parser.cc:21695 msgid "% of %qT before its enum-specifier" msgstr "" -#: cp/pt.cc:2053 cp/semantics.cc:5903 +#: cp/pt.cc:2060 cp/semantics.cc:5919 msgid "candidates are:" msgstr "" -#: cp/rtti.cc:595 +#: cp/rtti.cc:592 #, fuzzy msgid "target is not pointer or reference to class" msgstr "Не магу знайсці файл для класа %s." -#: cp/rtti.cc:600 +#: cp/rtti.cc:597 #, fuzzy msgid "target is not pointer or reference to complete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/rtti.cc:606 +#: cp/rtti.cc:603 msgid "target is not pointer or reference" msgstr "" -#: cp/rtti.cc:622 +#: cp/rtti.cc:619 msgid "source is not a pointer" msgstr "" -#: cp/rtti.cc:627 +#: cp/rtti.cc:624 msgid "source is not a pointer to class" msgstr "" -#: cp/rtti.cc:632 +#: cp/rtti.cc:629 #, fuzzy msgid "source is a pointer to incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/rtti.cc:645 +#: cp/rtti.cc:642 msgid "source is not of class type" msgstr "" -#: cp/rtti.cc:650 +#: cp/rtti.cc:647 #, fuzzy #| msgid "`%s' has an incomplete type" msgid "source is of incomplete class type" msgstr "\"%s\" мае незавершаны тып" -#: cp/rtti.cc:661 +#: cp/rtti.cc:658 msgid "conversion casts away constness" msgstr "" -#: cp/rtti.cc:817 +#: cp/rtti.cc:814 msgid "source type is not polymorphic" msgstr "" -#: cp/typeck.cc:7011 c/c-typeck.cc:4481 +#: cp/typeck.cc:7017 c/c-typeck.cc:4481 #, gcc-internal-format msgid "wrong type argument to unary minus" msgstr "" -#: cp/typeck.cc:7012 c/c-typeck.cc:4468 +#: cp/typeck.cc:7018 c/c-typeck.cc:4468 #, gcc-internal-format msgid "wrong type argument to unary plus" msgstr "" -#: cp/typeck.cc:7039 c/c-typeck.cc:4525 +#: cp/typeck.cc:7045 c/c-typeck.cc:4525 #, gcc-internal-format msgid "wrong type argument to bit-complement" msgstr "" -#: cp/typeck.cc:7056 c/c-typeck.cc:4533 +#: cp/typeck.cc:7062 c/c-typeck.cc:4533 #, gcc-internal-format msgid "wrong type argument to abs" msgstr "" -#: cp/typeck.cc:7068 c/c-typeck.cc:4555 +#: cp/typeck.cc:7074 c/c-typeck.cc:4555 #, gcc-internal-format msgid "wrong type argument to conjugation" msgstr "" -#: cp/typeck.cc:7086 +#: cp/typeck.cc:7092 #, fuzzy #| msgid "too many arguments to function" msgid "in argument to unary !" msgstr "вельмі шмат аргументаў у функцыі" -#: cp/typeck.cc:7132 +#: cp/typeck.cc:7138 msgid "no pre-increment operator for type" msgstr "" -#: cp/typeck.cc:7134 +#: cp/typeck.cc:7140 msgid "no post-increment operator for type" msgstr "" -#: cp/typeck.cc:7136 +#: cp/typeck.cc:7142 msgid "no pre-decrement operator for type" msgstr "" -#: cp/typeck.cc:7138 +#: cp/typeck.cc:7144 msgid "no post-decrement operator for type" msgstr "" @@ -20607,7 +20615,7 @@ msgstr "" msgid "arguments '%s' and '%s' for intrinsic %s" msgstr "" -#: fortran/check.cc:4400 fortran/intrinsic.cc:4820 +#: fortran/check.cc:4400 fortran/intrinsic.cc:4821 #, c-format msgid "arguments '%s' and '%s' for intrinsic '%s'" msgstr "" @@ -20685,43 +20693,43 @@ msgstr "" msgid "Driving:" msgstr "увага:" -#: fortran/interface.cc:3563 fortran/intrinsic.cc:4504 +#: fortran/interface.cc:3577 fortran/intrinsic.cc:4505 msgid "actual argument to INTENT = OUT/INOUT" msgstr "" -#: fortran/intrinsic.cc:4857 +#: fortran/intrinsic.cc:4858 msgid "available since Fortran 77" msgstr "" -#: fortran/intrinsic.cc:4861 +#: fortran/intrinsic.cc:4862 msgid "obsolescent in Fortran 95" msgstr "" -#: fortran/intrinsic.cc:4865 +#: fortran/intrinsic.cc:4866 msgid "deleted in Fortran 95" msgstr "" -#: fortran/intrinsic.cc:4869 +#: fortran/intrinsic.cc:4870 msgid "new in Fortran 95" msgstr "" -#: fortran/intrinsic.cc:4873 +#: fortran/intrinsic.cc:4874 msgid "new in Fortran 2003" msgstr "" -#: fortran/intrinsic.cc:4877 +#: fortran/intrinsic.cc:4878 msgid "new in Fortran 2008" msgstr "" -#: fortran/intrinsic.cc:4881 +#: fortran/intrinsic.cc:4882 msgid "new in Fortran 2018" msgstr "" -#: fortran/intrinsic.cc:4885 +#: fortran/intrinsic.cc:4886 msgid "a GNU Fortran extension" msgstr "" -#: fortran/intrinsic.cc:4889 +#: fortran/intrinsic.cc:4890 msgid "for backward compatibility" msgstr "" @@ -20851,11 +20859,11 @@ msgstr "" msgid "implied END DO" msgstr "" -#: fortran/parse.cc:2229 fortran/resolve.cc:12073 +#: fortran/parse.cc:2229 fortran/resolve.cc:12074 msgid "assignment" msgstr "" -#: fortran/parse.cc:2232 fortran/resolve.cc:12131 fortran/resolve.cc:12134 +#: fortran/parse.cc:2232 fortran/resolve.cc:12132 fortran/resolve.cc:12135 msgid "pointer assignment" msgstr "" @@ -21063,19 +21071,19 @@ msgstr "" msgid "ALLOCATE object" msgstr "" -#: fortran/resolve.cc:8243 fortran/resolve.cc:10214 fortran/resolve.cc:10335 +#: fortran/resolve.cc:8244 fortran/resolve.cc:10215 fortran/resolve.cc:10336 msgid "STAT variable" msgstr "" -#: fortran/resolve.cc:8294 fortran/resolve.cc:10226 fortran/resolve.cc:10347 +#: fortran/resolve.cc:8295 fortran/resolve.cc:10227 fortran/resolve.cc:10348 msgid "ERRMSG variable" msgstr "" -#: fortran/resolve.cc:10020 +#: fortran/resolve.cc:10021 msgid "item in READ" msgstr "" -#: fortran/resolve.cc:10238 +#: fortran/resolve.cc:10239 msgid "ACQUIRED_LOCK variable" msgstr "" @@ -21084,11 +21092,11 @@ msgstr "" msgid "Different CHARACTER lengths (%ld/%ld) in array constructor" msgstr "" -#: fortran/trans-array.cc:6137 +#: fortran/trans-array.cc:6184 msgid "Integer overflow when calculating the amount of memory to allocate" msgstr "" -#: fortran/trans-array.cc:10071 +#: fortran/trans-array.cc:10118 #, c-format msgid "The value of the PDT LEN parameter '%s' does not agree with that in the dummy declaration" msgstr "" @@ -21103,12 +21111,12 @@ msgstr "" msgid "Actual string length is shorter than the declared one for dummy argument '%s' (%ld/%ld)" msgstr "" -#: fortran/trans-expr.cc:10297 +#: fortran/trans-expr.cc:10304 #, c-format msgid "Target of rank remapping is too small (%ld < %ld)" msgstr "" -#: fortran/trans-expr.cc:11757 +#: fortran/trans-expr.cc:11764 msgid "Assignment of scalar to unallocated array" msgstr "" @@ -21229,26 +21237,26 @@ msgstr "" msgid "Array reference out of bounds" msgstr "" -#: fortran/trans.cc:708 fortran/trans.cc:783 +#: fortran/trans.cc:742 fortran/trans.cc:817 #, c-format msgid "Error allocating %lu bytes" msgstr "" -#: fortran/trans.cc:992 +#: fortran/trans.cc:1026 #, c-format msgid "Attempting to allocate already allocated variable '%s'" msgstr "" -#: fortran/trans.cc:998 +#: fortran/trans.cc:1032 msgid "Attempting to allocate already allocated variable" msgstr "" -#: fortran/trans.cc:1448 fortran/trans.cc:1607 +#: fortran/trans.cc:1482 fortran/trans.cc:1641 #, c-format msgid "Attempt to DEALLOCATE unallocated '%s'" msgstr "" -#: fortran/trans.cc:1765 +#: fortran/trans.cc:1799 #, fuzzy, c-format #| msgid "error writing to %s" msgid "Error reallocating to %lu bytes" @@ -21297,8 +21305,8 @@ msgstr "" msgid "expected boolean type" msgstr "" -#: go/gofrontend/expressions.cc:5221 c/c-parser.cc:15829 c/c-parser.cc:15836 -#: cp/parser.cc:38967 cp/parser.cc:38974 +#: go/gofrontend/expressions.cc:5221 c/c-parser.cc:15830 c/c-parser.cc:15837 +#: cp/parser.cc:38987 cp/parser.cc:38994 #, gcc-internal-format msgid "expected integer" msgstr "" @@ -21368,7 +21376,7 @@ msgstr "няма аргументаў" #: go/gofrontend/expressions.cc:10564 go/gofrontend/expressions.cc:10589 #: go/gofrontend/expressions.cc:11469 go/gofrontend/expressions.cc:12745 #: go/gofrontend/expressions.cc:12759 go/gofrontend/expressions.cc:12780 -#: cp/pt.cc:9148 +#: cp/pt.cc:9178 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function" msgid "too many arguments" @@ -21761,7 +21769,7 @@ msgstr "" #. coalesced sections. Weak aliases (or any other kind of aliases) are #. not supported. Weak symbols that aren't visible outside the .s file #. are not supported. -#: config/darwin.h:682 +#: config/darwin.h:677 #, fuzzy, gcc-internal-format msgid "alias definitions not supported in Mach-O; ignored" msgstr "-pipe не падтрымліваецца" @@ -21777,7 +21785,7 @@ msgstr "" msgid "target OS does not support unaligned accesses" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/c6x/c6x.h:346 config/nvptx/nvptx.h:192 +#: config/c6x/c6x.h:346 config/nvptx/nvptx.h:173 #, fuzzy, gcc-internal-format msgid "profiling is not yet implemented for this architecture" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" @@ -21948,7 +21956,7 @@ msgid "%<-maix64%> required: 64-bit computation with 32-bit addressing not yet s msgstr "" #: config/rs6000/aix71.h:48 config/rs6000/aix72.h:48 config/rs6000/aix73.h:48 -#: config/rs6000/rtems.h:121 config/rs6000/rs6000.cc:3515 +#: config/rs6000/rtems.h:124 config/rs6000/rs6000.cc:3515 #, gcc-internal-format msgid "%<-mcmodel%> incompatible with other toc options" msgstr "" @@ -21958,7 +21966,7 @@ msgstr "" msgid "% and long-double-128 are incompatible" msgstr "" -#: config/rs6000/rtems.h:114 config/rs6000/rs6000.cc:3507 +#: config/rs6000/rtems.h:117 config/rs6000/rs6000.cc:3507 #, gcc-internal-format msgid "%<-m64%> requires a PowerPC64 cpu" msgstr "" @@ -22145,17 +22153,17 @@ msgstr "нераспазнаная назва сэкцыі \"%s\"" msgid "unrecognized scalar storage order value %qs" msgstr "нераспазнаная назва сэкцыі \"%s\"" -#: d/lang.opt:193 +#: d/lang.opt:189 #, gcc-internal-format msgid "unknown array bounds setting %qs" msgstr "" -#: d/lang.opt:235 +#: d/lang.opt:231 #, fuzzy, gcc-internal-format msgid "unknown checkaction setting %qs" msgstr "невядомая назва рэгістра: %s\n" -#: d/lang.opt:291 +#: d/lang.opt:287 #, fuzzy, gcc-internal-format #| msgid "unknown C standard `%s'" msgid "unknown C++ standard %qs" @@ -22390,52 +22398,52 @@ msgstr "" #: attribs.cc:552 c-family/c-attribs.cc:912 c-family/c-attribs.cc:2410 #: c-family/c-attribs.cc:2856 c-family/c-attribs.cc:4682 -#: c-family/c-attribs.cc:4775 cp/decl.cc:15630 cp/decl.cc:15680 -#: cp/friend.cc:316 cp/tree.cc:5093 +#: c-family/c-attribs.cc:4775 cp/decl.cc:15684 cp/decl.cc:15734 +#: cp/friend.cc:316 cp/tree.cc:5127 #, fuzzy, gcc-internal-format msgid "previous declaration here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" #. Warn about and ignore all others for now, but store them. -#: attribs.cc:714 c-family/c-attribs.cc:3884 objc/objc-act.cc:5133 +#: attribs.cc:719 c-family/c-attribs.cc:3884 objc/objc-act.cc:5133 #: objc/objc-act.cc:7124 objc/objc-act.cc:8322 objc/objc-act.cc:8378 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "%qE attribute directive ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: attribs.cc:718 +#: attribs.cc:723 #, gcc-internal-format msgid "%<%E::%E%> scoped attribute directive ignored" msgstr "" -#: attribs.cc:730 +#: attribs.cc:735 #, fuzzy, gcc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments specified for %qE attribute" msgstr "памылковая колькасьць аргументаў, зададзеных для атрыбута `%s'" -#: attribs.cc:733 +#: attribs.cc:738 #, gcc-internal-format, gfc-internal-format msgid "expected %i or more, found %i" msgstr "" -#: attribs.cc:736 +#: attribs.cc:741 #, gcc-internal-format, gfc-internal-format msgid "expected between %i and %i, found %i" msgstr "" -#: attribs.cc:756 c-family/c-attribs.cc:4548 +#: attribs.cc:761 c-family/c-attribs.cc:4548 #, fuzzy, gcc-internal-format msgid "%qE attribute does not apply to types" msgstr "\"%s\" звычайна функцыя" -#: attribs.cc:805 +#: attribs.cc:810 #, fuzzy, gcc-internal-format msgid "%qE attribute only applies to function types" msgstr "\"%s\" звычайна функцыя" -#: attribs.cc:815 +#: attribs.cc:820 #, gcc-internal-format msgid "type attributes ignored after type is already defined" msgstr "" @@ -22448,7 +22456,7 @@ msgstr "" #. is a constraint violation if it is not one of the known #. standard attributes. Diagnose it here with a pedwarn and #. then discard it to prevent a duplicate warning later. -#: attribs.cc:873 attribs.cc:1824 attribs.cc:1834 attribs.cc:1844 +#: attribs.cc:878 attribs.cc:1829 attribs.cc:1839 attribs.cc:1849 #: c-family/c-attribs.cc:940 c-family/c-attribs.cc:1002 #: c-family/c-attribs.cc:1021 c-family/c-attribs.cc:1039 #: c-family/c-attribs.cc:1069 c-family/c-attribs.cc:1090 @@ -22478,14 +22486,14 @@ msgstr "" #: c-family/c-attribs.cc:5292 c-family/c-attribs.cc:5315 #: c-family/c-attribs.cc:5354 c-family/c-attribs.cc:5436 #: c-family/c-attribs.cc:5503 c-family/c-attribs.cc:5519 -#: c-family/c-attribs.cc:5687 c-family/c-common.cc:6035 -#: c-family/c-common.cc:6038 config/darwin.cc:2141 config/arm/arm.cc:7412 +#: c-family/c-attribs.cc:5687 c-family/c-common.cc:6037 +#: c-family/c-common.cc:6040 config/darwin.cc:2141 config/arm/arm.cc:7412 #: config/arm/arm.cc:7440 config/arm/arm.cc:7457 config/avr/avr.cc:9568 #: config/csky/csky.cc:6494 config/csky/csky.cc:6516 #: config/h8300/h8300.cc:4968 config/h8300/h8300.cc:4992 -#: config/i386/i386-options.cc:3381 config/i386/i386-options.cc:3539 -#: config/i386/i386-options.cc:3771 config/i386/i386-options.cc:3801 -#: config/ia64/ia64.cc:785 config/rs6000/rs6000.cc:20305 +#: config/i386/i386-options.cc:3375 config/i386/i386-options.cc:3533 +#: config/i386/i386-options.cc:3765 config/i386/i386-options.cc:3795 +#: config/ia64/ia64.cc:785 config/rs6000/rs6000.cc:20316 #: ada/gcc-interface/utils.cc:6582 ada/gcc-interface/utils.cc:6598 #: ada/gcc-interface/utils.cc:6636 ada/gcc-interface/utils.cc:6653 #: ada/gcc-interface/utils.cc:6670 ada/gcc-interface/utils.cc:6685 @@ -22504,76 +22512,76 @@ msgstr "" msgid "%qE attribute ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: attribs.cc:1148 +#: attribs.cc:1153 #, gcc-internal-format msgid "missing % attribute for multi-versioned %qD" msgstr "" -#: attribs.cc:1151 cp/decl.cc:1212 cp/decl.cc:2172 cp/decl.cc:2218 -#: cp/decl.cc:2234 cp/decl.cc:2853 cp/decl.cc:3299 +#: attribs.cc:1156 cp/decl.cc:1215 cp/decl.cc:2175 cp/decl.cc:2221 +#: cp/decl.cc:2237 cp/decl.cc:2870 cp/decl.cc:3316 #, fuzzy, gcc-internal-format #| msgid "previous declaration of `%D'" msgid "previous declaration of %qD" msgstr "папярэдняе абвяшчэньне `%D'" -#: attribs.cc:1260 +#: attribs.cc:1265 #, gcc-internal-format msgid "ignoring attributes applied to %qT after definition" msgstr "" -#: attribs.cc:1755 +#: attribs.cc:1760 #, gcc-internal-format msgid "%q+D already declared with dllexport attribute: dllimport ignored" msgstr "" -#: attribs.cc:1767 +#: attribs.cc:1772 #, gcc-internal-format msgid "%q+D redeclared without dllimport attribute after being referenced with dll linkage" msgstr "" -#: attribs.cc:1781 +#: attribs.cc:1786 #, gcc-internal-format msgid "%q+D redeclared without dllimport attribute: previous dllimport ignored" msgstr "" -#: attribs.cc:1862 +#: attribs.cc:1867 #, gcc-internal-format msgid "inline function %q+D declared as dllimport: attribute ignored" msgstr "" -#: attribs.cc:1870 +#: attribs.cc:1875 #, gcc-internal-format msgid "function %q+D definition is marked dllimport" msgstr "" -#: attribs.cc:1878 +#: attribs.cc:1883 #, gcc-internal-format msgid "variable %q+D definition is marked dllimport" msgstr "" -#: attribs.cc:1909 +#: attribs.cc:1914 #, gcc-internal-format msgid "external linkage required for symbol %q+D because of %qE attribute" msgstr "" -#: attribs.cc:1923 +#: attribs.cc:1928 #, gcc-internal-format msgid "%qE implies default visibility, but %qD has already been declared with a different visibility" msgstr "" -#: attribs.cc:2186 +#: attribs.cc:2191 #, gcc-internal-format msgid "%qD specifies more restrictive attribute than its target %qD: %s" msgid_plural "%qD specifies more restrictive attributes than its target %qD: %s" msgstr[0] "" msgstr[1] "" -#: attribs.cc:2192 attribs.cc:2212 +#: attribs.cc:2197 attribs.cc:2217 #, gcc-internal-format msgid "%qD target declared here" msgstr "" -#: attribs.cc:2206 +#: attribs.cc:2211 #, gcc-internal-format msgid "%qD specifies less restrictive attribute than its target %qD: %s" msgid_plural "%qD specifies less restrictive attributes than its target %qD: %s" @@ -22622,7 +22630,7 @@ msgstr "немагчыма знайсьці файл для кляса %s" msgid "offset %qwi outside bounds of constant string" msgstr "" -#: builtins.cc:704 gimple-ssa-warn-access.cc:4595 cp/name-lookup.cc:6414 +#: builtins.cc:704 gimple-ssa-warn-access.cc:4596 cp/name-lookup.cc:6415 #, gcc-internal-format msgid "%qE declared here" msgstr "" @@ -22647,114 +22655,114 @@ msgstr "аргумент `__builtin_args_info' павінен быць канс msgid "invalid third argument to %<__builtin_prefetch%>; using zero" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: builtins.cc:3713 gimple-fold.cc:2523 gimple-ssa-warn-access.cc:2541 -#: tree-ssa-strlen.cc:3192 +#: builtins.cc:3730 gimple-fold.cc:2526 gimple-ssa-warn-access.cc:2541 +#: tree-ssa-strlen.cc:3186 #, gcc-internal-format msgid "%qD specified bound %E equals destination size" msgstr "" -#: builtins.cc:4818 gimplify.cc:3600 +#: builtins.cc:4835 gimplify.cc:3600 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function `%s'" msgid "too few arguments to function %" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: builtins.cc:4918 +#: builtins.cc:4935 #, fuzzy, gcc-internal-format #| msgid "invalid use of `%D'" msgid "invalid argument to %qD" msgstr "нерэчаіснае выкарыстаньне `%D'" -#: builtins.cc:4931 +#: builtins.cc:4948 #, fuzzy, gcc-internal-format msgid "unsupported argument to %qD" msgstr "нехапае аргументаў у функцыі \"%s\"" #. Warn since no effort is made to ensure that any frame #. beyond the current one exists or can be safely reached. -#: builtins.cc:4939 +#: builtins.cc:4956 #, gcc-internal-format msgid "calling %qD with a nonzero argument is unsafe" msgstr "" -#: builtins.cc:5288 +#: builtins.cc:5305 #, fuzzy, gcc-internal-format #| msgid "argument of `__builtin_args_info' must be constant" msgid "both arguments to %<__builtin___clear_cache%> must be pointers" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: builtins.cc:5378 +#: builtins.cc:5395 #, fuzzy, gcc-internal-format msgid "trampoline generated for nested function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: builtins.cc:5752 builtins.cc:5765 +#: builtins.cc:5769 builtins.cc:5782 #, gcc-internal-format msgid "%qD changed semantics in GCC 4.4" msgstr "" -#: builtins.cc:6500 +#: builtins.cc:6552 #, fuzzy, gcc-internal-format msgid "non-constant argument 1 to %qs" msgstr "вельмі шмат аргументаў у функцыі \"%s\"" -#: builtins.cc:6542 +#: builtins.cc:6594 #, fuzzy, gcc-internal-format msgid "non-integer argument 1 to %qs" msgstr "аргумент для \"%s\" прапушчан" -#: builtins.cc:6606 +#: builtins.cc:6658 #, fuzzy, gcc-internal-format #| msgid "__builtin_saveregs not supported by this target" msgid "%<__builtin_thread_pointer%> is not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: builtins.cc:6626 +#: builtins.cc:6678 #, fuzzy, gcc-internal-format #| msgid "__builtin_saveregs not supported by this target" msgid "%<__builtin_set_thread_pointer%> is not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: builtins.cc:6685 +#: builtins.cc:6737 #, fuzzy, gcc-internal-format msgid "%qs only supported in OpenACC code" msgstr "-pipe не падтрымліваецца" -#: builtins.cc:6692 +#: builtins.cc:6744 #, fuzzy, gcc-internal-format msgid "non-constant argument 0 to %qs" msgstr "вельмі шмат аргументаў у функцыі \"%s\"" -#: builtins.cc:6704 +#: builtins.cc:6756 #, fuzzy, gcc-internal-format msgid "illegal argument 0 to %qs" msgstr "аргумент для \"%s\" прапушчан" #. All valid uses of __builtin_va_arg_pack () are removed during #. inlining. -#: builtins.cc:7182 expr.cc:11501 +#: builtins.cc:7234 expr.cc:11502 #, gcc-internal-format msgid "invalid use of %<__builtin_va_arg_pack ()%>" msgstr "" #. All valid uses of __builtin_va_arg_pack_len () are removed during #. inlining. -#: builtins.cc:7188 +#: builtins.cc:7240 #, gcc-internal-format msgid "invalid use of %<__builtin_va_arg_pack_len ()%>" msgstr "" -#: builtins.cc:7457 +#: builtins.cc:7509 #, gcc-internal-format msgid "%<__builtin_longjmp%> second argument must be 1" msgstr "" -#: builtins.cc:8354 +#: builtins.cc:8406 #, fuzzy, gcc-internal-format msgid "target format does not support infinity" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: builtins.cc:9976 +#: builtins.cc:10028 #, fuzzy, gcc-internal-format #| msgid "`va_start' used in function with fixed args" msgid "% used in function with fixed arguments" @@ -22762,40 +22770,40 @@ msgstr "" "`va_start' выкарыстоўвываецца ў функцыі з нязьменнай\n" " колькасьцю аргументаў" -#: builtins.cc:9984 +#: builtins.cc:10036 #, fuzzy, gcc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments to function %" msgstr "памылковая колькасьць аргументаў, зададзеных для атрыбута `%s'" -#: builtins.cc:9999 +#: builtins.cc:10051 #, fuzzy, gcc-internal-format #| msgid "`__builtin_next_arg' called without an argument" msgid "%<__builtin_next_arg%> called without an argument" msgstr "\"__buitin_next_arg\" выклікаецца без аргумента" -#: builtins.cc:10004 +#: builtins.cc:10056 #, fuzzy, gcc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments to function %<__builtin_next_arg%>" msgstr "памылковая колькасьць аргументаў, зададзеных для атрыбута `%s'" -#: builtins.cc:10037 +#: builtins.cc:10089 #, gcc-internal-format msgid "second parameter of % not last named argument" msgstr "" -#: builtins.cc:10050 +#: builtins.cc:10102 #, gcc-internal-format msgid "undefined behavior when second parameter of % is declared with % storage" msgstr "" -#: builtins.cc:10079 +#: builtins.cc:10131 #, fuzzy, gcc-internal-format msgid "first argument of %qD must be a pointer, second integer constant" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: builtins.cc:10092 +#: builtins.cc:10144 #, gcc-internal-format msgid "last argument of %qD is not integer constant between 0 and 3" msgstr "" @@ -23481,471 +23489,471 @@ msgstr "" msgid "number of bb notes in insn chain (%d) != n_basic_blocks (%d)" msgstr "" -#: cgraph.cc:3187 +#: cgraph.cc:3192 #, gcc-internal-format msgid "caller edge count invalid" msgstr "" -#: cgraph.cc:3283 +#: cgraph.cc:3288 #, gcc-internal-format msgid "missing indirect call in speculative call sequence" msgstr "" -#: cgraph.cc:3288 +#: cgraph.cc:3293 #, gcc-internal-format msgid "indirect call in speculative call sequence has no speculative flag" msgstr "" -#: cgraph.cc:3318 +#: cgraph.cc:3323 #, gcc-internal-format msgid "speculative edges are not adjacent" msgstr "" -#: cgraph.cc:3324 +#: cgraph.cc:3329 #, gcc-internal-format, gfc-internal-format msgid "direct call to %s in speculative call sequence has no speculative flag" msgstr "" -#: cgraph.cc:3330 cgraph.cc:3360 +#: cgraph.cc:3335 cgraph.cc:3365 #, gcc-internal-format, gfc-internal-format msgid "direct call to %s in speculative call sequence has speculative_id %i out of range" msgstr "" -#: cgraph.cc:3337 +#: cgraph.cc:3342 #, gcc-internal-format, gfc-internal-format msgid "duplicate direct call to %s in speculative call sequence with speculative_id %i" msgstr "" -#: cgraph.cc:3348 +#: cgraph.cc:3353 #, gcc-internal-format msgid "call stmt hash does not point to first direct edge of speculative call sequence" msgstr "" -#: cgraph.cc:3367 +#: cgraph.cc:3372 #, gcc-internal-format, gfc-internal-format msgid "duplicate reference %s in speculative call sequence with speculative_id %i" msgstr "" -#: cgraph.cc:3380 +#: cgraph.cc:3385 #, gcc-internal-format, gfc-internal-format msgid "missing direct call for speculation %i" msgstr "" -#: cgraph.cc:3385 +#: cgraph.cc:3390 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "missing ref for speculation %i" msgstr "аргумент для \"%s\" прапушчан" -#: cgraph.cc:3394 +#: cgraph.cc:3399 #, gcc-internal-format, gfc-internal-format msgid "number of speculative targets %i mismatched with num_speculative_call_targets %i" msgstr "" -#: cgraph.cc:3423 +#: cgraph.cc:3428 #, gcc-internal-format, gfc-internal-format msgid "aux field set for edge %s->%s" msgstr "" -#: cgraph.cc:3430 +#: cgraph.cc:3435 #, gcc-internal-format msgid "cgraph count invalid" msgstr "" -#: cgraph.cc:3435 +#: cgraph.cc:3440 #, gcc-internal-format msgid "inline clone in same comdat group list" msgstr "" -#: cgraph.cc:3440 +#: cgraph.cc:3445 #, gcc-internal-format msgid "inline clone count is not compatible" msgstr "" -#: cgraph.cc:3447 +#: cgraph.cc:3452 #, gcc-internal-format msgid "tp_first_run must be non-negative" msgstr "" -#: cgraph.cc:3452 +#: cgraph.cc:3457 #, fuzzy, gcc-internal-format #| msgid "label `%s' used but not defined" msgid "local symbols must be defined" msgstr "адмеціна `%s' выкарыстоўвываецца, але ня вызначана" -#: cgraph.cc:3457 +#: cgraph.cc:3462 #, gcc-internal-format msgid "externally visible inline clone" msgstr "" -#: cgraph.cc:3462 +#: cgraph.cc:3467 #, gcc-internal-format msgid "inline clone with address taken" msgstr "" -#: cgraph.cc:3467 +#: cgraph.cc:3472 #, gcc-internal-format msgid "inline clone is forced to output" msgstr "" -#: cgraph.cc:3474 +#: cgraph.cc:3479 #, gcc-internal-format msgid "calls_comdat_local is set outside of a comdat group" msgstr "" -#: cgraph.cc:3479 +#: cgraph.cc:3484 #, gcc-internal-format msgid "invalid calls_comdat_local flag" msgstr "" -#: cgraph.cc:3486 +#: cgraph.cc:3491 #, gcc-internal-format msgid "malloc attribute should be used for a function that returns a pointer" msgstr "" -#: cgraph.cc:3494 +#: cgraph.cc:3503 #, gcc-internal-format msgid "semantic interposition mismatch" msgstr "" -#: cgraph.cc:3501 +#: cgraph.cc:3510 #, gcc-internal-format, gfc-internal-format msgid "aux field set for indirect edge from %s" msgstr "" -#: cgraph.cc:3507 cgraph.cc:3567 +#: cgraph.cc:3516 cgraph.cc:3576 #, gcc-internal-format msgid "edge count is not compatible with function count" msgstr "" -#: cgraph.cc:3515 +#: cgraph.cc:3524 #, gcc-internal-format, gfc-internal-format msgid "An indirect edge from %s is not marked as indirect or has associated indirect_info, the corresponding statement is: " msgstr "" -#: cgraph.cc:3523 cgraph.cc:3594 +#: cgraph.cc:3532 cgraph.cc:3603 #, gcc-internal-format msgid "edge has both call_stmt and lto_stmt_uid set" msgstr "" -#: cgraph.cc:3535 +#: cgraph.cc:3544 #, gcc-internal-format, gfc-internal-format msgid "comdat-local function called by %s outside its comdat" msgstr "" -#: cgraph.cc:3545 +#: cgraph.cc:3554 #, gcc-internal-format msgid "inlined_to pointer is wrong" msgstr "" -#: cgraph.cc:3550 +#: cgraph.cc:3559 #, gcc-internal-format msgid "multiple inline callers" msgstr "" -#: cgraph.cc:3557 +#: cgraph.cc:3566 #, gcc-internal-format msgid "inlined_to pointer set for noninline callers" msgstr "" -#: cgraph.cc:3584 +#: cgraph.cc:3593 #, gcc-internal-format msgid "caller edge count does not match BB count" msgstr "" -#: cgraph.cc:3615 +#: cgraph.cc:3624 #, gcc-internal-format msgid "indirect call count does not match BB count" msgstr "" -#: cgraph.cc:3632 +#: cgraph.cc:3641 #, gcc-internal-format msgid "reference has both stmt and lto_stmt_uid set" msgstr "" -#: cgraph.cc:3643 +#: cgraph.cc:3652 #, gcc-internal-format msgid "inlined_to pointer is set but no predecessors found" msgstr "" -#: cgraph.cc:3648 +#: cgraph.cc:3657 #, gcc-internal-format msgid "inlined_to pointer refers to itself" msgstr "" -#: cgraph.cc:3659 +#: cgraph.cc:3668 #, gcc-internal-format msgid "cgraph_node has wrong clone_of" msgstr "" -#: cgraph.cc:3672 +#: cgraph.cc:3681 #, gcc-internal-format msgid "cgraph_node has wrong clone list" msgstr "" -#: cgraph.cc:3678 +#: cgraph.cc:3687 #, gcc-internal-format msgid "cgraph_node is in clone list but it is not clone" msgstr "" -#: cgraph.cc:3683 +#: cgraph.cc:3692 #, gcc-internal-format msgid "cgraph_node has wrong prev_clone pointer" msgstr "" -#: cgraph.cc:3688 +#: cgraph.cc:3697 #, gcc-internal-format msgid "double linked list of clones corrupted" msgstr "" -#: cgraph.cc:3700 +#: cgraph.cc:3709 #, gcc-internal-format msgid "Alias has call edges" msgstr "" -#: cgraph.cc:3706 +#: cgraph.cc:3715 #, gcc-internal-format msgid "Alias has non-alias reference" msgstr "" -#: cgraph.cc:3711 +#: cgraph.cc:3720 #, gcc-internal-format msgid "Alias has more than one alias reference" msgstr "" -#: cgraph.cc:3718 +#: cgraph.cc:3727 #, gcc-internal-format msgid "Analyzed alias has no reference" msgstr "" -#: cgraph.cc:3727 +#: cgraph.cc:3736 #, gcc-internal-format msgid "No edge out of thunk node" msgstr "" -#: cgraph.cc:3732 +#: cgraph.cc:3741 #, gcc-internal-format msgid "More than one edge out of thunk node" msgstr "" -#: cgraph.cc:3737 +#: cgraph.cc:3746 #, gcc-internal-format msgid "Thunk is not supposed to have body" msgstr "" -#: cgraph.cc:3771 +#: cgraph.cc:3780 #, gcc-internal-format msgid "shared call_stmt:" msgstr "" -#: cgraph.cc:3779 +#: cgraph.cc:3788 #, fuzzy, gcc-internal-format msgid "edge points to wrong declaration:" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cgraph.cc:3788 +#: cgraph.cc:3797 #, gcc-internal-format msgid "an indirect edge with unknown callee corresponding to a call_stmt with a known declaration:" msgstr "" -#: cgraph.cc:3798 +#: cgraph.cc:3807 #, gcc-internal-format msgid "missing callgraph edge for call stmt:" msgstr "" -#: cgraph.cc:3808 +#: cgraph.cc:3817 #, gcc-internal-format msgid "reference to dead statement" msgstr "" -#: cgraph.cc:3821 +#: cgraph.cc:3830 #, gcc-internal-format, gfc-internal-format msgid "edge %s->%s has no corresponding call_stmt" msgstr "" -#: cgraph.cc:3833 +#: cgraph.cc:3842 #, gcc-internal-format, gfc-internal-format msgid "an indirect edge from %s has no corresponding call_stmt" msgstr "" -#: cgraph.cc:3852 cgraph.cc:3865 +#: cgraph.cc:3861 cgraph.cc:3874 #, gcc-internal-format msgid "missing origin for a node in a nested list" msgstr "" -#: cgraph.cc:3857 +#: cgraph.cc:3866 #, gcc-internal-format msgid "origin points to a different parent" msgstr "" -#: cgraph.cc:3873 +#: cgraph.cc:3882 #, gcc-internal-format msgid "verify_cgraph_node failed" msgstr "" -#: cgraph.cc:3995 varpool.cc:304 +#: cgraph.cc:4004 varpool.cc:304 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "argument to `-%s' is missing" msgid "%s: section %s.%d is missing" msgstr "аргумент для \"-%s\" прапушчан" -#: cgraphunit.cc:743 +#: cgraphunit.cc:744 #, fuzzy, gcc-internal-format msgid "duplicate definition of a symbol version" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cgraphunit.cc:745 +#: cgraphunit.cc:746 #, gcc-internal-format msgid "same version was previously defined here" msgstr "" -#: cgraphunit.cc:751 +#: cgraphunit.cc:752 #, gcc-internal-format msgid "symbol needs to be defined to have a version" msgstr "" -#: cgraphunit.cc:757 +#: cgraphunit.cc:758 #, gcc-internal-format msgid "common symbol cannot be versioned" msgstr "" -#: cgraphunit.cc:763 +#: cgraphunit.cc:764 #, gcc-internal-format msgid "comdat symbol cannot be versioned" msgstr "" -#: cgraphunit.cc:769 +#: cgraphunit.cc:770 #, gcc-internal-format msgid "% cannot be versioned" msgstr "" -#: cgraphunit.cc:775 +#: cgraphunit.cc:776 #, gcc-internal-format msgid "versioned symbol must be public" msgstr "" -#: cgraphunit.cc:781 +#: cgraphunit.cc:782 #, gcc-internal-format msgid "versioned symbol must have default visibility" msgstr "" -#: cgraphunit.cc:814 +#: cgraphunit.cc:815 #, gcc-internal-format msgid "% attribute should be accompanied with an % attribute" msgstr "" -#: cgraphunit.cc:869 +#: cgraphunit.cc:870 #, fuzzy, gcc-internal-format msgid "% attribute is ignored on aliases" msgstr "\"%s\" атрыбут ігнарыруецца" -#: cgraphunit.cc:877 cgraphunit.cc:928 +#: cgraphunit.cc:878 cgraphunit.cc:929 #, gcc-internal-format msgid "% attribute have effect only on public objects" msgstr "" -#: cgraphunit.cc:888 +#: cgraphunit.cc:889 #, gcc-internal-format msgid "% attribute ignored because function is defined" msgstr "" -#: cgraphunit.cc:903 +#: cgraphunit.cc:904 #, gcc-internal-format msgid "% attribute ignored because function is defined" msgstr "" -#: cgraphunit.cc:911 +#: cgraphunit.cc:912 #, gcc-internal-format msgid "% function might not be inlinable" msgstr "" -#: cgraphunit.cc:936 +#: cgraphunit.cc:937 #, gcc-internal-format msgid "% attribute ignored because variable is initialized" msgstr "" #. include_self= #. TODO: Add OPT_Wundefined-inline. -#: cgraphunit.cc:1086 c/c-decl.cc:12194 +#: cgraphunit.cc:1087 c/c-decl.cc:12194 #, fuzzy, gcc-internal-format #| msgid "label `%s' used but not defined" msgid "%q+F used but never defined" msgstr "адмеціна `%s' выкарыстоўвываецца, але ня вызначана" -#: cgraphunit.cc:1088 c/c-decl.cc:12204 +#: cgraphunit.cc:1089 c/c-decl.cc:12204 #, gcc-internal-format msgid "%q+F declared % but never defined" msgstr "" -#: cgraphunit.cc:1133 +#: cgraphunit.cc:1134 #, fuzzy, gcc-internal-format #| msgid "label `%D' defined but not used" msgid "%qD defined but not used" msgstr "адмеціна `%D' вызначана, але не выкарыстоўваецца" -#: cgraphunit.cc:1468 +#: cgraphunit.cc:1469 #, gcc-internal-format msgid "% resolver for %qD must return %qT" msgstr "" -#: cgraphunit.cc:1471 cgraphunit.cc:1494 +#: cgraphunit.cc:1472 cgraphunit.cc:1495 #, gcc-internal-format msgid "resolver indirect function declared here" msgstr "" -#: cgraphunit.cc:1491 +#: cgraphunit.cc:1492 #, gcc-internal-format msgid "% resolver for %qD should return %qT" msgstr "" -#: cgraphunit.cc:1501 +#: cgraphunit.cc:1502 #, gcc-internal-format msgid "%qD alias between functions of incompatible types %qT and %qT" msgstr "" -#: cgraphunit.cc:1504 cgraphunit.cc:1586 +#: cgraphunit.cc:1505 cgraphunit.cc:1587 #, fuzzy, gcc-internal-format #| msgid "Invalid declaration" msgid "aliased declaration here" msgstr "Нерэчаіснае абвяшчэнне" -#: cgraphunit.cc:1542 c-family/c-pragma.cc:347 +#: cgraphunit.cc:1543 c-family/c-pragma.cc:347 #, gcc-internal-format msgid "%q+D aliased to undefined symbol %qE" msgstr "" -#: cgraphunit.cc:1558 +#: cgraphunit.cc:1559 #, gcc-internal-format msgid "%q+D aliased to external symbol %qE" msgstr "" -#: cgraphunit.cc:1583 +#: cgraphunit.cc:1584 #, gcc-internal-format msgid "%q+D alias between function and variable is not supported" msgstr "" -#: cgraphunit.cc:1657 +#: cgraphunit.cc:1658 #, gcc-internal-format msgid "failed to reclaim unneeded function" msgstr "" -#: cgraphunit.cc:1685 +#: cgraphunit.cc:1686 #, gcc-internal-format msgid "failed to reclaim unneeded function in same comdat group" msgstr "" -#: cgraphunit.cc:1861 +#: cgraphunit.cc:1862 #, fuzzy, gcc-internal-format #| msgid "size of return value of `%s' is %u bytes" msgid "size of return value of %q+D is %u bytes" msgstr "памер вяртаемага значэння \"%s\" %u байт" -#: cgraphunit.cc:1865 +#: cgraphunit.cc:1866 #, fuzzy, gcc-internal-format #| msgid "size of return value of `%s' is larger than %d bytes" msgid "size of return value of %q+D is larger than %wu bytes" msgstr "памер вяртаемага значэння \"%s\" больш чым %d байт" -#: cgraphunit.cc:2380 +#: cgraphunit.cc:2381 #, gcc-internal-format msgid "nodes with unreleased memory found" msgstr "" @@ -23987,7 +23995,7 @@ msgid "cannot find %qs" msgstr "[нельга знайсці %s]" #: collect-utils.cc:225 collect2.cc:2385 collect2.cc:2555 gcc.cc:3413 -#: gcc.cc:7704 +#: gcc.cc:7705 #, gcc-internal-format msgid "% failed: %m" msgstr "" @@ -24008,7 +24016,7 @@ msgstr "" msgid "ld returned %d exit status" msgstr "" -#: collect2.cc:913 gcc.cc:8223 config/gcn/mkoffload.cc:826 +#: collect2.cc:913 gcc.cc:8224 config/gcn/mkoffload.cc:826 #: config/i386/intelmic-mkoffload.cc:597 config/nvptx/mkoffload.cc:418 #, gcc-internal-format msgid "atexit failed" @@ -24019,13 +24027,13 @@ msgstr "" msgid "no arguments" msgstr "няма аргументаў" -#: collect2.cc:1283 opts.cc:1138 +#: collect2.cc:1283 opts.cc:1146 #, gcc-internal-format msgid "LTO support has not been enabled in this configuration" msgstr "" -#: collect2.cc:1324 graph.cc:55 lto-wrapper.cc:1707 lto-wrapper.cc:1763 -#: toplev.cc:1556 objc/objc-act.cc:461 +#: collect2.cc:1324 graph.cc:55 lto-wrapper.cc:1728 lto-wrapper.cc:1784 +#: toplev.cc:1532 objc/objc-act.cc:461 #, fuzzy, gcc-internal-format #| msgid "can't open %s" msgid "cannot open %s: %m" @@ -24046,7 +24054,7 @@ msgstr "" msgid "fclose %s: %m" msgstr "" -#: collect2.cc:2319 lto-wrapper.cc:1196 lto-wrapper.cc:1211 +#: collect2.cc:2319 lto-wrapper.cc:1202 lto-wrapper.cc:1217 #: lto/lto-object.cc:148 lto/lto-object.cc:182 lto/lto-object.cc:279 #: lto/lto-object.cc:336 lto/lto-object.cc:360 #, gcc-internal-format, gfc-internal-format @@ -24449,7 +24457,7 @@ msgstr "" msgid "% does not match %" msgstr "" -#: except.cc:3518 tree.cc:13878 value-prof.cc:537 +#: except.cc:3518 tree.cc:13975 value-prof.cc:541 #, gcc-internal-format msgid "%qs failed" msgstr "" @@ -24479,17 +24487,17 @@ msgstr "" msgid "write of %wu-bit data outside the bound of destination object, data truncated into %wu-bit" msgstr "" -#: expr.cc:11513 +#: expr.cc:11514 #, gcc-internal-format msgid "call to %qs declared with attribute error: %s" msgstr "" -#: expr.cc:11527 +#: expr.cc:11528 #, gcc-internal-format msgid "call to %qs declared with attribute warning: %s" msgstr "" -#: expr.cc:12565 +#: expr.cc:12566 #, gcc-internal-format msgid "assuming signed overflow does not occur when simplifying % to %" msgstr "" @@ -24525,37 +24533,37 @@ msgstr "" msgid "comparison is always %d due to width of bit-field" msgstr "" -#: fold-const.cc:6029 tree-ssa-reassoc.cc:2855 tree-ssa-reassoc.cc:3909 +#: fold-const.cc:6055 tree-ssa-reassoc.cc:2859 tree-ssa-reassoc.cc:3913 #, gcc-internal-format msgid "assuming signed overflow does not occur when simplifying range test" msgstr "" -#: fold-const.cc:6493 fold-const.cc:6509 +#: fold-const.cc:6519 fold-const.cc:6535 #, gcc-internal-format, gfc-internal-format msgid "comparison is always %d" msgstr "" -#: fold-const.cc:6657 +#: fold-const.cc:6683 #, gcc-internal-format msgid "% of unmatched not-equal tests is always 1" msgstr "" -#: fold-const.cc:6662 +#: fold-const.cc:6688 #, gcc-internal-format msgid "% of mutually exclusive equal-tests is always 0" msgstr "" -#: fold-const.cc:9879 +#: fold-const.cc:9915 #, gcc-internal-format msgid "assuming signed overflow does not occur when reducing constant in comparison" msgstr "" -#: fold-const.cc:10286 +#: fold-const.cc:10322 #, gcc-internal-format msgid "assuming signed overflow does not occur when combining constants around a comparison" msgstr "" -#: fold-const.cc:13551 +#: fold-const.cc:13591 #, gcc-internal-format msgid "fold check: original tree changed by fold" msgstr "" @@ -24672,12 +24680,12 @@ msgstr "" msgid "%<-pipe%> not supported" msgstr "-pipe не падтрымліваецца" -#: gcc.cc:3430 gcc.cc:7713 +#: gcc.cc:3430 gcc.cc:7714 #, gcc-internal-format msgid "cannot execute %qs: %s: %m" msgstr "" -#: gcc.cc:3431 gcc.cc:7714 +#: gcc.cc:3431 gcc.cc:7715 #, fuzzy, gcc-internal-format #| msgid "%s: can't delete file `%s': %s\n" msgid "cannot execute %qs: %s" @@ -24700,92 +24708,92 @@ msgstr "" msgid "%s signal terminated program %s" msgstr "Выкарыстоўвываць альтэрнатыўныя назвы рэгістраў" -#: gcc.cc:3985 opts-common.cc:1544 opts-common.cc:1576 +#: gcc.cc:3986 opts-common.cc:1544 opts-common.cc:1576 #, fuzzy, gcc-internal-format msgid "unrecognized command-line option %qs" msgstr "нераспазнаны выбар \"-%s\"" -#: gcc.cc:4027 +#: gcc.cc:4028 #, gcc-internal-format msgid "GCC is not configured to support %qs as %<-foffload=%> argument" msgstr "" -#: gcc.cc:4034 +#: gcc.cc:4035 #, gcc-internal-format msgid "valid %<-foffload=%> arguments are: %s; did you mean %qs?" msgstr "" -#: gcc.cc:4037 +#: gcc.cc:4038 #, gcc-internal-format msgid "valid %<-foffload=%> arguments are: %s" msgstr "" -#: gcc.cc:4057 +#: gcc.cc:4058 #, gcc-internal-format msgid "%<=%>options missing after %<-foffload-options=%>target" msgstr "" -#: gcc.cc:4444 +#: gcc.cc:4445 #, gcc-internal-format msgid "%qs is an unknown %<-save-temps%> option" msgstr "" -#: gcc.cc:4967 toplev.cc:717 +#: gcc.cc:4968 toplev.cc:717 #, gcc-internal-format msgid "input file %qs is the same as output file" msgstr "" -#: gcc.cc:4972 +#: gcc.cc:4973 #, fuzzy, gcc-internal-format msgid "output filename may not be empty" msgstr "не зададзены ўваходзячыя файлы" -#: gcc.cc:5357 +#: gcc.cc:5358 #, gcc-internal-format msgid "%<-pipe%> ignored because %<-save-temps%> specified" msgstr "" -#: gcc.cc:5445 +#: gcc.cc:5446 #, gcc-internal-format msgid "%<-x %s%> after last input file has no effect" msgstr "" -#: gcc.cc:5648 +#: gcc.cc:5649 #, gcc-internal-format msgid "unable to locate default linker script %qs in the library search paths" msgstr "" -#: gcc.cc:5855 +#: gcc.cc:5856 #, gcc-internal-format msgid "switch %qs does not start with %<-%>" msgstr "" -#: gcc.cc:5859 +#: gcc.cc:5860 #, gcc-internal-format msgid "spec-generated switch is just %<-%>" msgstr "" -#: gcc.cc:6080 +#: gcc.cc:6081 #, gcc-internal-format msgid "spec %qs invalid" msgstr "" -#: gcc.cc:6241 +#: gcc.cc:6242 #, gcc-internal-format msgid "spec %qs has invalid %<%%0%c%>" msgstr "" -#: gcc.cc:6520 +#: gcc.cc:6521 #, gcc-internal-format msgid "spec %qs has invalid %<%%W%c%>" msgstr "" -#: gcc.cc:6536 +#: gcc.cc:6537 #, gcc-internal-format msgid "spec %qs has invalid %<%%@%c%>" msgstr "" -#: gcc.cc:6555 +#: gcc.cc:6556 #, gcc-internal-format msgid "spec %qs has invalid %<%%x%c%>" msgstr "" @@ -24793,142 +24801,142 @@ msgstr "" #. Catch the case where a spec string contains something like #. '%{foo:%*}'. i.e. there is no * in the pattern on the left #. hand side of the :. -#: gcc.cc:6766 +#: gcc.cc:6767 #, gcc-internal-format msgid "spec failure: %<%%*%> has not been initialized by pattern match" msgstr "" -#: gcc.cc:6817 +#: gcc.cc:6818 #, fuzzy, gcc-internal-format msgid "spec failure: unrecognized spec option %qc" msgstr "нераспазнаны выбар \"-%s\"" -#: gcc.cc:6883 +#: gcc.cc:6884 #, fuzzy, gcc-internal-format msgid "unknown spec function %qs" msgstr "невядомы рэжым машыны \"%s\"" -#: gcc.cc:6913 +#: gcc.cc:6914 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function `%s'" msgid "error in arguments to spec function %qs" msgstr "вельмі шмат аргумэнтаў у функцыі `%s'" -#: gcc.cc:6972 +#: gcc.cc:6973 #, gcc-internal-format msgid "malformed spec function name" msgstr "" #. ) -#: gcc.cc:6975 +#: gcc.cc:6976 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function" msgid "no arguments for spec function" msgstr "не хапае аргументаў у функцыі" -#: gcc.cc:6994 +#: gcc.cc:6995 #, gcc-internal-format msgid "malformed spec function arguments" msgstr "" -#: gcc.cc:7173 +#: gcc.cc:7174 #, gcc-internal-format msgid "braced spec %qs ends in escape" msgstr "" -#: gcc.cc:7308 +#: gcc.cc:7309 #, gcc-internal-format msgid "braced spec %qs is invalid at %qc" msgstr "" -#: gcc.cc:7403 +#: gcc.cc:7404 #, gcc-internal-format msgid "braced spec body %qs is invalid" msgstr "" -#: gcc.cc:8012 +#: gcc.cc:8013 #, gcc-internal-format, gfc-internal-format msgid "%s: could not determine length of compare-debug file %s" msgstr "" -#: gcc.cc:8023 +#: gcc.cc:8024 #, gcc-internal-format msgid "%s: %<-fcompare-debug%> failure (length)" msgstr "" -#: gcc.cc:8033 gcc.cc:8074 +#: gcc.cc:8034 gcc.cc:8075 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "Could not open data file %s.\n" msgid "%s: could not open compare-debug file %s" msgstr "Немагчыма адчыніць файл з дадзенымі %s.\n" -#: gcc.cc:8053 gcc.cc:8090 +#: gcc.cc:8054 gcc.cc:8091 #, gcc-internal-format msgid "%s: %<-fcompare-debug%> failure" msgstr "" -#: gcc.cc:8393 +#: gcc.cc:8394 #, gcc-internal-format msgid "spec failure: more than one argument to %" msgstr "" -#: gcc.cc:8418 +#: gcc.cc:8419 #, gcc-internal-format msgid "spec failure: more than one argument to %" msgstr "" -#: gcc.cc:8625 +#: gcc.cc:8626 #, gcc-internal-format msgid "unrecognized command-line option %<-%s%>; did you mean %<-%s%>?" msgstr "" -#: gcc.cc:8629 +#: gcc.cc:8630 #, fuzzy, gcc-internal-format #| msgid "unrecognized option `-%s'" msgid "unrecognized command-line option %<-%s%>" msgstr "нераспазнаны выбар \"-%s\"" -#: gcc.cc:8755 +#: gcc.cc:8756 #, gcc-internal-format msgid "not configured with sysroot headers suffix" msgstr "" -#: gcc.cc:8816 +#: gcc.cc:8817 #, fuzzy, gcc-internal-format msgid "no input files" msgstr "няма ўваходзячых файлаў" -#: gcc.cc:8867 +#: gcc.cc:8868 #, gcc-internal-format msgid "cannot specify %<-o%> with %<-c%>, %<-S%> or %<-E%> with multiple files" msgstr "" -#: gcc.cc:8909 +#: gcc.cc:8910 #, gcc-internal-format, gfc-internal-format msgid "%s: %s compiler not installed on this system" msgstr "%s: %s кампілятар не ўсталяваны на гэтай сістэме" -#: gcc.cc:8934 +#: gcc.cc:8935 #, gcc-internal-format msgid "recompiling with %<-fcompare-debug%>" msgstr "" -#: gcc.cc:8950 +#: gcc.cc:8951 #, gcc-internal-format msgid "during %<-fcompare-debug%> recompilation" msgstr "" -#: gcc.cc:8959 +#: gcc.cc:8960 #, gcc-internal-format msgid "comparing final insns dumps" msgstr "" -#: gcc.cc:9112 +#: gcc.cc:9113 #, gcc-internal-format msgid "%<-fuse-linker-plugin%>, but %s not found" msgstr "" -#: gcc.cc:9146 +#: gcc.cc:9147 #, gcc-internal-format, gfc-internal-format msgid "%s: linker input file unused because linking not done" msgstr "" @@ -24936,97 +24944,97 @@ msgstr "" #. This is can be an indication the user specifed an errorneous #. separated option value, (or used the wrong prefix for an #. option). -#: gcc.cc:9152 +#: gcc.cc:9153 #, gcc-internal-format msgid "%s: linker input file not found: %m" msgstr "" -#: gcc.cc:9248 c-family/c-opts.cc:793 +#: gcc.cc:9249 c-family/c-opts.cc:793 #, gcc-internal-format msgid "cannot use %<-%> as input filename for a precompiled header" msgstr "" -#: gcc.cc:9254 +#: gcc.cc:9255 #, gcc-internal-format, gfc-internal-format msgid "language %s not recognized" msgstr "мова %s не распазнана" -#: gcc.cc:9494 +#: gcc.cc:9495 #, fuzzy, gcc-internal-format msgid "multilib spec %qs is invalid" msgstr "параметр \"%s\" ініцыялізаваны" -#: gcc.cc:9696 +#: gcc.cc:9697 #, gcc-internal-format msgid "multilib exclusions %qs is invalid" msgstr "" -#: gcc.cc:9760 +#: gcc.cc:9761 #, gcc-internal-format msgid "multilib select %qs %qs is invalid" msgstr "" -#: gcc.cc:9923 +#: gcc.cc:9924 #, fuzzy, gcc-internal-format msgid "multilib select %qs is invalid" msgstr "параметр \"%s\" ініцыялізаваны" -#: gcc.cc:9963 +#: gcc.cc:9964 #, gcc-internal-format msgid "multilib exclusion %qs is invalid" msgstr "" -#: gcc.cc:10214 +#: gcc.cc:10215 #, gcc-internal-format msgid "environment variable %qs not defined" msgstr "" -#: gcc.cc:10381 gcc.cc:10386 +#: gcc.cc:10382 gcc.cc:10387 #, fuzzy, gcc-internal-format msgid "invalid version number %qs" msgstr "нявернае выкарыстанне \"restict\"" -#: gcc.cc:10429 +#: gcc.cc:10430 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "too few arguments to function" msgid "too few arguments to %%:version-compare" msgstr "не хапае аргументаў у функцыі" -#: gcc.cc:10435 +#: gcc.cc:10436 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "too many arguments to function" msgid "too many arguments to %%:version-compare" msgstr "вельмі шмат аргументаў у функцыі" -#: gcc.cc:10477 +#: gcc.cc:10478 #, gcc-internal-format msgid "unknown operator %qs in %%:version-compare" msgstr "" -#: gcc.cc:10601 +#: gcc.cc:10602 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "too many arguments to function" msgid "too many arguments to %%:compare-debug-dump-opt" msgstr "вельмі шмат аргументаў у функцыі" -#: gcc.cc:10669 +#: gcc.cc:10670 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "too many arguments to function" msgid "too many arguments to %%:compare-debug-self-opt" msgstr "вельмі шмат аргументаў у функцыі" -#: gcc.cc:10756 +#: gcc.cc:10757 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "too many arguments for %%:dumps" msgstr "вельмі шмат аргументаў у функцыі \"%s\"" -#: gcc.cc:10860 +#: gcc.cc:10861 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments to %%:debug-level-gt" msgstr "памылковая колькасьць аргументаў, зададзеных для атрыбута `%s'" -#: gcc.cc:10881 +#: gcc.cc:10882 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments to %%:dwarf-version-gt" @@ -25242,47 +25250,47 @@ msgstr "" msgid "array subscript %wu is above array bounds of %qT" msgstr "" -#: gimple-fold.cc:2079 gimple-fold.cc:3130 gimple-ssa-warn-restrict.cc:2073 +#: gimple-fold.cc:2082 gimple-fold.cc:3133 gimple-ssa-warn-restrict.cc:2077 #, gcc-internal-format msgid "%qD source argument is the same as destination" msgstr "" -#: gimple-fold.cc:2145 +#: gimple-fold.cc:2148 #, gcc-internal-format msgid "%qD destination unchanged after copying no bytes from a string of length %E" msgstr "" -#: gimple-fold.cc:2150 +#: gimple-fold.cc:2153 #, gcc-internal-format msgid "%qD destination unchanged after copying no bytes" msgstr "" -#: gimple-fold.cc:2525 gimple-ssa-warn-access.cc:856 +#: gimple-fold.cc:2528 gimple-ssa-warn-access.cc:856 #, gcc-internal-format msgid "%qD specified bound %E exceeds destination size %E" msgstr "" -#: gimple-fold.cc:2544 +#: gimple-fold.cc:2547 #, gcc-internal-format msgid "%qD specified bound %E equals source length" msgstr "" -#: gimple-fold.cc:4542 gimple-fold.cc:4746 +#: gimple-fold.cc:4545 gimple-fold.cc:4749 #, gcc-internal-format msgid "flexible array member %qD does not have well defined padding bits for %qs" msgstr "" -#: gimple-fold.cc:4695 cp/constexpr.cc:4357 +#: gimple-fold.cc:4698 cp/constexpr.cc:4372 #, gcc-internal-format msgid "PDP11 bit-field handling unsupported in %qs" msgstr "" -#: gimple-fold.cc:4922 +#: gimple-fold.cc:4926 #, gcc-internal-format, gfc-internal-format msgid "%s not supported for variable length aggregates" msgstr "" -#: gimple-fold.cc:4928 +#: gimple-fold.cc:4932 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "%s not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" @@ -25308,15 +25316,15 @@ msgid "function returns address of local variable" msgstr "" #: gimple-ssa-isolate-paths.cc:417 gimple-ssa-warn-access.cc:2028 -#: gimple-ssa-warn-access.cc:3693 tree.cc:12117 tree.cc:12154 tree.cc:12195 -#: tree.cc:12228 c/c-typeck.cc:2991 c/c-typeck.cc:3084 c/c-typeck.cc:5634 +#: gimple-ssa-warn-access.cc:3693 tree.cc:12212 tree.cc:12249 tree.cc:12290 +#: tree.cc:12323 c/c-typeck.cc:2991 c/c-typeck.cc:3084 c/c-typeck.cc:5634 #: c/c-typeck.cc:10895 c/c-typeck.cc:10912 c/gimple-parser.cc:2468 -#: c/gimple-parser.cc:2476 cp/call.cc:7606 cp/call.cc:9681 cp/constexpr.cc:853 -#: cp/constexpr.cc:3814 cp/cvt.cc:1075 cp/cvt.cc:1113 cp/decl.cc:8620 -#: cp/decl.cc:15832 cp/decl.cc:16199 cp/decl2.cc:5818 cp/decl2.cc:5873 -#: cp/parser.cc:21696 cp/pt.cc:8956 cp/semantics.cc:2149 cp/semantics.cc:3464 -#: cp/semantics.cc:4547 cp/typeck.cc:1991 cp/typeck.cc:2210 cp/typeck.cc:4341 -#: cp/typeck.cc:10189 +#: c/gimple-parser.cc:2476 cp/call.cc:7622 cp/call.cc:9697 cp/constexpr.cc:853 +#: cp/constexpr.cc:3822 cp/cvt.cc:1075 cp/cvt.cc:1113 cp/decl.cc:8671 +#: cp/decl.cc:15886 cp/decl.cc:16253 cp/decl2.cc:5859 cp/decl2.cc:5914 +#: cp/parser.cc:21707 cp/pt.cc:8986 cp/semantics.cc:2165 cp/semantics.cc:3480 +#: cp/semantics.cc:4563 cp/typeck.cc:1991 cp/typeck.cc:2210 cp/typeck.cc:4341 +#: cp/typeck.cc:10195 #, fuzzy, gcc-internal-format #| msgid "called from here" msgid "declared here" @@ -25327,366 +25335,366 @@ msgstr "выклікана адсюль" msgid "% argument %qD compared to NULL" msgstr "" -#: gimple-ssa-sprintf.cc:2814 gimple-ssa-sprintf.cc:2934 +#: gimple-ssa-sprintf.cc:2825 gimple-ssa-sprintf.cc:2945 #, gcc-internal-format msgid "%qE output may be truncated before the last format character" msgstr "" -#: gimple-ssa-sprintf.cc:2816 gimple-ssa-sprintf.cc:2936 +#: gimple-ssa-sprintf.cc:2827 gimple-ssa-sprintf.cc:2947 #, gcc-internal-format msgid "%qE output truncated before the last format character" msgstr "" -#: gimple-ssa-sprintf.cc:2819 gimple-ssa-sprintf.cc:2939 +#: gimple-ssa-sprintf.cc:2830 gimple-ssa-sprintf.cc:2950 #, gcc-internal-format msgid "%qE may write a terminating nul past the end of the destination" msgstr "" -#: gimple-ssa-sprintf.cc:2821 gimple-ssa-sprintf.cc:2941 +#: gimple-ssa-sprintf.cc:2832 gimple-ssa-sprintf.cc:2952 #, gcc-internal-format msgid "%qE writing a terminating nul past the end of the destination" msgstr "" -#: gimple-ssa-sprintf.cc:2831 +#: gimple-ssa-sprintf.cc:2842 #, gcc-internal-format msgid "%<%.*s%> directive writing %wu byte into a region of size %wu" msgid_plural "%<%.*s%> directive writing %wu bytes into a region of size %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2838 +#: gimple-ssa-sprintf.cc:2849 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing %wu byte into a region of size %wu" msgid_plural "%<%.*s%> directive output may be truncated writing %wu bytes into a region of size %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2845 +#: gimple-ssa-sprintf.cc:2856 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing %wu byte into a region of size %wu" msgid_plural "%<%.*s%> directive output truncated writing %wu bytes into a region of size %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2856 +#: gimple-ssa-sprintf.cc:2867 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing up to %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2859 +#: gimple-ssa-sprintf.cc:2870 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing up to %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2861 +#: gimple-ssa-sprintf.cc:2872 #, gcc-internal-format msgid "%<%.*s%> directive writing up to %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2873 +#: gimple-ssa-sprintf.cc:2884 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing likely %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2876 +#: gimple-ssa-sprintf.cc:2887 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing likely %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2879 +#: gimple-ssa-sprintf.cc:2890 #, gcc-internal-format msgid "%<%.*s%> directive writing likely %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2888 +#: gimple-ssa-sprintf.cc:2899 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing between %wu and %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2891 +#: gimple-ssa-sprintf.cc:2902 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing between %wu and %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2894 +#: gimple-ssa-sprintf.cc:2905 #, gcc-internal-format msgid "%<%.*s%> directive writing between %wu and %wu bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2903 +#: gimple-ssa-sprintf.cc:2914 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2906 +#: gimple-ssa-sprintf.cc:2917 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2908 +#: gimple-ssa-sprintf.cc:2919 #, gcc-internal-format msgid "%<%.*s%> directive writing %wu or more bytes into a region of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2950 +#: gimple-ssa-sprintf.cc:2961 #, gcc-internal-format msgid "%<%.*s%> directive writing %wu byte into a region of size between %wu and %wu" msgid_plural "%<%.*s%> directive writing %wu bytes into a region of size between %wu and %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2957 +#: gimple-ssa-sprintf.cc:2968 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing %wu byte into a region of size between %wu and %wu" msgid_plural "%<%.*s%> directive output may be truncated writing %wu bytes into a region of size between %wu and %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2965 +#: gimple-ssa-sprintf.cc:2976 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing %wu byte into a region of size between %wu and %wu" msgid_plural "%<%.*s%> directive output truncated writing %wu bytes into a region of size between %wu and %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:2977 +#: gimple-ssa-sprintf.cc:2988 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing up to %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2980 +#: gimple-ssa-sprintf.cc:2991 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing up to %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2983 +#: gimple-ssa-sprintf.cc:2994 #, gcc-internal-format msgid "%<%.*s%> directive writing up to %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2996 +#: gimple-ssa-sprintf.cc:3007 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing likely %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:2999 +#: gimple-ssa-sprintf.cc:3010 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing likely %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3002 +#: gimple-ssa-sprintf.cc:3013 #, gcc-internal-format msgid "%<%.*s%> directive writing likely %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3012 +#: gimple-ssa-sprintf.cc:3023 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing between %wu and %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3015 +#: gimple-ssa-sprintf.cc:3026 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing between %wu and %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3018 +#: gimple-ssa-sprintf.cc:3029 #, gcc-internal-format msgid "%<%.*s%> directive writing between %wu and %wu bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3027 +#: gimple-ssa-sprintf.cc:3038 #, gcc-internal-format msgid "%<%.*s%> directive output may be truncated writing %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3030 +#: gimple-ssa-sprintf.cc:3041 #, gcc-internal-format msgid "%<%.*s%> directive output truncated writing %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3033 +#: gimple-ssa-sprintf.cc:3044 #, gcc-internal-format msgid "%<%.*s%> directive writing %wu or more bytes into a region of size between %wu and %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3155 +#: gimple-ssa-sprintf.cc:3166 #, gcc-internal-format msgid "%<%.*s%> directive argument is null" msgstr "" -#: gimple-ssa-sprintf.cc:3233 +#: gimple-ssa-sprintf.cc:3244 #, gcc-internal-format msgid "%<%.*s%> directive output of %wu bytes exceeds minimum required size of 4095" msgstr "" -#: gimple-ssa-sprintf.cc:3239 +#: gimple-ssa-sprintf.cc:3250 #, gcc-internal-format msgid "%<%.*s%> directive output between %wu and %wu bytes exceeds minimum required size of 4095" msgstr "" -#: gimple-ssa-sprintf.cc:3246 +#: gimple-ssa-sprintf.cc:3257 #, gcc-internal-format msgid "%<%.*s%> directive output between %wu and %wu bytes may exceed minimum required size of 4095" msgstr "" -#: gimple-ssa-sprintf.cc:3276 +#: gimple-ssa-sprintf.cc:3287 #, gcc-internal-format msgid "%<%.*s%> directive output of %wu bytes exceeds %" msgstr "" -#: gimple-ssa-sprintf.cc:3282 +#: gimple-ssa-sprintf.cc:3293 #, gcc-internal-format msgid "%<%.*s%> directive output between %wu and %wu bytes exceeds %" msgstr "" -#: gimple-ssa-sprintf.cc:3293 +#: gimple-ssa-sprintf.cc:3304 #, gcc-internal-format msgid "%<%.*s%> directive output of %wu bytes causes result to exceed %" msgstr "" -#: gimple-ssa-sprintf.cc:3299 +#: gimple-ssa-sprintf.cc:3310 #, gcc-internal-format msgid "%<%.*s%> directive output between %wu and %wu bytes causes result to exceed %" msgstr "" -#: gimple-ssa-sprintf.cc:3310 +#: gimple-ssa-sprintf.cc:3321 #, gcc-internal-format msgid "%<%.*s%> directive output between %wu and %wu bytes may cause result to exceed %" msgstr "" -#: gimple-ssa-sprintf.cc:3320 +#: gimple-ssa-sprintf.cc:3331 #, gcc-internal-format msgid "%<%.*s%> directive argument is not a nul-terminated string" msgstr "" -#: gimple-ssa-sprintf.cc:3326 gimple-ssa-warn-access.cc:232 +#: gimple-ssa-sprintf.cc:3337 gimple-ssa-warn-access.cc:232 #, gcc-internal-format msgid "referenced argument declared here" msgstr "" -#: gimple-ssa-sprintf.cc:3333 +#: gimple-ssa-sprintf.cc:3344 #, gcc-internal-format msgid "assuming directive output of %wu byte" msgid_plural "assuming directive output of %wu bytes" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:3340 +#: gimple-ssa-sprintf.cc:3351 #, gcc-internal-format msgid "directive argument %qE" msgstr "" -#: gimple-ssa-sprintf.cc:3342 +#: gimple-ssa-sprintf.cc:3353 #, gcc-internal-format msgid "directive argument in the range [%E, %E]" msgstr "" -#: gimple-ssa-sprintf.cc:3346 +#: gimple-ssa-sprintf.cc:3357 #, gcc-internal-format msgid "using the range [%E, %E] for directive argument" msgstr "" -#: gimple-ssa-sprintf.cc:3366 +#: gimple-ssa-sprintf.cc:3377 #, gcc-internal-format msgid "%qE output %wu byte into a destination of size %wu" msgid_plural "%qE output %wu bytes into a destination of size %wu" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:3371 +#: gimple-ssa-sprintf.cc:3382 #, gcc-internal-format msgid "%qE output between %wu and %wu bytes into a destination of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3376 +#: gimple-ssa-sprintf.cc:3387 #, gcc-internal-format msgid "%qE output %wu or more bytes (assuming %wu) into a destination of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3381 +#: gimple-ssa-sprintf.cc:3392 #, gcc-internal-format msgid "%qE output %wu or more bytes into a destination of size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:3392 +#: gimple-ssa-sprintf.cc:3403 #, gcc-internal-format msgid "%qE output %wu byte" msgid_plural "%qE output %wu bytes" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:3396 +#: gimple-ssa-sprintf.cc:3407 #, gcc-internal-format msgid "%qE output between %wu and %wu bytes" msgstr "" -#: gimple-ssa-sprintf.cc:3400 +#: gimple-ssa-sprintf.cc:3411 #, gcc-internal-format msgid "%qE output %wu or more bytes (assuming %wu)" msgstr "" -#: gimple-ssa-sprintf.cc:3404 +#: gimple-ssa-sprintf.cc:3415 #, gcc-internal-format msgid "%qE output %wu or more bytes" msgstr "" -#: gimple-ssa-sprintf.cc:3783 +#: gimple-ssa-sprintf.cc:3794 #, gcc-internal-format msgid "%<%.*s%> directive width out of range" msgstr "" -#: gimple-ssa-sprintf.cc:3817 +#: gimple-ssa-sprintf.cc:3828 #, gcc-internal-format msgid "%<%.*s%> directive precision out of range" msgstr "" -#: gimple-ssa-sprintf.cc:3950 +#: gimple-ssa-sprintf.cc:3961 msgid "%qE arguments %Z and maybe %Z overlap destination object %qE" msgstr "" -#: gimple-ssa-sprintf.cc:3962 +#: gimple-ssa-sprintf.cc:3973 msgid "%qE argument %Z overlaps destination object %qE" msgid_plural "%qE arguments %Z overlap destination object %qE" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:3973 +#: gimple-ssa-sprintf.cc:3984 msgid "%qE argument %Z may overlap destination object %qE" msgid_plural "%qE arguments %Z may overlap destination object %qE" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-sprintf.cc:3993 +#: gimple-ssa-sprintf.cc:4004 #, gcc-internal-format msgid "destination object referenced by %-qualified argument 1 was declared here" msgstr "" -#: gimple-ssa-sprintf.cc:4579 +#: gimple-ssa-sprintf.cc:4590 #, gcc-internal-format msgid "specified bound %wu exceeds maximum object size %wu" msgstr "" -#: gimple-ssa-sprintf.cc:4590 +#: gimple-ssa-sprintf.cc:4601 #, gcc-internal-format msgid "specified bound %wu exceeds %" msgstr "" -#: gimple-ssa-sprintf.cc:4616 +#: gimple-ssa-sprintf.cc:4627 #, gcc-internal-format msgid "specified bound range [%wu, %wu] exceeds %" msgstr "" -#: gimple-ssa-sprintf.cc:4660 +#: gimple-ssa-sprintf.cc:4671 #, gcc-internal-format msgid "null destination pointer" msgstr "" -#: gimple-ssa-sprintf.cc:4677 +#: gimple-ssa-sprintf.cc:4688 #, gcc-internal-format msgid "specified bound %wu exceeds the size %wu of the destination object" msgstr "" -#: gimple-ssa-sprintf.cc:4689 +#: gimple-ssa-sprintf.cc:4700 #, gcc-internal-format msgid "null format string" msgstr "" @@ -26415,80 +26423,80 @@ msgstr "" msgid "call to %qD here" msgstr "выклікана адсюль" -#: gimple-ssa-warn-access.cc:3935 +#: gimple-ssa-warn-access.cc:3936 #, gcc-internal-format msgid "dangling pointer %qE to %qD may be used" msgstr "" -#: gimple-ssa-warn-access.cc:3936 +#: gimple-ssa-warn-access.cc:3937 #, gcc-internal-format msgid "using dangling pointer %qE to %qD" msgstr "" -#: gimple-ssa-warn-access.cc:3941 +#: gimple-ssa-warn-access.cc:3942 #, gcc-internal-format msgid "dangling pointer to %qD may be used" msgstr "" -#: gimple-ssa-warn-access.cc:3942 +#: gimple-ssa-warn-access.cc:3943 #, gcc-internal-format msgid "using a dangling pointer to %qD" msgstr "" -#: gimple-ssa-warn-access.cc:3945 gimple-ssa-warn-access.cc:4587 -#: gimple-ssa-warn-restrict.cc:1823 tree-ssa-uninit.cc:900 -#: tree-ssa-uninit.cc:1066 c/c-decl.cc:3893 c/c-decl.cc:4166 +#: gimple-ssa-warn-access.cc:3946 gimple-ssa-warn-access.cc:4588 +#: gimple-ssa-warn-restrict.cc:1827 tree-ssa-uninit.cc:903 +#: tree-ssa-uninit.cc:1069 c/c-decl.cc:3893 c/c-decl.cc:4166 #: c/c-typeck.cc:8987 c/c-typeck.cc:11696 cp/class.cc:1492 cp/class.cc:3276 -#: cp/constexpr.cc:1012 cp/decl.cc:4290 cp/decl.cc:12341 cp/decl.cc:12824 -#: cp/decl.cc:12833 cp/friend.cc:404 cp/friend.cc:414 cp/init.cc:2888 +#: cp/constexpr.cc:1013 cp/decl.cc:4307 cp/decl.cc:12394 cp/decl.cc:12877 +#: cp/decl.cc:12886 cp/friend.cc:404 cp/friend.cc:414 cp/init.cc:2892 #: cp/parser.cc:3488 cp/parser.cc:3634 cp/parser.cc:3685 cp/parser.cc:6882 -#: cp/parser.cc:24226 cp/typeck.cc:4777 +#: cp/parser.cc:24237 cp/typeck.cc:4777 #, fuzzy, gcc-internal-format msgid "%qD declared here" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: gimple-ssa-warn-access.cc:3953 +#: gimple-ssa-warn-access.cc:3954 #, gcc-internal-format msgid "dangling pointer %qE to an unnamed temporary may be used" msgstr "" -#: gimple-ssa-warn-access.cc:3955 +#: gimple-ssa-warn-access.cc:3956 #, gcc-internal-format msgid "using dangling pointer %qE to an unnamed temporary" msgstr "" -#: gimple-ssa-warn-access.cc:3961 +#: gimple-ssa-warn-access.cc:3962 #, gcc-internal-format msgid "dangling pointer to an unnamed temporary may be used" msgstr "" -#: gimple-ssa-warn-access.cc:3963 +#: gimple-ssa-warn-access.cc:3964 #, gcc-internal-format msgid "using a dangling pointer to an unnamed temporary" msgstr "" -#: gimple-ssa-warn-access.cc:3967 +#: gimple-ssa-warn-access.cc:3968 #, fuzzy, gcc-internal-format #| msgid "cannot create temporary file" msgid "unnamed temporary defined here" msgstr "немагчыма стварыць часовы файл" -#: gimple-ssa-warn-access.cc:4057 +#: gimple-ssa-warn-access.cc:4058 #, gcc-internal-format msgid "%qD called on pointer %qE passed to mismatched allocation function %qD" msgstr "" -#: gimple-ssa-warn-access.cc:4062 +#: gimple-ssa-warn-access.cc:4063 #, gcc-internal-format msgid "%qD called on a pointer passed to mismatched reallocation function %qD" msgstr "" -#: gimple-ssa-warn-access.cc:4068 +#: gimple-ssa-warn-access.cc:4069 #, gcc-internal-format msgid "call to %qD" msgstr "" -#: gimple-ssa-warn-access.cc:4581 +#: gimple-ssa-warn-access.cc:4582 #, gcc-internal-format msgid "storing the address of local variable %qD in %qE" msgstr "" @@ -26554,199 +26562,199 @@ msgstr "" msgid "argument to % is zero" msgstr "" -#: gimple-ssa-warn-restrict.cc:1491 +#: gimple-ssa-warn-restrict.cc:1495 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s overlaps %wu byte at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1493 +#: gimple-ssa-warn-restrict.cc:1497 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s overlaps %wu bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1497 +#: gimple-ssa-warn-restrict.cc:1501 #, gcc-internal-format msgid "%qD accessing %wu bytes at offsets %s and %s overlaps %wu byte at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1499 +#: gimple-ssa-warn-restrict.cc:1503 #, gcc-internal-format msgid "%qD accessing %wu bytes at offsets %s and %s overlaps %wu bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1506 +#: gimple-ssa-warn-restrict.cc:1510 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s overlaps between %wu and %wu bytes at offset %s" msgid_plural "%qD accessing %wu bytes at offsets %s and %s overlaps between %wu and %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1516 +#: gimple-ssa-warn-restrict.cc:1520 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s overlaps %wu or more bytes at offset %s" msgid_plural "%qD accessing %wu bytes at offsets %s and %s overlaps %wu or more bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1529 +#: gimple-ssa-warn-restrict.cc:1533 #, gcc-internal-format msgid "%qD accessing between %wu and %wu bytes at offsets %s and %s overlaps %wu byte at offset %s" msgid_plural "%qD accessing between %wu and %wu bytes at offsets %s and %s overlaps %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1539 +#: gimple-ssa-warn-restrict.cc:1543 #, gcc-internal-format msgid "%qD accessing between %wu and %wu bytes at offsets %s and %s overlaps between %wu and %wu bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1547 +#: gimple-ssa-warn-restrict.cc:1551 #, gcc-internal-format msgid "%qD accessing between %wu and %wu bytes at offsets %s and %s overlaps %wu or more bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1560 +#: gimple-ssa-warn-restrict.cc:1564 #, gcc-internal-format msgid "%qD accessing %wu or more bytes at offsets %s and %s overlaps %wu byte at offset %s" msgid_plural "%qD accessing %wu or more bytes at offsets %s and %s overlaps %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1568 +#: gimple-ssa-warn-restrict.cc:1572 #, gcc-internal-format msgid "%qD accessing %wu or more bytes at offsets %s and %s overlaps between %wu and %wu bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1575 +#: gimple-ssa-warn-restrict.cc:1579 #, gcc-internal-format msgid "%qD accessing %wu or more bytes at offsets %s and %s overlaps %wu or more bytes at offset %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1603 +#: gimple-ssa-warn-restrict.cc:1607 #, gcc-internal-format msgid "%qD accessing %wu byte may overlap %wu byte" msgid_plural "%qD accessing %wu bytes may overlap %wu byte" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1610 +#: gimple-ssa-warn-restrict.cc:1614 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s may overlap %wu byte at offset %s" msgid_plural "%qD accessing %wu bytes at offsets %s and %s may overlap %wu byte at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1621 +#: gimple-ssa-warn-restrict.cc:1625 #, gcc-internal-format msgid "%qD accessing %wu byte may overlap up to %wu bytes" msgid_plural "%qD accessing %wu bytes may overlap up to %wu bytes" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1628 +#: gimple-ssa-warn-restrict.cc:1632 #, gcc-internal-format msgid "%qD accessing %wu byte at offsets %s and %s may overlap up to %wu bytes at offset %s" msgid_plural "%qD accessing %wu bytes at offsets %s and %s may overlap up to %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1641 +#: gimple-ssa-warn-restrict.cc:1645 #, gcc-internal-format msgid "%qD accessing between %wu and %wu bytes may overlap %wu byte" msgid_plural "%qD accessing between %wu and %wu bytes may overlap up to %wu bytes" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1648 +#: gimple-ssa-warn-restrict.cc:1652 #, gcc-internal-format msgid "%qD accessing between %wu and %wu bytes at offsets %s and %s may overlap %wu byte at offset %s" msgid_plural "%qD accessing between %wu and %wu bytes at offsets %s and %s may overlap up to %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1660 +#: gimple-ssa-warn-restrict.cc:1664 #, gcc-internal-format msgid "%qD accessing %wu or more bytes at offsets %s and %s may overlap %wu byte at offset %s" msgid_plural "%qD accessing %wu or more bytes at offsets %s and %s may overlap up to %wu bytes at offset %s" msgstr[0] "" msgstr[1] "" -#: gimple-ssa-warn-restrict.cc:1706 +#: gimple-ssa-warn-restrict.cc:1710 #, gcc-internal-format msgid "%qD specified bound %wu exceeds maximum object size %wu" msgstr "" -#: gimple-ssa-warn-restrict.cc:1712 +#: gimple-ssa-warn-restrict.cc:1716 #, gcc-internal-format msgid "%qD specified bound between %wu and %wu exceeds maximum object size %wu" msgstr "" -#: gimple-ssa-warn-restrict.cc:1773 +#: gimple-ssa-warn-restrict.cc:1777 #, gcc-internal-format msgid "%qD pointer overflow between offset %s and size %s accessing array %qD with type %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1778 c-family/c-warn.cc:3753 +#: gimple-ssa-warn-restrict.cc:1782 c-family/c-warn.cc:3753 #, fuzzy, gcc-internal-format msgid "array %qD declared here" msgstr "тып параметра \"%s\" не аб'яўлены" -#: gimple-ssa-warn-restrict.cc:1783 gimple-ssa-warn-restrict.cc:1789 +#: gimple-ssa-warn-restrict.cc:1787 gimple-ssa-warn-restrict.cc:1793 #, gcc-internal-format msgid "%qD pointer overflow between offset %s and size %s" msgstr "" -#: gimple-ssa-warn-restrict.cc:1806 +#: gimple-ssa-warn-restrict.cc:1810 #, gcc-internal-format msgid "%qD forming offset %s is out of the bounds [0, %wu] of object %qD with type %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1809 +#: gimple-ssa-warn-restrict.cc:1813 #, gcc-internal-format msgid "%qD offset %s is out of the bounds [0, %wu] of object %qD with type %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1815 +#: gimple-ssa-warn-restrict.cc:1819 #, gcc-internal-format msgid "%qD forming offset %s is out of the bounds of object %qD with type %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1817 +#: gimple-ssa-warn-restrict.cc:1821 #, gcc-internal-format msgid "%qD offset %s is out of the bounds of object %qD with type %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1830 +#: gimple-ssa-warn-restrict.cc:1834 #, gcc-internal-format msgid "%qD forming offset %s is out of the bounds [0, %wu]" msgstr "" -#: gimple-ssa-warn-restrict.cc:1832 +#: gimple-ssa-warn-restrict.cc:1836 #, gcc-internal-format msgid "%qD offset %s is out of the bounds [0, %wu]" msgstr "" -#: gimple-ssa-warn-restrict.cc:1838 +#: gimple-ssa-warn-restrict.cc:1842 #, gcc-internal-format msgid "%qD forming offset %s is out of bounds" msgstr "" -#: gimple-ssa-warn-restrict.cc:1839 +#: gimple-ssa-warn-restrict.cc:1843 #, gcc-internal-format msgid "%qD offset %s is out of bounds" msgstr "" -#: gimple-ssa-warn-restrict.cc:1851 +#: gimple-ssa-warn-restrict.cc:1855 #, gcc-internal-format msgid "%qD offset %s from the object at %qE is out of the bounds of %qT" msgstr "" -#: gimple-ssa-warn-restrict.cc:1859 gimple-ssa-warn-restrict.cc:1880 +#: gimple-ssa-warn-restrict.cc:1863 gimple-ssa-warn-restrict.cc:1884 #, gcc-internal-format msgid "subobject %qD declared here" msgstr "" -#: gimple-ssa-warn-restrict.cc:1869 +#: gimple-ssa-warn-restrict.cc:1873 #, gcc-internal-format msgid "%qD offset %s from the object at %qE is out of the bounds of referenced subobject %qD with type %qT at offset %wi" msgstr "" @@ -27525,7 +27533,7 @@ msgstr "" msgid "IPA modref summary is missing in input file" msgstr "" -#: ipa-prop.cc:4774 ipa-prop.cc:4816 ipa-prop.cc:4902 ipa-prop.cc:4950 +#: ipa-prop.cc:4776 ipa-prop.cc:4818 ipa-prop.cc:4904 ipa-prop.cc:4952 #, gcc-internal-format msgid "invalid jump function in LTO stream" msgstr "" @@ -27744,32 +27752,32 @@ msgstr "" msgid "Reference statement index not found" msgstr "" -#: lto-streamer-in.cc:1966 +#: lto-streamer-in.cc:1969 #, gcc-internal-format, gfc-internal-format msgid "cannot read LTO mode table from %s" msgstr "" -#: lto-streamer-in.cc:2068 +#: lto-streamer-in.cc:2071 #, gcc-internal-format msgid "%s - %u-bit-precision floating-point numbers unsupported (mode %qs)" msgstr "" -#: lto-streamer-in.cc:2073 +#: lto-streamer-in.cc:2076 #, gcc-internal-format msgid "%s - %u-bit-precision decimal floating-point numbers unsupported (mode %qs)" msgstr "" -#: lto-streamer-in.cc:2078 +#: lto-streamer-in.cc:2081 #, gcc-internal-format msgid "%s - %u-bit-precision complex floating-point numbers unsupported (mode %qs)" msgstr "" -#: lto-streamer-in.cc:2083 +#: lto-streamer-in.cc:2086 #, gcc-internal-format msgid "%s - %u-bit integer numbers unsupported (mode %qs)" msgstr "" -#: lto-streamer-in.cc:2086 +#: lto-streamer-in.cc:2089 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%s - unsupported mode %qs" @@ -27795,94 +27803,94 @@ msgstr "" msgid "deleting LTRANS file %s: %m" msgstr "" -#: lto-wrapper.cc:324 +#: lto-wrapper.cc:325 #, gcc-internal-format, gfc-internal-format msgid "option %s with different values" msgstr "" -#: lto-wrapper.cc:340 +#: lto-wrapper.cc:341 #, gcc-internal-format msgid "option %qs with mismatching values (%s, %s)" msgstr "" -#: lto-wrapper.cc:455 +#: lto-wrapper.cc:456 #, gcc-internal-format, gfc-internal-format msgid "option %s not used consistently in all LTO input files" msgstr "" -#: lto-wrapper.cc:597 lto-wrapper.cc:605 +#: lto-wrapper.cc:601 lto-wrapper.cc:609 #, gcc-internal-format msgid "Extra option to %<-Xassembler%>: %s, dropping all %<-Xassembler%> and %<-Wa%> options." msgstr "" -#: lto-wrapper.cc:613 +#: lto-wrapper.cc:617 #, gcc-internal-format msgid "Options to %<-Xassembler%> do not match: %s, %s, dropping all %<-Xassembler%> and %<-Wa%> options." msgstr "" -#: lto-wrapper.cc:939 +#: lto-wrapper.cc:943 #, gcc-internal-format msgid "could not find %s in %s (consider using %<-B%>)" msgstr "" -#: lto-wrapper.cc:1020 +#: lto-wrapper.cc:1024 #, gcc-internal-format, gfc-internal-format msgid "problem with building target image for %s" msgstr "" -#: lto-wrapper.cc:1049 +#: lto-wrapper.cc:1053 #, fuzzy, gcc-internal-format msgid "reading input file" msgstr "няма ўваходзячых файлаў" -#: lto-wrapper.cc:1054 +#: lto-wrapper.cc:1058 #, fuzzy, gcc-internal-format msgid "writing output file" msgstr "не магу запісаць ў %s" -#: lto-wrapper.cc:1090 +#: lto-wrapper.cc:1094 #, gcc-internal-format msgid "installation error, cannot find %" msgstr "" -#: lto-wrapper.cc:1436 +#: lto-wrapper.cc:1447 #, gcc-internal-format msgid "environment variable % must be set" msgstr "" -#: lto-wrapper.cc:1440 +#: lto-wrapper.cc:1451 #, gcc-internal-format msgid "environment variable % must be set" msgstr "" -#: lto-wrapper.cc:1710 lto-wrapper.cc:1768 c-family/c-pch.cc:213 +#: lto-wrapper.cc:1731 lto-wrapper.cc:1791 c-family/c-pch.cc:213 #: c-family/c-pch.cc:248 c-family/c-pch.cc:286 #, fuzzy, gcc-internal-format msgid "cannot read %s: %m" msgstr "не магу прачытаць з %s" -#: lto-wrapper.cc:1737 +#: lto-wrapper.cc:1758 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "invalid format of %s" msgstr "Нерэчаісны выбар %s" -#: lto-wrapper.cc:1903 +#: lto-wrapper.cc:1927 #, gcc-internal-format msgid "%: %s: %m" msgstr "" -#: lto-wrapper.cc:1920 +#: lto-wrapper.cc:1944 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "can't open output file `%s'" msgid "corrupted ltrans output file %s" msgstr "немагчыма адчыніць файл уводу `%s'" -#: lto-wrapper.cc:1962 +#: lto-wrapper.cc:1986 #, gcc-internal-format, gfc-internal-format msgid "using serial compilation of %d LTRANS jobs" msgstr "" -#: lto-wrapper.cc:2135 +#: lto-wrapper.cc:2162 #, gcc-internal-format msgid "% failed" msgstr "" @@ -27942,12 +27950,12 @@ msgstr "" msgid "% clause with % modifier refers to iteration never in the iteration space" msgstr "" -#: omp-expand.cc:8068 +#: omp-expand.cc:8089 #, gcc-internal-format msgid "invalid OpenMP non-rectangular loop step; %<(%E - %E) * %E%> is not a multiple of loop %d step %qE" msgstr "" -#: omp-expand.cc:9995 +#: omp-expand.cc:10016 #, fuzzy, gcc-internal-format #| msgid "-pipe is not supported" msgid "% not yet supported" @@ -28447,7 +28455,7 @@ msgstr "" msgid "command-line option %qs is not supported by this configuration" msgstr "" -#: opts-common.cc:1389 opts.cc:2419 +#: opts-common.cc:1389 opts.cc:2453 #, fuzzy, gcc-internal-format msgid "missing argument to %qs" msgstr "аргумент для \"%s\" прапушчан" @@ -28564,296 +28572,306 @@ msgstr "" msgid "unrecognized shadow offset %qs" msgstr "нераспазнаны адрас" -#: opts.cc:218 +#: opts.cc:226 #, gcc-internal-format msgid "argument %qs to %<-femit-struct-debug-detailed%> not recognized" msgstr "" -#: opts.cc:254 +#: opts.cc:262 #, gcc-internal-format msgid "argument %qs to %<-femit-struct-debug-detailed%> unknown" msgstr "" -#: opts.cc:261 +#: opts.cc:269 #, gcc-internal-format msgid "%<-femit-struct-debug-detailed=dir:...%> must allow at least as much as %<-femit-struct-debug-detailed=ind:...%>" msgstr "" -#: opts.cc:725 +#: opts.cc:733 #, gcc-internal-format msgid "argument to %<-O%> should be a non-negative integer, %, %, % or %" msgstr "" -#: opts.cc:831 opts.cc:837 opts.cc:843 opts.cc:849 opts.cc:860 opts.cc:870 -#: opts.cc:876 opts.cc:882 opts.cc:888 opts.cc:894 opts.cc:900 opts.cc:906 -#: opts.cc:912 opts.cc:918 opts.cc:935 opts.cc:943 config/mips/mips.cc:20134 -#: config/mips/mips.cc:20136 config/mips/mips.cc:20149 +#: opts.cc:839 opts.cc:845 opts.cc:851 opts.cc:857 opts.cc:868 opts.cc:878 +#: opts.cc:884 opts.cc:890 opts.cc:896 opts.cc:902 opts.cc:908 opts.cc:914 +#: opts.cc:920 opts.cc:926 opts.cc:943 opts.cc:951 config/mips/mips.cc:20183 +#: config/mips/mips.cc:20185 config/mips/mips.cc:20198 #, gcc-internal-format msgid "%qs is incompatible with %qs" msgstr "" -#: opts.cc:925 +#: opts.cc:933 #, gcc-internal-format msgid "%<-fipa-modref%> is incompatible with %qs" msgstr "" -#: opts.cc:1005 +#: opts.cc:1013 #, gcc-internal-format msgid "%<-fsanitize=%s%> is incompatible with %<-fsanitize=%s%>" msgstr "" -#: opts.cc:1043 +#: opts.cc:1051 #, gcc-internal-format msgid "section anchors must be disabled when unit-at-a-time is disabled" msgstr "" -#: opts.cc:1047 +#: opts.cc:1055 #, gcc-internal-format msgid "toplevel reorder must be disabled when unit-at-a-time is disabled" msgstr "" -#: opts.cc:1061 +#: opts.cc:1069 #, gcc-internal-format msgid "transactional memory is not supported with non-call exceptions" msgstr "" -#: opts.cc:1076 +#: opts.cc:1084 #, gcc-internal-format msgid "section anchors must be disabled when toplevel reorder is disabled" msgstr "" -#: opts.cc:1146 +#: opts.cc:1154 #, gcc-internal-format msgid "%<-fno-fat-lto-objects%> are supported only with linker plugin" msgstr "" -#: opts.cc:1154 +#: opts.cc:1162 #, gcc-internal-format msgid "%<-gsplit-dwarf%> is not supported with LTO, disabling" msgstr "" -#: opts.cc:1168 +#: opts.cc:1176 #, gcc-internal-format msgid "%<-fsplit-stack%> is not supported by this compiler configuration" msgstr "" -#: opts.cc:1195 +#: opts.cc:1203 #, gcc-internal-format msgid "%<-fsanitize=pointer-compare%> must be combined with %<-fsanitize=address%> or %<-fsanitize=kernel-address%>" msgstr "" -#: opts.cc:1199 +#: opts.cc:1207 #, gcc-internal-format msgid "%<-fsanitize=pointer-subtract%> must be combined with %<-fsanitize=address%> or %<-fsanitize=kernel-address%>" msgstr "" -#: opts.cc:1224 +#: opts.cc:1232 #, fuzzy, gcc-internal-format #| msgid "-pipe is not supported" msgid "%<-fsanitize-recover=%s%> is not supported" msgstr "-pipe не падтрымліваецца" -#: opts.cc:1251 +#: opts.cc:1259 #, gcc-internal-format msgid "%<-fsanitize-address-use-after-scope%> requires %<-fstack-reuse=none%> option" msgstr "" -#: opts.cc:1258 +#: opts.cc:1266 #, gcc-internal-format msgid "transactional memory is not supported with %<-fsanitize=address%>" msgstr "" -#: opts.cc:1261 +#: opts.cc:1269 #, gcc-internal-format msgid "transactional memory is not supported with %<-fsanitize=kernel-address%>" msgstr "" -#: opts.cc:1266 +#: opts.cc:1274 #, fuzzy, gcc-internal-format #| msgid "-pipe is not supported" msgid "live patching is not supported with LTO" msgstr "-pipe не падтрымліваецца" -#: opts.cc:1270 +#: opts.cc:1278 #, fuzzy, gcc-internal-format msgid "vtable verification is not supported with LTO" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: opts.cc:1351 +#: opts.cc:1353 +#, gcc-internal-format +msgid "variable tracking requested, but useless unless producing debug info" +msgstr "" + +#: opts.cc:1357 +#, gcc-internal-format +msgid "variable tracking requested, but not supported by this debug format" +msgstr "" + +#: opts.cc:1385 #, gcc-internal-format msgid "var-tracking-assignments changes selective scheduling" msgstr "" -#: opts.cc:1386 config/darwin.cc:3359 +#: opts.cc:1420 config/darwin.cc:3359 #, gcc-internal-format msgid "%<-freorder-blocks-and-partition%> does not work with exceptions on this architecture" msgstr "" -#: opts.cc:1402 +#: opts.cc:1436 #, gcc-internal-format msgid "%<-freorder-blocks-and-partition%> does not support unwind info on this architecture" msgstr "" -#: opts.cc:1420 config/pa/pa.cc:564 +#: opts.cc:1454 config/pa/pa.cc:564 #, gcc-internal-format msgid "%<-freorder-blocks-and-partition%> does not work on this architecture" msgstr "" -#: opts.cc:1929 +#: opts.cc:1963 #, gcc-internal-format msgid "unrecognized % passed to %" msgstr "" -#: opts.cc:2150 +#: opts.cc:2184 #, gcc-internal-format msgid "%<-fsanitize=all%> option is not valid" msgstr "" -#: opts.cc:2189 +#: opts.cc:2223 #, gcc-internal-format msgid "unrecognized argument to %<-f%ssanitize%s=%> option: %q.*s; did you mean %qs?" msgstr "" -#: opts.cc:2195 +#: opts.cc:2229 #, gcc-internal-format msgid "unrecognized argument to %<-f%ssanitize%s=%> option: %q.*s" msgstr "" -#: opts.cc:2230 +#: opts.cc:2264 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "%qs attribute directive ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: opts.cc:2254 +#: opts.cc:2288 #, gcc-internal-format msgid "unrecognized argument to %<-fzero-call-used-regs=%>: %qs" msgstr "" -#: opts.cc:2278 +#: opts.cc:2312 #, gcc-internal-format msgid "invalid arguments for %<-falign-%s%> option: %qs" msgstr "" -#: opts.cc:2293 +#: opts.cc:2327 #, gcc-internal-format msgid "invalid number of arguments for %<-falign-%s%> option: %qs" msgstr "" -#: opts.cc:2302 +#: opts.cc:2336 #, gcc-internal-format msgid "%<-falign-%s%> is not between 0 and %d" msgstr "" -#: opts.cc:2361 +#: opts.cc:2395 #, fuzzy, gcc-internal-format msgid "invalid arguments for %<-fpatchable-function-entry%>" msgstr "нявернае выкарыстанне \"restict\"" -#: opts.cc:2474 +#: opts.cc:2508 #, gcc-internal-format msgid "%<--help%> argument %q.*s is ambiguous, please be more specific" msgstr "" -#: opts.cc:2483 +#: opts.cc:2517 #, gcc-internal-format msgid "unrecognized argument to %<--help=%> option: %q.*s" msgstr "" -#: opts.cc:2647 +#: opts.cc:2681 #, gcc-internal-format msgid "arguments ignored for %<-Wattributes=%>; use %<-Wno-attributes=%> instead" msgstr "" -#: opts.cc:2653 +#: opts.cc:2687 #, gcc-internal-format msgid "trailing %<,%> in arguments for %<-Wno-attributes=%>" msgstr "" -#: opts.cc:2862 +#: opts.cc:2896 #, gcc-internal-format msgid "%<-foffload-abi%> option can be specified only for offload compiler" msgstr "" -#: opts.cc:2870 +#: opts.cc:2904 #, gcc-internal-format msgid "structure alignment must be a small power of two, not %wu" msgstr "" -#: opts.cc:2991 +#: opts.cc:3025 #, fuzzy, gcc-internal-format #| msgid "unused parameter `%s'" msgid "unknown stack check parameter %qs" msgstr "невыкарыстаемы параметр \"%s\"" -#: opts.cc:3037 +#: opts.cc:3071 #, gcc-internal-format msgid "%<-gdwarf%s%> is ambiguous; use %<-gdwarf-%s%> for DWARF version or %<-gdwarf%> %<-g%s%> for debug level" msgstr "" -#: opts.cc:3048 +#: opts.cc:3082 #, fuzzy, gcc-internal-format #| msgid "-pipe is not supported" msgid "dwarf version %wu is not supported" msgstr "-pipe не падтрымліваецца" -#: opts.cc:3097 +#: opts.cc:3131 #, fuzzy, gcc-internal-format msgid "unrecognized argument to %<-flto=%> option: %qs" msgstr "нераспазнаны выбар \"-%s\"" -#: opts.cc:3297 +#: opts.cc:3331 #, fuzzy, gcc-internal-format msgid "target system does not support debug output" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: opts.cc:3335 +#: opts.cc:3369 #, fuzzy, gcc-internal-format #| msgid "section of `%s' conflicts with previous declaration" msgid "debug format %qs conflicts with prior selection" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: opts.cc:3359 +#: opts.cc:3393 #, fuzzy, gcc-internal-format msgid "unrecognized debug output level %qs" msgstr "нераспазнаны выбар \"-%s\"" -#: opts.cc:3361 +#: opts.cc:3395 #, gcc-internal-format msgid "debug output level %qs is too high" msgstr "" -#: opts.cc:3373 +#: opts.cc:3407 #, fuzzy, gcc-internal-format msgid "unrecognized btf debug output level %qs" msgstr "нераспазнаны выбар \"-%s\"" -#: opts.cc:3390 +#: opts.cc:3424 #, gcc-internal-format msgid "getting core file size maximum limit: %m" msgstr "" -#: opts.cc:3394 +#: opts.cc:3428 #, gcc-internal-format msgid "setting core file size limit to maximum: %m" msgstr "" -#: opts.cc:3439 +#: opts.cc:3473 #, gcc-internal-format, gfc-internal-format msgid "unrecognized gcc debugging option: %c" msgstr "" -#: opts.cc:3468 +#: opts.cc:3502 #, gcc-internal-format msgid "%<-W%serror=%s%>: no option %<-%s%>; did you mean %<-%s%>?" msgstr "" -#: opts.cc:3472 +#: opts.cc:3506 #, gcc-internal-format msgid "%<-W%serror=%s%>: no option %<-%s%>" msgstr "" -#: opts.cc:3476 +#: opts.cc:3510 #, gcc-internal-format msgid "%<-Werror=%s%>: %<-%s%> is not an option that controls warnings" msgstr "" @@ -29234,49 +29252,49 @@ msgstr "" msgid "%qs: [%u] non-empty register in chain (%s %u %i)" msgstr "" -#: reginfo.cc:651 +#: reginfo.cc:674 #, gcc-internal-format msgid "cannot use %qs as a call-saved register" msgstr "" -#: reginfo.cc:655 +#: reginfo.cc:678 #, fuzzy, gcc-internal-format msgid "cannot use %qs as a call-used register" msgstr "Клас \"%s\" ужо існуе" -#: reginfo.cc:667 +#: reginfo.cc:690 #, fuzzy, gcc-internal-format msgid "cannot use %qs as a fixed register" msgstr "Клас \"%s\" ужо існуе" -#: reginfo.cc:694 config/arc/arc.cc:1184 config/arc/arc.cc:1226 +#: reginfo.cc:717 config/arc/arc.cc:1184 config/arc/arc.cc:1226 #: config/ia64/ia64.cc:6036 config/ia64/ia64.cc:6043 config/pa/pa.cc:465 #: config/pa/pa.cc:472 config/sh/sh.cc:8277 config/sh/sh.cc:8284 #, gcc-internal-format, gfc-internal-format msgid "unknown register name: %s" msgstr "невядомая назва рэгістра: %s" -#: reginfo.cc:707 +#: reginfo.cc:730 #, gcc-internal-format msgid "stack register used for global register variable" msgstr "" -#: reginfo.cc:713 +#: reginfo.cc:736 #, gcc-internal-format msgid "global register variable follows a function definition" msgstr "" -#: reginfo.cc:719 +#: reginfo.cc:742 #, gcc-internal-format msgid "register of %qD used for multiple global register variables" msgstr "" -#: reginfo.cc:722 config/rs6000/rs6000-logue.cc:5561 +#: reginfo.cc:745 config/rs6000/rs6000-logue.cc:5561 #, gcc-internal-format msgid "conflicts with %qD" msgstr "" -#: reginfo.cc:727 +#: reginfo.cc:750 #, gcc-internal-format msgid "call-clobbered register used for global register variable" msgstr "" @@ -29721,27 +29739,27 @@ msgstr "" msgid "%<__builtin_saveregs%> not supported by this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: targhooks.cc:1120 +#: targhooks.cc:1185 #, fuzzy, gcc-internal-format msgid "%qs not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: targhooks.cc:1162 +#: targhooks.cc:1227 #, fuzzy, gcc-internal-format msgid "nested functions not supported on this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: targhooks.cc:1175 +#: targhooks.cc:1240 #, fuzzy, gcc-internal-format msgid "nested function trampolines not supported on this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: targhooks.cc:1677 +#: targhooks.cc:1742 #, fuzzy, gcc-internal-format msgid "target attribute is not supported on this machine" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: targhooks.cc:1691 +#: targhooks.cc:1756 #, fuzzy, gcc-internal-format msgid "%<#pragma GCC target%> is not supported for this machine" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" @@ -29850,130 +29868,120 @@ msgstr "" msgid "target system does not support the %qs debug format" msgstr "" -#: toplev.cc:1473 -#, gcc-internal-format -msgid "variable tracking requested, but useless unless producing debug info" -msgstr "" - -#: toplev.cc:1477 -#, gcc-internal-format -msgid "variable tracking requested, but not supported by this debug format" -msgstr "" - -#: toplev.cc:1509 +#: toplev.cc:1485 #, gcc-internal-format msgid "without %<-gdwarf-5%>, %<-gvariable-location-views=incompat5%> is equivalent to %<-gvariable-location-views%>" msgstr "" -#: toplev.cc:1525 +#: toplev.cc:1501 #, gcc-internal-format msgid "%<-ginternal-reset-location-views%> is forced disabled without %<-gvariable-location-views%>" msgstr "" -#: toplev.cc:1535 +#: toplev.cc:1511 #, gcc-internal-format msgid "%<-ginline-points%> is forced disabled without %<-gstatement-frontiers%>" msgstr "" -#: toplev.cc:1564 +#: toplev.cc:1540 #, fuzzy, gcc-internal-format msgid "%<-ffunction-sections%> not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1570 +#: toplev.cc:1546 #, fuzzy, gcc-internal-format msgid "%<-fdata-sections%> not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1578 +#: toplev.cc:1554 #, fuzzy, gcc-internal-format msgid "%<-fprefetch-loop-arrays%> not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1584 +#: toplev.cc:1560 #, fuzzy, gcc-internal-format msgid "%<-fprefetch-loop-arrays%> not supported for this target (try %<-march%> switches)" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1594 +#: toplev.cc:1570 #, fuzzy, gcc-internal-format msgid "%<-fprefetch-loop-arrays%> is not supported with %<-Os%>" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1606 +#: toplev.cc:1582 #, gcc-internal-format msgid "%<-fassociative-math%> disabled; other options take precedence" msgstr "" -#: toplev.cc:1616 +#: toplev.cc:1592 #, gcc-internal-format msgid "%<-fstack-clash-protection%> is not supported on targets where the stack grows from lower to higher addresses" msgstr "" -#: toplev.cc:1626 +#: toplev.cc:1602 #, gcc-internal-format msgid "%<-fstack-check=%> and %<-fstack-clash_protection%> are mutually exclusive; disabling %<-fstack-check=%>" msgstr "" -#: toplev.cc:1636 +#: toplev.cc:1612 #, fuzzy, gcc-internal-format msgid "%<-fstack-protector%> not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1648 +#: toplev.cc:1624 #, fuzzy, gcc-internal-format #| msgid "section attributes are not supported for this target" msgid "%<-fsanitize=address%> and %<-fsanitize=kernel-address%> are not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1658 +#: toplev.cc:1634 #, fuzzy, gcc-internal-format msgid "%<-fsanitize=address%> not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1667 +#: toplev.cc:1643 #, gcc-internal-format msgid "%<-fsanitize=kernel-address%> with stack protection is not supported without %<-fasan-shadow-offset=%> for this target" msgstr "" -#: toplev.cc:1677 +#: toplev.cc:1653 #, fuzzy, gcc-internal-format msgid "%qs is not supported for this target" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: toplev.cc:1685 +#: toplev.cc:1661 #, gcc-internal-format msgid "%<-fsanitize=shadow-call-stack%> not supported in current platform" msgstr "" -#: toplev.cc:1688 +#: toplev.cc:1664 #, gcc-internal-format msgid "%<-fsanitize=shadow-call-stack%> requires %<-fno-exceptions%>" msgstr "" -#: toplev.cc:2026 +#: toplev.cc:2002 #, fuzzy, gcc-internal-format #| msgid "error writing to %s" msgid "error writing to %s: %m" msgstr "памылка запісу ў %s" -#: toplev.cc:2028 +#: toplev.cc:2004 #, fuzzy, gcc-internal-format #| msgid "error writing to %s" msgid "error closing %s: %m" msgstr "памылка запісу ў %s" -#: toplev.cc:2146 +#: toplev.cc:2122 #, gcc-internal-format msgid "mpfr not configured to handle all floating modes" msgstr "" -#: toplev.cc:2232 +#: toplev.cc:2208 #, gcc-internal-format msgid "self-tests are not enabled in this build" msgstr "" -#: toplev.cc:2325 +#: toplev.cc:2301 #, gcc-internal-format msgid "self-tests incompatible with %<-E%>" msgstr "" @@ -30768,6 +30776,11 @@ msgstr "" msgid "ignoring return value of function declared with attribute %" msgstr "" +#: tree-complex.cc:1632 +#, gcc-internal-format +msgid "% with complex typed outputs" +msgstr "" + #: tree-diagnostic-path.cc:467 msgid "%@ %s" msgstr "" @@ -30942,37 +30955,37 @@ msgstr "" msgid "target does not support atomic profile update, single mode is selected" msgstr "" -#: tree-ssa-alias.cc:3991 +#: tree-ssa-alias.cc:3976 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "invalid fn spec attribute \"%s\"" msgstr "нявернае выкарыстанне \"restict\"" -#: tree-ssa-alias.cc:4030 +#: tree-ssa-alias.cc:4015 #, gcc-internal-format, gfc-internal-format msgid "invalid fn spec attribute \"%s\" arg %i" msgstr "" -#: tree-ssa-ccp.cc:4606 c-family/c-common.cc:5810 +#: tree-ssa-ccp.cc:4609 c-family/c-common.cc:5812 #, gcc-internal-format msgid "%qs pointer is null" msgstr "" -#: tree-ssa-ccp.cc:4609 c-family/c-common.cc:5813 +#: tree-ssa-ccp.cc:4612 c-family/c-common.cc:5815 #, fuzzy, gcc-internal-format msgid "in a call to non-static member function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: tree-ssa-ccp.cc:4615 c-family/c-common.cc:5819 +#: tree-ssa-ccp.cc:4618 c-family/c-common.cc:5821 #, gcc-internal-format, gfc-internal-format msgid "argument %u null where non-null expected" msgstr "" -#: tree-ssa-ccp.cc:4621 +#: tree-ssa-ccp.cc:4624 #, fuzzy, gcc-internal-format msgid "in a call to built-in function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: tree-ssa-ccp.cc:4625 c-family/c-common.cc:5823 +#: tree-ssa-ccp.cc:4628 c-family/c-common.cc:5825 #, fuzzy, gcc-internal-format msgid "in a call to function %qD declared %qs" msgstr "Нерэчаісны выбар \"%s\"" @@ -31027,131 +31040,131 @@ msgstr "" msgid "statement volatile flag not up to date" msgstr "" -#: tree-ssa-strlen.cc:2144 +#: tree-ssa-strlen.cc:2138 #, gcc-internal-format msgid "%qD writing one too many bytes into a region of a size that depends on %" msgstr "" -#: tree-ssa-strlen.cc:2148 +#: tree-ssa-strlen.cc:2142 #, gcc-internal-format msgid "writing one too many bytes into a region of a size that depends on %" msgstr "" -#: tree-ssa-strlen.cc:2157 +#: tree-ssa-strlen.cc:2151 #, gcc-internal-format msgid "%qD writing %wu byte into a region of size %wu" msgid_plural "%qD writing %wu bytes into a region of size %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:2165 +#: tree-ssa-strlen.cc:2159 #, gcc-internal-format msgid "writing %wu byte into a region of size %wu" msgid_plural "writing %wu bytes into a region of size %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:2175 +#: tree-ssa-strlen.cc:2169 #, gcc-internal-format msgid "%qD writing %wu byte into a region of size between %wu and %wu" msgid_plural "%qD writing %wu bytes into a region of size between %wu and %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:2183 +#: tree-ssa-strlen.cc:2177 #, gcc-internal-format msgid "writing %wu byte into a region of size between %wu and %wu" msgid_plural "writing %wu bytes into a region of size between %wu and %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:2193 +#: tree-ssa-strlen.cc:2187 #, gcc-internal-format msgid "%qD writing between %wu and %wu bytes into a region of size %wu" msgstr "" -#: tree-ssa-strlen.cc:2199 +#: tree-ssa-strlen.cc:2193 #, gcc-internal-format msgid "writing between %wu and %wu bytes into a region of size %wu" msgstr "" -#: tree-ssa-strlen.cc:2207 +#: tree-ssa-strlen.cc:2201 #, gcc-internal-format msgid "%qD writing between %wu and %wu bytes into a region of size between %wu and %wu" msgstr "" -#: tree-ssa-strlen.cc:2213 +#: tree-ssa-strlen.cc:2207 #, gcc-internal-format msgid "writing between %wu and %wu bytes into a region of size between %wu and %wu" msgstr "" -#: tree-ssa-strlen.cc:3105 +#: tree-ssa-strlen.cc:3099 #, gcc-internal-format msgid "%qD output truncated before terminating nul copying %E byte from a string of the same length" msgid_plural "%qD output truncated before terminating nul copying %E bytes from a string of the same length" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:3121 +#: tree-ssa-strlen.cc:3115 #, gcc-internal-format msgid "%qD output truncated copying %E byte from a string of length %wu" msgid_plural "%qD output truncated copying %E bytes from a string of length %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:3128 +#: tree-ssa-strlen.cc:3122 #, gcc-internal-format msgid "%qD output truncated copying between %wu and %wu bytes from a string of length %wu" msgstr "" -#: tree-ssa-strlen.cc:3140 +#: tree-ssa-strlen.cc:3134 #, gcc-internal-format msgid "%qD output may be truncated copying %E byte from a string of length %wu" msgid_plural "%qD output may be truncated copying %E bytes from a string of length %wu" msgstr[0] "" msgstr[1] "" -#: tree-ssa-strlen.cc:3147 tree-ssa-strlen.cc:3163 +#: tree-ssa-strlen.cc:3141 tree-ssa-strlen.cc:3157 #, gcc-internal-format msgid "%qD output may be truncated copying between %wu and %wu bytes from a string of length %wu" msgstr "" -#: tree-ssa-strlen.cc:3317 +#: tree-ssa-strlen.cc:3311 #, gcc-internal-format msgid "%qD output truncated before terminating nul copying as many bytes from a string as its length" msgstr "" -#: tree-ssa-strlen.cc:3330 +#: tree-ssa-strlen.cc:3324 #, gcc-internal-format msgid "%qD specified bound depends on the length of the source argument" msgstr "" -#: tree-ssa-strlen.cc:3338 +#: tree-ssa-strlen.cc:3332 #, gcc-internal-format msgid "length computed here" msgstr "" -#: tree-ssa-strlen.cc:4259 +#: tree-ssa-strlen.cc:4253 #, gcc-internal-format msgid "%qD of a string of length %wu or more and an array of size %wu evaluates to nonzero" msgstr "" -#: tree-ssa-strlen.cc:4261 +#: tree-ssa-strlen.cc:4255 #, gcc-internal-format msgid "%qD of a string of length %wu and an array of size %wu evaluates to nonzero" msgstr "" -#: tree-ssa-strlen.cc:4268 +#: tree-ssa-strlen.cc:4262 #, gcc-internal-format msgid "%qD of strings of length %wu and %wu and bound of %wu evaluates to nonzero" msgstr "" -#: tree-ssa-strlen.cc:4273 +#: tree-ssa-strlen.cc:4267 #, gcc-internal-format msgid "%qD of a string of length %wu, an array of size %wu and bound of %wu evaluates to nonzero" msgstr "" -#: tree-ssa-strlen.cc:4284 +#: tree-ssa-strlen.cc:4278 #, gcc-internal-format msgid "in this expression" msgstr "" @@ -31177,7 +31190,7 @@ msgstr "прапушчан ініцыялізатар" msgid "%qs may be used uninitialized" msgstr "" -#: tree-ssa-uninit.cc:314 varasm.cc:366 varasm.cc:7828 +#: tree-ssa-uninit.cc:314 varasm.cc:366 varasm.cc:7834 #, fuzzy, gcc-internal-format msgid "%qD was declared here" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" @@ -31203,22 +31216,22 @@ msgstr "" msgid "%qE is used uninitialized" msgstr "прапушчан ініцыялізатар" -#: tree-ssa-uninit.cc:861 +#: tree-ssa-uninit.cc:864 #, gcc-internal-format msgid "in a call to %qD declared with attribute %<%s%> here" msgstr "" -#: tree-ssa-uninit.cc:868 +#: tree-ssa-uninit.cc:871 #, gcc-internal-format msgid "in a call to %qT declared with attribute %<%s%>" msgstr "" -#: tree-ssa-uninit.cc:884 +#: tree-ssa-uninit.cc:887 #, gcc-internal-format msgid "by argument %u of type %s to %qD declared here" msgstr "" -#: tree-ssa-uninit.cc:892 +#: tree-ssa-uninit.cc:895 #, gcc-internal-format msgid "by argument %u of type %s to %qT" msgstr "" @@ -31385,12 +31398,12 @@ msgstr "" msgid "target specific builtin not available" msgstr "" -#: tree-vect-generic.cc:325 tree-vect-generic.cc:491 tree-vect-generic.cc:2033 +#: tree-vect-generic.cc:328 tree-vect-generic.cc:498 tree-vect-generic.cc:2048 #, gcc-internal-format msgid "vector operation will be expanded piecewise" msgstr "" -#: tree-vect-generic.cc:328 +#: tree-vect-generic.cc:331 #, gcc-internal-format msgid "vector operation will be expanded in parallel" msgstr "" @@ -31400,12 +31413,12 @@ msgstr "" msgid "vector operation will be expanded with a single scalar operation" msgstr "" -#: tree-vect-generic.cc:1102 +#: tree-vect-generic.cc:1110 #, gcc-internal-format msgid "vector condition will be expanded piecewise" msgstr "" -#: tree-vect-generic.cc:1596 +#: tree-vect-generic.cc:1608 #, gcc-internal-format msgid "vector shuffling operation will be expanded piecewise" msgstr "" @@ -31415,132 +31428,132 @@ msgstr "" msgid "vectorization did not happen for a simd loop" msgstr "" -#: tree.cc:2259 +#: tree.cc:2260 #, gcc-internal-format msgid "non-constant element in constant CONSTRUCTOR" msgstr "" -#: tree.cc:2261 +#: tree.cc:2262 #, gcc-internal-format msgid "side-effects element in no-side-effects CONSTRUCTOR" msgstr "" -#: tree.cc:7179 +#: tree.cc:7209 #, gcc-internal-format msgid "arrays of functions are not meaningful" msgstr "" -#: tree.cc:7343 +#: tree.cc:7373 #, gcc-internal-format msgid "function return type cannot be function" msgstr "" -#: tree.cc:8724 tree.cc:8809 tree.cc:8872 +#: tree.cc:8819 tree.cc:8904 tree.cc:8967 #, gcc-internal-format, gfc-internal-format msgid "tree check: %s, have %s in %s, at %s:%d" msgstr "" -#: tree.cc:8761 +#: tree.cc:8856 #, gcc-internal-format, gfc-internal-format msgid "tree check: expected none of %s, have %s in %s, at %s:%d" msgstr "" -#: tree.cc:8774 +#: tree.cc:8869 #, gcc-internal-format msgid "tree check: expected class %qs, have %qs (%s) in %s, at %s:%d" msgstr "" -#: tree.cc:8823 +#: tree.cc:8918 #, gcc-internal-format msgid "tree check: did not expect class %qs, have %qs (%s) in %s, at %s:%d" msgstr "" -#: tree.cc:8836 +#: tree.cc:8931 #, gcc-internal-format msgid "tree check: expected %, have %qs in %s, at %s:%d" msgstr "" -#: tree.cc:8898 +#: tree.cc:8993 #, gcc-internal-format msgid "tree check: expected tree that contains %qs structure, have %qs in %s, at %s:%d" msgstr "" -#: tree.cc:8912 +#: tree.cc:9007 #, gcc-internal-format msgid "tree check: accessed elt %d of % with %d elts in %s, at %s:%d" msgstr "" -#: tree.cc:8925 +#: tree.cc:9020 #, gcc-internal-format msgid "tree check: accessed elt %d of % with %d elts in %s, at %s:%d" msgstr "" -#: tree.cc:8938 +#: tree.cc:9033 #, gcc-internal-format, gfc-internal-format msgid "tree check: accessed operand %d of %s with %d operands in %s, at %s:%d" msgstr "" -#: tree.cc:8951 +#: tree.cc:9046 #, gcc-internal-format msgid "tree check: accessed operand %d of % with %d operands in %s, at %s:%d" msgstr "" -#: tree.cc:12112 +#: tree.cc:12207 #, gcc-internal-format msgid "%qD is deprecated: %s" msgstr "" -#: tree.cc:12115 +#: tree.cc:12210 #, gcc-internal-format msgid "%qD is deprecated" msgstr "" -#: tree.cc:12138 +#: tree.cc:12233 #, gcc-internal-format msgid "%qE is deprecated: %s" msgstr "" -#: tree.cc:12141 +#: tree.cc:12236 #, gcc-internal-format msgid "%qE is deprecated" msgstr "" -#: tree.cc:12147 +#: tree.cc:12242 #, gcc-internal-format, gfc-internal-format msgid "type is deprecated: %s" msgstr "" -#: tree.cc:12150 +#: tree.cc:12245 #, gcc-internal-format msgid "type is deprecated" msgstr "" -#: tree.cc:12192 +#: tree.cc:12287 #, gcc-internal-format msgid "%qD is unavailable: %s" msgstr "" -#: tree.cc:12194 +#: tree.cc:12289 #, gcc-internal-format msgid "%qD is unavailable" msgstr "" -#: tree.cc:12215 +#: tree.cc:12310 #, gcc-internal-format msgid "%qE is unavailable: %s" msgstr "" -#: tree.cc:12217 +#: tree.cc:12312 #, gcc-internal-format msgid "%qE is unavailable" msgstr "" -#: tree.cc:12222 +#: tree.cc:12317 #, gcc-internal-format, gfc-internal-format msgid "type is unavailable: %s" msgstr "" -#: tree.cc:12224 +#: tree.cc:12319 #, gcc-internal-format msgid "type is unavailable" msgstr "" @@ -31565,233 +31578,233 @@ msgstr "" #. - vector types may differ by TYPE_VECTOR_OPAQUE #. #. Convenience macro for matching individual fields. -#: tree.cc:13037 +#: tree.cc:13134 #, gcc-internal-format, gfc-internal-format msgid "type variant differs by %s" msgstr "" -#: tree.cc:13082 +#: tree.cc:13179 #, gcc-internal-format msgid "type variant has different %" msgstr "" -#: tree.cc:13084 +#: tree.cc:13181 #, gcc-internal-format msgid "type variant%'s %" msgstr "" -#: tree.cc:13086 +#: tree.cc:13183 #, gcc-internal-format msgid "type%'s %" msgstr "" -#: tree.cc:13111 +#: tree.cc:13208 #, gcc-internal-format msgid "type variant with %" msgstr "" -#: tree.cc:13124 +#: tree.cc:13221 #, gcc-internal-format msgid "type variant has different %" msgstr "" -#: tree.cc:13160 +#: tree.cc:13257 #, gcc-internal-format msgid "type variant has different %" msgstr "" -#: tree.cc:13162 +#: tree.cc:13259 #, gcc-internal-format msgid "type variant%'s %" msgstr "" -#: tree.cc:13164 +#: tree.cc:13261 #, gcc-internal-format msgid "type%'s %" msgstr "" -#: tree.cc:13203 +#: tree.cc:13300 #, gcc-internal-format msgid "type variant has different %" msgstr "" -#: tree.cc:13205 +#: tree.cc:13302 #, gcc-internal-format msgid "first mismatch is field" msgstr "" -#: tree.cc:13207 +#: tree.cc:13304 #, gcc-internal-format msgid "and field" msgstr "" -#: tree.cc:13224 +#: tree.cc:13321 #, gcc-internal-format msgid "type variant has different %" msgstr "" -#: tree.cc:13226 tree.cc:13237 +#: tree.cc:13323 tree.cc:13334 #, gcc-internal-format msgid "type variant%'s %" msgstr "" -#: tree.cc:13228 tree.cc:13239 +#: tree.cc:13325 tree.cc:13336 #, gcc-internal-format msgid "type%'s %" msgstr "" -#: tree.cc:13235 +#: tree.cc:13332 #, gcc-internal-format msgid "type is not compatible with its variant" msgstr "" -#: tree.cc:13547 +#: tree.cc:13644 #, gcc-internal-format msgid "main variant is not defined" msgstr "" -#: tree.cc:13552 +#: tree.cc:13649 #, gcc-internal-format msgid "% has different %" msgstr "" -#: tree.cc:13564 +#: tree.cc:13661 #, gcc-internal-format msgid "% has different %" msgstr "" -#: tree.cc:13583 +#: tree.cc:13680 #, gcc-internal-format msgid "% is not compatible" msgstr "" -#: tree.cc:13591 +#: tree.cc:13688 #, gcc-internal-format msgid "% of % is not compatible" msgstr "" -#: tree.cc:13597 +#: tree.cc:13694 #, gcc-internal-format msgid "% of main variant is not main variant" msgstr "" -#: tree.cc:13613 +#: tree.cc:13710 #, gcc-internal-format msgid "% is not % nor %" msgstr "" -#: tree.cc:13623 +#: tree.cc:13720 #, gcc-internal-format msgid "% is not %" msgstr "" -#: tree.cc:13633 +#: tree.cc:13730 #, gcc-internal-format msgid "% is not %" msgstr "" -#: tree.cc:13654 +#: tree.cc:13751 #, gcc-internal-format msgid "% is not %" msgstr "" -#: tree.cc:13660 +#: tree.cc:13757 #, gcc-internal-format msgid "% type is not %" msgstr "" -#: tree.cc:13671 +#: tree.cc:13768 #, gcc-internal-format msgid "% is not record nor union" msgstr "" -#: tree.cc:13682 +#: tree.cc:13779 #, gcc-internal-format msgid "% is not record nor union" msgstr "" -#: tree.cc:13700 +#: tree.cc:13797 #, gcc-internal-format msgid "% not %" msgstr "" -#: tree.cc:13707 +#: tree.cc:13804 #, gcc-internal-format msgid "% non-NULL" msgstr "" -#: tree.cc:13714 +#: tree.cc:13811 #, gcc-internal-format msgid "% field is non-NULL" msgstr "" -#: tree.cc:13730 +#: tree.cc:13827 #, gcc-internal-format msgid "enum value is not % or %" msgstr "" -#: tree.cc:13739 +#: tree.cc:13836 #, gcc-internal-format msgid "enum value type is not % nor convertible to the enum" msgstr "" -#: tree.cc:13747 +#: tree.cc:13844 #, gcc-internal-format msgid "enum value name is not %" msgstr "" -#: tree.cc:13757 +#: tree.cc:13854 #, fuzzy, gcc-internal-format #| msgid "size of array `%D' has non-integer type" msgid "array % is not integer type" msgstr "памер масіва `%D' не цэлалікавы тып" -#: tree.cc:13766 +#: tree.cc:13863 #, gcc-internal-format msgid "% defined in incomplete type" msgstr "" -#: tree.cc:13788 +#: tree.cc:13885 #, gcc-internal-format msgid "wrong tree in % list" msgstr "" -#: tree.cc:13803 +#: tree.cc:13900 #, gcc-internal-format msgid "% is %i while % is %p" msgstr "" -#: tree.cc:13810 +#: tree.cc:13907 #, gcc-internal-format msgid "% is not %" msgstr "" -#: tree.cc:13823 +#: tree.cc:13920 #, gcc-internal-format msgid "wrong % entry" msgstr "" -#: tree.cc:13836 +#: tree.cc:13933 #, gcc-internal-format msgid "% is non-NULL in % list" msgstr "" -#: tree.cc:13842 +#: tree.cc:13939 #, gcc-internal-format msgid "wrong entry in % list" msgstr "" -#: tree.cc:13849 +#: tree.cc:13946 #, gcc-internal-format msgid "% field is non-NULL" msgstr "" -#: tree.cc:13861 +#: tree.cc:13958 #, gcc-internal-format msgid "% is set while it should not be" msgstr "" -#: tree.cc:13871 +#: tree.cc:13968 #, gcc-internal-format msgid "% is not main variant" msgstr "" @@ -31802,17 +31815,17 @@ msgstr "" msgid "%qs is not supported with %qs" msgstr "%s не падтрымлівае %s" -#: value-prof.cc:496 +#: value-prof.cc:500 #, gcc-internal-format msgid "dead histogram" msgstr "" -#: value-prof.cc:525 +#: value-prof.cc:529 #, gcc-internal-format msgid "histogram value statement does not correspond to the statement it is associated with" msgstr "" -#: value-prof.cc:594 +#: value-prof.cc:598 #, gcc-internal-format, gfc-internal-format msgid "corrupted value profile: %s profile counter (%d out of %d) inconsistent with basic-block count (%d)" msgstr "" @@ -31930,82 +31943,82 @@ msgstr "" msgid "storage size of %q+D isn%'t known" msgstr "" -#: varasm.cc:5269 +#: varasm.cc:5275 #, gcc-internal-format msgid "initializer for integer/fixed-point value is too complicated" msgstr "" -#: varasm.cc:5274 +#: varasm.cc:5280 #, gcc-internal-format msgid "initializer for floating value is not a floating constant" msgstr "" -#: varasm.cc:5619 +#: varasm.cc:5625 #, fuzzy, gcc-internal-format msgid "invalid initial value for member %qE" msgstr "нявернае выкарыстанне \"restict\"" -#: varasm.cc:5875 +#: varasm.cc:5881 #, gcc-internal-format msgid "%qD declared weak after being used" msgstr "" -#: varasm.cc:5927 +#: varasm.cc:5933 #, gcc-internal-format msgid "weak declaration of %q+D being applied to a already existing, static definition" msgstr "" -#: varasm.cc:5968 +#: varasm.cc:5974 #, gcc-internal-format msgid "weak declaration of %q+D must be public" msgstr "" -#: varasm.cc:5972 +#: varasm.cc:5978 #, gcc-internal-format msgid "weak declaration of %q+D not supported" msgstr "" -#: varasm.cc:6001 varasm.cc:6321 +#: varasm.cc:6007 varasm.cc:6327 #, gcc-internal-format msgid "only weak aliases are supported in this configuration" msgstr "" -#: varasm.cc:6196 varasm.cc:6318 +#: varasm.cc:6202 varasm.cc:6324 #, fuzzy, gcc-internal-format msgid "%qs is not supported in this configuration" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: varasm.cc:6224 +#: varasm.cc:6230 #, fuzzy, gcc-internal-format msgid "%qs is not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: varasm.cc:6280 +#: varasm.cc:6286 #, fuzzy, gcc-internal-format msgid "symver is only supported on ELF platforms" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: varasm.cc:6299 +#: varasm.cc:6305 #, gcc-internal-format msgid "%qs symbol %q+D ultimately targets itself" msgstr "" -#: varasm.cc:6301 +#: varasm.cc:6307 #, gcc-internal-format msgid "%qs symbol %q+D must have static linkage" msgstr "" -#: varasm.cc:6308 config/nvptx/nvptx.cc:7445 +#: varasm.cc:6314 config/nvptx/nvptx.cc:7445 #, fuzzy, gcc-internal-format msgid "alias definitions not supported in this configuration" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: varasm.cc:6536 config/sol2.cc:160 config/i386/winnt.cc:265 +#: varasm.cc:6542 config/sol2.cc:160 config/i386/winnt.cc:265 #, fuzzy, gcc-internal-format msgid "visibility attribute not supported in this configuration; ignored" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: varasm.cc:7824 +#: varasm.cc:7830 #, gcc-internal-format msgid "%+qD without % attribute and %qD with % attribute are placed in a section with the same name" msgstr "" @@ -32071,7 +32084,7 @@ msgstr "" msgid "no sclass for %s stab (0x%x)" msgstr "" -#: c-family/c-ada-spec.cc:2877 +#: c-family/c-ada-spec.cc:2899 #, gcc-internal-format msgid "packed layout" msgstr "" @@ -32224,7 +32237,7 @@ msgstr "\"%s\" атрыбут ігнарыруецца" msgid "%qE attribute ignored because %qD is not a local variable" msgstr "" -#: c-family/c-attribs.cc:1676 config/i386/i386-options.cc:3795 +#: c-family/c-attribs.cc:1676 config/i386/i386-options.cc:3789 #, gcc-internal-format msgid "%qE attribute have effect only on public objects" msgstr "" @@ -32703,7 +32716,7 @@ msgstr "" msgid "%qE argument is not a function" msgstr "`%D' - гэта ня функцыя," -#: c-family/c-attribs.cc:4128 cp/name-lookup.cc:6052 +#: c-family/c-attribs.cc:4128 cp/name-lookup.cc:6053 #, gcc-internal-format msgid "deprecated message is not a string" msgstr "" @@ -33189,7 +33202,7 @@ msgstr "" msgid "the compiler can assume that the address of %qD will always evaluate to %" msgstr "" -#: c-family/c-common.cc:3712 cp/semantics.cc:843 cp/typeck.cc:9971 +#: c-family/c-common.cc:3712 cp/semantics.cc:854 cp/typeck.cc:9977 #, gcc-internal-format msgid "suggest parentheses around assignment used as truth value" msgstr "" @@ -33236,403 +33249,403 @@ msgstr "" msgid "%<__alignof%> applied to a bit-field" msgstr "" -#: c-family/c-common.cc:4766 +#: c-family/c-common.cc:4768 #, gcc-internal-format msgid "first argument to % not of type %" msgstr "" -#: c-family/c-common.cc:4886 +#: c-family/c-common.cc:4888 #, fuzzy, gcc-internal-format msgid "cannot disable built-in function %qs" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: c-family/c-common.cc:5076 +#: c-family/c-common.cc:5078 #, gcc-internal-format msgid "pointers are not permitted as case values" msgstr "" -#: c-family/c-common.cc:5083 +#: c-family/c-common.cc:5085 #, gcc-internal-format msgid "range expressions in switch statements are non-standard" msgstr "" -#: c-family/c-common.cc:5111 +#: c-family/c-common.cc:5113 #, gcc-internal-format msgid "empty range specified" msgstr "" -#: c-family/c-common.cc:5163 +#: c-family/c-common.cc:5165 #, gcc-internal-format msgid "duplicate (or overlapping) case value" msgstr "" -#: c-family/c-common.cc:5165 +#: c-family/c-common.cc:5167 #, gcc-internal-format msgid "this is the first entry overlapping that value" msgstr "" -#: c-family/c-common.cc:5169 +#: c-family/c-common.cc:5171 #, gcc-internal-format msgid "duplicate case value" msgstr "" -#: c-family/c-common.cc:5170 c-family/c-warn.cc:2542 +#: c-family/c-common.cc:5172 c-family/c-warn.cc:2542 #, gcc-internal-format msgid "previously used here" msgstr "" -#: c-family/c-common.cc:5174 +#: c-family/c-common.cc:5176 #, gcc-internal-format msgid "multiple default labels in one switch" msgstr "" -#: c-family/c-common.cc:5176 +#: c-family/c-common.cc:5178 #, gcc-internal-format msgid "this is the first default label" msgstr "" -#: c-family/c-common.cc:5288 +#: c-family/c-common.cc:5290 #, fuzzy, gcc-internal-format msgid "taking the address of a label is non-standard" msgstr "ISO C не дазваляе пусты ізыходны файл" -#: c-family/c-common.cc:5466 +#: c-family/c-common.cc:5468 #, fuzzy, gcc-internal-format msgid "requested alignment is not an integer constant" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: c-family/c-common.cc:5474 c-family/c-common.cc:5484 +#: c-family/c-common.cc:5476 c-family/c-common.cc:5486 #, gcc-internal-format msgid "requested alignment %qE is not a positive power of 2" msgstr "" -#: c-family/c-common.cc:5494 +#: c-family/c-common.cc:5496 #, gcc-internal-format msgid "requested alignment %qE exceeds object file maximum %u" msgstr "" -#: c-family/c-common.cc:5502 +#: c-family/c-common.cc:5504 #, gcc-internal-format msgid "requested alignment %qE exceeds maximum %u" msgstr "" -#: c-family/c-common.cc:5677 +#: c-family/c-common.cc:5679 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function" msgid "not enough variable arguments to fit a sentinel" msgstr "не хапае аргументаў у функцыі" -#: c-family/c-common.cc:5691 +#: c-family/c-common.cc:5693 #, gcc-internal-format msgid "missing sentinel in function call" msgstr "" -#: c-family/c-common.cc:5918 c-family/c-common.cc:5968 d/d-attribs.cc:812 +#: c-family/c-common.cc:5920 c-family/c-common.cc:5970 d/d-attribs.cc:812 #: d/d-attribs.cc:862 #, gcc-internal-format msgid "bad option %qs to attribute %" msgstr "" -#: c-family/c-common.cc:5921 c-family/c-common.cc:5972 +#: c-family/c-common.cc:5923 c-family/c-common.cc:5974 #, gcc-internal-format msgid "bad option %qs to pragma %" msgstr "" -#: c-family/c-common.cc:6020 +#: c-family/c-common.cc:6022 #, gcc-internal-format msgid "attribute % specified multiple times" msgstr "" -#: c-family/c-common.cc:6024 +#: c-family/c-common.cc:6026 #, gcc-internal-format msgid "% attribute specified with a parameter" msgstr "" -#: c-family/c-common.cc:6204 c-family/c-common.cc:7040 -#: c-family/c-common.cc:7087 c-family/c-common.cc:7162 -#: c-family/c-common.cc:7235 config/aarch64/aarch64-sve-builtins.cc:2122 +#: c-family/c-common.cc:6206 c-family/c-common.cc:7042 +#: c-family/c-common.cc:7089 c-family/c-common.cc:7164 +#: c-family/c-common.cc:7237 config/aarch64/aarch64-sve-builtins.cc:2117 #: c/c-typeck.cc:3729 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function" msgid "too few arguments to function %qE" msgstr "не хапае аргументаў у функцыі" -#: c-family/c-common.cc:6209 c-family/c-common.cc:7093 -#: c-family/c-common.cc:7261 config/aarch64/aarch64-sve-builtins.cc:2124 +#: c-family/c-common.cc:6211 c-family/c-common.cc:7095 +#: c-family/c-common.cc:7263 config/aarch64/aarch64-sve-builtins.cc:2119 #: c/c-typeck.cc:3593 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function" msgid "too many arguments to function %qE" msgstr "вельмі шмат аргументаў у функцыі" -#: c-family/c-common.cc:6251 +#: c-family/c-common.cc:6253 #, fuzzy, gcc-internal-format msgid "third argument to function %qE must be a constant integer" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: c-family/c-common.cc:6276 +#: c-family/c-common.cc:6278 #, gcc-internal-format msgid "second argument to function %qE must be a constant integer power of 2 between %qi and %qu bits" msgstr "" -#: c-family/c-common.cc:6297 c-family/c-common.cc:6341 +#: c-family/c-common.cc:6299 c-family/c-common.cc:6343 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function `%s'" msgid "non-floating-point argument in call to function %qE" msgstr "вельмі шмат аргумэнтаў у функцыі `%s'" -#: c-family/c-common.cc:6320 +#: c-family/c-common.cc:6322 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function `%s'" msgid "non-floating-point arguments in call to function %qE" msgstr "вельмі шмат аргумэнтаў у функцыі `%s'" -#: c-family/c-common.cc:6334 +#: c-family/c-common.cc:6336 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function `%s'" msgid "non-const integer argument %u in call to function %qE" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: c-family/c-common.cc:6354 +#: c-family/c-common.cc:6356 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function `%s'" msgid "non-integer argument 3 in call to function %qE" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: c-family/c-common.cc:6371 c-family/c-common.cc:6421 +#: c-family/c-common.cc:6373 c-family/c-common.cc:6423 #, gcc-internal-format msgid "argument %u in call to function %qE does not have integral type" msgstr "" -#: c-family/c-common.cc:6378 +#: c-family/c-common.cc:6380 #, gcc-internal-format msgid "argument 3 in call to function %qE does not have pointer to integral type" msgstr "" -#: c-family/c-common.cc:6384 +#: c-family/c-common.cc:6386 #, gcc-internal-format msgid "argument 3 in call to function %qE has pointer to enumerated type" msgstr "" -#: c-family/c-common.cc:6390 +#: c-family/c-common.cc:6392 #, gcc-internal-format msgid "argument 3 in call to function %qE has pointer to boolean type" msgstr "" -#: c-family/c-common.cc:6396 c-family/c-common.cc:6403 -#: c-family/c-common.cc:6458 c-family/c-common.cc:6465 +#: c-family/c-common.cc:6398 c-family/c-common.cc:6405 +#: c-family/c-common.cc:6460 c-family/c-common.cc:6467 #, gcc-internal-format msgid "argument %u in call to function %qE has pointer to %qs type (%qT)" msgstr "" -#: c-family/c-common.cc:6427 +#: c-family/c-common.cc:6429 #, gcc-internal-format msgid "argument 3 in call to function %qE has enumerated type" msgstr "" -#: c-family/c-common.cc:6433 +#: c-family/c-common.cc:6435 #, gcc-internal-format msgid "argument 3 in call to function %qE has boolean type" msgstr "" -#: c-family/c-common.cc:6446 +#: c-family/c-common.cc:6448 #, gcc-internal-format msgid "argument %u in call to function %qE does not have pointer type" msgstr "" -#: c-family/c-common.cc:6452 +#: c-family/c-common.cc:6454 #, fuzzy, gcc-internal-format msgid "argument %u in call to function %qE points to incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: c-family/c-common.cc:6717 +#: c-family/c-common.cc:6719 #, gcc-internal-format msgid "cannot apply % to static data member %qD" msgstr "" -#: c-family/c-common.cc:6722 +#: c-family/c-common.cc:6724 #, gcc-internal-format msgid "cannot apply % when % is overloaded" msgstr "" -#: c-family/c-common.cc:6729 +#: c-family/c-common.cc:6731 #, gcc-internal-format msgid "cannot apply % to a non constant address" msgstr "" -#: c-family/c-common.cc:6742 +#: c-family/c-common.cc:6744 #, fuzzy, gcc-internal-format msgid "attempt to take address of bit-field structure member %qD" msgstr "не магу атрымаць адрас бітавага поля \"%s\"" -#: c-family/c-common.cc:6795 +#: c-family/c-common.cc:6797 #, gcc-internal-format msgid "index %E denotes an offset greater than size of %qT" msgstr "" -#: c-family/c-common.cc:6956 +#: c-family/c-common.cc:6958 #, fuzzy, gcc-internal-format #| msgid "size of array `%s' is too large" msgid "size of array is too large" msgstr "памер масіва \"%s\" вельмі вялікі" -#: c-family/c-common.cc:7070 c-family/c-common.cc:7194 +#: c-family/c-common.cc:7072 c-family/c-common.cc:7196 #, gcc-internal-format msgid "operand type %qT is incompatible with argument %d of %qE" msgstr "" -#: c-family/c-common.cc:7104 +#: c-family/c-common.cc:7106 #, gcc-internal-format msgid "expecting argument of type pointer or of type integer for argument 1" msgstr "" -#: c-family/c-common.cc:7120 +#: c-family/c-common.cc:7122 #, gcc-internal-format msgid "both arguments must be compatible" msgstr "" -#: c-family/c-common.cc:7336 +#: c-family/c-common.cc:7338 #, fuzzy, gcc-internal-format #| msgid "too few arguments to function `%s'" msgid "incorrect number of arguments to function %qE" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: c-family/c-common.cc:7350 +#: c-family/c-common.cc:7352 #, fuzzy, gcc-internal-format msgid "argument 1 of %qE must be a non-void pointer type" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7357 +#: c-family/c-common.cc:7359 #, fuzzy, gcc-internal-format msgid "argument 1 of %qE must be a pointer to a complete type" msgstr "\"%s\" мае незавершаны тып" -#: c-family/c-common.cc:7366 +#: c-family/c-common.cc:7368 #, fuzzy, gcc-internal-format msgid "argument 1 of %qE must be a pointer to a constant size type" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7377 +#: c-family/c-common.cc:7379 #, fuzzy, gcc-internal-format msgid "argument 1 of %qE must be a pointer to a nonzero size object" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7398 +#: c-family/c-common.cc:7400 #, fuzzy, gcc-internal-format msgid "argument %d of %qE must be a pointer type" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7406 +#: c-family/c-common.cc:7408 #, fuzzy, gcc-internal-format msgid "argument %d of %qE must be a pointer to a constant size type" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7412 +#: c-family/c-common.cc:7414 #, fuzzy, gcc-internal-format msgid "argument %d of %qE must not be a pointer to a function" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7420 +#: c-family/c-common.cc:7422 #, gcc-internal-format msgid "size mismatch in argument %d of %qE" msgstr "" -#: c-family/c-common.cc:7433 +#: c-family/c-common.cc:7435 #, gcc-internal-format msgid "argument %d of %qE must not be a pointer to a % type" msgstr "" -#: c-family/c-common.cc:7438 +#: c-family/c-common.cc:7440 #, gcc-internal-format msgid "argument %d of %qE discards % qualifier" msgstr "" -#: c-family/c-common.cc:7447 +#: c-family/c-common.cc:7449 #, fuzzy, gcc-internal-format msgid "argument %d of %qE must not be a pointer to a % type" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: c-family/c-common.cc:7452 +#: c-family/c-common.cc:7454 #, gcc-internal-format msgid "argument %d of %qE discards % qualifier" msgstr "" -#: c-family/c-common.cc:7465 +#: c-family/c-common.cc:7467 #, gcc-internal-format msgid "non-integer memory model argument %d of %qE" msgstr "" -#: c-family/c-common.cc:7478 +#: c-family/c-common.cc:7480 #, gcc-internal-format msgid "invalid memory model argument %d of %qE" msgstr "" -#: c-family/c-common.cc:7879 +#: c-family/c-common.cc:7881 #, gcc-internal-format msgid "this target does not define a speculation barrier; your program will still execute correctly, but incorrect speculation may not be restricted" msgstr "" -#: c-family/c-common.cc:8514 +#: c-family/c-common.cc:8516 #, gcc-internal-format msgid "index value is out of bound" msgstr "" -#: c-family/c-common.cc:8556 c-family/c-common.cc:8605 -#: c-family/c-common.cc:8621 +#: c-family/c-common.cc:8558 c-family/c-common.cc:8607 +#: c-family/c-common.cc:8623 #, gcc-internal-format msgid "conversion of scalar %qT to vector %qT involves truncation" msgstr "" #. Reject arguments that are built-in functions with #. no library fallback. -#: c-family/c-common.cc:8709 +#: c-family/c-common.cc:8711 #, gcc-internal-format msgid "built-in function %qE must be directly called" msgstr "" -#: c-family/c-common.cc:8729 +#: c-family/c-common.cc:8731 #, fuzzy, gcc-internal-format msgid "size of array %qE is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: c-family/c-common.cc:8732 +#: c-family/c-common.cc:8734 #, fuzzy, gcc-internal-format msgid "size of array is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: c-family/c-common.cc:8736 +#: c-family/c-common.cc:8738 #, fuzzy, gcc-internal-format #| msgid "size of array is negative" msgid "size %qE of array %qE is negative" msgstr "адмоўны памер масіва " -#: c-family/c-common.cc:8739 +#: c-family/c-common.cc:8741 #, fuzzy, gcc-internal-format #| msgid "size of array is negative" msgid "size %qE of array is negative" msgstr "адмоўны памер масіва " -#: c-family/c-common.cc:8744 +#: c-family/c-common.cc:8746 #, gcc-internal-format msgid "size %qE of array %qE exceeds maximum object size %qE" msgstr "" -#: c-family/c-common.cc:8747 +#: c-family/c-common.cc:8749 #, gcc-internal-format msgid "size %qE of array exceeds maximum object size %qE" msgstr "" -#: c-family/c-common.cc:8752 +#: c-family/c-common.cc:8754 #, gcc-internal-format msgid "size of array %qE exceeds maximum object size %qE" msgstr "" -#: c-family/c-common.cc:8755 +#: c-family/c-common.cc:8757 #, gcc-internal-format msgid "size of array exceeds maximum object size %qE" msgstr "" -#: c-family/c-common.cc:8826 +#: c-family/c-common.cc:8828 #, gcc-internal-format msgid "environment variable %qs must expand to a non-negative integer less than or equal to %wd" msgstr "" @@ -33695,7 +33708,7 @@ msgid "function %qD might be a candidate for %qs format attribute" msgstr "" #: c-family/c-format.cc:1321 c-family/c-format.cc:1342 -#: c-family/c-format.cc:2776 +#: c-family/c-format.cc:2777 #, gcc-internal-format msgid "missing $ operand number in format" msgstr "" @@ -33770,430 +33783,430 @@ msgstr "" msgid "unterminated format string" msgstr "" -#: c-family/c-format.cc:2019 +#: c-family/c-format.cc:2020 #, gcc-internal-format msgid "%s used with %<%%%c%> %s format" msgstr "" -#: c-family/c-format.cc:2029 +#: c-family/c-format.cc:2030 #, gcc-internal-format, gfc-internal-format msgid "%s does not support %s" msgstr "%s не падтрымлівае %s" -#: c-family/c-format.cc:2039 +#: c-family/c-format.cc:2040 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%s does not support %s with the %<%%%c%> %s format" msgstr "%s не падтрымлівае %s" -#: c-family/c-format.cc:2053 +#: c-family/c-format.cc:2054 #, gcc-internal-format, gfc-internal-format msgid "%s used within a quoted sequence" msgstr "" -#: c-family/c-format.cc:2066 +#: c-family/c-format.cc:2067 #, gcc-internal-format msgid "%qc conversion used unquoted" msgstr "" -#: c-family/c-format.cc:2184 c-family/c-format.cc:2515 +#: c-family/c-format.cc:2185 c-family/c-format.cc:2516 #, gcc-internal-format, gfc-internal-format msgid "repeated %s in format" msgstr "" -#: c-family/c-format.cc:2195 +#: c-family/c-format.cc:2196 #, gcc-internal-format msgid "missing fill character at end of strfmon format" msgstr "" -#: c-family/c-format.cc:2297 +#: c-family/c-format.cc:2298 #, gcc-internal-format, gfc-internal-format msgid "zero width in %s format" msgstr "" -#: c-family/c-format.cc:2320 +#: c-family/c-format.cc:2321 #, gcc-internal-format, gfc-internal-format msgid "empty left precision in %s format" msgstr "" -#: c-family/c-format.cc:2411 +#: c-family/c-format.cc:2412 #, gcc-internal-format, gfc-internal-format msgid "empty precision in %s format" msgstr "" -#: c-family/c-format.cc:2489 +#: c-family/c-format.cc:2490 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%s does not support the %qs %s length modifier" msgstr "%s не падтрымлівае %s" -#: c-family/c-format.cc:2545 +#: c-family/c-format.cc:2546 #, gcc-internal-format msgid "unknown conversion type character %qc in format" msgstr "" -#: c-family/c-format.cc:2557 +#: c-family/c-format.cc:2558 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%s does not support the %<%%%c%> %s format" msgstr "%s не падтрымлівае %s" -#: c-family/c-format.cc:2589 +#: c-family/c-format.cc:2590 #, gcc-internal-format msgid "%s ignored with %s and %<%%%c%> %s format" msgstr "" -#: c-family/c-format.cc:2594 +#: c-family/c-format.cc:2595 #, gcc-internal-format, gfc-internal-format msgid "%s ignored with %s in %s format" msgstr "" -#: c-family/c-format.cc:2601 +#: c-family/c-format.cc:2602 #, gcc-internal-format msgid "use of %s and %s together with %<%%%c%> %s format" msgstr "" -#: c-family/c-format.cc:2606 +#: c-family/c-format.cc:2607 #, gcc-internal-format, gfc-internal-format msgid "use of %s and %s together in %s format" msgstr "" -#: c-family/c-format.cc:2633 +#: c-family/c-format.cc:2634 #, gcc-internal-format msgid "%<%%%c%> yields only last 2 digits of year in some locales" msgstr "" -#: c-family/c-format.cc:2637 +#: c-family/c-format.cc:2638 #, gcc-internal-format msgid "%<%%%c%> yields only last 2 digits of year" msgstr "" -#: c-family/c-format.cc:2664 +#: c-family/c-format.cc:2665 #, gcc-internal-format msgid "no closing %<]%> for %<%%[%> format" msgstr "" -#: c-family/c-format.cc:2693 +#: c-family/c-format.cc:2694 #, gcc-internal-format msgid "use of %qs length modifier with %qc type character has either no effect or undefined behavior" msgstr "" -#: c-family/c-format.cc:2715 +#: c-family/c-format.cc:2716 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%s does not support the %<%%%s%c%> %s format" msgstr "%s не падтрымлівае %s" -#: c-family/c-format.cc:2753 +#: c-family/c-format.cc:2754 #, gcc-internal-format msgid "operand number specified with suppressed assignment" msgstr "" -#: c-family/c-format.cc:2757 +#: c-family/c-format.cc:2758 #, gcc-internal-format msgid "operand number specified for format taking no argument" msgstr "" -#: c-family/c-format.cc:3108 +#: c-family/c-format.cc:3109 #, gcc-internal-format msgid "unquoted type name %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3110 +#: c-family/c-format.cc:3111 #, gcc-internal-format msgid "unquoted operator %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3111 +#: c-family/c-format.cc:3112 #, gcc-internal-format msgid "unquoted keyword %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3114 +#: c-family/c-format.cc:3115 #, gcc-internal-format msgid "use %qs instead" msgstr "" -#: c-family/c-format.cc:3166 +#: c-family/c-format.cc:3167 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "unquoted attribute in format" msgstr "\"%s\" атрыбут ігнарыруецца" -#: c-family/c-format.cc:3179 +#: c-family/c-format.cc:3180 #, fuzzy, gcc-internal-format msgid "unquoted name of built-in function %<%.*s%> in format" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: c-family/c-format.cc:3193 +#: c-family/c-format.cc:3194 #, gcc-internal-format msgid "unquoted identifier or keyword %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3227 +#: c-family/c-format.cc:3228 #, gcc-internal-format msgid "misspelled term %<%.*s%> in format; use %<%s%s%> instead" msgstr "" -#: c-family/c-format.cc:3271 +#: c-family/c-format.cc:3272 #, gcc-internal-format msgid "quoted %qs directive in format; use %qs instead" msgstr "" -#: c-family/c-format.cc:3278 c-family/c-format.cc:3549 +#: c-family/c-format.cc:3279 c-family/c-format.cc:3550 #, gcc-internal-format msgid "contraction %<%.*s%> in format; use %qs instead" msgstr "" -#: c-family/c-format.cc:3318 +#: c-family/c-format.cc:3319 #, gcc-internal-format msgid "unquoted whitespace character %qc in format" msgstr "" -#: c-family/c-format.cc:3331 +#: c-family/c-format.cc:3332 #, gcc-internal-format msgid "spurious trailing space in format" msgstr "" -#: c-family/c-format.cc:3352 +#: c-family/c-format.cc:3353 #, gcc-internal-format msgid "inconsistent capitalization in format" msgstr "" -#: c-family/c-format.cc:3359 +#: c-family/c-format.cc:3360 #, gcc-internal-format, gfc-internal-format msgid "unquoted sequence of %i consecutive space characters in format" msgstr "" -#: c-family/c-format.cc:3379 +#: c-family/c-format.cc:3380 #, gcc-internal-format msgid "unquoted control characters in format" msgstr "" -#: c-family/c-format.cc:3386 +#: c-family/c-format.cc:3387 #, gcc-internal-format msgid "unquoted control character %qc in format" msgstr "" -#: c-family/c-format.cc:3444 +#: c-family/c-format.cc:3445 #, gcc-internal-format msgid "unquoted option name %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3504 +#: c-family/c-format.cc:3505 #, gcc-internal-format msgid "unbalanced punctuation character %qc in format" msgstr "" -#: c-family/c-format.cc:3523 +#: c-family/c-format.cc:3524 #, gcc-internal-format msgid "unquoted preprocessing directive %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3559 +#: c-family/c-format.cc:3560 #, gcc-internal-format msgid "bare apostrophe %<'%> in format" msgstr "" -#: c-family/c-format.cc:3561 +#: c-family/c-format.cc:3562 #, gcc-internal-format msgid "if avoiding the apostrophe is not feasible, enclose it in a pair of %qs and %qs directives instead" msgstr "" -#: c-family/c-format.cc:3573 +#: c-family/c-format.cc:3574 #, gcc-internal-format msgid "grave accent %<`%> in format" msgstr "" -#: c-family/c-format.cc:3575 +#: c-family/c-format.cc:3576 #, gcc-internal-format msgid "use the apostrophe directive %qs instead" msgstr "" -#: c-family/c-format.cc:3587 +#: c-family/c-format.cc:3588 #, gcc-internal-format msgid "space followed by punctuation character %<%c%>" msgstr "" -#: c-family/c-format.cc:3598 +#: c-family/c-format.cc:3599 #, gcc-internal-format msgid "quoted %qs directive in format" msgstr "" -#: c-family/c-format.cc:3600 +#: c-family/c-format.cc:3601 #, gcc-internal-format msgid "if using %qs is not feasible, use %qs instead" msgstr "" -#: c-family/c-format.cc:3629 +#: c-family/c-format.cc:3630 #, gcc-internal-format msgid "spurious leading punctuation sequence %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3669 +#: c-family/c-format.cc:3670 #, gcc-internal-format msgid "spurious trailing punctuation sequence %<%.*s%> in format" msgstr "" -#: c-family/c-format.cc:3686 +#: c-family/c-format.cc:3687 #, gcc-internal-format msgid "unquoted sequence of %i consecutive punctuation characters %q.*s in format" msgstr "" -#: c-family/c-format.cc:3706 +#: c-family/c-format.cc:3707 #, gcc-internal-format msgid "unquoted non-graph characters in format" msgstr "" -#: c-family/c-format.cc:3713 +#: c-family/c-format.cc:3714 #, gcc-internal-format msgid "unquoted non-graph character %qc in format" msgstr "" -#: c-family/c-format.cc:3745 +#: c-family/c-format.cc:3746 #, gcc-internal-format msgid "unbalanced punctuation character %<%c%> in format" msgstr "" -#: c-family/c-format.cc:3752 +#: c-family/c-format.cc:3753 #, fuzzy, gcc-internal-format #| msgid "unterminated comment" msgid "unterminated quoting directive" msgstr "незавершаныя каментарыі" -#: c-family/c-format.cc:3761 +#: c-family/c-format.cc:3762 #, gcc-internal-format msgid "unterminated quote character %<%c%> in format" msgstr "" -#: c-family/c-format.cc:3831 +#: c-family/c-format.cc:3832 #, gcc-internal-format msgid "spurious trailing %<%%%> in format" msgstr "" -#: c-family/c-format.cc:3891 +#: c-family/c-format.cc:3892 #, gcc-internal-format msgid "conversion lacks type at end of format" msgstr "" -#: c-family/c-format.cc:3920 +#: c-family/c-format.cc:3921 #, fuzzy, gcc-internal-format msgid "nested quoting directive" msgstr "нерэчаісны ініцыялізатар" -#: c-family/c-format.cc:3931 +#: c-family/c-format.cc:3932 #, fuzzy, gcc-internal-format msgid "unmatched quoting directive" msgstr "нерэчаісны ініцыялізатар" -#: c-family/c-format.cc:3946 +#: c-family/c-format.cc:3947 #, gcc-internal-format msgid "%qc directive redundant after prior occurence of the same" msgstr "" -#: c-family/c-format.cc:3952 +#: c-family/c-format.cc:3953 #, gcc-internal-format msgid "unmatched color reset directive" msgstr "" -#: c-family/c-format.cc:3964 +#: c-family/c-format.cc:3965 #, gcc-internal-format msgid "%qc conversion used within a quoted sequence" msgstr "" -#: c-family/c-format.cc:4004 +#: c-family/c-format.cc:4005 #, gcc-internal-format msgid "embedded %<\\0%> in format" msgstr "" -#: c-family/c-format.cc:4020 +#: c-family/c-format.cc:4021 #, fuzzy, gcc-internal-format #| msgid "unterminated comment" msgid "unterminated color directive" msgstr "незавершаныя каментарыі" -#: c-family/c-format.cc:4142 +#: c-family/c-format.cc:4143 #, gcc-internal-format, gfc-internal-format msgid "writing through null pointer (argument %d)" msgstr "" -#: c-family/c-format.cc:4153 +#: c-family/c-format.cc:4154 #, gcc-internal-format, gfc-internal-format msgid "reading through null pointer (argument %d)" msgstr "" -#: c-family/c-format.cc:4173 +#: c-family/c-format.cc:4174 #, gcc-internal-format, gfc-internal-format msgid "writing into constant object (argument %d)" msgstr "" -#: c-family/c-format.cc:4185 +#: c-family/c-format.cc:4186 #, gcc-internal-format, gfc-internal-format msgid "extra type qualifiers in format argument (argument %d)" msgstr "" -#: c-family/c-format.cc:4727 +#: c-family/c-format.cc:4728 #, gcc-internal-format msgid "%s %<%s%.*s%> expects argument of type %<%s%s%>, but argument %d has type %qT" msgstr "" -#: c-family/c-format.cc:4736 +#: c-family/c-format.cc:4737 #, gcc-internal-format msgid "%s %<%s%.*s%> expects a matching %<%s%s%> argument" msgstr "" -#: c-family/c-format.cc:4746 +#: c-family/c-format.cc:4747 #, gcc-internal-format msgid "%s %<%s%.*s%> expects argument of type %<%T%s%>, but argument %d has type %qT" msgstr "" -#: c-family/c-format.cc:4755 +#: c-family/c-format.cc:4756 #, gcc-internal-format msgid "%s %<%s%.*s%> expects a matching %<%T%s%> argument" msgstr "" -#: c-family/c-format.cc:4817 c-family/c-format.cc:4823 -#: c-family/c-format.cc:4877 +#: c-family/c-format.cc:4818 c-family/c-format.cc:4824 +#: c-family/c-format.cc:4878 #, gcc-internal-format msgid "%<__gcc_host_wide_int__%> is not defined as a type" msgstr "" -#: c-family/c-format.cc:4830 c-family/c-format.cc:4887 +#: c-family/c-format.cc:4831 c-family/c-format.cc:4888 #, gcc-internal-format msgid "%<__gcc_host_wide_int__%> is not defined as % or %" msgstr "" -#: c-family/c-format.cc:4939 +#: c-family/c-format.cc:4940 #, gcc-internal-format msgid "% is not defined as a type" msgstr "" -#: c-family/c-format.cc:4983 +#: c-family/c-format.cc:4984 #, fuzzy, gcc-internal-format msgid "%qs is not defined as a type" msgstr "\"%s\" мае незавершаны тып" -#: c-family/c-format.cc:5009 +#: c-family/c-format.cc:5010 #, gcc-internal-format msgid "% is not defined as a type" msgstr "" -#: c-family/c-format.cc:5026 +#: c-family/c-format.cc:5027 #, gcc-internal-format msgid "% is not defined as a type" msgstr "" -#: c-family/c-format.cc:5032 +#: c-family/c-format.cc:5033 #, gcc-internal-format msgid "% is not defined as a pointer type" msgstr "" -#: c-family/c-format.cc:5208 +#: c-family/c-format.cc:5209 #, gcc-internal-format msgid "argument to be formatted is not %<...%>" msgstr "" -#: c-family/c-format.cc:5220 +#: c-family/c-format.cc:5221 #, gcc-internal-format msgid "strftime formats cannot format arguments" msgstr "" @@ -34317,7 +34330,7 @@ msgstr "" msgid "traditional C rejects string constant concatenation" msgstr "" -#: c-family/c-omp.cc:131 cp/pt.cc:19141 +#: c-family/c-omp.cc:131 cp/pt.cc:19259 #, gcc-internal-format msgid "%<#pragma omp critical%> with % clause requires a name, except when % is used" msgstr "" @@ -34372,7 +34385,7 @@ msgstr "" msgid "% modifier may not be specified on % construct" msgstr "" -#: c-family/c-omp.cc:964 cp/semantics.cc:10447 +#: c-family/c-omp.cc:964 cp/semantics.cc:10463 #, gcc-internal-format msgid "invalid type for iteration variable %qE" msgstr "" @@ -34388,17 +34401,17 @@ msgstr "" msgid "%qE is not initialized" msgstr "прапушчан ініцыялізатар" -#: c-family/c-omp.cc:1006 cp/semantics.cc:10336 +#: c-family/c-omp.cc:1006 cp/semantics.cc:10352 #, gcc-internal-format msgid "missing controlling predicate" msgstr "" -#: c-family/c-omp.cc:1112 cp/semantics.cc:9952 +#: c-family/c-omp.cc:1112 cp/semantics.cc:9968 #, fuzzy, gcc-internal-format msgid "invalid controlling predicate" msgstr "нерэчаісны ініцыялізатар" -#: c-family/c-omp.cc:1119 cp/semantics.cc:10342 +#: c-family/c-omp.cc:1119 cp/semantics.cc:10358 #, fuzzy, gcc-internal-format msgid "missing increment expression" msgstr "аргумент для \"%s\" прапушчан" @@ -34408,7 +34421,7 @@ msgstr "аргумент для \"%s\" прапушчан" msgid "increment is not constant 1 or -1 for % condition" msgstr "" -#: c-family/c-omp.cc:1250 cp/semantics.cc:10069 +#: c-family/c-omp.cc:1250 cp/semantics.cc:10085 #, fuzzy, gcc-internal-format msgid "invalid increment expression" msgstr "нерэчаісны ініцыялізатар" @@ -34473,7 +34486,7 @@ msgstr "" msgid "% % clause on construct other than %, %, %, %, %" msgstr "" -#: c-family/c-omp.cc:2744 c/c-typeck.cc:15675 cp/semantics.cc:9065 +#: c-family/c-omp.cc:2744 c/c-typeck.cc:15675 cp/semantics.cc:9081 #, gcc-internal-format msgid "%qD specified in % clause but not in an explicit privatization clause" msgstr "" @@ -34586,12 +34599,12 @@ msgstr "немагчыма адчыніць файл уводу `%s'" msgid "the %qs debug info cannot be used with pre-compiled headers" msgstr "" -#: c-family/c-opts.cc:1298 d/d-lang.cc:1291 +#: c-family/c-opts.cc:1298 d/d-lang.cc:1311 #, gcc-internal-format msgid "opening dependency file %s: %m" msgstr "" -#: c-family/c-opts.cc:1309 d/d-lang.cc:1304 +#: c-family/c-opts.cc:1309 d/d-lang.cc:1324 #, gcc-internal-format msgid "closing dependency file %s: %m" msgstr "" @@ -35033,8 +35046,8 @@ msgstr "вяртанне" msgid "wrong type argument to %s" msgstr "не хапае аргументаў у функцыі" -#: c-family/c-warn.cc:58 c-family/c-warn.cc:71 cp/constexpr.cc:3113 -#: cp/constexpr.cc:6554 +#: c-family/c-warn.cc:58 c-family/c-warn.cc:71 cp/constexpr.cc:3121 +#: cp/constexpr.cc:6572 #, gcc-internal-format msgid "overflow in constant expression" msgstr "" @@ -35793,7 +35806,7 @@ msgid_plural "passing argument %i to %qs-qualified parameter aliases with argume msgstr[0] "" msgstr[1] "" -#: c-family/c-warn.cc:2807 c/c-typeck.cc:5588 cp/call.cc:5934 +#: c-family/c-warn.cc:2807 c/c-typeck.cc:5588 cp/call.cc:5949 #, gcc-internal-format msgid "this condition has identical branches" msgstr "" @@ -35813,7 +35826,7 @@ msgstr "" msgid "converting a packed %qT pointer (alignment %d) to a %qT pointer (alignment %d) may result in an unaligned pointer value" msgstr "" -#: c-family/c-warn.cc:3015 c-family/c-warn.cc:3018 cp/init.cc:657 +#: c-family/c-warn.cc:3015 c-family/c-warn.cc:3018 cp/init.cc:656 #, gcc-internal-format msgid "defined here" msgstr "" @@ -35983,7 +35996,7 @@ msgstr "" msgid "too many input files" msgstr "вельмі шмат уваходзячых файлаў" -#: c-family/known-headers.cc:309 +#: c-family/known-headers.cc:323 #, gcc-internal-format msgid "%qs is defined in header %qs; did you forget to %<#include %s%>?" msgstr "" @@ -36350,7 +36363,7 @@ msgstr "" msgid "subframework include %s conflicts with framework include" msgstr "" -#: config/darwin-c.cc:708 +#: config/darwin-c.cc:709 #, gcc-internal-format msgid "unknown value %qs of %<-mmacosx-version-min%>" msgstr "" @@ -36360,53 +36373,53 @@ msgstr "" msgid "% for % failed: %m" msgstr "" -#: config/darwin-driver.cc:192 +#: config/darwin-driver.cc:186 #, gcc-internal-format msgid "could not understand % %q.*s" msgstr "" -#: config/darwin-driver.cc:232 +#: config/darwin-driver.cc:226 #, fuzzy, gcc-internal-format msgid "could not understand version %qs" msgstr "не магу знайсці крыніцу %s\n" -#: config/darwin-driver.cc:306 +#: config/darwin-driver.cc:300 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "this compiler does not support %qs" msgstr "%s не падтрымлівае %s" -#: config/darwin-driver.cc:332 +#: config/darwin-driver.cc:326 #, gcc-internal-format msgid "%qs is not valid for %<-mmacosx-version-min%>" msgstr "" -#: config/darwin-driver.cc:373 +#: config/darwin-driver.cc:367 #, gcc-internal-format msgid "this compiler does not support PowerPC (%<-arch%> option ignored)" msgstr "" -#: config/darwin-driver.cc:380 +#: config/darwin-driver.cc:374 #, gcc-internal-format msgid "%qs conflicts with %<-arch i386%> (%qs ignored)" msgstr "" -#: config/darwin-driver.cc:389 +#: config/darwin-driver.cc:383 #, gcc-internal-format msgid "%<-m32%> conflicts with %<-arch x86_64%> (%<-m32%> ignored)" msgstr "" -#: config/darwin-driver.cc:396 +#: config/darwin-driver.cc:390 #, gcc-internal-format msgid "this compiler does not support x86 (%<-arch%> option ignored)" msgstr "" -#: config/darwin-driver.cc:403 +#: config/darwin-driver.cc:397 #, gcc-internal-format msgid "%qs conflicts with %<-arch ppc%> (%qs ignored)" msgstr "" -#: config/darwin-driver.cc:412 +#: config/darwin-driver.cc:406 #, gcc-internal-format msgid "%<-m32%> conflicts with %<-arch ppc64%> (%<-m32%> ignored)" msgstr "" @@ -36566,44 +36579,44 @@ msgstr "" msgid "PIC is only supported for RTPs" msgstr "" -#: config/aarch64/aarch64-builtins.cc:1870 -#: config/aarch64/aarch64-builtins.cc:2104 config/arm/arm-builtins.cc:3086 +#: config/aarch64/aarch64-builtins.cc:1937 +#: config/aarch64/aarch64-builtins.cc:2171 config/arm/arm-builtins.cc:3086 #, fuzzy, gcc-internal-format, gfc-internal-format msgid "argument %d must be a constant immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/aarch64/aarch64-builtins.cc:1942 config/arm/arm-builtins.cc:3441 +#: config/aarch64/aarch64-builtins.cc:2009 config/arm/arm-builtins.cc:3441 #, gcc-internal-format msgid "lane index must be a constant immediate" msgstr "" -#: config/aarch64/aarch64-builtins.cc:1946 +#: config/aarch64/aarch64-builtins.cc:2013 #, gcc-internal-format msgid "total size and element size must be a nonzero constant immediate" msgstr "" -#: config/aarch64/aarch64-builtins.cc:2194 +#: config/aarch64/aarch64-builtins.cc:2261 #, fuzzy, gcc-internal-format msgid "argument must be a 16-bit constant immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/aarch64/aarch64-builtins.cc:2300 +#: config/aarch64/aarch64-builtins.cc:2367 #, gcc-internal-format msgid "Memory Tagging Extension does not support %<-mabi=ilp32%>" msgstr "" -#: config/aarch64/aarch64-builtins.cc:2335 +#: config/aarch64/aarch64-builtins.cc:2402 #, gcc-internal-format, gfc-internal-format msgid "argument %d must be a constant immediate in range [0,15]" msgstr "" -#: config/aarch64/aarch64-builtins.cc:3133 -#: config/aarch64/aarch64-builtins.cc:3153 +#: config/aarch64/aarch64-builtins.cc:3234 +#: config/aarch64/aarch64-builtins.cc:3254 #, gcc-internal-format, gfc-internal-format msgid "expected 64-bit address but argument 1 is %d-bit" msgstr "" -#: config/aarch64/aarch64-builtins.cc:3137 +#: config/aarch64/aarch64-builtins.cc:3238 #, gcc-internal-format, gfc-internal-format msgid "expected 64-bit address but argument 2 is %d-bit" msgstr "" @@ -36613,7 +36626,7 @@ msgstr "" msgid "%<#pragma GCC aarch64%> requires a string parameter" msgstr "" -#: config/aarch64/aarch64-c.cc:306 +#: config/aarch64/aarch64-c.cc:308 #, gcc-internal-format msgid "unknown %<#pragma GCC aarch64%> option %qs" msgstr "" @@ -36658,308 +36671,307 @@ msgstr "" msgid "passing %wd to argument %d of %qE, which expects a valid %qT value" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1211 +#: config/aarch64/aarch64-sve-builtins.cc:1202 #, gcc-internal-format msgid "%qE has no form that takes %qT arguments" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1277 +#: config/aarch64/aarch64-sve-builtins.cc:1268 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a 32-bit or 64-bit integer type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1297 +#: config/aarch64/aarch64-sve-builtins.cc:1288 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a pointer type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1300 +#: config/aarch64/aarch64-sve-builtins.cc:1291 #, gcc-internal-format msgid "an explicit type suffix is needed when using a vector of base addresses" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1309 +#: config/aarch64/aarch64-sve-builtins.cc:1300 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, but %qT is not a valid SVE element type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1317 +#: config/aarch64/aarch64-sve-builtins.cc:1308 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a pointer to 32-bit or 64-bit elements" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1351 +#: config/aarch64/aarch64-sve-builtins.cc:1342 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a single SVE vector rather than a tuple" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1355 -#, gcc-internal-format -msgid "passing single vector %qT to argument %d of %qE, which expects a tuple of %d vectors" -msgstr "" - -#: config/aarch64/aarch64-sve-builtins.cc:1359 +#. num_vectors is always != 1, so the singular isn't needed. +#: config/aarch64/aarch64-sve-builtins.cc:1347 +#: config/aarch64/aarch64-sve-builtins.cc:1353 #, gcc-internal-format -msgid "passing %qT to argument %d of %qE, which expects a tuple of %d vectors" -msgstr "" +msgid "%qT%d%qE%d" +msgid_plural "passing single vector %qT to argument %d of %qE, which expects a tuple of %d vectors" +msgstr[0] "" +msgstr[1] "" -#: config/aarch64/aarch64-sve-builtins.cc:1367 +#: config/aarch64/aarch64-sve-builtins.cc:1362 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects an SVE vector type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1370 +#: config/aarch64/aarch64-sve-builtins.cc:1365 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects an SVE tuple type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1394 +#: config/aarch64/aarch64-sve-builtins.cc:1389 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1414 -#: config/aarch64/aarch64-sve-builtins.cc:1621 +#: config/aarch64/aarch64-sve-builtins.cc:1409 +#: config/aarch64/aarch64-sve-builtins.cc:1616 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of unsigned integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1435 +#: config/aarch64/aarch64-sve-builtins.cc:1430 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of 32-bit or 64-bit elements" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1466 +#: config/aarch64/aarch64-sve-builtins.cc:1461 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector or scalar type" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1488 -#: config/aarch64/aarch64-sve-builtins.cc:2054 +#: config/aarch64/aarch64-sve-builtins.cc:1483 +#: config/aarch64/aarch64-sve-builtins.cc:2049 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1508 +#: config/aarch64/aarch64-sve-builtins.cc:1503 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, but previous arguments had type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1602 +#: config/aarch64/aarch64-sve-builtins.cc:1597 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of %d-bit elements" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1614 +#: config/aarch64/aarch64-sve-builtins.cc:1609 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of signed integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1641 +#: config/aarch64/aarch64-sve-builtins.cc:1636 #, gcc-internal-format msgid "arguments %d and %d of %qE must have the same element size, but the values passed here have type %qT and %qT respectively" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1662 +#: config/aarch64/aarch64-sve-builtins.cc:1657 #, gcc-internal-format msgid "arguments %d and %d of %qE must have the same signedness, but the values passed here have type %qT and %qT respectively" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1673 +#: config/aarch64/aarch64-sve-builtins.cc:1668 #, gcc-internal-format msgid "passing %qT instead of the expected %qT to argument %d of %qE, after passing %qT to argument %d" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1694 +#: config/aarch64/aarch64-sve-builtins.cc:1689 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, but argument %d had type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1712 +#: config/aarch64/aarch64-sve-builtins.cc:1707 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects %qs" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1728 +#: config/aarch64/aarch64-sve-builtins.cc:1723 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a scalar pointer" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1751 +#: config/aarch64/aarch64-sve-builtins.cc:1746 #, gcc-internal-format msgid "call to %qE is ambiguous; argument %d has type %qs but argument %d has type %qs" msgstr "" #. It doesn't really matter whether the element is expected to be #. the same size as type suffix 0. -#: config/aarch64/aarch64-sve-builtins.cc:1796 +#: config/aarch64/aarch64-sve-builtins.cc:1791 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a scalar element" msgstr "" #. It doesn't seem useful to distinguish between signed and unsigned #. scalars here. -#: config/aarch64/aarch64-sve-builtins.cc:1802 +#: config/aarch64/aarch64-sve-builtins.cc:1797 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a scalar integer" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1838 +#: config/aarch64/aarch64-sve-builtins.cc:1833 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects %qs or %qs" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1858 +#: config/aarch64/aarch64-sve-builtins.cc:1853 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of 32-bit or 64-bit integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1908 +#: config/aarch64/aarch64-sve-builtins.cc:1903 #, gcc-internal-format msgid "when storing %qT, %qE requires a vector base and a scalar index" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1913 +#: config/aarch64/aarch64-sve-builtins.cc:1908 #, gcc-internal-format msgid "%qE requires a vector base and a scalar index" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1917 +#: config/aarch64/aarch64-sve-builtins.cc:1912 #, fuzzy, gcc-internal-format #| msgid "ISO C does not support complex integer types" msgid "%qE does not support 32-bit vector type %qT" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/aarch64/aarch64-sve-builtins.cc:1945 +#: config/aarch64/aarch64-sve-builtins.cc:1940 #, gcc-internal-format msgid "%qE does not support 32-bit sign-extended offsets" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1948 +#: config/aarch64/aarch64-sve-builtins.cc:1943 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%qE does not support sign-extended offsets" msgstr "%s не падтрымлівае %s" -#: config/aarch64/aarch64-sve-builtins.cc:1961 +#: config/aarch64/aarch64-sve-builtins.cc:1956 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which when loading %qT expects a vector of %d-bit integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:1966 +#: config/aarch64/aarch64-sve-builtins.cc:1961 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which when storing %qT expects a vector of %d-bit integers" msgstr "" #. TYPE is part of the function name. -#: config/aarch64/aarch64-sve-builtins.cc:1973 +#: config/aarch64/aarch64-sve-builtins.cc:1968 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector of %d-bit integers" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:2021 +#: config/aarch64/aarch64-sve-builtins.cc:2016 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, which expects a vector or pointer base address" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:2105 +#: config/aarch64/aarch64-sve-builtins.cc:2100 #, gcc-internal-format msgid "cannot combine a base of type %qT with an offset of type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:2109 +#: config/aarch64/aarch64-sve-builtins.cc:2104 #, gcc-internal-format msgid "cannot combine a base of type %qT with an index of type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:2197 +#: config/aarch64/aarch64-sve-builtins.cc:2192 #, gcc-internal-format msgid "passing %qT to argument %d of %qE, but its %qT form does not accept scalars" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3526 +#: config/aarch64/aarch64-sve-builtins.cc:3521 #: config/arm/arm-mve-builtins.cc:173 #, fuzzy, gcc-internal-format msgid "duplicate definition of %qs" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: config/aarch64/aarch64-sve-builtins.cc:3702 +#: config/aarch64/aarch64-sve-builtins.cc:3697 #, fuzzy, gcc-internal-format msgid "%qs applied to non-SVE type %qT" msgstr "\"%s\" мае незавершаны тып" -#: config/aarch64/aarch64-sve-builtins.cc:3708 +#: config/aarch64/aarch64-sve-builtins.cc:3703 #, fuzzy, gcc-internal-format msgid "%qs applied to non-vector type %qT" msgstr "\"%s\" мае незавершаны тып" -#: config/aarch64/aarch64-sve-builtins.cc:3715 +#: config/aarch64/aarch64-sve-builtins.cc:3710 #, gcc-internal-format msgid "%qs applied to type %qT, which already has a size" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3723 +#: config/aarch64/aarch64-sve-builtins.cc:3718 #, fuzzy, gcc-internal-format msgid "%qs requires an integer constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: config/aarch64/aarch64-sve-builtins.cc:3731 +#: config/aarch64/aarch64-sve-builtins.cc:3726 #, fuzzy, gcc-internal-format #| msgid "unsupported version" msgid "unsupported SVE vector size" msgstr "непадтрымліваемая версія" -#: config/aarch64/aarch64-sve-builtins.cc:3845 +#: config/aarch64/aarch64-sve-builtins.cc:3840 #, gcc-internal-format msgid "SVE type %qT does not have a fixed size" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3850 +#: config/aarch64/aarch64-sve-builtins.cc:3845 #, gcc-internal-format msgid "SVE type %qT does not have a defined alignment" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3855 +#: config/aarch64/aarch64-sve-builtins.cc:3850 #, gcc-internal-format msgid "variables of type %qT cannot have thread-local storage duration" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3861 +#: config/aarch64/aarch64-sve-builtins.cc:3856 #, gcc-internal-format msgid "arithmetic on pointer to SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3868 +#: config/aarch64/aarch64-sve-builtins.cc:3863 #, gcc-internal-format msgid "member variables cannot have SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3870 +#: config/aarch64/aarch64-sve-builtins.cc:3865 #, gcc-internal-format msgid "fields cannot have SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3875 +#: config/aarch64/aarch64-sve-builtins.cc:3870 #, gcc-internal-format msgid "array elements cannot have SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3880 +#: config/aarch64/aarch64-sve-builtins.cc:3875 #, gcc-internal-format msgid "cannot allocate objects with SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3885 +#: config/aarch64/aarch64-sve-builtins.cc:3880 #, gcc-internal-format msgid "cannot delete objects with SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3890 +#: config/aarch64/aarch64-sve-builtins.cc:3885 #, gcc-internal-format msgid "cannot throw or catch SVE type %qT" msgstr "" -#: config/aarch64/aarch64-sve-builtins.cc:3895 +#: config/aarch64/aarch64-sve-builtins.cc:3890 #, gcc-internal-format msgid "capture by copy of SVE type %qT" msgstr "" @@ -37017,8 +37029,8 @@ msgid "SVE type %qT cannot be passed to an unprototyped function" msgstr "\"%s\" звычайна функцыя" #: config/aarch64/aarch64.cc:7485 config/aarch64/aarch64.cc:7548 -#: config/aarch64/aarch64.cc:7671 config/aarch64/aarch64.cc:19665 -#: config/arm/arm.cc:7234 config/arm/arm.cc:7264 config/arm/arm.cc:29057 +#: config/aarch64/aarch64.cc:7671 config/aarch64/aarch64.cc:19669 +#: config/arm/arm.cc:7234 config/arm/arm.cc:7264 config/arm/arm.cc:29065 #, gcc-internal-format msgid "parameter passing for argument of type %qT changed in GCC 9.1" msgstr "" @@ -37070,12 +37082,12 @@ msgid "unknown tuning option (%s)" msgstr "невядомая назва рэгістра: %s\n" #: config/aarch64/aarch64.cc:17546 config/arm/arm.cc:3188 -#: config/riscv/riscv.cc:5061 +#: config/riscv/riscv.cc:5079 #, gcc-internal-format msgid "incompatible options %<-mstack-protector-guard=global%> and %<-mstack-protector-guard-offset=%s%>" msgstr "" -#: config/aarch64/aarch64.cc:17555 config/riscv/riscv.cc:5070 +#: config/aarch64/aarch64.cc:17555 config/riscv/riscv.cc:5088 #, gcc-internal-format msgid "both %<-mstack-protector-guard-offset%> and %<-mstack-protector-guard-reg%> must be used with %<-mstack-protector-guard=sysreg%>" msgstr "" @@ -37086,7 +37098,7 @@ msgid "specify a system register with a small string length" msgstr "" #: config/aarch64/aarch64.cc:17573 config/arm/arm.cc:3200 -#: config/riscv/riscv.cc:5099 config/rs6000/rs6000.cc:4569 +#: config/riscv/riscv.cc:5117 config/rs6000/rs6000.cc:4561 #, fuzzy, gcc-internal-format msgid "%qs is not a valid offset in %qs" msgstr "Нерэчаісны выбар %s" @@ -37166,172 +37178,170 @@ msgstr "" msgid "unknown value %qs for %<-mtune%>" msgstr "" -#: config/aarch64/aarch64.cc:18181 +#: config/aarch64/aarch64.cc:18185 #, gcc-internal-format msgid "switch %<-mcpu=%s%> conflicts with %<-march=%s%> switch" msgstr "" -#: config/aarch64/aarch64.cc:18237 +#: config/aarch64/aarch64.cc:18241 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "assembler does not support %<-mabi=ilp32%>" msgstr "%s не падтрымлівае %s" -#: config/aarch64/aarch64.cc:18244 +#: config/aarch64/aarch64.cc:18248 #, gcc-internal-format msgid "return address signing is only supported for %<-mabi=lp64%>" msgstr "" -#: config/aarch64/aarch64.cc:18326 +#: config/aarch64/aarch64.cc:18330 #, gcc-internal-format msgid "code model %qs with %<-f%s%>" msgstr "" -#: config/aarch64/aarch64.cc:18329 +#: config/aarch64/aarch64.cc:18333 #, fuzzy, gcc-internal-format msgid "code model %qs not supported in ilp32 mode" msgstr "-pipe не падтрымліваецца" -#: config/aarch64/aarch64.cc:18508 +#: config/aarch64/aarch64.cc:18512 #, gcc-internal-format msgid "missing name in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18511 +#: config/aarch64/aarch64.cc:18515 #, gcc-internal-format msgid "invalid name %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18515 +#: config/aarch64/aarch64.cc:18519 #, gcc-internal-format msgid "invalid feature modifier %s of value %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18550 +#: config/aarch64/aarch64.cc:18554 #, gcc-internal-format msgid "missing name in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18553 +#: config/aarch64/aarch64.cc:18557 #, gcc-internal-format msgid "invalid name %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18557 config/aarch64/aarch64.cc:18664 +#: config/aarch64/aarch64.cc:18561 config/aarch64/aarch64.cc:18668 #, gcc-internal-format msgid "invalid feature modifier %qs of value %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18580 +#: config/aarch64/aarch64.cc:18584 #, gcc-internal-format msgid "missing argument to % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18584 +#: config/aarch64/aarch64.cc:18588 #, gcc-internal-format msgid "invalid protection type %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18619 +#: config/aarch64/aarch64.cc:18623 #, gcc-internal-format msgid "invalid name %qs in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18660 +#: config/aarch64/aarch64.cc:18664 #, gcc-internal-format msgid "missing value in % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18718 config/aarch64/aarch64.cc:18891 +#: config/aarch64/aarch64.cc:18722 config/aarch64/aarch64.cc:18895 #, gcc-internal-format msgid "malformed % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:18762 +#: config/aarch64/aarch64.cc:18766 #, gcc-internal-format msgid "pragma or attribute % does not accept an argument" msgstr "" -#: config/aarch64/aarch64.cc:18770 config/i386/i386-options.cc:1234 +#: config/aarch64/aarch64.cc:18774 config/i386/i386-options.cc:1234 #, gcc-internal-format msgid "pragma or attribute % does not allow a negated form" msgstr "" -#: config/aarch64/aarch64.cc:18824 +#: config/aarch64/aarch64.cc:18828 #, gcc-internal-format msgid "pragma or attribute % is not valid" msgstr "" -#: config/aarch64/aarch64.cc:18881 config/arm/arm.cc:33166 -#: config/rs6000/rs6000.cc:24260 config/s390/s390.cc:15840 +#: config/aarch64/aarch64.cc:18885 config/arm/arm.cc:33174 +#: config/rs6000/rs6000.cc:24271 config/s390/s390.cc:15857 #, gcc-internal-format msgid "attribute % argument not a string" msgstr "" -#: config/aarch64/aarch64.cc:18916 +#: config/aarch64/aarch64.cc:18920 #, gcc-internal-format msgid "arch extension %<%s%> should be prefixed by %<+%>" msgstr "" -#: config/aarch64/aarch64.cc:18919 +#: config/aarch64/aarch64.cc:18923 #, gcc-internal-format msgid "pragma or attribute % is not valid" msgstr "" -#: config/aarch64/aarch64.cc:18928 +#: config/aarch64/aarch64.cc:18932 #, gcc-internal-format msgid "malformed % pragma or attribute" msgstr "" -#: config/aarch64/aarch64.cc:20393 config/arm/arm.cc:6582 -#: config/rs6000/rs6000-call.cc:374 config/s390/s390.cc:12227 -#: config/s390/s390.cc:12304 +#: config/aarch64/aarch64.cc:20397 config/arm/arm.cc:6582 +#: config/rs6000/rs6000-call.cc:374 config/s390/s390.cc:12236 msgid "parameter passing for argument of type %qT with %<[[no_unique_address]]%> members changed %{in GCC 10.1%}" msgstr "" -#: config/aarch64/aarch64.cc:20398 config/arm/arm.cc:6587 -#: config/rs6000/rs6000-call.cc:369 config/s390/s390.cc:12222 -#: config/s390/s390.cc:12299 +#: config/aarch64/aarch64.cc:20402 config/arm/arm.cc:6587 +#: config/rs6000/rs6000-call.cc:369 config/s390/s390.cc:12231 msgid "parameter passing for argument of type %qT when C++17 is enabled changed to match C++14 %{in GCC 10.1%}" msgstr "" -#: config/aarch64/aarch64.cc:20403 config/arm/arm.cc:6592 +#: config/aarch64/aarch64.cc:20407 config/arm/arm.cc:6592 msgid "parameter passing for argument of type %qT changed %{in GCC 12.1%}" msgstr "" -#: config/aarch64/aarch64.cc:21552 config/aarch64/aarch64.cc:21555 +#: config/aarch64/aarch64.cc:21556 config/aarch64/aarch64.cc:21559 #, gcc-internal-format msgid "lane %wd out of range %wd - %wd" msgstr "" -#: config/aarch64/aarch64.cc:26663 config/i386/i386.cc:23315 -#: config/i386/i386.cc:23443 +#: config/aarch64/aarch64.cc:26669 config/i386/i386.cc:23352 +#: config/i386/i386.cc:23480 #, fuzzy, gcc-internal-format #| msgid "unsupported version" msgid "unsupported simdlen %wd" msgstr "непадтрымліваемая версія" -#: config/aarch64/aarch64.cc:26673 config/aarch64/aarch64.cc:26700 +#: config/aarch64/aarch64.cc:26679 config/aarch64/aarch64.cc:26706 #, gcc-internal-format msgid "GCC does not currently support mixed size types for % functions" msgstr "" -#: config/aarch64/aarch64.cc:26677 +#: config/aarch64/aarch64.cc:26683 #, gcc-internal-format msgid "GCC does not currently support return type %qT for % functions" msgstr "" -#: config/aarch64/aarch64.cc:26681 +#: config/aarch64/aarch64.cc:26687 #, gcc-internal-format msgid "unsupported return type %qT for % functions" msgstr "" -#: config/aarch64/aarch64.cc:26704 +#: config/aarch64/aarch64.cc:26710 #, gcc-internal-format msgid "GCC does not currently support argument type %qT for % functions" msgstr "" -#: config/aarch64/aarch64.cc:26729 +#: config/aarch64/aarch64.cc:26735 #, gcc-internal-format msgid "GCC does not currently support simdlen %wd for type %qT" msgstr "" @@ -37392,7 +37402,7 @@ msgid "bad value %qs for %<-mmemory-latency%>" msgstr "" #: config/alpha/alpha.cc:6651 config/alpha/alpha.cc:6654 -#: config/arc/arc.cc:7078 config/arc/arc.cc:7352 config/s390/s390.cc:882 +#: config/arc/arc.cc:7078 config/arc/arc.cc:7352 config/s390/s390.cc:876 #: config/tilegx/tilegx.cc:3537 config/tilepro/tilepro.cc:3100 #, gcc-internal-format msgid "bad builtin fcode" @@ -37519,14 +37529,14 @@ msgstr "аргумент `__builtin_args_info' павінен быць канс #: config/bfin/bfin.cc:4694 config/bfin/bfin.cc:4755 config/bfin/bfin.cc:4785 #: config/bpf/bpf.cc:99 config/csky/csky.cc:6454 config/csky/csky.cc:6482 #: config/epiphany/epiphany.cc:491 config/gcn/gcn.cc:342 -#: config/h8300/h8300.cc:4944 config/i386/i386-options.cc:3336 -#: config/i386/i386-options.cc:3513 config/i386/i386-options.cc:3569 -#: config/i386/i386-options.cc:3620 config/i386/i386-options.cc:3657 +#: config/h8300/h8300.cc:4944 config/i386/i386-options.cc:3330 +#: config/i386/i386-options.cc:3507 config/i386/i386-options.cc:3563 +#: config/i386/i386-options.cc:3614 config/i386/i386-options.cc:3651 #: config/m68k/m68k.cc:792 config/mcore/mcore.cc:3066 -#: config/nvptx/nvptx.cc:5785 config/riscv/riscv.cc:3273 +#: config/nvptx/nvptx.cc:5785 config/riscv/riscv.cc:3287 #: config/rl78/rl78.cc:820 config/rl78/rl78.cc:889 -#: config/rs6000/rs6000.cc:20201 config/rx/rx.cc:2727 config/rx/rx.cc:2753 -#: config/s390/s390.cc:1097 config/s390/s390.cc:1184 config/sh/sh.cc:8428 +#: config/rs6000/rs6000.cc:20212 config/rx/rx.cc:2727 config/rx/rx.cc:2753 +#: config/s390/s390.cc:1091 config/s390/s390.cc:1178 config/sh/sh.cc:8428 #: config/sh/sh.cc:8446 config/sh/sh.cc:8470 config/sh/sh.cc:8541 #: config/sh/sh.cc:8564 config/stormy16/stormy16.cc:2229 #: config/v850/v850.cc:2010 config/visium/visium.cc:724 @@ -37668,17 +37678,17 @@ msgstr "памер \"%s\" больш чам %d байт" msgid "%qE attribute only applies to variables" msgstr "\"%s\" атрыбут ігнарыруецца" -#: config/arm/aarch-common.cc:550 config/i386/i386.cc:22179 +#: config/arm/aarch-common.cc:550 config/i386/i386.cc:22216 #, gcc-internal-format msgid "alternatives not allowed in % flag output" msgstr "" -#: config/arm/aarch-common.cc:611 config/i386/i386.cc:22243 +#: config/arm/aarch-common.cc:611 config/i386/i386.cc:22280 #, gcc-internal-format msgid "unknown % flag output %qs" msgstr "" -#: config/arm/aarch-common.cc:621 config/i386/i386.cc:22272 +#: config/arm/aarch-common.cc:621 config/i386/i386.cc:22309 #, gcc-internal-format msgid "invalid type for % flag output" msgstr "" @@ -37914,7 +37924,7 @@ msgstr "" msgid "RTP PIC is incompatible with %<-msingle-pic-base%>" msgstr "" -#: config/arm/arm.cc:3624 config/arm/arm.cc:33180 +#: config/arm/arm.cc:3624 config/arm/arm.cc:33188 #, gcc-internal-format msgid "FDPIC mode is not supported in Thumb-1 mode" msgstr "" @@ -38020,7 +38030,7 @@ msgid "argument of type %qT not permitted with %<-mgeneral-regs-only%>" msgstr "" #: config/arm/arm.cc:7007 config/arm/arm.cc:7228 config/arm/arm.cc:7261 -#: config/arm/arm.cc:29050 +#: config/arm/arm.cc:29058 #, gcc-internal-format msgid "parameter passing for argument of type %qT changed in GCC 7.1" msgstr "" @@ -38070,32 +38080,32 @@ msgstr "" msgid "%s %wd out of range %wd - %wd" msgstr "" -#: config/arm/arm.cc:25670 +#: config/arm/arm.cc:25678 #, gcc-internal-format msgid "unable to compute real location of stacked parameter" msgstr "" -#: config/arm/arm.cc:26333 +#: config/arm/arm.cc:26341 #, gcc-internal-format msgid "Unexpected thumb1 far jump" msgstr "" -#: config/arm/arm.cc:26592 +#: config/arm/arm.cc:26600 #, gcc-internal-format msgid "no low registers available for popping high registers" msgstr "" -#: config/arm/arm.cc:26844 +#: config/arm/arm.cc:26852 #, gcc-internal-format msgid "Interrupt Service Routines cannot be coded in Thumb-1 mode" msgstr "" -#: config/arm/arm.cc:27090 +#: config/arm/arm.cc:27098 #, gcc-internal-format msgid "%<-fstack-check=specific%> for Thumb-1" msgstr "" -#: config/arm/arm.cc:33195 +#: config/arm/arm.cc:33203 #, gcc-internal-format msgid "invalid fpu for target attribute or pragma %qs" msgstr "" @@ -38103,23 +38113,23 @@ msgstr "" #. This doesn't really make sense until we support #. general dynamic selection of the architecture and all #. sub-features. -#: config/arm/arm.cc:33203 +#: config/arm/arm.cc:33211 #, gcc-internal-format msgid "auto fpu selection not currently permitted here" msgstr "" -#: config/arm/arm.cc:33216 +#: config/arm/arm.cc:33224 #, gcc-internal-format msgid "invalid architecture for target attribute or pragma %qs" msgstr "" -#: config/arm/arm.cc:33230 +#: config/arm/arm.cc:33238 #, fuzzy, gcc-internal-format #| msgid "unknown register name: %s" msgid "unknown target attribute or pragma %qs" msgstr "невядомая назва рэгістра: %s" -#: config/arm/arm.cc:34192 +#: config/arm/arm.cc:34200 #, fuzzy, gcc-internal-format msgid "% flags not supported in thumb1 mode" msgstr "-pipe не падтрымліваецца" @@ -38197,18 +38207,18 @@ msgstr "-pipe не падтрымліваецца" msgid "%<-fPIE%> is not supported" msgstr "-pipe не падтрымліваецца" -#: config/avr/avr.cc:1050 config/avr/avr.cc:1055 config/riscv/riscv.cc:5358 +#: config/avr/avr.cc:1050 config/avr/avr.cc:1055 config/riscv/riscv.cc:5376 #, gcc-internal-format msgid "function attributes %qs and %qs are mutually exclusive" msgstr "" -#: config/avr/avr.cc:1076 config/riscv/riscv.cc:5370 +#: config/avr/avr.cc:1076 config/riscv/riscv.cc:5388 #, fuzzy, gcc-internal-format #| msgid "virtual functions cannot be friends" msgid "%qs function cannot have arguments" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: config/avr/avr.cc:1079 config/riscv/riscv.cc:5367 +#: config/avr/avr.cc:1079 config/riscv/riscv.cc:5385 #, fuzzy, gcc-internal-format #| msgid "function does not return string type" msgid "%qs function cannot return a value" @@ -38496,7 +38506,7 @@ msgid "indirect call in function, which are not supported by eBPF" msgstr "" #: config/bpf/bpf.cc:1019 config/loongarch/loongarch-builtins.cc:313 -#: config/mips/mips.cc:17141 config/nios2/nios2.cc:3596 +#: config/mips/mips.cc:17190 config/nios2/nios2.cc:3596 #: config/riscv/riscv-builtins.cc:222 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function" @@ -38677,12 +38687,12 @@ msgstr "" msgid "invalid IACC argument" msgstr "нерэчаіснае значэньне %%C" -#: config/frv/frv.cc:8592 config/sparc/sparc.cc:11006 +#: config/frv/frv.cc:8592 config/sparc/sparc.cc:11018 #, gcc-internal-format msgid "%qs expects a constant argument" msgstr "" -#: config/frv/frv.cc:8597 config/sparc/sparc.cc:11012 +#: config/frv/frv.cc:8597 config/sparc/sparc.cc:11024 #, gcc-internal-format msgid "constant argument out of range for %qs" msgstr "" @@ -38805,7 +38815,7 @@ msgstr "" #: config/gcn/gcn.cc:5591 #, gcc-internal-format -msgid "gang-private data-share memory exhausted (increase with %<-mgang-private-size=%>)" +msgid "%d bytes of gang-private data-share memory exhausted (increase with %<-mgang-private-size=%d%>, for example)" msgstr "" #: config/gcn/mkoffload.cc:165 config/i386/intelmic-mkoffload.cc:73 @@ -38920,132 +38930,132 @@ msgstr "аргумент `__builtin_args_info' павінен быць канс msgid "parameter to builtin not valid: %s" msgstr "параметр \"%s\" ініцыялізаваны" -#: config/i386/i386-expand.cc:9138 +#: config/i386/i386-expand.cc:9155 #, gcc-internal-format msgid "interrupt service routine cannot be called directly" msgstr "" -#: config/i386/i386-expand.cc:9562 config/i386/i386-expand.cc:11058 +#: config/i386/i386-expand.cc:9579 config/i386/i386-expand.cc:11075 #, fuzzy, gcc-internal-format msgid "the last argument must be a 2-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:9950 +#: config/i386/i386-expand.cc:9967 #, fuzzy, gcc-internal-format msgid "the fifth argument must be an 8-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:10045 +#: config/i386/i386-expand.cc:10062 #, fuzzy, gcc-internal-format msgid "the third argument must be an 8-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:10987 +#: config/i386/i386-expand.cc:11004 #, fuzzy, gcc-internal-format msgid "the last argument must be an 1-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11002 +#: config/i386/i386-expand.cc:11019 #, fuzzy, gcc-internal-format msgid "the last argument must be a 3-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11037 +#: config/i386/i386-expand.cc:11054 #, fuzzy, gcc-internal-format msgid "the last argument must be a 4-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11077 +#: config/i386/i386-expand.cc:11094 #, fuzzy, gcc-internal-format msgid "the last argument must be a 1-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11093 +#: config/i386/i386-expand.cc:11110 #, fuzzy, gcc-internal-format msgid "the last argument must be a 5-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11103 +#: config/i386/i386-expand.cc:11120 #, gcc-internal-format msgid "the next to last argument must be an 8-bit immediate" msgstr "" -#: config/i386/i386-expand.cc:11108 +#: config/i386/i386-expand.cc:11125 #, fuzzy, gcc-internal-format msgid "the last argument must be an 8-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11245 +#: config/i386/i386-expand.cc:11262 #, fuzzy, gcc-internal-format msgid "the third argument must be comparison constant" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/i386/i386-expand.cc:11250 +#: config/i386/i386-expand.cc:11267 #, gcc-internal-format msgid "incorrect comparison mode" msgstr "" -#: config/i386/i386-expand.cc:11256 config/i386/i386-expand.cc:11614 +#: config/i386/i386-expand.cc:11273 config/i386/i386-expand.cc:11631 #, gcc-internal-format msgid "incorrect rounding operand" msgstr "" -#: config/i386/i386-expand.cc:11594 +#: config/i386/i386-expand.cc:11611 #, fuzzy, gcc-internal-format msgid "the immediate argument must be a 4-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11602 +#: config/i386/i386-expand.cc:11619 #, fuzzy, gcc-internal-format msgid "the immediate argument must be a 5-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:11605 +#: config/i386/i386-expand.cc:11622 #, gcc-internal-format msgid "the immediate argument must be an 8-bit immediate" msgstr "" -#: config/i386/i386-expand.cc:12123 config/rs6000/rs6000-builtin.cc:2393 +#: config/i386/i386-expand.cc:12140 config/rs6000/rs6000-builtin.cc:2393 #, gcc-internal-format msgid "selector must be an integer constant in the range [0, %wi]" msgstr "" -#: config/i386/i386-expand.cc:12354 +#: config/i386/i386-expand.cc:12371 #, gcc-internal-format msgid "%qE needs unknown isa option" msgstr "" -#: config/i386/i386-expand.cc:12358 +#: config/i386/i386-expand.cc:12375 #, fuzzy, gcc-internal-format msgid "%qE needs isa option %s" msgstr "Нерэчаісны выбар %s" -#: config/i386/i386-expand.cc:13302 +#: config/i386/i386-expand.cc:13319 #, fuzzy, gcc-internal-format msgid "the last argument must be a 32-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:13335 +#: config/i386/i386-expand.cc:13352 #, fuzzy, gcc-internal-format msgid "last argument must be an immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/i386/i386-expand.cc:14099 config/i386/i386-expand.cc:14311 +#: config/i386/i386-expand.cc:14116 config/i386/i386-expand.cc:14328 #, gcc-internal-format msgid "the last argument must be scale 1, 2, 4, 8" msgstr "" -#: config/i386/i386-expand.cc:14364 +#: config/i386/i386-expand.cc:14381 #, gcc-internal-format msgid "the forth argument must be scale 1, 2, 4, 8" msgstr "" -#: config/i386/i386-expand.cc:14370 +#: config/i386/i386-expand.cc:14387 #, gcc-internal-format msgid "incorrect hint operand" msgstr "" -#: config/i386/i386-expand.cc:14389 +#: config/i386/i386-expand.cc:14406 #, fuzzy, gcc-internal-format msgid "the argument to % intrinsic must be an 8-bit immediate" msgstr "першым аргументам \"%s\" павінен быць \"int\"" @@ -39061,7 +39071,7 @@ msgstr "" msgid "virtual function multiversioning not supported" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: config/i386/i386-features.cc:2822 config/rs6000/rs6000.cc:24972 +#: config/i386/i386-features.cc:2822 config/rs6000/rs6000.cc:24983 #, fuzzy, gcc-internal-format msgid "multiversioning needs % which is not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" @@ -39458,351 +39468,351 @@ msgstr "" msgid "%<-mfunction-return%> and %<-fcf-protection%> are not compatible" msgstr "" -#: config/i386/i386-options.cc:3296 +#: config/i386/i386-options.cc:3290 #, gcc-internal-format msgid "%s instructions aren%'t allowed in an exception service routine" msgstr "" -#: config/i386/i386-options.cc:3298 +#: config/i386/i386-options.cc:3292 #, gcc-internal-format msgid "%s instructions aren%'t allowed in an interrupt service routine" msgstr "" -#: config/i386/i386-options.cc:3302 +#: config/i386/i386-options.cc:3296 #, gcc-internal-format msgid "%s instructions aren%'t allowed in a function with the % attribute" msgstr "" -#: config/i386/i386-options.cc:3349 config/i386/i386-options.cc:3400 +#: config/i386/i386-options.cc:3343 config/i386/i386-options.cc:3394 #, gcc-internal-format msgid "fastcall and regparm attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3354 +#: config/i386/i386-options.cc:3348 #, gcc-internal-format msgid "regparam and thiscall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3361 config/i386/i386-options.cc:3589 +#: config/i386/i386-options.cc:3355 config/i386/i386-options.cc:3583 #, gcc-internal-format msgid "%qE attribute requires an integer constant argument" msgstr "" -#: config/i386/i386-options.cc:3367 +#: config/i386/i386-options.cc:3361 #, fuzzy, gcc-internal-format msgid "argument to %qE attribute larger than %d" msgstr "памер \"%s\" больш чам %d байт" -#: config/i386/i386-options.cc:3392 config/i386/i386-options.cc:3435 +#: config/i386/i386-options.cc:3386 config/i386/i386-options.cc:3429 #, gcc-internal-format msgid "fastcall and cdecl attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3396 +#: config/i386/i386-options.cc:3390 #, gcc-internal-format msgid "fastcall and stdcall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3404 config/i386/i386-options.cc:3453 +#: config/i386/i386-options.cc:3398 config/i386/i386-options.cc:3447 #, gcc-internal-format msgid "fastcall and thiscall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3414 config/i386/i386-options.cc:3431 +#: config/i386/i386-options.cc:3408 config/i386/i386-options.cc:3425 #, gcc-internal-format msgid "stdcall and cdecl attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3418 +#: config/i386/i386-options.cc:3412 #, gcc-internal-format msgid "stdcall and fastcall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3422 config/i386/i386-options.cc:3449 +#: config/i386/i386-options.cc:3416 config/i386/i386-options.cc:3443 #, gcc-internal-format msgid "stdcall and thiscall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3439 config/i386/i386-options.cc:3457 +#: config/i386/i386-options.cc:3433 config/i386/i386-options.cc:3451 #, gcc-internal-format msgid "cdecl and thiscall attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3445 +#: config/i386/i386-options.cc:3439 #, gcc-internal-format msgid "%qE attribute is used for non-class method" msgstr "" -#: config/i386/i386-options.cc:3549 config/rs6000/rs6000.cc:20314 +#: config/i386/i386-options.cc:3543 config/rs6000/rs6000.cc:20325 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "%qE incompatible attribute ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: config/i386/i386-options.cc:3576 +#: config/i386/i386-options.cc:3570 #, fuzzy, gcc-internal-format msgid "%qE attribute only available for 32-bit" msgstr "\"%s\" атрыбут ігнарыруецца" -#: config/i386/i386-options.cc:3597 +#: config/i386/i386-options.cc:3591 #, fuzzy, gcc-internal-format msgid "argument to %qE attribute is neither zero, nor one" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/i386/i386-options.cc:3631 config/i386/i386-options.cc:3641 +#: config/i386/i386-options.cc:3625 config/i386/i386-options.cc:3635 #, gcc-internal-format msgid "%qs and %qs attributes are not compatible" msgstr "" -#: config/i386/i386-options.cc:3668 config/i386/i386-options.cc:3690 -#: config/ia64/ia64.cc:812 config/s390/s390.cc:1194 +#: config/i386/i386-options.cc:3662 config/i386/i386-options.cc:3684 +#: config/ia64/ia64.cc:812 config/s390/s390.cc:1188 #, fuzzy, gcc-internal-format msgid "%qE attribute requires a string constant argument" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/i386/i386-options.cc:3678 config/i386/i386-options.cc:3700 -#: config/s390/s390.cc:1223 +#: config/i386/i386-options.cc:3672 config/i386/i386-options.cc:3694 +#: config/s390/s390.cc:1217 #, fuzzy, gcc-internal-format msgid "argument to %qE attribute is not (keep|thunk|thunk-inline|thunk-extern)" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/i386/i386-options.cc:3732 +#: config/i386/i386-options.cc:3726 #, gcc-internal-format msgid "interrupt service routine should have a pointer as the first argument" msgstr "" -#: config/i386/i386-options.cc:3739 +#: config/i386/i386-options.cc:3733 #, gcc-internal-format msgid "interrupt service routine should have %qs as the second argument" msgstr "" -#: config/i386/i386-options.cc:3750 +#: config/i386/i386-options.cc:3744 #, gcc-internal-format msgid "interrupt service routine can only have a pointer argument and an optional integer argument" msgstr "" -#: config/i386/i386-options.cc:3753 +#: config/i386/i386-options.cc:3747 #, gcc-internal-format msgid "interrupt service routine must return %" msgstr "" -#: config/i386/i386.cc:1212 +#: config/i386/i386.cc:1221 #, gcc-internal-format msgid "calling %qD with attribute sseregparm without SSE/SSE2 enabled" msgstr "" -#: config/i386/i386.cc:1215 +#: config/i386/i386.cc:1224 #, gcc-internal-format msgid "calling %qT with attribute sseregparm without SSE/SSE2 enabled" msgstr "" -#: config/i386/i386.cc:1519 +#: config/i386/i386.cc:1528 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "X32 does not support % attribute" msgstr "%s не падтрымлівае %s" -#: config/i386/i386.cc:1553 +#: config/i386/i386.cc:1562 #, gcc-internal-format msgid "% attribute is not compatible with nested function" msgstr "" -#: config/i386/i386.cc:1904 +#: config/i386/i386.cc:1913 #, gcc-internal-format msgid "AVX512F vector argument without AVX512F enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1910 +#: config/i386/i386.cc:1919 #, gcc-internal-format msgid "AVX512F vector return without AVX512F enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1924 +#: config/i386/i386.cc:1933 #, gcc-internal-format msgid "AVX vector argument without AVX enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1930 +#: config/i386/i386.cc:1939 #, gcc-internal-format msgid "AVX vector return without AVX enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1946 +#: config/i386/i386.cc:1955 #, gcc-internal-format msgid "SSE vector argument without SSE enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1952 +#: config/i386/i386.cc:1961 #, gcc-internal-format msgid "SSE vector return without SSE enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1968 +#: config/i386/i386.cc:1977 #, gcc-internal-format msgid "MMX vector argument without MMX enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:1974 +#: config/i386/i386.cc:1983 #, gcc-internal-format msgid "MMX vector return without MMX enabled changes the ABI" msgstr "" -#: config/i386/i386.cc:2172 +#: config/i386/i386.cc:2181 #, gcc-internal-format msgid "the ABI of passing struct with a flexible array member has changed in GCC 4.4" msgstr "" -#: config/i386/i386.cc:2293 +#: config/i386/i386.cc:2302 #, gcc-internal-format msgid "the ABI of passing union with % has changed in GCC 4.4" msgstr "" -#: config/i386/i386.cc:2426 +#: config/i386/i386.cc:2435 #, gcc-internal-format msgid "the ABI of passing structure with % member has changed in GCC 4.4" msgstr "" -#: config/i386/i386.cc:2542 +#: config/i386/i386.cc:2551 msgid "the ABI of passing C structures with zero-width bit-fields has changed in GCC %{12.1%}" msgstr "" -#: config/i386/i386.cc:2637 +#: config/i386/i386.cc:2646 #, gcc-internal-format msgid "SSE register return with SSE disabled" msgstr "" -#: config/i386/i386.cc:2643 +#: config/i386/i386.cc:2652 #, gcc-internal-format msgid "SSE register argument with SSE disabled" msgstr "" -#: config/i386/i386.cc:2663 +#: config/i386/i386.cc:2672 #, gcc-internal-format msgid "x87 register return with x87 disabled" msgstr "" -#: config/i386/i386.cc:2986 config/i386/i386.cc:3227 config/i386/i386.cc:4042 +#: config/i386/i386.cc:2995 config/i386/i386.cc:3236 config/i386/i386.cc:4014 #, gcc-internal-format msgid "calling %qD with SSE calling convention without SSE/SSE2 enabled" msgstr "" -#: config/i386/i386.cc:2988 config/i386/i386.cc:3229 config/i386/i386.cc:4044 +#: config/i386/i386.cc:2997 config/i386/i386.cc:3238 config/i386/i386.cc:4016 #, gcc-internal-format msgid "this is a GCC bug that can be worked around by adding attribute used to function called" msgstr "" -#: config/i386/i386.cc:3630 +#: config/i386/i386.cc:3639 #, gcc-internal-format, gfc-internal-format msgid "the ABI for passing parameters with %d-byte alignment has changed in GCC 4.6" msgstr "" -#: config/i386/i386.cc:6532 +#: config/i386/i386.cc:6506 #, gcc-internal-format msgid "%<-mcall-ms2sysv-xlogues%> is not compatible with %s" msgstr "" -#: config/i386/i386.cc:8436 +#: config/i386/i386.cc:8410 #, gcc-internal-format msgid "% attribute is not compatible with %<-mfentry%> for 32-bit" msgstr "" -#: config/i386/i386.cc:8526 +#: config/i386/i386.cc:8500 #, gcc-internal-format msgid "Dynamic Realign Argument Pointer (DRAP) not supported in interrupt service routine. This may be worked around by avoiding functions with aggregate return." msgstr "" -#: config/i386/i386.cc:9458 +#: config/i386/i386.cc:9432 #, gcc-internal-format msgid "Stack realignment not supported with %<__builtin_eh_return%>" msgstr "" -#: config/i386/i386.cc:9463 +#: config/i386/i386.cc:9437 #, gcc-internal-format msgid "regparm nested function not supported with %<__builtin_eh_return%>" msgstr "" -#: config/i386/i386.cc:9849 +#: config/i386/i386.cc:9823 #, gcc-internal-format msgid "%<-fsplit-stack%> does not support fastcall with nested function" msgstr "" -#: config/i386/i386.cc:9869 +#: config/i386/i386.cc:9843 #, gcc-internal-format msgid "%<-fsplit-stack%> does not support 2 register parameters for a nested function" msgstr "" #. FIXME: We could make this work by pushing a register #. around the addition and comparison. -#: config/i386/i386.cc:9880 +#: config/i386/i386.cc:9854 #, gcc-internal-format msgid "%<-fsplit-stack%> does not support 3 register parameters" msgstr "" -#: config/i386/i386.cc:12913 +#: config/i386/i386.cc:12887 #, gcc-internal-format msgid "% modifier on non-integer register" msgstr "" -#: config/i386/i386.cc:12924 config/i386/i386.cc:12938 +#: config/i386/i386.cc:12898 config/i386/i386.cc:12912 #, gcc-internal-format msgid "unsupported size for integer register" msgstr "" -#: config/i386/i386.cc:12970 +#: config/i386/i386.cc:12944 #, gcc-internal-format msgid "extended registers have no high halves" msgstr "" -#: config/i386/i386.cc:12985 +#: config/i386/i386.cc:12959 #, gcc-internal-format msgid "unsupported operand size for extended register" msgstr "" -#: config/i386/i386.cc:13179 +#: config/i386/i386.cc:13153 #, gcc-internal-format msgid "non-integer operand used with operand code %" msgstr "" -#: config/i386/i386.cc:17210 +#: config/i386/i386.cc:17184 #, gcc-internal-format msgid "empty class %qT parameter passing ABI changes in %<-fabi-version=12%> (GCC 8)" msgstr "" -#: config/i386/i386.cc:21432 +#: config/i386/i386.cc:21408 msgid "the alignment of %<_Atomic %T%> fields changed in %{GCC 11.1%}" msgstr "" -#: config/i386/i386.cc:21528 +#: config/i386/i386.cc:21504 #, gcc-internal-format msgid "profiling %<-mcmodel=large%> with PIC is not supported" msgstr "" -#: config/i386/i386.cc:23276 +#: config/i386/i386.cc:23313 #, gcc-internal-format msgid "unknown architecture specific memory model" msgstr "" -#: config/i386/i386.cc:23283 +#: config/i386/i386.cc:23320 #, gcc-internal-format msgid "% not used with % or stronger memory model" msgstr "" -#: config/i386/i386.cc:23290 +#: config/i386/i386.cc:23327 #, gcc-internal-format msgid "% not used with % or stronger memory model" msgstr "" -#: config/i386/i386.cc:23336 +#: config/i386/i386.cc:23373 #, gcc-internal-format msgid "unsupported return type %qT for simd" msgstr "" -#: config/i386/i386.cc:23366 +#: config/i386/i386.cc:23403 #, gcc-internal-format msgid "unsupported argument type %qT for simd" msgstr "" -#: config/i386/i386.cc:23909 +#: config/i386/i386.cc:23946 #, gcc-internal-format msgid "%<-fexcess-precision=16%> is not compatible with %<-mfpmath=387%>" msgstr "" @@ -39960,12 +39970,12 @@ msgstr "" msgid "ABI with startfiles: %s" msgstr "" -#: config/loongarch/loongarch.cc:3458 +#: config/loongarch/loongarch.cc:3483 #, gcc-internal-format msgid "Normal symbol loading not implemented in extreme mode." msgstr "" -#: config/loongarch/loongarch.cc:5507 +#: config/loongarch/loongarch.cc:5531 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "code model %qs and %qs not support %s mode" @@ -40075,7 +40085,7 @@ msgstr "" msgid "stack limit expression is not supported" msgstr "" -#: config/m68k/m68k.cc:7119 config/s390/s390.cc:16596 +#: config/m68k/m68k.cc:7119 config/s390/s390.cc:16613 #, fuzzy, gcc-internal-format msgid "%<-fexcess-precision=16%> is not supported on this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" @@ -40132,7 +40142,7 @@ msgid "%qE redeclared with conflicting %qs attributes" msgstr "" #: config/mips/mips.cc:1513 config/mips/mips.cc:1567 -#: config/riscv/riscv.cc:3301 +#: config/riscv/riscv.cc:3315 #, gcc-internal-format msgid "%qE attribute requires a string argument" msgstr "" @@ -40152,137 +40162,141 @@ msgstr "" msgid "argument to %qE attribute is not intstack" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/mips/mips.cc:6089 +#: config/mips/mips.cc:6090 msgid "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC %{12.1%}" msgstr "" -#: config/mips/mips.cc:6490 +#: config/mips/mips.cc:6518 msgid "the ABI for returning a value containing zero-width bit-fields but otherwise an aggregate with only one or two floating-point fields was changed in GCC %{12.1%}" msgstr "" -#: config/mips/mips.cc:7831 +#: config/mips/mips.cc:6542 +msgid "the ABI for returning a value with C++17 empty bases but otherwise an aggregate with only one or two floating-point fields was changed in GCC %{12.1%}" +msgstr "" + +#: config/mips/mips.cc:7880 #, gcc-internal-format msgid "cannot handle inconsistent calls to %qs" msgstr "" -#: config/mips/mips.cc:11075 +#: config/mips/mips.cc:11124 #, gcc-internal-format msgid "the % attribute requires a MIPS32r2 processor or greater" msgstr "" -#: config/mips/mips.cc:11077 +#: config/mips/mips.cc:11126 #, gcc-internal-format msgid "interrupt handlers cannot be MIPS16 functions" msgstr "" -#: config/mips/mips.cc:12067 +#: config/mips/mips.cc:12116 #, gcc-internal-format msgid "%<-fstack-check=specific%> not implemented for MIPS16" msgstr "" -#: config/mips/mips.cc:17135 +#: config/mips/mips.cc:17184 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "argument of `__builtin_args_info' must be constant" msgid "argument %d to the built-in must be a constant in range %d to %d" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/mips/mips.cc:17255 +#: config/mips/mips.cc:17304 #, fuzzy, gcc-internal-format msgid "failed to expand built-in function" msgstr "Не генерыраваць сімвальныя інструкцыі" -#: config/mips/mips.cc:17386 +#: config/mips/mips.cc:17435 #, gcc-internal-format msgid "built-in function %qE not supported for MIPS16" msgstr "" -#: config/mips/mips.cc:17994 +#: config/mips/mips.cc:18043 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%qs does not support MIPS16 code" msgstr "%s не падтрымлівае %s" -#: config/mips/mips.cc:19801 +#: config/mips/mips.cc:19850 #, gcc-internal-format msgid "MIPS16 PIC for ABIs other than o32 and o64" msgstr "" -#: config/mips/mips.cc:19804 +#: config/mips/mips.cc:19853 #, gcc-internal-format msgid "MIPS16 %<-mxgot%> code" msgstr "" -#: config/mips/mips.cc:19807 +#: config/mips/mips.cc:19856 #, gcc-internal-format msgid "% MIPS16 code for ABIs other than o32 and o64" msgstr "" -#: config/mips/mips.cc:19810 +#: config/mips/mips.cc:19859 #, gcc-internal-format msgid "MSA MIPS16 code" msgstr "" -#: config/mips/mips.cc:19988 config/mips/mips.cc:19993 -#: config/mips/mips.cc:20082 config/mips/mips.cc:20084 -#: config/mips/mips.cc:20114 config/mips/mips.cc:20124 -#: config/mips/mips.cc:20230 config/mips/mips.cc:20260 +#: config/mips/mips.cc:20037 config/mips/mips.cc:20042 +#: config/mips/mips.cc:20131 config/mips/mips.cc:20133 +#: config/mips/mips.cc:20163 config/mips/mips.cc:20173 +#: config/mips/mips.cc:20279 config/mips/mips.cc:20309 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "unsupported version" msgid "unsupported combination: %s" msgstr "непадтрымліваемая версія" -#: config/mips/mips.cc:20027 +#: config/mips/mips.cc:20076 #, gcc-internal-format msgid "%<-%s%> conflicts with the other architecture options, which specify a %s processor" msgstr "" -#: config/mips/mips.cc:20037 +#: config/mips/mips.cc:20086 #, gcc-internal-format msgid "%<-march=%s%> is not compatible with the selected ABI" msgstr "" -#: config/mips/mips.cc:20052 +#: config/mips/mips.cc:20101 #, gcc-internal-format msgid "%<-mgp64%> used with a 32-bit processor" msgstr "" -#: config/mips/mips.cc:20054 +#: config/mips/mips.cc:20103 #, gcc-internal-format msgid "%<-mgp32%> used with a 64-bit ABI" msgstr "" -#: config/mips/mips.cc:20056 +#: config/mips/mips.cc:20105 #, gcc-internal-format msgid "%<-mgp64%> used with a 32-bit ABI" msgstr "" -#: config/mips/mips.cc:20079 +#: config/mips/mips.cc:20128 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "the %qs architecture does not support %<-mfp32%>" msgstr "%s не падтрымлівае %s" -#: config/mips/mips.cc:20088 +#: config/mips/mips.cc:20137 #, gcc-internal-format msgid "%<-mgp32%> and %<-mfp64%> can only be combined if the target supports the mfhc1 and mthc1 instructions" msgstr "" -#: config/mips/mips.cc:20091 +#: config/mips/mips.cc:20140 #, gcc-internal-format msgid "%<-mgp32%> and %<-mfp64%> can only be combined when using the o32 ABI" msgstr "" -#: config/mips/mips.cc:20112 +#: config/mips/mips.cc:20161 #, gcc-internal-format msgid "%<-mfpxx%> can only be used with the o32 ABI" msgstr "" -#: config/mips/mips.cc:20116 +#: config/mips/mips.cc:20165 #, gcc-internal-format msgid "%<-march=%s%> requires %<-mfp32%>" msgstr "" -#: config/mips/mips.cc:20118 +#: config/mips/mips.cc:20167 #, gcc-internal-format msgid "%<-mfpxx%> requires %<-mlra%>" msgstr "" @@ -40292,119 +40306,119 @@ msgstr "" #. effort to support the combination of 32-bit GOT entries #. and 64-bit pointers, so we treat the abicalls case as #. an error. -#: config/mips/mips.cc:20143 +#: config/mips/mips.cc:20192 #, gcc-internal-format msgid "the combination of %qs and %qs is incompatible with %qs" msgstr "" -#: config/mips/mips.cc:20196 +#: config/mips/mips.cc:20245 #, fuzzy, gcc-internal-format msgid "the %qs architecture does not support branch-likely instructions" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/mips/mips.cc:20211 +#: config/mips/mips.cc:20260 #, fuzzy, gcc-internal-format msgid "the %qs architecture does not support madd or msub instructions" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/mips/mips.cc:20225 +#: config/mips/mips.cc:20274 #, gcc-internal-format msgid "the %qs architecture does not support odd single-precision registers" msgstr "" -#: config/mips/mips.cc:20238 config/mips/mips.cc:20244 +#: config/mips/mips.cc:20287 config/mips/mips.cc:20293 #, gcc-internal-format msgid "unsupported combination: %qs%s %s" msgstr "" -#: config/mips/mips.cc:20253 +#: config/mips/mips.cc:20302 #, fuzzy, gcc-internal-format #| msgid "unsupported version" msgid "unsupported combination: %qs %s" msgstr "непадтрымліваемая версія" -#: config/mips/mips.cc:20268 +#: config/mips/mips.cc:20317 #, gcc-internal-format msgid "cannot generate position-independent code for %qs" msgstr "" -#: config/mips/mips.cc:20271 +#: config/mips/mips.cc:20320 #, gcc-internal-format msgid "position-independent code requires %qs" msgstr "" -#: config/mips/mips.cc:20304 +#: config/mips/mips.cc:20353 #, gcc-internal-format msgid "%<-mno-gpopt%> needs %<-mexplicit-relocs%>" msgstr "" -#: config/mips/mips.cc:20312 config/mips/mips.cc:20315 +#: config/mips/mips.cc:20361 config/mips/mips.cc:20364 #, gcc-internal-format msgid "cannot use small-data accesses for %qs" msgstr "" -#: config/mips/mips.cc:20330 +#: config/mips/mips.cc:20379 #, gcc-internal-format msgid "the %qs architecture does not support %<-m%s=legacy%>" msgstr "" -#: config/mips/mips.cc:20337 +#: config/mips/mips.cc:20386 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "the %qs architecture does not support %<-m%s=2008%>" msgstr "%s не падтрымлівае %s" -#: config/mips/mips.cc:20355 +#: config/mips/mips.cc:20404 #, gcc-internal-format msgid "%<-mips3d%> requires %<-mpaired-single%>" msgstr "" -#: config/mips/mips.cc:20365 +#: config/mips/mips.cc:20414 #, gcc-internal-format msgid "%qs must be used with %qs" msgstr "" -#: config/mips/mips.cc:20375 +#: config/mips/mips.cc:20424 #, gcc-internal-format msgid "%<-mmsa%> must be used with %<-mfp64%> and %<-mhard-float%>" msgstr "" -#: config/mips/mips.cc:20382 +#: config/mips/mips.cc:20431 #, fuzzy, gcc-internal-format msgid "the %qs architecture does not support paired-single instructions" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/mips/mips.cc:20391 +#: config/mips/mips.cc:20440 #, gcc-internal-format msgid "%qs requires a target that provides the %qs instruction" msgstr "" -#: config/mips/mips.cc:20402 +#: config/mips/mips.cc:20451 #, fuzzy, gcc-internal-format msgid "the %qs architecture does not support DSP instructions" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/mips/mips.cc:20412 +#: config/mips/mips.cc:20461 #, gcc-internal-format msgid "%<-mloongson-mmi%> must be used with %<-mhard-float%>" msgstr "" -#: config/mips/mips.cc:20422 +#: config/mips/mips.cc:20471 #, gcc-internal-format msgid "%<-mloongson-ext2%> must be used with %<-mloongson-ext%>" msgstr "" -#: config/mips/mips.cc:20528 +#: config/mips/mips.cc:20577 #, fuzzy, gcc-internal-format msgid "%qs requires branch-likely instructions" msgstr "Не генерыраваць сімвальныя інструкцыі" -#: config/mips/mips.cc:20532 +#: config/mips/mips.cc:20581 #, fuzzy, gcc-internal-format msgid "the %qs architecture does not support the synci instruction" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: config/mips/mips.cc:21368 +#: config/mips/mips.cc:21417 #, gcc-internal-format msgid "mips16 function profiling" msgstr "" @@ -41227,63 +41241,63 @@ msgstr "" msgid "pointers to %<__regio_symbol%> address space are prohibited" msgstr "" -#: config/riscv/riscv.cc:391 +#: config/riscv/riscv.cc:396 #, gcc-internal-format msgid "unknown cpu %qs for %<-mtune%>" msgstr "" -#: config/riscv/riscv.cc:2921 config/riscv/riscv.cc:2963 +#: config/riscv/riscv.cc:2935 config/riscv/riscv.cc:2977 #, gcc-internal-format msgid "ABI for flattened struct with zero-length bit-fields changed in GCC 10" msgstr "" -#: config/riscv/riscv.cc:3312 +#: config/riscv/riscv.cc:3326 #, gcc-internal-format msgid "argument to %qE attribute is not %<\"user\"%>, %<\"supervisor\"%>, or %<\"machine\"%>" msgstr "" -#: config/riscv/riscv.cc:4980 +#: config/riscv/riscv.cc:4998 #, gcc-internal-format msgid "%<-mdiv%> requires %<-march%> to subsume the % extension" msgstr "" -#: config/riscv/riscv.cc:5023 +#: config/riscv/riscv.cc:5041 #, gcc-internal-format msgid "requested ABI requires %<-march%> to subsume the %qc extension" msgstr "" -#: config/riscv/riscv.cc:5027 +#: config/riscv/riscv.cc:5045 #, gcc-internal-format msgid "rv32e requires ilp32e ABI" msgstr "" -#: config/riscv/riscv.cc:5031 +#: config/riscv/riscv.cc:5049 #, gcc-internal-format msgid "ABI requires %<-march=rv%d%>" msgstr "" -#: config/riscv/riscv.cc:5041 +#: config/riscv/riscv.cc:5059 #, gcc-internal-format msgid "%<-mpreferred-stack-boundary=%d%> must be between %d and %d" msgstr "" -#: config/riscv/riscv.cc:5054 +#: config/riscv/riscv.cc:5072 #, gcc-internal-format msgid "%<-mriscv-attribute%> RISC-V ELF attribute requires GNU as 2.32 [%<-mriscv-attribute%>]" msgstr "" -#: config/riscv/riscv.cc:5081 config/rs6000/rs6000.cc:4581 +#: config/riscv/riscv.cc:5099 config/rs6000/rs6000.cc:4573 #, fuzzy, gcc-internal-format #| msgid "invalid register name for `%s'" msgid "%qs is not a valid base register in %qs" msgstr "нерэчаісная назва рэгістра `%s'" -#: config/riscv/riscv.cc:5095 config/rs6000/rs6000.cc:4564 +#: config/riscv/riscv.cc:5113 config/rs6000/rs6000.cc:4556 #, gcc-internal-format msgid "%qs is not a valid number in %qs" msgstr "" -#: config/riscv/riscv.cc:5396 +#: config/riscv/riscv.cc:5414 #, gcc-internal-format msgid "%qs function cannot have different interrupt type" msgstr "" @@ -41675,168 +41689,168 @@ msgstr "" #: config/rs6000/rs6000.cc:3979 config/rs6000/rs6000.cc:3998 #: config/rs6000/rs6000.cc:4060 config/rs6000/rs6000.cc:4087 #: config/rs6000/rs6000.cc:4114 config/rs6000/rs6000.cc:4129 -#: config/rs6000/rs6000.cc:4137 config/rs6000/rs6000.cc:4269 -#: config/rs6000/rs6000.cc:4282 config/rs6000/rs6000.cc:4291 -#: config/rs6000/rs6000.cc:4429 config/rs6000/rs6000.cc:4446 -#: config/rs6000/rs6000.cc:4457 +#: config/rs6000/rs6000.cc:4137 config/rs6000/rs6000.cc:4261 +#: config/rs6000/rs6000.cc:4274 config/rs6000/rs6000.cc:4283 +#: config/rs6000/rs6000.cc:4421 config/rs6000/rs6000.cc:4438 +#: config/rs6000/rs6000.cc:4449 #, gcc-internal-format msgid "%qs requires %qs" msgstr "" -#: config/rs6000/rs6000.cc:4173 +#: config/rs6000/rs6000.cc:4165 #, gcc-internal-format msgid "target attribute or pragma changes % size" msgstr "" -#: config/rs6000/rs6000.cc:4194 +#: config/rs6000/rs6000.cc:4186 #, gcc-internal-format msgid "%qs requires full ISA 2.06 support" msgstr "" -#: config/rs6000/rs6000.cc:4207 +#: config/rs6000/rs6000.cc:4199 #, gcc-internal-format msgid "Using IEEE extended precision %" msgstr "" -#: config/rs6000/rs6000.cc:4210 +#: config/rs6000/rs6000.cc:4202 #, gcc-internal-format msgid "Using IBM extended precision %" msgstr "" -#: config/rs6000/rs6000.cc:4229 +#: config/rs6000/rs6000.cc:4221 #, fuzzy, gcc-internal-format #| msgid "%s does not support %s" msgid "%qs requires VSX support" msgstr "%s не падтрымлівае %s" -#: config/rs6000/rs6000.cc:4238 +#: config/rs6000/rs6000.cc:4230 #, gcc-internal-format msgid "The %<-mfloat128%> option may not be fully supported" msgstr "" -#: config/rs6000/rs6000.cc:4261 +#: config/rs6000/rs6000.cc:4253 #, gcc-internal-format msgid "%qs requires full ISA 3.0 support" msgstr "" -#: config/rs6000/rs6000.cc:4348 +#: config/rs6000/rs6000.cc:4340 #, gcc-internal-format msgid "unknown vectorization library ABI type in %<-mveclibabi=%s%>" msgstr "" -#: config/rs6000/rs6000.cc:4361 config/rs6000/rs6000.cc:4376 +#: config/rs6000/rs6000.cc:4353 config/rs6000/rs6000.cc:4368 #, gcc-internal-format msgid "target attribute or pragma changes AltiVec ABI" msgstr "" -#: config/rs6000/rs6000.cc:4389 +#: config/rs6000/rs6000.cc:4381 #, gcc-internal-format msgid "target attribute or pragma changes darwin64 ABI" msgstr "" -#: config/rs6000/rs6000.cc:4589 +#: config/rs6000/rs6000.cc:4581 #, gcc-internal-format msgid "%qs needs a valid base register" msgstr "" -#: config/rs6000/rs6000.cc:4886 +#: config/rs6000/rs6000.cc:4878 #, fuzzy, gcc-internal-format msgid "unknown option for %<%s=%s%>" msgstr "невядомая назва рэгістра: %s\n" -#: config/rs6000/rs6000.cc:4923 +#: config/rs6000/rs6000.cc:4915 #, gcc-internal-format msgid "%qs is deprecated and not recommended in any circumstances" msgstr "" -#: config/rs6000/rs6000.cc:10793 +#: config/rs6000/rs6000.cc:10785 #, gcc-internal-format msgid "%qs is an opaque type, and you cannot set it to other values" msgstr "" -#: config/rs6000/rs6000.cc:17583 +#: config/rs6000/rs6000.cc:17594 #, gcc-internal-format msgid "no profiling of 64-bit code for this ABI" msgstr "" -#: config/rs6000/rs6000.cc:19979 +#: config/rs6000/rs6000.cc:19990 #, gcc-internal-format msgid "you cannot take the address of a nested function if you use the %qs option" msgstr "" -#: config/rs6000/rs6000.cc:20061 +#: config/rs6000/rs6000.cc:20072 #, gcc-internal-format msgid "use of % in AltiVec types is invalid" msgstr "" -#: config/rs6000/rs6000.cc:20063 +#: config/rs6000/rs6000.cc:20074 #, gcc-internal-format msgid "use of boolean types in AltiVec types is invalid" msgstr "" -#: config/rs6000/rs6000.cc:20065 +#: config/rs6000/rs6000.cc:20076 #, gcc-internal-format msgid "use of % in AltiVec types is invalid" msgstr "" -#: config/rs6000/rs6000.cc:20067 +#: config/rs6000/rs6000.cc:20078 #, gcc-internal-format msgid "use of decimal floating-point types in AltiVec types is invalid" msgstr "" -#: config/rs6000/rs6000.cc:20073 +#: config/rs6000/rs6000.cc:20084 #, gcc-internal-format msgid "use of % in AltiVec types is invalid for 64-bit code without %qs" msgstr "" -#: config/rs6000/rs6000.cc:20076 +#: config/rs6000/rs6000.cc:20087 #, gcc-internal-format msgid "use of % in AltiVec types is deprecated; use %" msgstr "" -#: config/rs6000/rs6000.cc:20081 +#: config/rs6000/rs6000.cc:20092 #, gcc-internal-format msgid "use of % in AltiVec types is invalid without %qs" msgstr "" -#: config/rs6000/rs6000.cc:20084 +#: config/rs6000/rs6000.cc:20095 #, gcc-internal-format msgid "use of % in AltiVec types is invalid without %qs" msgstr "" -#: config/rs6000/rs6000.cc:24232 +#: config/rs6000/rs6000.cc:24243 #, fuzzy, gcc-internal-format #| msgid "invalid use of `%D'" msgid "invalid cpu %qs for %s%qs%s" msgstr "нерэчаіснае выкарыстаньне `%D'" -#: config/rs6000/rs6000.cc:24235 +#: config/rs6000/rs6000.cc:24246 #, fuzzy, gcc-internal-format #| msgid "%s=%s is too large" msgid "%s%qs%s is not allowed" msgstr "%s=%s вельмі вялікі" -#: config/rs6000/rs6000.cc:24237 +#: config/rs6000/rs6000.cc:24248 #, gcc-internal-format msgid "%s%qs%s is invalid" msgstr "" -#: config/rs6000/rs6000.cc:24781 +#: config/rs6000/rs6000.cc:24792 #, gcc-internal-format msgid "%<-mno-%s%> turns off %<-m%s%>" msgstr "" -#: config/rs6000/rs6000.cc:24940 +#: config/rs6000/rs6000.cc:24951 #, gcc-internal-format msgid "% attribute needs GLIBC (2.23 and newer) that exports hardware capability bits" msgstr "" -#: config/rs6000/rs6000.cc:25228 +#: config/rs6000/rs6000.cc:25239 #, gcc-internal-format msgid "Virtual function multiversioning not supported" msgstr "" -#: config/rs6000/rs6000.cc:28310 +#: config/rs6000/rs6000.cc:28335 #, gcc-internal-format msgid "the result for the xxspltidp instruction is undefined for subnormal input values" msgstr "" @@ -41881,7 +41895,7 @@ msgstr "" msgid "builtin %qs can only be used on vector types" msgstr "" -#: config/s390/s390-c.cc:717 config/s390/s390.cc:922 +#: config/s390/s390-c.cc:717 config/s390/s390.cc:916 #, gcc-internal-format msgid "constant value required for builtin %qF argument %d" msgstr "" @@ -41988,173 +42002,173 @@ msgstr "" msgid "Builtin %qF requires z15 or higher" msgstr "" -#: config/s390/s390.cc:859 -#, gcc-internal-format -msgid "Builtin %qF requires arch14 or higher." -msgstr "" - -#: config/s390/s390.cc:878 +#: config/s390/s390.cc:872 #, gcc-internal-format msgid "unresolved overloaded builtin" msgstr "" -#: config/s390/s390.cc:885 config/tilegx/tilegx.cc:3540 +#: config/s390/s390.cc:879 config/tilegx/tilegx.cc:3540 #: config/tilepro/tilepro.cc:3103 #, gcc-internal-format msgid "bad builtin icode" msgstr "" -#: config/s390/s390.cc:1019 +#: config/s390/s390.cc:1013 #, fuzzy, gcc-internal-format msgid "invalid argument %d for builtin %qF" msgstr "нявернае выкарыстанне \"restict\"" -#: config/s390/s390.cc:1120 +#: config/s390/s390.cc:1114 #, gcc-internal-format msgid "requested %qE attribute is not a comma separated pair of non-negative integer constants or too large (max. %d)" msgstr "" -#: config/s390/s390.cc:1210 +#: config/s390/s390.cc:1204 #, fuzzy, gcc-internal-format msgid "argument to %qE attribute is not (keep|thunk|thunk-extern)" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: config/s390/s390.cc:10100 +#: config/s390/s390.cc:10094 #, gcc-internal-format msgid "total size of local variables exceeds architecture limit" msgstr "" -#: config/s390/s390.cc:11465 +#: config/s390/s390.cc:11459 #, gcc-internal-format msgid "frame size of function %qs is %wd bytes exceeding user provided stack limit of %d bytes; an unconditional trap is added" msgstr "" -#: config/s390/s390.cc:11481 +#: config/s390/s390.cc:11475 #, gcc-internal-format msgid "frame size of function %qs is %wd bytes which is more than half the stack size; the dynamic check would not be reliable; no check emitted for this function" msgstr "" -#: config/s390/s390.cc:11509 +#: config/s390/s390.cc:11503 #, fuzzy, gcc-internal-format #| msgid "size of `%s' is %d bytes" msgid "frame size of %qs is %wd bytes" msgstr "памер \"%s\" - %d байт" -#: config/s390/s390.cc:11513 +#: config/s390/s390.cc:11507 #, gcc-internal-format msgid "%qs uses dynamic stack allocation" msgstr "" -#: config/s390/s390.cc:13216 +#: config/s390/s390.cc:12253 +#, gcc-internal-format +msgid "parameter passing for argument of type %qT with zero-width bit fields members changed in GCC 12" +msgstr "" + +#: config/s390/s390.cc:13212 #, gcc-internal-format msgid "nested functions cannot be profiled with %<-mfentry%> on s390" msgstr "" -#: config/s390/s390.cc:15486 +#: config/s390/s390.cc:15503 #, gcc-internal-format msgid "64-bit ABI not supported in ESA/390 mode" msgstr "" -#: config/s390/s390.cc:15493 +#: config/s390/s390.cc:15510 #, gcc-internal-format msgid "thunk-inline is only supported with %<-mindirect-branch-jump%>" msgstr "" -#: config/s390/s390.cc:15528 +#: config/s390/s390.cc:15545 #, gcc-internal-format, gfc-internal-format msgid "hardware vector support not available on %s" msgstr "" -#: config/s390/s390.cc:15531 +#: config/s390/s390.cc:15548 #, gcc-internal-format msgid "hardware vector support not available with %<-msoft-float%>" msgstr "" -#: config/s390/s390.cc:15560 +#: config/s390/s390.cc:15577 #, gcc-internal-format, gfc-internal-format msgid "hardware decimal floating-point instructions not available on %s" msgstr "" -#: config/s390/s390.cc:15564 +#: config/s390/s390.cc:15581 #, gcc-internal-format msgid "hardware decimal floating-point instructions not available in ESA/390 mode" msgstr "" -#: config/s390/s390.cc:15576 +#: config/s390/s390.cc:15593 #, gcc-internal-format msgid "%<-mhard-dfp%> cannot be used in conjunction with %<-msoft-float%>" msgstr "" -#: config/s390/s390.cc:15585 +#: config/s390/s390.cc:15602 #, gcc-internal-format msgid "%<-mbackchain%> %<-mpacked-stack%> %<-mhard-float%> are not supported in combination" msgstr "" -#: config/s390/s390.cc:15591 +#: config/s390/s390.cc:15608 #, gcc-internal-format msgid "stack size must be greater than the stack guard value" msgstr "" -#: config/s390/s390.cc:15593 +#: config/s390/s390.cc:15610 #, gcc-internal-format msgid "stack size must not be greater than 64k" msgstr "" -#: config/s390/s390.cc:15596 +#: config/s390/s390.cc:15613 #, gcc-internal-format msgid "%<-mstack-guard%> implies use of %<-mstack-size%>" msgstr "" -#: config/s390/s390.cc:15609 +#: config/s390/s390.cc:15626 #, gcc-internal-format msgid "%<-mtpf-trace-hook-prologue-check%> requires integer in range 0-4095" msgstr "" -#: config/s390/s390.cc:15612 +#: config/s390/s390.cc:15629 #, gcc-internal-format msgid "%<-mtpf-trace-hook-prologue-target%> requires integer in range 0-4095" msgstr "" -#: config/s390/s390.cc:15615 +#: config/s390/s390.cc:15632 #, gcc-internal-format msgid "%<-mtpf-trace-hook-epilogue-check%> requires integer in range 0-4095" msgstr "" -#: config/s390/s390.cc:15618 +#: config/s390/s390.cc:15635 #, gcc-internal-format msgid "%<-mtpf-trace-hook-epilogue-target%> requires integer in range 0-4095" msgstr "" -#: config/s390/s390.cc:15671 +#: config/s390/s390.cc:15688 #, gcc-internal-format msgid "%<-mfentry%> is supported only for 64-bit CPUs" msgstr "" #. argument is not a plain number -#: config/s390/s390.cc:15707 +#: config/s390/s390.cc:15724 #, fuzzy, gcc-internal-format #| msgid "first argument of `%s' should be `int'" msgid "arguments to %qs should be non-negative integers" msgstr "першым аргументам \"%s\" павінен быць \"int\"" -#: config/s390/s390.cc:15714 +#: config/s390/s390.cc:15731 #, fuzzy, gcc-internal-format msgid "argument to %qs is too large (max. %d)" msgstr "памер \"%s\" больш чам %d байт" -#: config/s390/s390.cc:15745 +#: config/s390/s390.cc:15762 #, gcc-internal-format msgid "%<-mno-pic-data-is-text-relative%> cannot be used without %<-fpic%>/%<-fPIC%>" msgstr "" -#: config/s390/s390.cc:15906 config/s390/s390.cc:15956 -#: config/s390/s390.cc:15973 +#: config/s390/s390.cc:15923 config/s390/s390.cc:15973 +#: config/s390/s390.cc:15990 #, gcc-internal-format msgid "attribute % argument %qs is unknown" msgstr "" #. Value is not allowed for the target attribute. -#: config/s390/s390.cc:15912 +#: config/s390/s390.cc:15929 #, fuzzy, gcc-internal-format msgid "value %qs is not supported by attribute %" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" @@ -42194,7 +42208,7 @@ msgstr "\"%s\" звычайна функцыя" msgid "%qE attribute argument should be between 0 to 255" msgstr "" -#: config/sh/sh.cc:10825 +#: config/sh/sh.cc:10831 #, gcc-internal-format msgid "r0 needs to be available as a call-clobbered register" msgstr "" @@ -42565,7 +42579,7 @@ msgid "attribute %qs applies to array types only" msgstr "\"%s\" атрыбут ігнарыруецца" #: c/c-convert.cc:104 c/c-typeck.cc:2258 c/c-typeck.cc:12924 cp/typeck.cc:2344 -#: cp/typeck.cc:8994 cp/typeck.cc:9796 d/d-convert.cc:262 +#: cp/typeck.cc:9000 cp/typeck.cc:9802 d/d-convert.cc:262 #, gcc-internal-format msgid "void value not ignored as it ought to be" msgstr "" @@ -42853,7 +42867,7 @@ msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэк msgid "declaration of %qD shadows a parameter" msgstr "" -#: c/c-decl.cc:3062 cp/name-lookup.cc:3335 +#: c/c-decl.cc:3062 cp/name-lookup.cc:3321 #, gcc-internal-format msgid "declaration of %qD shadows a global declaration" msgstr "" @@ -42863,7 +42877,7 @@ msgstr "" msgid "declaration of %qD shadows a previous local" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: c/c-decl.cc:3094 cp/name-lookup.cc:3103 +#: c/c-decl.cc:3094 cp/name-lookup.cc:3085 #, fuzzy, gcc-internal-format msgid "shadowed declaration is here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" @@ -42931,7 +42945,7 @@ msgstr "\"%s\" не абвешчан (першае выкарыстанне ў msgid "each undeclared identifier is reported only once for each function it appears in" msgstr "(Аб кожным неабвешчаным ідэнтыфікатары паведамляецца" -#: c/c-decl.cc:3852 cp/decl.cc:3345 +#: c/c-decl.cc:3852 cp/decl.cc:3362 #, gcc-internal-format msgid "label %qE referenced outside of any function" msgstr "" @@ -42963,7 +42977,7 @@ msgstr "" msgid "duplicate label declaration %qE" msgstr "паўторнае абвяшчэньне адмеціны `%s'" -#: c/c-decl.cc:4068 cp/decl.cc:3759 +#: c/c-decl.cc:4068 cp/decl.cc:3776 #, fuzzy, gcc-internal-format msgid "duplicate label %qD" msgstr "паўтарэнне \"%s\"" @@ -42993,7 +43007,7 @@ msgstr "" msgid "%qE defined as wrong kind of tag" msgstr "" -#: c/c-decl.cc:4444 cp/tree.cc:4889 +#: c/c-decl.cc:4444 cp/tree.cc:4923 #, gcc-internal-format msgid "%qE attribute applied to %qD with void return type" msgstr "" @@ -43188,7 +43202,7 @@ msgstr "" msgid "uninitialized % is invalid in C++" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: c/c-decl.cc:5684 cp/decl.cc:8561 +#: c/c-decl.cc:5684 cp/decl.cc:8612 #, gcc-internal-format msgid "%q+D in declare target directive does not have mappable type" msgstr "" @@ -43363,7 +43377,7 @@ msgstr "" msgid "storage class specified for unnamed parameter" msgstr "" -#: c/c-decl.cc:6536 cp/decl.cc:12577 +#: c/c-decl.cc:6536 cp/decl.cc:12630 #, gcc-internal-format msgid "storage class specified for typename" msgstr "" @@ -43540,7 +43554,7 @@ msgstr "" msgid "function definition has qualified void return type" msgstr "функцыя не вяртае тып string" -#: c/c-decl.cc:7109 cp/decl.cc:12877 +#: c/c-decl.cc:7109 cp/decl.cc:12935 #, gcc-internal-format msgid "type qualifiers ignored on function return type" msgstr "" @@ -43669,7 +43683,7 @@ msgstr "" msgid "a member of a structure or union cannot have a variably modified type" msgstr "" -#: c/c-decl.cc:7445 cp/decl.cc:11470 +#: c/c-decl.cc:7445 cp/decl.cc:11521 #, fuzzy, gcc-internal-format msgid "variable or field %qE declared void" msgstr "тып параметра \"%s\" не аб'яўлены" @@ -43853,7 +43867,7 @@ msgstr "перанакіраванне stdout: %s" msgid "defining type in %qs expression is invalid in C++" msgstr "" -#: c/c-decl.cc:8402 cp/decl.cc:5321 +#: c/c-decl.cc:8402 cp/decl.cc:5338 #, gcc-internal-format msgid "declaration does not declare anything" msgstr "" @@ -43905,7 +43919,7 @@ msgstr "" msgid "struct has no members" msgstr "" -#: c/c-decl.cc:8806 cp/decl.cc:13842 +#: c/c-decl.cc:8806 cp/decl.cc:13898 #, gcc-internal-format msgid "flexible array member in union" msgstr "" @@ -43948,7 +43962,7 @@ msgstr "перанакіраванне stdout: %s" msgid "redeclaration of %" msgstr "абвяшчэньне `%#D'" -#: c/c-decl.cc:9196 cp/decl.cc:16393 +#: c/c-decl.cc:9196 cp/decl.cc:16447 #, gcc-internal-format msgid "specified mode too small for enumerated values" msgstr "" @@ -43978,7 +43992,7 @@ msgstr "" msgid "ISO C restricts enumerator values to range of %" msgstr "" -#: c/c-decl.cc:9522 cp/decl.cc:5634 cp/decl.cc:16972 +#: c/c-decl.cc:9522 cp/decl.cc:5652 cp/decl.cc:17026 #, gcc-internal-format msgid "inline function %qD given attribute %qs" msgstr "" @@ -44010,7 +44024,7 @@ msgstr "няма папярэдняга прататыпа для \"%s\"" msgid "%qD was used with no prototype before its definition" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: c/c-decl.cc:9654 cp/decl.cc:17107 +#: c/c-decl.cc:9654 cp/decl.cc:17161 #, fuzzy, gcc-internal-format #| msgid "no previous declaration for `%s'" msgid "no previous declaration for %qD" @@ -44130,12 +44144,12 @@ msgstr "" msgid "argument %qD doesn%'t match prototype" msgstr "" -#: c/c-decl.cc:10307 cp/decl.cc:17933 +#: c/c-decl.cc:10307 cp/decl.cc:17987 #, gcc-internal-format msgid "no return statement in function returning non-void" msgstr "" -#: c/c-decl.cc:10326 cp/decl.cc:18017 +#: c/c-decl.cc:10326 cp/decl.cc:18071 #, fuzzy, gcc-internal-format #| msgid "label `%D' defined but not used" msgid "parameter %qD set but not used" @@ -44205,7 +44219,7 @@ msgstr "паўторнае абвяшчэньне адмеціны `%s'" msgid "two or more data types in declaration specifiers" msgstr "" -#: c/c-decl.cc:10892 cp/parser.cc:32698 +#: c/c-decl.cc:10892 cp/parser.cc:32717 #, fuzzy, gcc-internal-format #| msgid "`long long long' is too long for GCC" msgid "% is too long for GCC" @@ -44369,12 +44383,12 @@ msgstr "" msgid "ISO C does not support complex integer types" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" -#: c/c-decl.cc:12448 cp/semantics.cc:5982 +#: c/c-decl.cc:12448 cp/semantics.cc:5998 #, gcc-internal-format msgid "%<#pragma omp declare reduction%> combiner refers to variable %qD which is not % nor %" msgstr "" -#: c/c-decl.cc:12452 cp/semantics.cc:5986 +#: c/c-decl.cc:12452 cp/semantics.cc:6002 #, gcc-internal-format msgid "%<#pragma omp declare reduction%> initializer refers to variable %qD which is not % nor %" msgstr "" @@ -44429,7 +44443,7 @@ msgstr "" msgid "to match this %qs" msgstr "" -#: c/c-parser.cc:1324 cp/parser.cc:32932 +#: c/c-parser.cc:1324 cp/parser.cc:32951 #, gcc-internal-format msgid "expected end of line" msgstr "" @@ -44440,7 +44454,7 @@ msgstr "" msgid "ISO C forbids an empty translation unit" msgstr "ISO C не дазваляе пусты ізыходны файл" -#: c/c-parser.cc:1667 cp/semantics.cc:3328 +#: c/c-parser.cc:1667 cp/semantics.cc:3344 #, gcc-internal-format msgid "%<#pragma omp declare target%> without corresponding %<#pragma omp end declare target%>" msgstr "" @@ -44476,9 +44490,9 @@ msgstr "" msgid "unknown type name %qE" msgstr "невядомая назва рэгістра: %s" -#: c/c-parser.cc:2006 c/c-parser.cc:12610 c/c-parser.cc:19966 -#: c/c-parser.cc:20553 c/c-parser.cc:21075 cp/parser.cc:43742 -#: cp/parser.cc:48002 +#: c/c-parser.cc:2006 c/c-parser.cc:12611 c/c-parser.cc:19967 +#: c/c-parser.cc:20554 c/c-parser.cc:21076 cp/parser.cc:43762 +#: cp/parser.cc:48022 #, fuzzy, gcc-internal-format #| msgid "empty declaration" msgid "expected declaration specifiers" @@ -44500,7 +44514,7 @@ msgstr "" msgid "expected %<;%>, identifier or %<(%>" msgstr "" -#: c/c-parser.cc:2071 cp/parser.cc:35162 cp/parser.cc:35234 +#: c/c-parser.cc:2071 cp/parser.cc:35182 cp/parser.cc:35254 #, fuzzy, gcc-internal-format msgid "prefix attributes are ignored for methods" msgstr "\"%s\" атрыбут ігнарыруецца" @@ -44584,7 +44598,7 @@ msgstr "ISO C89 не падтрымлівае комлексныя тыпы" msgid "ISO C90 does not support %<_Static_assert%>" msgstr "ISO C89 не падтрымлівае комлексныя тыпы" -#: c/c-parser.cc:2650 c/c-parser.cc:7351 c/c-parser.cc:12671 +#: c/c-parser.cc:2650 c/c-parser.cc:7351 c/c-parser.cc:12672 #, gcc-internal-format msgid "expected string literal" msgstr "" @@ -44615,7 +44629,7 @@ msgstr "" msgid "static assertion failed: %E" msgstr "" -#: c/c-parser.cc:2688 cp/semantics.cc:11168 +#: c/c-parser.cc:2688 cp/semantics.cc:11184 #, gcc-internal-format msgid "static assertion failed" msgstr "" @@ -44661,17 +44675,17 @@ msgstr "параметр \"%s\" ініцыялізаваны" #: c/c-parser.cc:11138 c/c-parser.cc:11167 c/c-parser.cc:11180 #: c/c-parser.cc:11486 c/c-parser.cc:11610 c/c-parser.cc:12194 #: c/c-parser.cc:12247 c/c-parser.cc:12263 c/c-parser.cc:12309 -#: c/c-parser.cc:13118 c/c-parser.cc:13161 c/c-parser.cc:15797 -#: c/c-parser.cc:15909 c/c-parser.cc:16560 c/c-parser.cc:18942 -#: c/c-parser.cc:21603 c/c-parser.cc:21794 c/gimple-parser.cc:1793 -#: c/gimple-parser.cc:1839 cp/parser.cc:9164 cp/parser.cc:32935 -#: cp/parser.cc:36139 cp/parser.cc:38933 cp/parser.cc:39102 cp/parser.cc:45293 -#: cp/parser.cc:47297 +#: c/c-parser.cc:13119 c/c-parser.cc:13162 c/c-parser.cc:15798 +#: c/c-parser.cc:15910 c/c-parser.cc:16561 c/c-parser.cc:18943 +#: c/c-parser.cc:21604 c/c-parser.cc:21795 c/gimple-parser.cc:1793 +#: c/gimple-parser.cc:1839 cp/parser.cc:9164 cp/parser.cc:32954 +#: cp/parser.cc:36159 cp/parser.cc:38953 cp/parser.cc:39122 cp/parser.cc:45313 +#: cp/parser.cc:47317 #, gcc-internal-format msgid "expected identifier" msgstr "" -#: c/c-parser.cc:3243 cp/parser.cc:21093 +#: c/c-parser.cc:3243 cp/parser.cc:21104 #, gcc-internal-format msgid "comma at end of enumerator list" msgstr "" @@ -44758,7 +44772,7 @@ msgstr "" msgid "parentheses must be omitted if attribute argument list is empty" msgstr "" -#: c/c-parser.cc:4942 cp/parser.cc:29034 +#: c/c-parser.cc:4942 cp/parser.cc:29046 #, gcc-internal-format msgid "%qE attribute does not take any arguments" msgstr "" @@ -44912,8 +44926,8 @@ msgstr "" msgid "duplicate % qualifier %qE" msgstr "паўтарэнне \"volatile\"" -#: c/c-parser.cc:7051 c/c-parser.cc:7062 c/c-parser.cc:7073 cp/parser.cc:21965 -#: cp/parser.cc:21982 cp/parser.cc:21996 +#: c/c-parser.cc:7051 c/c-parser.cc:7062 c/c-parser.cc:7073 cp/parser.cc:21976 +#: cp/parser.cc:21993 cp/parser.cc:22007 #, gcc-internal-format msgid "first seen here" msgstr "" @@ -45080,8 +45094,8 @@ msgid "ISO C90 does not support %<__func__%> predefined identifier" msgstr "ISO C не падтрымлівае комлексныя цэлалікавыя тыпы" #: c/c-parser.cc:9082 c/c-parser.cc:10206 c/c-parser.cc:10228 -#: c/c-parser.cc:18358 c/gimple-parser.cc:1711 c/gimple-parser.cc:2345 -#: cp/parser.cc:40858 +#: c/c-parser.cc:18359 c/gimple-parser.cc:1711 c/gimple-parser.cc:2345 +#: cp/parser.cc:40878 #, gcc-internal-format msgid "expected expression" msgstr "" @@ -45345,12 +45359,12 @@ msgstr "" msgid "no type or storage class may be specified here," msgstr "" -#: c/c-parser.cc:12048 cp/parser.cc:35996 +#: c/c-parser.cc:12048 cp/parser.cc:36016 #, gcc-internal-format msgid "empty property attribute list" msgstr "" -#: c/c-parser.cc:12062 cp/parser.cc:36009 +#: c/c-parser.cc:12062 cp/parser.cc:36029 #, fuzzy, gcc-internal-format msgid "missing property attribute" msgstr "прапушчан ініцыялізатар" @@ -45360,1046 +45374,1046 @@ msgstr "прапушчан ініцыялізатар" msgid "unknown property attribute %<%s%s%>" msgstr "" -#: c/c-parser.cc:12104 cp/parser.cc:36046 +#: c/c-parser.cc:12104 cp/parser.cc:36066 #, gcc-internal-format msgid "unknown property attribute" msgstr "" -#: c/c-parser.cc:12113 cp/parser.cc:36055 +#: c/c-parser.cc:12113 cp/parser.cc:36075 #, gcc-internal-format msgid "expected %<=%> after Objective-C %qE" msgstr "" -#: c/c-parser.cc:12124 cp/parser.cc:36069 +#: c/c-parser.cc:12124 cp/parser.cc:36089 #, gcc-internal-format msgid "expected %qE selector name" msgstr "" -#: c/c-parser.cc:12140 cp/parser.cc:36088 +#: c/c-parser.cc:12140 cp/parser.cc:36108 #, gcc-internal-format msgid "setter method names must terminate with %<:%>" msgstr "" -#: c/c-parser.cc:12354 cp/parser.cc:47628 +#: c/c-parser.cc:12354 cp/parser.cc:47648 #, gcc-internal-format msgid "%<#pragma GCC unroll%> requires an assignment-expression that evaluates to a non-negative integral constant less than %u" msgstr "" -#: c/c-parser.cc:12398 c/c-parser.cc:20550 c/c-parser.cc:20847 -#: c/c-parser.cc:20906 c/c-parser.cc:20992 cp/parser.cc:43739 -#: cp/parser.cc:44075 cp/parser.cc:44166 cp/parser.cc:44240 cp/parser.cc:47675 -#: cp/parser.cc:47691 cp/parser.cc:47707 cp/parser.cc:47724 cp/parser.cc:47741 -#: cp/parser.cc:47758 cp/parser.cc:47785 cp/parser.cc:47799 cp/parser.cc:47824 -#: cp/parser.cc:47838 +#: c/c-parser.cc:12399 c/c-parser.cc:20551 c/c-parser.cc:20848 +#: c/c-parser.cc:20907 c/c-parser.cc:20993 cp/parser.cc:43759 +#: cp/parser.cc:44095 cp/parser.cc:44186 cp/parser.cc:44260 cp/parser.cc:47695 +#: cp/parser.cc:47711 cp/parser.cc:47727 cp/parser.cc:47744 cp/parser.cc:47761 +#: cp/parser.cc:47778 cp/parser.cc:47805 cp/parser.cc:47819 cp/parser.cc:47844 +#: cp/parser.cc:47858 #, gcc-internal-format msgid "%<#pragma %s%> may only be used in compound statements" msgstr "" -#: c/c-parser.cc:12421 cp/parser.cc:47813 +#: c/c-parser.cc:12422 cp/parser.cc:47833 #, gcc-internal-format msgid "%<#pragma acc routine%> must be at file scope" msgstr "" -#: c/c-parser.cc:12507 cp/parser.cc:47921 +#: c/c-parser.cc:12508 cp/parser.cc:47941 #, gcc-internal-format msgid "%<#pragma omp scan%> may only be used in a loop construct with % % clause" msgstr "" -#: c/c-parser.cc:12514 cp/parser.cc:47927 +#: c/c-parser.cc:12515 cp/parser.cc:47947 #, gcc-internal-format msgid "%<#pragma omp section%> may only be used in %<#pragma omp sections%> construct" msgstr "" -#: c/c-parser.cc:12526 +#: c/c-parser.cc:12527 #, gcc-internal-format msgid "%<#pragma omp requires%> may only be used at file scope" msgstr "" -#: c/c-parser.cc:12555 c/c-parser.cc:12579 cp/parser.cc:47956 -#: cp/parser.cc:47989 +#: c/c-parser.cc:12556 c/c-parser.cc:12580 cp/parser.cc:47976 +#: cp/parser.cc:48009 #, gcc-internal-format msgid "for, while or do statement expected" msgstr "" -#: c/c-parser.cc:12592 cp/parser.cc:47665 +#: c/c-parser.cc:12593 cp/parser.cc:47685 #, gcc-internal-format msgid "%<#pragma GCC pch_preprocess%> must be first" msgstr "" -#: c/c-parser.cc:12939 c/c-parser.cc:16405 c/c-parser.cc:18118 -#: c/c-parser.cc:18176 c/c-parser.cc:18183 c/c-parser.cc:18190 -#: c/c-parser.cc:22622 c/c-parser.cc:22630 c/c-parser.cc:22904 -#: c/c-parser.cc:22914 cp/parser.cc:36511 cp/parser.cc:39607 -#: cp/parser.cc:40632 cp/parser.cc:40695 cp/parser.cc:40702 cp/parser.cc:40709 -#: cp/parser.cc:46556 cp/parser.cc:46564 cp/parser.cc:46721 cp/parser.cc:46731 +#: c/c-parser.cc:12940 c/c-parser.cc:16406 c/c-parser.cc:18119 +#: c/c-parser.cc:18177 c/c-parser.cc:18184 c/c-parser.cc:18191 +#: c/c-parser.cc:22623 c/c-parser.cc:22631 c/c-parser.cc:22905 +#: c/c-parser.cc:22915 cp/parser.cc:36531 cp/parser.cc:39627 +#: cp/parser.cc:40652 cp/parser.cc:40715 cp/parser.cc:40722 cp/parser.cc:40729 +#: cp/parser.cc:46576 cp/parser.cc:46584 cp/parser.cc:46741 cp/parser.cc:46751 #, fuzzy, gcc-internal-format #| msgid "too many input files" msgid "too many %qs clauses" msgstr "вельмі шмат уваходзячых файлаў" -#: c/c-parser.cc:12966 +#: c/c-parser.cc:12967 #, gcc-internal-format msgid "expression must be integral" msgstr "" -#: c/c-parser.cc:13265 c/c-parser.cc:13277 +#: c/c-parser.cc:13266 c/c-parser.cc:13278 #, gcc-internal-format msgid "expected %<)%> or %<,%>" msgstr "" -#: c/c-parser.cc:13428 c/c-parser.cc:23107 +#: c/c-parser.cc:13429 c/c-parser.cc:23108 #, fuzzy, gcc-internal-format msgid "%qD is not a variable" msgstr "\"%s\" мае незавершаны тып" -#: c/c-parser.cc:13432 cp/semantics.cc:8175 +#: c/c-parser.cc:13433 cp/semantics.cc:8191 #, fuzzy, gcc-internal-format msgid "%qD is not a pointer variable" msgstr "\"%s\" звычайна функцыя" -#: c/c-parser.cc:13474 cp/parser.cc:37243 +#: c/c-parser.cc:13475 cp/parser.cc:37263 #, gcc-internal-format msgid "collapse argument needs positive constant integer expression" msgstr "" -#: c/c-parser.cc:13569 cp/parser.cc:37321 +#: c/c-parser.cc:13570 cp/parser.cc:37341 #, gcc-internal-format msgid "expected % or %" msgstr "" -#: c/c-parser.cc:13571 cp/parser.cc:37323 +#: c/c-parser.cc:13572 cp/parser.cc:37343 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:13692 cp/parser.cc:37435 +#: c/c-parser.cc:13693 cp/parser.cc:37455 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:13712 c/c-parser.cc:20899 c/c-parser.cc:20985 -#: cp/parser.cc:37453 cp/parser.cc:44067 cp/parser.cc:44158 +#: c/c-parser.cc:13713 c/c-parser.cc:20900 c/c-parser.cc:20986 +#: cp/parser.cc:37473 cp/parser.cc:44087 cp/parser.cc:44178 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:13765 cp/parser.cc:37508 +#: c/c-parser.cc:13766 cp/parser.cc:37528 #, gcc-internal-format msgid "too many % clauses with %qs modifier" msgstr "" -#: c/c-parser.cc:13772 cp/parser.cc:37515 +#: c/c-parser.cc:13773 cp/parser.cc:37535 #, fuzzy, gcc-internal-format #| msgid "too many input files" msgid "too many % clauses" msgstr "вельмі шмат уваходзячых файлаў" -#: c/c-parser.cc:13774 cp/parser.cc:37517 +#: c/c-parser.cc:13775 cp/parser.cc:37537 #, gcc-internal-format msgid "too many % clauses without modifier" msgstr "" -#: c/c-parser.cc:13780 cp/parser.cc:37523 +#: c/c-parser.cc:13781 cp/parser.cc:37543 #, gcc-internal-format msgid "if any % clause has modifier, then all % clauses have to use modifier" msgstr "" -#: c/c-parser.cc:13885 c/c-parser.cc:13945 c/c-parser.cc:14006 -#: c/c-parser.cc:14053 c/c-parser.cc:14132 c/c-parser.cc:14511 -#: c/c-parser.cc:14593 c/c-parser.cc:15160 c/c-parser.cc:15305 -#: c/c-parser.cc:15370 c/c-parser.cc:16342 +#: c/c-parser.cc:13886 c/c-parser.cc:13946 c/c-parser.cc:14007 +#: c/c-parser.cc:14054 c/c-parser.cc:14133 c/c-parser.cc:14512 +#: c/c-parser.cc:14594 c/c-parser.cc:15161 c/c-parser.cc:15306 +#: c/c-parser.cc:15371 c/c-parser.cc:16343 #, gcc-internal-format msgid "expected integer expression" msgstr "" -#: c/c-parser.cc:13896 +#: c/c-parser.cc:13897 #, gcc-internal-format msgid "% value must be positive" msgstr "" -#: c/c-parser.cc:13956 +#: c/c-parser.cc:13957 #, gcc-internal-format msgid "% value must be positive" msgstr "" -#: c/c-parser.cc:14017 cp/semantics.cc:8395 +#: c/c-parser.cc:14018 cp/semantics.cc:8411 #, gcc-internal-format msgid "% value must be positive" msgstr "" -#: c/c-parser.cc:14065 cp/semantics.cc:8425 +#: c/c-parser.cc:14066 cp/semantics.cc:8441 #, gcc-internal-format msgid "% value must be non-negative" msgstr "" -#: c/c-parser.cc:14099 cp/parser.cc:37749 +#: c/c-parser.cc:14100 cp/parser.cc:37769 #, gcc-internal-format msgid "expected constant integer expression with valid sync-hint value" msgstr "" -#: c/c-parser.cc:14171 cp/parser.cc:37819 +#: c/c-parser.cc:14172 cp/parser.cc:37839 #, gcc-internal-format msgid "expected %, %, %, %, %, % or %" msgstr "" -#: c/c-parser.cc:14232 cp/parser.cc:37884 +#: c/c-parser.cc:14233 cp/parser.cc:37904 #, gcc-internal-format msgid "expected %, % or %" msgstr "" -#: c/c-parser.cc:14298 cp/parser.cc:37953 +#: c/c-parser.cc:14299 cp/parser.cc:37973 #, gcc-internal-format msgid "too many % clauses with %qs category" msgstr "" -#: c/c-parser.cc:14301 cp/parser.cc:37956 +#: c/c-parser.cc:14302 cp/parser.cc:37976 #, gcc-internal-format msgid "too many % clauses with unspecified category" msgstr "" -#: c/c-parser.cc:14385 cp/semantics.cc:7256 cp/semantics.cc:7309 +#: c/c-parser.cc:14386 cp/semantics.cc:7272 cp/semantics.cc:7325 #, gcc-internal-format msgid "%qs expression must be integral" msgstr "" -#: c/c-parser.cc:14397 c/c-parser.cc:14520 cp/semantics.cc:7288 -#: cp/semantics.cc:7323 +#: c/c-parser.cc:14398 c/c-parser.cc:14521 cp/semantics.cc:7304 +#: cp/semantics.cc:7339 #, gcc-internal-format msgid "%qs value must be positive" msgstr "" -#: c/c-parser.cc:14459 cp/parser.cc:37015 +#: c/c-parser.cc:14460 cp/parser.cc:37035 #, fuzzy, gcc-internal-format #| msgid "too many arguments to function" msgid "too many % arguments" msgstr "вельмі шмат аргументаў у функцыі" -#: c/c-parser.cc:14493 cp/parser.cc:37048 +#: c/c-parser.cc:14494 cp/parser.cc:37068 #, fuzzy, gcc-internal-format #| msgid "no arguments" msgid "unexpected argument" msgstr "няма аргументаў" -#: c/c-parser.cc:14660 cp/semantics.cc:8605 +#: c/c-parser.cc:14661 cp/semantics.cc:8621 #, gcc-internal-format msgid "% argument needs positive integral constant" msgstr "" -#: c/c-parser.cc:14735 cp/parser.cc:38006 +#: c/c-parser.cc:14736 cp/parser.cc:38026 #, gcc-internal-format msgid "expected % or %" msgstr "" -#: c/c-parser.cc:14744 c/c-parser.cc:14750 cp/parser.cc:38015 -#: cp/parser.cc:38025 +#: c/c-parser.cc:14745 c/c-parser.cc:14751 cp/parser.cc:38035 +#: cp/parser.cc:38045 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:14786 cp/parser.cc:38065 +#: c/c-parser.cc:14787 cp/parser.cc:38085 #, gcc-internal-format msgid "expected %, % or %" msgstr "" -#: c/c-parser.cc:14839 cp/parser.cc:38133 +#: c/c-parser.cc:14840 cp/parser.cc:38153 #, gcc-internal-format msgid "ordered argument needs positive constant integer expression" msgstr "" -#: c/c-parser.cc:14964 c/c-parser.cc:22176 cp/parser.cc:46195 +#: c/c-parser.cc:14965 c/c-parser.cc:22177 cp/parser.cc:46215 #, gcc-internal-format msgid "expected %<+%>, %<*%>, %<-%>, %<&%>, %<^%>, %<|%>, %<&&%>, %<||%> or identifier" msgstr "" -#: c/c-parser.cc:15084 cp/parser.cc:38391 +#: c/c-parser.cc:15085 cp/parser.cc:38411 #, gcc-internal-format msgid "both % and % modifiers specified" msgstr "" -#: c/c-parser.cc:15138 cp/parser.cc:38407 +#: c/c-parser.cc:15139 cp/parser.cc:38427 #, gcc-internal-format msgid "schedule % does not take a % parameter" msgstr "" -#: c/c-parser.cc:15142 cp/parser.cc:38410 +#: c/c-parser.cc:15143 cp/parser.cc:38430 #, gcc-internal-format msgid "schedule % does not take a % parameter" msgstr "" -#: c/c-parser.cc:15154 cp/semantics.cc:7370 +#: c/c-parser.cc:15155 cp/semantics.cc:7386 #, gcc-internal-format msgid "chunk size value must be positive" msgstr "" -#: c/c-parser.cc:15177 cp/parser.cc:38430 +#: c/c-parser.cc:15178 cp/parser.cc:38450 #, fuzzy, gcc-internal-format #| msgid "invalid %%-code" msgid "invalid schedule kind" msgstr "нерэчаісны %%-код" -#: c/c-parser.cc:15315 c/c-parser.cc:15325 +#: c/c-parser.cc:15316 c/c-parser.cc:15326 #, gcc-internal-format msgid "% value must be positive" msgstr "" -#: c/c-parser.cc:15332 cp/semantics.cc:7337 +#: c/c-parser.cc:15333 cp/semantics.cc:7353 #, gcc-internal-format msgid "% lower bound %qE bigger than upper bound %qE" msgstr "" -#: c/c-parser.cc:15380 cp/semantics.cc:7466 +#: c/c-parser.cc:15381 cp/semantics.cc:7482 #, gcc-internal-format msgid "% value must be positive" msgstr "" -#: c/c-parser.cc:15425 cp/semantics.cc:7594 +#: c/c-parser.cc:15426 cp/semantics.cc:7610 #, gcc-internal-format msgid "% clause alignment expression must be positive constant integer expression" msgstr "" -#: c/c-parser.cc:15535 +#: c/c-parser.cc:15536 #, gcc-internal-format msgid "expected % or %" msgstr "" -#: c/c-parser.cc:15542 +#: c/c-parser.cc:15543 #, fuzzy, gcc-internal-format #| msgid "duplicate `%s'" msgid "duplicate %qs modifier" msgstr "паўтарэньне `%s'" -#: c/c-parser.cc:15590 cp/semantics.cc:7729 +#: c/c-parser.cc:15591 cp/semantics.cc:7745 #, gcc-internal-format msgid "% clause allocator expression has type %qT rather than %" msgstr "" -#: c/c-parser.cc:15601 cp/semantics.cc:7684 cp/semantics.cc:7700 +#: c/c-parser.cc:15602 cp/semantics.cc:7700 cp/semantics.cc:7716 #, gcc-internal-format msgid "% clause % modifier argument needs to be positive constant power of two integer expression" msgstr "" -#: c/c-parser.cc:15677 +#: c/c-parser.cc:15678 #, gcc-internal-format msgid "% clause step expression must be integral" msgstr "" -#: c/c-parser.cc:15727 +#: c/c-parser.cc:15728 #, gcc-internal-format msgid "% clause expression must be positive constant integer expression" msgstr "" -#: c/c-parser.cc:15766 +#: c/c-parser.cc:15767 #, gcc-internal-format msgid "% clause expression must be positive constant integer expression" msgstr "" -#: c/c-parser.cc:16097 cp/parser.cc:39292 +#: c/c-parser.cc:16098 cp/parser.cc:39312 #, gcc-internal-format msgid "% modifier incompatible with %qs" msgstr "" -#: c/c-parser.cc:16144 cp/parser.cc:39346 cp/parser.cc:39668 -#: cp/parser.cc:39718 +#: c/c-parser.cc:16145 cp/parser.cc:39366 cp/parser.cc:39688 +#: cp/parser.cc:39738 #, fuzzy, gcc-internal-format #| msgid "invalid %%d operand" msgid "invalid depend kind" msgstr "нерэчаісны %%d аперанд" -#: c/c-parser.cc:16214 cp/parser.cc:39416 +#: c/c-parser.cc:16215 cp/parser.cc:39436 #, gcc-internal-format msgid "too many % modifiers" msgstr "" -#: c/c-parser.cc:16224 cp/parser.cc:39429 +#: c/c-parser.cc:16225 cp/parser.cc:39449 #, gcc-internal-format msgid "too many % modifiers" msgstr "" -#: c/c-parser.cc:16232 cp/parser.cc:39440 +#: c/c-parser.cc:16233 cp/parser.cc:39460 #, gcc-internal-format msgid "%<#pragma omp target%> with modifier other than % or % on % clause" msgstr "" -#: c/c-parser.cc:16260 cp/parser.cc:39471 +#: c/c-parser.cc:16261 cp/parser.cc:39491 #, fuzzy, gcc-internal-format #| msgid "invalid mask" msgid "invalid map kind" msgstr "нерэчаісная маска" -#: c/c-parser.cc:16312 cp/parser.cc:39530 +#: c/c-parser.cc:16313 cp/parser.cc:39550 #, gcc-internal-format msgid "% device modifier not preceded by % directive with % clause" msgstr "" -#: c/c-parser.cc:16324 cp/parser.cc:39541 +#: c/c-parser.cc:16325 cp/parser.cc:39561 #, gcc-internal-format msgid "expected % or %" msgstr "" -#: c/c-parser.cc:16347 cp/semantics.cc:7491 +#: c/c-parser.cc:16348 cp/semantics.cc:7507 #, gcc-internal-format msgid "the % clause expression must evaluate to %<1%>" msgstr "" -#: c/c-parser.cc:16380 cp/parser.cc:39612 +#: c/c-parser.cc:16381 cp/parser.cc:39632 #, gcc-internal-format msgid "invalid dist_schedule kind" msgstr "" -#: c/c-parser.cc:16459 +#: c/c-parser.cc:16460 #, fuzzy, gcc-internal-format msgid "invalid proc_bind kind" msgstr "Нерэчаісны выбар %s" -#: c/c-parser.cc:16503 +#: c/c-parser.cc:16504 #, gcc-internal-format msgid "expected %, % or %" msgstr "" -#: c/c-parser.cc:16580 cp/semantics.cc:7891 +#: c/c-parser.cc:16581 cp/semantics.cc:7907 #, gcc-internal-format msgid "% clause event handle has type %qT rather than %" msgstr "" -#: c/c-parser.cc:16782 cp/parser.cc:39957 +#: c/c-parser.cc:16783 cp/parser.cc:39977 #, gcc-internal-format msgid "expected %<#pragma acc%> clause" msgstr "" -#: c/c-parser.cc:16793 c/c-parser.cc:17137 cp/parser.cc:39968 -#: cp/parser.cc:40360 +#: c/c-parser.cc:16794 c/c-parser.cc:17138 cp/parser.cc:39988 +#: cp/parser.cc:40380 #, fuzzy, gcc-internal-format #| msgid "complex invalid for `%s'" msgid "%qs is not valid for %qs" msgstr "complex нерэчаісны для \"%s\"" -#: c/c-parser.cc:16837 cp/parser.cc:40020 +#: c/c-parser.cc:16838 cp/parser.cc:40040 #, gcc-internal-format msgid "clauses in % trait should be separated by %<,%>" msgstr "" -#: c/c-parser.cc:16986 cp/parser.cc:40208 +#: c/c-parser.cc:16987 cp/parser.cc:40228 #, gcc-internal-format msgid "%qs must be the first clause of %qs" msgstr "" -#: c/c-parser.cc:17126 cp/parser.cc:40349 +#: c/c-parser.cc:17127 cp/parser.cc:40369 #, gcc-internal-format msgid "expected %<#pragma omp%> clause" msgstr "" -#: c/c-parser.cc:17259 cp/parser.cc:44567 +#: c/c-parser.cc:17260 cp/parser.cc:44587 #, gcc-internal-format msgid "no valid clauses specified in %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17269 cp/parser.cc:44577 +#: c/c-parser.cc:17270 cp/parser.cc:44597 #, gcc-internal-format msgid "array section in %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17289 cp/parser.cc:44597 +#: c/c-parser.cc:17290 cp/parser.cc:44617 #, gcc-internal-format msgid "%qD must be a global variable in %<#pragma acc declare link%>" msgstr "" -#: c/c-parser.cc:17300 cp/parser.cc:44608 +#: c/c-parser.cc:17301 cp/parser.cc:44628 #, gcc-internal-format msgid "invalid OpenACC clause at file scope" msgstr "" -#: c/c-parser.cc:17307 cp/parser.cc:44615 +#: c/c-parser.cc:17308 cp/parser.cc:44635 #, gcc-internal-format msgid "invalid use of % variable %qD in %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17315 cp/parser.cc:44623 +#: c/c-parser.cc:17316 cp/parser.cc:44643 #, gcc-internal-format msgid "invalid use of % variable %qD in %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17326 cp/parser.cc:44645 +#: c/c-parser.cc:17327 cp/parser.cc:44665 #, gcc-internal-format msgid "%qD must be a variable declared in the same scope as %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17336 cp/parser.cc:44655 +#: c/c-parser.cc:17337 cp/parser.cc:44675 #, gcc-internal-format msgid "variable %qD used more than once with %<#pragma acc declare%>" msgstr "" -#: c/c-parser.cc:17429 cp/parser.cc:44753 +#: c/c-parser.cc:17430 cp/parser.cc:44773 #, gcc-internal-format msgid "expected % after %<#pragma acc %s%>" msgstr "" -#: c/c-parser.cc:17445 cp/parser.cc:44770 +#: c/c-parser.cc:17446 cp/parser.cc:44790 #, gcc-internal-format msgid "%<#pragma acc %s data%> has no data movement clause" msgstr "" -#: c/c-parser.cc:17695 cp/parser.cc:3163 +#: c/c-parser.cc:17696 cp/parser.cc:3163 #, gcc-internal-format msgid "%qE has not been declared" msgstr "" -#: c/c-parser.cc:17699 +#: c/c-parser.cc:17700 #, gcc-internal-format msgid "expected function name" msgstr "" -#: c/c-parser.cc:17717 cp/parser.cc:46988 +#: c/c-parser.cc:17718 cp/parser.cc:47008 #, fuzzy, gcc-internal-format #| msgid "`%D' is not a function," msgid "%qD does not refer to a function" msgstr "`%D' - гэта ня функцыя," -#: c/c-parser.cc:17740 c/c-parser.cc:17788 cp/parser.cc:1499 +#: c/c-parser.cc:17741 c/c-parser.cc:17789 cp/parser.cc:1499 #, gcc-internal-format msgid "%<#pragma acc routine%> not immediately followed by function declaration or definition" msgstr "" -#: c/c-parser.cc:17780 cp/parser.cc:47039 cp/parser.cc:47086 +#: c/c-parser.cc:17781 cp/parser.cc:47059 cp/parser.cc:47106 #, gcc-internal-format msgid "%<#pragma acc routine%> not immediately followed by a single function declaration or definition" msgstr "" -#: c/c-parser.cc:17811 cp/parser.cc:47114 +#: c/c-parser.cc:17812 cp/parser.cc:47134 #, gcc-internal-format msgid "%<#pragma acc routine%> must be applied before use" msgstr "" -#: c/c-parser.cc:17812 cp/parser.cc:47116 +#: c/c-parser.cc:17813 cp/parser.cc:47136 #, gcc-internal-format msgid "%<#pragma acc routine%> must be applied before definition" msgstr "" -#: c/c-parser.cc:17856 cp/parser.cc:44971 +#: c/c-parser.cc:17857 cp/parser.cc:44991 #, gcc-internal-format msgid "%<#pragma acc update%> must contain at least one % or % or % clause" msgstr "" -#: c/c-parser.cc:17911 cp/parser.cc:40446 +#: c/c-parser.cc:17912 cp/parser.cc:40466 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:17927 +#: c/c-parser.cc:17928 #, gcc-internal-format msgid "% clause allocator expression has type %qT rather than %" msgstr "" -#: c/c-parser.cc:17942 cp/parser.cc:40461 +#: c/c-parser.cc:17943 cp/parser.cc:40481 #, gcc-internal-format msgid "%<#pragma omp allocate%> not yet supported" msgstr "" -#: c/c-parser.cc:18084 cp/parser.cc:40598 +#: c/c-parser.cc:18085 cp/parser.cc:40618 #, gcc-internal-format msgid "expected %, %, %, or % clause" msgstr "" -#: c/c-parser.cc:18123 cp/parser.cc:40637 +#: c/c-parser.cc:18124 cp/parser.cc:40657 #, gcc-internal-format msgid "expected %, % or %" msgstr "" -#: c/c-parser.cc:18147 cp/parser.cc:40666 +#: c/c-parser.cc:18148 cp/parser.cc:40686 #, gcc-internal-format msgid "expected %, %, %, %, %, %, %, %, %, %, % or % clause" msgstr "" -#: c/c-parser.cc:18162 cp/parser.cc:40681 +#: c/c-parser.cc:18163 cp/parser.cc:40701 #, fuzzy, gcc-internal-format #| msgid "too many input files" msgid "too many atomic clauses" msgstr "вельмі шмат уваходзячых файлаў" -#: c/c-parser.cc:18169 cp/parser.cc:40688 +#: c/c-parser.cc:18170 cp/parser.cc:40708 #, gcc-internal-format msgid "too many memory order clauses" msgstr "" -#: c/c-parser.cc:18207 c/c-parser.cc:18214 cp/parser.cc:40726 -#: cp/parser.cc:40733 +#: c/c-parser.cc:18208 c/c-parser.cc:18215 cp/parser.cc:40746 +#: cp/parser.cc:40753 #, gcc-internal-format msgid "%qs clause is incompatible with % or % clauses" msgstr "" -#: c/c-parser.cc:18220 c/c-parser.cc:18225 cp/parser.cc:40739 -#: cp/parser.cc:40744 +#: c/c-parser.cc:18221 c/c-parser.cc:18226 cp/parser.cc:40759 +#: cp/parser.cc:40764 #, gcc-internal-format msgid "%qs clause requires %qs clause" msgstr "" -#: c/c-parser.cc:18269 cp/parser.cc:40788 +#: c/c-parser.cc:18270 cp/parser.cc:40808 #, gcc-internal-format msgid "%<#pragma omp atomic read%> incompatible with % clause" msgstr "" -#: c/c-parser.cc:18279 cp/parser.cc:40798 +#: c/c-parser.cc:18280 cp/parser.cc:40818 #, gcc-internal-format msgid "%<#pragma omp atomic write%> incompatible with % clause" msgstr "" -#: c/c-parser.cc:18402 cp/parser.cc:40898 +#: c/c-parser.cc:18403 cp/parser.cc:40918 #, gcc-internal-format msgid "expected %<==%> comparison in % condition" msgstr "" -#: c/c-parser.cc:18409 cp/parser.cc:40905 +#: c/c-parser.cc:18410 cp/parser.cc:40925 #, gcc-internal-format msgid "expected %<==%>, %<<%> or %<>%> comparison in % condition" msgstr "" -#: c/c-parser.cc:18482 cp/parser.cc:40970 cp/parser.cc:41251 -#: cp/parser.cc:41345 cp/parser.cc:41363 +#: c/c-parser.cc:18483 cp/parser.cc:40990 cp/parser.cc:41271 +#: cp/parser.cc:41365 cp/parser.cc:41383 #, gcc-internal-format msgid "invalid form of %<#pragma omp atomic compare%>" msgstr "" -#: c/c-parser.cc:18493 cp/parser.cc:40981 +#: c/c-parser.cc:18494 cp/parser.cc:41001 #, gcc-internal-format msgid "unexpected %" msgstr "" -#: c/c-parser.cc:18553 cp/parser.cc:41418 +#: c/c-parser.cc:18554 cp/parser.cc:41438 #, gcc-internal-format msgid "invalid form of %" msgstr "" -#: c/c-parser.cc:18825 cp/parser.cc:41272 cp/parser.cc:41298 +#: c/c-parser.cc:18826 cp/parser.cc:41292 cp/parser.cc:41318 #, gcc-internal-format msgid "invalid form of %<#pragma omp atomic%>" msgstr "" -#: c/c-parser.cc:18829 cp/parser.cc:41338 cp/parser.cc:41372 +#: c/c-parser.cc:18830 cp/parser.cc:41358 cp/parser.cc:41392 #, gcc-internal-format msgid "invalid operator for %<#pragma omp atomic%>" msgstr "" -#: c/c-parser.cc:18880 cp/parser.cc:41407 +#: c/c-parser.cc:18881 cp/parser.cc:41427 #, gcc-internal-format msgid "% clause requires atomic equality comparison" msgstr "" -#: c/c-parser.cc:18886 cp/semantics.cc:10745 cp/semantics.cc:10755 +#: c/c-parser.cc:18887 cp/semantics.cc:10761 cp/semantics.cc:10771 #, gcc-internal-format msgid "%<#pragma omp atomic capture%> uses two different expressions for memory" msgstr "" -#: c/c-parser.cc:18986 cp/semantics.cc:10832 +#: c/c-parser.cc:18987 cp/semantics.cc:10848 #, gcc-internal-format msgid "% expression is not lvalue expression" msgstr "" -#: c/c-parser.cc:19043 cp/parser.cc:41573 +#: c/c-parser.cc:19044 cp/parser.cc:41593 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:19055 cp/parser.cc:41589 +#: c/c-parser.cc:19056 cp/parser.cc:41609 #, gcc-internal-format msgid "expected %, % or % clause" msgstr "" -#: c/c-parser.cc:19093 cp/parser.cc:41629 +#: c/c-parser.cc:19094 cp/parser.cc:41649 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:19101 cp/parser.cc:41637 +#: c/c-parser.cc:19102 cp/parser.cc:41657 #, gcc-internal-format msgid "% list specified together with memory order clause" msgstr "" -#: c/c-parser.cc:19106 +#: c/c-parser.cc:19107 #, gcc-internal-format msgid "expected %<(%> or end of line" msgstr "" -#: c/c-parser.cc:19185 cp/parser.cc:42356 +#: c/c-parser.cc:19186 cp/parser.cc:42376 #, gcc-internal-format msgid "expected % or % clause" msgstr "" -#: c/c-parser.cc:19190 cp/parser.cc:42362 +#: c/c-parser.cc:19191 cp/parser.cc:42382 #, gcc-internal-format msgid "expected %<#pragma omp scan%>" msgstr "" -#: c/c-parser.cc:19246 cp/parser.cc:42413 +#: c/c-parser.cc:19247 cp/parser.cc:42433 #, gcc-internal-format msgid "% clause parameter is less than %" msgstr "" -#: c/c-parser.cc:19257 cp/parser.cc:42424 +#: c/c-parser.cc:19258 cp/parser.cc:42444 #, gcc-internal-format msgid "% clause may not be specified together with % clause with a parameter" msgstr "" -#: c/c-parser.cc:19275 cp/parser.cc:42452 +#: c/c-parser.cc:19276 cp/parser.cc:42472 #, fuzzy, gcc-internal-format msgid "for statement expected" msgstr "вельмі шмат аргументаў у функцыі" -#: c/c-parser.cc:19353 cp/semantics.cc:10323 cp/semantics.cc:10414 +#: c/c-parser.cc:19354 cp/semantics.cc:10339 cp/semantics.cc:10430 #, gcc-internal-format msgid "expected iteration declaration or initialization" msgstr "" -#: c/c-parser.cc:19439 +#: c/c-parser.cc:19440 #, gcc-internal-format msgid "not enough perfectly nested loops" msgstr "" -#: c/c-parser.cc:19487 cp/parser.cc:42766 +#: c/c-parser.cc:19488 cp/parser.cc:42786 #, gcc-internal-format msgid "collapsed loops not perfectly nested" msgstr "" -#: c/c-parser.cc:19570 cp/parser.cc:42562 cp/parser.cc:42604 cp/pt.cc:18175 +#: c/c-parser.cc:19571 cp/parser.cc:42582 cp/parser.cc:42624 cp/pt.cc:18293 #, gcc-internal-format msgid "iteration variable %qD should not be firstprivate" msgstr "" -#: c/c-parser.cc:19706 cp/parser.cc:42887 +#: c/c-parser.cc:19707 cp/parser.cc:42907 #, gcc-internal-format msgid "% clause with parameter may not be specified on %qs construct" msgstr "" -#: c/c-parser.cc:19985 cp/parser.cc:43180 +#: c/c-parser.cc:19986 cp/parser.cc:43200 #, gcc-internal-format msgid "%<#pragma omp ordered%> with % clause may only be used in compound statements" msgstr "" -#: c/c-parser.cc:20199 cp/parser.cc:43386 +#: c/c-parser.cc:20200 cp/parser.cc:43406 #, gcc-internal-format msgid "expected % after %qs" msgstr "" -#: c/c-parser.cc:20541 cp/parser.cc:43730 +#: c/c-parser.cc:20542 cp/parser.cc:43750 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:20796 cp/parser.cc:44005 +#: c/c-parser.cc:20797 cp/parser.cc:44025 #, gcc-internal-format msgid "%<#pragma omp target data%> with map-type other than %, %, % or % on % clause" msgstr "" -#: c/c-parser.cc:20812 cp/parser.cc:44021 +#: c/c-parser.cc:20813 cp/parser.cc:44041 #, gcc-internal-format msgid "%<#pragma omp target data%> must contain at least one %, % or % clause" msgstr "" -#: c/c-parser.cc:20860 cp/parser.cc:44253 +#: c/c-parser.cc:20861 cp/parser.cc:44273 #, gcc-internal-format msgid "%<#pragma omp target update%> must contain at least one % or % clauses" msgstr "" -#: c/c-parser.cc:20934 cp/parser.cc:44104 +#: c/c-parser.cc:20935 cp/parser.cc:44124 #, gcc-internal-format msgid "%<#pragma omp target enter data%> with map-type other than % or % on % clause" msgstr "" -#: c/c-parser.cc:20946 cp/parser.cc:44116 +#: c/c-parser.cc:20947 cp/parser.cc:44136 #, gcc-internal-format msgid "%<#pragma omp target enter data%> must contain at least one % clause" msgstr "" -#: c/c-parser.cc:21021 cp/parser.cc:44196 +#: c/c-parser.cc:21022 cp/parser.cc:44216 #, gcc-internal-format msgid "%<#pragma omp target exit data%> with map-type other than %, % or % on % clause" msgstr "" -#: c/c-parser.cc:21034 cp/parser.cc:44209 +#: c/c-parser.cc:21035 cp/parser.cc:44229 #, gcc-internal-format msgid "%<#pragma omp target exit data%> must contain at least one % clause" msgstr "" -#: c/c-parser.cc:21270 cp/semantics.cc:9854 +#: c/c-parser.cc:21271 cp/semantics.cc:9870 #, gcc-internal-format msgid "%<#pragma omp target%> with map-type other than %, %, % or % on % clause" msgstr "" -#: c/c-parser.cc:21327 +#: c/c-parser.cc:21328 #, gcc-internal-format msgid "%<#pragma omp declare %s%> must be followed by function declaration or definition or another %<#pragma omp declare %s%>" msgstr "" -#: c/c-parser.cc:21378 c/c-parser.cc:21406 +#: c/c-parser.cc:21379 c/c-parser.cc:21407 #, gcc-internal-format msgid "%<#pragma omp declare %s%> must be followed by function declaration or definition" msgstr "" -#: c/c-parser.cc:21445 cp/parser.cc:45121 +#: c/c-parser.cc:21446 cp/parser.cc:45141 #, gcc-internal-format msgid "expected trait selector name" msgstr "" -#: c/c-parser.cc:21498 cp/parser.cc:45173 +#: c/c-parser.cc:21499 cp/parser.cc:45193 #, gcc-internal-format msgid "selector %qs not allowed for context selector set %qs" msgstr "" -#: c/c-parser.cc:21523 cp/parser.cc:45197 +#: c/c-parser.cc:21524 cp/parser.cc:45217 #, gcc-internal-format msgid "selector %qs does not accept any properties" msgstr "" -#: c/c-parser.cc:21550 cp/parser.cc:45236 cp/pt.cc:11631 +#: c/c-parser.cc:21551 cp/parser.cc:45256 cp/pt.cc:11712 #, gcc-internal-format msgid "score argument must be constant integer expression" msgstr "" -#: c/c-parser.cc:21553 cp/parser.cc:45239 cp/pt.cc:11648 +#: c/c-parser.cc:21554 cp/parser.cc:45259 cp/pt.cc:11729 #, gcc-internal-format msgid "score argument must be non-negative" msgstr "" -#: c/c-parser.cc:21577 cp/parser.cc:45267 cp/pt.cc:11634 +#: c/c-parser.cc:21578 cp/parser.cc:45287 cp/pt.cc:11715 #, gcc-internal-format msgid "property must be constant integer expression or string literal" msgstr "" -#: c/c-parser.cc:21622 cp/parser.cc:45311 +#: c/c-parser.cc:21623 cp/parser.cc:45331 #, gcc-internal-format msgid "expected identifier or string literal" msgstr "" -#: c/c-parser.cc:21644 cp/parser.cc:45333 cp/pt.cc:11638 +#: c/c-parser.cc:21645 cp/parser.cc:45353 cp/pt.cc:11719 #, gcc-internal-format msgid "property must be constant integer expression" msgstr "" -#: c/c-parser.cc:21655 cp/parser.cc:45344 +#: c/c-parser.cc:21656 cp/parser.cc:45364 #, gcc-internal-format msgid "properties for % selector may not be specified in %" msgstr "" -#: c/c-parser.cc:21742 cp/parser.cc:45430 +#: c/c-parser.cc:21743 cp/parser.cc:45450 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:21817 cp/parser.cc:45544 +#: c/c-parser.cc:21818 cp/parser.cc:45564 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:21837 +#: c/c-parser.cc:21838 #, fuzzy, gcc-internal-format #| msgid "`%D' is not a function," msgid "variant %qD is not a function" msgstr "`%D' - гэта ня функцыя," -#: c/c-parser.cc:21843 cp/decl.cc:7902 +#: c/c-parser.cc:21844 cp/decl.cc:7953 #, fuzzy, gcc-internal-format msgid "variant %qD and base %qD have incompatible types" msgstr "\"%s\" мае незавершаны тып" -#: c/c-parser.cc:21855 cp/decl.cc:7911 +#: c/c-parser.cc:21856 cp/decl.cc:7962 #, gcc-internal-format msgid "variant %qD is a built-in" msgstr "" -#: c/c-parser.cc:21900 +#: c/c-parser.cc:21901 #, gcc-internal-format msgid "%<#pragma omp declare %s%> not immediately followed by a function declaration or definition" msgstr "" -#: c/c-parser.cc:21908 cp/parser.cc:45589 +#: c/c-parser.cc:21909 cp/parser.cc:45609 #, gcc-internal-format msgid "%<#pragma omp declare %s%> not immediately followed by a single function declaration or definition" msgstr "" -#: c/c-parser.cc:22017 cp/parser.cc:45797 +#: c/c-parser.cc:22018 cp/parser.cc:45817 #, gcc-internal-format msgid "%qD specified both in declare target % and % clauses" msgstr "" -#: c/c-parser.cc:22066 cp/parser.cc:45909 +#: c/c-parser.cc:22067 cp/parser.cc:45929 #, gcc-internal-format msgid "directive with only % clauses ignored" msgstr "" -#: c/c-parser.cc:22085 cp/parser.cc:45935 +#: c/c-parser.cc:22086 cp/parser.cc:45955 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:22092 cp/parser.cc:45942 +#: c/c-parser.cc:22093 cp/parser.cc:45962 #, gcc-internal-format msgid "expected %" msgstr "" -#: c/c-parser.cc:22098 cp/parser.cc:45949 +#: c/c-parser.cc:22099 cp/parser.cc:45969 #, gcc-internal-format msgid "%<#pragma omp end declare target%> without corresponding %<#pragma omp declare target%>" msgstr "" -#: c/c-parser.cc:22126 +#: c/c-parser.cc:22127 #, gcc-internal-format msgid "%<#pragma omp declare reduction%> not at file or block scope" msgstr "" -#: c/c-parser.cc:22203 +#: c/c-parser.cc:22204 #, gcc-internal-format msgid "predeclared arithmetic type in %<#pragma omp declare reduction%>" msgstr "" -#: c/c-parser.cc:22207 +#: c/c-parser.cc:22208 #, gcc-internal-format msgid "function or array type in %<#pragma omp declare reduction%>" msgstr "" -#: c/c-parser.cc:22210 +#: c/c-parser.cc:22211 #, gcc-internal-format msgid "%<_Atomic%> qualified type in %<#pragma omp declare reduction%>" msgstr "" -#: c/c-parser.cc:22213 +#: c/c-parser.cc:22214 #, gcc-internal-format msgid "const, volatile or restrict qualified type in %<#pragma omp declare reduction%>" msgstr "" -#: c/c-parser.cc:22221 +#: c/c-parser.cc:22222 #, gcc-internal-format msgid "redeclaration of %qs %<#pragma omp declare reduction%> for type %qT" msgstr "" -#: c/c-parser.cc:22230 +#: c/c-parser.cc:22231 #, gcc-internal-format msgid "previous %<#pragma omp declare reduction%>" msgstr "" -#: c/c-parser.cc:22347 +#: c/c-parser.cc:22348 #, gcc-internal-format msgid "expected % or function-name" msgstr "" -#: c/c-parser.cc:22358 +#: c/c-parser.cc:22359 #, gcc-internal-format msgid "expected function-name %<(%>" msgstr "" -#: c/c-parser.cc:22377 +#: c/c-parser.cc:22378 #, gcc-internal-format msgid "one of the initializer call arguments should be %<&omp_priv%>" msgstr "" -#: c/c-parser.cc:22508 cp/parser.cc:46437 +#: c/c-parser.cc:22509 cp/parser.cc:46457 #, gcc-internal-format msgid "expected %, %, % or %" msgstr "" -#: c/c-parser.cc:22575 cp/parser.cc:46503 +#: c/c-parser.cc:22576 cp/parser.cc:46523 #, gcc-internal-format msgid "expected %, % or %" msgstr "" -#: c/c-parser.cc:22604 cp/parser.cc:46538 +#: c/c-parser.cc:22605 cp/parser.cc:46558 #, gcc-internal-format msgid "expected %, %, %, % or % clause" msgstr "" -#: c/c-parser.cc:22613 cp/parser.cc:46547 +#: c/c-parser.cc:22614 cp/parser.cc:46567 #, gcc-internal-format msgid "%qs clause on % directive not supported yet" msgstr "" -#: c/c-parser.cc:22625 cp/parser.cc:46559 +#: c/c-parser.cc:22626 cp/parser.cc:46579 #, gcc-internal-format msgid "%qs clause used lexically after first target construct or offloading API" msgstr "" -#: c/c-parser.cc:22637 cp/parser.cc:46571 +#: c/c-parser.cc:22638 cp/parser.cc:46591 #, gcc-internal-format msgid "more than one % clause in a single compilation unit" msgstr "" -#: c/c-parser.cc:22646 cp/parser.cc:46580 +#: c/c-parser.cc:22647 cp/parser.cc:46600 #, gcc-internal-format msgid "% clause used lexically after first % construct without memory order clause" msgstr "" -#: c/c-parser.cc:22660 cp/parser.cc:46594 +#: c/c-parser.cc:22661 cp/parser.cc:46614 #, gcc-internal-format msgid "% requires at least one clause" msgstr "" -#: c/c-parser.cc:22679 +#: c/c-parser.cc:22680 #, gcc-internal-format msgid "zero sized type %qT in % clause" msgstr "" -#: c/c-parser.cc:22685 +#: c/c-parser.cc:22686 #, gcc-internal-format msgid "variable sized type %qT in % clause" msgstr "" -#: c/c-parser.cc:22846 cp/parser.cc:46656 +#: c/c-parser.cc:22847 cp/parser.cc:46676 #, gcc-internal-format msgid "expected %, % or % clause" msgstr "" -#: c/c-parser.cc:22879 cp/parser.cc:46691 +#: c/c-parser.cc:22880 cp/parser.cc:46711 #, gcc-internal-format msgid "expected %qs or %qs" msgstr "" -#: c/c-parser.cc:22936 cp/parser.cc:46753 +#: c/c-parser.cc:22937 cp/parser.cc:46773 #, gcc-internal-format msgid "%<#pragma omp error%> with % clause may only be used in compound statements" msgstr "" -#: c/c-parser.cc:22959 cp/parser.cc:46780 +#: c/c-parser.cc:22960 cp/parser.cc:46800 #, gcc-internal-format msgid "% encountered: %s" msgstr "" -#: c/c-parser.cc:22962 cp/parser.cc:46783 +#: c/c-parser.cc:22963 cp/parser.cc:46803 #, gcc-internal-format msgid "% encountered" msgstr "" -#: c/c-parser.cc:23109 cp/semantics.cc:9229 +#: c/c-parser.cc:23110 cp/semantics.cc:9245 #, gcc-internal-format msgid "%qE declared % after first use" msgstr "" -#: c/c-parser.cc:23111 cp/semantics.cc:9231 +#: c/c-parser.cc:23112 cp/semantics.cc:9247 #, gcc-internal-format msgid "automatic variable %qE cannot be %" msgstr "" -#: c/c-parser.cc:23115 cp/semantics.cc:9233 +#: c/c-parser.cc:23116 cp/semantics.cc:9249 #, fuzzy, gcc-internal-format msgid "% %qE has incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: c/c-parser.cc:23294 cp/parser.cc:47519 +#: c/c-parser.cc:23295 cp/parser.cc:47539 #, gcc-internal-format msgid "%<__transaction_cancel%> without transactional memory support enabled" msgstr "" -#: c/c-parser.cc:23300 cp/parser.cc:47525 +#: c/c-parser.cc:23301 cp/parser.cc:47545 #, gcc-internal-format msgid "%<__transaction_cancel%> within a %<__transaction_relaxed%>" msgstr "" -#: c/c-parser.cc:23309 +#: c/c-parser.cc:23310 #, gcc-internal-format msgid "outer %<__transaction_cancel%> not within outer %<__transaction_atomic%> or a % function" msgstr "" -#: c/c-parser.cc:23317 cp/parser.cc:47543 +#: c/c-parser.cc:23318 cp/parser.cc:47563 #, gcc-internal-format msgid "%<__transaction_cancel%> not within %<__transaction_atomic%>" msgstr "" -#: c/c-parser.cc:23401 +#: c/c-parser.cc:23402 #, gcc-internal-format msgid "no closing brace" msgstr "" @@ -46410,7 +46424,7 @@ msgstr "" msgid "%qD has an incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: c/c-typeck.cc:242 c/c-typeck.cc:10734 c/c-typeck.cc:10776 cp/call.cc:4659 +#: c/c-typeck.cc:242 c/c-typeck.cc:10734 c/c-typeck.cc:10776 cp/call.cc:4670 #, gcc-internal-format msgid "invalid use of void expression" msgstr "" @@ -46707,7 +46721,7 @@ msgstr "" msgid "arithmetic on pointer to an incomplete type" msgstr "" -#: c/c-typeck.cc:4062 cp/typeck.cc:6459 +#: c/c-typeck.cc:4062 cp/typeck.cc:6465 #, gcc-internal-format msgid "arithmetic on pointer to an empty aggregate" msgstr "" @@ -46987,7 +47001,7 @@ msgstr "" msgid "cast from function call of type %qT to non-matching type %qT" msgstr "" -#: c/c-typeck.cc:6077 cp/typeck.cc:8829 +#: c/c-typeck.cc:6077 cp/typeck.cc:8835 #, gcc-internal-format msgid "cast to pointer from integer of different size" msgstr "" @@ -47156,7 +47170,7 @@ msgstr "" msgid "initialization left-hand side might be a candidate for a format attribute" msgstr "" -#: c/c-typeck.cc:7317 cp/typeck.cc:9949 +#: c/c-typeck.cc:7317 cp/typeck.cc:9955 #, gcc-internal-format msgid "return type might be a candidate for a format attribute" msgstr "" @@ -47326,12 +47340,12 @@ msgstr "" msgid "traditional C rejects automatic aggregate initialization" msgstr "" -#: c/c-typeck.cc:8027 c/c-typeck.cc:8926 cp/typeck2.cc:1189 +#: c/c-typeck.cc:8027 c/c-typeck.cc:8926 cp/typeck2.cc:1190 #, gcc-internal-format msgid "initialization of a flexible array member" msgstr "" -#: c/c-typeck.cc:8043 cp/typeck2.cc:1206 +#: c/c-typeck.cc:8043 cp/typeck2.cc:1207 #, gcc-internal-format msgid "cannot initialize array of %qT from a string literal with type array of %qT" msgstr "" @@ -47372,7 +47386,7 @@ msgstr "" msgid "invalid initializer" msgstr "нерэчаісны ініцыялізатар" -#: c/c-typeck.cc:8555 cp/decl.cc:7291 +#: c/c-typeck.cc:8555 cp/decl.cc:7331 #, gcc-internal-format msgid "opaque vector types cannot be initialized" msgstr "" @@ -47387,8 +47401,8 @@ msgstr "" msgid "braces around scalar initializer" msgstr "" -#: c/c-typeck.cc:8923 c/c-typeck.cc:10362 cp/typeck2.cc:1216 -#: cp/typeck2.cc:1481 +#: c/c-typeck.cc:8923 c/c-typeck.cc:10362 cp/typeck2.cc:1217 +#: cp/typeck2.cc:1482 #, gcc-internal-format msgid "initialization of flexible array member in a nested context" msgstr "" @@ -47483,7 +47497,7 @@ msgstr "" msgid "positional initialization of field in % declared with % attribute" msgstr "" -#: c/c-typeck.cc:10336 cp/typeck2.cc:1193 +#: c/c-typeck.cc:10336 cp/typeck2.cc:1194 #, gcc-internal-format msgid "non-static initialization of a flexible array member" msgstr "" @@ -47524,7 +47538,7 @@ msgstr "ISO C не падтрымлівае \"goto *expr;\"" msgid "computed goto must be pointer type" msgstr "" -#: c/c-typeck.cc:10859 c/gimple-parser.cc:2456 cp/typeck.cc:10441 +#: c/c-typeck.cc:10859 c/gimple-parser.cc:2456 cp/typeck.cc:10447 #, fuzzy, gcc-internal-format #| msgid "function does not return string type" msgid "function declared % has a % statement" @@ -47550,7 +47564,7 @@ msgstr "" msgid "function returns address of label" msgstr "ISO C не дазваляе пусты ізыходны файл" -#: c/c-typeck.cc:11076 cp/semantics.cc:1495 +#: c/c-typeck.cc:11076 cp/semantics.cc:1511 #, gcc-internal-format msgid "switch quantity not an integer" msgstr "" @@ -47580,7 +47594,7 @@ msgstr "" msgid "break statement not within loop or switch" msgstr "" -#: c/c-typeck.cc:11234 c/c-typeck.cc:11254 cp/decl.cc:3731 cp/parser.cc:14253 +#: c/c-typeck.cc:11234 c/c-typeck.cc:11254 cp/decl.cc:3748 cp/parser.cc:14253 #: cp/parser.cc:14274 #, gcc-internal-format msgid "invalid exit from OpenMP structured block" @@ -47718,18 +47732,18 @@ msgstr "" msgid "used vector type where scalar is required" msgstr "" -#: c/c-typeck.cc:13126 cp/semantics.cc:10905 +#: c/c-typeck.cc:13126 cp/semantics.cc:10921 #, gcc-internal-format msgid "%<#pragma omp cancel%> must specify one of %, %, % or % clauses" msgstr "" -#: c/c-typeck.cc:13137 c/c-typeck.cc:13147 cp/semantics.cc:10916 -#: cp/semantics.cc:10926 +#: c/c-typeck.cc:13137 c/c-typeck.cc:13147 cp/semantics.cc:10932 +#: cp/semantics.cc:10942 #, gcc-internal-format msgid "expected % % clause modifier" msgstr "" -#: c/c-typeck.cc:13182 cp/semantics.cc:10961 +#: c/c-typeck.cc:13182 cp/semantics.cc:10977 #, gcc-internal-format msgid "%<#pragma omp cancellation point%> must specify one of %, %, % or % clauses" msgstr "" @@ -47741,29 +47755,29 @@ msgid "%<_Atomic%> %qE in %qs clause" msgstr "" #: c/c-typeck.cc:13251 c/c-typeck.cc:14849 c/c-typeck.cc:15045 -#: cp/semantics.cc:5076 cp/semantics.cc:7814 cp/semantics.cc:8057 +#: cp/semantics.cc:5092 cp/semantics.cc:7830 cp/semantics.cc:8073 #, gcc-internal-format msgid "bit-field %qE in %qs clause" msgstr "" -#: c/c-typeck.cc:13260 c/c-typeck.cc:15069 cp/semantics.cc:5086 -#: cp/semantics.cc:8076 +#: c/c-typeck.cc:13260 c/c-typeck.cc:15069 cp/semantics.cc:5102 +#: cp/semantics.cc:8092 #, gcc-internal-format msgid "%qE is a member of a union" msgstr "" -#: c/c-typeck.cc:13277 c/c-typeck.cc:15078 cp/semantics.cc:8085 +#: c/c-typeck.cc:13277 c/c-typeck.cc:15078 cp/semantics.cc:8101 #, fuzzy, gcc-internal-format msgid "cannot dereference %qE in %qs clause" msgstr "Не магу знайсці файл для класа %s." -#: c/c-typeck.cc:13288 cp/semantics.cc:5111 cp/semantics.cc:8130 +#: c/c-typeck.cc:13288 cp/semantics.cc:5127 cp/semantics.cc:8146 #, gcc-internal-format msgid "%qD is not a variable in %qs clause" msgstr "" -#: c/c-typeck.cc:13292 c/c-typeck.cc:15106 cp/semantics.cc:5115 -#: cp/semantics.cc:8134 +#: c/c-typeck.cc:13292 c/c-typeck.cc:15106 cp/semantics.cc:5131 +#: cp/semantics.cc:8150 #, gcc-internal-format msgid "%qE is not a variable in %qs clause" msgstr "" @@ -47774,85 +47788,85 @@ msgid "%<_Atomic%> %qD in %qs clause" msgstr "" #: c/c-typeck.cc:13310 c/c-typeck.cc:15113 c/c-typeck.cc:15240 -#: cp/semantics.cc:5124 cp/semantics.cc:8141 cp/semantics.cc:8330 +#: cp/semantics.cc:5140 cp/semantics.cc:8157 cp/semantics.cc:8346 #, gcc-internal-format msgid "%qD is threadprivate variable in %qs clause" msgstr "" -#: c/c-typeck.cc:13347 cp/semantics.cc:5158 +#: c/c-typeck.cc:13347 cp/semantics.cc:5174 #, gcc-internal-format msgid "low bound %qE of array section does not have integral type" msgstr "" -#: c/c-typeck.cc:13354 cp/semantics.cc:5165 +#: c/c-typeck.cc:13354 cp/semantics.cc:5181 #, gcc-internal-format msgid "length %qE of array section does not have integral type" msgstr "" -#: c/c-typeck.cc:13377 cp/semantics.cc:5198 +#: c/c-typeck.cc:13377 cp/semantics.cc:5214 #, gcc-internal-format msgid "expected single pointer in %qs clause" msgstr "" #: c/c-typeck.cc:13395 c/c-typeck.cc:13462 c/c-typeck.cc:13754 -#: cp/semantics.cc:5216 cp/semantics.cc:5283 +#: cp/semantics.cc:5232 cp/semantics.cc:5299 #, gcc-internal-format msgid "zero length array section in %qs clause" msgstr "" -#: c/c-typeck.cc:13414 cp/semantics.cc:5235 +#: c/c-typeck.cc:13414 cp/semantics.cc:5251 #, gcc-internal-format msgid "for unknown bound array type length expression must be specified" msgstr "" -#: c/c-typeck.cc:13422 cp/semantics.cc:5243 +#: c/c-typeck.cc:13422 cp/semantics.cc:5259 #, gcc-internal-format msgid "negative low bound in array section in %qs clause" msgstr "" -#: c/c-typeck.cc:13431 c/c-typeck.cc:13555 cp/semantics.cc:5252 -#: cp/semantics.cc:5376 +#: c/c-typeck.cc:13431 c/c-typeck.cc:13555 cp/semantics.cc:5268 +#: cp/semantics.cc:5392 #, gcc-internal-format msgid "negative length in array section in %qs clause" msgstr "" -#: c/c-typeck.cc:13448 cp/semantics.cc:5269 +#: c/c-typeck.cc:13448 cp/semantics.cc:5285 #, gcc-internal-format msgid "low bound %qE above array section size in %qs clause" msgstr "" -#: c/c-typeck.cc:13491 cp/semantics.cc:5312 +#: c/c-typeck.cc:13491 cp/semantics.cc:5328 #, gcc-internal-format msgid "length %qE above array section size in %qs clause" msgstr "" -#: c/c-typeck.cc:13506 cp/semantics.cc:5327 +#: c/c-typeck.cc:13506 cp/semantics.cc:5343 #, gcc-internal-format msgid "high bound %qE above array section size in %qs clause" msgstr "" -#: c/c-typeck.cc:13543 cp/semantics.cc:5364 +#: c/c-typeck.cc:13543 cp/semantics.cc:5380 #, gcc-internal-format msgid "for array function parameter length expression must be specified" msgstr "" -#: c/c-typeck.cc:13547 cp/semantics.cc:5368 +#: c/c-typeck.cc:13547 cp/semantics.cc:5384 #, gcc-internal-format msgid "for pointer type length expression must be specified" msgstr "" -#: c/c-typeck.cc:13574 c/c-typeck.cc:13693 cp/semantics.cc:5395 -#: cp/semantics.cc:5529 +#: c/c-typeck.cc:13574 c/c-typeck.cc:13693 cp/semantics.cc:5411 +#: cp/semantics.cc:5545 #, gcc-internal-format msgid "array section is not contiguous in %qs clause" msgstr "" -#: c/c-typeck.cc:13584 cp/semantics.cc:5405 +#: c/c-typeck.cc:13584 cp/semantics.cc:5421 #, gcc-internal-format msgid "%qE does not have pointer or array type" msgstr "" -#: c/c-typeck.cc:13971 cp/semantics.cc:6503 +#: c/c-typeck.cc:13971 cp/semantics.cc:6519 #, gcc-internal-format msgid "iterator %qD has neither integral nor pointer type" msgstr "" @@ -47862,17 +47876,17 @@ msgstr "" msgid "iterator %qD has %<_Atomic%> qualified type" msgstr "" -#: c/c-typeck.cc:13984 cp/semantics.cc:6510 +#: c/c-typeck.cc:13984 cp/semantics.cc:6526 #, gcc-internal-format msgid "iterator %qD has const qualified type" msgstr "" -#: c/c-typeck.cc:13997 cp/semantics.cc:6526 +#: c/c-typeck.cc:13997 cp/semantics.cc:6542 #, fuzzy, gcc-internal-format msgid "iterator step with non-integral type" msgstr "бітавае поле \"%s\" мае нерэчаісны тып" -#: c/c-typeck.cc:14017 cp/semantics.cc:6562 +#: c/c-typeck.cc:14017 cp/semantics.cc:6578 #, gcc-internal-format msgid "iterator %qD has zero step" msgstr "" @@ -47882,32 +47896,32 @@ msgstr "" msgid "type of iterator %qD refers to outer iterator %qD" msgstr "" -#: c/c-typeck.cc:14051 cp/semantics.cc:6596 +#: c/c-typeck.cc:14051 cp/semantics.cc:6612 #, gcc-internal-format msgid "begin expression refers to outer iterator %qD" msgstr "" -#: c/c-typeck.cc:14057 cp/semantics.cc:6602 +#: c/c-typeck.cc:14057 cp/semantics.cc:6618 #, gcc-internal-format msgid "end expression refers to outer iterator %qD" msgstr "" -#: c/c-typeck.cc:14063 cp/semantics.cc:6608 +#: c/c-typeck.cc:14063 cp/semantics.cc:6624 #, gcc-internal-format msgid "step expression refers to outer iterator %qD" msgstr "" -#: c/c-typeck.cc:14100 cp/semantics.cc:6656 +#: c/c-typeck.cc:14100 cp/semantics.cc:6672 #, gcc-internal-format msgid "expected pointer in %qs clause" msgstr "" -#: c/c-typeck.cc:14188 cp/semantics.cc:6737 +#: c/c-typeck.cc:14188 cp/semantics.cc:6753 #, gcc-internal-format msgid "% and non-% % clauses on the same construct" msgstr "" -#: c/c-typeck.cc:14210 cp/semantics.cc:6757 +#: c/c-typeck.cc:14210 cp/semantics.cc:6773 #, gcc-internal-format msgid "% % clause with array section" msgstr "" @@ -47937,7 +47951,7 @@ msgstr "" msgid "%qE has invalid type for %" msgstr "" -#: c/c-typeck.cc:14339 cp/semantics.cc:6395 +#: c/c-typeck.cc:14339 cp/semantics.cc:6411 #, gcc-internal-format msgid "user defined reduction not found for %qE" msgstr "" @@ -47947,17 +47961,17 @@ msgstr "" msgid "variable length element type in array % clause" msgstr "" -#: c/c-typeck.cc:14445 c/c-typeck.cc:15334 cp/semantics.cc:8846 +#: c/c-typeck.cc:14445 c/c-typeck.cc:15334 cp/semantics.cc:8862 #, gcc-internal-format msgid "% clause must not be used together with %" msgstr "" -#: c/c-typeck.cc:14457 cp/semantics.cc:8914 +#: c/c-typeck.cc:14457 cp/semantics.cc:8930 #, gcc-internal-format msgid "%qE must be % for %" msgstr "" -#: c/c-typeck.cc:14471 cp/semantics.cc:6798 +#: c/c-typeck.cc:14471 cp/semantics.cc:6814 #, gcc-internal-format msgid "modifier should not be specified in % clause on % or % constructs" msgstr "" @@ -47972,23 +47986,23 @@ msgstr "" msgid "%<_Atomic%> %qD in % clause" msgstr "" -#: c/c-typeck.cc:14506 cp/semantics.cc:6872 +#: c/c-typeck.cc:14506 cp/semantics.cc:6888 #, gcc-internal-format msgid "% clause step %qE is neither constant nor a parameter" msgstr "" #: c/c-typeck.cc:14536 c/c-typeck.cc:15233 c/c-typeck.cc:15479 -#: cp/semantics.cc:6959 cp/semantics.cc:8323 cp/semantics.cc:8666 +#: cp/semantics.cc:6975 cp/semantics.cc:8339 cp/semantics.cc:8682 #, gcc-internal-format msgid "%qE is not a variable in clause %qs" msgstr "" -#: c/c-typeck.cc:14554 cp/semantics.cc:6977 +#: c/c-typeck.cc:14554 cp/semantics.cc:6993 #, gcc-internal-format msgid "%qD appears more than once in data-sharing clauses" msgstr "" -#: c/c-typeck.cc:14565 cp/semantics.cc:6988 +#: c/c-typeck.cc:14565 cp/semantics.cc:7004 #, gcc-internal-format msgid "%qD appears more than once in reduction clauses" msgstr "" @@ -48000,33 +48014,33 @@ msgstr "" #: c/c-typeck.cc:14589 c/c-typeck.cc:14656 c/c-typeck.cc:14967 #: c/c-typeck.cc:15160 c/c-typeck.cc:15168 c/c-typeck.cc:15185 -#: c/c-typeck.cc:15195 c/c-typeck.cc:15203 cp/semantics.cc:7002 -#: cp/semantics.cc:7012 cp/semantics.cc:7105 cp/semantics.cc:7112 -#: cp/semantics.cc:7159 cp/semantics.cc:7970 cp/semantics.cc:8193 -#: cp/semantics.cc:8201 cp/semantics.cc:8218 cp/semantics.cc:8228 -#: cp/semantics.cc:8236 +#: c/c-typeck.cc:15195 c/c-typeck.cc:15203 cp/semantics.cc:7018 +#: cp/semantics.cc:7028 cp/semantics.cc:7121 cp/semantics.cc:7128 +#: cp/semantics.cc:7175 cp/semantics.cc:7986 cp/semantics.cc:8209 +#: cp/semantics.cc:8217 cp/semantics.cc:8234 cp/semantics.cc:8244 +#: cp/semantics.cc:8252 #, gcc-internal-format msgid "%qD appears more than once in data clauses" msgstr "" #: c/c-typeck.cc:14592 c/c-typeck.cc:14662 c/c-typeck.cc:15171 -#: c/c-typeck.cc:15206 cp/semantics.cc:7015 cp/semantics.cc:7118 -#: cp/semantics.cc:8204 cp/semantics.cc:8239 +#: c/c-typeck.cc:15206 cp/semantics.cc:7031 cp/semantics.cc:7134 +#: cp/semantics.cc:8220 cp/semantics.cc:8255 #, gcc-internal-format msgid "%qD appears both in data and map clauses" msgstr "" -#: c/c-typeck.cc:14637 cp/semantics.cc:7092 +#: c/c-typeck.cc:14637 cp/semantics.cc:7108 #, gcc-internal-format msgid "%qE is not a variable in clause %" msgstr "" -#: c/c-typeck.cc:14676 cp/semantics.cc:7151 +#: c/c-typeck.cc:14676 cp/semantics.cc:7167 #, gcc-internal-format msgid "%qE is not a variable in clause %" msgstr "" -#: c/c-typeck.cc:14695 cp/semantics.cc:7546 +#: c/c-typeck.cc:14695 cp/semantics.cc:7562 #, gcc-internal-format msgid "%qE is not a variable in % clause" msgstr "" @@ -48046,7 +48060,7 @@ msgstr "" msgid "%qE appears more than once in % clauses" msgstr "" -#: c/c-typeck.cc:14729 cp/semantics.cc:7617 +#: c/c-typeck.cc:14729 cp/semantics.cc:7633 #, gcc-internal-format msgid "%qE is not a variable in % clause" msgstr "" @@ -48056,7 +48070,7 @@ msgstr "" msgid "%qE appears more than once in % clauses" msgstr "" -#: c/c-typeck.cc:14748 cp/semantics.cc:7656 +#: c/c-typeck.cc:14748 cp/semantics.cc:7672 #, gcc-internal-format msgid "%qE is not a variable in % clause" msgstr "" @@ -48066,70 +48080,70 @@ msgstr "" msgid "%qE appears more than once in % clauses" msgstr "" -#: c/c-typeck.cc:14827 cp/semantics.cc:7785 +#: c/c-typeck.cc:14827 cp/semantics.cc:7801 #, gcc-internal-format msgid "% clause with % dependence type on array section" msgstr "" -#: c/c-typeck.cc:14838 cp/semantics.cc:7804 +#: c/c-typeck.cc:14838 cp/semantics.cc:7820 #, gcc-internal-format msgid "%qE is not lvalue expression nor array section in %qs clause" msgstr "" -#: c/c-typeck.cc:14859 cp/semantics.cc:7826 +#: c/c-typeck.cc:14859 cp/semantics.cc:7842 #, gcc-internal-format msgid "%qE does not have % type in % clause with % dependence type" msgstr "" -#: c/c-typeck.cc:14869 cp/semantics.cc:7838 +#: c/c-typeck.cc:14869 cp/semantics.cc:7854 #, gcc-internal-format msgid "%qE should not have % type in % clause with dependence type other than %" msgstr "" -#: c/c-typeck.cc:14915 cp/semantics.cc:7922 +#: c/c-typeck.cc:14915 cp/semantics.cc:7938 #, gcc-internal-format msgid "array section does not have mappable type in %qs clause" msgstr "" -#: c/c-typeck.cc:14963 c/c-typeck.cc:15182 cp/semantics.cc:7966 -#: cp/semantics.cc:8215 +#: c/c-typeck.cc:14963 c/c-typeck.cc:15182 cp/semantics.cc:7982 +#: cp/semantics.cc:8231 #, gcc-internal-format msgid "%qD appears more than once in motion clauses" msgstr "" -#: c/c-typeck.cc:14971 c/c-typeck.cc:15188 cp/semantics.cc:7974 -#: cp/semantics.cc:8221 +#: c/c-typeck.cc:14971 c/c-typeck.cc:15188 cp/semantics.cc:7990 +#: cp/semantics.cc:8237 #, gcc-internal-format msgid "%qD appears more than once in map clauses" msgstr "" -#: c/c-typeck.cc:15052 cp/semantics.cc:8064 +#: c/c-typeck.cc:15052 cp/semantics.cc:8080 #, gcc-internal-format msgid "%qE does not have a mappable type in %qs clause" msgstr "" -#: c/c-typeck.cc:15133 c/c-typeck.cc:15247 cp/semantics.cc:8164 -#: cp/semantics.cc:8337 +#: c/c-typeck.cc:15133 c/c-typeck.cc:15247 cp/semantics.cc:8180 +#: cp/semantics.cc:8353 #, gcc-internal-format msgid "%qD does not have a mappable type in %qs clause" msgstr "" -#: c/c-typeck.cc:15228 cp/semantics.cc:8317 +#: c/c-typeck.cc:15228 cp/semantics.cc:8333 #, gcc-internal-format msgid "%qE is neither a variable nor a function name in clause %qs" msgstr "" -#: c/c-typeck.cc:15256 cp/semantics.cc:8347 +#: c/c-typeck.cc:15256 cp/semantics.cc:8363 #, gcc-internal-format msgid "%qE appears more than once on the same % directive" msgstr "" -#: c/c-typeck.cc:15270 cp/semantics.cc:8363 +#: c/c-typeck.cc:15270 cp/semantics.cc:8379 #, gcc-internal-format msgid "%qD is not an argument in % clause" msgstr "" -#: c/c-typeck.cc:15273 cp/semantics.cc:8366 +#: c/c-typeck.cc:15273 cp/semantics.cc:8382 #, gcc-internal-format msgid "%qE is not an argument in % clause" msgstr "" @@ -48144,22 +48158,22 @@ msgstr "" msgid "%qs variable is neither a pointer nor an array" msgstr "" -#: c/c-typeck.cc:15347 c/c-typeck.cc:15440 cp/semantics.cc:8808 +#: c/c-typeck.cc:15347 c/c-typeck.cc:15440 cp/semantics.cc:8824 #, gcc-internal-format msgid "% clause must not be used together with %" msgstr "" -#: c/c-typeck.cc:15367 cp/semantics.cc:7870 +#: c/c-typeck.cc:15367 cp/semantics.cc:7886 #, gcc-internal-format msgid "too many %qs clauses on a task construct" msgstr "" -#: c/c-typeck.cc:15462 cp/semantics.cc:8634 +#: c/c-typeck.cc:15462 cp/semantics.cc:8650 #, gcc-internal-format msgid "% clause is incompatible with %" msgstr "" -#: c/c-typeck.cc:15529 cp/semantics.cc:8985 +#: c/c-typeck.cc:15529 cp/semantics.cc:9001 #, gcc-internal-format msgid "%qE is predetermined %qs for %qs" msgstr "" @@ -48169,38 +48183,38 @@ msgstr "" msgid "% qualified %qE may appear only in % or % clauses" msgstr "" -#: c/c-typeck.cc:15558 cp/semantics.cc:8760 +#: c/c-typeck.cc:15558 cp/semantics.cc:8776 #, gcc-internal-format msgid "% clause value is bigger than % clause value" msgstr "" -#: c/c-typeck.cc:15570 cp/semantics.cc:8773 +#: c/c-typeck.cc:15570 cp/semantics.cc:8789 #, gcc-internal-format msgid "% schedule modifier specified together with % clause" msgstr "" -#: c/c-typeck.cc:15581 c/c-typeck.cc:15589 cp/semantics.cc:8782 -#: cp/semantics.cc:8800 +#: c/c-typeck.cc:15581 c/c-typeck.cc:15589 cp/semantics.cc:8798 +#: cp/semantics.cc:8816 #, gcc-internal-format msgid "%qs clause specified together with % % clause" msgstr "" -#: c/c-typeck.cc:15637 cp/semantics.cc:8740 +#: c/c-typeck.cc:15637 cp/semantics.cc:8756 #, gcc-internal-format msgid "% clause step is a parameter %qD not specified in % clause" msgstr "" -#: c/c-typeck.cc:15688 cp/semantics.cc:8790 +#: c/c-typeck.cc:15688 cp/semantics.cc:8806 #, gcc-internal-format msgid "% clause must not be used together with % clause" msgstr "" -#: c/c-typeck.cc:15698 cp/semantics.cc:8819 +#: c/c-typeck.cc:15698 cp/semantics.cc:8835 #, gcc-internal-format msgid "% clause must not be used together with % clause" msgstr "" -#: c/c-typeck.cc:15716 cp/semantics.cc:9010 +#: c/c-typeck.cc:15716 cp/semantics.cc:9026 #, gcc-internal-format msgid "the event handle of a % clause should not be in a data-sharing clause" msgstr "" @@ -48217,6 +48231,11 @@ msgstr "\"%s\" мае незавершаны тып" #: c/c-typeck.cc:15901 #, gcc-internal-format +msgid "second argument to % is a function type %qT" +msgstr "" + +#: c/c-typeck.cc:15907 +#, gcc-internal-format msgid "C++ requires promoted type, not enum type, in %" msgstr "" @@ -48429,841 +48448,841 @@ msgid "expected case label" msgstr "" #. A bad conversion for 'this' must be discarding cv-quals. -#: cp/call.cc:3785 +#: cp/call.cc:3796 #, gcc-internal-format msgid " passing %qT as % argument discards qualifiers" msgstr "" -#: cp/call.cc:3789 +#: cp/call.cc:3800 msgid " no known conversion for implicit % parameter from %qH to %qI" msgstr "" -#: cp/call.cc:3796 +#: cp/call.cc:3807 #, gcc-internal-format, gfc-internal-format msgid " conversion of argument %d would be ill-formed:" msgstr "" #. Conversion of conversion function return value failed. -#: cp/call.cc:3803 +#: cp/call.cc:3814 #, fuzzy #| msgid "converting from `%T' to `%T'" msgid " no known conversion from %qH to %qI" msgstr "пераўтварэньне з `%T' у `%T'" -#: cp/call.cc:3809 +#: cp/call.cc:3820 msgid " no known conversion for argument %d from %qH to %qI" msgstr "" -#: cp/call.cc:3823 cp/pt.cc:6945 +#: cp/call.cc:3834 cp/pt.cc:6975 #, gcc-internal-format, gfc-internal-format msgid " candidate expects at least %d argument, %d provided" msgid_plural " candidate expects at least %d arguments, %d provided" msgstr[0] "" msgstr[1] "" -#: cp/call.cc:3828 cp/pt.cc:6950 +#: cp/call.cc:3839 cp/pt.cc:6980 #, gcc-internal-format, gfc-internal-format msgid " candidate expects %d argument, %d provided" msgid_plural " candidate expects %d arguments, %d provided" msgstr[0] "" msgstr[1] "" -#: cp/call.cc:3856 +#: cp/call.cc:3867 #, gcc-internal-format msgid "%s%<%D(%T, %T, %T)%> (built-in)" msgstr "" -#: cp/call.cc:3861 +#: cp/call.cc:3872 #, gcc-internal-format msgid "%s%<%D(%T, %T)%> (built-in)" msgstr "" -#: cp/call.cc:3865 +#: cp/call.cc:3876 #, gcc-internal-format msgid "%s%<%D(%T)%> (built-in)" msgstr "" -#: cp/call.cc:3869 +#: cp/call.cc:3880 #, gcc-internal-format msgid "%s%qT (conversion)" msgstr "" -#: cp/call.cc:3871 +#: cp/call.cc:3882 #, gcc-internal-format msgid "%s%#qD (near match)" msgstr "" -#: cp/call.cc:3873 +#: cp/call.cc:3884 #, gcc-internal-format msgid "%s%#qD (deleted)" msgstr "" -#: cp/call.cc:3875 +#: cp/call.cc:3886 #, gcc-internal-format msgid "%s%#qD (reversed)" msgstr "" -#: cp/call.cc:3877 +#: cp/call.cc:3888 #, gcc-internal-format msgid "%s%#qD (rewritten)" msgstr "" -#: cp/call.cc:3879 +#: cp/call.cc:3890 #, gcc-internal-format msgid "%s%#qD" msgstr "" -#: cp/call.cc:3883 +#: cp/call.cc:3894 #, gcc-internal-format msgid " inherited here" msgstr "" -#: cp/call.cc:3904 +#: cp/call.cc:3915 #, gcc-internal-format msgid " return type %qT of explicit conversion function cannot be converted to %qT with a qualification conversion" msgstr "" -#: cp/call.cc:3910 +#: cp/call.cc:3921 #, gcc-internal-format msgid " conversion from return type %qT of template conversion function specialization to %qT is not an exact match" msgstr "" -#: cp/call.cc:3921 +#: cp/call.cc:3932 #, gcc-internal-format msgid " substitution of deduced template arguments resulted in errors seen above" msgstr "" #. Re-run template unification with diagnostics. -#: cp/call.cc:3926 +#: cp/call.cc:3937 #, fuzzy, gcc-internal-format msgid " template argument deduction/substitution failed:" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/call.cc:3940 +#: cp/call.cc:3951 #, gcc-internal-format msgid " a constructor taking a single argument of its own class type is invalid" msgstr "" -#: cp/call.cc:3947 +#: cp/call.cc:3958 #, gcc-internal-format msgid " an inherited constructor is not a candidate for initialization from an expression of the same or derived type" msgstr "" -#: cp/call.cc:4094 cp/call.cc:4470 +#: cp/call.cc:4105 cp/call.cc:4481 #, gcc-internal-format msgid "designated initializers cannot be used with a non-aggregate type %qT" msgstr "" -#: cp/call.cc:4369 +#: cp/call.cc:4380 msgid "conversion from %qH to %qI is ambiguous" msgstr "" -#: cp/call.cc:4476 cp/cvt.cc:860 +#: cp/call.cc:4487 cp/cvt.cc:860 msgid "could not convert %qE from %qH to %qI" msgstr "" -#: cp/call.cc:4543 +#: cp/call.cc:4554 msgid "initializing %qH with %qI in converted constant expression does not bind directly" msgstr "" -#: cp/call.cc:4564 +#: cp/call.cc:4575 msgid "conversion from %qH to %qI in a converted constant expression" msgstr "" -#: cp/call.cc:4747 +#: cp/call.cc:4763 #, gcc-internal-format msgid "no matching function for call to %<%D(%A)%>" msgstr "" -#: cp/call.cc:4750 +#: cp/call.cc:4766 #, gcc-internal-format msgid "call of overloaded %<%D(%A)%> is ambiguous" msgstr "" #. It's no good looking for an overloaded operator() on a #. pointer-to-member-function. -#: cp/call.cc:5011 +#: cp/call.cc:5026 #, gcc-internal-format msgid "pointer-to-member function %qE cannot be called without an object; consider using %<.*%> or %<->*%>" msgstr "" -#: cp/call.cc:5081 +#: cp/call.cc:5096 #, gcc-internal-format msgid "no match for call to %<(%T) (%A)%>" msgstr "" -#: cp/call.cc:5095 +#: cp/call.cc:5110 #, fuzzy, gcc-internal-format msgid "call of %<(%T) (%A)%> is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/call.cc:5135 +#: cp/call.cc:5150 #, gcc-internal-format msgid "ambiguous overload for " msgstr "" -#: cp/call.cc:5136 +#: cp/call.cc:5151 #, gcc-internal-format msgid "no match for " msgstr "" -#: cp/call.cc:5139 +#: cp/call.cc:5154 #, gcc-internal-format msgid " (operand types are %qT, %qT, and %qT)" msgstr "" -#: cp/call.cc:5141 +#: cp/call.cc:5156 #, gcc-internal-format msgid " (operand types are %qT and %qT)" msgstr "" -#: cp/call.cc:5143 +#: cp/call.cc:5158 #, gcc-internal-format msgid " (operand type is %qT)" msgstr "" -#: cp/call.cc:5160 +#: cp/call.cc:5175 #, fuzzy, gcc-internal-format msgid "ternary %" msgstr "Унутраная памылка: %s" -#: cp/call.cc:5164 +#: cp/call.cc:5179 #, gcc-internal-format msgid "ternary % in %<%E ? %E : %E%>" msgstr "" -#: cp/call.cc:5173 cp/call.cc:5217 cp/call.cc:5227 +#: cp/call.cc:5188 cp/call.cc:5232 cp/call.cc:5242 #, gcc-internal-format msgid "%" msgstr "" -#: cp/call.cc:5176 +#: cp/call.cc:5191 #, gcc-internal-format msgid "% in %<%E%s%>" msgstr "" -#: cp/call.cc:5183 +#: cp/call.cc:5198 #, gcc-internal-format msgid "%" msgstr "" -#: cp/call.cc:5186 +#: cp/call.cc:5201 #, gcc-internal-format msgid "% in %<%E[%E]%>" msgstr "" -#: cp/call.cc:5194 +#: cp/call.cc:5209 #, fuzzy, gcc-internal-format #| msgid "%s\n" msgid "%qs" msgstr "%s\n" -#: cp/call.cc:5197 +#: cp/call.cc:5212 #, gcc-internal-format msgid "%qs in %<%s %E%>" msgstr "" -#: cp/call.cc:5203 +#: cp/call.cc:5218 #, gcc-internal-format msgid "%" msgstr "" -#: cp/call.cc:5206 +#: cp/call.cc:5221 #, gcc-internal-format msgid "% in %<%s%E%>" msgstr "" -#: cp/call.cc:5221 +#: cp/call.cc:5236 #, gcc-internal-format msgid "% in %<%E %s %E%>" msgstr "" -#: cp/call.cc:5230 +#: cp/call.cc:5245 #, gcc-internal-format msgid "% in %<%s%E%>" msgstr "" -#: cp/call.cc:5342 +#: cp/call.cc:5357 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids omitting the middle term of a % expression" msgstr "ISO C не дазваляе пусты ізыходны файл" -#: cp/call.cc:5409 +#: cp/call.cc:5424 #, gcc-internal-format msgid "inferred scalar type %qT is not an integer or floating-point type of the same size as %qT" msgstr "" -#: cp/call.cc:5426 cp/call.cc:5433 +#: cp/call.cc:5441 cp/call.cc:5448 msgid "conversion of scalar %qH to vector %qI involves truncation" msgstr "" -#: cp/call.cc:5489 +#: cp/call.cc:5504 #, gcc-internal-format msgid "incompatible vector types in conditional expression: %qT, %qT and %qT" msgstr "" -#: cp/call.cc:5569 +#: cp/call.cc:5584 #, gcc-internal-format msgid "second operand to the conditional operator is of type %, but the third operand is neither a throw-expression nor of type %" msgstr "" -#: cp/call.cc:5574 +#: cp/call.cc:5589 #, gcc-internal-format msgid "third operand to the conditional operator is of type %, but the second operand is neither a throw-expression nor of type %" msgstr "" -#: cp/call.cc:5623 cp/call.cc:5738 cp/call.cc:5909 +#: cp/call.cc:5638 cp/call.cc:5753 cp/call.cc:5924 #, gcc-internal-format msgid "operands to % have different types %qT and %qT" msgstr "" -#: cp/call.cc:5627 +#: cp/call.cc:5642 #, gcc-internal-format msgid " and each type can be converted to the other" msgstr "" -#: cp/call.cc:5814 +#: cp/call.cc:5829 msgid "implicit conversion from %qH to %qI to match other result of conditional" msgstr "" -#: cp/call.cc:5830 +#: cp/call.cc:5845 #, gcc-internal-format msgid "enumerated mismatch in conditional expression: %qT vs %qT" msgstr "" -#: cp/call.cc:5843 +#: cp/call.cc:5858 #, gcc-internal-format msgid "conditional expression between enumeration type %qT and floating-point type %qT is deprecated" msgstr "" -#: cp/call.cc:5848 +#: cp/call.cc:5863 #, gcc-internal-format msgid "conditional expression between floating-point type %qT and enumeration type %qT is deprecated" msgstr "" -#: cp/call.cc:5864 +#: cp/call.cc:5879 #, gcc-internal-format msgid "enumerated and non-enumerated type in conditional expression" msgstr "" -#: cp/call.cc:6621 +#: cp/call.cc:6636 #, gcc-internal-format msgid "no %<%D(int)%> declared for postfix %qs, trying prefix operator instead" msgstr "" -#: cp/call.cc:6623 +#: cp/call.cc:6638 #, gcc-internal-format msgid "no %<%D(int)%> declared for postfix %qs" msgstr "" -#: cp/call.cc:6703 +#: cp/call.cc:6718 #, gcc-internal-format msgid "in C++20 this comparison calls the current function recursively with reversed arguments" msgstr "" -#: cp/call.cc:6754 +#: cp/call.cc:6769 #, fuzzy, gcc-internal-format #| msgid "return type of `%s' is not `int'" msgid "return type of %qD is not %qs" msgstr "вяртаемы тып \"%s\" не \"int\"" -#: cp/call.cc:6756 +#: cp/call.cc:6771 #, gcc-internal-format msgid "used as rewritten candidate for comparison of %qT and %qT" msgstr "" -#: cp/call.cc:6827 +#: cp/call.cc:6842 #, gcc-internal-format msgid "comparison between %q#T and %q#T" msgstr "" -#: cp/call.cc:7020 +#: cp/call.cc:7035 #, gcc-internal-format msgid "no match for call to %<%T::operator[] (%A)%>" msgstr "" -#: cp/call.cc:7034 +#: cp/call.cc:7049 #, gcc-internal-format msgid "call of %<%T::operator[] (%A)%> is ambiguous" msgstr "" -#: cp/call.cc:7309 +#: cp/call.cc:7325 #, gcc-internal-format msgid "exception cleanup for this placement new selects non-placement %" msgstr "" -#: cp/call.cc:7312 +#: cp/call.cc:7328 #, gcc-internal-format msgid "%qD is a usual (non-placement) deallocation function in C++14 (or with %<-fsized-deallocation%>)" msgstr "" -#: cp/call.cc:7349 +#: cp/call.cc:7365 #, gcc-internal-format msgid "%qD is a usual (non-placement) deallocation function" msgstr "" -#: cp/call.cc:7543 +#: cp/call.cc:7559 #, gcc-internal-format msgid "no corresponding deallocation function for %qD" msgstr "" -#: cp/call.cc:7546 +#: cp/call.cc:7562 #, gcc-internal-format msgid "destroying delete %qD cannot be used to release the allocated memory if the initialization throws because the object is not constructed yet" msgstr "" -#: cp/call.cc:7555 +#: cp/call.cc:7571 #, fuzzy, gcc-internal-format #| msgid "impossible operator '%s'" msgid "no suitable % for %qT" msgstr "немагчымы апэратар '%s'" -#: cp/call.cc:7591 +#: cp/call.cc:7607 #, gcc-internal-format msgid "%q#D is private within this context" msgstr "" -#: cp/call.cc:7592 cp/decl.cc:8629 +#: cp/call.cc:7608 cp/decl.cc:8680 #, fuzzy, gcc-internal-format msgid "declared private here" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/call.cc:7597 +#: cp/call.cc:7613 #, fuzzy, gcc-internal-format msgid "%q#D is protected within this context" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/call.cc:7598 cp/decl.cc:8630 +#: cp/call.cc:7614 cp/decl.cc:8681 #, fuzzy, gcc-internal-format #| msgid "called from here" msgid "declared protected here" msgstr "выклікана адсюль" -#: cp/call.cc:7605 +#: cp/call.cc:7621 #, gcc-internal-format msgid "%q#D is inaccessible within this context" msgstr "" -#: cp/call.cc:7686 +#: cp/call.cc:7702 #, gcc-internal-format msgid "passing NULL to non-pointer argument %P of %qD" msgstr "" -#: cp/call.cc:7689 cp/call.cc:7708 cp/decl.cc:10308 cp/decl.cc:10316 +#: cp/call.cc:7705 cp/call.cc:7724 cp/decl.cc:10359 cp/decl.cc:10367 #: cp/typeck.cc:4438 #, fuzzy, gcc-internal-format #| msgid " from here" msgid " declared here" msgstr " адсюль" -#: cp/call.cc:7693 +#: cp/call.cc:7709 #, gcc-internal-format msgid "converting to non-pointer type %qT from NULL" msgstr "" -#: cp/call.cc:7705 +#: cp/call.cc:7721 #, gcc-internal-format msgid "converting % to pointer type for argument %P of %qD" msgstr "" -#: cp/call.cc:7712 +#: cp/call.cc:7728 #, gcc-internal-format msgid "converting % to pointer type %qT" msgstr "" -#: cp/call.cc:7779 +#: cp/call.cc:7795 #, gcc-internal-format msgid " initializing argument %P of %qD" msgstr "" -#: cp/call.cc:7800 +#: cp/call.cc:7816 #, gcc-internal-format msgid "conversions to arrays of unknown bound are only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/call.cc:7850 +#: cp/call.cc:7866 #, fuzzy, gcc-internal-format msgid "too many braces around initializer for %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/call.cc:7861 +#: cp/call.cc:7877 msgid "converting to %qH from %qI requires direct-initialization" msgstr "" -#: cp/call.cc:7870 +#: cp/call.cc:7886 msgid "invalid user-defined conversion from %qH to %qI" msgstr "" -#: cp/call.cc:7907 cp/cvt.cc:227 +#: cp/call.cc:7923 cp/cvt.cc:227 #, fuzzy #| msgid "converting from `%T' to `%T'" msgid "invalid conversion from %qH to %qI" msgstr "пераўтварэньне з `%T' у `%T'" -#: cp/call.cc:7949 cp/call.cc:7956 +#: cp/call.cc:7965 cp/call.cc:7972 #, gcc-internal-format msgid "converting to %qT from initializer list would use explicit constructor %qD" msgstr "" -#: cp/call.cc:7952 +#: cp/call.cc:7968 #, gcc-internal-format msgid "in C++11 and above a default constructor can be explicit" msgstr "" -#: cp/call.cc:8222 +#: cp/call.cc:8238 msgid "cannot bind rvalue reference of type %qH to lvalue of type %qI" msgstr "" -#: cp/call.cc:8231 +#: cp/call.cc:8247 msgid "cannot bind non-const lvalue reference of type %qH to a value of type %qI" msgstr "" -#: cp/call.cc:8236 +#: cp/call.cc:8252 msgid "cannot bind non-const lvalue reference of type %qH to an rvalue of type %qI" msgstr "" #. extype is volatile -#: cp/call.cc:8239 +#: cp/call.cc:8255 msgid "cannot bind lvalue reference of type %qH to an rvalue of type %qI" msgstr "" -#: cp/call.cc:8252 +#: cp/call.cc:8268 msgid "cannot bind reference of type %qH to %qI due to different array bounds" msgstr "" -#: cp/call.cc:8255 +#: cp/call.cc:8271 msgid "binding reference of type %qH to %qI discards qualifiers" msgstr "" -#: cp/call.cc:8294 +#: cp/call.cc:8310 #, fuzzy, gcc-internal-format msgid "cannot bind bit-field %qE to %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/call.cc:8297 cp/call.cc:8315 +#: cp/call.cc:8313 cp/call.cc:8331 #, gcc-internal-format msgid "cannot bind packed field %qE to %qT" msgstr "" -#: cp/call.cc:8300 +#: cp/call.cc:8316 #, fuzzy, gcc-internal-format msgid "cannot bind rvalue %qE to %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/call.cc:8495 +#: cp/call.cc:8511 msgid "implicit conversion from %qH to %qI when passing argument to function" msgstr "" -#: cp/call.cc:8522 cp/cvt.cc:1988 +#: cp/call.cc:8538 cp/cvt.cc:1988 #, gcc-internal-format msgid "scoped enum %qT passed through %<...%> as %qT before %<-fabi-version=6%>, %qT after" msgstr "" -#: cp/call.cc:8566 +#: cp/call.cc:8582 #, gcc-internal-format msgid "passing objects of non-trivially-copyable type %q#T through %<...%> is conditionally supported" msgstr "" -#: cp/call.cc:8602 +#: cp/call.cc:8618 #, gcc-internal-format msgid "cannot receive reference type %qT through %<...%>" msgstr "" -#: cp/call.cc:8612 +#: cp/call.cc:8628 #, gcc-internal-format msgid "receiving objects of non-trivially-copyable type %q#T through %<...%> is conditionally-supported" msgstr "" -#: cp/call.cc:8680 +#: cp/call.cc:8696 #, fuzzy, gcc-internal-format msgid "recursive evaluation of default argument for %q#D" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/call.cc:8689 +#: cp/call.cc:8705 #, gcc-internal-format msgid "call to %qD uses the default argument for parameter %P, which is not yet defined" msgstr "" -#: cp/call.cc:8789 +#: cp/call.cc:8805 #, gcc-internal-format msgid "argument of function call might be a candidate for a format attribute" msgstr "" -#: cp/call.cc:8851 +#: cp/call.cc:8867 #, gcc-internal-format msgid "use of multiversioned function without a default" msgstr "" -#: cp/call.cc:9454 +#: cp/call.cc:9470 #, gcc-internal-format msgid "passing %qT as % argument discards qualifiers" msgstr "" -#: cp/call.cc:9457 cp/call.cc:12148 +#: cp/call.cc:9473 cp/call.cc:12163 #, gcc-internal-format msgid " in call to %qD" msgstr "" -#: cp/call.cc:9482 +#: cp/call.cc:9498 #, gcc-internal-format msgid "%qT is not an accessible base of %qT" msgstr "" -#: cp/call.cc:9679 +#: cp/call.cc:9695 #, gcc-internal-format msgid "passing arguments to ellipsis of inherited constructor %qD" msgstr "" -#: cp/call.cc:9814 +#: cp/call.cc:9830 #, gcc-internal-format msgid "assignment from temporary % does not extend the lifetime of the underlying array" msgstr "" -#: cp/call.cc:10210 +#: cp/call.cc:10226 #, gcc-internal-format msgid "%qD writing to an object of type %#qT with no trivial copy-assignment" msgstr "" -#: cp/call.cc:10213 +#: cp/call.cc:10229 #, gcc-internal-format msgid "%qD writing to an object of non-trivial type %#qT%s" msgstr "" -#: cp/call.cc:10218 +#: cp/call.cc:10234 #, gcc-internal-format msgid "%qD writing to an object of type %#qT with %qs member %qD" msgstr "" -#: cp/call.cc:10223 +#: cp/call.cc:10239 #, gcc-internal-format msgid "%qD writing to an object of type %#qT containing a pointer to data member%s" msgstr "" -#: cp/call.cc:10238 +#: cp/call.cc:10254 #, gcc-internal-format msgid "; use assignment or value-initialization instead" msgstr "" -#: cp/call.cc:10240 +#: cp/call.cc:10256 #, gcc-internal-format msgid "; use assignment instead" msgstr "" -#: cp/call.cc:10242 +#: cp/call.cc:10258 #, gcc-internal-format msgid "; use value-initialization instead" msgstr "" -#: cp/call.cc:10245 +#: cp/call.cc:10261 #, gcc-internal-format msgid "%qD clearing an object of type %#qT with no trivial copy-assignment%s" msgstr "" -#: cp/call.cc:10248 +#: cp/call.cc:10264 #, gcc-internal-format msgid "%qD clearing an object of non-trivial type %#qT%s" msgstr "" -#: cp/call.cc:10250 +#: cp/call.cc:10266 #, gcc-internal-format msgid "%qD clearing an object of type %#qT containing a pointer-to-member%s" msgstr "" -#: cp/call.cc:10271 +#: cp/call.cc:10287 #, gcc-internal-format msgid "; use copy-assignment or copy-initialization instead" msgstr "" -#: cp/call.cc:10273 +#: cp/call.cc:10289 #, gcc-internal-format msgid "; use copy-assignment instead" msgstr "" -#: cp/call.cc:10275 +#: cp/call.cc:10291 #, gcc-internal-format msgid "; use copy-initialization instead" msgstr "" -#: cp/call.cc:10278 +#: cp/call.cc:10294 #, gcc-internal-format msgid "%qD writing to an object of type %#qT with no trivial copy-assignment%s" msgstr "" -#: cp/call.cc:10281 +#: cp/call.cc:10297 #, gcc-internal-format msgid "%qD writing to an object of non-trivially copyable type %#qT%s" msgstr "" -#: cp/call.cc:10284 +#: cp/call.cc:10300 #, gcc-internal-format msgid "%qD writing to an object with a deleted copy constructor" msgstr "" -#: cp/call.cc:10295 +#: cp/call.cc:10311 #, gcc-internal-format msgid "%qD copying an object of non-trivial type %#qT from an array of %#qT" msgstr "" -#: cp/call.cc:10307 +#: cp/call.cc:10323 #, gcc-internal-format msgid "%qD copying an object of type %#qT with %qs member %qD from an array of %#qT; use assignment or copy-initialization instead" msgstr "" -#: cp/call.cc:10324 +#: cp/call.cc:10342 #, gcc-internal-format msgid "%qD writing to an object of a non-trivial type %#qT leaves %wu bytes unchanged" msgstr "" -#: cp/call.cc:10327 +#: cp/call.cc:10345 #, gcc-internal-format msgid "%qD writing to an object of a non-trivial type %#qT leaves %wu byte unchanged" msgstr "" -#: cp/call.cc:10337 +#: cp/call.cc:10355 #, gcc-internal-format msgid "%qD moving an object of non-trivially copyable type %#qT; use % and % instead" msgstr "" -#: cp/call.cc:10340 +#: cp/call.cc:10358 #, gcc-internal-format msgid "%qD moving an object of type %#qT with deleted copy constructor; use % and % instead" msgstr "" -#: cp/call.cc:10343 +#: cp/call.cc:10361 #, gcc-internal-format msgid "%qD moving an object of type %#qT with deleted destructor" msgstr "" -#: cp/call.cc:10352 +#: cp/call.cc:10370 #, gcc-internal-format msgid "%qD moving an object of non-trivial type %#qT and size %E into a region of size %E" msgstr "" -#: cp/call.cc:10374 +#: cp/call.cc:10392 #, gcc-internal-format msgid "%#qT declared here" msgstr "" -#: cp/call.cc:10428 +#: cp/call.cc:10446 #, gcc-internal-format msgid "argument %u in call to function %qE has pointer to a non-trivially-copyable type (%qT)" msgstr "" -#: cp/call.cc:10495 +#: cp/call.cc:10513 #, gcc-internal-format msgid "constructor delegates to itself" msgstr "" -#: cp/call.cc:10770 cp/typeck.cc:9884 +#: cp/call.cc:10788 cp/typeck.cc:9890 msgid "cannot convert %qH to %qI" msgstr "" -#: cp/call.cc:10792 +#: cp/call.cc:10810 #, gcc-internal-format msgid "no matching function for call to %<%T::operator %T(%A)%#V%>" msgstr "" -#: cp/call.cc:10824 +#: cp/call.cc:10842 #, gcc-internal-format msgid "no matching function for call to %<%T::%s%E(%A)%#V%>" msgstr "" -#: cp/call.cc:10873 +#: cp/call.cc:10891 #, gcc-internal-format msgid "call to non-function %qD" msgstr "" -#: cp/call.cc:10911 cp/pt.cc:16500 cp/typeck.cc:3339 +#: cp/call.cc:10929 cp/pt.cc:16618 cp/typeck.cc:3339 #, gcc-internal-format msgid "cannot call constructor %<%T::%D%> directly" msgstr "" -#: cp/call.cc:10913 +#: cp/call.cc:10931 #, gcc-internal-format msgid "for a function-style cast, remove the redundant %<::%D%>" msgstr "" -#: cp/call.cc:11105 +#: cp/call.cc:11123 #, gcc-internal-format msgid "no matching function for call to %<%s(%A)%>" msgstr "" -#: cp/call.cc:11108 +#: cp/call.cc:11126 #, gcc-internal-format msgid "call of overloaded %<%s(%A)%> is ambiguous" msgstr "" -#: cp/call.cc:11131 +#: cp/call.cc:11149 #, gcc-internal-format msgid "pure virtual %q#D called from non-static data member initializer" msgstr "" -#: cp/call.cc:11136 +#: cp/call.cc:11154 #, gcc-internal-format msgid "pure virtual %q#D called from constructor" msgstr "" -#: cp/call.cc:11137 +#: cp/call.cc:11155 #, gcc-internal-format msgid "pure virtual %q#D called from destructor" msgstr "" -#: cp/call.cc:11160 +#: cp/call.cc:11178 #, gcc-internal-format msgid "cannot call member function %qD without object" msgstr "" -#: cp/call.cc:12146 +#: cp/call.cc:12161 #, gcc-internal-format msgid "passing %qT chooses %qT over %qT" msgstr "" -#: cp/call.cc:12215 +#: cp/call.cc:12230 #, gcc-internal-format msgid "choosing %qD over %qD" msgstr "" -#: cp/call.cc:12216 +#: cp/call.cc:12231 #, fuzzy #| msgid "converting from `%T' to `%T'" msgid " for conversion from %qH to %qI" msgstr "пераўтварэньне з `%T' у `%T'" -#: cp/call.cc:12219 +#: cp/call.cc:12234 #, gcc-internal-format msgid " because conversion sequence for the argument is better" msgstr "" -#: cp/call.cc:12469 +#: cp/call.cc:12484 #, gcc-internal-format msgid "default argument mismatch in overload resolution" msgstr "" -#: cp/call.cc:12473 +#: cp/call.cc:12488 #, gcc-internal-format msgid " candidate 1: %q#F" msgstr "" -#: cp/call.cc:12475 +#: cp/call.cc:12490 #, gcc-internal-format msgid " candidate 2: %q#F" msgstr "" -#: cp/call.cc:12521 +#: cp/call.cc:12536 #, gcc-internal-format msgid "ISO C++ says that these are ambiguous, even though the worst conversion for the first is better than the worst conversion for the second:" msgstr "" -#: cp/call.cc:12922 +#: cp/call.cc:12937 #, gcc-internal-format msgid "a temporary bound to %qD only persists until the constructor exits" msgstr "" -#: cp/call.cc:13077 +#: cp/call.cc:13092 msgid "invalid initialization of non-const reference of type %qH from an rvalue of type %qI" msgstr "" -#: cp/call.cc:13081 +#: cp/call.cc:13096 msgid "invalid initialization of reference of type %qH from expression of type %qI" msgstr "" @@ -49307,8 +49326,8 @@ msgstr "" msgid "%q#D cannot be overloaded with %q#D" msgstr "" -#: cp/class.cc:1233 cp/decl.cc:1798 cp/decl.cc:1810 cp/decl.cc:1835 -#: cp/decl.cc:1858 cp/name-lookup.cc:2738 cp/name-lookup.cc:3052 +#: cp/class.cc:1233 cp/decl.cc:1801 cp/decl.cc:1813 cp/decl.cc:1838 +#: cp/decl.cc:1861 cp/name-lookup.cc:2720 cp/name-lookup.cc:3034 #, fuzzy, gcc-internal-format #| msgid "previous declaration `%D'" msgid "previous declaration %q#D" @@ -49722,7 +49741,7 @@ msgstr "" msgid "next member %q#D declared here" msgstr "" -#: cp/class.cc:7458 cp/decl.cc:16815 cp/parser.cc:26622 +#: cp/class.cc:7458 cp/decl.cc:16869 cp/parser.cc:26634 #, fuzzy, gcc-internal-format #| msgid "previous definition of `%#T'" msgid "redefinition of %q#T" @@ -49753,63 +49772,63 @@ msgstr "" msgid "type transparent %q#T cannot be made transparent because the type of the first field has a different ABI from the class overall" msgstr "" -#: cp/class.cc:7798 +#: cp/class.cc:7795 #, gcc-internal-format msgid "definition of %qD does not match %<#include %>" msgstr "" -#: cp/class.cc:7809 +#: cp/class.cc:7806 #, gcc-internal-format msgid "trying to finish struct, but kicked out due to previous parse errors" msgstr "" -#: cp/class.cc:8316 +#: cp/class.cc:8313 #, fuzzy, gcc-internal-format #| msgid "language %s not recognized" msgid "language string %<\"%E\"%> not recognized" msgstr "мова %s не распазнана" -#: cp/class.cc:8406 +#: cp/class.cc:8403 #, gcc-internal-format msgid "cannot resolve overloaded function %qD based on conversion to type %qT" msgstr "" -#: cp/class.cc:8564 +#: cp/class.cc:8561 #, gcc-internal-format msgid "no matches converting function %qD to type %q#T" msgstr "" -#: cp/class.cc:8591 +#: cp/class.cc:8588 #, gcc-internal-format msgid "converting overloaded function %qD to type %q#T is ambiguous" msgstr "" -#: cp/class.cc:8618 +#: cp/class.cc:8615 #, fuzzy, gcc-internal-format msgid "assuming pointer to member %qD" msgstr "прапушчан ініцыялізатар" -#: cp/class.cc:8621 +#: cp/class.cc:8618 #, gcc-internal-format msgid "(a pointer to member can only be formed with %<&%E%>)" msgstr "" -#: cp/class.cc:8697 cp/class.cc:8739 +#: cp/class.cc:8694 cp/class.cc:8736 #, gcc-internal-format msgid "not enough type information" msgstr "" -#: cp/class.cc:8717 +#: cp/class.cc:8714 #, gcc-internal-format msgid "cannot convert %qE from type %qT to type %qT" msgstr "" -#: cp/class.cc:8991 +#: cp/class.cc:8988 #, gcc-internal-format msgid "declaration of %q#D changes meaning of %qD" msgstr "" -#: cp/class.cc:8994 +#: cp/class.cc:8991 #, gcc-internal-format msgid "%qD declared here as %q#D" msgstr "" @@ -49844,7 +49863,7 @@ msgstr "" msgid "lambdas are implicitly % only in C++17 and later" msgstr "" -#: cp/constexpr.cc:232 cp/decl.cc:13944 +#: cp/constexpr.cc:232 cp/decl.cc:14000 #, gcc-internal-format msgid "% destructors only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" @@ -49879,598 +49898,598 @@ msgstr "" msgid "body of % function %qD not a return-statement" msgstr "" -#: cp/constexpr.cc:1028 +#: cp/constexpr.cc:1029 #, gcc-internal-format msgid "%qD is not usable as a % function because:" msgstr "" -#: cp/constexpr.cc:1527 cp/constexpr.cc:2895 +#: cp/constexpr.cc:1528 cp/constexpr.cc:2897 #, gcc-internal-format msgid "% call flows off the end of the function" msgstr "" -#: cp/constexpr.cc:1532 cp/constexpr.cc:1542 cp/constexpr.cc:3106 +#: cp/constexpr.cc:1533 cp/constexpr.cc:1543 cp/constexpr.cc:3114 #, fuzzy, gcc-internal-format msgid "%q+E is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:1851 cp/constexpr.cc:8594 +#: cp/constexpr.cc:1852 cp/constexpr.cc:8610 #, fuzzy, gcc-internal-format #| msgid "can't initialize friend function `%s'" msgid "call to internal function %qE" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/constexpr.cc:1905 +#: cp/constexpr.cc:1906 #, fuzzy, gcc-internal-format msgid "modifying a const object %qE is not allowed in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:1907 +#: cp/constexpr.cc:1908 #, gcc-internal-format msgid "originally declared % here" msgstr "" -#: cp/constexpr.cc:2125 cp/constexpr.cc:2180 cp/constexpr.cc:2212 -#: cp/constexpr.cc:2233 +#: cp/constexpr.cc:2126 cp/constexpr.cc:2181 cp/constexpr.cc:2213 +#: cp/constexpr.cc:2234 #, gcc-internal-format msgid "reference % failed" msgstr "" -#: cp/constexpr.cc:2126 +#: cp/constexpr.cc:2127 #, gcc-internal-format msgid "dynamic type %qT of its operand does not have a base class of type %qT" msgstr "" -#: cp/constexpr.cc:2150 +#: cp/constexpr.cc:2151 #, fuzzy, gcc-internal-format #| msgid "parameter `%s' is initialized" msgid "virtual table pointer is used uninitialized" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/constexpr.cc:2181 cp/constexpr.cc:2213 +#: cp/constexpr.cc:2182 cp/constexpr.cc:2214 #, gcc-internal-format msgid "static type %qT of its operand is a non-public base class of dynamic type %qT" msgstr "" -#: cp/constexpr.cc:2235 +#: cp/constexpr.cc:2236 #, gcc-internal-format msgid "%qT is an ambiguous base class of dynamic type %qT of its operand" msgstr "" -#: cp/constexpr.cc:2238 +#: cp/constexpr.cc:2239 #, gcc-internal-format msgid "dynamic type %qT of its operand does not have an unambiguous public base class %qT" msgstr "" -#: cp/constexpr.cc:2315 cp/constexpr.cc:2590 cp/constexpr.cc:8626 +#: cp/constexpr.cc:2316 cp/constexpr.cc:2591 cp/constexpr.cc:8642 #, gcc-internal-format msgid "call to non-% function %qD" msgstr "" #. virtual_offset is only set for virtual bases, which make the #. class non-literal, so we don't need to handle it here. -#: cp/constexpr.cc:2321 +#: cp/constexpr.cc:2322 #, gcc-internal-format msgid "calling constexpr member function %qD through virtual base subobject" msgstr "" -#: cp/constexpr.cc:2438 +#: cp/constexpr.cc:2439 #, gcc-internal-format msgid "expression %qE does not designate a % function" msgstr "" -#: cp/constexpr.cc:2511 +#: cp/constexpr.cc:2512 #, gcc-internal-format msgid "array deallocation of object allocated with non-array allocation" msgstr "" -#: cp/constexpr.cc:2515 cp/constexpr.cc:2537 +#: cp/constexpr.cc:2516 cp/constexpr.cc:2538 #, gcc-internal-format msgid "allocation performed here" msgstr "" -#: cp/constexpr.cc:2533 +#: cp/constexpr.cc:2534 #, gcc-internal-format msgid "non-array deallocation of object allocated with array allocation" msgstr "" -#: cp/constexpr.cc:2550 +#: cp/constexpr.cc:2551 #, gcc-internal-format msgid "deallocation of already deallocated storage" msgstr "" -#: cp/constexpr.cc:2557 +#: cp/constexpr.cc:2558 #, gcc-internal-format msgid "deallocation of storage that was not previously allocated" msgstr "" -#: cp/constexpr.cc:2686 +#: cp/constexpr.cc:2687 #, gcc-internal-format msgid "%qD called in a constant expression before its definition is complete" msgstr "" -#: cp/constexpr.cc:2693 +#: cp/constexpr.cc:2694 #, gcc-internal-format msgid "%qD called in a constant expression" msgstr "" -#: cp/constexpr.cc:2697 +#: cp/constexpr.cc:2698 #, fuzzy, gcc-internal-format msgid "%qD used before its definition" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/constexpr.cc:2769 +#: cp/constexpr.cc:2770 #, gcc-internal-format msgid "call has circular dependency" msgstr "" -#: cp/constexpr.cc:2780 +#: cp/constexpr.cc:2781 #, gcc-internal-format msgid "% evaluation depth exceeds maximum of %d (use %<-fconstexpr-depth=%> to increase the maximum)" msgstr "" -#: cp/constexpr.cc:3146 +#: cp/constexpr.cc:3154 #, gcc-internal-format msgid "right operand of shift expression %q+E is negative" msgstr "" -#: cp/constexpr.cc:3153 +#: cp/constexpr.cc:3161 #, gcc-internal-format msgid "right operand of shift expression %q+E is greater than or equal to the precision %wu of the left operand" msgstr "" -#: cp/constexpr.cc:3176 +#: cp/constexpr.cc:3184 #, gcc-internal-format msgid "left operand of shift expression %q+E is negative" msgstr "" -#: cp/constexpr.cc:3195 +#: cp/constexpr.cc:3203 #, gcc-internal-format msgid "shift expression %q+E overflows" msgstr "" -#: cp/constexpr.cc:3394 +#: cp/constexpr.cc:3402 #, gcc-internal-format msgid "arithmetic involving a null pointer in %qE" msgstr "" -#: cp/constexpr.cc:3809 +#: cp/constexpr.cc:3817 #, gcc-internal-format msgid "array subscript value %qE is outside the bounds of array %qD of type %qT" msgstr "" -#: cp/constexpr.cc:3812 +#: cp/constexpr.cc:3820 #, gcc-internal-format msgid "nonzero array subscript %qE is used with array %qD of type %qT with unknown bounds" msgstr "" -#: cp/constexpr.cc:3817 +#: cp/constexpr.cc:3825 #, gcc-internal-format msgid "array subscript value %qE is outside the bounds of array type %qT" msgstr "" -#: cp/constexpr.cc:3820 +#: cp/constexpr.cc:3828 #, gcc-internal-format msgid "nonzero array subscript %qE is used with array of type %qT with unknown bounds" msgstr "" -#: cp/constexpr.cc:4003 +#: cp/constexpr.cc:4011 #, fuzzy, gcc-internal-format msgid "accessing uninitialized array element" msgstr "прапушчан ініцыялізатар" -#: cp/constexpr.cc:4060 +#: cp/constexpr.cc:4068 #, gcc-internal-format msgid "dereferencing a null pointer in %qE" msgstr "" -#: cp/constexpr.cc:4077 cp/constexpr.cc:4176 cp/constexpr.cc:6606 -#: cp/constexpr.cc:6705 cp/constexpr.cc:8546 +#: cp/constexpr.cc:4085 cp/constexpr.cc:4184 cp/constexpr.cc:4196 +#: cp/constexpr.cc:6624 cp/constexpr.cc:6723 cp/constexpr.cc:8562 #, fuzzy, gcc-internal-format msgid "%qE is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:4083 +#: cp/constexpr.cc:4091 #, fuzzy, gcc-internal-format msgid "mutable %qD is not usable in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:4114 cp/constexpr.cc:4136 +#: cp/constexpr.cc:4122 cp/constexpr.cc:4144 #, fuzzy, gcc-internal-format msgid "accessing uninitialized member %qD" msgstr "прапушчан ініцыялізатар" -#: cp/constexpr.cc:4116 +#: cp/constexpr.cc:4124 #, gcc-internal-format msgid "accessing %qD member instead of initialized %qD member in constant expression" msgstr "" -#: cp/constexpr.cc:4247 +#: cp/constexpr.cc:4262 #, gcc-internal-format msgid "%qs is not a constant expression because %qT is a union type" msgstr "" -#: cp/constexpr.cc:4250 +#: cp/constexpr.cc:4265 #, gcc-internal-format msgid "%qs is not a constant expression because %qT contains a union type" msgstr "" -#: cp/constexpr.cc:4261 +#: cp/constexpr.cc:4276 #, gcc-internal-format msgid "%qs is not a constant expression because %qT is a pointer type" msgstr "" -#: cp/constexpr.cc:4264 +#: cp/constexpr.cc:4279 #, gcc-internal-format msgid "%qs is not a constant expression because %qT contains a pointer type" msgstr "" -#: cp/constexpr.cc:4275 +#: cp/constexpr.cc:4290 #, gcc-internal-format msgid "%qs is not a constant expression because %qT is a reference type" msgstr "" -#: cp/constexpr.cc:4278 +#: cp/constexpr.cc:4293 #, gcc-internal-format msgid "%qs is not a constant expression because %qT contains a reference type" msgstr "" -#: cp/constexpr.cc:4289 +#: cp/constexpr.cc:4304 #, gcc-internal-format msgid "%qs is not a constant expression because %qT is a pointer to member type" msgstr "" -#: cp/constexpr.cc:4293 +#: cp/constexpr.cc:4308 #, gcc-internal-format msgid "%qs is not a constant expression because %qT contains a pointer to member type" msgstr "" -#: cp/constexpr.cc:4304 +#: cp/constexpr.cc:4319 #, gcc-internal-format msgid "%qs is not a constant expression because %qT is volatile" msgstr "" -#: cp/constexpr.cc:4307 +#: cp/constexpr.cc:4322 #, gcc-internal-format msgid "%qs is not a constant expression because %qT contains a volatile subobject" msgstr "" -#: cp/constexpr.cc:4460 +#: cp/constexpr.cc:4475 #, gcc-internal-format msgid "%qs cannot be constant evaluated on the target" msgstr "" -#: cp/constexpr.cc:4469 cp/constexpr.cc:4479 +#: cp/constexpr.cc:4484 cp/constexpr.cc:4494 #, gcc-internal-format msgid "%qs cannot be constant evaluated because the type is too large" msgstr "" -#: cp/constexpr.cc:4499 +#: cp/constexpr.cc:4514 #, gcc-internal-format msgid "%qs cannot be constant evaluated because the argument cannot be encoded" msgstr "" -#: cp/constexpr.cc:4538 +#: cp/constexpr.cc:4553 #, gcc-internal-format msgid "%qs accessing uninitialized byte at offset %d" msgstr "" -#: cp/constexpr.cc:4550 +#: cp/constexpr.cc:4565 #, gcc-internal-format msgid "%qs cannot be constant evaluated because the argument cannot be interpreted" msgstr "" -#: cp/constexpr.cc:5341 cp/constexpr.cc:7302 +#: cp/constexpr.cc:5353 cp/constexpr.cc:7318 #, gcc-internal-format msgid "dereferencing a null pointer" msgstr "" -#: cp/constexpr.cc:5361 +#: cp/constexpr.cc:5373 #, gcc-internal-format msgid "accessing value of %qE through a %qT glvalue in a constant expression" msgstr "" -#: cp/constexpr.cc:5406 +#: cp/constexpr.cc:5418 #, fuzzy, gcc-internal-format msgid "the content of uninitialized storage is not usable in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:5408 cp/constexpr.cc:5415 +#: cp/constexpr.cc:5420 cp/constexpr.cc:5427 #, fuzzy, gcc-internal-format #| msgid "called from here" msgid "allocated here" msgstr "выклікана адсюль" -#: cp/constexpr.cc:5413 +#: cp/constexpr.cc:5425 #, fuzzy, gcc-internal-format msgid "use of allocated storage after deallocation in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:5418 +#: cp/constexpr.cc:5430 #, fuzzy, gcc-internal-format msgid "the value of %qD is not usable in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:5425 +#: cp/constexpr.cc:5437 #, fuzzy, gcc-internal-format #| msgid "invalid initializer" msgid "%qD used in its own initializer" msgstr "нерэчаісны ініцыялізатар" -#: cp/constexpr.cc:5430 +#: cp/constexpr.cc:5442 #, fuzzy, gcc-internal-format #| msgid "`%D' is not a function," msgid "%q#D is not const" msgstr "`%D' - гэта ня функцыя," -#: cp/constexpr.cc:5433 +#: cp/constexpr.cc:5445 #, gcc-internal-format msgid "%q#D is volatile" msgstr "" -#: cp/constexpr.cc:5438 cp/constexpr.cc:5445 +#: cp/constexpr.cc:5450 cp/constexpr.cc:5457 #, fuzzy, gcc-internal-format msgid "%qD was not initialized with a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:5451 +#: cp/constexpr.cc:5463 #, fuzzy, gcc-internal-format msgid "%qD was not declared %" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/constexpr.cc:5454 +#: cp/constexpr.cc:5466 #, gcc-internal-format msgid "%qD does not have integral or enumeration type" msgstr "" -#: cp/constexpr.cc:5709 +#: cp/constexpr.cc:5721 #, fuzzy, gcc-internal-format msgid "modification of %qE is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:5778 +#: cp/constexpr.cc:5790 #, gcc-internal-format msgid "change of the active member of a union from %qD to %qD" msgstr "" -#: cp/constexpr.cc:5791 +#: cp/constexpr.cc:5803 #, gcc-internal-format msgid "change of the active member of a union from %qD to %qD during initialization" msgstr "" -#: cp/constexpr.cc:6185 cp/constexpr.cc:7581 +#: cp/constexpr.cc:6203 cp/constexpr.cc:7597 #, fuzzy, gcc-internal-format msgid "statement is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:6289 +#: cp/constexpr.cc:6307 #, gcc-internal-format msgid "% loop iteration count exceeds limit of %d (use %<-fconstexpr-loop-limit=%> to increase the limit)" msgstr "" -#: cp/constexpr.cc:6389 +#: cp/constexpr.cc:6407 #, fuzzy, gcc-internal-format msgid "inline assembly is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:6390 +#: cp/constexpr.cc:6408 #, gcc-internal-format msgid "only unevaluated inline assembly is allowed in a % function in C++20" msgstr "" -#: cp/constexpr.cc:6408 +#: cp/constexpr.cc:6426 #, fuzzy, gcc-internal-format #| msgid "invalid use of `%D'" msgid "use of %qD" msgstr "нерэчаіснае выкарыстаньне `%D'" -#: cp/constexpr.cc:6412 +#: cp/constexpr.cc:6430 #, gcc-internal-format msgid "its value can vary between compiler versions or with different %<-mtune%> or %<-mcpu%> flags" msgstr "" -#: cp/constexpr.cc:6414 +#: cp/constexpr.cc:6432 #, gcc-internal-format msgid "if this use is part of a public ABI, change it to instead use a constant variable you define" msgstr "" -#: cp/constexpr.cc:6416 +#: cp/constexpr.cc:6434 #, gcc-internal-format, gfc-internal-format msgid "the default value for the current CPU tuning is %d bytes" msgstr "" -#: cp/constexpr.cc:6418 +#: cp/constexpr.cc:6436 #, gcc-internal-format msgid "you can stabilize this value with %<--param hardware_destructive_interference_size=%d%>, or disable this warning with %<-Wno-interference-size%>" msgstr "" -#: cp/constexpr.cc:6568 +#: cp/constexpr.cc:6586 #, fuzzy, gcc-internal-format msgid "value %qE of type %qT is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:6581 +#: cp/constexpr.cc:6599 #, gcc-internal-format msgid "% evaluation operation count exceeds limit of %wd (use %<-fconstexpr-ops-limit=%> to increase the limit)" msgstr "" -#: cp/constexpr.cc:6734 +#: cp/constexpr.cc:6752 #, gcc-internal-format msgid "control passes through definition of %qD with thread storage duration" msgstr "" -#: cp/constexpr.cc:6737 +#: cp/constexpr.cc:6755 #, gcc-internal-format msgid "control passes through definition of %qD with static storage duration" msgstr "" -#: cp/constexpr.cc:6785 cp/constexpr.cc:9226 +#: cp/constexpr.cc:6803 cp/constexpr.cc:9242 #, fuzzy, gcc-internal-format msgid "temporary of non-literal type %qT in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:7221 cp/constexpr.cc:8751 +#: cp/constexpr.cc:7237 cp/constexpr.cc:8767 #, fuzzy, gcc-internal-format msgid "% is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:7249 +#: cp/constexpr.cc:7265 #, gcc-internal-format msgid "conversion from pointer type %qT to arithmetic type %qT in a constant expression" msgstr "" -#: cp/constexpr.cc:7277 +#: cp/constexpr.cc:7293 #, gcc-internal-format msgid "cast from %qT is not allowed" msgstr "" -#: cp/constexpr.cc:7313 +#: cp/constexpr.cc:7329 #, gcc-internal-format msgid "%(%E)%> is not a constant expression" msgstr "" -#: cp/constexpr.cc:7431 cp/constexpr.cc:9045 cp/constexpr.cc:9446 +#: cp/constexpr.cc:7447 cp/constexpr.cc:9061 cp/constexpr.cc:9462 #, fuzzy, gcc-internal-format msgid "expression %qE is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:7478 cp/constexpr.cc:9485 +#: cp/constexpr.cc:7494 cp/constexpr.cc:9501 #, fuzzy, gcc-internal-format msgid "% is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:7534 +#: cp/constexpr.cc:7550 #, gcc-internal-format msgid "unexpected template-id %qE" msgstr "" -#: cp/constexpr.cc:7540 cp/constraint.cc:178 cp/constraint.cc:714 +#: cp/constexpr.cc:7556 cp/constraint.cc:178 cp/constraint.cc:714 #, gcc-internal-format msgid "function concept must be called" msgstr "" -#: cp/constexpr.cc:7565 +#: cp/constexpr.cc:7581 #, fuzzy, gcc-internal-format msgid "address of a call to %qs is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:7584 +#: cp/constexpr.cc:7600 #, gcc-internal-format msgid "unexpected expression %qE of kind %s" msgstr "" -#: cp/constexpr.cc:7842 +#: cp/constexpr.cc:7858 #, gcc-internal-format msgid "%qE is not a constant expression because it refers to mutable subobjects of %qT" msgstr "" -#: cp/constexpr.cc:7850 +#: cp/constexpr.cc:7866 #, gcc-internal-format msgid "%qE is not a constant expression because it refers to an incompletely initialized variable" msgstr "" -#: cp/constexpr.cc:7865 +#: cp/constexpr.cc:7881 #, gcc-internal-format msgid "%qE is not a constant expression because it refers to a result of %" msgstr "" -#: cp/constexpr.cc:7876 +#: cp/constexpr.cc:7892 #, gcc-internal-format msgid "%qE is not a constant expression because allocated storage has not been deallocated" msgstr "" -#: cp/constexpr.cc:7894 +#: cp/constexpr.cc:7910 #, gcc-internal-format msgid "immediate evaluation returns address of immediate function %qD" msgstr "" -#: cp/constexpr.cc:8486 +#: cp/constexpr.cc:8502 #, gcc-internal-format msgid "lvalue-to-rvalue conversion of a volatile lvalue %qE with type %qT" msgstr "" -#: cp/constexpr.cc:8716 +#: cp/constexpr.cc:8732 #, fuzzy, gcc-internal-format msgid "lambda capture of %qE is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:8719 +#: cp/constexpr.cc:8735 #, gcc-internal-format msgid "because it is used as a glvalue" msgstr "" -#: cp/constexpr.cc:8771 +#: cp/constexpr.cc:8787 #, gcc-internal-format msgid "% from integer to pointer" msgstr "" -#: cp/constexpr.cc:8804 +#: cp/constexpr.cc:8820 #, gcc-internal-format msgid "address-of an object %qE with thread local or automatic storage is not a constant expression" msgstr "" -#: cp/constexpr.cc:8843 +#: cp/constexpr.cc:8859 #, fuzzy, gcc-internal-format msgid "use of % in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:8991 +#: cp/constexpr.cc:9007 #, gcc-internal-format msgid "lambda-expression is not a constant expression before C++17" msgstr "" -#: cp/constexpr.cc:9059 +#: cp/constexpr.cc:9075 #, fuzzy, gcc-internal-format #| msgid "virtual functions cannot be friends" msgid "virtual functions cannot be % before C++20" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/constexpr.cc:9074 +#: cp/constexpr.cc:9090 #, gcc-internal-format msgid "% is not a constant expression because %qE is of polymorphic type" msgstr "" -#: cp/constexpr.cc:9138 +#: cp/constexpr.cc:9154 #, fuzzy, gcc-internal-format msgid "cast to non-integral type %qT in a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:9195 +#: cp/constexpr.cc:9211 #, gcc-internal-format msgid "%qD defined % in % context" msgstr "" -#: cp/constexpr.cc:9202 +#: cp/constexpr.cc:9218 #, gcc-internal-format msgid "%qD defined % in % context" msgstr "" -#: cp/constexpr.cc:9275 +#: cp/constexpr.cc:9291 #, fuzzy, gcc-internal-format msgid "division by zero is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:9376 +#: cp/constexpr.cc:9392 #, fuzzy, gcc-internal-format msgid "% is not a constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/constexpr.cc:9444 +#: cp/constexpr.cc:9460 #, gcc-internal-format msgid "neither branch of % is a constant expression" msgstr "" -#: cp/constexpr.cc:9455 +#: cp/constexpr.cc:9471 #, fuzzy, gcc-internal-format msgid "non-constant array initialization" msgstr "нерэчаісны ініцыялізатар" -#: cp/constexpr.cc:9494 +#: cp/constexpr.cc:9510 #, gcc-internal-format msgid "label definition in % function only available with %<-std=c++2b%> or %<-std=gnu++2b%>" msgstr "" -#: cp/constexpr.cc:9524 +#: cp/constexpr.cc:9540 #, gcc-internal-format, gfc-internal-format msgid "unexpected AST of kind %s" msgstr "" @@ -50625,205 +50644,205 @@ msgstr "" msgid "the operand %qE is unsatisfied because" msgstr "" -#: cp/constraint.cc:3439 +#: cp/constraint.cc:3449 #, fuzzy, gcc-internal-format msgid "definition of concept %qD is empty" msgstr "перанакіраванне stdout: %s" -#: cp/constraint.cc:3442 +#: cp/constraint.cc:3452 #, gcc-internal-format msgid "definition of concept %qD has multiple statements" msgstr "" -#: cp/constraint.cc:3588 +#: cp/constraint.cc:3598 #, gcc-internal-format msgid " %qT is not % copy assignable" msgstr "" -#: cp/constraint.cc:3591 cp/constraint.cc:3686 +#: cp/constraint.cc:3601 cp/constraint.cc:3696 #, gcc-internal-format msgid " %qT is not % default constructible" msgstr "" -#: cp/constraint.cc:3594 +#: cp/constraint.cc:3604 #, gcc-internal-format msgid " %qT is not % copy constructible" msgstr "" -#: cp/constraint.cc:3597 +#: cp/constraint.cc:3607 #, gcc-internal-format msgid " %qT is not trivially copy assignable" msgstr "" -#: cp/constraint.cc:3600 cp/constraint.cc:3680 +#: cp/constraint.cc:3610 cp/constraint.cc:3690 #, gcc-internal-format msgid " %qT is not trivially default constructible" msgstr "" -#: cp/constraint.cc:3603 +#: cp/constraint.cc:3613 #, gcc-internal-format msgid " %qT is not trivially copy constructible" msgstr "" -#: cp/constraint.cc:3606 +#: cp/constraint.cc:3616 #, gcc-internal-format msgid " %qT is not trivially destructible" msgstr "" -#: cp/constraint.cc:3609 +#: cp/constraint.cc:3619 #, gcc-internal-format msgid " %qT does not have a virtual destructor" msgstr "" -#: cp/constraint.cc:3612 +#: cp/constraint.cc:3622 #, fuzzy, gcc-internal-format #| msgid "abstract method in non-abstract class" msgid " %qT is not an abstract class" msgstr "абстрактны метад у неабстрактным класе" -#: cp/constraint.cc:3615 +#: cp/constraint.cc:3625 #, gcc-internal-format msgid " %qT is not a base of %qT" msgstr "" -#: cp/constraint.cc:3618 +#: cp/constraint.cc:3628 #, gcc-internal-format msgid " %qT is not a class" msgstr "" -#: cp/constraint.cc:3621 +#: cp/constraint.cc:3631 #, fuzzy, gcc-internal-format msgid " %qT is not an empty class" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3624 +#: cp/constraint.cc:3634 #, gcc-internal-format msgid " %qT is not an enum" msgstr "" -#: cp/constraint.cc:3627 +#: cp/constraint.cc:3637 #, fuzzy, gcc-internal-format #| msgid "field '%s' not found in class" msgid " %qT is not a final class" msgstr "поле \"%s\" не знойдзена ў класе" -#: cp/constraint.cc:3630 +#: cp/constraint.cc:3640 #, gcc-internal-format msgid " %qT is not layout compatible with %qT" msgstr "" -#: cp/constraint.cc:3633 +#: cp/constraint.cc:3643 #, fuzzy, gcc-internal-format msgid " %qT is not a literal type" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3636 +#: cp/constraint.cc:3646 #, gcc-internal-format msgid " %qT is not pointer-interconvertible base of %qT" msgstr "" -#: cp/constraint.cc:3640 +#: cp/constraint.cc:3650 #, fuzzy, gcc-internal-format msgid " %qT is not a POD type" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3643 +#: cp/constraint.cc:3653 #, fuzzy, gcc-internal-format msgid " %qT is not a polymorphic type" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3646 +#: cp/constraint.cc:3656 #, gcc-internal-format msgid " %qT is not the same as %qT" msgstr "" -#: cp/constraint.cc:3649 +#: cp/constraint.cc:3659 #, fuzzy, gcc-internal-format msgid " %qT is not an standard layout type" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3652 +#: cp/constraint.cc:3662 #, fuzzy, gcc-internal-format msgid " %qT is not a trivial type" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3655 +#: cp/constraint.cc:3665 #, fuzzy, gcc-internal-format #| msgid "`%D' is not a function," msgid " %qT is not a union" msgstr "`%D' - гэта ня функцыя," -#: cp/constraint.cc:3658 +#: cp/constraint.cc:3668 #, fuzzy, gcc-internal-format msgid " %qT is not an aggregate" msgstr "\"%s\" мае незавершаны тып" -#: cp/constraint.cc:3661 +#: cp/constraint.cc:3671 #, gcc-internal-format msgid " %qT is not trivially copyable" msgstr "" -#: cp/constraint.cc:3664 +#: cp/constraint.cc:3674 #, gcc-internal-format msgid " %qT is not assignable from %qT" msgstr "" -#: cp/constraint.cc:3667 +#: cp/constraint.cc:3677 #, gcc-internal-format msgid " %qT is not trivially assignable from %qT" msgstr "" -#: cp/constraint.cc:3670 +#: cp/constraint.cc:3680 #, gcc-internal-format msgid " %qT is not % assignable from %qT" msgstr "" -#: cp/constraint.cc:3674 +#: cp/constraint.cc:3684 #, gcc-internal-format msgid " %qT is not default constructible" msgstr "" -#: cp/constraint.cc:3676 +#: cp/constraint.cc:3686 #, gcc-internal-format msgid " %qT is not constructible from %qE" msgstr "" -#: cp/constraint.cc:3682 +#: cp/constraint.cc:3692 #, gcc-internal-format msgid " %qT is not trivially constructible from %qE" msgstr "" -#: cp/constraint.cc:3688 +#: cp/constraint.cc:3698 #, gcc-internal-format msgid " %qT is not % constructible from %qE" msgstr "" -#: cp/constraint.cc:3691 +#: cp/constraint.cc:3701 #, gcc-internal-format msgid " %qT does not have unique object representations" msgstr "" -#: cp/constraint.cc:3717 +#: cp/constraint.cc:3727 #, fuzzy, gcc-internal-format msgid "invalid constraints" msgstr "Нерэчаісны выбар %s" -#: cp/constraint.cc:3742 +#: cp/constraint.cc:3752 #, gcc-internal-format msgid "constraint %qE has type %qT, not %" msgstr "" -#: cp/constraint.cc:3745 +#: cp/constraint.cc:3755 #, gcc-internal-format msgid "the expression %qE evaluated to %" msgstr "" -#: cp/constraint.cc:3796 +#: cp/constraint.cc:3806 #, gcc-internal-format msgid "constraints not satisfied" msgstr "" -#: cp/constraint.cc:3811 +#: cp/constraint.cc:3821 #, gcc-internal-format msgid "set %qs to at least %d for more detail" msgstr "" @@ -50868,51 +50887,46 @@ msgstr "" msgid "% declared here" msgstr "" -#: cp/coroutines.cc:517 -#, gcc-internal-format -msgid "% declared here" -msgstr "" - -#: cp/coroutines.cc:642 cp/coroutines.cc:720 cp/coroutines.cc:4280 +#: cp/coroutines.cc:648 cp/coroutines.cc:726 cp/coroutines.cc:4290 #, gcc-internal-format msgid "no member named %qE in %qT" msgstr "" -#: cp/coroutines.cc:735 +#: cp/coroutines.cc:741 #, fuzzy, gcc-internal-format msgid "%qs cannot be used outside a function" msgstr "\"%s\" звычайна функцыя" #. [basic.start.main] 3. The function main shall not be a coroutine. -#: cp/coroutines.cc:743 +#: cp/coroutines.cc:749 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in the % function" msgstr "\"%s\" звычайна функцыя" #. [dcl.constexpr] 3.3 it shall not be a coroutine. -#: cp/coroutines.cc:754 +#: cp/coroutines.cc:760 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in a % function" msgstr "\"%s\" звычайна функцыя" -#: cp/coroutines.cc:765 +#: cp/coroutines.cc:771 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in a function with a deduced return type" msgstr "\"%s\" звычайна функцыя" -#: cp/coroutines.cc:776 +#: cp/coroutines.cc:782 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in a varargs function" msgstr "\"%s\" звычайна функцыя" #. [class.ctor] 7. a constructor shall not be a coroutine. -#: cp/coroutines.cc:783 +#: cp/coroutines.cc:789 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in a constructor" msgstr "\"%s\" звычайна функцыя" #. [class.dtor] 21. a destructor shall not be a coroutine. -#: cp/coroutines.cc:790 +#: cp/coroutines.cc:796 #, fuzzy, gcc-internal-format msgid "%qs cannot be used in a destructor" msgstr "\"%s\" звычайна функцыя" @@ -50920,89 +50934,89 @@ msgstr "\"%s\" звычайна функцыя" #. TODO: record or extract positions of returns (and the first coro #. keyword) so that we can add notes to the diagnostic about where #. the bad keyword is and what made the function into a coro. -#: cp/coroutines.cc:821 +#: cp/coroutines.cc:827 #, gcc-internal-format msgid "a % statement is not allowed in coroutine; did you mean %?" msgstr "" -#: cp/coroutines.cc:869 +#: cp/coroutines.cc:875 #, gcc-internal-format msgid "the expression %qE is required to be non-throwing" msgstr "" -#: cp/coroutines.cc:871 +#: cp/coroutines.cc:877 #, gcc-internal-format msgid "must be declared with %" msgstr "" -#: cp/coroutines.cc:955 +#: cp/coroutines.cc:962 #, gcc-internal-format msgid "awaitable type %qT is not a structure" msgstr "" -#: cp/coroutines.cc:1066 +#: cp/coroutines.cc:1073 #, gcc-internal-format msgid "% must return %, % or a coroutine handle" msgstr "" -#: cp/coroutines.cc:1376 +#: cp/coroutines.cc:1384 #, gcc-internal-format msgid "function declared % has a % statement" msgstr "" -#: cp/coroutines.cc:1414 +#: cp/coroutines.cc:1422 #, fuzzy, gcc-internal-format msgid "the align argument to %<__builtin_coro_promise%> must be a constant" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: cp/coroutines.cc:1424 +#: cp/coroutines.cc:1432 #, fuzzy, gcc-internal-format msgid "the direction argument to %<__builtin_coro_promise%> must be a constant" msgstr "аргумент `__builtin_args_info' павінен быць канстантай" -#: cp/coroutines.cc:1904 +#: cp/coroutines.cc:1912 #, gcc-internal-format msgid "no suspend point info for %qD" msgstr "" -#: cp/coroutines.cc:2102 cp/coroutines.cc:4653 +#: cp/coroutines.cc:2110 cp/coroutines.cc:4664 #, gcc-internal-format msgid "%qE is provided by %qT but is not usable with the function signature %qD" msgstr "" -#: cp/coroutines.cc:2552 +#: cp/coroutines.cc:2560 #, fuzzy, gcc-internal-format #| msgid "duplicate `%s'" msgid "duplicate info for %qE" msgstr "паўтарэньне `%s'" -#: cp/coroutines.cc:3703 +#: cp/coroutines.cc:3711 #, gcc-internal-format msgid "await expressions are not permitted in handlers" msgstr "" -#: cp/coroutines.cc:3934 +#: cp/coroutines.cc:3943 #, gcc-internal-format msgid "variable length arrays are not yet supported in coroutines" msgstr "" -#: cp/coroutines.cc:4658 +#: cp/coroutines.cc:4669 #, gcc-internal-format msgid "%qE is provided by %qT but %qE is not marked % or %" msgstr "" -#: cp/coroutines.cc:4661 +#: cp/coroutines.cc:4672 #, gcc-internal-format msgid "%qE is marked % or % but no usable % is provided by %qT" msgstr "" -#: cp/coroutines.cc:4690 +#: cp/coroutines.cc:4701 #, gcc-internal-format msgid "%qE is provided by %qT but % cannot be found" msgstr "" #. We can't initialize a non-class return value from void. -#: cp/coroutines.cc:5088 +#: cp/coroutines.cc:5099 #, gcc-internal-format msgid "cannot initialize a return object of type %qT with an rvalue of type %" msgstr "" @@ -51037,7 +51051,7 @@ msgstr "" msgid "ignoring attribute %qE after earlier %qE" msgstr "" -#: cp/cp-gimplify.cc:3086 cp/cp-gimplify.cc:3098 cp/decl.cc:4126 +#: cp/cp-gimplify.cc:3086 cp/cp-gimplify.cc:3098 cp/decl.cc:4143 #: cp/method.cc:978 #, fuzzy, gcc-internal-format msgid "%qD is not a type" @@ -51105,7 +51119,7 @@ msgstr "" msgid "conversion from %qH to %qI discards qualifiers" msgstr "" -#: cp/cvt.cc:498 cp/typeck.cc:8360 +#: cp/cvt.cc:498 cp/typeck.cc:8366 #, gcc-internal-format msgid "casting %qT to %qT does not dereference pointer" msgstr "" @@ -51471,258 +51485,258 @@ msgstr "" msgid "odr-used inline variable %qD is not defined" msgstr "" -#: cp/decl.cc:1210 +#: cp/decl.cc:1213 #, gcc-internal-format msgid "%qD was declared % and later %" msgstr "" -#: cp/decl.cc:1250 +#: cp/decl.cc:1253 #, gcc-internal-format msgid "declaration of %qF has a different exception specifier" msgstr "" -#: cp/decl.cc:1264 +#: cp/decl.cc:1267 #, fuzzy, gcc-internal-format #| msgid "previous declaration `%D'" msgid "from previous declaration %qF" msgstr "папярэдняе абвяшчэньне `%D'" -#: cp/decl.cc:1317 +#: cp/decl.cc:1320 #, fuzzy, gcc-internal-format #| msgid "this is a previous declaration" msgid "redeclaration %qD differs in %qs from previous declaration" msgstr "гэта папярэдняе абвяшчэньне" -#: cp/decl.cc:1321 cp/decl.cc:15821 +#: cp/decl.cc:1324 cp/decl.cc:15875 #, fuzzy, gcc-internal-format #| msgid "previous declaration `%D'" msgid "previous declaration %qD" msgstr "папярэдняе абвяшчэньне `%D'" -#: cp/decl.cc:1350 +#: cp/decl.cc:1353 #, fuzzy, gcc-internal-format msgid "cannot specialize concept %q#D" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:1372 +#: cp/decl.cc:1375 #, gcc-internal-format msgid "redeclaration of %q#D may not have default arguments" msgstr "" -#: cp/decl.cc:1401 +#: cp/decl.cc:1404 #, gcc-internal-format msgid "friend declaration of %q#D specifies default arguments and isn%'t the only declaration" msgstr "" -#: cp/decl.cc:1404 +#: cp/decl.cc:1407 #, fuzzy, gcc-internal-format #| msgid "previous declaration of `%#D'" msgid "previous declaration of %q#D" msgstr "папярэдняе абвяшчэньне `%#D'" -#: cp/decl.cc:1453 +#: cp/decl.cc:1456 #, fuzzy, gcc-internal-format msgid "ambiguating new declaration %q+#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1455 cp/decl.cc:1874 +#: cp/decl.cc:1458 cp/decl.cc:1877 #, fuzzy, gcc-internal-format msgid "old declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1493 +#: cp/decl.cc:1496 #, fuzzy, gcc-internal-format msgid "redefinition of default argument for %q+#D" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/decl.cc:1495 +#: cp/decl.cc:1498 #, fuzzy, gcc-internal-format #| msgid "previous definition here" msgid "original definition appeared here" msgstr "папярэдняе вызначэньне" -#: cp/decl.cc:1561 +#: cp/decl.cc:1564 #, fuzzy, gcc-internal-format msgid "built-in function %qD declared as non-function" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:1574 cp/decl.cc:1700 +#: cp/decl.cc:1577 cp/decl.cc:1703 #, fuzzy, gcc-internal-format msgid "shadowing built-in function %q#D" msgstr "у функцыі \"%s\":" -#: cp/decl.cc:1575 cp/decl.cc:1701 +#: cp/decl.cc:1578 cp/decl.cc:1704 #, fuzzy, gcc-internal-format msgid "shadowing library function %q#D" msgstr "у функцыі \"%s\":" -#: cp/decl.cc:1583 +#: cp/decl.cc:1586 #, gcc-internal-format msgid "library function %q#D redeclared as non-function %q#D" msgstr "" -#: cp/decl.cc:1587 cp/decl.cc:1648 +#: cp/decl.cc:1590 cp/decl.cc:1651 #, fuzzy, gcc-internal-format msgid "declaration of %q#D conflicts with built-in declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1675 +#: cp/decl.cc:1678 #, fuzzy, gcc-internal-format msgid "definition of %q#D ambiguates built-in declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1681 cp/decl.cc:1695 +#: cp/decl.cc:1684 cp/decl.cc:1698 #, fuzzy, gcc-internal-format msgid "new declaration %q#D ambiguates built-in declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1685 +#: cp/decl.cc:1688 #, gcc-internal-format msgid "ignoring the %q#D declaration" msgstr "" -#: cp/decl.cc:1789 +#: cp/decl.cc:1792 #, gcc-internal-format msgid "literal operator %q#D conflicts with raw literal operator" msgstr "" -#: cp/decl.cc:1793 +#: cp/decl.cc:1796 #, gcc-internal-format msgid "raw literal operator %q#D conflicts with literal operator template" msgstr "" -#: cp/decl.cc:1809 +#: cp/decl.cc:1812 #, gcc-internal-format msgid "%q#D redeclared as different kind of entity" msgstr "" -#: cp/decl.cc:1833 +#: cp/decl.cc:1836 #, fuzzy, gcc-internal-format #| msgid "declaration of template `%#D'" msgid "conflicting declaration of template %q#D" msgstr "абвяшчэньне шаблёну `%#D'" -#: cp/decl.cc:1855 +#: cp/decl.cc:1858 #, fuzzy, gcc-internal-format msgid "conflicting declaration of C function %q#D" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:1872 +#: cp/decl.cc:1875 #, fuzzy, gcc-internal-format msgid "ambiguating new declaration of %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1882 +#: cp/decl.cc:1885 #, fuzzy, gcc-internal-format msgid "conflicting declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:1884 +#: cp/decl.cc:1887 #, fuzzy, gcc-internal-format msgid "previous declaration as %q#D" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:1894 +#: cp/decl.cc:1897 #, gcc-internal-format msgid "redeclaration of %" msgstr "" -#: cp/decl.cc:1896 +#: cp/decl.cc:1899 #, fuzzy, gcc-internal-format msgid "previous % declaration" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:1954 +#: cp/decl.cc:1957 #, fuzzy, gcc-internal-format #| msgid "previous definition here" msgid "%q#D previously defined here" msgstr "папярэдняе вызначэньне" -#: cp/decl.cc:1955 cp/name-lookup.cc:3178 cp/name-lookup.cc:3207 -#: cp/name-lookup.cc:3231 +#: cp/decl.cc:1958 cp/name-lookup.cc:3160 cp/name-lookup.cc:3189 +#: cp/name-lookup.cc:3213 #, fuzzy, gcc-internal-format msgid "%q#D previously declared here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:1966 +#: cp/decl.cc:1969 #, fuzzy, gcc-internal-format msgid "prototype specified for %q#D" msgstr "няма папярэдняга прататыпа для \"%s\"" -#: cp/decl.cc:1968 +#: cp/decl.cc:1971 #, fuzzy, gcc-internal-format #| msgid "previous definition here" msgid "previous non-prototype definition here" msgstr "папярэдняе вызначэньне" -#: cp/decl.cc:2008 +#: cp/decl.cc:2011 #, fuzzy, gcc-internal-format msgid "conflicting declaration of %q#D with %qL linkage" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2011 +#: cp/decl.cc:2014 #, fuzzy, gcc-internal-format msgid "previous declaration with %qL linkage" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2060 cp/decl.cc:2070 +#: cp/decl.cc:2063 cp/decl.cc:2073 #, fuzzy, gcc-internal-format msgid "default argument given for parameter %d of %q#D" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/decl.cc:2063 cp/decl.cc:2073 +#: cp/decl.cc:2066 cp/decl.cc:2076 #, fuzzy, gcc-internal-format msgid "previous specification in %q#D here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2113 +#: cp/decl.cc:2116 #, fuzzy, gcc-internal-format msgid "declaration %qD conflicts with builtin" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: cp/decl.cc:2121 +#: cp/decl.cc:2124 #, fuzzy, gcc-internal-format msgid "declaration %qD conflicts with import" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: cp/decl.cc:2122 +#: cp/decl.cc:2125 #, fuzzy, gcc-internal-format msgid "import declared %q#D here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2130 +#: cp/decl.cc:2133 #, fuzzy, gcc-internal-format #| msgid "conflicts with previous declaration `%#D'" msgid "conflicting exporting declaration %qD" msgstr "канфлікт з папярэднім абвяшчэньнем `%#D'" -#: cp/decl.cc:2131 +#: cp/decl.cc:2134 #, fuzzy, gcc-internal-format msgid "previous declaration %q#D here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2156 +#: cp/decl.cc:2159 #, fuzzy, gcc-internal-format #| msgid "previous definition here" msgid "previous definition of %qD here" msgstr "папярэдняе вызначэньне" -#: cp/decl.cc:2157 +#: cp/decl.cc:2160 #, fuzzy, gcc-internal-format msgid "previous declaration of %qD here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:2170 +#: cp/decl.cc:2173 #, gcc-internal-format msgid "function %qD declared %<[[noreturn]]%> but its first declaration was not" msgstr "" -#: cp/decl.cc:2215 +#: cp/decl.cc:2218 #, fuzzy, gcc-internal-format msgid "redundant redeclaration of %qD in same scope" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:2231 +#: cp/decl.cc:2234 #, gcc-internal-format msgid "deleted definition of %qD is not first declaration" msgstr "" @@ -51735,51 +51749,51 @@ msgstr "" #. that specialization that would cause an implicit #. instantiation to take place, in every translation unit in #. which such a use occurs. -#: cp/decl.cc:2711 +#: cp/decl.cc:2728 #, fuzzy, gcc-internal-format msgid "explicit specialization of %qD after first use" msgstr "ініцыялізацыя" -#: cp/decl.cc:2850 +#: cp/decl.cc:2867 #, fuzzy, gcc-internal-format #| msgid "section of `%s' conflicts with previous declaration" msgid "%qD: visibility attribute ignored because it conflicts with previous declaration" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" #. Reject two definitions. -#: cp/decl.cc:3114 cp/decl.cc:3143 cp/decl.cc:3185 cp/decl.cc:3202 -#: cp/decl.cc:3305 +#: cp/decl.cc:3131 cp/decl.cc:3160 cp/decl.cc:3202 cp/decl.cc:3219 +#: cp/decl.cc:3322 #, fuzzy, gcc-internal-format #| msgid "previous definition of `%#T'" msgid "redefinition of %q#D" msgstr "папярэдняе вызначэньне `%#T'" -#: cp/decl.cc:3130 +#: cp/decl.cc:3147 #, fuzzy, gcc-internal-format msgid "%qD conflicts with used function" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: cp/decl.cc:3140 +#: cp/decl.cc:3157 #, fuzzy, gcc-internal-format msgid "%q#D not declared in class" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:3154 cp/decl.cc:3212 +#: cp/decl.cc:3171 cp/decl.cc:3229 #, gcc-internal-format msgid "%q+D redeclared inline with % attribute" msgstr "" -#: cp/decl.cc:3157 cp/decl.cc:3215 +#: cp/decl.cc:3174 cp/decl.cc:3232 #, gcc-internal-format msgid "%q+D redeclared inline without % attribute" msgstr "" -#: cp/decl.cc:3164 cp/decl.cc:3222 +#: cp/decl.cc:3181 cp/decl.cc:3239 #, gcc-internal-format msgid "deduction guide %q+D redeclared" msgstr "" -#: cp/decl.cc:3171 +#: cp/decl.cc:3188 #, gcc-internal-format msgid "comparison operator %q+D defaulted after its first declaration" msgstr "" @@ -51787,2398 +51801,2398 @@ msgstr "" #. is_primary= #. is_partial= #. is_friend_decl= -#: cp/decl.cc:3236 +#: cp/decl.cc:3253 #, gcc-internal-format msgid "redeclaration of friend %q#D may not have default template arguments" msgstr "" -#: cp/decl.cc:3251 +#: cp/decl.cc:3268 #, gcc-internal-format msgid "thread-local declaration of %q#D follows non-thread-local declaration" msgstr "" -#: cp/decl.cc:3254 +#: cp/decl.cc:3271 #, gcc-internal-format msgid "non-thread-local declaration of %q#D follows thread-local declaration" msgstr "" -#: cp/decl.cc:3269 cp/decl.cc:3313 cp/name-lookup.cc:2733 -#: cp/name-lookup.cc:3205 cp/name-lookup.cc:3229 +#: cp/decl.cc:3286 cp/decl.cc:3330 cp/name-lookup.cc:2715 +#: cp/name-lookup.cc:3187 cp/name-lookup.cc:3211 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "redeclaration of %q#D" msgstr "абвяшчэньне `%#D'" -#: cp/decl.cc:3296 +#: cp/decl.cc:3313 #, gcc-internal-format msgid "redundant redeclaration of % static data member %qD" msgstr "" -#: cp/decl.cc:3364 +#: cp/decl.cc:3381 #, gcc-internal-format msgid "local label %qE conflicts with existing label" msgstr "" -#: cp/decl.cc:3365 +#: cp/decl.cc:3382 #, gcc-internal-format msgid "previous label" msgstr "" -#: cp/decl.cc:3455 +#: cp/decl.cc:3472 #, gcc-internal-format msgid " from here" msgstr " адсюль" -#: cp/decl.cc:3479 cp/decl.cc:3716 +#: cp/decl.cc:3496 cp/decl.cc:3733 #, gcc-internal-format msgid " exits OpenMP structured block" msgstr "" -#: cp/decl.cc:3507 +#: cp/decl.cc:3524 #, fuzzy, gcc-internal-format msgid " crosses initialization of %q#D" msgstr "ініцыялізацыя" -#: cp/decl.cc:3510 +#: cp/decl.cc:3527 #, gcc-internal-format msgid " enters scope of %q#D, which has non-trivial destructor" msgstr "" -#: cp/decl.cc:3524 cp/decl.cc:3685 +#: cp/decl.cc:3541 cp/decl.cc:3702 #, gcc-internal-format msgid " enters % block" msgstr "" -#: cp/decl.cc:3530 cp/decl.cc:3667 cp/decl.cc:3687 +#: cp/decl.cc:3547 cp/decl.cc:3684 cp/decl.cc:3704 #, gcc-internal-format msgid " enters % block" msgstr "" -#: cp/decl.cc:3536 cp/decl.cc:3699 +#: cp/decl.cc:3553 cp/decl.cc:3716 #, gcc-internal-format msgid " enters OpenMP structured block" msgstr "" -#: cp/decl.cc:3542 cp/decl.cc:3689 +#: cp/decl.cc:3559 cp/decl.cc:3706 #, gcc-internal-format msgid " enters synchronized or atomic statement" msgstr "" -#: cp/decl.cc:3549 cp/decl.cc:3691 +#: cp/decl.cc:3566 cp/decl.cc:3708 #, gcc-internal-format msgid " enters % statement" msgstr "" -#: cp/decl.cc:3555 cp/decl.cc:3693 +#: cp/decl.cc:3572 cp/decl.cc:3710 #, gcc-internal-format msgid " enters % statement" msgstr "" -#: cp/decl.cc:3674 +#: cp/decl.cc:3691 #, fuzzy, gcc-internal-format msgid " skips initialization of %q#D" msgstr "ініцыялізацыя" -#: cp/decl.cc:3677 +#: cp/decl.cc:3694 #, gcc-internal-format msgid " enters scope of %q#D which has non-trivial destructor" msgstr "" -#: cp/decl.cc:4133 cp/parser.cc:6921 +#: cp/decl.cc:4150 cp/parser.cc:6921 #, gcc-internal-format msgid "%qD used without template arguments" msgstr "" -#: cp/decl.cc:4139 +#: cp/decl.cc:4156 #, fuzzy, gcc-internal-format msgid "%qD is a function, not a type" msgstr "\"%s\" звычайна функцыя" -#: cp/decl.cc:4150 +#: cp/decl.cc:4167 #, fuzzy, gcc-internal-format msgid "%q#T is not a class" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:4178 cp/decl.cc:4279 +#: cp/decl.cc:4195 cp/decl.cc:4296 #, gcc-internal-format msgid "no class template named %q#T in %q#T" msgstr "" -#: cp/decl.cc:4179 +#: cp/decl.cc:4196 #, fuzzy, gcc-internal-format msgid "no type named %q#T in %q#T" msgstr "вяртаемы тып \"%s\" не \"int\"" -#: cp/decl.cc:4192 +#: cp/decl.cc:4209 #, fuzzy, gcc-internal-format msgid "lookup of %qT in %qT is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/decl.cc:4201 +#: cp/decl.cc:4218 #, gcc-internal-format msgid "% names %q#T, which is not a class template" msgstr "" -#: cp/decl.cc:4214 +#: cp/decl.cc:4231 #, gcc-internal-format msgid "% names %q#T, which is not a type" msgstr "" -#: cp/decl.cc:4288 +#: cp/decl.cc:4305 #, fuzzy, gcc-internal-format msgid "template parameters do not match template %qD" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:4641 +#: cp/decl.cc:4658 #, gcc-internal-format msgid "%<-faligned-new=%d%> is not a power of two" msgstr "" -#: cp/decl.cc:4821 +#: cp/decl.cc:4838 #, gcc-internal-format msgid "%<--param destructive-interference-size=%d%> is less than %d" msgstr "" -#: cp/decl.cc:4825 +#: cp/decl.cc:4842 #, gcc-internal-format msgid "%<--param destructive-interference-size=%d%> is less than %<--param l1-cache-line-size=%d%>" msgstr "" -#: cp/decl.cc:4838 +#: cp/decl.cc:4855 #, gcc-internal-format msgid "%<--param constructive-interference-size=%d%> is less than %d" msgstr "" -#: cp/decl.cc:4843 +#: cp/decl.cc:4860 #, gcc-internal-format msgid "%<--param constructive-interference-size=%d%> is greater than %<--param l1-cache-line-size=%d%>" msgstr "" -#: cp/decl.cc:5169 +#: cp/decl.cc:5186 #, gcc-internal-format msgid "%q#D invalid; an anonymous union may only have public non-static data members" msgstr "" -#: cp/decl.cc:5179 cp/parser.cc:22789 +#: cp/decl.cc:5196 cp/parser.cc:22800 #, gcc-internal-format msgid "this flexibility is deprecated and will be removed" msgstr "" -#: cp/decl.cc:5208 +#: cp/decl.cc:5225 #, gcc-internal-format msgid "anonymous struct with base classes" msgstr "" -#: cp/decl.cc:5220 +#: cp/decl.cc:5237 #, gcc-internal-format msgid "member %q+#D with constructor not allowed in anonymous aggregate" msgstr "" -#: cp/decl.cc:5223 +#: cp/decl.cc:5240 #, gcc-internal-format msgid "member %q+#D with destructor not allowed in anonymous aggregate" msgstr "" -#: cp/decl.cc:5226 +#: cp/decl.cc:5243 #, gcc-internal-format msgid "member %q+#D with copy assignment operator not allowed in anonymous aggregate" msgstr "" -#: cp/decl.cc:5245 +#: cp/decl.cc:5262 #, fuzzy, gcc-internal-format msgid "attribute ignored in declaration of %q#T" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:5248 +#: cp/decl.cc:5265 #, gcc-internal-format msgid "attribute for %q#T must follow the %qs keyword" msgstr "" -#: cp/decl.cc:5290 +#: cp/decl.cc:5307 #, gcc-internal-format msgid "multiple types in one declaration" msgstr "" -#: cp/decl.cc:5295 +#: cp/decl.cc:5312 #, fuzzy, gcc-internal-format msgid "redeclaration of C++ built-in type %qT" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:5312 +#: cp/decl.cc:5329 #, gcc-internal-format msgid "% can only be specified for variables or function declarations" msgstr "" -#: cp/decl.cc:5345 +#: cp/decl.cc:5362 #, gcc-internal-format msgid "missing type-name in typedef-declaration" msgstr "" -#: cp/decl.cc:5353 +#: cp/decl.cc:5370 #, gcc-internal-format msgid "ISO C++ prohibits anonymous structs" msgstr "" -#: cp/decl.cc:5360 +#: cp/decl.cc:5377 #, fuzzy, gcc-internal-format msgid "% can only be specified for functions" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:5363 +#: cp/decl.cc:5380 #, gcc-internal-format msgid "% can only be specified for functions" msgstr "" -#: cp/decl.cc:5368 +#: cp/decl.cc:5385 #, gcc-internal-format msgid "% can only be specified inside a class" msgstr "" -#: cp/decl.cc:5371 +#: cp/decl.cc:5388 #, gcc-internal-format msgid "% can only be specified for constructors" msgstr "" -#: cp/decl.cc:5374 +#: cp/decl.cc:5391 #, gcc-internal-format msgid "a storage class can only be specified for objects and functions" msgstr "" -#: cp/decl.cc:5378 +#: cp/decl.cc:5395 #, gcc-internal-format msgid "% can only be specified for objects and functions" msgstr "" -#: cp/decl.cc:5382 +#: cp/decl.cc:5399 #, gcc-internal-format msgid "% can only be specified for objects and functions" msgstr "" -#: cp/decl.cc:5386 +#: cp/decl.cc:5403 #, gcc-internal-format msgid "%<__restrict%> can only be specified for objects and functions" msgstr "" -#: cp/decl.cc:5390 +#: cp/decl.cc:5407 #, gcc-internal-format msgid "%<__thread%> can only be specified for objects and functions" msgstr "" -#: cp/decl.cc:5394 +#: cp/decl.cc:5411 #, gcc-internal-format msgid "% was ignored in this declaration" msgstr "" -#: cp/decl.cc:5397 cp/decl.cc:5400 cp/decl.cc:5403 +#: cp/decl.cc:5414 cp/decl.cc:5417 cp/decl.cc:5420 #, fuzzy, gcc-internal-format msgid "%qs cannot be used for type declarations" msgstr "\"%s\" звычайна функцыя" -#: cp/decl.cc:5425 +#: cp/decl.cc:5442 #, fuzzy, gcc-internal-format msgid "attribute ignored in explicit instantiation %q#T" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:5428 +#: cp/decl.cc:5445 #, fuzzy, gcc-internal-format msgid "no attribute can be applied to an explicit instantiation" msgstr "\"%s\" звычайна функцыя" -#: cp/decl.cc:5500 +#: cp/decl.cc:5518 #, gcc-internal-format msgid "ignoring attributes applied to class type %qT outside of definition" msgstr "" #. A template type parameter or other dependent type. -#: cp/decl.cc:5504 +#: cp/decl.cc:5522 #, gcc-internal-format msgid "ignoring attributes applied to dependent type %qT without an associated declaration" msgstr "" -#: cp/decl.cc:5570 cp/decl2.cc:951 +#: cp/decl.cc:5588 cp/decl2.cc:972 #, fuzzy, gcc-internal-format msgid "typedef %qD is initialized (use %qs instead)" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/decl.cc:5583 +#: cp/decl.cc:5601 #, gcc-internal-format msgid "declaration of %q#D has % and is initialized" msgstr "" -#: cp/decl.cc:5621 +#: cp/decl.cc:5639 #, gcc-internal-format msgid "definition of %q#D is marked %" msgstr "" -#: cp/decl.cc:5645 +#: cp/decl.cc:5663 #, gcc-internal-format msgid "%q+#D is not a static data member of %q#T" msgstr "" -#: cp/decl.cc:5653 +#: cp/decl.cc:5671 #, fuzzy, gcc-internal-format msgid "non-member-template declaration of %qD" msgstr "пустое абвяшчэнне" -#: cp/decl.cc:5654 +#: cp/decl.cc:5672 #, fuzzy, gcc-internal-format msgid "does not match member template declaration here" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:5666 +#: cp/decl.cc:5684 #, gcc-internal-format msgid "ISO C++ does not permit %<%T::%D%> to be defined as %<%T::%D%>" msgstr "" -#: cp/decl.cc:5678 +#: cp/decl.cc:5696 #, fuzzy, gcc-internal-format msgid "duplicate initialization of %qD" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:5726 +#: cp/decl.cc:5744 #, gcc-internal-format msgid "declaration of %q#D outside of class is not definition" msgstr "" -#: cp/decl.cc:5743 +#: cp/decl.cc:5761 #, gcc-internal-format msgid "block-scope extern declaration %q#D not permitted in module purview" msgstr "" -#: cp/decl.cc:5779 +#: cp/decl.cc:5797 #, gcc-internal-format msgid "%qD defined % in %qs function only available with %<-std=c++2b%> or %<-std=gnu++2b%>" msgstr "" -#: cp/decl.cc:5785 +#: cp/decl.cc:5803 #, gcc-internal-format msgid "%qD defined % in %qs function only available with %<-std=c++2b%> or %<-std=gnu++2b%>" msgstr "" -#: cp/decl.cc:5850 +#: cp/decl.cc:5868 #, fuzzy, gcc-internal-format msgid "variable %q#D has initializer but incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:5856 cp/decl.cc:7149 +#: cp/decl.cc:5874 cp/decl.cc:7189 #, fuzzy, gcc-internal-format msgid "elements of array %q#D have incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:5866 +#: cp/decl.cc:5884 #, gcc-internal-format msgid "aggregate %q#D has incomplete type and cannot be defined" msgstr "" -#: cp/decl.cc:5933 +#: cp/decl.cc:5951 #, gcc-internal-format msgid "%qD declared as reference but not initialized" msgstr "" -#: cp/decl.cc:6016 +#: cp/decl.cc:6034 #, gcc-internal-format msgid "name used in a GNU-style designated initializer for an array" msgstr "" -#: cp/decl.cc:6022 +#: cp/decl.cc:6040 #, gcc-internal-format msgid "name %qD used in a GNU-style designated initializer for an array" msgstr "" -#: cp/decl.cc:6041 +#: cp/decl.cc:6059 #, gcc-internal-format msgid "non-trivial designated initializers not supported" msgstr "" -#: cp/decl.cc:6045 +#: cp/decl.cc:6063 #, fuzzy, gcc-internal-format msgid "C99 designator %qE is not an integral constant-expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/decl.cc:6106 +#: cp/decl.cc:6124 #, gcc-internal-format msgid "initializer fails to determine size of %qD" msgstr "" -#: cp/decl.cc:6113 +#: cp/decl.cc:6131 #, fuzzy, gcc-internal-format #| msgid "array size missing in `%D'" msgid "array size missing in %qD" msgstr "прапушчан памер масіва ў `%D'" -#: cp/decl.cc:6125 +#: cp/decl.cc:6143 #, fuzzy, gcc-internal-format #| msgid "zero-size array `%D'" msgid "zero-size array %qD" msgstr "нулявы памер масіва `%D'" -#: cp/decl.cc:6165 +#: cp/decl.cc:6183 #, gcc-internal-format msgid "storage size of %qD isn%'t known" msgstr "" -#: cp/decl.cc:6190 +#: cp/decl.cc:6208 #, fuzzy, gcc-internal-format msgid "storage size of %qD isn%'t constant" msgstr "тып параметра \"%s\" не аб'яўлены" -#: cp/decl.cc:6273 +#: cp/decl.cc:6291 #, gcc-internal-format msgid "sorry: semantics of inline variable %q#D are wrong (you%'ll wind up with multiple copies)" msgstr "" -#: cp/decl.cc:6277 +#: cp/decl.cc:6295 #, gcc-internal-format msgid "sorry: semantics of inline function static data %q#D are wrong (you%'ll wind up with multiple copies)" msgstr "" -#: cp/decl.cc:6283 +#: cp/decl.cc:6301 #, gcc-internal-format msgid "you can work around this by removing the initializer" msgstr "" -#: cp/decl.cc:6325 +#: cp/decl.cc:6343 #, fuzzy, gcc-internal-format msgid "uninitialized %" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:6332 +#: cp/decl.cc:6350 #, gcc-internal-format msgid "uninitialized variable %qD in % function" msgstr "" -#: cp/decl.cc:6341 +#: cp/decl.cc:6359 #, gcc-internal-format msgid "uninitialized variable %qD in % context" msgstr "" -#: cp/decl.cc:6349 +#: cp/decl.cc:6367 #, gcc-internal-format msgid "%q#T has no user-provided default constructor" msgstr "" -#: cp/decl.cc:6353 +#: cp/decl.cc:6371 #, gcc-internal-format msgid "constructor is not user-provided because it is explicitly defaulted in the class body" msgstr "" -#: cp/decl.cc:6356 +#: cp/decl.cc:6374 #, gcc-internal-format msgid "and the implicitly-defined constructor does not initialize %q#D" msgstr "" -#: cp/decl.cc:6530 +#: cp/decl.cc:6569 #, fuzzy, gcc-internal-format msgid "invalid type %qT as initializer for a vector of type %qT" msgstr "нерэчаісны ініцыялізатар" -#: cp/decl.cc:6602 +#: cp/decl.cc:6641 #, gcc-internal-format msgid "initializer for %qT must be brace-enclosed" msgstr "" -#: cp/decl.cc:6643 +#: cp/decl.cc:6683 #, gcc-internal-format msgid "%<[%E] =%> used in a GNU-style designated initializer for class %qT" msgstr "" -#: cp/decl.cc:6656 +#: cp/decl.cc:6696 #, gcc-internal-format msgid "%qT has no non-static data member named %qD" msgstr "" -#: cp/decl.cc:6680 +#: cp/decl.cc:6720 #, gcc-internal-format msgid "%qD is not a direct member of %qT" msgstr "" -#: cp/decl.cc:6735 +#: cp/decl.cc:6775 #, fuzzy, gcc-internal-format #| msgid "invalid initializer" msgid "invalid initializer for %q#D" msgstr "нерэчаісны ініцыялізатар" -#: cp/decl.cc:6785 +#: cp/decl.cc:6825 #, gcc-internal-format msgid "C99 designator %qE outside aggregate initializer" msgstr "" -#: cp/decl.cc:6824 cp/decl.cc:7108 cp/typeck2.cc:1494 cp/typeck2.cc:1791 -#: cp/typeck2.cc:1839 cp/typeck2.cc:1886 +#: cp/decl.cc:6864 cp/decl.cc:7148 cp/typeck2.cc:1495 cp/typeck2.cc:1815 +#: cp/typeck2.cc:1863 cp/typeck2.cc:1910 #, fuzzy, gcc-internal-format msgid "too many initializers for %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:6866 +#: cp/decl.cc:6906 #, fuzzy, gcc-internal-format msgid "braces around scalar initializer for type %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:6876 +#: cp/decl.cc:6916 #, gcc-internal-format msgid "too many braces around scalar initializer for type %qT" msgstr "" -#: cp/decl.cc:7009 +#: cp/decl.cc:7049 #, fuzzy, gcc-internal-format msgid "missing braces around initializer for %qT" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:7137 +#: cp/decl.cc:7177 #, fuzzy, gcc-internal-format msgid "structured binding has incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:7151 +#: cp/decl.cc:7191 #, fuzzy, gcc-internal-format msgid "elements of array %q#T have incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:7164 +#: cp/decl.cc:7204 #, gcc-internal-format msgid "variable-sized compound literal" msgstr "" -#: cp/decl.cc:7219 +#: cp/decl.cc:7259 #, fuzzy, gcc-internal-format msgid "%q#D has incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:7240 +#: cp/decl.cc:7280 #, gcc-internal-format msgid "scalar object %qD requires one element in initializer" msgstr "" -#: cp/decl.cc:7285 +#: cp/decl.cc:7325 #, gcc-internal-format msgid "in C++98 %qD must be initialized by constructor, not by %<{...}%>" msgstr "" -#: cp/decl.cc:7421 +#: cp/decl.cc:7468 #, gcc-internal-format msgid "array %qD initialized by parenthesized string literal %qE" msgstr "" -#: cp/decl.cc:7456 +#: cp/decl.cc:7507 #, gcc-internal-format msgid "initializer invalid for static member with constructor" msgstr "" -#: cp/decl.cc:7458 +#: cp/decl.cc:7509 #, gcc-internal-format msgid "non-constant in-class initialization invalid for static member %qD" msgstr "" -#: cp/decl.cc:7461 +#: cp/decl.cc:7512 #, gcc-internal-format msgid "non-constant in-class initialization invalid for non-inline static member %qD" msgstr "" -#: cp/decl.cc:7466 +#: cp/decl.cc:7517 #, gcc-internal-format msgid "(an out of class initialization is required)" msgstr "" -#: cp/decl.cc:7668 +#: cp/decl.cc:7719 #, fuzzy, gcc-internal-format msgid "reference %qD is initialized with itself" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/decl.cc:7925 +#: cp/decl.cc:7976 #, fuzzy, gcc-internal-format msgid "could not find variant declaration" msgstr "Не магу знайсці дэкларацыю інтэрфейса для \"%s\"" -#: cp/decl.cc:7949 +#: cp/decl.cc:8000 #, gcc-internal-format msgid "% on constructor %qD" msgstr "" -#: cp/decl.cc:7954 +#: cp/decl.cc:8005 #, gcc-internal-format msgid "% on destructor %qD" msgstr "" -#: cp/decl.cc:7959 +#: cp/decl.cc:8010 #, gcc-internal-format msgid "% on defaulted %qD" msgstr "" -#: cp/decl.cc:7964 +#: cp/decl.cc:8015 #, fuzzy, gcc-internal-format #| msgid "declaration of template `%#D'" msgid "% on deleted %qD" msgstr "абвяшчэньне шаблёну `%#D'" -#: cp/decl.cc:7969 +#: cp/decl.cc:8020 #, gcc-internal-format msgid "% on virtual %qD" msgstr "" -#: cp/decl.cc:8019 +#: cp/decl.cc:8070 #, gcc-internal-format msgid "assignment (not initialization) in declaration" msgstr "" -#: cp/decl.cc:8040 cp/decl.cc:14491 +#: cp/decl.cc:8091 cp/decl.cc:14547 #, gcc-internal-format msgid "ISO C++17 does not allow % storage class specifier" msgstr "" -#: cp/decl.cc:8044 cp/decl.cc:14495 +#: cp/decl.cc:8095 cp/decl.cc:14551 #, gcc-internal-format msgid "% storage class specifier used" msgstr "" -#: cp/decl.cc:8110 +#: cp/decl.cc:8161 #, gcc-internal-format msgid "initializer for % has function type; did you forget the %<()%>?" msgstr "" -#: cp/decl.cc:8226 +#: cp/decl.cc:8277 #, gcc-internal-format msgid "variable concept has no initializer" msgstr "" -#: cp/decl.cc:8285 +#: cp/decl.cc:8336 #, fuzzy, gcc-internal-format msgid "shadowing previous type declaration of %q#D" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:8328 +#: cp/decl.cc:8379 #, gcc-internal-format msgid "% can only be applied to a variable with static or thread storage duration" msgstr "" -#: cp/decl.cc:8506 +#: cp/decl.cc:8557 #, gcc-internal-format msgid "function %q#D is initialized like a variable" msgstr "" -#: cp/decl.cc:8615 +#: cp/decl.cc:8666 #, gcc-internal-format msgid "cannot decompose class type %qT because it has an anonymous struct member" msgstr "" -#: cp/decl.cc:8618 +#: cp/decl.cc:8669 #, gcc-internal-format msgid "cannot decompose class type %qT because it has an anonymous union member" msgstr "" -#: cp/decl.cc:8625 +#: cp/decl.cc:8676 #, gcc-internal-format msgid "cannot decompose inaccessible member %qD of %qT" msgstr "" -#: cp/decl.cc:8651 +#: cp/decl.cc:8702 #, gcc-internal-format msgid "cannot decompose class type %qT: both it and its base class %qT have non-static data members" msgstr "" -#: cp/decl.cc:8660 +#: cp/decl.cc:8711 #, gcc-internal-format msgid "cannot decompose class type %qT: its base classes %qT and %qT have non-static data members" msgstr "" -#: cp/decl.cc:8870 +#: cp/decl.cc:8921 #, fuzzy, gcc-internal-format msgid "structured binding refers to incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:8886 +#: cp/decl.cc:8937 #, gcc-internal-format msgid "cannot decompose variable length array %qT" msgstr "" -#: cp/decl.cc:8895 cp/decl.cc:8980 +#: cp/decl.cc:8946 cp/decl.cc:9031 #, gcc-internal-format, gfc-internal-format msgid "%u name provided for structured binding" msgid_plural "%u names provided for structured binding" msgstr[0] "" msgstr[1] "" -#: cp/decl.cc:8899 +#: cp/decl.cc:8950 #, gcc-internal-format, gfc-internal-format msgid "only %u name provided for structured binding" msgid_plural "only %u names provided for structured binding" msgstr[0] "" msgstr[1] "" -#: cp/decl.cc:8902 +#: cp/decl.cc:8953 #, gcc-internal-format msgid "while %qT decomposes into %wu element" msgid_plural "while %qT decomposes into %wu elements" msgstr[0] "" msgstr[1] "" -#: cp/decl.cc:8947 +#: cp/decl.cc:8998 #, gcc-internal-format msgid "cannot decompose variable length vector %qT" msgstr "" -#: cp/decl.cc:8973 +#: cp/decl.cc:9024 #, fuzzy, gcc-internal-format msgid "%::value%> is not an integral constant expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/decl.cc:8982 +#: cp/decl.cc:9033 #, gcc-internal-format msgid "while %qT decomposes into %E elements" msgstr "" -#: cp/decl.cc:9003 +#: cp/decl.cc:9054 #, gcc-internal-format msgid "%::type%> is %" msgstr "" -#: cp/decl.cc:9009 +#: cp/decl.cc:9060 #, gcc-internal-format msgid "in initialization of structured binding variable %qD" msgstr "" -#: cp/decl.cc:9038 +#: cp/decl.cc:9089 #, gcc-internal-format msgid "cannot decompose union type %qT" msgstr "" -#: cp/decl.cc:9043 +#: cp/decl.cc:9094 #, gcc-internal-format msgid "cannot decompose non-array non-class type %qT" msgstr "" -#: cp/decl.cc:9048 +#: cp/decl.cc:9099 #, gcc-internal-format msgid "cannot decompose lambda closure type %qT" msgstr "" -#: cp/decl.cc:9054 +#: cp/decl.cc:9105 #, gcc-internal-format msgid "structured binding refers to incomplete class type %qT" msgstr "" -#: cp/decl.cc:9063 +#: cp/decl.cc:9114 #, gcc-internal-format msgid "cannot decompose class type %qT without non-static data members" msgstr "" -#: cp/decl.cc:9530 +#: cp/decl.cc:9581 #, gcc-internal-format msgid "non-local variable %qD declared %<__thread%> needs dynamic initialization" msgstr "" -#: cp/decl.cc:9533 +#: cp/decl.cc:9584 #, gcc-internal-format msgid "non-local variable %qD declared %<__thread%> has a non-trivial destructor" msgstr "" -#: cp/decl.cc:9538 +#: cp/decl.cc:9589 #, gcc-internal-format msgid "C++11 % allows dynamic initialization and destruction" msgstr "" -#: cp/decl.cc:9757 +#: cp/decl.cc:9808 #, gcc-internal-format msgid "initializer fails to determine size of %qT" msgstr "" -#: cp/decl.cc:9761 +#: cp/decl.cc:9812 #, fuzzy, gcc-internal-format #| msgid "array size missing in `%D'" msgid "array size missing in %qT" msgstr "прапушчан памер масіва ў `%D'" -#: cp/decl.cc:9764 +#: cp/decl.cc:9815 #, fuzzy, gcc-internal-format #| msgid "zero-size array `%D'" msgid "zero-size array %qT" msgstr "нулявы памер масіва `%D'" -#: cp/decl.cc:9780 +#: cp/decl.cc:9831 #, gcc-internal-format msgid "destructor for alien class %qT cannot be a member" msgstr "" -#: cp/decl.cc:9782 +#: cp/decl.cc:9833 #, gcc-internal-format msgid "constructor for alien class %qT cannot be a member" msgstr "" -#: cp/decl.cc:9808 +#: cp/decl.cc:9859 #, gcc-internal-format msgid "%qD declared as a % variable" msgstr "" -#: cp/decl.cc:9810 +#: cp/decl.cc:9861 #, gcc-internal-format msgid "% and % function specifiers on %qD invalid in variable declaration" msgstr "" -#: cp/decl.cc:9816 +#: cp/decl.cc:9867 #, gcc-internal-format msgid "%qD declared as a % parameter" msgstr "" -#: cp/decl.cc:9819 +#: cp/decl.cc:9870 #, gcc-internal-format msgid "%qD declared as an % parameter" msgstr "" -#: cp/decl.cc:9821 +#: cp/decl.cc:9872 #, gcc-internal-format msgid "% and % function specifiers on %qD invalid in parameter declaration" msgstr "" -#: cp/decl.cc:9827 +#: cp/decl.cc:9878 #, gcc-internal-format msgid "%qD declared as a % type" msgstr "" -#: cp/decl.cc:9830 +#: cp/decl.cc:9881 #, gcc-internal-format msgid "%qD declared as an % type" msgstr "" -#: cp/decl.cc:9832 +#: cp/decl.cc:9883 #, gcc-internal-format msgid "% and % function specifiers on %qD invalid in type declaration" msgstr "" -#: cp/decl.cc:9838 +#: cp/decl.cc:9889 #, gcc-internal-format msgid "%qD declared as a % field" msgstr "" -#: cp/decl.cc:9841 +#: cp/decl.cc:9892 #, gcc-internal-format msgid "%qD declared as an % field" msgstr "" -#: cp/decl.cc:9843 +#: cp/decl.cc:9894 #, gcc-internal-format msgid "% and % function specifiers on %qD invalid in field declaration" msgstr "" -#: cp/decl.cc:9850 +#: cp/decl.cc:9901 #, gcc-internal-format msgid "%q+D declared as a friend" msgstr "" -#: cp/decl.cc:9857 +#: cp/decl.cc:9908 #, fuzzy, gcc-internal-format msgid "%q+D declared with an exception specification" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:9889 +#: cp/decl.cc:9940 #, gcc-internal-format msgid "definition of %qD is not in namespace enclosing %qT" msgstr "" -#: cp/decl.cc:9929 +#: cp/decl.cc:9980 #, gcc-internal-format msgid "static member function %q#D declared with type qualifiers" msgstr "" -#: cp/decl.cc:9940 +#: cp/decl.cc:9991 #, gcc-internal-format msgid "concept %q#D declared with function parameters" msgstr "" -#: cp/decl.cc:9947 +#: cp/decl.cc:9998 #, gcc-internal-format msgid "concept %q#D declared with a deduced return type" msgstr "" -#: cp/decl.cc:9950 +#: cp/decl.cc:10001 #, gcc-internal-format msgid "concept %q#D with non-% return type %qT" msgstr "" -#: cp/decl.cc:10026 +#: cp/decl.cc:10077 #, gcc-internal-format msgid "concept %qD has no definition" msgstr "" -#: cp/decl.cc:10055 +#: cp/decl.cc:10106 #, fuzzy, gcc-internal-format #| msgid "virtual functions cannot be friends" msgid "a function concept cannot be constrained" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:10065 +#: cp/decl.cc:10116 #, gcc-internal-format msgid "constraints on a non-templated function" msgstr "" -#: cp/decl.cc:10110 +#: cp/decl.cc:10161 #, fuzzy, gcc-internal-format msgid "defining explicit specialization %qD in friend declaration" msgstr "ініцыялізацыя" -#: cp/decl.cc:10121 +#: cp/decl.cc:10172 #, fuzzy, gcc-internal-format msgid "invalid use of template-id %qD in declaration of primary template" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:10140 +#: cp/decl.cc:10191 #, gcc-internal-format msgid "default arguments are not allowed in declaration of friend template specialization %qD" msgstr "" -#: cp/decl.cc:10149 +#: cp/decl.cc:10200 #, gcc-internal-format msgid "% is not allowed in declaration of friend template specialization %qD" msgstr "" -#: cp/decl.cc:10166 +#: cp/decl.cc:10217 #, gcc-internal-format msgid "friend declaration of %qD specifies default arguments and isn%'t a definition" msgstr "" -#: cp/decl.cc:10211 +#: cp/decl.cc:10262 #, gcc-internal-format msgid "cannot declare %<::main%> to be a template" msgstr "" -#: cp/decl.cc:10214 +#: cp/decl.cc:10265 #, gcc-internal-format msgid "cannot declare %<::main%> to be inline" msgstr "" -#: cp/decl.cc:10217 cp/decl.cc:10220 +#: cp/decl.cc:10268 cp/decl.cc:10271 #, gcc-internal-format msgid "cannot declare %<::main%> to be %qs" msgstr "" -#: cp/decl.cc:10222 +#: cp/decl.cc:10273 #, gcc-internal-format msgid "cannot declare %<::main%> to be static" msgstr "" -#: cp/decl.cc:10284 +#: cp/decl.cc:10335 #, gcc-internal-format msgid "static member function %qD cannot have cv-qualifier" msgstr "" -#: cp/decl.cc:10285 +#: cp/decl.cc:10336 #, gcc-internal-format msgid "non-member function %qD cannot have cv-qualifier" msgstr "" -#: cp/decl.cc:10293 +#: cp/decl.cc:10344 #, gcc-internal-format msgid "static member function %qD cannot have ref-qualifier" msgstr "" -#: cp/decl.cc:10294 +#: cp/decl.cc:10345 #, gcc-internal-format msgid "non-member function %qD cannot have ref-qualifier" msgstr "" -#: cp/decl.cc:10306 +#: cp/decl.cc:10357 #, gcc-internal-format msgid "deduction guide %qD must be declared in the same scope as %qT" msgstr "" -#: cp/decl.cc:10314 +#: cp/decl.cc:10365 #, gcc-internal-format msgid "deduction guide %qD must have the same access as %qT" msgstr "" -#: cp/decl.cc:10320 +#: cp/decl.cc:10371 #, gcc-internal-format msgid "deduction guide %qD must not have a function body" msgstr "" -#: cp/decl.cc:10333 +#: cp/decl.cc:10384 #, gcc-internal-format msgid "literal operator with C linkage" msgstr "" -#: cp/decl.cc:10343 +#: cp/decl.cc:10394 #, fuzzy, gcc-internal-format msgid "%qD has invalid argument list" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:10351 +#: cp/decl.cc:10402 #, gcc-internal-format msgid "integer suffix %qs shadowed by implementation" msgstr "" -#: cp/decl.cc:10357 +#: cp/decl.cc:10408 #, gcc-internal-format msgid "floating-point suffix %qs shadowed by implementation" msgstr "" -#: cp/decl.cc:10364 +#: cp/decl.cc:10415 #, gcc-internal-format msgid "literal operator suffixes not preceded by %<_%> are reserved for future standardization" msgstr "" -#: cp/decl.cc:10369 +#: cp/decl.cc:10420 #, gcc-internal-format msgid "%qD must be a non-member function" msgstr "" -#: cp/decl.cc:10452 +#: cp/decl.cc:10503 #, fuzzy, gcc-internal-format #| msgid "`main' must return `int'" msgid "%<::main%> must return %" msgstr "`main' павінна вяртаць `int'" -#: cp/decl.cc:10492 +#: cp/decl.cc:10543 #, gcc-internal-format msgid "definition of implicitly-declared %qD" msgstr "" -#: cp/decl.cc:10497 +#: cp/decl.cc:10548 #, gcc-internal-format msgid "definition of explicitly-defaulted %q+D" msgstr "" -#: cp/decl.cc:10499 +#: cp/decl.cc:10550 #, fuzzy, gcc-internal-format msgid "%q#D explicitly defaulted here" msgstr "ініцыялізацыя" -#: cp/decl.cc:10516 +#: cp/decl.cc:10567 #, gcc-internal-format msgid "no %q#D member function declared in class %qT" msgstr "" -#: cp/decl.cc:10709 +#: cp/decl.cc:10760 #, gcc-internal-format msgid "cannot declare %<::main%> to be a global variable" msgstr "" -#: cp/decl.cc:10718 +#: cp/decl.cc:10769 #, fuzzy, gcc-internal-format msgid "a non-template variable cannot be %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:10724 +#: cp/decl.cc:10775 #, gcc-internal-format msgid "concept must be defined at namespace scope" msgstr "" -#: cp/decl.cc:10731 +#: cp/decl.cc:10782 #, gcc-internal-format msgid "concept must have type %" msgstr "" -#: cp/decl.cc:10734 +#: cp/decl.cc:10785 #, fuzzy, gcc-internal-format #| msgid "virtual functions cannot be friends" msgid "a variable concept cannot be constrained" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:10858 +#: cp/decl.cc:10909 #, gcc-internal-format msgid "in-class initialization of static data member %q#D of incomplete type" msgstr "" -#: cp/decl.cc:10862 +#: cp/decl.cc:10913 #, gcc-internal-format msgid "% needed for in-class initialization of static data member %q#D of non-integral type" msgstr "" -#: cp/decl.cc:10866 +#: cp/decl.cc:10917 #, gcc-internal-format msgid "in-class initialization of static data member %q#D of non-literal type" msgstr "" -#: cp/decl.cc:10877 +#: cp/decl.cc:10928 #, gcc-internal-format msgid "invalid in-class initialization of static data member of non-integral type %qT" msgstr "" -#: cp/decl.cc:10882 +#: cp/decl.cc:10933 #, gcc-internal-format msgid "ISO C++ forbids in-class initialization of non-const static member %qD" msgstr "" -#: cp/decl.cc:10887 +#: cp/decl.cc:10938 #, gcc-internal-format msgid "ISO C++ forbids initialization of member constant %qD of non-integral type %qT" msgstr "" -#: cp/decl.cc:10998 +#: cp/decl.cc:11049 #, fuzzy, gcc-internal-format #| msgid "size of array `%D' has non-integer type" msgid "size of array %qD has non-integral type %qT" msgstr "памер масіва `%D' не цэлалікавы тып" -#: cp/decl.cc:11001 +#: cp/decl.cc:11052 #, fuzzy, gcc-internal-format msgid "size of array has non-integral type %qT" msgstr "памер масіва \"%s\" адмоўны" -#: cp/decl.cc:11032 cp/decl.cc:11104 +#: cp/decl.cc:11083 cp/decl.cc:11155 #, fuzzy, gcc-internal-format msgid "size of array %qD is not an integral constant-expression" msgstr "памер масіва \"%s\" адмоўны" -#: cp/decl.cc:11036 cp/decl.cc:11107 +#: cp/decl.cc:11087 cp/decl.cc:11158 #, gcc-internal-format msgid "size of array is not an integral constant-expression" msgstr "" -#: cp/decl.cc:11087 +#: cp/decl.cc:11138 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids zero-size array %qD" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:11090 +#: cp/decl.cc:11141 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids zero-size array" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:11114 +#: cp/decl.cc:11165 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids variable length array %qD" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:11117 +#: cp/decl.cc:11168 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids variable length array" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:11123 +#: cp/decl.cc:11174 #, gcc-internal-format msgid "variable length array %qD is used" msgstr "" -#: cp/decl.cc:11126 +#: cp/decl.cc:11177 #, gcc-internal-format msgid "variable length array is used" msgstr "" -#: cp/decl.cc:11178 +#: cp/decl.cc:11229 #, gcc-internal-format msgid "overflow in array dimension" msgstr "" -#: cp/decl.cc:11238 +#: cp/decl.cc:11289 #, gcc-internal-format msgid "%qD declared as array of template placeholder type %qT" msgstr "" -#: cp/decl.cc:11241 +#: cp/decl.cc:11292 #, gcc-internal-format msgid "creating array of template placeholder type %qT" msgstr "" -#: cp/decl.cc:11251 +#: cp/decl.cc:11302 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "declaration of %qD as array of void" msgstr "абвяшчэньне `%#D'" -#: cp/decl.cc:11253 +#: cp/decl.cc:11304 #, gcc-internal-format msgid "creating array of void" msgstr "" -#: cp/decl.cc:11258 +#: cp/decl.cc:11309 #, gcc-internal-format msgid "declaration of %qD as array of functions" msgstr "" -#: cp/decl.cc:11260 +#: cp/decl.cc:11311 #, gcc-internal-format msgid "creating array of functions" msgstr "" -#: cp/decl.cc:11265 +#: cp/decl.cc:11316 #, gcc-internal-format msgid "declaration of %qD as array of references" msgstr "" -#: cp/decl.cc:11267 +#: cp/decl.cc:11318 #, gcc-internal-format msgid "creating array of references" msgstr "" -#: cp/decl.cc:11272 +#: cp/decl.cc:11323 #, gcc-internal-format msgid "declaration of %qD as array of function members" msgstr "" -#: cp/decl.cc:11275 +#: cp/decl.cc:11326 #, gcc-internal-format msgid "creating array of function members" msgstr "" -#: cp/decl.cc:11293 +#: cp/decl.cc:11344 #, gcc-internal-format msgid "declaration of %qD as multidimensional array must have bounds for all dimensions except the first" msgstr "" -#: cp/decl.cc:11297 +#: cp/decl.cc:11348 #, gcc-internal-format msgid "multidimensional array must have bounds for all dimensions except the first" msgstr "" -#: cp/decl.cc:11311 +#: cp/decl.cc:11362 #, gcc-internal-format msgid "variable-length array of %" msgstr "" -#: cp/decl.cc:11387 +#: cp/decl.cc:11438 #, gcc-internal-format msgid "return type specification for constructor invalid" msgstr "" -#: cp/decl.cc:11390 +#: cp/decl.cc:11441 #, fuzzy, gcc-internal-format msgid "qualifiers are not allowed on constructor declaration" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/decl.cc:11401 +#: cp/decl.cc:11452 #, gcc-internal-format msgid "return type specification for destructor invalid" msgstr "" -#: cp/decl.cc:11404 +#: cp/decl.cc:11455 #, fuzzy, gcc-internal-format msgid "qualifiers are not allowed on destructor declaration" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/decl.cc:11417 +#: cp/decl.cc:11468 #, gcc-internal-format msgid "return type specified for %" msgstr "" -#: cp/decl.cc:11420 +#: cp/decl.cc:11471 #, gcc-internal-format msgid "qualifiers are not allowed on declaration of %" msgstr "" -#: cp/decl.cc:11429 +#: cp/decl.cc:11480 #, gcc-internal-format msgid "return type specified for deduction guide" msgstr "" -#: cp/decl.cc:11432 +#: cp/decl.cc:11483 #, gcc-internal-format msgid "qualifiers are not allowed on declaration of deduction guide" msgstr "" -#: cp/decl.cc:11436 +#: cp/decl.cc:11487 #, gcc-internal-format msgid "template template parameter %qT in declaration of deduction guide" msgstr "" -#: cp/decl.cc:11445 +#: cp/decl.cc:11496 #, gcc-internal-format msgid "% in declaration of deduction guide" msgstr "" -#: cp/decl.cc:11466 +#: cp/decl.cc:11517 #, gcc-internal-format msgid "unnamed variable or field declared void" msgstr "" -#: cp/decl.cc:11474 +#: cp/decl.cc:11525 #, gcc-internal-format msgid "variable or field declared void" msgstr "" -#: cp/decl.cc:11489 +#: cp/decl.cc:11540 #, gcc-internal-format msgid "% specifier invalid for variable %qD declared at block scope" msgstr "" -#: cp/decl.cc:11494 +#: cp/decl.cc:11545 #, gcc-internal-format msgid "inline variables are only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/decl.cc:11550 +#: cp/decl.cc:11601 #, gcc-internal-format msgid "%qT as type rather than plain %" msgstr "" -#: cp/decl.cc:11556 +#: cp/decl.cc:11607 #, gcc-internal-format msgid "% cannot be cv-qualified" msgstr "" -#: cp/decl.cc:11772 +#: cp/decl.cc:11823 #, fuzzy, gcc-internal-format msgid "invalid use of qualified-name %<::%D%>" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:11775 cp/decl.cc:11797 +#: cp/decl.cc:11826 cp/decl.cc:11848 #, fuzzy, gcc-internal-format msgid "invalid use of qualified-name %<%T::%D%>" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:11778 +#: cp/decl.cc:11829 #, fuzzy, gcc-internal-format msgid "invalid use of qualified-name %<%D::%D%>" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:11788 +#: cp/decl.cc:11839 #, gcc-internal-format msgid "%q#T is not a class or namespace" msgstr "" -#: cp/decl.cc:11812 +#: cp/decl.cc:11863 #, fuzzy, gcc-internal-format msgid "declaration of %qE as non-function" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:11819 +#: cp/decl.cc:11870 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "declaration of %qE as non-member" msgstr "абвяшчэньне `%#D'" -#: cp/decl.cc:11847 +#: cp/decl.cc:11898 #, gcc-internal-format msgid "declarator-id missing; using reserved word %qD" msgstr "" -#: cp/decl.cc:11898 +#: cp/decl.cc:11949 #, gcc-internal-format msgid "function definition does not declare parameters" msgstr "" -#: cp/decl.cc:11906 cp/decl.cc:11915 cp/decl.cc:13724 +#: cp/decl.cc:11957 cp/decl.cc:11966 cp/decl.cc:13780 #, fuzzy, gcc-internal-format msgid "declaration of %qD as non-function" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:11923 +#: cp/decl.cc:11974 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "declaration of %qD as %" msgstr "абвяшчэньне `%#D'" -#: cp/decl.cc:11928 +#: cp/decl.cc:11979 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "declaration of %qD as parameter" msgstr "абвяшчэньне `%#D'" -#: cp/decl.cc:11963 +#: cp/decl.cc:12014 #, gcc-internal-format msgid "both %qs and %qs specified" msgstr "" -#: cp/decl.cc:11970 cp/decl.cc:11977 cp/decl.cc:11984 cp/decl.cc:11991 +#: cp/decl.cc:12021 cp/decl.cc:12028 cp/decl.cc:12035 cp/decl.cc:12042 #, fuzzy, gcc-internal-format #| msgid "`%s' is not at beginning of declaration" msgid "%qs cannot appear in a typedef declaration" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/decl.cc:12002 +#: cp/decl.cc:12053 #, gcc-internal-format msgid "can use at most one of the % and % specifiers" msgstr "" -#: cp/decl.cc:12012 +#: cp/decl.cc:12063 #, fuzzy, gcc-internal-format msgid "two or more data types in declaration of %qs" msgstr "пустое абвяшчэнне" -#: cp/decl.cc:12020 +#: cp/decl.cc:12071 #, fuzzy, gcc-internal-format #| msgid "conflicts with previous declaration `%#D'" msgid "conflicting specifiers in declaration of %qs" msgstr "канфлікт з папярэднім абвяшчэньнем `%#D'" -#: cp/decl.cc:12071 +#: cp/decl.cc:12122 #, fuzzy, gcc-internal-format #| msgid "ISO C does not support plain `complex' meaning `double complex'" msgid "ISO C++ does not support plain % meaning %" msgstr "ISO C не падтрымлівае просты \"complex\" у значэнні \"double complex\"" -#: cp/decl.cc:12120 cp/decl.cc:12124 cp/decl.cc:12127 +#: cp/decl.cc:12171 cp/decl.cc:12175 cp/decl.cc:12178 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids declaration of %qs with no type" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:12144 +#: cp/decl.cc:12195 #, fuzzy, gcc-internal-format #| msgid "__builtin_saveregs not supported by this target" msgid "%<__int%d%> is not supported by this target" msgstr "__buitin_saveregs не падтрымліваецца гэтай мэтай" -#: cp/decl.cc:12152 +#: cp/decl.cc:12203 #, fuzzy, gcc-internal-format #| msgid "ISO C++ does not support `long long'" msgid "ISO C++ does not support %<__int%d%> for %qs" msgstr "ISO C++ не падтрымлівае \"long long\"" -#: cp/decl.cc:12206 +#: cp/decl.cc:12257 #, gcc-internal-format msgid "% and % specified together" msgstr "" -#: cp/decl.cc:12212 +#: cp/decl.cc:12263 #, gcc-internal-format msgid "% and % specified together" msgstr "" -#: cp/decl.cc:12220 cp/decl.cc:12226 +#: cp/decl.cc:12271 cp/decl.cc:12277 #, gcc-internal-format msgid "%qs specified with %qT" msgstr "" -#: cp/decl.cc:12231 +#: cp/decl.cc:12284 #, gcc-internal-format msgid "%qs specified with %" msgstr "" -#: cp/decl.cc:12233 +#: cp/decl.cc:12286 #, gcc-internal-format msgid "%qs specified with %" msgstr "" -#: cp/decl.cc:12300 +#: cp/decl.cc:12353 #, fuzzy, gcc-internal-format #| msgid "complex invalid for `%s'" msgid "complex invalid for %qs" msgstr "complex нерэчаісны для \"%s\"" -#: cp/decl.cc:12339 +#: cp/decl.cc:12392 #, gcc-internal-format msgid "template placeholder type %qT must be followed by a simple declarator-id" msgstr "" -#: cp/decl.cc:12364 +#: cp/decl.cc:12417 #, gcc-internal-format msgid "member %qD cannot be declared both % and %" msgstr "" -#: cp/decl.cc:12373 +#: cp/decl.cc:12426 #, gcc-internal-format msgid "member %qD can be declared both % and % only in %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/decl.cc:12386 +#: cp/decl.cc:12439 #, gcc-internal-format msgid "typedef declaration invalid in parameter declaration" msgstr "" -#: cp/decl.cc:12393 +#: cp/decl.cc:12446 #, gcc-internal-format msgid "storage class specified for template parameter %qs" msgstr "" -#: cp/decl.cc:12403 cp/decl.cc:12575 +#: cp/decl.cc:12456 cp/decl.cc:12628 #, gcc-internal-format msgid "storage class specified for parameter %qs" msgstr "" -#: cp/decl.cc:12411 cp/decl.cc:12420 cp/decl.cc:12426 cp/decl.cc:12432 +#: cp/decl.cc:12464 cp/decl.cc:12473 cp/decl.cc:12479 cp/decl.cc:12485 #, fuzzy, gcc-internal-format msgid "a parameter cannot be declared %qs" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:12442 +#: cp/decl.cc:12495 #, fuzzy, gcc-internal-format #| msgid "Invalid declaration" msgid "% outside class declaration" msgstr "Нерэчаіснае абвяшчэнне" -#: cp/decl.cc:12452 cp/decl.cc:12455 cp/decl.cc:12457 cp/decl.cc:12460 -#: cp/decl.cc:12470 cp/decl.cc:12480 cp/decl.cc:12490 cp/decl.cc:12494 +#: cp/decl.cc:12505 cp/decl.cc:12508 cp/decl.cc:12510 cp/decl.cc:12513 +#: cp/decl.cc:12523 cp/decl.cc:12533 cp/decl.cc:12543 cp/decl.cc:12547 #, gcc-internal-format msgid "structured binding declaration cannot be %qs" msgstr "" -#: cp/decl.cc:12464 cp/decl.cc:12486 +#: cp/decl.cc:12517 cp/decl.cc:12539 #, gcc-internal-format msgid "structured binding declaration can be %qs only in %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/decl.cc:12474 +#: cp/decl.cc:12527 #, gcc-internal-format msgid "%-qualified structured binding is deprecated" msgstr "" -#: cp/decl.cc:12498 +#: cp/decl.cc:12551 #, gcc-internal-format msgid "structured binding declaration cannot be C++98 %" msgstr "" -#: cp/decl.cc:12509 +#: cp/decl.cc:12562 #, gcc-internal-format msgid "structured binding declaration cannot have type %qT" msgstr "" -#: cp/decl.cc:12512 +#: cp/decl.cc:12565 #, gcc-internal-format msgid "type must be cv-qualified % or reference to cv-qualified %" msgstr "" -#: cp/decl.cc:12547 +#: cp/decl.cc:12600 #, fuzzy, gcc-internal-format #| msgid "duplicate label declaration `%s'" msgid "multiple storage classes in declaration of %qs" msgstr "паўторнае абвяшчэньне адмеціны `%s'" -#: cp/decl.cc:12573 +#: cp/decl.cc:12626 #, gcc-internal-format msgid "storage class specified for %qs" msgstr "" -#: cp/decl.cc:12587 +#: cp/decl.cc:12640 #, gcc-internal-format msgid "nested function %qs declared %" msgstr "" -#: cp/decl.cc:12592 +#: cp/decl.cc:12645 #, gcc-internal-format msgid "top-level declaration of %qs specifies %" msgstr "" -#: cp/decl.cc:12600 +#: cp/decl.cc:12653 #, gcc-internal-format msgid "function-scope %qs implicitly auto and declared %<__thread%>" msgstr "" -#: cp/decl.cc:12614 +#: cp/decl.cc:12667 #, gcc-internal-format msgid "storage class specifiers invalid in friend function declarations" msgstr "" -#: cp/decl.cc:12645 cp/decl.cc:14096 cp/parser.cc:14829 cp/parser.cc:20643 -#: cp/parser.cc:27041 +#: cp/decl.cc:12698 cp/decl.cc:14152 cp/parser.cc:14829 cp/parser.cc:20652 +#: cp/parser.cc:27053 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "attribute ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: cp/decl.cc:12646 +#: cp/decl.cc:12699 #, gcc-internal-format msgid "an attribute that appertains to a type-specifier is ignored" msgstr "" -#: cp/decl.cc:12704 +#: cp/decl.cc:12757 #, fuzzy, gcc-internal-format msgid "unnecessary parentheses in declaration of %qs" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:12710 +#: cp/decl.cc:12763 #, gcc-internal-format msgid "remove parentheses" msgstr "" -#: cp/decl.cc:12759 +#: cp/decl.cc:12812 #, gcc-internal-format msgid "requires-clause on return type" msgstr "" -#: cp/decl.cc:12779 +#: cp/decl.cc:12832 #, gcc-internal-format msgid "%qs function uses % type specifier without trailing return type" msgstr "" -#: cp/decl.cc:12783 +#: cp/decl.cc:12836 #, gcc-internal-format msgid "deduced return type only available with %<-std=c++14%> or %<-std=gnu++14%>" msgstr "" -#: cp/decl.cc:12788 +#: cp/decl.cc:12841 #, fuzzy, gcc-internal-format #| msgid "virtual functions cannot be friends" msgid "virtual function cannot have deduced return type" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:12795 +#: cp/decl.cc:12848 #, gcc-internal-format msgid "%qs function with trailing return type has %qT as its type rather than plain %" msgstr "" -#: cp/decl.cc:12804 +#: cp/decl.cc:12857 #, gcc-internal-format msgid "%qs function with trailing return type has % as its type rather than plain %" msgstr "" -#: cp/decl.cc:12809 +#: cp/decl.cc:12862 #, fuzzy, gcc-internal-format msgid "invalid use of %" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:12820 +#: cp/decl.cc:12873 #, gcc-internal-format msgid "deduced class type %qD in function return type" msgstr "" -#: cp/decl.cc:12829 +#: cp/decl.cc:12882 #, gcc-internal-format msgid "deduction guide for %qT must have trailing return type" msgstr "" -#: cp/decl.cc:12842 +#: cp/decl.cc:12895 #, gcc-internal-format msgid "trailing return type %qT of deduction guide is not a specialization of %qT" msgstr "" -#: cp/decl.cc:12856 +#: cp/decl.cc:12909 #, gcc-internal-format msgid "trailing return type only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/decl.cc:12859 +#: cp/decl.cc:12912 #, gcc-internal-format msgid "%qs function with trailing return type not declared with % type specifier" msgstr "" -#: cp/decl.cc:12883 +#: cp/decl.cc:12919 +#, gcc-internal-format +msgid "a conversion function cannot have a trailing return type" +msgstr "" + +#: cp/decl.cc:12941 #, gcc-internal-format msgid "%-qualified return type is deprecated" msgstr "" -#: cp/decl.cc:12895 +#: cp/decl.cc:12953 #, fuzzy, gcc-internal-format #| msgid "`%s' undeclared (first use in this function)" msgid "%qs declared as function returning a function" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:12901 +#: cp/decl.cc:12959 #, gcc-internal-format msgid "%qs declared as function returning an array" msgstr "" -#: cp/decl.cc:12908 +#: cp/decl.cc:12966 #, gcc-internal-format msgid "% on function return type is not allowed" msgstr "" -#: cp/decl.cc:12941 +#: cp/decl.cc:12999 #, gcc-internal-format msgid "destructor cannot be static member function" msgstr "" -#: cp/decl.cc:12943 +#: cp/decl.cc:13001 #, gcc-internal-format msgid "constructor cannot be static member function" msgstr "" -#: cp/decl.cc:12948 +#: cp/decl.cc:13006 #, gcc-internal-format msgid "destructors may not be cv-qualified" msgstr "" -#: cp/decl.cc:12949 +#: cp/decl.cc:13007 #, gcc-internal-format msgid "constructors may not be cv-qualified" msgstr "" -#: cp/decl.cc:12957 +#: cp/decl.cc:13015 #, gcc-internal-format msgid "destructors may not be ref-qualified" msgstr "" -#: cp/decl.cc:12958 +#: cp/decl.cc:13016 #, gcc-internal-format msgid "constructors may not be ref-qualified" msgstr "" -#: cp/decl.cc:12976 +#: cp/decl.cc:13034 #, fuzzy, gcc-internal-format msgid "constructors cannot be declared %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:12993 +#: cp/decl.cc:13051 #, gcc-internal-format msgid "virtual functions cannot be friends" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:12998 +#: cp/decl.cc:13056 #, gcc-internal-format msgid "friend declaration not in class definition" msgstr "" -#: cp/decl.cc:13002 +#: cp/decl.cc:13060 #, fuzzy, gcc-internal-format msgid "cannot define friend function %qs in a local class definition" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl.cc:13012 +#: cp/decl.cc:13070 #, gcc-internal-format msgid "friend function definition %qs cannot have a name qualified with %<::%>" msgstr "" -#: cp/decl.cc:13016 +#: cp/decl.cc:13074 #, gcc-internal-format msgid "friend function definition %qs cannot have a name qualified with %<%D::%>" msgstr "" -#: cp/decl.cc:13029 -#, gcc-internal-format -msgid "a conversion function cannot have a trailing return type" -msgstr "" - -#: cp/decl.cc:13056 +#: cp/decl.cc:13112 #, gcc-internal-format msgid "destructors may not have parameters" msgstr "" -#: cp/decl.cc:13096 +#: cp/decl.cc:13152 #, fuzzy, gcc-internal-format msgid "cannot declare pointer to %q#T" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:13109 cp/decl.cc:13116 +#: cp/decl.cc:13165 cp/decl.cc:13172 #, fuzzy, gcc-internal-format msgid "cannot declare reference to %q#T" msgstr "Не магу знайсці файл для класа %s." -#: cp/decl.cc:13118 +#: cp/decl.cc:13174 #, gcc-internal-format msgid "cannot declare pointer to %q#T member" msgstr "" -#: cp/decl.cc:13147 +#: cp/decl.cc:13203 #, gcc-internal-format msgid "cannot declare reference to qualified function type %qT" msgstr "" -#: cp/decl.cc:13148 +#: cp/decl.cc:13204 #, fuzzy, gcc-internal-format msgid "cannot declare pointer to qualified function type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:13221 +#: cp/decl.cc:13277 #, gcc-internal-format msgid "cannot declare reference to %q#T, which is not a typedef or a template type argument" msgstr "" -#: cp/decl.cc:13301 +#: cp/decl.cc:13357 #, gcc-internal-format msgid "template-id %qD used as a declarator" msgstr "" -#: cp/decl.cc:13327 +#: cp/decl.cc:13383 #, gcc-internal-format msgid "member functions are implicitly friends of their class" msgstr "" -#: cp/decl.cc:13332 +#: cp/decl.cc:13388 #, gcc-internal-format msgid "extra qualification %<%T::%> on member %qs" msgstr "" -#: cp/decl.cc:13362 +#: cp/decl.cc:13418 #, gcc-internal-format msgid "cannot define member function %<%T::%s%> within %qT" msgstr "" -#: cp/decl.cc:13364 +#: cp/decl.cc:13420 #, gcc-internal-format msgid "cannot declare member function %<%T::%s%> within %qT" msgstr "" -#: cp/decl.cc:13372 +#: cp/decl.cc:13428 #, gcc-internal-format msgid "cannot declare member %<%T::%s%> within %qT" msgstr "" -#: cp/decl.cc:13412 +#: cp/decl.cc:13468 #, gcc-internal-format msgid "non-parameter %qs cannot be a parameter pack" msgstr "" -#: cp/decl.cc:13421 +#: cp/decl.cc:13477 #, gcc-internal-format msgid "data member may not have variably modified type %qT" msgstr "" -#: cp/decl.cc:13424 +#: cp/decl.cc:13480 #, gcc-internal-format msgid "parameter may not have variably modified type %qT" msgstr "" -#: cp/decl.cc:13435 +#: cp/decl.cc:13491 #, fuzzy, gcc-internal-format #| msgid "duplicate label declaration `%s'" msgid "% outside class declaration" msgstr "паўторнае абвяшчэньне адмеціны `%s'" -#: cp/decl.cc:13438 +#: cp/decl.cc:13494 #, fuzzy, gcc-internal-format msgid "% in friend declaration" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:13441 +#: cp/decl.cc:13497 #, gcc-internal-format msgid "only declarations of constructors and conversion operators can be %" msgstr "" -#: cp/decl.cc:13451 +#: cp/decl.cc:13507 #, fuzzy, gcc-internal-format msgid "non-member %qs cannot be declared %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:13458 +#: cp/decl.cc:13514 #, gcc-internal-format msgid "non-object member %qs cannot be declared %" msgstr "" -#: cp/decl.cc:13464 +#: cp/decl.cc:13520 #, fuzzy, gcc-internal-format msgid "function %qs cannot be declared %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:13470 +#: cp/decl.cc:13526 #, gcc-internal-format msgid "% %qs cannot be declared %" msgstr "" -#: cp/decl.cc:13476 +#: cp/decl.cc:13532 #, fuzzy, gcc-internal-format msgid "% %qs cannot be declared %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:13482 +#: cp/decl.cc:13538 #, fuzzy, gcc-internal-format msgid "reference %qs cannot be declared %" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:13498 +#: cp/decl.cc:13554 #, gcc-internal-format msgid "typedef may not be a function definition" msgstr "" -#: cp/decl.cc:13501 +#: cp/decl.cc:13557 #, gcc-internal-format msgid "typedef may not be a member function definition" msgstr "" -#: cp/decl.cc:13527 +#: cp/decl.cc:13583 #, fuzzy, gcc-internal-format msgid "% not allowed in alias declaration" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/decl.cc:13530 +#: cp/decl.cc:13586 #, gcc-internal-format msgid "typedef declared %" msgstr "" -#: cp/decl.cc:13535 +#: cp/decl.cc:13591 #, gcc-internal-format msgid "requires-clause on typedef" msgstr "" -#: cp/decl.cc:13539 +#: cp/decl.cc:13595 #, gcc-internal-format msgid "typedef name may not be a nested-name-specifier" msgstr "" -#: cp/decl.cc:13565 +#: cp/decl.cc:13621 #, gcc-internal-format msgid "ISO C++ forbids nested type %qD with same name as enclosing class" msgstr "" -#: cp/decl.cc:13654 +#: cp/decl.cc:13710 #, fuzzy, gcc-internal-format msgid "% specified for friend class declaration" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:13662 +#: cp/decl.cc:13718 #, fuzzy, gcc-internal-format msgid "template parameters cannot be friends" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:13664 +#: cp/decl.cc:13720 #, gcc-internal-format msgid "friend declaration requires class-key, i.e. %" msgstr "" -#: cp/decl.cc:13668 +#: cp/decl.cc:13724 #, gcc-internal-format msgid "friend declaration requires class-key, i.e. %" msgstr "" -#: cp/decl.cc:13681 +#: cp/decl.cc:13737 #, gcc-internal-format msgid "trying to make class %qT a friend of global scope" msgstr "" -#: cp/decl.cc:13701 +#: cp/decl.cc:13757 #, gcc-internal-format msgid "invalid qualifiers on non-member function type" msgstr "" -#: cp/decl.cc:13705 +#: cp/decl.cc:13761 #, gcc-internal-format msgid "requires-clause on type-id" msgstr "" -#: cp/decl.cc:13715 +#: cp/decl.cc:13771 #, gcc-internal-format msgid "abstract declarator %qT used as declaration" msgstr "" -#: cp/decl.cc:13730 +#: cp/decl.cc:13786 #, fuzzy, gcc-internal-format msgid "requires-clause on declaration of non-function type %qT" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:13749 +#: cp/decl.cc:13805 #, fuzzy, gcc-internal-format msgid "cannot use %<::%> in parameter declaration" msgstr "Не магу знайсці дэкларацыю пратакола для \"%s\"" -#: cp/decl.cc:13758 cp/parser.cc:20077 +#: cp/decl.cc:13814 cp/parser.cc:20086 #, gcc-internal-format msgid "cannot declare a parameter with %" msgstr "" -#: cp/decl.cc:13763 +#: cp/decl.cc:13819 #, gcc-internal-format msgid "class template placeholder %qE not permitted in this context" msgstr "" -#: cp/decl.cc:13766 +#: cp/decl.cc:13822 #, fuzzy, gcc-internal-format msgid "use % for an abbreviated function template" msgstr "\"%s\" звычайна функцыя" -#: cp/decl.cc:13771 +#: cp/decl.cc:13827 #, gcc-internal-format msgid "% parameter not permitted in this context" msgstr "" -#: cp/decl.cc:13774 +#: cp/decl.cc:13830 #, fuzzy, gcc-internal-format msgid "parameter declared %" msgstr "тып параметра \"%s\" не аб'яўлены" -#: cp/decl.cc:13825 cp/parser.cc:3483 +#: cp/decl.cc:13881 cp/parser.cc:3483 #, fuzzy, gcc-internal-format msgid "invalid use of template-name %qE without an argument list" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:13829 +#: cp/decl.cc:13885 #, gcc-internal-format msgid "non-static data member declared with placeholder %qT" msgstr "" -#: cp/decl.cc:13850 +#: cp/decl.cc:13906 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids flexible array member %qs" msgstr "ISO C не дазваляе дэкларацыі метак (label)" -#: cp/decl.cc:13853 +#: cp/decl.cc:13909 #, fuzzy, gcc-internal-format msgid "ISO C++ forbids flexible array members" msgstr "ISO C не дазваляе дэкларацыі метак (label)" #. Something like struct S { int N::j; }; -#: cp/decl.cc:13869 +#: cp/decl.cc:13925 #, fuzzy, gcc-internal-format #| msgid "invalid use of `::'" msgid "invalid use of %<::%>" msgstr "нерэчаіснае выкарыстаньне `::'" -#: cp/decl.cc:13890 +#: cp/decl.cc:13946 #, fuzzy, gcc-internal-format msgid "declaration of function %qD in invalid context" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:13900 +#: cp/decl.cc:13956 #, fuzzy, gcc-internal-format msgid "function %qD declared % inside a union" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:13910 +#: cp/decl.cc:13966 #, gcc-internal-format msgid "%qD cannot be declared %, since it is always static" msgstr "" -#: cp/decl.cc:13924 +#: cp/decl.cc:13980 #, gcc-internal-format msgid "expected qualified name in friend declaration for destructor %qD" msgstr "" -#: cp/decl.cc:13931 +#: cp/decl.cc:13987 #, fuzzy, gcc-internal-format #| msgid "declaration of template `%#D'" msgid "declaration of %qD as member of %qT" msgstr "абвяшчэньне шаблёну `%#D'" -#: cp/decl.cc:13938 cp/decl.cc:13951 +#: cp/decl.cc:13994 cp/decl.cc:14007 #, gcc-internal-format msgid "a destructor cannot be %qs" msgstr "" -#: cp/decl.cc:13957 +#: cp/decl.cc:14013 #, gcc-internal-format msgid "expected qualified name in friend declaration for constructor %qD" msgstr "" -#: cp/decl.cc:13966 +#: cp/decl.cc:14022 #, gcc-internal-format msgid "a constructor cannot be %" msgstr "" -#: cp/decl.cc:13972 +#: cp/decl.cc:14028 #, fuzzy, gcc-internal-format msgid "a concept cannot be a member function" msgstr "\"%s\" звычайна функцыя" -#: cp/decl.cc:13980 cp/decl.cc:14326 +#: cp/decl.cc:14036 cp/decl.cc:14382 #, fuzzy, gcc-internal-format #| msgid "[cannot find %s]" msgid "%qD cannot be %qs" msgstr "[нельга знайсці %s]" -#: cp/decl.cc:13989 +#: cp/decl.cc:14045 #, gcc-internal-format msgid "specialization of variable template %qD declared as function" msgstr "" -#: cp/decl.cc:13992 +#: cp/decl.cc:14048 #, fuzzy, gcc-internal-format msgid "variable template declared here" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/decl.cc:14054 +#: cp/decl.cc:14110 #, fuzzy, gcc-internal-format msgid "field %qD has incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:14059 +#: cp/decl.cc:14115 #, fuzzy, gcc-internal-format msgid "name %qT has incomplete type" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:14079 +#: cp/decl.cc:14135 #, fuzzy, gcc-internal-format msgid "%qE is neither function nor member function; cannot be declared friend" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl.cc:14082 +#: cp/decl.cc:14138 #, gcc-internal-format msgid "unnamed field is neither function nor member function; cannot be declared friend" msgstr "" -#: cp/decl.cc:14097 cp/parser.cc:20644 cp/parser.cc:27042 +#: cp/decl.cc:14153 cp/parser.cc:20653 cp/parser.cc:27054 #, gcc-internal-format msgid "an attribute that appertains to a friend declaration that is not a definition is ignored" msgstr "" -#: cp/decl.cc:14143 cp/decl.cc:14154 +#: cp/decl.cc:14199 cp/decl.cc:14210 #, gcc-internal-format msgid "static data member %qE declared %qs" msgstr "" -#: cp/decl.cc:14148 +#: cp/decl.cc:14204 #, gcc-internal-format msgid "% static data member %qD must have an initializer" msgstr "" -#: cp/decl.cc:14193 cp/decl.cc:14201 cp/decl.cc:14208 cp/decl.cc:14215 +#: cp/decl.cc:14249 cp/decl.cc:14257 cp/decl.cc:14264 cp/decl.cc:14271 #, gcc-internal-format msgid "non-static data member %qE declared %qs" msgstr "" -#: cp/decl.cc:14267 +#: cp/decl.cc:14323 #, gcc-internal-format msgid "storage class % invalid for function %qs" msgstr "" -#: cp/decl.cc:14270 +#: cp/decl.cc:14326 #, gcc-internal-format msgid "storage class % invalid for function %qs" msgstr "" -#: cp/decl.cc:14276 +#: cp/decl.cc:14332 #, gcc-internal-format msgid "storage class %<__thread%> invalid for function %qs" msgstr "" -#: cp/decl.cc:14280 +#: cp/decl.cc:14336 #, gcc-internal-format msgid "storage class % invalid for function %qs" msgstr "" -#: cp/decl.cc:14285 +#: cp/decl.cc:14341 #, gcc-internal-format msgid "virt-specifiers in %qs not allowed outside a class definition" msgstr "" -#: cp/decl.cc:14297 +#: cp/decl.cc:14353 #, gcc-internal-format msgid "% specifier invalid for function %qs declared out of global scope" msgstr "" -#: cp/decl.cc:14301 +#: cp/decl.cc:14357 #, gcc-internal-format msgid "% specifier invalid for function %qs declared out of global scope" msgstr "" -#: cp/decl.cc:14309 +#: cp/decl.cc:14365 #, gcc-internal-format msgid "virtual non-class function %qs" msgstr "" -#: cp/decl.cc:14316 +#: cp/decl.cc:14372 #, gcc-internal-format msgid "%qs defined in a non-class scope" msgstr "" -#: cp/decl.cc:14317 +#: cp/decl.cc:14373 #, fuzzy, gcc-internal-format msgid "%qs declared in a non-class scope" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:14360 +#: cp/decl.cc:14416 #, gcc-internal-format msgid "cannot declare member function %qD to have static linkage" msgstr "" -#: cp/decl.cc:14369 +#: cp/decl.cc:14425 #, gcc-internal-format msgid "cannot declare static function inside another function" msgstr "" -#: cp/decl.cc:14410 +#: cp/decl.cc:14466 #, gcc-internal-format msgid "% may not be used when defining (as opposed to declaring) a static data member" msgstr "" -#: cp/decl.cc:14417 +#: cp/decl.cc:14473 #, gcc-internal-format msgid "static member %qD declared %" msgstr "" -#: cp/decl.cc:14423 +#: cp/decl.cc:14479 #, gcc-internal-format msgid "cannot explicitly declare member %q#D to have extern linkage" msgstr "" -#: cp/decl.cc:14431 +#: cp/decl.cc:14487 #, gcc-internal-format msgid "declaration of % variable %qD is not a definition" msgstr "" -#: cp/decl.cc:14438 +#: cp/decl.cc:14494 #, gcc-internal-format msgid "a variable cannot be declared %" msgstr "" -#: cp/decl.cc:14458 +#: cp/decl.cc:14514 #, fuzzy, gcc-internal-format msgid "declaration of %q#D has no initializer" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl.cc:14470 +#: cp/decl.cc:14526 #, gcc-internal-format msgid "%qs initialized and declared %" msgstr "" -#: cp/decl.cc:14475 +#: cp/decl.cc:14531 #, gcc-internal-format msgid "%qs has both % and initializer" msgstr "" -#: cp/decl.cc:14655 +#: cp/decl.cc:14711 #, fuzzy, gcc-internal-format msgid "default argument %qE uses %qD" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/decl.cc:14658 +#: cp/decl.cc:14714 #, fuzzy, gcc-internal-format msgid "default argument %qE uses local variable %qD" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/decl.cc:14785 +#: cp/decl.cc:14841 #, fuzzy, gcc-internal-format msgid "invalid use of cv-qualified type %qT in parameter declaration" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:14789 +#: cp/decl.cc:14845 #, fuzzy, gcc-internal-format msgid "invalid use of type % in parameter declaration" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:14818 +#: cp/decl.cc:14874 #, gcc-internal-format msgid "%-qualified parameter is deprecated" msgstr "" -#: cp/decl.cc:14826 +#: cp/decl.cc:14882 #, fuzzy, gcc-internal-format msgid "parameter %qD invalidly declared method type" msgstr "тып параметра \"%s\" не аб'яўлены" -#: cp/decl.cc:14851 +#: cp/decl.cc:14907 #, gcc-internal-format msgid "parameter %qD includes pointer to array of unknown bound %qT" msgstr "" -#: cp/decl.cc:14853 +#: cp/decl.cc:14909 #, gcc-internal-format msgid "parameter %qD includes reference to array of unknown bound %qT" msgstr "" -#: cp/decl.cc:15114 +#: cp/decl.cc:15168 #, gcc-internal-format msgid "invalid constructor; you probably meant %<%T (const %T&)%>" msgstr "" -#: cp/decl.cc:15193 +#: cp/decl.cc:15247 #, fuzzy, gcc-internal-format msgid "%qD may not be declared within a namespace" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:15200 +#: cp/decl.cc:15254 #, fuzzy, gcc-internal-format msgid "%qD may not be declared as static" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl.cc:15230 +#: cp/decl.cc:15284 #, gcc-internal-format msgid "%qD must be a non-static member function" msgstr "" -#: cp/decl.cc:15236 +#: cp/decl.cc:15290 #, gcc-internal-format msgid "%qD must be either a non-static member function or a non-member function" msgstr "" -#: cp/decl.cc:15246 +#: cp/decl.cc:15300 #, gcc-internal-format msgid "%qD must have an argument of class or enumerated type" msgstr "" #. 13.4.0.3 -#: cp/decl.cc:15272 +#: cp/decl.cc:15326 #, gcc-internal-format msgid "ISO C++ prohibits overloading %" msgstr "" -#: cp/decl.cc:15286 +#: cp/decl.cc:15340 #, gcc-internal-format msgid "%qD must not have variable number of arguments" msgstr "" -#: cp/decl.cc:15312 +#: cp/decl.cc:15366 #, gcc-internal-format msgid "%qD must have either zero or one argument" msgstr "" -#: cp/decl.cc:15313 +#: cp/decl.cc:15367 #, gcc-internal-format msgid "%qD must have either one or two arguments" msgstr "" -#: cp/decl.cc:15325 +#: cp/decl.cc:15379 #, gcc-internal-format msgid "postfix %qD must have % as its argument" msgstr "" -#: cp/decl.cc:15326 +#: cp/decl.cc:15380 #, gcc-internal-format msgid "postfix %qD must have % as its second argument" msgstr "" -#: cp/decl.cc:15337 +#: cp/decl.cc:15391 #, fuzzy, gcc-internal-format #| msgid "no arguments" msgid "%qD must have no arguments" msgstr "няма аргументаў" -#: cp/decl.cc:15338 cp/decl.cc:15350 +#: cp/decl.cc:15392 cp/decl.cc:15404 #, gcc-internal-format msgid "%qD must have exactly one argument" msgstr "" -#: cp/decl.cc:15351 +#: cp/decl.cc:15405 #, gcc-internal-format msgid "%qD must have exactly two arguments" msgstr "" -#: cp/decl.cc:15366 +#: cp/decl.cc:15420 #, fuzzy, gcc-internal-format msgid "%qD cannot have default arguments" msgstr "нехапае аргументаў у функцыі \"%s\"" -#: cp/decl.cc:15390 +#: cp/decl.cc:15444 #, gcc-internal-format msgid "converting %qT to % will never use a type conversion operator" msgstr "" -#: cp/decl.cc:15397 +#: cp/decl.cc:15451 #, gcc-internal-format msgid "converting %qT to a reference to the same type will never use a type conversion operator" msgstr "" -#: cp/decl.cc:15399 +#: cp/decl.cc:15453 #, gcc-internal-format msgid "converting %qT to the same type will never use a type conversion operator" msgstr "" -#: cp/decl.cc:15408 +#: cp/decl.cc:15462 #, gcc-internal-format msgid "converting %qT to a reference to a base class %qT will never use a type conversion operator" msgstr "" -#: cp/decl.cc:15410 +#: cp/decl.cc:15464 #, gcc-internal-format msgid "converting %qT to a base class %qT will never use a type conversion operator" msgstr "" -#: cp/decl.cc:15426 +#: cp/decl.cc:15480 #, gcc-internal-format msgid "user-defined %qD always evaluates both arguments" msgstr "" -#: cp/decl.cc:15445 +#: cp/decl.cc:15499 #, gcc-internal-format msgid "prefix %qD should return %qT" msgstr "" -#: cp/decl.cc:15452 +#: cp/decl.cc:15506 #, gcc-internal-format msgid "postfix %qD should return %qT" msgstr "" -#: cp/decl.cc:15464 +#: cp/decl.cc:15518 #, gcc-internal-format msgid "%qD should return by value" msgstr "" -#: cp/decl.cc:15519 +#: cp/decl.cc:15573 #, fuzzy, gcc-internal-format msgid "using template type parameter %qT after %qs" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/decl.cc:15542 +#: cp/decl.cc:15596 #, gcc-internal-format msgid "using alias template specialization %qT after %qs" msgstr "" -#: cp/decl.cc:15545 +#: cp/decl.cc:15599 #, gcc-internal-format msgid "using typedef-name %qD after %qs" msgstr "" -#: cp/decl.cc:15547 +#: cp/decl.cc:15601 #, fuzzy, gcc-internal-format #| msgid "this is a previous declaration" msgid "%qD has a previous declaration here" msgstr "гэта папярэдняе абвяшчэньне" -#: cp/decl.cc:15555 +#: cp/decl.cc:15609 #, gcc-internal-format msgid "%qT referred to as %qs" msgstr "" -#: cp/decl.cc:15556 cp/decl.cc:15563 +#: cp/decl.cc:15610 cp/decl.cc:15617 #, fuzzy, gcc-internal-format #| msgid "this is a previous declaration" msgid "%qT has a previous declaration here" msgstr "гэта папярэдняе абвяшчэньне" -#: cp/decl.cc:15562 +#: cp/decl.cc:15616 #, gcc-internal-format msgid "%qT referred to as enum" msgstr "" @@ -54190,111 +54204,111 @@ msgstr "" #. void f(class C); // No template header here #. #. then the required template argument is missing. -#: cp/decl.cc:15577 +#: cp/decl.cc:15631 #, fuzzy, gcc-internal-format msgid "template argument required for %<%s %T%>" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/decl.cc:15620 cp/name-lookup.cc:5731 cp/name-lookup.cc:5863 -#: cp/parser.cc:6931 cp/parser.cc:30630 +#: cp/decl.cc:15674 cp/name-lookup.cc:5717 cp/name-lookup.cc:5849 +#: cp/parser.cc:6931 cp/parser.cc:30646 #, fuzzy, gcc-internal-format msgid "reference to %qD is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/decl.cc:15629 +#: cp/decl.cc:15683 #, gcc-internal-format msgid "class template %qD redeclared as non-template" msgstr "" -#: cp/decl.cc:15651 cp/name-lookup.cc:5421 +#: cp/decl.cc:15705 cp/name-lookup.cc:5407 #, gcc-internal-format msgid "%qD has the same name as the class in which it is declared" msgstr "" -#: cp/decl.cc:15679 cp/friend.cc:315 cp/parser.cc:3308 cp/parser.cc:6636 -#: cp/pt.cc:9848 +#: cp/decl.cc:15733 cp/friend.cc:315 cp/parser.cc:3308 cp/parser.cc:6636 +#: cp/pt.cc:9878 #, fuzzy, gcc-internal-format msgid "%qT is not a template" msgstr "\"%s\" мае незавершаны тып" -#: cp/decl.cc:15684 +#: cp/decl.cc:15738 #, gcc-internal-format msgid "perhaps you want to explicitly add %<%T::%>" msgstr "" -#: cp/decl.cc:15789 +#: cp/decl.cc:15843 #, fuzzy, gcc-internal-format msgid "use of enum %q#D without previous declaration" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: cp/decl.cc:15820 +#: cp/decl.cc:15874 #, fuzzy, gcc-internal-format #| msgid "declaration of template `%#D'" msgid "redeclaration of %qT as a non-template" msgstr "абвяшчэньне шаблёну `%#D'" -#: cp/decl.cc:15831 cp/semantics.cc:3463 +#: cp/decl.cc:15885 cp/semantics.cc:3479 #, gcc-internal-format msgid "cannot declare %qD in a different module" msgstr "" -#: cp/decl.cc:15947 +#: cp/decl.cc:16001 #, gcc-internal-format msgid "derived union %qT invalid" msgstr "" -#: cp/decl.cc:15954 +#: cp/decl.cc:16008 #, gcc-internal-format msgid "%qT defined with multiple direct bases" msgstr "" -#: cp/decl.cc:15965 +#: cp/decl.cc:16019 #, gcc-internal-format msgid "%qT defined with direct virtual base" msgstr "" -#: cp/decl.cc:15990 +#: cp/decl.cc:16044 #, gcc-internal-format msgid "base type %qT fails to be a struct or class type" msgstr "" -#: cp/decl.cc:16020 +#: cp/decl.cc:16074 #, gcc-internal-format msgid "recursive type %qT undefined" msgstr "" -#: cp/decl.cc:16022 +#: cp/decl.cc:16076 #, fuzzy, gcc-internal-format msgid "duplicate base type %qT invalid" msgstr "паўтарэнне \"restrict\"" -#: cp/decl.cc:16167 +#: cp/decl.cc:16221 #, gcc-internal-format msgid "scoped/unscoped mismatch in enum %q#T" msgstr "" -#: cp/decl.cc:16170 cp/decl.cc:16178 cp/decl.cc:16188 cp/decl.cc:16784 -#: cp/parser.cc:20992 +#: cp/decl.cc:16224 cp/decl.cc:16232 cp/decl.cc:16242 cp/decl.cc:16838 +#: cp/parser.cc:21001 #, gcc-internal-format msgid "previous definition here" msgstr "папярэдняе вызначэньне" -#: cp/decl.cc:16175 +#: cp/decl.cc:16229 #, gcc-internal-format msgid "underlying type mismatch in enum %q#T" msgstr "" -#: cp/decl.cc:16185 +#: cp/decl.cc:16239 #, gcc-internal-format msgid "different underlying type in enum %q#T" msgstr "" -#: cp/decl.cc:16196 +#: cp/decl.cc:16250 #, gcc-internal-format msgid "cannot define %qD in different module" msgstr "" -#: cp/decl.cc:16270 +#: cp/decl.cc:16324 #, gcc-internal-format msgid "underlying type %qT of %qT must be an integral type" msgstr "" @@ -54303,78 +54317,78 @@ msgstr "" #. #. IF no integral type can represent all the enumerator values, the #. enumeration is ill-formed. -#: cp/decl.cc:16417 +#: cp/decl.cc:16471 #, gcc-internal-format msgid "no integral type can represent all of the enumerator values for %qT" msgstr "" -#: cp/decl.cc:16592 +#: cp/decl.cc:16646 #, gcc-internal-format msgid "enumerator value for %qD must have integral or unscoped enumeration type" msgstr "" -#: cp/decl.cc:16602 +#: cp/decl.cc:16656 #, fuzzy, gcc-internal-format msgid "enumerator value for %qD is not an integer constant" msgstr "памер масіва \"%s\" адмоўны" -#: cp/decl.cc:16651 +#: cp/decl.cc:16705 #, gcc-internal-format msgid "incremented enumerator value is too large for %" msgstr "" -#: cp/decl.cc:16652 +#: cp/decl.cc:16706 #, gcc-internal-format msgid "incremented enumerator value is too large for %" msgstr "" -#: cp/decl.cc:16663 +#: cp/decl.cc:16717 #, gcc-internal-format msgid "overflow in enumeration values at %qD" msgstr "" -#: cp/decl.cc:16683 +#: cp/decl.cc:16737 #, gcc-internal-format msgid "enumerator value %qE is outside the range of underlying type %qT" msgstr "" -#: cp/decl.cc:16782 cp/parser.cc:20990 +#: cp/decl.cc:16836 cp/parser.cc:20999 #, fuzzy, gcc-internal-format #| msgid "previous definition of `%#T'" msgid "multiple definition of %q#T" msgstr "папярэдняе вызначэньне `%#T'" -#: cp/decl.cc:16856 +#: cp/decl.cc:16910 #, fuzzy, gcc-internal-format msgid "return type %q#T is incomplete" msgstr "вяртаемы тып \"%s\" не \"int\"" -#: cp/decl.cc:17016 cp/typeck.cc:10615 +#: cp/decl.cc:17070 cp/typeck.cc:10621 #, gcc-internal-format msgid "% should return a reference to %<*this%>" msgstr "" -#: cp/decl.cc:17866 +#: cp/decl.cc:17920 #, gcc-internal-format msgid "no return statements in function returning %qT" msgstr "" -#: cp/decl.cc:17868 cp/typeck.cc:10495 +#: cp/decl.cc:17922 cp/typeck.cc:10501 #, gcc-internal-format msgid "only plain % return type can be deduced to %" msgstr "" -#: cp/decl.cc:17930 +#: cp/decl.cc:17984 #, gcc-internal-format msgid "no return statement in % function returning non-void" msgstr "" -#: cp/decl.cc:18112 +#: cp/decl.cc:18166 #, fuzzy, gcc-internal-format msgid "%qD is already defined in class %qT" msgstr "не знойдзен клас \"%s\"" -#: cp/decl.cc:18503 +#: cp/decl.cc:18557 #, gcc-internal-format msgid "use of %qD before deduction of %" msgstr "" @@ -54429,7 +54443,7 @@ msgstr "" msgid "deleting %qT is undefined" msgstr "метка \"%s\" ужываецца, але не вызначана" -#: cp/decl2.cc:672 cp/pt.cc:5879 +#: cp/decl2.cc:672 cp/pt.cc:5893 #, fuzzy, gcc-internal-format msgid "template declaration of %q#D" msgstr "пустое абвяшчэнне" @@ -54439,163 +54453,163 @@ msgstr "пустое абвяшчэнне" msgid "template parameter lists provided don%'t match the template parameters of %qD" msgstr "" -#: cp/decl2.cc:727 cp/pt.cc:5847 +#: cp/decl2.cc:727 cp/pt.cc:5861 #, gcc-internal-format msgid "destructor %qD declared as member template" msgstr "" -#: cp/decl2.cc:802 +#: cp/decl2.cc:823 #, fuzzy, gcc-internal-format msgid "no declaration matches %q#D" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl2.cc:807 +#: cp/decl2.cc:828 #, gcc-internal-format msgid "no conversion operators declared" msgstr "" -#: cp/decl2.cc:810 +#: cp/decl2.cc:831 #, fuzzy, gcc-internal-format #| msgid "In function `%s':" msgid "no functions named %qD" msgstr "у функцыі \"%s\":" -#: cp/decl2.cc:812 +#: cp/decl2.cc:833 #, gcc-internal-format msgid "%#qT defined here" msgstr "" -#: cp/decl2.cc:872 +#: cp/decl2.cc:893 #, gcc-internal-format msgid "local class %q#T shall not have static data member %q#D" msgstr "" -#: cp/decl2.cc:881 +#: cp/decl2.cc:902 #, gcc-internal-format msgid "static data member %qD in unnamed class" msgstr "" -#: cp/decl2.cc:883 +#: cp/decl2.cc:904 #, gcc-internal-format msgid "unnamed class defined here" msgstr "" -#: cp/decl2.cc:964 +#: cp/decl2.cc:985 #, fuzzy, gcc-internal-format msgid "explicit template argument list not allowed" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/decl2.cc:1006 +#: cp/decl2.cc:1027 #, fuzzy, gcc-internal-format msgid "%qD is already defined in %qT" msgstr "не знойдзен клас \"%s\"" -#: cp/decl2.cc:1035 cp/decl2.cc:1043 +#: cp/decl2.cc:1056 cp/decl2.cc:1064 #, fuzzy, gcc-internal-format msgid "invalid initializer for member function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl2.cc:1052 +#: cp/decl2.cc:1073 #, fuzzy, gcc-internal-format msgid "initializer specified for friend function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl2.cc:1055 +#: cp/decl2.cc:1076 #, fuzzy, gcc-internal-format msgid "initializer specified for static member function %qD" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl2.cc:1103 +#: cp/decl2.cc:1124 #, gcc-internal-format msgid "% specifiers are not permitted on non-static data members" msgstr "" -#: cp/decl2.cc:1160 +#: cp/decl2.cc:1181 #, fuzzy, gcc-internal-format msgid "bit-field %qD with non-integral type %qT" msgstr "бітавае поле \"%s\" мае нерэчаісны тып" -#: cp/decl2.cc:1168 +#: cp/decl2.cc:1189 #, fuzzy, gcc-internal-format msgid "cannot declare %qD to be a bit-field type" msgstr "не магу атрымаць адрас бітавага поля \"%s\"" -#: cp/decl2.cc:1179 +#: cp/decl2.cc:1200 #, fuzzy, gcc-internal-format msgid "cannot declare bit-field %qD with function type" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/decl2.cc:1185 +#: cp/decl2.cc:1206 #, gcc-internal-format msgid "cannot declare bit-field %qD with % type" msgstr "" -#: cp/decl2.cc:1192 +#: cp/decl2.cc:1213 #, fuzzy, gcc-internal-format msgid "%qD is already defined in the class %qT" msgstr "не знойдзен клас \"%s\"" -#: cp/decl2.cc:1200 +#: cp/decl2.cc:1221 #, fuzzy, gcc-internal-format msgid "static member %qD cannot be a bit-field" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/decl2.cc:1214 +#: cp/decl2.cc:1235 #, fuzzy, gcc-internal-format msgid "width of bit-field %qD has non-integral type %qT" msgstr "бітавае поле \"%s\" мае нерэчаісны тып" -#: cp/decl2.cc:1540 +#: cp/decl2.cc:1568 #, fuzzy, gcc-internal-format msgid "incomplete type %qT is not mappable" msgstr "вяртаемы тып \"%s\" не \"int\"" -#: cp/decl2.cc:1556 +#: cp/decl2.cc:1584 #, gcc-internal-format msgid "static field %qD is not mappable" msgstr "" -#: cp/decl2.cc:1645 +#: cp/decl2.cc:1681 #, gcc-internal-format msgid "%q+D static data member inside of declare target directive" msgstr "" -#: cp/decl2.cc:1684 cp/name-lookup.cc:8546 +#: cp/decl2.cc:1720 cp/name-lookup.cc:8551 #, gcc-internal-format msgid "% not allowed to be specified in this context" msgstr "" -#: cp/decl2.cc:1753 +#: cp/decl2.cc:1789 #, gcc-internal-format msgid "anonymous struct not inside named type" msgstr "" -#: cp/decl2.cc:1769 +#: cp/decl2.cc:1805 #, gcc-internal-format msgid "%q#D invalid; an anonymous union can only have non-static data members" msgstr "" -#: cp/decl2.cc:1776 +#: cp/decl2.cc:1812 #, gcc-internal-format msgid "private member %q#D in anonymous union" msgstr "" -#: cp/decl2.cc:1779 +#: cp/decl2.cc:1815 #, gcc-internal-format msgid "protected member %q#D in anonymous union" msgstr "" -#: cp/decl2.cc:1844 +#: cp/decl2.cc:1880 #, gcc-internal-format msgid "namespace-scope anonymous aggregates must be static" msgstr "" -#: cp/decl2.cc:1853 +#: cp/decl2.cc:1889 #, gcc-internal-format msgid "anonymous union with no members" msgstr "" -#: cp/decl2.cc:1890 +#: cp/decl2.cc:1926 #, gcc-internal-format msgid "% must return type %qT" msgstr "" @@ -54604,82 +54618,82 @@ msgstr "" #. #. The first parameter shall not have an associated default #. argument. -#: cp/decl2.cc:1902 +#: cp/decl2.cc:1938 #, gcc-internal-format msgid "the first parameter of % cannot have a default argument" msgstr "" -#: cp/decl2.cc:1918 +#: cp/decl2.cc:1954 #, gcc-internal-format msgid "% takes type % (%qT) as first parameter" msgstr "" -#: cp/decl2.cc:1948 +#: cp/decl2.cc:1984 #, gcc-internal-format msgid "% must return type %qT" msgstr "" -#: cp/decl2.cc:1963 +#: cp/decl2.cc:1999 #, gcc-internal-format msgid "destroying % must be a member function" msgstr "" -#: cp/decl2.cc:1966 +#: cp/decl2.cc:2002 #, gcc-internal-format msgid "% cannot be a destroying delete" msgstr "" -#: cp/decl2.cc:1968 +#: cp/decl2.cc:2004 #, gcc-internal-format msgid "destroying % must be a usual deallocation function" msgstr "" -#: cp/decl2.cc:1978 +#: cp/decl2.cc:2014 #, gcc-internal-format msgid "% takes type %qT as first parameter" msgstr "" -#: cp/decl2.cc:2959 +#: cp/decl2.cc:2995 #, gcc-internal-format msgid "%qT has a field %qD whose type has no linkage" msgstr "" -#: cp/decl2.cc:2963 +#: cp/decl2.cc:2999 #, gcc-internal-format msgid "%qT has a field %qD whose type depends on the type %qT which has no linkage" msgstr "" -#: cp/decl2.cc:2968 +#: cp/decl2.cc:3004 #, gcc-internal-format msgid "%qT has a field %qD whose type uses the anonymous namespace" msgstr "" -#: cp/decl2.cc:2976 +#: cp/decl2.cc:3012 #, gcc-internal-format msgid "%qT declared with greater visibility than the type of its field %qD" msgstr "" -#: cp/decl2.cc:2994 +#: cp/decl2.cc:3030 #, gcc-internal-format msgid "%qT has a base %qT whose type has no linkage" msgstr "" -#: cp/decl2.cc:2998 +#: cp/decl2.cc:3034 #, gcc-internal-format msgid "%qT has a base %qT whose type depends on the type %qT which has no linkage" msgstr "" -#: cp/decl2.cc:3003 +#: cp/decl2.cc:3039 #, gcc-internal-format msgid "%qT has a base %qT whose type uses the anonymous namespace" msgstr "" -#: cp/decl2.cc:3010 +#: cp/decl2.cc:3046 #, gcc-internal-format msgid "%qT declared with greater visibility than its base %qT" msgstr "" -#: cp/decl2.cc:4679 +#: cp/decl2.cc:4715 #, gcc-internal-format msgid "%q#D, declared using unnamed type, is used but never defined" msgstr "" @@ -54688,228 +54702,228 @@ msgstr "" #. no linkage can only be used to declare extern "C" #. entities. Since it's not always an error in the #. ISO C++ 90 Standard, we only issue a warning. -#: cp/decl2.cc:4688 +#: cp/decl2.cc:4724 #, gcc-internal-format msgid "unnamed type with no linkage used to declare variable %q#D with linkage" msgstr "" -#: cp/decl2.cc:4692 +#: cp/decl2.cc:4728 #, gcc-internal-format msgid "unnamed type with no linkage used to declare function %q#D with linkage" msgstr "" -#: cp/decl2.cc:4696 +#: cp/decl2.cc:4732 #, gcc-internal-format msgid "%q#D does not refer to the unqualified type, so it is not used for linkage" msgstr "" -#: cp/decl2.cc:4704 +#: cp/decl2.cc:4740 #, gcc-internal-format msgid "%q#D, declared using local type %qT, is used but never defined" msgstr "" -#: cp/decl2.cc:4708 +#: cp/decl2.cc:4744 #, gcc-internal-format msgid "type %qT with no linkage used to declare variable %q#D with linkage" msgstr "" -#: cp/decl2.cc:4711 +#: cp/decl2.cc:4747 #, fuzzy, gcc-internal-format msgid "type %qT with no linkage used to declare function %q#D with linkage" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/decl2.cc:4899 +#: cp/decl2.cc:4935 #, fuzzy, gcc-internal-format #| msgid "section of `%s' conflicts with previous declaration" msgid "mangling of %q#D as %qE conflicts with a previous mangle" msgstr "секцыя \"%s\" канфліктуе з папярэдняй дэкларацыяй" -#: cp/decl2.cc:4902 +#: cp/decl2.cc:4938 #, fuzzy, gcc-internal-format #| msgid "previous declaration `%D'" msgid "previous mangling %q#D" msgstr "папярэдняе абвяшчэньне `%D'" -#: cp/decl2.cc:4904 +#: cp/decl2.cc:4940 #, gcc-internal-format msgid "a later %<-fabi-version=%> (or =0) avoids this error with a change in mangling" msgstr "" -#: cp/decl2.cc:4976 cp/decl2.cc:4979 +#: cp/decl2.cc:5012 cp/decl2.cc:5015 #, gcc-internal-format msgid "the program should also define %qD" msgstr "" -#: cp/decl2.cc:5332 +#: cp/decl2.cc:5368 #, fuzzy, gcc-internal-format #| msgid "label `%D' used but not defined" msgid "inline function %qD used but never defined" msgstr "адмеціна `%D' выкарыстоўвываецца, але ня вызначана" -#: cp/decl2.cc:5535 +#: cp/decl2.cc:5571 #, fuzzy, gcc-internal-format msgid "default argument missing for parameter %P of %q#D" msgstr "аргумент для \"%s\" прапушчан" -#: cp/decl2.cc:5540 +#: cp/decl2.cc:5576 #, gcc-internal-format msgid "...following parameter %P which has a default argument" msgstr "" -#: cp/decl2.cc:5673 +#: cp/decl2.cc:5709 #, fuzzy, gcc-internal-format msgid "implicitly-declared %qD is deprecated" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/decl2.cc:5677 +#: cp/decl2.cc:5713 #, gcc-internal-format msgid "because %qT has user-provided %qD" msgstr "" #. We mark a lambda conversion op as deleted if we can't #. generate it properly; see maybe_add_lambda_conv_op. -#: cp/decl2.cc:5813 +#: cp/decl2.cc:5854 #, gcc-internal-format msgid "converting lambda that uses %<...%> to function pointer" msgstr "" -#: cp/decl2.cc:5816 +#: cp/decl2.cc:5857 #, gcc-internal-format msgid "use of deleted function %qD" msgstr "" -#: cp/decl2.cc:5870 +#: cp/decl2.cc:5911 #, gcc-internal-format msgid "use of function %qD with unsatisfied constraints" msgstr "" -#: cp/decl2.cc:5902 +#: cp/decl2.cc:5943 #, gcc-internal-format msgid "use of built-in parameter pack %qD outside of a template" msgstr "" -#: cp/error.cc:4019 +#: cp/error.cc:4027 #, fuzzy, gcc-internal-format #| msgid "no arguments" msgid "(no argument)" msgstr "няма аргументаў" -#: cp/error.cc:4111 +#: cp/error.cc:4119 #, gcc-internal-format msgid "[...]" msgstr "" -#: cp/error.cc:4458 +#: cp/error.cc:4466 #, gcc-internal-format msgid "extended initializer lists only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4463 +#: cp/error.cc:4471 #, gcc-internal-format msgid "explicit conversion operators only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4468 +#: cp/error.cc:4476 #, gcc-internal-format msgid "variadic templates only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4473 +#: cp/error.cc:4481 #, gcc-internal-format msgid "lambda expressions only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4478 +#: cp/error.cc:4486 #, gcc-internal-format msgid "C++11 auto only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4483 +#: cp/error.cc:4491 #, gcc-internal-format msgid "scoped enums only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4488 +#: cp/error.cc:4496 #, gcc-internal-format msgid "defaulted and deleted functions only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4494 +#: cp/error.cc:4502 #, gcc-internal-format msgid "inline namespaces only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4499 +#: cp/error.cc:4507 #, gcc-internal-format msgid "override controls (override/final) only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4504 +#: cp/error.cc:4512 #, gcc-internal-format msgid "non-static data member initializers only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4509 +#: cp/error.cc:4517 #, gcc-internal-format msgid "user-defined literals only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4514 +#: cp/error.cc:4522 #, gcc-internal-format msgid "delegating constructors only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4519 +#: cp/error.cc:4527 #, gcc-internal-format msgid "inheriting constructors only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4524 +#: cp/error.cc:4532 #, gcc-internal-format msgid "C++11 attributes only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4529 +#: cp/error.cc:4537 #, gcc-internal-format msgid "ref-qualifiers only available with %<-std=c++11%> or %<-std=gnu++11%>" msgstr "" -#: cp/error.cc:4579 +#: cp/error.cc:4587 #, gcc-internal-format msgid "incomplete type %qT used in nested name specifier" msgstr "" -#: cp/error.cc:4583 +#: cp/error.cc:4591 #, fuzzy, gcc-internal-format msgid "reference to %<%T::%D%> is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/error.cc:4597 +#: cp/error.cc:4605 #, gcc-internal-format msgid "%qD is not a member of %qT; did you mean %qs?" msgstr "" -#: cp/error.cc:4601 cp/typeck.cc:2730 +#: cp/error.cc:4609 cp/typeck.cc:2730 #, gcc-internal-format msgid "%qD is not a member of %qT" msgstr "" -#: cp/error.cc:4623 +#: cp/error.cc:4631 #, gcc-internal-format msgid "%qD is not a member of %qD; did you mean %qs?" msgstr "" -#: cp/error.cc:4627 cp/typeck.cc:3323 +#: cp/error.cc:4635 cp/typeck.cc:3323 #, gcc-internal-format msgid "%qD is not a member of %qD" msgstr "" -#: cp/error.cc:4638 +#: cp/error.cc:4646 #, gcc-internal-format msgid "%<::%D%> has not been declared; did you mean %qs?" msgstr "" -#: cp/error.cc:4642 +#: cp/error.cc:4650 #, gcc-internal-format msgid "%<::%D%> has not been declared" msgstr "" @@ -55060,445 +55074,445 @@ msgstr "" msgid "(if this is not what you intended, make sure the function template has already been declared and add %<<>%> after the function name here)" msgstr "" -#: cp/init.cc:392 +#: cp/init.cc:391 #, fuzzy, gcc-internal-format msgid "value-initialization of incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/init.cc:475 +#: cp/init.cc:474 #, gcc-internal-format msgid "cannot value-initialize array of unknown bound %qT" msgstr "" -#: cp/init.cc:514 +#: cp/init.cc:513 #, fuzzy, gcc-internal-format msgid "value-initialization of function type %qT" msgstr "Нерэчаісны выбар \"%s\"" -#: cp/init.cc:520 +#: cp/init.cc:519 #, gcc-internal-format msgid "value-initialization of reference type %qT" msgstr "" -#: cp/init.cc:589 +#: cp/init.cc:588 #, gcc-internal-format msgid "recursive instantiation of default member initializer for %qD" msgstr "" -#: cp/init.cc:655 +#: cp/init.cc:654 #, gcc-internal-format msgid "default member initializer for %qD required before the end of its enclosing class" msgstr "" -#: cp/init.cc:719 +#: cp/init.cc:718 #, fuzzy, gcc-internal-format msgid "initializer for flexible array member %q#D" msgstr "прапушчан ініцыялізатар" -#: cp/init.cc:784 +#: cp/init.cc:783 #, gcc-internal-format msgid "initializing %qD from %qE does not extend the lifetime of the underlying array" msgstr "" -#: cp/init.cc:888 cp/init.cc:969 +#: cp/init.cc:887 cp/init.cc:968 #, fuzzy, gcc-internal-format msgid "%qD is initialized with itself" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/init.cc:894 +#: cp/init.cc:893 #, gcc-internal-format msgid "reference %qD is not yet bound to a value when used here" msgstr "" -#: cp/init.cc:898 +#: cp/init.cc:897 #, fuzzy, gcc-internal-format msgid "member %qD is used uninitialized" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/init.cc:946 +#: cp/init.cc:945 #, fuzzy, gcc-internal-format msgid "%qD should be initialized in the member initialization list" msgstr "нерэчаісны ініцыялізатар" -#: cp/init.cc:1090 +#: cp/init.cc:1089 #, fuzzy, gcc-internal-format msgid "invalid initializer for array member %q#D" msgstr "нерэчаісны ініцыялізатар" -#: cp/init.cc:1105 cp/init.cc:1131 cp/init.cc:2727 cp/method.cc:2366 +#: cp/init.cc:1104 cp/init.cc:1130 cp/init.cc:2726 cp/method.cc:2366 #, fuzzy, gcc-internal-format msgid "uninitialized const member in %q#T" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/init.cc:1107 cp/init.cc:1125 cp/init.cc:1133 cp/init.cc:2712 -#: cp/init.cc:2740 cp/method.cc:2369 cp/method.cc:2380 +#: cp/init.cc:1106 cp/init.cc:1124 cp/init.cc:1132 cp/init.cc:2711 +#: cp/init.cc:2739 cp/method.cc:2369 cp/method.cc:2380 #, fuzzy, gcc-internal-format msgid "%q#D should be initialized" msgstr "параметр \"%s\" ініцыялізаваны" -#: cp/init.cc:1123 cp/init.cc:2699 cp/method.cc:2377 +#: cp/init.cc:1122 cp/init.cc:2698 cp/method.cc:2377 #, fuzzy, gcc-internal-format msgid "uninitialized reference member in %q#T" msgstr "прапушчан ініцыялізатар" -#: cp/init.cc:1308 +#: cp/init.cc:1307 #, gcc-internal-format msgid "%qD will be initialized after" msgstr "" -#: cp/init.cc:1311 +#: cp/init.cc:1310 #, fuzzy, gcc-internal-format msgid "base %qT will be initialized after" msgstr "Клас \"%s\" ужо існуе" -#: cp/init.cc:1315 +#: cp/init.cc:1314 #, gcc-internal-format msgid " %q#D" msgstr "" -#: cp/init.cc:1317 +#: cp/init.cc:1316 #, gcc-internal-format msgid " base %qT" msgstr "" -#: cp/init.cc:1319 +#: cp/init.cc:1318 #, fuzzy, gcc-internal-format #| msgid "invalid initializer" msgid " when initialized here" msgstr "нерэчаісны ініцыялізатар" -#: cp/init.cc:1336 +#: cp/init.cc:1335 #, fuzzy, gcc-internal-format msgid "multiple initializations given for %qD" msgstr "ініцыялізацыя" -#: cp/init.cc:1340 +#: cp/init.cc:1339 #, gcc-internal-format msgid "multiple initializations given for base %qT" msgstr "" -#: cp/init.cc:1427 +#: cp/init.cc:1426 #, gcc-internal-format msgid "initializations for multiple members of %qT" msgstr "" -#: cp/init.cc:1537 +#: cp/init.cc:1536 #, gcc-internal-format msgid "base class %q#T should be explicitly initialized in the copy constructor" msgstr "" -#: cp/init.cc:1773 cp/init.cc:1792 +#: cp/init.cc:1772 cp/init.cc:1791 #, gcc-internal-format msgid "class %qT does not have any field named %qD" msgstr "" -#: cp/init.cc:1779 +#: cp/init.cc:1778 #, gcc-internal-format msgid "%q#D is a static data member; it can only be initialized at its definition" msgstr "" -#: cp/init.cc:1786 +#: cp/init.cc:1785 #, gcc-internal-format msgid "%q#D is not a non-static data member of %qT" msgstr "" -#: cp/init.cc:1825 +#: cp/init.cc:1824 #, gcc-internal-format msgid "unnamed initializer for %qT, which has no base classes" msgstr "" -#: cp/init.cc:1833 +#: cp/init.cc:1832 #, gcc-internal-format msgid "unnamed initializer for %qT, which uses multiple inheritance" msgstr "" -#: cp/init.cc:1880 +#: cp/init.cc:1879 #, gcc-internal-format msgid "%qD is both a direct base and an indirect virtual base" msgstr "" -#: cp/init.cc:1888 +#: cp/init.cc:1887 #, gcc-internal-format msgid "type %qT is not a direct or virtual base of %qT" msgstr "" -#: cp/init.cc:1891 +#: cp/init.cc:1890 #, gcc-internal-format msgid "type %qT is not a direct base of %qT" msgstr "" -#: cp/init.cc:2003 cp/init.cc:4786 cp/typeck2.cc:1349 +#: cp/init.cc:2002 cp/init.cc:4790 cp/typeck2.cc:1350 #, gcc-internal-format msgid "array must be initialized with a brace-enclosed initializer" msgstr "" -#: cp/init.cc:2324 cp/semantics.cc:3740 +#: cp/init.cc:2323 cp/semantics.cc:3756 #, fuzzy, gcc-internal-format msgid "%qT is not a class type" msgstr "\"%s\" мае незавершаны тып" -#: cp/init.cc:2382 +#: cp/init.cc:2381 #, gcc-internal-format msgid "incomplete type %qT does not have member %qD" msgstr "" -#: cp/init.cc:2396 +#: cp/init.cc:2395 #, fuzzy, gcc-internal-format msgid "invalid pointer to bit-field %qD" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/init.cc:2482 cp/typeck.cc:2208 +#: cp/init.cc:2481 cp/typeck.cc:2208 #, fuzzy, gcc-internal-format msgid "invalid use of non-static member function %qD" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/init.cc:2489 cp/semantics.cc:2148 +#: cp/init.cc:2488 cp/semantics.cc:2164 #, fuzzy, gcc-internal-format msgid "invalid use of non-static data member %qD" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/init.cc:2696 +#: cp/init.cc:2695 #, gcc-internal-format msgid "uninitialized reference member in %q#T using % without new-initializer" msgstr "" -#: cp/init.cc:2704 +#: cp/init.cc:2703 #, gcc-internal-format msgid "uninitialized reference member in base %q#T of %q#T using % without new-initializer" msgstr "" -#: cp/init.cc:2708 +#: cp/init.cc:2707 #, gcc-internal-format msgid "uninitialized reference member in base %q#T of %q#T" msgstr "" -#: cp/init.cc:2724 +#: cp/init.cc:2723 #, gcc-internal-format msgid "uninitialized const member in %q#T using % without new-initializer" msgstr "" -#: cp/init.cc:2732 +#: cp/init.cc:2731 #, gcc-internal-format msgid "uninitialized const member in base %q#T of %q#T using % without new-initializer" msgstr "" -#: cp/init.cc:2736 +#: cp/init.cc:2735 #, gcc-internal-format msgid "uninitialized const member in base %q#T of %q#T" msgstr "" -#: cp/init.cc:2846 +#: cp/init.cc:2850 #, gcc-internal-format msgid "placement new constructing an object of type %<%T [%wu]%> and size %qwu in a region of type %qT and size %qwi" msgstr "" -#: cp/init.cc:2849 +#: cp/init.cc:2853 #, gcc-internal-format msgid "placement new constructing an object of type %<%T [%wu]%> and size %qwu in a region of type %qT and size at most %qwu" msgstr "" -#: cp/init.cc:2859 +#: cp/init.cc:2863 #, gcc-internal-format msgid "placement new constructing an array of objects of type %qT and size %qwu in a region of type %qT and size %qwi" msgstr "" -#: cp/init.cc:2862 +#: cp/init.cc:2866 #, gcc-internal-format msgid "placement new constructing an array of objects of type %qT and size %qwu in a region of type %qT and size at most %qwu" msgstr "" -#: cp/init.cc:2871 +#: cp/init.cc:2875 #, gcc-internal-format msgid "placement new constructing an object of type %qT and size %qwu in a region of type %qT and size %qwi" msgstr "" -#: cp/init.cc:2874 +#: cp/init.cc:2878 #, gcc-internal-format msgid "placement new constructing an object of type %qT and size %qwu in a region of type %qT and size at most %qwu" msgstr "" -#: cp/init.cc:2891 +#: cp/init.cc:2895 #, gcc-internal-format msgid "at offset %wi from %qD declared here" msgstr "" -#: cp/init.cc:2895 +#: cp/init.cc:2899 #, gcc-internal-format msgid "at offset [%wi, %wi] from %qD declared here" msgstr "" -#: cp/init.cc:3093 +#: cp/init.cc:3097 #, gcc-internal-format msgid "integer overflow in array size" msgstr "" -#: cp/init.cc:3103 +#: cp/init.cc:3107 #, gcc-internal-format msgid "array size in new-expression must be constant" msgstr "" -#: cp/init.cc:3121 +#: cp/init.cc:3125 #, gcc-internal-format msgid "variably modified type not allowed in new-expression" msgstr "" -#: cp/init.cc:3137 +#: cp/init.cc:3141 #, gcc-internal-format msgid "non-constant array new length must be specified directly, not by %" msgstr "" -#: cp/init.cc:3139 +#: cp/init.cc:3143 #, gcc-internal-format msgid "non-constant array new length must be specified without parentheses around the type-id" msgstr "" -#: cp/init.cc:3149 +#: cp/init.cc:3153 #, gcc-internal-format msgid "invalid type % for %" msgstr "" -#: cp/init.cc:3155 +#: cp/init.cc:3159 #, gcc-internal-format msgid "% of % does not extend the lifetime of the underlying array" msgstr "" -#: cp/init.cc:3197 +#: cp/init.cc:3201 #, fuzzy, gcc-internal-format msgid "uninitialized const in % of %q#T" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/init.cc:3353 +#: cp/init.cc:3357 #, fuzzy, gcc-internal-format #| msgid "field '%s' not found in class" msgid "no suitable %qD found in class %qT" msgstr "поле \"%s\" не знойдзена ў класе" -#: cp/init.cc:3360 cp/search.cc:1179 +#: cp/init.cc:3364 cp/search.cc:1179 #, fuzzy, gcc-internal-format msgid "request for member %qD is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/init.cc:3441 +#: cp/init.cc:3445 #, gcc-internal-format msgid "% of type %qT with extended alignment %d" msgstr "" -#: cp/init.cc:3444 +#: cp/init.cc:3448 #, gcc-internal-format msgid "uses %qD, which does not have an alignment parameter" msgstr "" -#: cp/init.cc:3447 +#: cp/init.cc:3451 #, gcc-internal-format msgid "use %<-faligned-new%> to enable C++17 over-aligned new support" msgstr "" -#: cp/init.cc:3643 +#: cp/init.cc:3647 #, gcc-internal-format msgid "parenthesized initializer in array new" msgstr "" -#: cp/init.cc:3917 +#: cp/init.cc:3921 #, gcc-internal-format msgid "size in array new must have integral type" msgstr "" -#: cp/init.cc:3946 +#: cp/init.cc:3950 #, gcc-internal-format msgid "new cannot be applied to a reference type" msgstr "" -#: cp/init.cc:3955 +#: cp/init.cc:3959 #, gcc-internal-format msgid "new cannot be applied to a function type" msgstr "" -#: cp/init.cc:4075 +#: cp/init.cc:4079 #, gcc-internal-format msgid "possible problem detected in invocation of operator %" msgstr "" -#: cp/init.cc:4079 +#: cp/init.cc:4083 #, gcc-internal-format msgid "neither the destructor nor the class-specific operator % will be called, even if they are declared when the class is defined" msgstr "" -#: cp/init.cc:4690 +#: cp/init.cc:4694 #, gcc-internal-format msgid "initializer ends prematurely" msgstr "" -#: cp/init.cc:4987 +#: cp/init.cc:4990 #, gcc-internal-format msgid "unknown array size in delete" msgstr "" -#: cp/init.cc:5021 +#: cp/init.cc:5024 #, gcc-internal-format msgid "possible problem detected in invocation of %" msgstr "" -#: cp/init.cc:5026 +#: cp/init.cc:5029 #, gcc-internal-format msgid "neither the destructor nor the class-specific % will be called, even if they are declared when the class is defined" msgstr "" -#: cp/init.cc:5041 +#: cp/init.cc:5044 #, gcc-internal-format msgid "deleting object of abstract class type %qT which has non-virtual destructor will cause undefined behavior" msgstr "" -#: cp/init.cc:5046 +#: cp/init.cc:5049 #, gcc-internal-format msgid "deleting object of polymorphic class type %qT which has non-virtual destructor might cause undefined behavior" msgstr "" -#: cp/init.cc:5353 +#: cp/init.cc:5356 #, gcc-internal-format msgid "type to vector delete is neither pointer or array type" msgstr "" -#: cp/lambda.cc:527 +#: cp/lambda.cc:546 #, gcc-internal-format msgid "array of runtime bound cannot be captured by copy, only by reference" msgstr "" -#: cp/lambda.cc:542 +#: cp/lambda.cc:561 #, gcc-internal-format msgid "capture of variably-modified type %qT that is not an N3639 array of runtime bound" msgstr "" -#: cp/lambda.cc:546 +#: cp/lambda.cc:565 #, gcc-internal-format msgid "because the array element type %qT has variable size" msgstr "" -#: cp/lambda.cc:570 +#: cp/lambda.cc:589 #, gcc-internal-format msgid "cannot capture %qE by reference" msgstr "" -#: cp/lambda.cc:580 +#: cp/lambda.cc:599 #, fuzzy, gcc-internal-format msgid "capture by copy of incomplete type %qT" msgstr "\"%s\" мае незавершаны тып" -#: cp/lambda.cc:635 +#: cp/lambda.cc:654 #, gcc-internal-format msgid "trying to capture %qD in instantiation of generic lambda" msgstr "" -#: cp/lambda.cc:711 +#: cp/lambda.cc:730 #, gcc-internal-format msgid "implicit capture of %qE via %<[=]%> is deprecated in C++20" msgstr "" -#: cp/lambda.cc:713 +#: cp/lambda.cc:732 #, gcc-internal-format msgid "add explicit % or %<*this%> capture" msgstr "" -#: cp/lambda.cc:827 +#: cp/lambda.cc:852 #, gcc-internal-format msgid "% was not captured for this lambda function" msgstr "" @@ -55619,27 +55633,27 @@ msgstr "" msgid "the mangled name of the initialization guard variable for %qD changes between %<-fabi-version=%d%> and %<-fabi-version=%d%>" msgstr "" -#: cp/mapper-client.cc:307 +#: cp/mapper-client.cc:308 #, gcc-internal-format msgid "failed %s mapper %qs line %u" msgstr "" -#: cp/mapper-client.cc:308 +#: cp/mapper-client.cc:309 #, gcc-internal-format msgid "failed %s mapper %qs" msgstr "" -#: cp/mapper-client.cc:320 +#: cp/mapper-client.cc:321 #, gcc-internal-format, gfc-internal-format msgid "failed mapper handshake %s" msgstr "" -#: cp/mapper-client.cc:354 +#: cp/mapper-client.cc:355 #, gcc-internal-format, gfc-internal-format msgid "mapper died by signal %s" msgstr "" -#: cp/mapper-client.cc:357 +#: cp/mapper-client.cc:358 #, gcc-internal-format, gfc-internal-format msgid "mapper exit status %d" msgstr "" @@ -55850,250 +55864,250 @@ msgstr "YYDEBUG не вызначан." msgid "defaulted function %q+D with default argument" msgstr "" -#: cp/module.cc:1546 +#: cp/module.cc:1547 #, gcc-internal-format msgid "section %qs is missing or corrupted" msgstr "" -#: cp/module.cc:1548 +#: cp/module.cc:1549 #, gcc-internal-format, gfc-internal-format msgid "section #%u is missing or corrupted" msgstr "" -#: cp/module.cc:1770 +#: cp/module.cc:1771 #, gcc-internal-format msgid "not Encapsulated Lazy Records of Named Declarations" msgstr "" -#: cp/module.cc:1785 +#: cp/module.cc:1786 #, gcc-internal-format msgid "unexpected encapsulation format or type" msgstr "" -#: cp/module.cc:1794 +#: cp/module.cc:1795 #, gcc-internal-format msgid "encapsulation is malformed" msgstr "" -#: cp/module.cc:11083 +#: cp/module.cc:11084 #, fuzzy, gcc-internal-format msgid "conflicting global module declaration %#qD" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/module.cc:11085 +#: cp/module.cc:11086 #, fuzzy, gcc-internal-format #| msgid "in declaration `%D'" msgid "existing declaration %#qD" msgstr "у абвяшчэньні `%D'" -#: cp/module.cc:12149 +#: cp/module.cc:12150 #, gcc-internal-format msgid "definition of %qD does not match" msgstr "" -#: cp/module.cc:12151 +#: cp/module.cc:12152 #, fuzzy, gcc-internal-format #| msgid "previous definition here" msgid "existing definition %qD" msgstr "папярэдняе вызначэньне" -#: cp/module.cc:12163 +#: cp/module.cc:12164 #, gcc-internal-format msgid "... this enumerator %qD" msgstr "" -#: cp/module.cc:12165 +#: cp/module.cc:12166 #, gcc-internal-format msgid "enumerator %qD does not match ..." msgstr "" -#: cp/module.cc:12171 +#: cp/module.cc:12172 #, gcc-internal-format msgid "additional enumerators beginning with %qD" msgstr "" -#: cp/module.cc:12175 +#: cp/module.cc:12176 #, gcc-internal-format msgid "enumeration range differs" msgstr "" -#: cp/module.cc:13294 +#: cp/module.cc:13295 #, gcc-internal-format msgid "%q#D references internal linkage entity %q#D" msgstr "" -#: cp/module.cc:13863 +#: cp/module.cc:13864 #, gcc-internal-format msgid "recursive lazy load" msgstr "" #. Cannot import the current module. -#: cp/module.cc:13882 +#: cp/module.cc:13883 #, gcc-internal-format msgid "cannot import module in its own purview" msgstr "" -#: cp/module.cc:13883 cp/module.cc:18966 +#: cp/module.cc:13884 cp/module.cc:18967 #, gcc-internal-format msgid "module %qs declared here" msgstr "" -#: cp/module.cc:14228 +#: cp/module.cc:14229 #, gcc-internal-format msgid "indirect import %qs is not already loaded" msgstr "" -#: cp/module.cc:14234 +#: cp/module.cc:14235 #, gcc-internal-format msgid "import %qs has CRC mismatch" msgstr "" -#: cp/module.cc:15933 +#: cp/module.cc:15934 #, gcc-internal-format msgid "unable to represent further imported source locations" msgstr "" -#: cp/module.cc:16846 +#: cp/module.cc:16847 #, gcc-internal-format msgid "not exporting %<#define %E%> as it is a keyword" msgstr "" -#: cp/module.cc:17083 +#: cp/module.cc:17084 #, gcc-internal-format msgid "macro definitions of %qE corrupted" msgstr "" -#: cp/module.cc:17107 cp/module.cc:17110 +#: cp/module.cc:17108 cp/module.cc:17111 #, gcc-internal-format msgid "inconsistent imported macro definition %qE" msgstr "" -#: cp/module.cc:17116 +#: cp/module.cc:17117 #, gcc-internal-format msgid "%<#undef %E%>" msgstr "" -#: cp/module.cc:17118 +#: cp/module.cc:17119 #, gcc-internal-format msgid "%<#define %s%>" msgstr "" -#: cp/module.cc:17348 +#: cp/module.cc:17349 #, gcc-internal-format msgid "compiled module file is %qs" msgstr "" -#: cp/module.cc:17385 cp/module.cc:17390 +#: cp/module.cc:17386 cp/module.cc:17391 #, gcc-internal-format, gfc-internal-format msgid "compiled module is %sversion %s" msgstr "" -#: cp/module.cc:17396 +#: cp/module.cc:17397 #, gcc-internal-format, gfc-internal-format msgid "compiler is %sversion %s%s%s" msgstr "" -#: cp/module.cc:17426 +#: cp/module.cc:17427 #, gcc-internal-format msgid "module %qs found" msgstr "" -#: cp/module.cc:17428 +#: cp/module.cc:17429 #, gcc-internal-format msgid "header module expected, module %qs found" msgstr "" -#: cp/module.cc:17429 +#: cp/module.cc:17430 #, gcc-internal-format msgid "module %qs expected, header module found" msgstr "" -#: cp/module.cc:17444 +#: cp/module.cc:17445 #, gcc-internal-format msgid "module %qs CRC mismatch" msgstr "" -#: cp/module.cc:17458 +#: cp/module.cc:17459 #, gcc-internal-format msgid "target & host is %qs:%qs, expected %qs:%qs" msgstr "" -#: cp/module.cc:17470 +#: cp/module.cc:17471 #, gcc-internal-format msgid "language dialect differs %qs, expected %qs" msgstr "" -#: cp/module.cc:17486 +#: cp/module.cc:17487 #, gcc-internal-format msgid "module contains OpenMP, use %<-fopenmp%> to enable" msgstr "" -#: cp/module.cc:17503 +#: cp/module.cc:17504 #, fuzzy, gcc-internal-format msgid "fixed tree mismatch" msgstr "нерэчаісны ініцыялізатар" -#: cp/module.cc:17590 +#: cp/module.cc:17591 #, gcc-internal-format msgid "interface partition is not exported" msgstr "" -#: cp/module.cc:18124 +#: cp/module.cc:18125 #, gcc-internal-format, gfc-internal-format msgid "failed to read compiled module cluster %u: %s" msgstr "" -#: cp/module.cc:18162 +#: cp/module.cc:18163 #, gcc-internal-format, gfc-internal-format msgid "failed to read compiled module: %s" msgstr "" -#: cp/module.cc:18172 +#: cp/module.cc:18173 #, gcc-internal-format msgid "consider using %<-fno-module-lazy%>, increasing %<-param-lazy-modules=%u%> value, or increasing the per-process file descriptor limit" msgstr "" -#: cp/module.cc:18177 +#: cp/module.cc:18178 #, gcc-internal-format msgid "imports must be built before being imported" msgstr "" -#: cp/module.cc:18180 +#: cp/module.cc:18181 #, gcc-internal-format msgid "returning to the gate for a mechanical issue" msgstr "" -#: cp/module.cc:18671 +#: cp/module.cc:18672 #, gcc-internal-format msgid "reading CMI %qs" msgstr "" -#: cp/module.cc:18815 +#: cp/module.cc:18816 #, gcc-internal-format msgid "failed to load binding %<%E%s%E%>" msgstr "" -#: cp/module.cc:18816 +#: cp/module.cc:18817 #, gcc-internal-format msgid "failed to load binding %<%E%s%E@%s%>" msgstr "" -#: cp/module.cc:18823 +#: cp/module.cc:18824 #, gcc-internal-format msgid "during load of binding %<%E%s%E%>" msgstr "" -#: cp/module.cc:18824 +#: cp/module.cc:18825 #, gcc-internal-format msgid "during load of binding %<%E%s%E@%s%>" msgstr "" -#: cp/module.cc:18882 +#: cp/module.cc:18883 #, gcc-internal-format msgid "failed to load pendings for %<%E%s%E%>" msgstr "" -#: cp/module.cc:18886 +#: cp/module.cc:18887 #, gcc-internal-format msgid "during load of pendings for %<%E%s%E%>" msgstr "" @@ -56105,380 +56119,380 @@ msgstr "" #. module, so we don't want to confuse things by having to think #. about whether 'extern "C++" { import foo; }' puts foo's #. contents into the global module all of a sudden. -#: cp/module.cc:18931 +#: cp/module.cc:18932 #, gcc-internal-format msgid "import of named module %qs inside language-linkage block" msgstr "" -#: cp/module.cc:18961 +#: cp/module.cc:18962 #, gcc-internal-format msgid "module already declared" msgstr "" -#: cp/module.cc:18962 +#: cp/module.cc:18963 #, gcc-internal-format msgid "module already imported" msgstr "" -#: cp/module.cc:18967 +#: cp/module.cc:18968 #, gcc-internal-format msgid "module %qs imported here" msgstr "" -#: cp/module.cc:19154 +#: cp/module.cc:19155 #, gcc-internal-format, gfc-internal-format msgid "unknown Compiled Module Interface: %s" msgstr "" -#: cp/module.cc:19197 +#: cp/module.cc:19198 #, gcc-internal-format msgid "cannot determine %<#include%> translation of %s: %s" msgstr "" -#: cp/module.cc:19215 +#: cp/module.cc:19216 #, gcc-internal-format msgid "include %qs translated to import" msgstr "" -#: cp/module.cc:19216 +#: cp/module.cc:19217 #, gcc-internal-format msgid "include %qs processed textually" msgstr "" -#: cp/module.cc:19573 +#: cp/module.cc:19574 #, gcc-internal-format msgid "C++ modules are incompatible with precompiled headers" msgstr "" -#: cp/module.cc:19577 +#: cp/module.cc:19578 #, gcc-internal-format msgid "C++ modules are incompatible with traditional preprocessing" msgstr "" -#: cp/module.cc:19587 +#: cp/module.cc:19588 #, gcc-internal-format msgid "macro debug output may be incomplete with modules" msgstr "" -#: cp/module.cc:19588 +#: cp/module.cc:19589 #, gcc-internal-format msgid "module dependencies require preprocessing" msgstr "" -#: cp/module.cc:19590 +#: cp/module.cc:19591 #, gcc-internal-format msgid "you should use the %<-%s%> option" msgstr "" -#: cp/module.cc:19625 cp/module.cc:19654 +#: cp/module.cc:19626 cp/module.cc:19655 #, fuzzy, gcc-internal-format #| msgid "invalid register name for `%s'" msgid "invalid header name %qs" msgstr "нерэчаісная назва рэгістра `%s'" -#: cp/module.cc:19664 +#: cp/module.cc:19665 #, fuzzy, gcc-internal-format msgid "invalid module name %qs" msgstr "Нерэчаісны выбар %s" -#: cp/module.cc:19830 +#: cp/module.cc:19831 #, gcc-internal-format msgid "%<-fmodule-only%> used for non-interface" msgstr "" -#: cp/module.cc:19870 +#: cp/module.cc:19871 #, fuzzy, gcc-internal-format #| msgid "error writing to %s" msgid "writing CMI %qs" msgstr "памылка запісу ў %s" -#: cp/module.cc:19875 +#: cp/module.cc:19876 #, gcc-internal-format msgid "not writing module %qs due to errors" msgstr "" -#: cp/module.cc:19903 +#: cp/module.cc:19904 #, gcc-internal-format, gfc-internal-format msgid "failed to write compiled module: %s" msgstr "" -#: cp/module.cc:20040 +#: cp/module.cc:20041 #, fuzzy, gcc-internal-format #| msgid "unknown register name: %s" msgid "unknown header kind %qs" msgstr "невядомая назва рэгістра: %s" -#: cp/name-lookup.cc:2730 +#: cp/name-lookup.cc:2712 #, gcc-internal-format msgid "redeclaration of %q#D with different template parameters" msgstr "" -#: cp/name-lookup.cc:2736 +#: cp/name-lookup.cc:2718 #, fuzzy, gcc-internal-format #| msgid "conflicts with previous declaration `%#D'" msgid "%q#D conflicts with a previous declaration" msgstr "канфлікт з папярэднім абвяшчэньнем `%#D'" -#: cp/name-lookup.cc:2901 +#: cp/name-lookup.cc:2883 #, fuzzy, gcc-internal-format msgid "%q#D hides constructor for %q#D" msgstr "дэструктару неабходны \"%#D\"" -#: cp/name-lookup.cc:3050 +#: cp/name-lookup.cc:3032 #, fuzzy, gcc-internal-format msgid "conflicting C language linkage declaration %q#D" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/name-lookup.cc:3055 +#: cp/name-lookup.cc:3037 #, fuzzy, gcc-internal-format msgid "due to different exception specifications" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/name-lookup.cc:3153 +#: cp/name-lookup.cc:3135 #, fuzzy, gcc-internal-format msgid "lambda parameter %qD previously declared as a capture" msgstr "тып параметра \"%s\" не аб'яўлены" -#: cp/name-lookup.cc:3176 +#: cp/name-lookup.cc:3158 #, fuzzy, gcc-internal-format #| msgid "declaration of `%#D'" msgid "declaration of %q#D shadows a parameter" msgstr "абвяшчэньне `%#D'" -#: cp/name-lookup.cc:3311 +#: cp/name-lookup.cc:3297 #, gcc-internal-format msgid "declaration of %qD shadows a member of %qT" msgstr "" -#: cp/name-lookup.cc:3772 +#: cp/name-lookup.cc:3758 #, gcc-internal-format msgid "friend declaration %qD in local class without prior local declaration" msgstr "" -#: cp/name-lookup.cc:4239 +#: cp/name-lookup.cc:4225 #, gcc-internal-format msgid "%s %<%s(%E)%> %p %d" msgstr "" -#: cp/name-lookup.cc:4242 +#: cp/name-lookup.cc:4228 #, gcc-internal-format msgid "%s %s %p %d" msgstr "" -#: cp/name-lookup.cc:4854 +#: cp/name-lookup.cc:4840 #, gcc-internal-format msgid "%q#D does not have external linkage" msgstr "" -#: cp/name-lookup.cc:4856 cp/parser.cc:11376 cp/parser.cc:11386 -#: cp/semantics.cc:3926 cp/semantics.cc:3938 +#: cp/name-lookup.cc:4842 cp/parser.cc:11376 cp/parser.cc:11386 +#: cp/semantics.cc:3942 cp/semantics.cc:3954 #, fuzzy, gcc-internal-format msgid "%q#D declared here" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/name-lookup.cc:5568 +#: cp/name-lookup.cc:5554 #, gcc-internal-format msgid "%<%T%s%D%> names destructor" msgstr "" -#: cp/name-lookup.cc:5584 +#: cp/name-lookup.cc:5570 #, gcc-internal-format msgid "using-declaration for non-member at class scope" msgstr "" -#: cp/name-lookup.cc:5592 +#: cp/name-lookup.cc:5578 #, gcc-internal-format msgid "% with enumeration scope %q#T only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/name-lookup.cc:5608 cp/pt.cc:18500 +#: cp/name-lookup.cc:5594 cp/pt.cc:18618 #, gcc-internal-format msgid "%qT is not a class, namespace, or enumeration" msgstr "" -#: cp/name-lookup.cc:5618 +#: cp/name-lookup.cc:5604 #, gcc-internal-format msgid "non-member using-declaration names constructor of %qT" msgstr "" -#: cp/name-lookup.cc:5629 cp/name-lookup.cc:5702 +#: cp/name-lookup.cc:5615 cp/name-lookup.cc:5688 #, gcc-internal-format msgid "using-declaration for member at non-class scope" msgstr "" -#: cp/name-lookup.cc:5652 +#: cp/name-lookup.cc:5638 #, fuzzy, gcc-internal-format #| msgid "%s: Not a directory" msgid "%qT is not a direct base of %qT" msgstr "%s: не дырэкторыя" -#: cp/name-lookup.cc:5712 +#: cp/name-lookup.cc:5698 #, gcc-internal-format msgid "did you mean %?" msgstr "" -#: cp/name-lookup.cc:5724 +#: cp/name-lookup.cc:5710 #, fuzzy, gcc-internal-format msgid "%qD has not been declared in %qD" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/name-lookup.cc:5738 +#: cp/name-lookup.cc:5724 #, fuzzy, gcc-internal-format #| msgid "declaration of template `%#D'" msgid "using-declaration may not name namespace %qD" msgstr "абвяшчэньне шаблёну `%#D'" -#: cp/name-lookup.cc:5749 +#: cp/name-lookup.cc:5735 #, fuzzy, gcc-internal-format msgid "%<%T::%D%> names constructor in %qT" msgstr "дэструктару неабходны \"%#D\"" -#: cp/name-lookup.cc:5842 +#: cp/name-lookup.cc:5828 #, gcc-internal-format msgid "declaration of %qD not in a namespace surrounding %qD" msgstr "" -#: cp/name-lookup.cc:5883 +#: cp/name-lookup.cc:5869 #, fuzzy, gcc-internal-format msgid "explicit qualification in declaration of %qD" msgstr "паўторнае абвяшчэнне меткі \"%s\"" -#: cp/name-lookup.cc:5893 +#: cp/name-lookup.cc:5879 #, gcc-internal-format msgid "%qD should have been declared inside %qD" msgstr "" -#: cp/name-lookup.cc:5946 +#: cp/name-lookup.cc:5947 #, fuzzy, gcc-internal-format msgid "%qD has not been declared within %qD" msgstr "\"%s\" не абвешчан (першае выкарыстанне ў гэтай функцыі)" -#: cp/name-lookup.cc:5948 +#: cp/name-lookup.cc:5949 #, gcc-internal-format msgid "only here as a %" msgstr "" -#: cp/name-lookup.cc:6002 +#: cp/name-lookup.cc:6003 #, gcc-internal-format msgid "%qD attribute requires a single NTBS argument" msgstr "" -#: cp/name-lookup.cc:6009 +#: cp/name-lookup.cc:6010 #, gcc-internal-format msgid "%qD attribute is meaningless since members of the anonymous namespace get local symbols" msgstr "" -#: cp/name-lookup.cc:6019 cp/name-lookup.cc:6046 +#: cp/name-lookup.cc:6020 cp/name-lookup.cc:6047 #, gcc-internal-format msgid "ignoring %qD attribute on anonymous namespace" msgstr "" -#: cp/name-lookup.cc:6025 +#: cp/name-lookup.cc:6026 #, gcc-internal-format msgid "ignoring %qD attribute on non-inline namespace" msgstr "" -#: cp/name-lookup.cc:6062 cp/name-lookup.cc:8551 +#: cp/name-lookup.cc:6063 cp/name-lookup.cc:8556 #, fuzzy, gcc-internal-format #| msgid "`%s' attribute ignored" msgid "%qD attribute directive ignored" msgstr "\"%s\" атрыбут ігнарыруецца" -#: cp/name-lookup.cc:6388 +#: cp/name-lookup.cc:6389 #, gcc-internal-format msgid "maximum limit of %d namespaces searched for %qE" msgstr "" -#: cp/name-lookup.cc:6440 +#: cp/name-lookup.cc:6441 #, gcc-internal-format msgid "suggested alternative:" msgid_plural "suggested alternatives:" msgstr[0] "" msgstr[1] "" -#: cp/name-lookup.cc:6446 +#: cp/name-lookup.cc:6447 #, gcc-internal-format msgid " %qE" msgstr "" -#: cp/name-lookup.cc:6975 +#: cp/name-lookup.cc:6976 #, gcc-internal-format msgid "% is defined in header %qs; did you forget to %<#include %s%>?" msgstr "" -#: cp/name-lookup.cc:6981 +#: cp/name-lookup.cc:6982 #, gcc-internal-format msgid "% is only available from %s onwards" msgstr "" -#: cp/name-lookup.cc:7417 +#: cp/name-lookup.cc:7418 #, gcc-internal-format msgid "the macro %qs had not yet been defined" msgstr "" -#: cp/name-lookup.cc:7420 +#: cp/name-lookup.cc:7421 #, gcc-internal-format msgid "it was later defined here" msgstr "" -#: cp/name-lookup.cc:8179 +#: cp/name-lookup.cc:8184 #, gcc-internal-format msgid "declaration of % does not match %<#include %>, isn%'t a template" msgstr "" -#: cp/name-lookup.cc:8535 +#: cp/name-lookup.cc:8540 #, gcc-internal-format msgid "% using directive no longer supported" msgstr "" -#: cp/name-lookup.cc:8538 +#: cp/name-lookup.cc:8543 #, gcc-internal-format msgid "you can use an inline namespace instead" msgstr "" #. We only allow depth 255. -#: cp/name-lookup.cc:8637 +#: cp/name-lookup.cc:8642 #, gcc-internal-format, gfc-internal-format msgid "cannot nest more than %d namespaces" msgstr "" -#: cp/name-lookup.cc:8734 +#: cp/name-lookup.cc:8739 #, fuzzy, gcc-internal-format msgid "% is ambiguous" msgstr "памер \"%s\" - %d байт" -#: cp/name-lookup.cc:8750 +#: cp/name-lookup.cc:8755 #, fuzzy, gcc-internal-format msgid "namespace alias %qD not allowed here, assuming %qD" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/name-lookup.cc:8830 +#: cp/name-lookup.cc:8835 #, gcc-internal-format msgid "inline namespace must be specified at initial definition" msgstr "" -#: cp/name-lookup.cc:8831 +#: cp/name-lookup.cc:8836 #, fuzzy, gcc-internal-format msgid "%qD defined here" msgstr "YYDEBUG не вызначан." -#: cp/name-lookup.cc:8880 +#: cp/name-lookup.cc:8885 #, gcc-internal-format msgid "%s namespace %qD conflicts with reachable definition" msgstr "" -#: cp/name-lookup.cc:8882 +#: cp/name-lookup.cc:8887 #, fuzzy, gcc-internal-format, gfc-internal-format #| msgid "previous definition here" msgid "reachable %s definition here" msgstr "папярэдняе вызначэньне" -#: cp/name-lookup.cc:8925 +#: cp/name-lookup.cc:8930 #, gcc-internal-format msgid "XXX entering %" msgstr "" -#: cp/name-lookup.cc:8934 +#: cp/name-lookup.cc:8939 #, gcc-internal-format msgid "XXX leaving %" msgstr "" @@ -56503,7 +56517,7 @@ msgstr "" msgid "% is not set to true" msgstr "" -#: cp/parser.cc:1444 cp/parser.cc:45083 +#: cp/parser.cc:1444 cp/parser.cc:45103 #, gcc-internal-format msgid "%<#pragma omp declare %s%> not immediately followed by function declaration or definition" msgstr "" @@ -56533,7 +56547,7 @@ msgstr "" msgid "request for member %qE in non-class type %qT" msgstr "" -#: cp/parser.cc:3160 cp/parser.cc:20929 +#: cp/parser.cc:3160 cp/parser.cc:20938 #, gcc-internal-format msgid "%<%T::%E%> has not been declared" msgstr "" @@ -56613,7 +56627,7 @@ msgstr "Нерэчаісны выбар %s" msgid "ISO C++ forbids using a floating-point literal in a constant-expression" msgstr "" -#: cp/parser.cc:3355 cp/pt.cc:20161 +#: cp/parser.cc:3355 cp/pt.cc:20286 #, gcc-internal-format msgid "a cast to a type other than an integral or enumeration type cannot appear in a constant-expression" msgstr "" @@ -56750,7 +56764,7 @@ msgstr "" msgid "% only available with %<-std=c++20%> or %<-fconcepts%>" msgstr "" -#: cp/parser.cc:3550 cp/parser.cc:29904 +#: cp/parser.cc:3550 cp/parser.cc:29916 #, gcc-internal-format msgid "% only available with %<-std=c++20%> or %<-fconcepts%>" msgstr "" @@ -56932,7 +56946,7 @@ msgstr "" msgid "fold-expressions only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:5710 cp/parser.cc:5891 cp/parser.cc:6072 cp/semantics.cc:4080 +#: cp/parser.cc:5710 cp/parser.cc:5891 cp/parser.cc:6072 cp/semantics.cc:4096 #, gcc-internal-format msgid "expected primary-expression" msgstr "" @@ -56987,7 +57001,7 @@ msgstr "" msgid "typedef-name %qD used as destructor declarator" msgstr "" -#: cp/parser.cc:6610 cp/parser.cc:23379 +#: cp/parser.cc:6610 cp/parser.cc:23390 #, gcc-internal-format msgid "expected unqualified-id" msgstr "" @@ -57043,7 +57057,7 @@ msgstr "" msgid "wrong number of arguments to %<__builtin_addressof%>" msgstr "памылковая колькасьць аргументаў, зададзеных для атрыбута `%s'" -#: cp/parser.cc:7450 cp/pt.cc:20841 +#: cp/parser.cc:7450 cp/pt.cc:20979 #, fuzzy, gcc-internal-format #| msgid "wrong number of arguments specified for `%s' attribute" msgid "wrong number of arguments to %<__builtin_launder%>" @@ -57097,7 +57111,7 @@ msgstr "ISO C не дазваляе дэкларацыі метак (label)" msgid "types may not be defined in % expressions" msgstr "" -#: cp/parser.cc:9084 cp/parser.cc:32451 +#: cp/parser.cc:9084 cp/parser.cc:32470 #, gcc-internal-format msgid "types may not be defined in %qs expressions" msgstr "" @@ -57308,12 +57322,12 @@ msgstr "" msgid "% lambda only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:11859 cp/parser.cc:11998 cp/parser.cc:45689 +#: cp/parser.cc:11859 cp/parser.cc:11998 cp/parser.cc:45709 #, gcc-internal-format msgid "mixing OpenMP directives with attribute and pragma syntax on the same statement" msgstr "" -#: cp/parser.cc:11885 cp/parser.cc:45671 +#: cp/parser.cc:11885 cp/parser.cc:45691 #, gcc-internal-format msgid "unknown OpenMP directive name in % attribute argument" msgstr "" @@ -57389,7 +57403,7 @@ msgstr "" msgid "init-statement in selection statements only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:13251 cp/parser.cc:32938 +#: cp/parser.cc:13251 cp/parser.cc:32957 #, fuzzy, gcc-internal-format #| msgid "empty body in an else-statement" msgid "expected selection-statement" @@ -57412,7 +57426,7 @@ msgid "types may not be defined in conditions" msgstr "" #. Anything else is an error. -#: cp/parser.cc:13416 cp/parser.cc:22659 cp/parser.cc:25178 +#: cp/parser.cc:13416 cp/parser.cc:22670 cp/parser.cc:25189 #, fuzzy, gcc-internal-format #| msgid "invalid initializer" msgid "expected initializer" @@ -57454,7 +57468,7 @@ msgstr "" msgid "inconsistent begin/end types in range-based % statement: %qT and %qT" msgstr "" -#: cp/parser.cc:14124 cp/parser.cc:32941 +#: cp/parser.cc:14124 cp/parser.cc:32960 #, fuzzy, gcc-internal-format #| msgid "empty body in an else-statement" msgid "expected iteration-statement" @@ -57481,7 +57495,7 @@ msgstr "" msgid "ISO C++ forbids computed gotos" msgstr "" -#: cp/parser.cc:14340 cp/parser.cc:32944 +#: cp/parser.cc:14340 cp/parser.cc:32963 #, gcc-internal-format msgid "expected jump-statement" msgstr "" @@ -57557,7 +57571,7 @@ msgstr "" msgid "% not part of following module-directive" msgstr "" -#: cp/parser.cc:14798 cp/parser.cc:26998 +#: cp/parser.cc:14798 cp/parser.cc:27010 #, gcc-internal-format msgid "extra %<;%>" msgstr "" @@ -57674,7 +57688,7 @@ msgstr "" msgid "class definition may not be declared a friend" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/parser.cc:16061 cp/parser.cc:27540 +#: cp/parser.cc:16061 cp/parser.cc:27552 #, gcc-internal-format msgid "templates may not be %" msgstr "" @@ -57734,12 +57748,12 @@ msgstr "" msgid "cannot expand initializer for member %qD" msgstr "прапушчан ініцыялізатар" -#: cp/parser.cc:16797 cp/pt.cc:26924 +#: cp/parser.cc:16797 cp/pt.cc:27079 #, gcc-internal-format msgid "mem-initializer for %qD follows constructor delegation" msgstr "" -#: cp/parser.cc:16809 cp/pt.cc:26936 +#: cp/parser.cc:16809 cp/pt.cc:27091 #, gcc-internal-format msgid "constructor delegation follows mem-initializer for %qD" msgstr "" @@ -57810,7 +57824,7 @@ msgstr "нявернае выкарыстанне \"restict\"" msgid "invalid use of % in default template argument" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/parser.cc:18023 cp/parser.cc:18109 cp/parser.cc:24945 +#: cp/parser.cc:18023 cp/parser.cc:18109 cp/parser.cc:24956 #, fuzzy, gcc-internal-format msgid "template parameter pack %qD cannot have a default argument" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" @@ -57953,314 +57967,314 @@ msgstr "функцыя не вяртае тып string" msgid "concept defined here" msgstr "" -#: cp/parser.cc:20058 +#: cp/parser.cc:20067 #, gcc-internal-format msgid "expected % or % after %qE" msgstr "" -#: cp/parser.cc:20065 +#: cp/parser.cc:20074 #, gcc-internal-format msgid "unexpected placeholder in constrained result type" msgstr "" -#: cp/parser.cc:20308 +#: cp/parser.cc:20317 #, gcc-internal-format msgid "elaborated-type-specifier for a scoped enum must not use the %qD keyword" msgstr "" -#: cp/parser.cc:20384 +#: cp/parser.cc:20393 #, gcc-internal-format msgid "% must follow a nested-name-specifier" msgstr "" -#: cp/parser.cc:20546 +#: cp/parser.cc:20555 #, gcc-internal-format msgid "declaration %qD does not declare anything" msgstr "" -#: cp/parser.cc:20634 +#: cp/parser.cc:20643 #, gcc-internal-format msgid "attributes ignored on uninstantiated type" msgstr "" -#: cp/parser.cc:20640 +#: cp/parser.cc:20649 #, gcc-internal-format msgid "attributes ignored on template instantiation" msgstr "" -#: cp/parser.cc:20651 +#: cp/parser.cc:20660 #, gcc-internal-format msgid "attributes ignored on elaborated-type-specifier that is not a forward declaration" msgstr "" -#: cp/parser.cc:20792 +#: cp/parser.cc:20801 #, fuzzy, gcc-internal-format msgid "%qD is an enumeration template" msgstr "\"%s\" звычайна функцыя" -#: cp/parser.cc:20803 +#: cp/parser.cc:20812 #, gcc-internal-format msgid "%qD does not name an enumeration in %qT" msgstr "" -#: cp/parser.cc:20818 +#: cp/parser.cc:20827 #, gcc-internal-format msgid "unnamed scoped enum is not allowed" msgstr "" -#: cp/parser.cc:20834 +#: cp/parser.cc:20843 #, gcc-internal-format msgid "types may not be defined in enum-base" msgstr "" -#: cp/parser.cc:20879 +#: cp/parser.cc:20888 #, gcc-internal-format msgid "expected %<;%> or %<{%>" msgstr "" -#: cp/parser.cc:20923 +#: cp/parser.cc:20932 #, gcc-internal-format msgid "cannot add an enumerator list to a template instantiation" msgstr "" -#: cp/parser.cc:20937 +#: cp/parser.cc:20946 #, gcc-internal-format msgid "nested name specifier %qT for enum declaration does not name a class or namespace" msgstr "" -#: cp/parser.cc:20949 cp/parser.cc:26455 +#: cp/parser.cc:20958 cp/parser.cc:26467 #, gcc-internal-format msgid "declaration of %qD in namespace %qD which does not enclose %qD" msgstr "" -#: cp/parser.cc:20954 cp/parser.cc:26460 +#: cp/parser.cc:20963 cp/parser.cc:26472 #, gcc-internal-format msgid "declaration of %qD in %qD which does not enclose %qD" msgstr "" -#: cp/parser.cc:20966 cp/parser.cc:26473 +#: cp/parser.cc:20975 cp/parser.cc:26485 #, gcc-internal-format msgid "extra qualification not allowed" msgstr "" -#: cp/parser.cc:21003 +#: cp/parser.cc:21014 #, fuzzy, gcc-internal-format #| msgid "ISO C forbids an empty source file" msgid "ISO C++ forbids empty unnamed enum" msgstr "ISO C не дазваляе пусты ізыходны файл" -#: cp/parser.cc:21028 +#: cp/parser.cc:21039 #, gcc-internal-format msgid "opaque-enum-specifier without name" msgstr "" -#: cp/parser.cc:21031 +#: cp/parser.cc:21042 #, gcc-internal-format msgid "opaque-enum-specifier must use a simple identifier" msgstr "" -#: cp/parser.cc:21152 +#: cp/parser.cc:21163 #, gcc-internal-format msgid "unexpanded parameter pack in enumerator in lambda" msgstr "" -#: cp/parser.cc:21227 +#: cp/parser.cc:21238 #, gcc-internal-format msgid "%qD is not a namespace-name; did you mean %qs?" msgstr "" -#: cp/parser.cc:21231 +#: cp/parser.cc:21242 #, fuzzy, gcc-internal-format #| msgid "`%D' is not a function," msgid "%qD is not a namespace-name" msgstr "`%D' - гэта ня функцыя," -#: cp/parser.cc:21235 +#: cp/parser.cc:21246 #, gcc-internal-format msgid "expected namespace-name" msgstr "" -#: cp/parser.cc:21296 +#: cp/parser.cc:21307 #, gcc-internal-format msgid "nested inline namespace definitions only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:21308 +#: cp/parser.cc:21319 #, gcc-internal-format msgid "standard attributes on namespaces must precede the namespace name" msgstr "" -#: cp/parser.cc:21327 +#: cp/parser.cc:21338 #, gcc-internal-format msgid "nested namespace definitions only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:21337 +#: cp/parser.cc:21348 #, gcc-internal-format msgid "nested namespace name required" msgstr "" -#: cp/parser.cc:21342 +#: cp/parser.cc:21353 #, gcc-internal-format msgid "namespace name required" msgstr "" -#: cp/parser.cc:21346 +#: cp/parser.cc:21357 #, gcc-internal-format msgid "a nested namespace definition cannot have attributes" msgstr "" -#: cp/parser.cc:21349 +#: cp/parser.cc:21360 #, gcc-internal-format msgid "a nested namespace definition cannot be inline" msgstr "" -#: cp/parser.cc:21356 +#: cp/parser.cc:21367 #, gcc-internal-format msgid "namespace %qD entered" msgstr "" -#: cp/parser.cc:21411 +#: cp/parser.cc:21422 #, gcc-internal-format msgid "% definition is not allowed here" msgstr "" -#: cp/parser.cc:21586 +#: cp/parser.cc:21597 #, gcc-internal-format msgid "pack expansion in using-declaration only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:21601 +#: cp/parser.cc:21612 #, fuzzy, gcc-internal-format msgid "a template-id may not appear in a using-declaration" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/parser.cc:21619 +#: cp/parser.cc:21630 #, gcc-internal-format msgid "comma-separated list in using-declaration only available with %<-std=c++17%> or %<-std=gnu++17%>" msgstr "" -#: cp/parser.cc:21629 +#: cp/parser.cc:21640 #, gcc-internal-format msgid "access declarations are deprecated in favour of using-declarations; suggestion: add the % keyword" msgstr "" -#: cp/parser.cc:21694 +#: cp/parser.cc:21705 #, fuzzy, gcc-internal-format msgid "opaque-enum-declaration here" msgstr "няма папярэдняга аб'яўлення для \"%s\"" -#: cp/parser.cc:21764 +#: cp/parser.cc:21775 #, gcc-internal-format msgid "types may not be defined in alias template declarations" msgstr "" -#: cp/parser.cc:21943 +#: cp/parser.cc:21954 #, gcc-internal-format msgid "% in % function only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:21963 cp/parser.cc:21980 cp/parser.cc:21994 +#: cp/parser.cc:21974 cp/parser.cc:21991 cp/parser.cc:22005 #, fuzzy, gcc-internal-format msgid "duplicate % qualifier %qT" msgstr "паўтарэнне \"volatile\"" -#: cp/parser.cc:21970 +#: cp/parser.cc:21981 #, gcc-internal-format msgid "% qualifier %qT ignored outside of function body" msgstr "" -#: cp/parser.cc:22007 +#: cp/parser.cc:22018 #, gcc-internal-format msgid "%qT is not an % qualifier" msgstr "" -#: cp/parser.cc:22023 +#: cp/parser.cc:22034 #, gcc-internal-format msgid "% qualifier outside of function body" msgstr "" -#: cp/parser.cc:22251 +#: cp/parser.cc:22262 #, gcc-internal-format msgid "empty parentheses were disambiguated as a function declaration" msgstr "" -#: cp/parser.cc:22262 +#: cp/parser.cc:22273 #, gcc-internal-format msgid "remove parentheses to default-initialize a variable" msgstr "" -#: cp/parser.cc:22267 +#: cp/parser.cc:22278 #, gcc-internal-format msgid "or replace parentheses with braces to aggregate-initialize a variable" msgstr "" -#: cp/parser.cc:22270 +#: cp/parser.cc:22281 #, gcc-internal-format msgid "or replace parentheses with braces to value-initialize a variable" msgstr "" -#: cp/parser.cc:22287 cp/parser.cc:22312 +#: cp/parser.cc:22298 cp/parser.cc:22323 #, gcc-internal-format msgid "parentheses were disambiguated as a function declaration" msgstr "" -#: cp/parser.cc:22299 cp/parser.cc:22320 +#: cp/parser.cc:22310 cp/parser.cc:22331 #, gcc-internal-format msgid "replace parentheses with braces to declare a variable" msgstr "" -#: cp/parser.cc:22306 +#: cp/parser.cc:22317 #, gcc-internal-format msgid "add parentheses to declare a variable" msgstr "" -#: cp/parser.cc:22553 +#: cp/parser.cc:22564 #, fuzzy, gcc-internal-format msgid "a function-definition is not allowed here" msgstr "атрыбуты секцыі не падтрымліваюцца для гэтай мэты" -#: cp/parser.cc:22564 +#: cp/parser.cc:22575 #, gcc-internal-format msgid "an % specification is not allowed on a function-definition" msgstr "" -#: cp/parser.cc:22568 +#: cp/parser.cc:22579 #, fuzzy, gcc-internal-format msgid "attributes are not allowed on a function-definition" msgstr "\"%s\" - гэта не пачатак дэкларацыі" -#: cp/parser.cc:22619 +#: cp/parser.cc:22630 #, gcc-internal-format msgid "expected constructor, destructor, or type conversion" msgstr "" -#: cp/parser.cc:22740 +#: cp/parser.cc:22751 #, fuzzy, gcc-internal-format msgid "initializer provided for function" msgstr "не магу ініцыялізаваць сяброўскую функцыю \"%s\"" -#: cp/parser.cc:22782 +#: cp/parser.cc:22793 #, gcc-internal-format msgid "attributes after parenthesized initializer ignored" msgstr "" -#: cp/parser.cc:22796 +#: cp/parser.cc:22807 #, gcc-internal-format msgid "non-function %qD declared as implicit template" msgstr "" -#: cp/parser.cc:23299 +#: cp/parser.cc:23310 #, fuzzy, gcc-internal-format msgid "array bound is not an integer constant" msgstr "памер масіва \"%s\" адмоўны" -#: cp/parser.cc:23425 +#: cp/parser.cc:23436 #, gcc-internal-format msgid "cannot define member of dependent typedef %qT" msgstr "" -#: cp/parser.cc:23429 +#: cp/parser.cc:23440 #, fuzzy, gcc-internal-format msgid "%<%T::%E%> is not a type" msgstr "\"%s\" мае незавершаны тып" @@ -58269,240 +58283,240 @@ msgstr "\"%s\" мае незавершаны тып" #. here because we do not have enough #. information about its original syntactic #. form. -#: cp/parser.cc:23458 +#: cp/parser.cc:23469 #, gcc-internal-format msgid "invalid declarator" msgstr "нерэчаісны абвяшчальнік" -#: cp/parser.cc:23466 +#: cp/parser.cc:23477 #, fuzzy, gcc-internal-format msgid "invalid use of constructor as a template" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/parser.cc:23468 +#: cp/parser.cc:23479 #, gcc-internal-format msgid "use %<%T::%D%> instead of %<%T::%D%> to name the constructor in a qualified name" msgstr "" #. But declarations with qualified-ids can't appear in a #. function. -#: cp/parser.cc:23583 +#: cp/parser.cc:23594 #, fuzzy, gcc-internal-format #| msgid "Invalid declaration" msgid "qualified-id in declaration" msgstr "Нерэчаіснае абвяшчэнне" -#: cp/parser.cc:23608 +#: cp/parser.cc:23619 #, fuzzy, gcc-internal-format #| msgid "empty declaration" msgid "expected declarator" msgstr "пустое абвяшчэньне" -#: cp/parser.cc:23729 +#: cp/parser.cc:23740 #, gcc-internal-format msgid "%qD is a namespace" msgstr "" -#: cp/parser.cc:23731 +#: cp/parser.cc:23742 #, gcc-internal-format msgid "cannot form pointer to member of non-class %q#T" msgstr "" -#: cp/parser.cc:23752 +#: cp/parser.cc:23763 #, gcc-internal-format msgid "expected ptr-operator" msgstr "" -#: cp/parser.cc:23813 +#: cp/parser.cc:23824 #, fuzzy, gcc-internal-format #| msgid "duplicate `volatile'" msgid "duplicate cv-qualifier" msgstr "паўтарэнне \"volatile\"" -#: cp/parser.cc:23867 +#: cp/parser.cc:23878 #, gcc-internal-format msgid "multiple ref-qualifiers" msgstr "" -#: cp/parser.cc:23904 +#: cp/parser.cc:23915 #, gcc-internal-format msgid "%qE requires %<-fgnu-tm%>" msgstr "" -#: cp/parser.cc:23962 +#: cp/parser.cc:23973 #, fuzzy, gcc-internal-format #| msgid "duplicate `volatile'" msgid "duplicate virt-specifier" msgstr "паўтарэнне \"volatile\"" -#: cp/parser.cc:24224 +#: cp/parser.cc:24235 #, fuzzy, gcc-internal-format msgid "missing template arguments after %qT" msgstr "невыкарыстаемы параметр \"%s\"" -#: cp/parser.cc:24230 +#: cp/parser.cc:24241 #, gcc-internal-format msgid "%qT not permitted in template argument" msgstr "" -#: cp/parser.cc:24233 cp/typeck2.cc:353 cp/typeck2.cc:400 cp/typeck2.cc:2330 +#: cp/parser.cc:24244 cp/typeck2.cc:353 cp/typeck2.cc:400 cp/typeck2.cc:2362 #, fuzzy, gcc-internal-format #| msgid "invalid use of `%T'" msgid "invalid use of %qT" msgstr "нерэчаіснае выкарыстаньне `%T'" -#: cp/parser.cc:24260 +#: cp/parser.cc:24271 #, gcc-internal-format msgid "types may not be defined in template arguments" msgstr "" -#: cp/parser.cc:24265 +#: cp/parser.cc:24276 #, fuzzy, gcc-internal-format msgid "invalid use of % in template argument" msgstr "нявернае выкарыстанне \"restict\"" -#: cp/parser.cc:24371 +#: cp/parser.cc:24382 #, gcc-internal-format msgid "expected type-specifier" msgstr "" -#: cp/parser.cc:24652 +#: cp/parser.cc:24663 #, gcc-internal-format msgid "expected %<,%> or %<...%>" msgstr "" -#: cp/parser.cc:24730 +#: cp/parser.cc:24741 #, gcc-internal-format msgid "types may not be defined in parameter types" msgstr "" -#: cp/parser.cc:24929 +#: cp/parser.cc:24940 #, gcc-internal-format msgid "default arguments are only permitted for function parameters" msgstr "" -#: cp/parser.cc:24947 +#: cp/parser.cc:24958 #, gcc-internal-format msgid "parameter pack %qD cannot have a default argument" msgstr "" -#: cp/parser.cc:24953 +#: cp/parser.cc:24964 #, fuzzy, gcc-internal-format msgid "template parameter pack cannot have a default argument" msgstr "віртуальныя функцыі не могуць быць сяброўскімі" -#: cp/parser.cc:24955 +#: cp/parser.cc:24966 #, gcc-internal-format msgid "parameter pack cannot have a default argument" msgstr "" -#: cp/parser.cc:25085 +#: cp/parser.cc:25096 #, gcc-internal-format msgid "function-try-block body of % constructor only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:25089 +#: cp/parser.cc:25100 #, gcc-internal-format msgid "function-try-block body of % function only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:25413 +#: cp/parser.cc:25424 #, gcc-internal-format msgid "C++ designated initializers only available with %<-std=c++20%> or %<-std=gnu++20%>" msgstr "" -#: cp/parser.cc:25433 +#: cp/parser.cc:25444 #, gcc-internal-format msgid "ISO C++ does not allow GNU designated initializers" msgstr "" -#: cp/parser.cc:25471 +#: cp/parser.cc:25482 #, gcc-internal-format msgid "ISO C++ does not allow C99 designated initializers" msgstr "" -#: cp/parser.cc:25485 +#: cp/parser.cc:25496 #, gcc-internal-format msgid "either all initializer clauses should be designated or none of them should be" msgstr "" -#: cp/parser.cc:25510 +#: cp/parser.cc:25521 #, gcc-internal-format msgid "%<...%> not allowed in designated initializer list" msgstr "" -#: cp/parser.cc:25561 +#: cp/parser.cc:25572 #, gcc-internal-format msgid "%<.%s%> designator used multiple times in the same initializer list" msgstr "" -#: cp/parser.cc:25617 cp/parser.cc:25754 +#: cp/parser.cc:25628 cp/parser.cc:25765 #, gcc-internal-format msgid "expected class-name" msgstr "" -#: cp/parser.cc:25993 +#: cp/parser.cc:26005 #, gcc-internal-format msgid "expected %<;%> after class definition" msgstr "" -#: cp/parser.cc:25996 +#: cp/parser.cc:26008 #, gcc-internal-format msgid "expected %<;%> after struct definition" msgstr "" -#: cp/parser.cc:25999 +#: cp/parser.cc:26011 #, gcc-internal-format msgid "expected %<;%> after union definition" msgstr "" -#: cp/parser.cc:26397 +#: cp/parser.cc:26409 #, gcc-internal-format msgid "expected %<{%> or %<:%>" msgstr "" -#: cp/parser.cc:26408 +#: cp/parser.cc:26420 #, fuzzy, gcc-internal-format #| msgid "cannot find file for class %s" msgid "cannot specify % for a class" msgstr "немагчыма знайсьці файл для кляса %s" -#: cp/parser.cc:26416 +#: cp/parser.cc:26428 #, gcc-internal-format msgid "global qualification of class name is invalid" msgstr "" -#: cp/parser.cc:26423 +#: cp/parser.cc:26435 #, gcc-internal-format msgid "qualified name does not name a class" msgstr "" -#: cp/parser.cc:26435 +#: cp/parser.cc:26447 #, gcc-internal-format msgid "keyword % not allowed in class-head-name" msgstr "" -#: cp/parser.cc:26441 +#: cp/parser.cc:26453 #, fuzzy, gcc-internal-format msgid "invalid class name in declaration of %qD" msgstr "Нерэчаіснае абвяшчэнне" -#: cp/parser.cc:26495 +#: cp/parser.cc:26507 #, fuzzy, gcc-internal-format msgid "an explicit specialization must be preceded by %