-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathsam.c
192 lines (159 loc) · 5.22 KB
/
sam.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
/********************************************************************
* sam.c
*
* Module that implements the Synchronous Address Multiplexer
* MC6883 / SN74LS785, as used in the Dragon 32 computer
*
* February 6, 2021
*
*******************************************************************/
#include <stdint.h>
#include "mem.h"
#include "sam.h"
#include "vdg.h"
/* -----------------------------------------
Local definitions
----------------------------------------- */
/* -----------------------------------------
Module static functions
----------------------------------------- */
static uint8_t io_handler_vector_redirect(uint16_t address, uint8_t data, mem_operation_t op);
static uint8_t io_handler_sam_write(uint16_t address, uint8_t data, mem_operation_t op);
/* -----------------------------------------
Module globals
----------------------------------------- */
static struct sam_reg_t
{
uint8_t vdg_mode;
uint8_t vdg_display_offset;
uint8_t page;
uint8_t mpu_rate;
uint8_t memory_size;
uint8_t memory_map_type;
} sam_registers;
/*------------------------------------------------
* sam_init()
*
* Initialize the SAM device
*
* param: Nothing
* return: Nothing
*/
void sam_init(void)
{
mem_define_io(0xfff2, 0xffff, io_handler_vector_redirect);
mem_define_io(0xffc0, 0xffdf, io_handler_sam_write);
sam_registers.vdg_mode = 0; // Alphanumeric mode
sam_registers.vdg_display_offset = 2; // Dragon computer text page 0x0400
sam_registers.page = 1; // For compatibility, not used
sam_registers.mpu_rate = 0; // For compatibility, not used
sam_registers.memory_size = 2; // For compatibility, not used
sam_registers.memory_map_type = 0; // For compatibility maybe future Dragon 64 emulation, not used
}
/*------------------------------------------------
* io_handler_vector_redirect()
*
* IO call-back handler that will redirect CPU memory access from
* the normal vector area 0xfff2 through 0xffff to 0xbff2 through 0xbffff
*
* param: Call address, data byte for write operation, and operation type
* return: Status or data byte
*/
static uint8_t io_handler_vector_redirect(uint16_t address, uint8_t data, mem_operation_t op)
{
uint8_t response = 0;
if ( op == MEM_READ )
{
response = (uint8_t) mem_read((int)(address & 0xbfff));
}
return response;
}
/*------------------------------------------------
* io_handler_sam_write()
*
* IO call-back handler to emulate writing/modifying SAM registers.
*
* param: Call address, data byte for write operation, and operation type
* return: Status or data byte
*/
static uint8_t io_handler_sam_write(uint16_t address, uint8_t data, mem_operation_t op)
{
uint16_t register_addr;
if ( op == MEM_WRITE )
{
register_addr = address & 0x001f;
switch ( register_addr )
{
/* VDG mode
*/
case 0x00:
sam_registers.vdg_mode &= 0xfe;
break;
case 0x01:
sam_registers.vdg_mode |= 0x01;
break;
case 0x02:
sam_registers.vdg_mode &= 0xfd;
break;
case 0x03:
sam_registers.vdg_mode |= 0x02;
break;
case 0x04:
sam_registers.vdg_mode &= 0xfb;
break;
case 0x05:
sam_registers.vdg_mode |= 0x04;
break;
/* Display offset
*/
case 0x06:
sam_registers.vdg_display_offset &= 0xfe;
break;
case 0x07:
sam_registers.vdg_display_offset |= 0x01;
break;
case 0x08:
sam_registers.vdg_display_offset &= 0xfd;
break;
case 0x09:
sam_registers.vdg_display_offset |= 0x02;
break;
case 0x0a:
sam_registers.vdg_display_offset &= 0xfb;
break;
case 0x0b:
sam_registers.vdg_display_offset |= 0x04;
break;
case 0x0c:
sam_registers.vdg_display_offset &= 0xf7;
break;
case 0x0d:
sam_registers.vdg_display_offset |= 0x08;
break;
case 0x0e:
sam_registers.vdg_display_offset &= 0xef;
break;
case 0x0f:
sam_registers.vdg_display_offset |= 0x10;
break;
case 0x10:
sam_registers.vdg_display_offset &= 0xdf;
break;
case 0x11:
sam_registers.vdg_display_offset |= 0x20;
break;
case 0x12:
sam_registers.vdg_display_offset &= 0xbf;
break;
case 0x13:
sam_registers.vdg_display_offset |= 0x40;
break;
}
}
/* Send VDG mode to VDG emulation module
* and display offset address to VDG emulation module
*/
vdg_set_mode_sam((int) sam_registers.vdg_mode);
vdg_set_video_offset(sam_registers.vdg_display_offset);
return 0;
}